1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
42 #ifndef TARGET_NO_PROTOTYPE
43 #define TARGET_NO_PROTOTYPE 0
46 extern char *language_string
;
47 extern int profile_block_flag
;
49 #define min(A,B) ((A) < (B) ? (A) : (B))
50 #define max(A,B) ((A) > (B) ? (A) : (B))
54 enum processor_type rs6000_cpu
;
55 struct rs6000_cpu_select rs6000_select
[3] =
57 /* switch name, tune arch */
58 { (char *)0, "--with-cpu=", 1, 1 },
59 { (char *)0, "-mcpu=", 1, 1 },
60 { (char *)0, "-mtune=", 1, 0 },
63 /* Set to non-zero by "fix" operation to indicate that itrunc and
64 uitrunc must be defined. */
66 int rs6000_trunc_used
;
68 /* Set to non-zero once they have been defined. */
70 static int trunc_defined
;
72 /* Set to non-zero once AIX common-mode calls have been defined. */
73 static int common_mode_defined
;
75 /* Save information from a "cmpxx" operation until the branch or scc is
77 rtx rs6000_compare_op0
, rs6000_compare_op1
;
78 int rs6000_compare_fp_p
;
81 /* Label number of label created for -mrelocatable, to call to so we can
82 get the address of the GOT section */
83 int rs6000_pic_labelno
;
85 /* Which abi to adhere to */
86 char *rs6000_abi_name
= RS6000_ABI_NAME
;
88 /* Semantics of the small data area */
89 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
91 /* Which small data model to use */
92 char *rs6000_sdata_name
= (char *)0;
95 /* Whether a System V.4 varargs area was created. */
96 int rs6000_sysv_varargs_p
;
98 /* ABI enumeration available for subtarget to use. */
99 enum rs6000_abi rs6000_current_abi
;
101 /* Offset & size for fpmem stack locations used for converting between
102 float and integral types. */
103 int rs6000_fpmem_offset
;
104 int rs6000_fpmem_size
;
107 /* Default register names. */
108 char rs6000_reg_names
[][8] =
110 "0", "1", "2", "3", "4", "5", "6", "7",
111 "8", "9", "10", "11", "12", "13", "14", "15",
112 "16", "17", "18", "19", "20", "21", "22", "23",
113 "24", "25", "26", "27", "28", "29", "30", "31",
114 "0", "1", "2", "3", "4", "5", "6", "7",
115 "8", "9", "10", "11", "12", "13", "14", "15",
116 "16", "17", "18", "19", "20", "21", "22", "23",
117 "24", "25", "26", "27", "28", "29", "30", "31",
118 "mq", "lr", "ctr","ap",
119 "0", "1", "2", "3", "4", "5", "6", "7",
123 #ifdef TARGET_REGNAMES
124 static char alt_reg_names
[][8] =
126 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
127 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
128 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
129 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
130 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
131 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
132 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
133 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
134 "mq", "lr", "ctr", "ap",
135 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
140 /* Override command line options. Mostly we process the processor
141 type and sometimes adjust other TARGET_ options. */
144 rs6000_override_options (default_cpu
)
148 struct rs6000_cpu_select
*ptr
;
150 /* Simplify the entries below by making a mask for any POWER
151 variant and any PowerPC variant. */
153 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
154 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
155 | MASK_PPC_GFXOPT | MASK_POWERPC64)
156 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
160 char *name
; /* Canonical processor name. */
161 enum processor_type processor
; /* Processor type enum value. */
162 int target_enable
; /* Target flags to enable. */
163 int target_disable
; /* Target flags to disable. */
164 } processor_target_table
[]
165 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
166 POWER_MASKS
| POWERPC_MASKS
},
167 {"power", PROCESSOR_POWER
,
168 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
169 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
170 {"power2", PROCESSOR_POWER
,
171 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
172 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
173 {"powerpc", PROCESSOR_POWERPC
,
174 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
175 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
176 {"rios", PROCESSOR_RIOS1
,
177 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
178 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
179 {"rios1", PROCESSOR_RIOS1
,
180 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
181 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
182 {"rsc", PROCESSOR_PPC601
,
183 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
184 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
185 {"rsc1", PROCESSOR_PPC601
,
186 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
187 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
188 {"rios2", PROCESSOR_RIOS2
,
189 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
190 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
191 {"403", PROCESSOR_PPC403
,
192 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
193 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
194 {"505", PROCESSOR_MPCCORE
,
195 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
196 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
197 {"601", PROCESSOR_PPC601
,
198 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
199 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
200 {"602", PROCESSOR_PPC603
,
201 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
202 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
203 {"603", PROCESSOR_PPC603
,
204 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
205 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
206 {"603e", PROCESSOR_PPC603
,
207 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
208 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
209 {"604", PROCESSOR_PPC604
,
210 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
211 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
212 {"620", PROCESSOR_PPC620
,
213 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
214 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
215 {"821", PROCESSOR_MPCCORE
,
216 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
217 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
218 {"860", PROCESSOR_MPCCORE
,
219 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
220 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
222 int ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
224 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
225 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
227 profile_block_flag
= 0;
229 /* Identify the processor type */
230 rs6000_select
[0].string
= default_cpu
;
231 rs6000_cpu
= PROCESSOR_DEFAULT
;
233 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
235 ptr
= &rs6000_select
[i
];
236 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
238 for (j
= 0; j
< ptt_size
; j
++)
239 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
242 rs6000_cpu
= processor_target_table
[j
].processor
;
246 target_flags
|= processor_target_table
[j
].target_enable
;
247 target_flags
&= ~processor_target_table
[j
].target_disable
;
253 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
257 /* If -mmultiple or -mno-multiple was explicitly used, don't
258 override with the processor default */
259 if (TARGET_MULTIPLE_SET
)
260 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
262 /* If -mstring or -mno-string was explicitly used, don't
263 override with the processor default */
264 if (TARGET_STRING_SET
)
265 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
267 /* Don't allow -mmultiple or -mstring on little endian systems, because the
268 hardware doesn't support the instructions used in little endian mode */
269 if (!BYTES_BIG_ENDIAN
)
273 target_flags
&= ~MASK_MULTIPLE
;
274 if (TARGET_MULTIPLE_SET
)
275 warning ("-mmultiple is not supported on little endian systems");
280 target_flags
&= ~MASK_STRING
;
281 if (TARGET_STRING_SET
)
282 warning ("-mstring is not supported on little endian systems");
286 #ifdef TARGET_REGNAMES
287 /* If the user desires alternate register names, copy in the alternate names
290 bcopy ((char *)alt_reg_names
, (char *)rs6000_reg_names
, sizeof (rs6000_reg_names
));
293 #ifdef SUBTARGET_OVERRIDE_OPTIONS
294 SUBTARGET_OVERRIDE_OPTIONS
;
298 /* Do anything needed at the start of the asm file. */
301 rs6000_file_start (file
, default_cpu
)
307 char *start
= buffer
;
308 struct rs6000_cpu_select
*ptr
;
310 if (flag_verbose_asm
)
312 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
313 rs6000_select
[0].string
= default_cpu
;
315 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
317 ptr
= &rs6000_select
[i
];
318 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
320 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
326 switch (rs6000_sdata
)
328 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
329 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
330 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
331 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
334 if (rs6000_sdata
&& g_switch_value
)
336 fprintf (file
, "%s -G %d", start
, g_switch_value
);
347 /* Create a CONST_DOUBLE from a string. */
350 rs6000_float_const (string
, mode
)
352 enum machine_mode mode
;
354 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
355 return immed_real_const_1 (value
, mode
);
359 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
360 two parts of the constant if the target is little endian. */
363 rs6000_immed_double_const (i0
, i1
, mode
)
364 HOST_WIDE_INT i0
, i1
;
365 enum machine_mode mode
;
367 if (! WORDS_BIG_ENDIAN
)
368 return immed_double_const (i1
, i0
, mode
);
370 return immed_double_const (i0
, i1
, mode
);
374 /* Return non-zero if this function is known to have a null epilogue. */
379 if (reload_completed
)
381 rs6000_stack_t
*info
= rs6000_stack_info ();
383 if (info
->first_gp_reg_save
== 32
384 && info
->first_fp_reg_save
== 64
394 /* Returns 1 always. */
397 any_operand (op
, mode
)
399 enum machine_mode mode
;
404 /* Returns 1 if op is the count register */
405 int count_register_operand(op
, mode
)
407 enum machine_mode mode
;
409 if (GET_CODE (op
) != REG
)
412 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
415 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
421 /* Returns 1 if op is memory location for float/int conversions that masquerades
423 int fpmem_operand(op
, mode
)
425 enum machine_mode mode
;
427 if (GET_CODE (op
) != REG
)
430 if (FPMEM_REGNO_P (REGNO (op
)))
434 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
441 /* Return 1 if OP is a constant that can fit in a D field. */
444 short_cint_operand (op
, mode
)
446 enum machine_mode mode
;
448 return (GET_CODE (op
) == CONST_INT
449 && (unsigned) (INTVAL (op
) + 0x8000) < 0x10000);
452 /* Similar for a unsigned D field. */
455 u_short_cint_operand (op
, mode
)
457 enum machine_mode mode
;
459 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
462 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
465 non_short_cint_operand (op
, mode
)
467 enum machine_mode mode
;
469 return (GET_CODE (op
) == CONST_INT
470 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000);
473 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
477 gpc_reg_operand (op
, mode
)
479 enum machine_mode mode
;
481 return (register_operand (op
, mode
)
482 && (GET_CODE (op
) != REG
483 || (REGNO (op
) >= 67 && !FPMEM_REGNO_P (REGNO (op
)))
484 || REGNO (op
) < 64));
487 /* Returns 1 if OP is either a pseudo-register or a register denoting a
491 cc_reg_operand (op
, mode
)
493 enum machine_mode mode
;
495 return (register_operand (op
, mode
)
496 && (GET_CODE (op
) != REG
497 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
498 || CR_REGNO_P (REGNO (op
))));
501 /* Returns 1 if OP is either a constant integer valid for a D-field or a
502 non-special register. If a register, it must be in the proper mode unless
506 reg_or_short_operand (op
, mode
)
508 enum machine_mode mode
;
510 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
513 /* Similar, except check if the negation of the constant would be valid for
517 reg_or_neg_short_operand (op
, mode
)
519 enum machine_mode mode
;
521 if (GET_CODE (op
) == CONST_INT
)
522 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
524 return gpc_reg_operand (op
, mode
);
527 /* Return 1 if the operand is either a register or an integer whose high-order
531 reg_or_u_short_operand (op
, mode
)
533 enum machine_mode mode
;
535 if (GET_CODE (op
) == CONST_INT
536 && (INTVAL (op
) & 0xffff0000) == 0)
539 return gpc_reg_operand (op
, mode
);
542 /* Return 1 is the operand is either a non-special register or ANY
546 reg_or_cint_operand (op
, mode
)
548 enum machine_mode mode
;
550 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
553 /* Return 1 if the operand is an operand that can be loaded via the GOT */
556 got_operand (op
, mode
)
558 enum machine_mode mode
;
560 return (GET_CODE (op
) == SYMBOL_REF
561 || GET_CODE (op
) == CONST
562 || GET_CODE (op
) == LABEL_REF
);
565 /* Return the number of instructions it takes to form a constant in an
569 num_insns_constant_wide (value
)
572 /* signed constant loadable with {cal|addi} */
573 if (((unsigned HOST_WIDE_INT
)value
+ 0x8000) < 0x10000)
576 #if HOST_BITS_PER_WIDE_INT == 32
577 /* constant loadable with {cau|addis} */
578 else if ((value
& 0xffff) == 0)
582 /* constant loadable with {cau|addis} */
583 else if ((value
& 0xffff) == 0 && (value
& ~0xffffffff) == 0)
586 else if (TARGET_64BIT
)
588 HOST_WIDE_INT low
= value
& 0xffffffff;
589 HOST_WIDE_INT high
= value
>> 32;
591 if (high
== 0 && (low
& 0x80000000) == 0)
594 else if (high
== 0xffffffff && (low
& 0x80000000) != 0)
598 return num_insns_constant_wide (high
) + 1;
601 return (num_insns_constant_wide (high
)
602 + num_insns_constant_wide (low
) + 1);
611 num_insns_constant (op
, mode
)
613 enum machine_mode mode
;
615 if (GET_CODE (op
) == CONST_INT
)
616 return num_insns_constant_wide (INTVAL (op
));
618 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
623 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
624 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
625 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
628 else if (GET_CODE (op
) == CONST_DOUBLE
&& TARGET_32BIT
)
629 return (num_insns_constant_wide (CONST_DOUBLE_LOW (op
))
630 + num_insns_constant_wide (CONST_DOUBLE_HIGH (op
)));
632 else if (GET_CODE (op
) == CONST_DOUBLE
&& TARGET_64BIT
)
634 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
635 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
637 if (high
== 0 && (low
& 0x80000000) == 0)
638 return num_insns_constant_wide (low
);
640 else if (((high
& 0xffffffff) == 0xffffffff)
641 && ((low
& 0x80000000) != 0))
642 return num_insns_constant_wide (low
);
645 return num_insns_constant_wide (high
) + 1;
648 return (num_insns_constant_wide (high
)
649 + num_insns_constant_wide (low
) + 1);
656 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
657 with one instruction per word. We only do this if we can safely read
658 CONST_DOUBLE_{LOW,HIGH}. */
661 easy_fp_constant (op
, mode
)
663 register enum machine_mode mode
;
665 if (GET_CODE (op
) != CONST_DOUBLE
666 || GET_MODE (op
) != mode
667 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
670 /* Consider all constants with -msoft-float to be easy */
671 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
674 /* If we are using V.4 style PIC, consider all constants to be hard */
675 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
683 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
684 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
686 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
687 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
690 else if (mode
== SFmode
)
695 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
696 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
698 return num_insns_constant_wide (l
) == 1;
701 else if (mode
== DImode
&& TARGET_32BIT
)
702 return num_insns_constant (op
, DImode
) == 2;
708 /* Return 1 if the operand is in volatile memory. Note that during the
709 RTL generation phase, memory_operand does not return TRUE for
710 volatile memory references. So this function allows us to
711 recognize volatile references where its safe. */
714 volatile_mem_operand (op
, mode
)
716 enum machine_mode mode
;
718 if (GET_CODE (op
) != MEM
)
721 if (!MEM_VOLATILE_P (op
))
724 if (mode
!= GET_MODE (op
))
727 if (reload_completed
)
728 return memory_operand (op
, mode
);
730 if (reload_in_progress
)
731 return strict_memory_address_p (mode
, XEXP (op
, 0));
733 return memory_address_p (mode
, XEXP (op
, 0));
736 /* Return 1 if the operand is an offsettable memory address. */
739 offsettable_addr_operand (op
, mode
)
741 enum machine_mode mode
;
743 return offsettable_address_p (reload_completed
| reload_in_progress
,
747 /* Return 1 if the operand is either a floating-point register, a pseudo
748 register, or memory. */
751 fp_reg_or_mem_operand (op
, mode
)
753 enum machine_mode mode
;
755 return (memory_operand (op
, mode
)
756 || volatile_mem_operand (op
, mode
)
757 || (register_operand (op
, mode
)
758 && (GET_CODE (op
) != REG
759 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
760 || FP_REGNO_P (REGNO (op
)))));
763 /* Return 1 if the operand is either an easy FP constant (see above) or
767 mem_or_easy_const_operand (op
, mode
)
769 enum machine_mode mode
;
771 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
774 /* Return 1 if the operand is either a non-special register or an item
775 that can be used as the operand of an SI add insn. */
778 add_operand (op
, mode
)
780 enum machine_mode mode
;
782 return (reg_or_short_operand (op
, mode
)
783 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
786 /* Return 1 if OP is a constant but not a valid add_operand. */
789 non_add_cint_operand (op
, mode
)
791 enum machine_mode mode
;
793 return (GET_CODE (op
) == CONST_INT
794 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000
795 && (INTVAL (op
) & 0xffff) != 0);
798 /* Return 1 if the operand is a non-special register or a constant that
799 can be used as the operand of an OR or XOR insn on the RS/6000. */
802 logical_operand (op
, mode
)
804 enum machine_mode mode
;
806 return (gpc_reg_operand (op
, mode
)
807 || (GET_CODE (op
) == CONST_INT
808 && ((INTVAL (op
) & 0xffff0000) == 0
809 || (INTVAL (op
) & 0xffff) == 0)));
812 /* Return 1 if C is a constant that is not a logical operand (as
816 non_logical_cint_operand (op
, mode
)
818 enum machine_mode mode
;
820 return (GET_CODE (op
) == CONST_INT
821 && (INTVAL (op
) & 0xffff0000) != 0
822 && (INTVAL (op
) & 0xffff) != 0);
825 /* Return 1 if C is a constant that can be encoded in a mask on the
826 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
827 Reject all ones and all zeros, since these should have been optimized
828 away and confuse the making of MB and ME. */
838 if (c
== 0 || c
== ~0)
841 last_bit_value
= c
& 1;
843 for (i
= 1; i
< 32; i
++)
844 if (((c
>>= 1) & 1) != last_bit_value
)
845 last_bit_value
^= 1, transitions
++;
847 return transitions
<= 2;
850 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
853 mask_operand (op
, mode
)
855 enum machine_mode mode
;
857 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
860 /* Return 1 if the operand is either a non-special register or a
861 constant that can be used as the operand of an RS/6000 logical AND insn. */
864 and_operand (op
, mode
)
866 enum machine_mode mode
;
868 return (reg_or_short_operand (op
, mode
)
869 || logical_operand (op
, mode
)
870 || mask_operand (op
, mode
));
873 /* Return 1 if the operand is a constant but not a valid operand for an AND
877 non_and_cint_operand (op
, mode
)
879 enum machine_mode mode
;
881 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
884 /* Return 1 if the operand is a general register or memory operand. */
887 reg_or_mem_operand (op
, mode
)
889 register enum machine_mode mode
;
891 return (gpc_reg_operand (op
, mode
)
892 || memory_operand (op
, mode
)
893 || volatile_mem_operand (op
, mode
));
896 /* Return 1 if the operand is a general register or memory operand without
897 pre-inc or pre_dec which produces invalid form of PowerPC lwa
901 lwa_operand (op
, mode
)
903 register enum machine_mode mode
;
907 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
908 inner
= SUBREG_REG (inner
);
910 return gpc_reg_operand (inner
, mode
)
911 || (memory_operand (inner
, mode
)
912 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
913 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
916 /* Return 1 if the operand, used inside a MEM, is a valid first argument
917 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
921 call_operand (op
, mode
)
923 enum machine_mode mode
;
925 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
928 return (GET_CODE (op
) == SYMBOL_REF
929 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
933 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
937 current_file_function_operand (op
, mode
)
939 enum machine_mode mode
;
941 return (GET_CODE (op
) == SYMBOL_REF
942 && (SYMBOL_REF_FLAG (op
)
943 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
947 /* Return 1 if this operand is a valid input for a move insn. */
950 input_operand (op
, mode
)
952 enum machine_mode mode
;
954 /* Memory is always valid. */
955 if (memory_operand (op
, mode
))
958 /* For floating-point, easy constants are valid. */
959 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
961 && easy_fp_constant (op
, mode
))
964 /* Allow any integer constant. */
965 if (GET_MODE_CLASS (mode
) == MODE_INT
966 && (GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
))
969 /* For floating-point or multi-word mode, the only remaining valid type
971 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
972 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
973 return register_operand (op
, mode
);
975 /* The only cases left are integral modes one word or smaller (we
976 do not get called for MODE_CC values). These can be in any
978 if (register_operand (op
, mode
))
981 /* A SYMBOL_REF referring to the TOC is valid. */
982 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
985 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
986 directly in the instruction stream */
987 if (DEFAULT_ABI
== ABI_NT
988 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
991 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
993 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
994 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
995 && small_data_operand (op
, Pmode
))
1001 /* Return 1 for an operand in small memory on V.4/eabi */
1004 small_data_operand (op
, mode
)
1006 enum machine_mode mode
;
1009 rtx sym_ref
, const_part
;
1011 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1014 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1017 if (GET_CODE (op
) == SYMBOL_REF
)
1020 else if (GET_CODE (op
) != CONST
1021 || GET_CODE (XEXP (op
, 0)) != PLUS
1022 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1023 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1027 sym_ref
= XEXP (XEXP (op
, 0), 0);
1029 if (*XSTR (sym_ref
, 0) != '@')
1040 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1041 for a call to a function whose data type is FNTYPE.
1042 For a library call, FNTYPE is 0.
1044 For incoming args we set the number of arguments in the prototype large
1045 so we never return a PARALLEL. */
1048 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1049 CUMULATIVE_ARGS
*cum
;
1054 static CUMULATIVE_ARGS zero_cumulative
;
1055 enum rs6000_abi abi
= DEFAULT_ABI
;
1057 *cum
= zero_cumulative
;
1059 cum
->fregno
= FP_ARG_MIN_REG
;
1060 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1061 cum
->call_cookie
= CALL_NORMAL
;
1065 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1066 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1067 cum
->varargs_offset
= RS6000_VARARGS_OFFSET
;
1070 else if (cum
->prototype
)
1071 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1072 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1073 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1076 cum
->nargs_prototype
= 0;
1078 cum
->orig_nargs
= cum
->nargs_prototype
;
1080 /* Check for DLL import functions */
1083 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype
)))
1084 cum
->call_cookie
= CALL_NT_DLLIMPORT
;
1086 /* Also check for longcall's */
1087 else if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1088 cum
->call_cookie
= CALL_LONG
;
1090 if (TARGET_DEBUG_ARG
)
1092 fprintf (stderr
, "\ninit_cumulative_args:");
1095 tree ret_type
= TREE_TYPE (fntype
);
1096 fprintf (stderr
, " ret code = %s,",
1097 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1100 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
) && incoming
)
1101 fprintf (stderr
, " varargs = %d, ", cum
->varargs_offset
);
1103 if (cum
->call_cookie
& CALL_NT_DLLIMPORT
)
1104 fprintf (stderr
, " dllimport,");
1106 if (cum
->call_cookie
& CALL_LONG
)
1107 fprintf (stderr
, " longcall,");
1109 fprintf (stderr
, " proto = %d, nargs = %d\n",
1110 cum
->prototype
, cum
->nargs_prototype
);
1114 /* If defined, a C expression that gives the alignment boundary, in bits,
1115 of an argument with the specified mode and type. If it is not defined,
1116 PARM_BOUNDARY is used for all arguments.
1118 Windows NT wants anything >= 8 bytes to be double word aligned.
1120 V.4 wants long longs to be double word aligned. */
1123 function_arg_boundary (mode
, type
)
1124 enum machine_mode mode
;
1127 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && mode
== DImode
)
1130 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
1131 return PARM_BOUNDARY
;
1133 if (mode
!= BLKmode
)
1134 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
1136 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
1139 /* Update the data in CUM to advance over an argument
1140 of mode MODE and data type TYPE.
1141 (TYPE is null for libcalls where that information may not be available.) */
1144 function_arg_advance (cum
, mode
, type
, named
)
1145 CUMULATIVE_ARGS
*cum
;
1146 enum machine_mode mode
;
1150 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1151 cum
->words
+= align
;
1152 cum
->nargs_prototype
--;
1154 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1156 /* Long longs must not be split between registers and stack */
1157 if ((GET_MODE_CLASS (mode
) != MODE_FLOAT
|| TARGET_SOFT_FLOAT
)
1158 && type
&& !AGGREGATE_TYPE_P (type
)
1159 && cum
->words
< GP_ARG_NUM_REG
1160 && cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1162 cum
->words
= GP_ARG_NUM_REG
;
1165 /* Aggregates get passed as pointers */
1166 if (type
&& AGGREGATE_TYPE_P (type
))
1169 /* Floats go in registers, & don't occupy space in the GP registers
1170 like they do for AIX unless software floating point. */
1171 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1172 && TARGET_HARD_FLOAT
1173 && cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1177 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1182 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1183 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1187 if (TARGET_DEBUG_ARG
)
1189 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1190 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1193 /* Determine where to put an argument to a function.
1194 Value is zero to push the argument on the stack,
1195 or a hard register in which to store the argument.
1197 MODE is the argument's machine mode.
1198 TYPE is the data type of the argument (as a tree).
1199 This is null for libcalls where that information may
1201 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1202 the preceding args and about the function being called.
1203 NAMED is nonzero if this argument is a named parameter
1204 (otherwise it is an extra parameter matching an ellipsis).
1206 On RS/6000 the first eight words of non-FP are normally in registers
1207 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1208 Under V.4, the first 8 FP args are in registers.
1210 If this is floating-point and no prototype is specified, we use
1211 both an FP and integer register (or possibly FP reg and stack). Library
1212 functions (when TYPE is zero) always have the proper types for args,
1213 so we can pass the FP value just in one register. emit_library_function
1214 doesn't support PARALLEL anyway. */
1217 function_arg (cum
, mode
, type
, named
)
1218 CUMULATIVE_ARGS
*cum
;
1219 enum machine_mode mode
;
1223 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1224 int align_words
= cum
->words
+ align
;
1226 if (TARGET_DEBUG_ARG
)
1228 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1229 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1231 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1232 uses to say fp args were passed in registers. Assume that we don't need the
1233 marker for software floating point, or compiler generated library calls. */
1234 if (mode
== VOIDmode
)
1236 enum rs6000_abi abi
= DEFAULT_ABI
;
1238 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1239 && TARGET_HARD_FLOAT
1240 && cum
->nargs_prototype
< 0
1241 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1243 return GEN_INT (cum
->call_cookie
1244 | ((cum
->fregno
== FP_ARG_MIN_REG
)
1245 ? CALL_V4_SET_FP_ARGS
1246 : CALL_V4_CLEAR_FP_ARGS
));
1249 return GEN_INT (cum
->call_cookie
);
1254 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1258 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1261 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1263 if (DEFAULT_ABI
== ABI_V4
/* V.4 never passes FP values in GP registers */
1264 || DEFAULT_ABI
== ABI_SOLARIS
1266 || ((cum
->nargs_prototype
> 0)
1267 /* IBM AIX extended its linkage convention definition always to
1268 require FP args after register save area hole on the stack. */
1269 && (DEFAULT_ABI
!= ABI_AIX
1271 || (align_words
< GP_ARG_NUM_REG
))))
1272 return gen_rtx (REG
, mode
, cum
->fregno
);
1274 return gen_rtx (PARALLEL
, mode
,
1277 gen_rtx (EXPR_LIST
, VOIDmode
,
1278 ((align_words
>= GP_ARG_NUM_REG
)
1281 + RS6000_ARG_SIZE (mode
, type
, named
)
1283 /* If this is partially on the stack, then
1284 we only include the portion actually
1285 in registers here. */
1286 ? gen_rtx (REG
, SImode
,
1287 GP_ARG_MIN_REG
+ align_words
)
1288 : gen_rtx (REG
, mode
,
1289 GP_ARG_MIN_REG
+ align_words
))),
1291 gen_rtx (EXPR_LIST
, VOIDmode
,
1292 gen_rtx (REG
, mode
, cum
->fregno
),
1296 /* Long longs won't be split between register and stack */
1297 else if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) &&
1298 align_words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1303 else if (align_words
< GP_ARG_NUM_REG
)
1304 return gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
);
1309 /* For an arg passed partly in registers and partly in memory,
1310 this is the number of registers used.
1311 For args passed entirely in registers or entirely in memory, zero. */
1314 function_arg_partial_nregs (cum
, mode
, type
, named
)
1315 CUMULATIVE_ARGS
*cum
;
1316 enum machine_mode mode
;
1323 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1326 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1328 if (cum
->nargs_prototype
>= 0)
1332 if (cum
->words
< GP_ARG_NUM_REG
1333 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1335 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1336 if (ret
&& TARGET_DEBUG_ARG
)
1337 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1345 /* A C expression that indicates when an argument must be passed by
1346 reference. If nonzero for an argument, a copy of that argument is
1347 made in memory and a pointer to the argument is passed instead of
1348 the argument itself. The pointer is passed in whatever way is
1349 appropriate for passing a pointer to that type.
1351 Under V.4, structures and unions are passed by reference. */
1354 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1355 CUMULATIVE_ARGS
*cum
;
1356 enum machine_mode mode
;
1360 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1361 && type
&& AGGREGATE_TYPE_P (type
))
1363 if (TARGET_DEBUG_ARG
)
1364 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1373 /* Perform any needed actions needed for a function that is receiving a
1374 variable number of arguments.
1378 MODE and TYPE are the mode and type of the current parameter.
1380 PRETEND_SIZE is a variable that should be set to the amount of stack
1381 that must be pushed by the prolog to pretend that our caller pushed
1384 Normally, this macro will push all remaining incoming registers on the
1385 stack and set PRETEND_SIZE to the length of the registers pushed. */
1388 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1389 CUMULATIVE_ARGS
*cum
;
1390 enum machine_mode mode
;
1396 rtx save_area
= virtual_incoming_args_rtx
;
1397 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
1399 if (TARGET_DEBUG_ARG
)
1401 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1402 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), no_rtl
);
1404 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && !no_rtl
)
1406 rs6000_sysv_varargs_p
= 1;
1407 save_area
= plus_constant (frame_pointer_rtx
, RS6000_VARARGS_OFFSET
);
1412 int first_reg_offset
= cum
->words
;
1414 if (MUST_PASS_IN_STACK (mode
, type
))
1415 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1417 if (first_reg_offset
> GP_ARG_NUM_REG
)
1418 first_reg_offset
= GP_ARG_NUM_REG
;
1420 if (!no_rtl
&& first_reg_offset
!= GP_ARG_NUM_REG
)
1422 (GP_ARG_MIN_REG
+ first_reg_offset
,
1423 gen_rtx (MEM
, BLKmode
,
1424 plus_constant (save_area
, first_reg_offset
* reg_size
)),
1425 GP_ARG_NUM_REG
- first_reg_offset
,
1426 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1428 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1431 /* Save FP registers if needed. */
1432 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && TARGET_HARD_FLOAT
&& !no_rtl
)
1434 int fregno
= cum
->fregno
;
1435 int num_fp_reg
= FP_ARG_V4_MAX_REG
+ 1 - fregno
;
1437 if (num_fp_reg
>= 0)
1439 rtx cr1
= gen_rtx (REG
, CCmode
, 69);
1440 rtx lab
= gen_label_rtx ();
1441 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1443 emit_jump_insn (gen_rtx (SET
, VOIDmode
,
1445 gen_rtx (IF_THEN_ELSE
, VOIDmode
,
1446 gen_rtx (NE
, VOIDmode
, cr1
, const0_rtx
),
1447 gen_rtx (LABEL_REF
, VOIDmode
, lab
),
1450 while ( num_fp_reg
-- >= 0)
1452 emit_move_insn (gen_rtx (MEM
, DFmode
, plus_constant (save_area
, off
)),
1453 gen_rtx (REG
, DFmode
, fregno
++));
1462 /* If defined, is a C expression that produces the machine-specific
1463 code for a call to `__builtin_saveregs'. This code will be moved
1464 to the very beginning of the function, before any parameter access
1465 are made. The return value of this function should be an RTX that
1466 contains the value to use as the return of `__builtin_saveregs'.
1468 The argument ARGS is a `tree_list' containing the arguments that
1469 were passed to `__builtin_saveregs'.
1471 If this macro is not defined, the compiler will output an ordinary
1472 call to the library function `__builtin_saveregs'.
1474 On the Power/PowerPC return the address of the area on the stack
1475 used to hold arguments. Under AIX, this includes the 8 word register
1476 save area. Under V.4 this does not. */
1479 expand_builtin_saveregs (args
)
1482 return virtual_incoming_args_rtx
;
1486 /* Generate a memory reference for expand_block_move, copying volatile,
1487 and other bits from an original memory reference. */
1490 expand_block_move_mem (mode
, addr
, orig_mem
)
1491 enum machine_mode mode
;
1495 rtx mem
= gen_rtx (MEM
, mode
, addr
);
1497 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
1498 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1499 MEM_IN_STRUCT_P (mem
) = MEM_IN_STRUCT_P (orig_mem
);
1500 #ifdef MEM_UNALIGNED_P
1501 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
1506 /* Expand a block move operation, and return 1 if successful. Return 0
1507 if we should let the compiler generate normal code.
1509 operands[0] is the destination
1510 operands[1] is the source
1511 operands[2] is the length
1512 operands[3] is the alignment */
1514 #define MAX_MOVE_REG 4
1517 expand_block_move (operands
)
1520 rtx orig_dest
= operands
[0];
1521 rtx orig_src
= operands
[1];
1522 rtx bytes_rtx
= operands
[2];
1523 rtx align_rtx
= operands
[3];
1524 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
1525 int align
= XINT (align_rtx
, 0);
1535 rtx stores
[MAX_MOVE_REG
];
1538 /* If this is not a fixed size move, just call memcpy */
1542 /* Anything to move? */
1543 bytes
= INTVAL (bytes_rtx
);
1547 /* Don't support real large moves. If string instructions are not used,
1548 then don't generate more than 8 loads. */
1554 else if (!STRICT_ALIGNMENT
)
1559 else if (bytes
> 8*align
)
1562 /* Move the address into scratch registers. */
1563 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
1564 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
1566 if (TARGET_STRING
) /* string instructions are available */
1568 for ( ; bytes
> 0; bytes
-= move_bytes
)
1570 if (bytes
> 24 /* move up to 32 bytes at a time */
1580 move_bytes
= (bytes
> 32) ? 32 : bytes
;
1581 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1582 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1583 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
1586 else if (bytes
> 16 /* move up to 24 bytes at a time */
1594 move_bytes
= (bytes
> 24) ? 24 : bytes
;
1595 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1596 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1597 GEN_INT (move_bytes
),
1600 else if (bytes
> 8 /* move up to 16 bytes at a time */
1606 move_bytes
= (bytes
> 16) ? 16 : bytes
;
1607 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1608 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1609 GEN_INT (move_bytes
),
1612 else if (bytes
> 4 && !TARGET_64BIT
)
1613 { /* move up to 8 bytes at a time */
1614 move_bytes
= (bytes
> 8) ? 8 : bytes
;
1615 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1616 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1617 GEN_INT (move_bytes
),
1620 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1621 { /* move 4 bytes */
1623 tmp_reg
= gen_reg_rtx (SImode
);
1624 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
1625 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
1627 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1628 { /* move 2 bytes */
1630 tmp_reg
= gen_reg_rtx (HImode
);
1631 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
1632 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
1634 else if (bytes
== 1) /* move 1 byte */
1637 tmp_reg
= gen_reg_rtx (QImode
);
1638 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
1639 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
1642 { /* move up to 4 bytes at a time */
1643 move_bytes
= (bytes
> 4) ? 4 : bytes
;
1644 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1645 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1646 GEN_INT (move_bytes
),
1650 if (bytes
> move_bytes
)
1652 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
1653 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
1658 else /* string instructions not available */
1660 num_reg
= offset
= 0;
1661 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
1663 /* Calculate the correct offset for src/dest */
1667 dest_addr
= dest_reg
;
1671 src_addr
= gen_rtx (PLUS
, Pmode
, src_reg
, GEN_INT (offset
));
1672 dest_addr
= gen_rtx (PLUS
, Pmode
, dest_reg
, GEN_INT (offset
));
1675 /* Generate the appropriate load and store, saving the stores for later */
1676 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
1679 tmp_reg
= gen_reg_rtx (DImode
);
1680 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
1681 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
1683 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1686 tmp_reg
= gen_reg_rtx (SImode
);
1687 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
1688 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
1690 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1693 tmp_reg
= gen_reg_rtx (HImode
);
1694 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
1695 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
1700 tmp_reg
= gen_reg_rtx (QImode
);
1701 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
1702 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
1705 if (num_reg
>= MAX_MOVE_REG
)
1707 for (i
= 0; i
< num_reg
; i
++)
1708 emit_insn (stores
[i
]);
1713 for (i
= 0; i
< num_reg
; i
++)
1714 emit_insn (stores
[i
]);
1721 /* Return 1 if OP is a load multiple operation. It is known to be a
1722 PARALLEL and the first section will be tested. */
1725 load_multiple_operation (op
, mode
)
1727 enum machine_mode mode
;
1729 int count
= XVECLEN (op
, 0);
1734 /* Perform a quick check so we don't blow up below. */
1736 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1737 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
1738 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
1741 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
1742 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
1744 for (i
= 1; i
< count
; i
++)
1746 rtx elt
= XVECEXP (op
, 0, i
);
1748 if (GET_CODE (elt
) != SET
1749 || GET_CODE (SET_DEST (elt
)) != REG
1750 || GET_MODE (SET_DEST (elt
)) != SImode
1751 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
1752 || GET_CODE (SET_SRC (elt
)) != MEM
1753 || GET_MODE (SET_SRC (elt
)) != SImode
1754 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
1755 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
1756 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
1757 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
1764 /* Similar, but tests for store multiple. Here, the second vector element
1765 is a CLOBBER. It will be tested later. */
1768 store_multiple_operation (op
, mode
)
1770 enum machine_mode mode
;
1772 int count
= XVECLEN (op
, 0) - 1;
1777 /* Perform a quick check so we don't blow up below. */
1779 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1780 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
1781 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
1784 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
1785 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
1787 for (i
= 1; i
< count
; i
++)
1789 rtx elt
= XVECEXP (op
, 0, i
+ 1);
1791 if (GET_CODE (elt
) != SET
1792 || GET_CODE (SET_SRC (elt
)) != REG
1793 || GET_MODE (SET_SRC (elt
)) != SImode
1794 || REGNO (SET_SRC (elt
)) != src_regno
+ i
1795 || GET_CODE (SET_DEST (elt
)) != MEM
1796 || GET_MODE (SET_DEST (elt
)) != SImode
1797 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
1798 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
1799 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
1800 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
1807 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1808 We only check the opcode against the mode of the CC value here. */
1811 branch_comparison_operator (op
, mode
)
1813 enum machine_mode mode
;
1815 enum rtx_code code
= GET_CODE (op
);
1816 enum machine_mode cc_mode
;
1818 if (GET_RTX_CLASS (code
) != '<')
1821 cc_mode
= GET_MODE (XEXP (op
, 0));
1822 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1825 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1826 && cc_mode
== CCUNSmode
)
1829 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1830 && (cc_mode
!= CCUNSmode
))
1836 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1837 We check the opcode against the mode of the CC value and disallow EQ or
1838 NE comparisons for integers. */
1841 scc_comparison_operator (op
, mode
)
1843 enum machine_mode mode
;
1845 enum rtx_code code
= GET_CODE (op
);
1846 enum machine_mode cc_mode
;
1848 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1851 if (GET_RTX_CLASS (code
) != '<')
1854 cc_mode
= GET_MODE (XEXP (op
, 0));
1855 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1858 if (code
== NE
&& cc_mode
!= CCFPmode
)
1861 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1862 && cc_mode
== CCUNSmode
)
1865 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1866 && (cc_mode
!= CCUNSmode
))
1869 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
1875 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1876 mask required to convert the result of a rotate insn into a shift
1877 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1880 includes_lshift_p (shiftop
, andop
)
1881 register rtx shiftop
;
1884 int shift_mask
= (~0 << INTVAL (shiftop
));
1886 return (INTVAL (andop
) & ~shift_mask
) == 0;
1889 /* Similar, but for right shift. */
1892 includes_rshift_p (shiftop
, andop
)
1893 register rtx shiftop
;
1896 unsigned shift_mask
= ~(unsigned)0;
1898 shift_mask
>>= INTVAL (shiftop
);
1900 return (INTVAL (andop
) & ~ shift_mask
) == 0;
1903 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1904 for lfq and stfq insns.
1906 Note reg1 and reg2 *must* be hard registers. To be sure we will
1907 abort if we are passed pseudo registers. */
1910 registers_ok_for_quad_peep (reg1
, reg2
)
1913 /* We might have been passed a SUBREG. */
1914 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
1917 return (REGNO (reg1
) == REGNO (reg2
) - 1);
1920 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1921 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1924 addrs_ok_for_quad_peep (addr1
, addr2
)
1931 /* Extract an offset (if used) from the first addr. */
1932 if (GET_CODE (addr1
) == PLUS
)
1934 /* If not a REG, return zero. */
1935 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
1939 reg1
= REGNO (XEXP (addr1
, 0));
1940 /* The offset must be constant! */
1941 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
1943 offset1
= INTVAL (XEXP (addr1
, 1));
1946 else if (GET_CODE (addr1
) != REG
)
1950 reg1
= REGNO (addr1
);
1951 /* This was a simple (mem (reg)) expression. Offset is 0. */
1955 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1956 if (GET_CODE (addr2
) != PLUS
)
1959 if (GET_CODE (XEXP (addr2
, 0)) != REG
1960 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
1963 if (reg1
!= REGNO (XEXP (addr2
, 0)))
1966 /* The offset for the second addr must be 8 more than the first addr. */
1967 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
1970 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1975 /* Return the register class of a scratch register needed to copy IN into
1976 or out of a register in CLASS in MODE. If it can be done directly,
1977 NO_REGS is returned. */
1980 secondary_reload_class (class, mode
, in
)
1981 enum reg_class
class;
1982 enum machine_mode mode
;
1985 int regno
= true_regnum (in
);
1987 if (regno
>= FIRST_PSEUDO_REGISTER
)
1990 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1992 if (class == GENERAL_REGS
|| class == BASE_REGS
1993 || (regno
>= 0 && INT_REGNO_P (regno
)))
1996 /* Constants, memory, and FP registers can go into FP registers. */
1997 if ((regno
== -1 || FP_REGNO_P (regno
))
1998 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
2001 /* We can copy among the CR registers. */
2002 if ((class == CR_REGS
|| class == CR0_REGS
)
2003 && regno
>= 0 && CR_REGNO_P (regno
))
2006 /* Otherwise, we need GENERAL_REGS. */
2007 return GENERAL_REGS
;
2010 /* Given a comparison operation, return the bit number in CCR to test. We
2011 know this is a valid comparison.
2013 SCC_P is 1 if this is for an scc. That means that %D will have been
2014 used instead of %C, so the bits will be in different places.
2016 Return -1 if OP isn't a valid comparison for some reason. */
2023 enum rtx_code code
= GET_CODE (op
);
2024 enum machine_mode cc_mode
;
2028 if (GET_RTX_CLASS (code
) != '<')
2031 cc_mode
= GET_MODE (XEXP (op
, 0));
2032 cc_regnum
= REGNO (XEXP (op
, 0));
2033 base_bit
= 4 * (cc_regnum
- 68);
2035 /* In CCEQmode cases we have made sure that the result is always in the
2036 third bit of the CR field. */
2038 if (cc_mode
== CCEQmode
)
2039 return base_bit
+ 3;
2044 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
2046 return base_bit
+ 2;
2048 return base_bit
+ 1;
2053 /* If floating-point, we will have done a cror to put the bit in the
2054 unordered position. So test that bit. For integer, this is ! LT
2055 unless this is an scc insn. */
2056 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
2059 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
2066 /* Return the GOT register, creating it if needed. */
2069 rs6000_got_register (value
)
2072 if (!current_function_uses_pic_offset_table
|| !pic_offset_table_rtx
)
2074 if (reload_in_progress
|| reload_completed
)
2075 fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value
);
2077 current_function_uses_pic_offset_table
= 1;
2078 pic_offset_table_rtx
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2081 return pic_offset_table_rtx
;
2085 /* Replace all occurances of register FROM with an new pseduo register in an insn X.
2086 Store the pseudo register used in REG.
2087 This is only safe during FINALIZE_PIC, since the registers haven't been setup
2091 rs6000_replace_regno (x
, from
, reg
)
2099 /* Allow this function to make replacements in EXPR_LISTs. */
2103 switch (GET_CODE (x
))
2116 if (REGNO (x
) == from
)
2119 *reg
= pic_offset_table_rtx
= gen_reg_rtx (Pmode
);
2127 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2128 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2131 XEXP (x
, i
) = rs6000_replace_regno (XEXP (x
, i
), from
, reg
);
2132 else if (fmt
[i
] == 'E')
2133 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2134 XVECEXP (x
, i
, j
) = rs6000_replace_regno (XVECEXP (x
, i
, j
), from
, reg
);
2141 /* By generating position-independent code, when two different
2142 programs (A and B) share a common library (libC.a), the text of
2143 the library can be shared whether or not the library is linked at
2144 the same address for both programs. In some of these
2145 environments, position-independent code requires not only the use
2146 of different addressing modes, but also special code to enable the
2147 use of these addressing modes.
2149 The `FINALIZE_PIC' macro serves as a hook to emit these special
2150 codes once the function is being compiled into assembly code, but
2151 not before. (It is not done before, because in the case of
2152 compiling an inline function, it would lead to multiple PIC
2153 prologues being included in functions which used inline functions
2154 and were compiled to assembly language.) */
2157 rs6000_finalize_pic ()
2159 /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM
2160 with an appropriate pseduo register. If we find we need GOT/TOC,
2161 add the appropriate init code. */
2162 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2164 rtx insn
= get_insns ();
2168 if (GET_CODE (insn
) == NOTE
)
2169 insn
= next_nonnote_insn (insn
);
2172 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2174 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2176 PATTERN (insn
) = rs6000_replace_regno (PATTERN (insn
),
2180 if (REG_NOTES (insn
))
2181 REG_NOTES (insn
) = rs6000_replace_regno (REG_NOTES (insn
),
2189 rtx init
= gen_init_v4_pic (reg
);
2190 emit_insn_before (init
, first_insn
);
2196 /* Search for any occurrance of the GOT_TOC register marker that should
2197 have been eliminated, but may have crept back in. */
2203 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2205 rtx got_reg
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2206 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2207 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2208 && reg_mentioned_p (got_reg
, PATTERN (insn
)))
2209 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn
));
2214 /* Define the structure for the machine field in struct function. */
2215 struct machine_function
2223 /* Functions to save and restore rs6000_fpmem_size.
2224 These will be called, via pointer variables,
2225 from push_function_context and pop_function_context. */
2228 rs6000_save_machine_status (p
)
2231 struct machine_function
*machine
=
2232 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
2234 p
->machine
= machine
;
2235 machine
->sysv_varargs_p
= rs6000_sysv_varargs_p
;
2236 machine
->fpmem_size
= rs6000_fpmem_size
;
2237 machine
->fpmem_offset
= rs6000_fpmem_offset
;
2241 rs6000_restore_machine_status (p
)
2244 struct machine_function
*machine
= p
->machine
;
2246 rs6000_sysv_varargs_p
= machine
->sysv_varargs_p
;
2247 rs6000_fpmem_size
= machine
->fpmem_size
;
2248 rs6000_fpmem_offset
= machine
->fpmem_offset
;
2251 p
->machine
= (struct machine_function
*)0;
2254 /* Do anything needed before RTL is emitted for each function. */
2257 rs6000_init_expanders ()
2259 /* Reset varargs and save TOC indicator */
2260 rs6000_sysv_varargs_p
= 0;
2261 rs6000_fpmem_size
= 0;
2262 rs6000_fpmem_offset
= 0;
2263 pic_offset_table_rtx
= (rtx
)0;
2265 /* Arrange to save and restore machine status around nested functions. */
2266 save_machine_status
= rs6000_save_machine_status
;
2267 restore_machine_status
= rs6000_restore_machine_status
;
2271 /* Print an operand. Recognize special options, documented below. */
2274 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2276 #define SMALL_DATA_RELOC "sda21"
2280 print_operand (file
, x
, code
)
2288 /* These macros test for integers and extract the low-order bits. */
2290 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2291 && GET_MODE (X) == VOIDmode)
2293 #define INT_LOWPART(X) \
2294 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2299 /* Write out an instruction after the call which may be replaced
2300 with glue code by the loader. This depends on the AIX version. */
2301 asm_fprintf (file
, RS6000_CALL_GLUE
);
2305 /* Write the register number of the TOC register. */
2306 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2], file
);
2310 /* Write out either a '.' or '$' for the current location, depending
2311 on whether this is Solaris or not. */
2312 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
2316 /* If X is a constant integer whose low-order 5 bits are zero,
2317 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2318 in the AIX assembler where "sri" with a zero shift count
2319 write a trash instruction. */
2320 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
2327 /* Low-order 16 bits of constant, unsigned. */
2329 output_operand_lossage ("invalid %%b value");
2331 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2335 /* This is an optional cror needed for LE or GE floating-point
2336 comparisons. Otherwise write nothing. */
2337 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
2338 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
2340 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2342 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2343 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
2348 /* Similar, except that this is for an scc, so we must be able to
2349 encode the test in a single bit that is one. We do the above
2350 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2351 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
2352 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
2354 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2356 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2358 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
2361 else if (GET_CODE (x
) == NE
)
2363 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2365 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
2366 base_bit
+ 2, base_bit
+ 2);
2371 /* X is a CR register. Print the number of the third bit of the CR */
2372 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2373 output_operand_lossage ("invalid %%E value");
2375 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
2379 /* X is a CR register. Print the shift count needed to move it
2380 to the high-order four bits. */
2381 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2382 output_operand_lossage ("invalid %%f value");
2384 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
2388 /* Similar, but print the count for the rotate in the opposite
2390 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2391 output_operand_lossage ("invalid %%F value");
2393 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
2397 /* X is a constant integer. If it is negative, print "m",
2398 otherwise print "z". This is to make a aze or ame insn. */
2399 if (GET_CODE (x
) != CONST_INT
)
2400 output_operand_lossage ("invalid %%G value");
2401 else if (INTVAL (x
) >= 0)
2408 /* If constant, output low-order five bits. Otherwise,
2411 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
2413 print_operand (file
, x
, 0);
2417 /* If constant, output low-order six bits. Otherwise,
2420 fprintf (file
, "%d", INT_LOWPART (x
) & 63);
2422 print_operand (file
, x
, 0);
2426 /* Print `i' if this is a constant, else nothing. */
2432 /* Write the bit number in CCR for jump. */
2435 output_operand_lossage ("invalid %%j code");
2437 fprintf (file
, "%d", i
);
2441 /* Similar, but add one for shift count in rlinm for scc and pass
2442 scc flag to `ccr_bit'. */
2445 output_operand_lossage ("invalid %%J code");
2447 /* If we want bit 31, write a shift count of zero, not 32. */
2448 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2452 /* X must be a constant. Write the 1's complement of the
2455 output_operand_lossage ("invalid %%k value");
2457 fprintf (file
, "%d", ~ INT_LOWPART (x
));
2461 /* Write second word of DImode or DFmode reference. Works on register
2462 or non-indexed memory only. */
2463 if (GET_CODE (x
) == REG
)
2464 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
2465 else if (GET_CODE (x
) == MEM
)
2467 /* Handle possible auto-increment. Since it is pre-increment and
2468 we have already done it, we can just use an offset of four. */
2469 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2470 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2471 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
2473 output_address (plus_constant (XEXP (x
, 0), 4));
2474 if (small_data_operand (x
, GET_MODE (x
)))
2475 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2480 /* MB value for a mask operand. */
2481 if (! mask_operand (x
, VOIDmode
))
2482 output_operand_lossage ("invalid %%m value");
2484 val
= INT_LOWPART (x
);
2486 /* If the high bit is set and the low bit is not, the value is zero.
2487 If the high bit is zero, the value is the first 1 bit we find from
2489 if (val
< 0 && (val
& 1) == 0)
2496 for (i
= 1; i
< 32; i
++)
2497 if ((val
<<= 1) < 0)
2499 fprintf (file
, "%d", i
);
2503 /* Otherwise, look for the first 0 bit from the right. The result is its
2504 number plus 1. We know the low-order bit is one. */
2505 for (i
= 0; i
< 32; i
++)
2506 if (((val
>>= 1) & 1) == 0)
2509 /* If we ended in ...01, I would be 0. The correct value is 31, so
2511 fprintf (file
, "%d", 31 - i
);
2515 /* ME value for a mask operand. */
2516 if (! mask_operand (x
, VOIDmode
))
2517 output_operand_lossage ("invalid %%m value");
2519 val
= INT_LOWPART (x
);
2521 /* If the low bit is set and the high bit is not, the value is 31.
2522 If the low bit is zero, the value is the first 1 bit we find from
2524 if ((val
& 1) && val
>= 0)
2529 else if ((val
& 1) == 0)
2531 for (i
= 0; i
< 32; i
++)
2532 if ((val
>>= 1) & 1)
2535 /* If we had ....10, I would be 0. The result should be
2536 30, so we need 30 - i. */
2537 fprintf (file
, "%d", 30 - i
);
2541 /* Otherwise, look for the first 0 bit from the left. The result is its
2542 number minus 1. We know the high-order bit is one. */
2543 for (i
= 0; i
< 32; i
++)
2544 if ((val
<<= 1) >= 0)
2547 fprintf (file
, "%d", i
);
2551 /* Write the number of elements in the vector times 4. */
2552 if (GET_CODE (x
) != PARALLEL
)
2553 output_operand_lossage ("invalid %%N value");
2555 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
2559 /* Similar, but subtract 1 first. */
2560 if (GET_CODE (x
) != PARALLEL
)
2561 output_operand_lossage ("invalid %%N value");
2563 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
2567 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2569 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
2570 output_operand_lossage ("invalid %%p value");
2572 fprintf (file
, "%d", i
);
2576 /* The operand must be an indirect memory reference. The result
2577 is the register number. */
2578 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
2579 || REGNO (XEXP (x
, 0)) >= 32)
2580 output_operand_lossage ("invalid %%P value");
2582 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
2586 /* X is a CR register. Print the mask for `mtcrf'. */
2587 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2588 output_operand_lossage ("invalid %%R value");
2590 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
2594 /* Low 5 bits of 32 - value */
2596 output_operand_lossage ("invalid %%s value");
2598 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
2602 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2603 All floating-point operations except NE branch true and integer
2604 EQ, LT, GT, LTU and GTU also branch true. */
2605 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2606 output_operand_lossage ("invalid %%t value");
2608 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2609 && GET_CODE (x
) != NE
)
2610 || GET_CODE (x
) == EQ
2611 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2612 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2619 /* Opposite of 't': write 4 if this jump operation will branch if true,
2621 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2622 output_operand_lossage ("invalid %%t value");
2624 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2625 && GET_CODE (x
) != NE
)
2626 || GET_CODE (x
) == EQ
2627 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2628 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2635 /* High-order 16 bits of constant for use in unsigned operand. */
2637 output_operand_lossage ("invalid %%u value");
2639 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
2643 /* High-order 16 bits of constant for use in signed operand. */
2645 output_operand_lossage ("invalid %%v value");
2648 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
2650 /* Solaris assembler doesn't like lis 0,0x80000 */
2651 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
2652 fprintf (file
, "%d", value
| (~0 << 16));
2654 fprintf (file
, "0x%x", value
);
2659 /* Print `u' if this has an auto-increment or auto-decrement. */
2660 if (GET_CODE (x
) == MEM
2661 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
2662 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
2667 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2670 fprintf (file
, "%d",
2671 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
2673 print_operand (file
, x
, 0);
2677 /* If constant, low-order 16 bits of constant, unsigned.
2678 Otherwise, write normally. */
2680 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2682 print_operand (file
, x
, 0);
2686 if (GET_CODE (x
) == MEM
2687 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
2692 /* Like 'L', for third word of TImode */
2693 if (GET_CODE (x
) == REG
)
2694 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
2695 else if (GET_CODE (x
) == MEM
)
2697 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2698 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2699 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
2701 output_address (plus_constant (XEXP (x
, 0), 8));
2702 if (small_data_operand (x
, GET_MODE (x
)))
2703 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2708 /* X is a SYMBOL_REF. Write out the name preceded by a
2709 period and without any trailing data in brackets. Used for function
2710 names. If we are configured for System V (or the embedded ABI) on
2711 the PowerPC, do not emit the period, since those systems do not use
2712 TOCs and the like. */
2713 if (GET_CODE (x
) != SYMBOL_REF
)
2716 if (XSTR (x
, 0)[0] != '.')
2718 switch (DEFAULT_ABI
)
2728 case ABI_AIX_NODESC
:
2737 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
2741 /* Like 'L', for last word of TImode. */
2742 if (GET_CODE (x
) == REG
)
2743 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
2744 else if (GET_CODE (x
) == MEM
)
2746 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2747 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2748 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
2750 output_address (plus_constant (XEXP (x
, 0), 12));
2751 if (small_data_operand (x
, GET_MODE (x
)))
2752 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2757 if (GET_CODE (x
) == REG
)
2758 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
2759 else if (GET_CODE (x
) == MEM
)
2761 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2762 know the width from the mode. */
2763 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
2764 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
2765 REGNO (XEXP (XEXP (x
, 0), 0)));
2766 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2767 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
2768 REGNO (XEXP (XEXP (x
, 0), 0)));
2770 output_address (XEXP (x
, 0));
2773 output_addr_const (file
, x
);
2777 output_operand_lossage ("invalid %%xn code");
2781 /* Print the address of an operand. */
2784 print_operand_address (file
, x
)
2788 if (GET_CODE (x
) == REG
)
2789 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
2790 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
|| GET_CODE (x
) == LABEL_REF
)
2792 output_addr_const (file
, x
);
2793 if (small_data_operand (x
, GET_MODE (x
)))
2794 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2796 #ifdef TARGET_NO_TOC
2797 else if (TARGET_NO_TOC
)
2801 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 ]);
2803 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
2805 if (REGNO (XEXP (x
, 0)) == 0)
2806 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
2807 reg_names
[ REGNO (XEXP (x
, 0)) ]);
2809 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
2810 reg_names
[ REGNO (XEXP (x
, 1)) ]);
2812 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2813 fprintf (file
, "%d(%s)", INTVAL (XEXP (x
, 1)), reg_names
[ REGNO (XEXP (x
, 0)) ]);
2814 else if (TARGET_ELF
&& !TARGET_64BIT
&& GET_CODE (x
) == LO_SUM
2815 && GET_CODE (XEXP (x
, 0)) == REG
&& CONSTANT_P (XEXP (x
, 1)))
2817 output_addr_const (file
, XEXP (x
, 1));
2818 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
2824 /* This page contains routines that are used to determine what the function
2825 prologue and epilogue code will do and write them out. */
2827 /* Return the first fixed-point register that is required to be saved. 32 if
2831 first_reg_to_save ()
2835 /* Find lowest numbered live register. */
2836 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
2837 if (regs_ever_live
[first_reg
])
2840 /* If profiling, then we must save/restore every register that contains
2841 a parameter before/after the .mcount call. Use registers from 30 down
2842 to 23 to do this. Don't use the frame pointer in reg 31.
2844 For now, save enough room for all of the parameter registers. */
2845 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2852 /* Similar, for FP regs. */
2855 first_fp_reg_to_save ()
2859 /* Find lowest numbered live register. */
2860 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
2861 if (regs_ever_live
[first_reg
])
2867 /* Return non-zero if this function makes calls. */
2870 rs6000_makes_calls ()
2874 /* If we are profiling, we will be making a call to mcount. */
2878 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
2879 if (GET_CODE (insn
) == CALL_INSN
)
2886 /* Calculate the stack information for the current function. This is
2887 complicated by having two separate calling sequences, the AIX calling
2888 sequence and the V.4 calling sequence.
2890 AIX stack frames look like:
2892 SP----> +---------------------------------------+
2893 | back chain to caller | 0
2894 +---------------------------------------+
2896 +---------------------------------------+
2898 +---------------------------------------+
2899 | reserved for compilers | 12
2900 +---------------------------------------+
2901 | reserved for binders | 16
2902 +---------------------------------------+
2903 | saved TOC pointer | 20
2904 +---------------------------------------+
2905 | Parameter save area (P) | 24
2906 +---------------------------------------+
2907 | Alloca space (A) | 24+P
2908 +---------------------------------------+
2909 | Local variable space (L) | 24+P+A
2910 +---------------------------------------+
2911 | Float/int conversion temporary (X) | 24+P+A+L
2912 +---------------------------------------+
2913 | Save area for GP registers (G) | 24+P+A+X+L
2914 +---------------------------------------+
2915 | Save area for FP registers (F) | 24+P+A+X+L+G
2916 +---------------------------------------+
2917 old SP->| back chain to caller's caller |
2918 +---------------------------------------+
2920 V.4 stack frames look like:
2922 SP----> +---------------------------------------+
2923 | back chain to caller | 0
2924 +---------------------------------------+
2925 | caller's saved LR | 4
2926 +---------------------------------------+
2927 | Parameter save area (P) | 8
2928 +---------------------------------------+
2929 | Alloca space (A) | 8+P
2930 +---------------------------------------+
2931 | Varargs save area (V) | 8+P+A
2932 +---------------------------------------+
2933 | Local variable space (L) | 8+P+A+V
2934 +---------------------------------------+
2935 | Float/int conversion temporary (X) | 8+P+A+V+L
2936 +---------------------------------------+
2937 | saved CR (C) | 8+P+A+V+L+X
2938 +---------------------------------------+
2939 | Save area for GP registers (G) | 8+P+A+V+L+X+C
2940 +---------------------------------------+
2941 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
2942 +---------------------------------------+
2943 old SP->| back chain to caller's caller |
2944 +---------------------------------------+
2947 A PowerPC Windows/NT frame looks like:
2949 SP----> +---------------------------------------+
2950 | back chain to caller | 0
2951 +---------------------------------------+
2953 +---------------------------------------+
2955 +---------------------------------------+
2957 +---------------------------------------+
2959 +---------------------------------------+
2961 +---------------------------------------+
2962 | Parameter save area (P) | 24
2963 +---------------------------------------+
2964 | Alloca space (A) | 24+P
2965 +---------------------------------------+
2966 | Local variable space (L) | 24+P+A
2967 +---------------------------------------+
2968 | Float/int conversion temporary (X) | 24+P+A+L
2969 +---------------------------------------+
2970 | Save area for FP registers (F) | 24+P+A+L+X
2971 +---------------------------------------+
2972 | Possible alignment area (Y) | 24+P+A+L+X+F
2973 +---------------------------------------+
2974 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
2975 +---------------------------------------+
2976 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
2977 +---------------------------------------+
2978 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
2979 +---------------------------------------+
2980 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
2981 +---------------------------------------+
2982 old SP->| back chain to caller's caller |
2983 +---------------------------------------+
2985 For NT, there is no specific order to save the registers, but in
2986 order to support __builtin_return_address, the save area for the
2987 link register needs to be in a known place, so we use -4 off of the
2988 old SP. To support calls through pointers, we also allocate a
2989 fixed slot to store the TOC, -8 off the old SP. */
2991 #ifndef ABI_STACK_BOUNDARY
2992 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
2996 rs6000_stack_info ()
2998 static rs6000_stack_t info
, zero_info
;
2999 rs6000_stack_t
*info_ptr
= &info
;
3000 int reg_size
= TARGET_64BIT
? 8 : 4;
3001 enum rs6000_abi abi
;
3004 /* Zero all fields portably */
3007 /* Select which calling sequence */
3008 info_ptr
->abi
= abi
= DEFAULT_ABI
;
3010 /* Calculate which registers need to be saved & save area size */
3011 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
3012 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
3014 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
3015 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
3017 /* Does this function call anything? */
3018 info_ptr
->calls_p
= rs6000_makes_calls ();
3020 /* Allocate space to save the toc. */
3023 info_ptr
->toc_save_p
= 1;
3024 info_ptr
->toc_size
= reg_size
;
3027 /* Does this machine need the float/int conversion area? */
3028 info_ptr
->fpmem_p
= regs_ever_live
[FPMEM_REGNUM
];
3030 /* If this is main and we need to call a function to set things up,
3031 save main's arguments around the call. */
3036 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)), "main") == 0)
3038 info_ptr
->main_p
= 1;
3041 info_ptr
->calls_p
= 1;
3043 if (DECL_ARGUMENTS (current_function_decl
))
3048 info_ptr
->main_save_p
= 1;
3049 info_ptr
->main_size
= 0;
3051 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
3052 arg
!= NULL_TREE
&& i
< 8;
3053 (arg
= TREE_CHAIN (arg
)), i
++)
3055 info_ptr
->main_size
+= reg_size
;
3063 /* Determine if we need to save the link register */
3064 if (regs_ever_live
[65] || profile_flag
3065 #ifdef TARGET_RELOCATABLE
3066 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
3068 || (info_ptr
->first_fp_reg_save
!= 64
3069 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
3070 || (abi
== ABI_V4
&& current_function_calls_alloca
)
3071 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
3072 || info_ptr
->calls_p
)
3074 info_ptr
->lr_save_p
= 1;
3075 regs_ever_live
[65] = 1;
3077 info_ptr
->lr_size
= reg_size
;
3080 /* Determine if we need to save the condition code registers */
3081 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
3083 info_ptr
->cr_save_p
= 1;
3084 if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3085 info_ptr
->cr_size
= reg_size
;
3088 /* Determine various sizes */
3089 info_ptr
->reg_size
= reg_size
;
3090 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
3091 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
3092 info_ptr
->vars_size
= ALIGN (get_frame_size (), 8);
3093 info_ptr
->parm_size
= ALIGN (current_function_outgoing_args_size
, 8);
3094 info_ptr
->fpmem_size
= (info_ptr
->fpmem_p
) ? 8 : 0;
3095 info_ptr
->save_size
= ALIGN (info_ptr
->fp_size
3099 + info_ptr
->toc_size
3100 + info_ptr
->main_size
, 8);
3102 total_raw_size
= (info_ptr
->vars_size
3103 + info_ptr
->parm_size
3104 + info_ptr
->fpmem_size
3105 + info_ptr
->save_size
3106 + info_ptr
->varargs_size
3107 + info_ptr
->fixed_size
);
3109 info_ptr
->total_size
= ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
3111 /* Determine if we need to allocate any stack frame.
3112 For AIX We need to push the stack if a frame pointer is needed (because
3113 the stack might be dynamically adjusted), if we are debugging, if the
3114 total stack size is more than 220 bytes, or if we make calls.
3116 For V.4 we don't have the stack cushion that AIX uses, but assume that
3117 the debugger can handle stackless frames. */
3119 if (info_ptr
->calls_p
)
3120 info_ptr
->push_p
= 1;
3122 else if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3123 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
3124 || info_ptr
->lr_save_p
);
3127 info_ptr
->push_p
= (frame_pointer_needed
3128 || write_symbols
!= NO_DEBUG
3129 || info_ptr
->total_size
> 220);
3131 /* Calculate the offsets */
3139 case ABI_AIX_NODESC
:
3140 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3141 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3142 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
3143 info_ptr
->cr_save_offset
= 4;
3144 info_ptr
->lr_save_offset
= 8;
3149 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3150 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3151 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
3152 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
3153 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->main_size
;
3154 info_ptr
->lr_save_offset
= reg_size
;
3158 info_ptr
->lr_save_offset
= -4;
3159 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
3160 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
3161 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
3162 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
3163 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
3164 info_ptr
->fp_save_offset
-= 4;
3166 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
3170 if (info_ptr
->fpmem_p
)
3171 info_ptr
->fpmem_offset
= STARTING_FRAME_OFFSET
- info_ptr
->total_size
+ info_ptr
->vars_size
;
3173 /* Zero offsets if we're not saving those registers */
3174 if (!info_ptr
->fp_size
)
3175 info_ptr
->fp_save_offset
= 0;
3177 if (!info_ptr
->gp_size
)
3178 info_ptr
->gp_save_offset
= 0;
3180 if (!info_ptr
->lr_save_p
)
3181 info_ptr
->lr_save_offset
= 0;
3183 if (!info_ptr
->cr_save_p
)
3184 info_ptr
->cr_save_offset
= 0;
3186 if (!info_ptr
->toc_save_p
)
3187 info_ptr
->toc_save_offset
= 0;
3189 if (!info_ptr
->main_save_p
)
3190 info_ptr
->main_save_offset
= 0;
3192 if (!info_ptr
->fpmem_p
)
3193 info_ptr
->fpmem_offset
= 0;
3196 rs6000_fpmem_size
= info_ptr
->fpmem_size
;
3197 rs6000_fpmem_offset
= info_ptr
->total_size
+ info_ptr
->fpmem_offset
;
3204 debug_stack_info (info
)
3205 rs6000_stack_t
*info
;
3210 info
= rs6000_stack_info ();
3212 fprintf (stderr
, "\nStack information for function %s:\n",
3213 ((current_function_decl
&& DECL_NAME (current_function_decl
))
3214 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
3219 default: abi_string
= "Unknown"; break;
3220 case ABI_NONE
: abi_string
= "NONE"; break;
3221 case ABI_AIX
: abi_string
= "AIX"; break;
3222 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
3223 case ABI_V4
: abi_string
= "V.4"; break;
3224 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
3225 case ABI_NT
: abi_string
= "NT"; break;
3228 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
3230 if (info
->first_gp_reg_save
!= 32)
3231 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
3233 if (info
->first_fp_reg_save
!= 64)
3234 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
3236 if (info
->lr_save_p
)
3237 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
3239 if (info
->cr_save_p
)
3240 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
3242 if (info
->toc_save_p
)
3243 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
3246 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
3249 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
3252 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
3254 if (info
->main_save_p
)
3255 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
3258 fprintf (stderr
, "\tfpmem_p = %5d\n", info
->fpmem_p
);
3260 if (info
->gp_save_offset
)
3261 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
3263 if (info
->fp_save_offset
)
3264 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
3266 if (info
->lr_save_offset
)
3267 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
3269 if (info
->cr_save_offset
)
3270 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
3272 if (info
->toc_save_offset
)
3273 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
3275 if (info
->varargs_save_offset
)
3276 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
3278 if (info
->main_save_offset
)
3279 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
3281 if (info
->fpmem_offset
)
3282 fprintf (stderr
, "\tfpmem_offset = %5d\n", info
->fpmem_offset
);
3284 if (info
->total_size
)
3285 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
3287 if (info
->varargs_size
)
3288 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
3290 if (info
->vars_size
)
3291 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
3293 if (info
->parm_size
)
3294 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
3296 if (info
->fpmem_size
)
3297 fprintf (stderr
, "\tfpmem_size = %5d\n", info
->fpmem_size
);
3299 if (info
->fixed_size
)
3300 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
3303 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
3306 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
3309 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
3312 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
3315 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
3317 if (info
->main_size
)
3318 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
3320 if (info
->save_size
)
3321 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
3323 if (info
->reg_size
!= 4)
3324 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
3326 fprintf (stderr
, "\n");
3330 /* Write function prologue. */
3332 output_prolog (file
, size
)
3336 rs6000_stack_t
*info
= rs6000_stack_info ();
3337 int reg_size
= info
->reg_size
;
3345 store_reg
= "\t{st|stw} %s,%d(%s)\n";
3346 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
3350 store_reg
= "\tstd %s,%d(%s)\n";
3351 load_reg
= "\tlld %s,%d(%s)\n";
3354 if (TARGET_DEBUG_STACK
)
3355 debug_stack_info (info
);
3357 /* Write .extern for any function we will call to save and restore fp
3359 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3360 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3361 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
3362 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3364 /* Write .extern for truncation routines, if needed. */
3365 if (rs6000_trunc_used
&& ! trunc_defined
)
3367 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
3368 RS6000_ITRUNC
, RS6000_UITRUNC
);
3372 /* Write .extern for AIX common mode routines, if needed. */
3373 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
3375 fputs ("\t.extern __mulh\n", file
);
3376 fputs ("\t.extern __mull\n", file
);
3377 fputs ("\t.extern __divss\n", file
);
3378 fputs ("\t.extern __divus\n", file
);
3379 fputs ("\t.extern __quoss\n", file
);
3380 fputs ("\t.extern __quous\n", file
);
3381 common_mode_defined
= 1;
3384 /* For V.4, update stack before we do any saving and set back pointer. */
3385 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
3387 if (info
->total_size
< 32767)
3390 (TARGET_32BIT
) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3391 reg_names
[1], - info
->total_size
, reg_names
[1]);
3392 sp_offset
= info
->total_size
;
3396 int neg_size
= - info
->total_size
;
3398 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3399 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3400 reg_names
[0], (neg_size
>> 16) & 0xffff,
3401 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3403 (TARGET_32BIT
) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3404 reg_names
[1], reg_names
[1], reg_names
[0]);
3408 /* If we use the link register, get it into r0. */
3409 if (info
->lr_save_p
)
3410 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
3412 /* If we need to save CR, put it into r12. */
3413 if (info
->cr_save_p
&& sp_reg
!= 12)
3414 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
3416 /* Do any required saving of fpr's. If only one or two to save, do it
3417 ourself. Otherwise, call function. Note that since they are statically
3418 linked, we do not need a nop following them. */
3419 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3421 int regno
= info
->first_fp_reg_save
;
3422 int loc
= info
->fp_save_offset
+ sp_offset
;
3424 for ( ; regno
< 64; regno
++, loc
+= 8)
3425 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3427 else if (info
->first_fp_reg_save
!= 64)
3428 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
3429 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
3431 /* Now save gpr's. */
3432 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3434 int regno
= info
->first_gp_reg_save
;
3435 int loc
= info
->gp_save_offset
+ sp_offset
;
3437 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3438 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3441 else if (info
->first_gp_reg_save
!= 32)
3442 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
3443 reg_names
[info
->first_gp_reg_save
],
3444 info
->gp_save_offset
+ sp_offset
,
3447 /* Save main's arguments if we need to call a function */
3449 if (info
->main_save_p
)
3452 int loc
= info
->main_save_offset
+ sp_offset
;
3453 int size
= info
->main_size
;
3455 for (regno
= 3; size
> 0; regno
++, loc
-= reg_size
, size
-= reg_size
)
3456 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3460 /* Save lr if we used it. */
3461 if (info
->lr_save_p
)
3462 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
,
3465 /* Save CR if we use any that must be preserved. */
3466 if (info
->cr_save_p
)
3468 if (sp_reg
== 12) /* If r12 is used to hold the original sp, copy cr now */
3470 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[0]);
3471 asm_fprintf (file
, store_reg
, reg_names
[0],
3472 info
->cr_save_offset
+ sp_offset
,
3476 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
,
3480 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3482 if (DEFAULT_ABI
== ABI_NT
&& info
->total_size
> 4096)
3484 if (info
->total_size
< 32768)
3486 int probe_offset
= 4096;
3487 while (probe_offset
< info
->total_size
)
3489 asm_fprintf (file
, "\t{l|lwz} %s,%d(%s)\n", reg_names
[0], -probe_offset
, reg_names
[1]);
3490 probe_offset
+= 4096;
3495 int probe_iterations
= info
->total_size
/ 4096;
3496 static int probe_labelno
= 0;
3499 if (probe_iterations
< 32768)
3500 asm_fprintf (file
, "\tli %s,%d\n", reg_names
[12], probe_iterations
);
3503 asm_fprintf (file
, "\tlis %s,%d\n", reg_names
[12], probe_iterations
>> 16);
3504 if (probe_iterations
& 0xffff)
3505 asm_fprintf (file
, "\tori %s,%s,%d\n", reg_names
[12], reg_names
[12],
3506 probe_iterations
& 0xffff);
3508 asm_fprintf (file
, "\tmtctr %s\n", reg_names
[12]);
3509 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3510 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCprobe", probe_labelno
);
3511 asm_fprintf (file
, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names
[0], reg_names
[12]);
3512 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCprobe", probe_labelno
++);
3513 fputs ("\tbdnz ", file
);
3514 assemble_name (file
, buf
);
3519 /* Update stack and set back pointer and we have already done so for V.4. */
3520 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
3522 if (info
->total_size
< 32767)
3524 (TARGET_32BIT
) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3525 reg_names
[1], - info
->total_size
, reg_names
[1]);
3528 int neg_size
= - info
->total_size
;
3529 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3530 reg_names
[0], (neg_size
>> 16) & 0xffff,
3531 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3533 (TARGET_32BIT
) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3534 reg_names
[1], reg_names
[1], reg_names
[0]);
3538 /* Set frame pointer, if needed. */
3539 if (frame_pointer_needed
)
3540 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
3543 /* If we need to call a function to set things up for main, do so now
3544 before dealing with the TOC. */
3549 switch (DEFAULT_ABI
)
3551 case ABI_AIX
: prefix
= "."; break;
3552 case ABI_NT
: prefix
= ".."; break;
3555 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
3556 #ifdef RS6000_CALL_GLUE2
3557 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
3559 #ifdef RS6000_CALL_GLUE
3560 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
3561 fprintf (file
, "\t%s\n", RS6000_CALL_GLUE
);
3565 if (info
->main_save_p
)
3569 int size
= info
->main_size
;
3571 if (info
->total_size
< 32767)
3573 loc
= info
->total_size
+ info
->main_save_offset
;
3574 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3575 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3579 int neg_size
= info
->main_save_offset
- info
->total_size
;
3581 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3582 reg_names
[0], (neg_size
>> 16) & 0xffff,
3583 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3585 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
3588 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3589 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
3596 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3597 TOC_TABLE address into register 30. */
3598 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
3602 #ifdef TARGET_RELOCATABLE
3603 if (TARGET_RELOCATABLE
)
3605 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3606 fputs ("\tbl ", file
);
3607 assemble_name (file
, buf
);
3610 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
3611 fprintf (file
, "\tmflr %s\n", reg_names
[30]);
3613 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz}" : "\tld");
3614 fprintf (file
, " %s,(", reg_names
[0]);
3615 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
3616 assemble_name (file
, buf
);
3618 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3619 assemble_name (file
, buf
);
3620 fprintf (file
, ")(%s)\n", reg_names
[30]);
3621 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
3622 reg_names
[30], reg_names
[0], reg_names
[30]);
3623 rs6000_pic_labelno
++;
3628 switch (DEFAULT_ABI
)
3632 case ABI_AIX_NODESC
:
3635 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3636 asm_fprintf (file
, "\t{cau|addis} %s,%s,", reg_names
[30], reg_names
[0]);
3637 assemble_name (file
, buf
);
3638 asm_fprintf (file
, "@ha\n");
3639 if (TARGET_NEW_MNEMONICS
)
3641 asm_fprintf (file
, "\taddi %s,%s,", reg_names
[30], reg_names
[30]);
3642 assemble_name (file
, buf
);
3643 asm_fprintf (file
, "@l\n");
3647 asm_fprintf (file
, "\tcal %s,", reg_names
[30]);
3648 assemble_name (file
, buf
);
3649 asm_fprintf (file
, "@l(%s)\n", reg_names
[30]);
3659 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
3660 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[30]);
3661 assemble_name (file
, buf
);
3662 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
3667 if (DEFAULT_ABI
== ABI_NT
)
3669 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3670 fputs (".b:\n", file
);
3674 /* Write function epilogue. */
3677 output_epilog (file
, size
)
3681 rs6000_stack_t
*info
= rs6000_stack_info ();
3682 char *load_reg
= (TARGET_32BIT
) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3683 rtx insn
= get_last_insn ();
3688 /* If the last insn was a BARRIER, we don't have to write anything except
3690 if (GET_CODE (insn
) == NOTE
)
3691 insn
= prev_nonnote_insn (insn
);
3692 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
3694 /* If we have a frame pointer, a call to alloca, or a large stack
3695 frame, restore the old stack pointer using the backchain. Otherwise,
3696 we know what size to update it with. */
3697 if (frame_pointer_needed
|| current_function_calls_alloca
3698 || info
->total_size
> 32767)
3700 /* Under V.4, don't reset the stack pointer until after we're done
3701 loading the saved registers. */
3702 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3705 asm_fprintf (file
, load_reg
, reg_names
[sp_reg
], 0, reg_names
[1]);
3707 else if (info
->push_p
)
3709 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3710 sp_offset
= info
->total_size
;
3711 else if (TARGET_NEW_MNEMONICS
)
3712 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], info
->total_size
);
3714 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], info
->total_size
, reg_names
[1]);
3717 /* Get the old lr if we saved it. */
3718 if (info
->lr_save_p
)
3719 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3721 /* Get the old cr if we saved it. */
3722 if (info
->cr_save_p
)
3723 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3725 /* Set LR here to try to overlap restores below. */
3726 if (info
->lr_save_p
)
3727 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
3729 /* Restore gpr's. */
3730 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3732 int regno
= info
->first_gp_reg_save
;
3733 int loc
= info
->gp_save_offset
+ sp_offset
;
3734 int reg_size
= (TARGET_32BIT
) ? 4 : 8;
3736 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3737 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3740 else if (info
->first_gp_reg_save
!= 32)
3741 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
3742 reg_names
[info
->first_gp_reg_save
],
3743 info
->gp_save_offset
+ sp_offset
,
3746 /* Restore fpr's if we can do it without calling a function. */
3747 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3749 int regno
= info
->first_fp_reg_save
;
3750 int loc
= info
->fp_save_offset
+ sp_offset
;
3752 for ( ; regno
< 64; regno
++, loc
+= 8)
3753 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3756 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3758 if (info
->cr_save_p
)
3759 asm_fprintf (file
, "\tmtcrf %d,%s\n",
3760 (regs_ever_live
[70] != 0) * 0x20
3761 + (regs_ever_live
[71] != 0) * 0x10
3762 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
3764 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3767 if (TARGET_NEW_MNEMONICS
)
3768 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], sp_offset
);
3770 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], sp_offset
, reg_names
[1]);
3772 else if (sp_reg
!= 1)
3773 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[1], reg_names
[sp_reg
]);
3775 /* If we have to restore more than two FP registers, branch to the
3776 restore function. It will return to our caller. */
3777 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3778 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
3779 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3781 asm_fprintf (file
, "\t{br|blr}\n");
3784 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3787 We don't output a traceback table if -finhibit-size-directive was
3788 used. The documentation for -finhibit-size-directive reads
3789 ``don't output a @code{.size} assembler directive, or anything
3790 else that would cause trouble if the function is split in the
3791 middle, and the two halves are placed at locations far apart in
3792 memory.'' The traceback table has this property, since it
3793 includes the offset from the start of the function to the
3794 traceback table itself.
3796 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3797 different traceback table. */
3798 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
3800 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3801 int fixed_parms
, float_parms
, parm_info
;
3804 while (*fname
== '.') /* V.4 encodes . in the name */
3807 /* Need label immediately before tbtab, so we can compute its offset
3808 from the function start. */
3811 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3812 ASM_OUTPUT_LABEL (file
, fname
);
3814 /* The .tbtab pseudo-op can only be used for the first eight
3815 expressions, since it can't handle the possibly variable
3816 length fields that follow. However, if you omit the optional
3817 fields, the assembler outputs zeros for all optional fields
3818 anyways, giving each variable length field is minimum length
3819 (as defined in sys/debug.h). Thus we can not use the .tbtab
3820 pseudo-op at all. */
3822 /* An all-zero word flags the start of the tbtab, for debuggers
3823 that have to find it by searching forward from the entry
3824 point or from the current pc. */
3825 fputs ("\t.long 0\n", file
);
3827 /* Tbtab format type. Use format type 0. */
3828 fputs ("\t.byte 0,", file
);
3830 /* Language type. Unfortunately, there doesn't seem to be any
3831 official way to get this info, so we use language_string. C
3832 is 0. C++ is 9. No number defined for Obj-C, so use the
3833 value for C for now. */
3834 if (! strcmp (language_string
, "GNU C")
3835 || ! strcmp (language_string
, "GNU Obj-C"))
3837 else if (! strcmp (language_string
, "GNU F77"))
3839 else if (! strcmp (language_string
, "GNU Ada"))
3841 else if (! strcmp (language_string
, "GNU PASCAL"))
3843 else if (! strcmp (language_string
, "GNU C++"))
3847 fprintf (file
, "%d,", i
);
3849 /* 8 single bit fields: global linkage (not set for C extern linkage,
3850 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3851 from start of procedure stored in tbtab, internal function, function
3852 has controlled storage, function has no toc, function uses fp,
3853 function logs/aborts fp operations. */
3854 /* Assume that fp operations are used if any fp reg must be saved. */
3855 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
3857 /* 6 bitfields: function is interrupt handler, name present in
3858 proc table, function calls alloca, on condition directives
3859 (controls stack walks, 3 bits), saves condition reg, saves
3861 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3862 set up as a frame pointer, even when there is no alloca call. */
3863 fprintf (file
, "%d,",
3864 ((1 << 6) | (frame_pointer_needed
<< 5)
3865 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
3867 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3869 fprintf (file
, "%d,",
3870 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
3872 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3873 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
3876 /* Compute the parameter info from the function decl argument
3879 int next_parm_info_bit
;
3881 next_parm_info_bit
= 31;
3886 for (decl
= DECL_ARGUMENTS (current_function_decl
);
3887 decl
; decl
= TREE_CHAIN (decl
))
3889 rtx parameter
= DECL_INCOMING_RTL (decl
);
3890 enum machine_mode mode
= GET_MODE (parameter
);
3892 if (GET_CODE (parameter
) == REG
)
3894 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3902 else if (mode
== DFmode
)
3907 /* If only one bit will fit, don't or in this entry. */
3908 if (next_parm_info_bit
> 0)
3909 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
3910 next_parm_info_bit
-= 2;
3914 fixed_parms
+= ((GET_MODE_SIZE (mode
)
3915 + (UNITS_PER_WORD
- 1))
3917 next_parm_info_bit
-= 1;
3923 /* Number of fixed point parameters. */
3924 /* This is actually the number of words of fixed point parameters; thus
3925 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3926 fprintf (file
, "%d,", fixed_parms
);
3928 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3930 /* This is actually the number of fp registers that hold parameters;
3931 and thus the maximum value is 13. */
3932 /* Set parameters on stack bit if parameters are not in their original
3933 registers, regardless of whether they are on the stack? Xlc
3934 seems to set the bit when not optimizing. */
3935 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
3937 /* Optional fields follow. Some are variable length. */
3939 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3941 /* There is an entry for each parameter in a register, in the order that
3942 they occur in the parameter list. Any intervening arguments on the
3943 stack are ignored. If the list overflows a long (max possible length
3944 34 bits) then completely leave off all elements that don't fit. */
3945 /* Only emit this long if there was at least one parameter. */
3946 if (fixed_parms
|| float_parms
)
3947 fprintf (file
, "\t.long %d\n", parm_info
);
3949 /* Offset from start of code to tb table. */
3950 fputs ("\t.long ", file
);
3951 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3952 RS6000_OUTPUT_BASENAME (file
, fname
);
3954 RS6000_OUTPUT_BASENAME (file
, fname
);
3957 /* Interrupt handler mask. */
3958 /* Omit this long, since we never set the interrupt handler bit
3961 /* Number of CTL (controlled storage) anchors. */
3962 /* Omit this long, since the has_ctl bit is never set above. */
3964 /* Displacement into stack of each CTL anchor. */
3965 /* Omit this list of longs, because there are no CTL anchors. */
3967 /* Length of function name. */
3968 fprintf (file
, "\t.short %d\n", strlen (fname
));
3970 /* Function name. */
3971 assemble_string (fname
, strlen (fname
));
3973 /* Register for alloca automatic storage; this is always reg 31.
3974 Only emit this if the alloca bit was set above. */
3975 if (frame_pointer_needed
)
3976 fputs ("\t.byte 31\n", file
);
3979 if (DEFAULT_ABI
== ABI_NT
)
3981 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3982 fputs (".e:\nFE_MOT_RESVD..", file
);
3983 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3984 fputs (":\n", file
);
3988 /* Output a TOC entry. We derive the entry name from what is
3992 output_toc (file
, x
, labelno
)
4006 /* if we're going to put a double constant in the TOC, make sure it's
4007 aligned properly when strict alignment is on. */
4008 if (GET_CODE (x
) == CONST_DOUBLE
4010 && GET_MODE (x
) == DFmode
4011 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
4012 ASM_OUTPUT_ALIGN (file
, 3);
4016 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
4018 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
4019 fprintf (file
, "%d = .-", labelno
);
4020 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
4021 fputs ("1\n", file
);
4024 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
4026 /* Handle FP constants specially. Note that if we have a minimal
4027 TOC, things we put here aren't actually in the TOC, so we can allow
4029 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
4030 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4035 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4036 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
4037 if (TARGET_MINIMAL_TOC
)
4038 fprintf (file
, "\t.long %ld\n\t.long %ld\n", k
[0], k
[1]);
4040 fprintf (file
, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
4041 k
[0], k
[1], k
[0], k
[1]);
4044 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
4045 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4050 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4051 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
4053 if (TARGET_MINIMAL_TOC
)
4054 fprintf (file
, "\t.long %d\n", l
);
4056 fprintf (file
, "\t.tc FS_%x[TC],%d\n", l
, l
);
4059 else if (GET_MODE (x
) == DImode
4060 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
4061 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4066 if (GET_CODE (x
) == CONST_DOUBLE
)
4068 low
= CONST_DOUBLE_LOW (x
);
4069 high
= CONST_DOUBLE_HIGH (x
);
4072 #if HOST_BITS_PER_WIDE_INT == 32
4075 high
= (low
< 0) ? ~0 : 0;
4079 low
= INTVAL (x
) & 0xffffffff;
4080 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
4084 if (TARGET_MINIMAL_TOC
)
4085 fprintf (file
, "\t.long %ld\n\t.long %ld\n", high
, low
);
4087 fprintf (file
, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
4088 high
, low
, high
, low
);
4092 if (GET_CODE (x
) == CONST
)
4094 base
= XEXP (XEXP (x
, 0), 0);
4095 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
4098 if (GET_CODE (base
) == SYMBOL_REF
)
4099 name
= XSTR (base
, 0);
4100 else if (GET_CODE (base
) == LABEL_REF
)
4101 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
4102 else if (GET_CODE (base
) == CODE_LABEL
)
4103 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
4107 if (TARGET_MINIMAL_TOC
)
4108 fputs ("\t.long ", file
);
4111 STRIP_NAME_ENCODING (real_name
, name
);
4112 fprintf (file
, "\t.tc %s", real_name
);
4115 fprintf (file
, ".N%d", - offset
);
4117 fprintf (file
, ".P%d", offset
);
4119 fputs ("[TC],", file
);
4122 /* Currently C++ toc references to vtables can be emitted before it
4123 is decided whether the vtable is public or private. If this is
4124 the case, then the linker will eventually complain that there is
4125 a TOC reference to an unknown section. Thus, for vtables only,
4126 we emit the TOC reference to reference the symbol and not the
4128 if (!strncmp ("_vt.", name
, 4))
4130 RS6000_OUTPUT_BASENAME (file
, name
);
4132 fprintf (file
, "%d", offset
);
4133 else if (offset
> 0)
4134 fprintf (file
, "+%d", offset
);
4137 output_addr_const (file
, x
);
4141 /* Output an assembler pseudo-op to write an ASCII string of N characters
4142 starting at P to FILE.
4144 On the RS/6000, we have to do this using the .byte operation and
4145 write out special characters outside the quoted string.
4146 Also, the assembler is broken; very long strings are truncated,
4147 so we must artificially break them up early. */
4150 output_ascii (file
, p
, n
)
4156 int i
, count_string
;
4157 char *for_string
= "\t.byte \"";
4158 char *for_decimal
= "\t.byte ";
4159 char *to_close
= NULL
;
4162 for (i
= 0; i
< n
; i
++)
4165 if (c
>= ' ' && c
< 0177)
4168 fputs (for_string
, file
);
4171 /* Write two quotes to get one. */
4179 for_decimal
= "\"\n\t.byte ";
4183 if (count_string
>= 512)
4185 fputs (to_close
, file
);
4187 for_string
= "\t.byte \"";
4188 for_decimal
= "\t.byte ";
4196 fputs (for_decimal
, file
);
4197 fprintf (file
, "%d", c
);
4199 for_string
= "\n\t.byte \"";
4206 /* Now close the string if we have written one. Then end the line. */
4208 fprintf (file
, to_close
);
4211 /* Generate a unique section name for FILENAME for a section type
4212 represented by SECTION_DESC. Output goes into BUF.
4214 SECTION_DESC can be any string, as long as it is different for each
4215 possible section type.
4217 We name the section in the same manner as xlc. The name begins with an
4218 underscore followed by the filename (after stripping any leading directory
4219 names) with the last period replaced by the string SECTION_DESC. If
4220 FILENAME does not contain a period, SECTION_DESC is appended to the end of
4224 rs6000_gen_section_name (buf
, filename
, section_desc
)
4229 char *q
, *after_last_slash
, *last_period
;
4233 after_last_slash
= filename
;
4234 for (q
= filename
; *q
; q
++)
4237 after_last_slash
= q
+ 1;
4242 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
4243 *buf
= (char *) permalloc (len
);
4248 for (q
= after_last_slash
; *q
; q
++)
4250 if (q
== last_period
)
4252 strcpy (p
, section_desc
);
4253 p
+= strlen (section_desc
);
4256 else if (isalnum (*q
))
4260 if (last_period
== 0)
4261 strcpy (p
, section_desc
);
4266 /* Write function profiler code. */
4269 output_function_profiler (file
, labelno
)
4273 /* The last used parameter register. */
4278 if (DEFAULT_ABI
!= ABI_AIX
)
4281 /* Set up a TOC entry for the profiler label. */
4283 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
4284 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
4285 if (TARGET_MINIMAL_TOC
)
4287 fputs ("\t.long ", file
);
4288 assemble_name (file
, buf
);
4293 fputs ("\t.tc\t", file
);
4294 assemble_name (file
, buf
);
4295 fputs ("[TC],", file
);
4296 assemble_name (file
, buf
);
4301 /* Figure out last used parameter register. The proper thing to do is
4302 to walk incoming args of the function. A function might have live
4303 parameter registers even if it has no incoming args. */
4305 for (last_parm_reg
= 10;
4306 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4310 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
4311 it might be set up as the frame pointer. */
4313 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4314 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
4316 /* Load location address into r3, and call mcount. */
4318 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
4319 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[3]);
4320 assemble_name (file
, buf
);
4321 asm_fprintf (file
, "(%s)\n\tbl .mcount\n", reg_names
[2]);
4323 /* Restore parameter registers. */
4325 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4326 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
4329 /* Adjust the cost of a scheduling dependency. Return the new cost of
4330 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4333 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
4339 if (! recog_memoized (insn
))
4342 if (REG_NOTE_KIND (link
) != 0)
4345 if (REG_NOTE_KIND (link
) == 0)
4347 /* Data dependency; DEP_INSN writes a register that INSN reads some
4350 /* Tell the first scheduling pass about the latency between a mtctr
4351 and bctr (and mtlr and br/blr). The first scheduling pass will not
4352 know about this latency since the mtctr instruction, which has the
4353 latency associated to it, will be generated by reload. */
4354 if (get_attr_type (insn
) == TYPE_JMPREG
)
4355 return TARGET_POWER
? 5 : 4;
4357 /* Fall out to return default cost. */
4363 /* Return how many instructions the machine can issue per cycle */
4364 int get_issue_rate()
4366 switch (rs6000_cpu_attr
) {
4385 /* Output insns to flush the {data|instruction} caches after building a
4389 rs6000_sync_trampoline (addr
)
4392 enum machine_mode pmode
= Pmode
;
4393 rtx reg
= gen_reg_rtx (pmode
);
4396 int size
= rs6000_trampoline_size ();
4397 rtx (*sub_fcn
) PROTO ((rtx
, rtx
, rtx
));
4398 rtx (*cmp_fcn
) PROTO ((rtx
, rtx
));
4403 sub_fcn
= gen_subsi3
;
4404 cmp_fcn
= gen_cmpsi
;
4408 sub_fcn
= gen_subdi3
;
4409 cmp_fcn
= gen_cmpdi
;
4412 addr
= force_reg (pmode
, addr
);
4413 mem2
= gen_rtx (MEM
, pmode
, gen_rtx (PLUS
, pmode
, addr
, reg
));
4414 mem1
= gen_rtx (MEM
, pmode
, addr
);
4416 /* Issue a loop of dcbst's to flush the data cache */
4417 emit_move_insn (reg
, GEN_INT (size
-4));
4418 label
= gen_label_rtx ();
4420 emit_insn (gen_dcbst (mem2
, addr
, reg
));
4421 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
4422 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
4423 emit_jump_insn (gen_bgt (label
));
4425 /* Issue a sync after the dcbst's to let things settle down */
4426 emit_insn (gen_sync (mem1
));
4428 /* Issue a loop of icbi's to flush the instruction cache */
4429 emit_move_insn (reg
, GEN_INT (size
-4));
4430 label
= gen_label_rtx ();
4432 emit_insn (gen_icbi (mem2
, addr
, reg
));
4433 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
4434 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
4435 emit_jump_insn (gen_bgt (label
));
4437 /* Issue a sync after the icbi's to let things settle down */
4438 emit_insn (gen_sync (mem1
));
4440 /* Finally issue an isync to synchronize the icache */
4441 emit_insn (gen_isync (mem1
));
4445 /* Output assembler code for a block containing the constant parts
4446 of a trampoline, leaving space for the variable parts.
4448 The trampoline should set the static chain pointer to value placed
4449 into the trampoline and should branch to the specified routine. */
4452 rs6000_trampoline_template (file
)
4455 char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
4456 char *r0
= reg_names
[0];
4457 char *r2
= reg_names
[2];
4459 switch (DEFAULT_ABI
)
4464 /* Under AIX, this is not code at all, but merely a data area,
4465 since that is the way all functions are called. The first word is
4466 the address of the function, the second word is the TOC pointer (r2),
4467 and the third word is the static chain value. */
4469 fprintf (file
, "\t.long %s\n", (TARGET_32BIT
) ? "0,0,0" : "0,0,0,0,0,0");
4473 /* V.4/eabi function pointers are just a single pointer, so we need to
4474 do the full gory code to load up the static chain. */
4477 case ABI_AIX_NODESC
:
4478 if (STATIC_CHAIN_REGNUM
== 0 || !TARGET_NEW_MNEMONICS
)
4483 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
4484 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
4485 fprintf (file
, "\t.long 0,0\n"); /* offset 8 */
4486 fprintf (file
, ".LTRAMP1:\n");
4487 fprintf (file
, "\tmflr %s\n", sc
); /* offset 20 */
4488 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 24 */
4489 fprintf (file
, "\tlwz %s,0(%s)\n", r0
, sc
); /* offset 28 */
4490 fprintf (file
, "\tlwz %s,4(%s)\n", sc
, sc
); /* offset 32 */
4491 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 36 */
4492 fprintf (file
, "\tbctr\n"); /* offset 40 */
4496 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
4497 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
4498 fprintf (file
, "\t.long 0,0,0,0\n"); /* offset 8 */
4499 fprintf (file
, ".LTRAMP1:\n");
4500 fprintf (file
, "\tmflr %s\n", sc
); /* offset 28 */
4501 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 32 */
4502 fprintf (file
, "\tld %s,0(%s)\n", r0
, sc
); /* offset 36 */
4503 fprintf (file
, "\tld %s,8(%s)\n", sc
, sc
); /* offset 40 */
4504 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 44 */
4505 fprintf (file
, "\tbctr\n"); /* offset 48 */
4509 /* NT function pointers point to a two word area (real address, TOC)
4510 which unfortunately does not include a static chain field. So we
4511 use the function field to point to ..LTRAMP1 and the toc field
4512 to point to the whole table. */
4514 if (STATIC_CHAIN_REGNUM
== 0
4515 || STATIC_CHAIN_REGNUM
== 2
4517 || !TARGET_NEW_MNEMONICS
)
4520 fprintf (file
, "\t.ualong 0\n"); /* offset 0 */
4521 fprintf (file
, "\t.ualong 0\n"); /* offset 4 */
4522 fprintf (file
, "\t.ualong 0\n"); /* offset 8 */
4523 fprintf (file
, "\t.ualong 0\n"); /* offset 12 */
4524 fprintf (file
, "\t.ualong 0\n"); /* offset 16 */
4525 fprintf (file
, "..LTRAMP1..0:\n"); /* offset 20 */
4526 fprintf (file
, "\tlwz %s,8(%s)\n", r0
, r2
); /* offset 24 */
4527 fprintf (file
, "\tlwz %s,12(%s)\n", sc
, r2
); /* offset 28 */
4528 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 32 */
4529 fprintf (file
, "\tlwz %s,16(%s)\n", r2
, r2
); /* offset 36 */
4530 fprintf (file
, "\tbctr\n"); /* offset 40 */
4537 /* Length in units of the trampoline for entering a nested function. */
4540 rs6000_trampoline_size ()
4544 switch (DEFAULT_ABI
)
4550 ret
= (TARGET_32BIT
) ? 12 : 24;
4555 case ABI_AIX_NODESC
:
4556 ret
= (TARGET_32BIT
) ? 40 : 48;
4567 /* Emit RTL insns to initialize the variable parts of a trampoline.
4568 FNADDR is an RTX for the address of the function's pure code.
4569 CXT is an RTX for the static chain value for the function. */
4572 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
4577 enum machine_mode pmode
= Pmode
;
4578 int regsize
= (TARGET_32BIT
) ? 4 : 8;
4579 rtx ctx_reg
= force_reg (pmode
, cxt
);
4581 switch (DEFAULT_ABI
)
4586 /* Macros to shorten the code expansions below. */
4587 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4588 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4590 /* Under AIX, just build the 3 word function descriptor */
4593 rtx fn_reg
= gen_reg_rtx (pmode
);
4594 rtx toc_reg
= gen_reg_rtx (pmode
);
4595 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4596 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
4597 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
4598 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
4599 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
4603 /* Under V.4/eabi, update the two words after the bl to have the real
4604 function address and the static chain. */
4607 case ABI_AIX_NODESC
:
4609 rtx reg
= gen_reg_rtx (pmode
);
4610 emit_move_insn (reg
, fnaddr
);
4611 emit_move_insn (MEM_PLUS (addr
, 8), reg
);
4612 emit_move_insn (MEM_PLUS (addr
, 8 + regsize
), ctx_reg
);
4613 rs6000_sync_trampoline (addr
);
4617 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4618 the second word will point to the whole trampoline, third-fifth words
4619 will then have the real address, static chain, and toc value. */
4622 rtx tramp_reg
= gen_reg_rtx (pmode
);
4623 rtx fn_reg
= gen_reg_rtx (pmode
);
4624 rtx toc_reg
= gen_reg_rtx (pmode
);
4626 emit_move_insn (tramp_reg
, gen_rtx (SYMBOL_REF
, pmode
, "..LTRAMP1..0"));
4627 addr
= force_reg (pmode
, addr
);
4628 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4629 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, regsize
));
4630 emit_move_insn (MEM_DEREF (addr
), tramp_reg
);
4631 emit_move_insn (MEM_PLUS (addr
, regsize
), addr
);
4632 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), fn_reg
);
4633 emit_move_insn (MEM_PLUS (addr
, 3*regsize
), ctx_reg
);
4634 emit_move_insn (MEM_PLUS (addr
, 4*regsize
), gen_rtx (REG
, pmode
, 2));
4643 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4644 with arguments ARGS is a valid machine specific attribute for DECL.
4645 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4648 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
4657 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4658 with arguments ARGS is a valid machine specific attribute for TYPE.
4659 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4662 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
4668 if (TREE_CODE (type
) != FUNCTION_TYPE
4669 && TREE_CODE (type
) != FIELD_DECL
4670 && TREE_CODE (type
) != TYPE_DECL
)
4673 /* Longcall attribute says that the function is not within 2**26 bytes
4674 of the current function, and to do an indirect call. */
4675 if (is_attribute_p ("longcall", identifier
))
4676 return (args
== NULL_TREE
);
4678 if (DEFAULT_ABI
== ABI_NT
)
4680 /* Stdcall attribute says callee is responsible for popping arguments
4681 if they are not variable. */
4682 if (is_attribute_p ("stdcall", identifier
))
4683 return (args
== NULL_TREE
);
4685 /* Cdecl attribute says the callee is a normal C declaration */
4686 if (is_attribute_p ("cdecl", identifier
))
4687 return (args
== NULL_TREE
);
4689 /* Dllimport attribute says says the caller is to call the function
4690 indirectly through a __imp_<name> pointer. */
4691 if (is_attribute_p ("dllimport", identifier
))
4692 return (args
== NULL_TREE
);
4694 /* Dllexport attribute says says the callee is to create a __imp_<name>
4696 if (is_attribute_p ("dllexport", identifier
))
4697 return (args
== NULL_TREE
);
4699 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4700 that will fill in the 3rd and 4th fields of the structured exception
4702 if (is_attribute_p ("exception", identifier
))
4706 if (args
== NULL_TREE
)
4709 for (i
= 0; i
< 2 && args
!= NULL_TREE
; i
++)
4711 tree this_arg
= TREE_VALUE (args
);
4712 args
= TREE_PURPOSE (args
);
4714 if (TREE_CODE (this_arg
) != STRING_CST
4715 && TREE_CODE (this_arg
) != IDENTIFIER_NODE
)
4719 return (args
== NULL_TREE
);
4726 /* If defined, a C expression whose value is zero if the attributes on
4727 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4728 two if they are nearly compatible (which causes a warning to be
4732 rs6000_comp_type_attributes (type1
, type2
)
4739 /* If defined, a C statement that assigns default attributes to newly
4743 rs6000_set_default_type_attributes (type
)
4748 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4750 rs6000_dll_import_ref (call_ref
)
4759 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4762 call_name
= XSTR (call_ref
, 0);
4763 len
= sizeof ("__imp_") + strlen (call_name
);
4765 reg2
= gen_reg_rtx (Pmode
);
4767 strcpy (p
, "__imp_");
4768 strcat (p
, call_name
);
4769 node
= get_identifier (p
);
4771 reg1
= force_reg (Pmode
, gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
)));
4772 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg1
));
4777 /* Return a reference suitable for calling a function with the longcall attribute. */
4779 rs6000_longcall_ref (call_ref
)
4788 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4791 /* System V adds '.' to the internal name, so skip them. */
4792 call_name
= XSTR (call_ref
, 0);
4793 if (*call_name
== '.')
4795 while (*call_name
== '.')
4798 node
= get_identifier (call_name
);
4799 call_ref
= gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
));
4802 return force_reg (Pmode
, call_ref
);
4806 /* A C statement or statements to switch to the appropriate section
4807 for output of RTX in mode MODE. You can assume that RTX is some
4808 kind of constant in RTL. The argument MODE is redundant except in
4809 the case of a `const_int' rtx. Select the section by calling
4810 `text_section' or one of the alternatives for other sections.
4812 Do not define this macro if you put all constants in the read-only
4818 rs6000_select_rtx_section (mode
, x
)
4819 enum machine_mode mode
;
4822 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
))
4828 /* A C statement or statements to switch to the appropriate
4829 section for output of DECL. DECL is either a `VAR_DECL' node
4830 or a constant of some sort. RELOC indicates whether forming
4831 the initial value of DECL requires link-time relocations. */
4834 rs6000_select_section (decl
, reloc
)
4838 int size
= int_size_in_bytes (TREE_TYPE (decl
));
4840 if (TREE_CODE (decl
) == STRING_CST
)
4842 if (! flag_writable_strings
)
4847 else if (TREE_CODE (decl
) == VAR_DECL
)
4849 if ((flag_pic
&& reloc
)
4850 || !TREE_READONLY (decl
)
4851 || TREE_SIDE_EFFECTS (decl
)
4852 || !DECL_INITIAL (decl
)
4853 || (DECL_INITIAL (decl
) != error_mark_node
4854 && !TREE_CONSTANT (DECL_INITIAL (decl
))))
4856 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
4863 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
4865 if (rs6000_sdata
== SDATA_EABI
)
4868 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
4880 /* If we are referencing a function that is static or is known to be
4881 in this file, make the SYMBOL_REF special. We can use this to indicate
4882 that we can branch to this function without emitting a no-op after the
4883 call. For real AIX and NT calling sequences, we also replace the
4884 function name with the real name (1 or 2 leading .'s), rather than
4885 the function descriptor name. This saves a lot of overriding code
4886 to readd the prefixes. */
4889 rs6000_encode_section_info (decl
)
4892 if (TREE_CODE (decl
) == FUNCTION_DECL
)
4894 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
4895 if (TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
4896 SYMBOL_REF_FLAG (sym_ref
) = 1;
4898 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
4900 char *prefix
= (DEFAULT_ABI
== ABI_AIX
) ? "." : "..";
4901 char *str
= permalloc (strlen (prefix
) + 1
4902 + strlen (XSTR (sym_ref
, 0)));
4903 strcpy (str
, prefix
);
4904 strcat (str
, XSTR (sym_ref
, 0));
4905 XSTR (sym_ref
, 0) = str
;
4908 else if (rs6000_sdata
!= SDATA_NONE
4909 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4910 && TREE_CODE (decl
) == VAR_DECL
)
4912 int size
= int_size_in_bytes (TREE_TYPE (decl
));
4913 tree section_name
= DECL_SECTION_NAME (decl
);
4914 char *name
= (char *)0;
4919 if (TREE_CODE (section_name
) == STRING_CST
)
4921 name
= TREE_STRING_POINTER (section_name
);
4922 len
= TREE_STRING_LENGTH (section_name
);
4928 if ((size
> 0 && size
<= g_switch_value
)
4930 && ((len
== sizeof (".sdata")-1 && strcmp (name
, ".sdata") == 0)
4931 || (len
== sizeof (".sdata2")-1 && strcmp (name
, ".sdata2") == 0)
4932 || (len
== sizeof (".sbss")-1 && strcmp (name
, ".sbss") == 0)
4933 || (len
== sizeof (".sbss2")-1 && strcmp (name
, ".sbss2") == 0)
4934 || (len
== sizeof (".PPC.EMB.sdata0")-1 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
4935 || (len
== sizeof (".PPC.EMB.sbss0")-1 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
4937 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
4938 char *str
= permalloc (2 + strlen (XSTR (sym_ref
, 0)));
4940 strcat (str
, XSTR (sym_ref
, 0));
4941 XSTR (sym_ref
, 0) = str
;
4946 #endif /* USING_SVR4_H */
4949 /* CYGNUS LOCAL mac */
4951 /* Whether we are using m68k-compatible alignment. */
4955 /* Most Mac compiler pragmas are unimportant, but we must recognize
4956 the m68k alignment pragma, because that is crucial to transitions
4957 to and from the m68k emulator on PowerMacs. */
4960 handle_mac_pragma (finput
, t
)
4965 register char *pname
;
4969 if (TREE_CODE (t
) != IDENTIFIER_NODE
)
4972 pname
= IDENTIFIER_POINTER (t
);
4973 if (strcmp (pname
, "segment") == 0)
4975 /* (should collect pbuf + 8 into a segment name) */
4977 else if (strcmp (pname
, "options") == 0)
4980 /* Skip over initial whitespace. */
4981 while (c
== ' ' || c
== '\t')
4984 /* Return without doing anything if no content. */
4985 if (c
== '\n' || c
== EOF
)
4991 /* Collect the rest of the line. */
4992 while (psize
< sizeof (pbuf
) - 1 && c
!= '\n')
4998 if (strncmp (pbuf
, "align=mac68k", 12) == 0)
5003 else if (strncmp (pbuf
, "align=power", 11) == 0)
5008 else if (strncmp (pbuf
, "align=reset", 11) == 0)
5017 /* END CYGNUS LOCAL mac */