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[gcc.git] / gcc / config / rx / rx.h
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 { \
29 builtin_define ("__RX610__"); \
30 builtin_assert ("machine=RX610"); \
31 } \
32 else \
33 builtin_assert ("machine=RX600"); \
34 \
35 if (TARGET_BIG_ENDIAN_DATA) \
36 builtin_define ("__RX_BIG_ENDIAN__"); \
37 else \
38 builtin_define ("__RX_LITTLE_ENDIAN__");\
39 \
40 if (TARGET_64BIT_DOUBLES) \
41 builtin_define ("__RX_64BIT_DOUBLES__");\
42 else \
43 builtin_define ("__RX_32BIT_DOUBLES__");\
44 \
45 if (ALLOW_RX_FPU_INSNS) \
46 builtin_define ("__RX_FPU_INSNS__"); \
47 \
48 if (TARGET_AS100_SYNTAX) \
49 builtin_define ("__RX_AS100_SYNTAX__"); \
50 else \
51 builtin_define ("__RX_GAS_SYNTAX__"); \
52 } \
53 while (0)
54
55 #undef CC1_SPEC
56 #define CC1_SPEC "\
57 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
58 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
59
60 #undef STARTFILE_SPEC
61 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
62
63 #undef ENDFILE_SPEC
64 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
65
66 #undef ASM_SPEC
67 #define ASM_SPEC "\
68 %{mbig-endian-data:-mbig-endian-data} \
69 %{m64bit-doubles:-m64bit-doubles} \
70 %{!m64bit-doubles:-m32bit-doubles} \
71 %{msmall-data-limit*:-msmall-data-limit} \
72 %{mrelax:-relax} \
73 "
74
75 #undef LIB_SPEC
76 #define LIB_SPEC " \
77 --start-group \
78 -lc \
79 %{msim:-lsim}%{!msim:-lnosys} \
80 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
81 --end-group \
82 %{!T*: %{msim:%Trx-sim.ld}%{!msim:%Trx.ld}} \
83 "
84
85 #undef LINK_SPEC
86 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
87 \f
88
89 #define BITS_BIG_ENDIAN 0
90 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
91 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
92
93 #define UNITS_PER_WORD 4
94
95 #define INT_TYPE_SIZE 32
96 #define LONG_TYPE_SIZE 32
97 #define LONG_LONG_TYPE_SIZE 64
98
99 #define FLOAT_TYPE_SIZE 32
100 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
101 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
102
103 #ifdef __RX_32BIT_DOUBLES__
104 #define LIBGCC2_HAS_DF_MODE 0
105 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
106 #else
107 #define LIBGCC2_HAS_DF_MODE 1
108 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
109 #endif
110
111 #define DEFAULT_SIGNED_CHAR 0
112
113 #define STRICT_ALIGNMENT 1
114 #define FUNCTION_BOUNDARY 8
115 #define BIGGEST_ALIGNMENT 32
116 #define STACK_BOUNDARY 32
117 #define PARM_BOUNDARY 8
118
119 #define STACK_GROWS_DOWNWARD 1
120 #define FRAME_GROWS_DOWNWARD 0
121 #define FIRST_PARM_OFFSET(FNDECL) 0
122
123 #define MAX_REGS_PER_ADDRESS 2
124
125 #define Pmode SImode
126 #define POINTER_SIZE 32
127 #undef SIZE_TYPE
128 #define SIZE_TYPE "long unsigned int"
129 #undef PTRDIFF_TYPE
130 #define PTRDIFF_TYPE "long int"
131 #undef WCHAR_TYPE
132 #define WCHAR_TYPE "long int"
133 #undef WCHAR_TYPE_SIZE
134 #define WCHAR_TYPE_SIZE BITS_PER_WORD
135 #define POINTERS_EXTEND_UNSIGNED 1
136 #define FUNCTION_MODE QImode
137 #define CASE_VECTOR_MODE Pmode
138 #define WORD_REGISTER_OPERATIONS 1
139 #define HAS_LONG_COND_BRANCH 0
140 #define HAS_LONG_UNCOND_BRANCH 0
141
142 #define MOVE_MAX 4
143 #define STARTING_FRAME_OFFSET 0
144
145 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
146
147 #define HAVE_PRE_DECREMENT 1
148 #define HAVE_POST_INCREMENT 1
149
150 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
151 #define SLOW_BYTE_ACCESS 1
152
153 #define STORE_FLAG_VALUE 1
154 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
155 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
156 \f
157 enum reg_class
158 {
159 NO_REGS, /* No registers in set. */
160 GR_REGS, /* Integer registers. */
161 ALL_REGS, /* All registers. */
162 LIM_REG_CLASSES /* Max value + 1. */
163 };
164
165 #define REG_CLASS_NAMES \
166 { \
167 "NO_REGS", \
168 "GR_REGS", \
169 "ALL_REGS" \
170 }
171
172 #define REG_CLASS_CONTENTS \
173 { \
174 { 0x00000000 }, /* No registers, */ \
175 { 0x0000ffff }, /* Integer registers. */ \
176 { 0x0000ffff } /* All registers. */ \
177 }
178
179 #define SMALL_REGISTER_CLASSES 0
180 #define N_REG_CLASSES (int) LIM_REG_CLASSES
181 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
182 + UNITS_PER_WORD - 1) \
183 / UNITS_PER_WORD)
184
185 #define GENERAL_REGS GR_REGS
186 #define BASE_REG_CLASS GR_REGS
187 #define INDEX_REG_CLASS GR_REGS
188
189 #define FIRST_PSEUDO_REGISTER 17
190
191 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
192 ? GR_REGS : NO_REGS)
193
194 #define STACK_POINTER_REGNUM 0
195 #define FUNC_RETURN_REGNUM 1
196 #define FRAME_POINTER_REGNUM 6
197 #define ARG_POINTER_REGNUM 7
198 #define STATIC_CHAIN_REGNUM 8
199 #define TRAMPOLINE_TEMP_REGNUM 9
200 #define STRUCT_VAL_REGNUM 15
201 #define CC_REGNUM 16
202
203 /* This is the register which is used to hold the address of the start
204 of the small data area, if that feature is being used. Note - this
205 register must not be call_used because otherwise library functions
206 that are compiled without small data support might clobber it.
207
208 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
209 built in copy of this register's name, rather than constructing the
210 name from this #define. */
211 #define GP_BASE_REGNUM 13
212
213 #define ELIMINABLE_REGS \
214 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
215 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
216 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
217
218 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
219 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
220
221
222 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
223 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
224 #define DEFAULT_PCC_STRUCT_RETURN 0
225
226 #define FIXED_REGISTERS \
227 { \
228 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
229 }
230
231 #define CALL_USED_REGISTERS \
232 { \
233 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
234 }
235
236 #define LIBCALL_VALUE(MODE) \
237 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
238 || COMPLEX_MODE_P (MODE) \
239 || GET_MODE_SIZE (MODE) >= 4) \
240 ? (MODE) \
241 : SImode), \
242 FUNC_RETURN_REGNUM)
243
244 /* Order of allocation of registers. */
245
246 #define REG_ALLOC_ORDER \
247 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
248 }
249
250 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
251 (IN_RANGE ((REGNO), (MIN), (MAX)) \
252 || (reg_renumber != NULL \
253 && reg_renumber[(REGNO)] >= (MIN) \
254 && reg_renumber[(REGNO)] <= (MAX)))
255
256 #ifdef REG_OK_STRICT
257 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
258 #else
259 #define REGNO_OK_FOR_BASE_P(regno) 1
260 #endif
261
262 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
263
264 #define RTX_OK_FOR_BASE(X, STRICT) \
265 ((STRICT) ? \
266 ( (REG_P (X) \
267 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
268 || (GET_CODE (X) == SUBREG \
269 && REG_P (SUBREG_REG (X)) \
270 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
271 : \
272 ( (REG_P (X) \
273 || (GET_CODE (X) == SUBREG \
274 && REG_P (SUBREG_REG (X))))))
275 \f
276
277 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
278 ((COUNT) == 0 \
279 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
280 : NULL_RTX)
281
282 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
283
284 #define ACCUMULATE_OUTGOING_ARGS 1
285
286 typedef unsigned int CUMULATIVE_ARGS;
287
288 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
289 (CUM) = 0
290
291 \f
292 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
293 #define TRAMPOLINE_ALIGNMENT 32
294 \f
295 #define NO_PROFILE_COUNTERS 1
296 #define PROFILE_BEFORE_PROLOGUE 1
297
298 #define FUNCTION_PROFILER(FILE, LABELNO) \
299 fprintf (FILE, "\tbsr\t__mcount\n");
300 \f
301
302 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
303
304 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
305 REGNO_REG_CLASS (REGNO) == GR_REGS
306
307 #define MODES_TIEABLE_P(MODE1, MODE2) \
308 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
309 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
310 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
311 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
312 \f
313
314 #define REGISTER_NAMES \
315 { \
316 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
317 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
318 }
319
320 #define ADDITIONAL_REGISTER_NAMES \
321 { \
322 { "sp", STACK_POINTER_REGNUM } \
323 , { "fp", FRAME_POINTER_REGNUM } \
324 , { "arg", ARG_POINTER_REGNUM } \
325 , { "chain", STATIC_CHAIN_REGNUM } \
326 }
327
328 #define DATA_SECTION_ASM_OP \
329 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
330 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
331
332 #define SDATA_SECTION_ASM_OP \
333 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
334 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
335
336 #undef READONLY_DATA_SECTION_ASM_OP
337 #define READONLY_DATA_SECTION_ASM_OP \
338 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
339 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
340
341 #define BSS_SECTION_ASM_OP \
342 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
343 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
344
345 #define SBSS_SECTION_ASM_OP \
346 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
347 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
348
349 /* The following definitions are conditional depending upon whether the
350 compiler is being built or crtstuff.c is being compiled by the built
351 compiler. */
352 #if defined CRT_BEGIN || defined CRT_END
353 # ifdef __RX_AS100_SYNTAX
354 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
355 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
356 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
357 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
358 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
359 # else
360 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
361 # define CTORS_SECTION_ASM_OP \
362 "\t.section\t.init_array,\"aw\",@init_array"
363 # define DTORS_SECTION_ASM_OP \
364 "\t.section\t.fini_array,\"aw\",@fini_array"
365 # define INIT_ARRAY_SECTION_ASM_OP \
366 "\t.section\t.init_array,\"aw\",@init_array"
367 # define FINI_ARRAY_SECTION_ASM_OP \
368 "\t.section\t.fini_array,\"aw\",@fini_array"
369 # endif
370 #else
371 # define TEXT_SECTION_ASM_OP \
372 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
373
374 # define CTORS_SECTION_ASM_OP \
375 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
376 : "\t.section\t.init_array,\"aw\",@init_array")
377
378 # define DTORS_SECTION_ASM_OP \
379 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
380 : "\t.section\t.fini_array,\"aw\",@fini_array")
381
382 # define INIT_ARRAY_SECTION_ASM_OP \
383 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
384 : "\t.section\t.init_array,\"aw\",@init_array")
385
386 # define FINI_ARRAY_SECTION_ASM_OP \
387 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
388 : "\t.section\t.fini_array,\"aw\",@fini_array")
389 #endif
390
391 #define GLOBAL_ASM_OP \
392 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
393 #define ASM_COMMENT_START " ;"
394 #define ASM_APP_ON ""
395 #define ASM_APP_OFF ""
396 #define LOCAL_LABEL_PREFIX "L"
397 #undef USER_LABEL_PREFIX
398 #define USER_LABEL_PREFIX "_"
399
400 /* Compute the alignment needed for label X in various situations.
401 If the user has specified an alignment then honour that, otherwise
402 use rx_align_for_label. */
403 #define JUMP_ALIGN(x) (align_jumps ? align_jumps : rx_align_for_label (x, 0))
404 #define LABEL_ALIGN(x) (align_labels ? align_labels : rx_align_for_label (x, 3))
405 #define LOOP_ALIGN(x) (align_loops ? align_loops : rx_align_for_label (x, 2))
406 #define LABEL_ALIGN_AFTER_BARRIER(x) rx_align_for_label (x, 0)
407
408 #define ASM_OUTPUT_MAX_SKIP_ALIGN(STREAM, LOG, MAX_SKIP) \
409 do \
410 { \
411 if ((LOG) == 0 || (MAX_SKIP) == 0) \
412 break; \
413 if (TARGET_AS100_SYNTAX) \
414 { \
415 if ((LOG) >= 2) \
416 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
417 else \
418 fprintf (STREAM, "\t.ALIGN 2\n"); \
419 } \
420 else \
421 fprintf (STREAM, "\t.balign %d,3,%d\n", 1 << (LOG), (MAX_SKIP)); \
422 } \
423 while (0)
424
425 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
426 do \
427 { \
428 if ((LOG) == 0) \
429 break; \
430 if (TARGET_AS100_SYNTAX) \
431 { \
432 if ((LOG) >= 2) \
433 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
434 else \
435 fprintf (STREAM, "\t.ALIGN 2\n"); \
436 } \
437 else \
438 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
439 } \
440 while (0)
441
442 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
443 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
444 VALUE)
445
446 /* This is how to output an element of a case-vector that is relative.
447 Note: The local label referenced by the "3b" below is emitted by
448 the tablejump insn. */
449
450 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
451 fprintf (FILE, TARGET_AS100_SYNTAX \
452 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
453
454 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
455 do \
456 { \
457 HOST_WIDE_INT size_ = (SIZE); \
458 \
459 /* The as100 assembler does not have an equivalent of the SVR4 \
460 .size pseudo-op. */ \
461 if (TARGET_AS100_SYNTAX) \
462 break; \
463 \
464 fputs (SIZE_ASM_OP, STREAM); \
465 assemble_name (STREAM, NAME); \
466 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
467 } \
468 while (0)
469
470 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
471 do \
472 { \
473 /* The as100 assembler does not have an equivalent of the SVR4 \
474 .size pseudo-op. */ \
475 if (TARGET_AS100_SYNTAX) \
476 break; \
477 fputs (SIZE_ASM_OP, STREAM); \
478 assemble_name (STREAM, NAME); \
479 fputs (", .-", STREAM); \
480 assemble_name (STREAM, NAME); \
481 putc ('\n', STREAM); \
482 } \
483 while (0)
484
485 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
486 do \
487 { \
488 /* The as100 assembler does not have an equivalent of the SVR4 \
489 .size pseudo-op. */ \
490 if (TARGET_AS100_SYNTAX) \
491 break; \
492 fputs (TYPE_ASM_OP, STREAM); \
493 assemble_name (STREAM, NAME); \
494 fputs (", ", STREAM); \
495 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
496 putc ('\n', STREAM); \
497 } \
498 while (0)
499
500 #undef ASM_GENERATE_INTERNAL_LABEL
501 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
502 do \
503 { \
504 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
505 PREFIX, (unsigned) (NUM)); \
506 } \
507 while (0)
508
509 #undef ASM_OUTPUT_EXTERNAL
510 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
511 do \
512 { \
513 if (TARGET_AS100_SYNTAX) \
514 targetm.asm_out.globalize_label (FILE, NAME); \
515 default_elf_asm_output_external (FILE, DECL, NAME); \
516 } \
517 while (0)
518
519 #undef ASM_OUTPUT_ALIGNED_COMMON
520 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
521 do \
522 { \
523 if (TARGET_AS100_SYNTAX) \
524 { \
525 fprintf ((FILE), "\t.GLB\t"); \
526 assemble_name ((FILE), (NAME)); \
527 fprintf ((FILE), "\n"); \
528 assemble_name ((FILE), (NAME)); \
529 switch ((ALIGN) / BITS_PER_UNIT) \
530 { \
531 case 4: \
532 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
533 (SIZE) / 4); \
534 break; \
535 case 2: \
536 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
537 (SIZE) / 2); \
538 break; \
539 default: \
540 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
541 (SIZE)); \
542 break; \
543 } \
544 } \
545 else \
546 { \
547 fprintf ((FILE), "%s", COMMON_ASM_OP); \
548 assemble_name ((FILE), (NAME)); \
549 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
550 (SIZE), (ALIGN) / BITS_PER_UNIT); \
551 } \
552 } \
553 while (0)
554
555 #undef SKIP_ASM_OP
556 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
557
558 #undef ASM_OUTPUT_LIMITED_STRING
559 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
560 do \
561 { \
562 const unsigned char *_limited_str = \
563 (const unsigned char *) (STR); \
564 unsigned ch; \
565 \
566 fprintf ((FILE), TARGET_AS100_SYNTAX \
567 ? "\t.BYTE\t\"" : "\t.string\t\""); \
568 \
569 for (; (ch = *_limited_str); _limited_str++) \
570 { \
571 int escape; \
572 \
573 switch (escape = ESCAPES[ch]) \
574 { \
575 case 0: \
576 putc (ch, (FILE)); \
577 break; \
578 case 1: \
579 fprintf ((FILE), "\\%03o", ch); \
580 break; \
581 default: \
582 putc ('\\', (FILE)); \
583 putc (escape, (FILE)); \
584 break; \
585 } \
586 } \
587 \
588 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
589 } \
590 while (0)
591
592 #undef IDENT_ASM_OP
593 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
594 ? "\t.END\t; Built by: ": "\t.ident\t")
595
596 /* For PIC put jump tables into the text section so that the offsets that
597 they contain are always computed between two same-section symbols. */
598 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
599 \f
600 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
601 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
602
603 /* Like REG_P except that this macro is true for SET expressions. */
604 #define SET_P(rtl) (GET_CODE (rtl) == SET)
605 \f
606 /* The AS100 assembler does not support .leb128 and .uleb128, but
607 the compiler-build-time configure tests will have enabled their
608 use because GAS supports them. So default to generating STABS
609 debug information instead of DWARF2 when generating AS100
610 compatible output. */
611 #undef PREFERRED_DEBUGGING_TYPE
612 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
613 ? DBX_DEBUG : DWARF2_DEBUG)
614
615 #define INCOMING_FRAME_SP_OFFSET 4
616 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
617 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
618 \f
619 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
620
621 /* This macro is used to decide when RX FPU instructions can be used. */
622 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
623
624 #define BRANCH_COST(SPEED,PREDICT) 1
625 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
626
627 #define SELECT_CC_MODE(OP,X,Y) rx_select_cc_mode(OP, X, Y)
628
629 #define ADJUST_INSN_LENGTH(INSN,LENGTH) \
630 do \
631 { \
632 (LENGTH) = rx_adjust_insn_length ((INSN), (LENGTH)); \
633 } \
634 while (0)