gcc/config/s390/s390.h

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
   3    Free Software Foundation, Inc.
   4    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   5                   Ulrich Weigand (uweigand@de.ibm.com).
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify it under
  10 the terms of the GNU General Public License as published by the Free
  11 Software Foundation; either version 2, or (at your option) any later
  12 version.
  13
  14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  17 for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING.  If not, write to the Free
  21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  22 02111-1307, USA.  */
  23
  24 #ifndef _S390_H
  25 #define _S390_H
  26
  27 /* Override the __fixdfdi etc. routines when building libgcc2.
  28    ??? This should be done in a cleaner way ...  */
  29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
  30 #include <config/s390/fixdfdi.h>
  31 #endif
  32
  33 /* Which processor to generate code or schedule for. The cpu attribute
  34    defines a list that mirrors this list, so changes to s390.md must be
  35    made at the same time.  */
  36
  37 enum processor_type
  38 {
  39   PROCESSOR_9672_G5,
  40   PROCESSOR_9672_G6,
  41   PROCESSOR_2064_Z900,
  42   PROCESSOR_2084_Z990,
  43   PROCESSOR_max
  44 };
  45
  46 /* Optional architectural facilities supported by the processor.  */
  47
  48 enum processor_flags
  49 {
  50   PF_IEEE_FLOAT = 1,
  51   PF_ZARCH = 2,
  52   PF_LONG_DISPLACEMENT = 4
  53 };
  54
  55 extern enum processor_type s390_tune;
  56 extern enum processor_flags s390_tune_flags;
  57 extern const char *s390_tune_string;
  58
  59 extern enum processor_type s390_arch;
  60 extern enum processor_flags s390_arch_flags;
  61 extern const char *s390_arch_string;
  62
  63 #define TARGET_CPU_IEEE_FLOAT \
  64         (s390_arch_flags & PF_IEEE_FLOAT)
  65 #define TARGET_CPU_ZARCH \
  66         (s390_arch_flags & PF_ZARCH)
  67 #define TARGET_CPU_LONG_DISPLACEMENT \
  68         (s390_arch_flags & PF_LONG_DISPLACEMENT)
  69
  70 #define TARGET_LONG_DISPLACEMENT \
  71        (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
  72
  73
  74 /* Run-time target specification.  */
  75
  76 /* Target CPU builtins.  */
  77 #define TARGET_CPU_CPP_BUILTINS()                       \
  78   do                                                    \
  79     {                                                   \
  80       builtin_assert ("cpu=s390");                      \
  81       builtin_assert ("machine=s390");                  \
  82       builtin_define ("__s390__");                      \
  83       if (TARGET_64BIT)                                 \
  84         builtin_define ("__s390x__");                   \
  85     }                                                   \
  86   while (0)
  87
  88 /* Optional target features.  */
  89 extern int target_flags;
  90
  91 #define MASK_HARD_FLOAT            0x01
  92 #define MASK_BACKCHAIN             0x02
  93 #define MASK_SMALL_EXEC            0x04
  94 #define MASK_DEBUG_ARG             0x08
  95 #define MASK_64BIT                 0x10
  96 #define MASK_ZARCH                 0x20
  97 #define MASK_MVCLE                 0x40
  98 #define MASK_TPF_PROFILING         0x80
  99 #define MASK_NO_FUSED_MADD         0x100
 100
 101 #define TARGET_HARD_FLOAT          (target_flags & MASK_HARD_FLOAT)
 102 #define TARGET_SOFT_FLOAT          (!(target_flags & MASK_HARD_FLOAT))
 103 #define TARGET_BACKCHAIN           (target_flags & MASK_BACKCHAIN)
 104 #define TARGET_SMALL_EXEC          (target_flags & MASK_SMALL_EXEC)
 105 #define TARGET_DEBUG_ARG           (target_flags & MASK_DEBUG_ARG)
 106 #define TARGET_64BIT               (target_flags & MASK_64BIT)
 107 #define TARGET_ZARCH               (target_flags & MASK_ZARCH)
 108 #define TARGET_MVCLE               (target_flags & MASK_MVCLE)
 109 #define TARGET_TPF_PROFILING       (target_flags & MASK_TPF_PROFILING)
 110 #define TARGET_NO_FUSED_MADD       (target_flags & MASK_NO_FUSED_MADD)
 111 #define TARGET_FUSED_MADD          (! TARGET_NO_FUSED_MADD)
 112
 113 /* ??? Once this actually works, it could be made a runtime option.  */
 114 #define TARGET_IBM_FLOAT           0
 115 #define TARGET_IEEE_FLOAT          1
 116
 117 #ifdef DEFAULT_TARGET_64BIT
 118 #define TARGET_DEFAULT             0x31
 119 #else
 120 #define TARGET_DEFAULT             0x1
 121 #endif
 122
 123 #define TARGET_SWITCHES                                                  \
 124 { { "hard-float",      1, N_("Use hardware fp")},                        \
 125   { "soft-float",     -1, N_("Don't use hardware fp")},                  \
 126   { "backchain",       2, N_("Set backchain")},                          \
 127   { "no-backchain",   -2, N_("Don't set backchain (faster, but debug harder")},\
 128   { "small-exec",      4, N_("Use bras for executable < 64k")},          \
 129   { "no-small-exec",  -4, N_("Don't use bras")},                         \
 130   { "debug",           8, N_("Additional debug prints")},                \
 131   { "no-debug",       -8, N_("Don't print additional debug prints")},    \
 132   { "64",             16, N_("64 bit ABI")},                             \
 133   { "31",            -16, N_("31 bit ABI")},                             \
 134   { "zarch",          32, N_("z/Architecture")},                         \
 135   { "esa",           -32, N_("ESA/390 architecture")},                   \
 136   { "mvcle",          64, N_("mvcle use")},                              \
 137   { "no-mvcle",      -64, N_("mvc&ex")},                                 \
 138   { "tpf-trace",     128, N_("enable tpf OS tracing code")},             \
 139   { "no-tpf-trace", -128, N_("disable tpf OS tracing code")},            \
 140   { "no-fused-madd", 256, N_("disable fused multiply/add instructions")},\
 141   { "fused-madd",   -256, N_("enable fused multiply/add instructions")}, \
 142   { "", TARGET_DEFAULT, 0 } }
 143
 144 #define TARGET_OPTIONS                                          \
 145 { { "tune=",            &s390_tune_string,                      \
 146     N_("Schedule code for given CPU"), 0},                      \
 147   { "arch=",            &s390_arch_string,                      \
 148     N_("Generate code for given CPU"), 0},                      \
 149 }
 150
 151 /* Support for configure-time defaults.  */
 152 #define OPTION_DEFAULT_SPECS                                    \
 153   { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" },                 \
 154   { "arch", "%{!march=*:-march=%(VALUE)}" },                    \
 155   { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
 156
 157 /* Defaulting rules.  */
 158 #ifdef DEFAULT_TARGET_64BIT
 159 #define DRIVER_SELF_SPECS                                       \
 160   "%{!m31:%{!m64:-m64}}",                                       \
 161   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 162   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 163 #else
 164 #define DRIVER_SELF_SPECS                                       \
 165   "%{!m31:%{!m64:-m31}}",                                       \
 166   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 167   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 168 #endif
 169
 170 /* Target version string.  Overridden by the OS header.  */
 171 #ifdef DEFAULT_TARGET_64BIT
 172 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
 173 #else
 174 #define TARGET_VERSION fprintf (stderr, " (S/390)");
 175 #endif
 176
 177 /* Hooks to override options.  */
 178 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
 179 #define OVERRIDE_OPTIONS override_options ()
 180
 181 /* Frame pointer is not used for debugging.  */
 182 #define CAN_DEBUG_WITHOUT_FP
 183
 184
 185 /* In libgcc2, determine target settings as compile-time constants.  */
 186 #ifdef IN_LIBGCC2
 187 #undef TARGET_64BIT
 188 #ifdef __s390x__
 189 #define TARGET_64BIT 1
 190 #else
 191 #define TARGET_64BIT 0
 192 #endif
 193 #endif
 194
 195
 196 /* Target machine storage layout.  */
 197
 198 /* Everything is big-endian.  */
 199 #define BITS_BIG_ENDIAN 1
 200 #define BYTES_BIG_ENDIAN 1
 201 #define WORDS_BIG_ENDIAN 1
 202
 203 /* Width of a word, in units (bytes).  */
 204 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
 205 #ifndef IN_LIBGCC2
 206 #define MIN_UNITS_PER_WORD 4
 207 #endif
 208 #define MAX_BITS_PER_WORD 64
 209
 210 /* Function arguments and return values are promoted to word size.  */
 211 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE)            \
 212 if (INTEGRAL_MODE_P (MODE) &&                           \
 213     GET_MODE_SIZE (MODE) < UNITS_PER_WORD) {            \
 214   (MODE) = Pmode;                                       \
 215           }
 216
 217 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 218 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
 219
 220 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 221 #define STACK_BOUNDARY 64
 222
 223 /* Allocation boundary (in *bits*) for the code of a function.  */
 224 #define FUNCTION_BOUNDARY 32
 225
 226 /* There is no point aligning anything to a rounder boundary than this.  */
 227 #define BIGGEST_ALIGNMENT 64
 228
 229 /* Alignment of field after `int : 0' in a structure.  */
 230 #define EMPTY_FIELD_BOUNDARY 32
 231
 232 /* Alignment on even addresses for LARL instruction.  */
 233 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 234 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 235
 236 /* Alignment is not required by the hardware.  */
 237 #define STRICT_ALIGNMENT 0
 238
 239 /* Mode of stack savearea.
 240    FUNCTION is VOIDmode because calling convention maintains SP.
 241    BLOCK needs Pmode for SP.
 242    NONLOCAL needs twice Pmode to maintain both backchain and SP.  */
 243 #define STACK_SAVEAREA_MODE(LEVEL)      \
 244   (LEVEL == SAVE_FUNCTION ? VOIDmode    \
 245   : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
 246
 247 /* Define target floating point format.  */
 248 #define TARGET_FLOAT_FORMAT \
 249   (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
 250
 251
 252 /* Type layout.  */
 253
 254 /* Sizes in bits of the source language data types.  */
 255 #define SHORT_TYPE_SIZE 16
 256 #define INT_TYPE_SIZE 32
 257 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
 258 #define LONG_LONG_TYPE_SIZE 64
 259 #define FLOAT_TYPE_SIZE 32
 260 #define DOUBLE_TYPE_SIZE 64
 261 #define LONG_DOUBLE_TYPE_SIZE 64  /* ??? Should support extended format.  */
 262
 263 /* We use "unsigned char" as default.  */
 264 #define DEFAULT_SIGNED_CHAR 0
 265
 266
 267 /* Register usage.  */
 268
 269 /* We have 16 general purpose registers (registers 0-15),
 270    and 16 floating point registers (registers 16-31).
 271    (On non-IEEE machines, we have only 4 fp registers.)
 272
 273    Amongst the general purpose registers, some are used
 274    for specific purposes:
 275    GPR 11: Hard frame pointer (if needed)
 276    GPR 12: Global offset table pointer (if needed)
 277    GPR 13: Literal pool base register
 278    GPR 14: Return address register
 279    GPR 15: Stack pointer
 280
 281    Registers 32-34 are 'fake' hard registers that do not
 282    correspond to actual hardware:
 283    Reg 32: Argument pointer
 284    Reg 33: Condition code
 285    Reg 34: Frame pointer  */
 286
 287 #define FIRST_PSEUDO_REGISTER 36
 288
 289 /* Standard register usage.  */
 290 #define GENERAL_REGNO_P(N)      ((int)(N) >= 0 && (N) < 16)
 291 #define ADDR_REGNO_P(N)         ((N) >= 1 && (N) < 16)
 292 #define FP_REGNO_P(N)           ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
 293 #define CC_REGNO_P(N)           ((N) == 33)
 294 #define FRAME_REGNO_P(N)        ((N) == 32 || (N) == 34 || (N) == 35)
 295
 296 #define GENERAL_REG_P(X)        (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 297 #define ADDR_REG_P(X)           (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
 298 #define FP_REG_P(X)             (REG_P (X) && FP_REGNO_P (REGNO (X)))
 299 #define CC_REG_P(X)             (REG_P (X) && CC_REGNO_P (REGNO (X)))
 300 #define FRAME_REG_P(X)          (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
 301
 302 #define SIBCALL_REGNUM 1
 303 #define BASE_REGNUM 13
 304 #define RETURN_REGNUM 14
 305 #define CC_REGNUM 33
 306
 307 /* Set up fixed registers and calling convention:
 308
 309    GPRs 0-5 are always call-clobbered,
 310    GPRs 6-15 are always call-saved.
 311    GPR 12 is fixed if used as GOT pointer.
 312    GPR 13 is always fixed (as literal pool pointer).
 313    GPR 14 is always fixed on S/390 machines (as return address).
 314    GPR 15 is always fixed (as stack pointer).
 315    The 'fake' hard registers are call-clobbered and fixed.
 316
 317    On 31-bit, FPRs 18-19 are call-clobbered;
 318    on 64-bit, FPRs 24-31 are call-clobbered.
 319    The remaining FPRs are call-saved.  */
 320
 321 #define FIXED_REGISTERS                         \
 322 { 0, 0, 0, 0,                                   \
 323   0, 0, 0, 0,                                   \
 324   0, 0, 0, 0,                                   \
 325   0, 1, 1, 1,                                   \
 326   0, 0, 0, 0,                                   \
 327   0, 0, 0, 0,                                   \
 328   0, 0, 0, 0,                                   \
 329   0, 0, 0, 0,                                   \
 330   1, 1, 1, 1 }
 331
 332 #define CALL_USED_REGISTERS                     \
 333 { 1, 1, 1, 1,                                   \
 334   1, 1, 0, 0,                                   \
 335   0, 0, 0, 0,                                   \
 336   0, 1, 1, 1,                                   \
 337   1, 1, 1, 1,                                   \
 338   1, 1, 1, 1,                                   \
 339   1, 1, 1, 1,                                   \
 340   1, 1, 1, 1,                                   \
 341   1, 1, 1, 1 }
 342
 343 #define CALL_REALLY_USED_REGISTERS              \
 344 { 1, 1, 1, 1,                                   \
 345   1, 1, 0, 0,                                   \
 346   0, 0, 0, 0,                                   \
 347   0, 0, 0, 0,                                   \
 348   1, 1, 1, 1,                                   \
 349   1, 1, 1, 1,                                   \
 350   1, 1, 1, 1,                                   \
 351   1, 1, 1, 1,                                   \
 352   1, 1, 1, 1 }
 353
 354 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
 355
 356 /* Preferred register allocation order.  */
 357 #define REG_ALLOC_ORDER                                         \
 358 {  1, 2, 3, 4, 5, 0, 13, 12, 11, 10, 9, 8, 7, 6, 14,            \
 359    16, 17, 18, 19, 20, 21, 22, 23,                              \
 360    24, 25, 26, 27, 28, 29, 30, 31,                              \
 361    15, 32, 33, 34, 35 }
 362
 363
 364 /* Fitting values into registers.  */
 365
 366 /* Integer modes <= word size fit into any GPR.
 367    Integer modes > word size fit into successive GPRs, starting with
 368    an even-numbered register.
 369    SImode and DImode fit into FPRs as well.
 370
 371    Floating point modes <= word size fit into any FPR or GPR.
 372    Floating point modes > word size (i.e. DFmode on 32-bit) fit
 373    into any FPR, or an even-odd GPR pair.
 374
 375    Complex floating point modes fit either into two FPRs, or into
 376    successive GPRs (again starting with an even number).
 377
 378    Condition code modes fit only into the CC register.  */
 379
 380 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
 381   (FP_REGNO_P(REGNO)?                                           \
 382     (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :      \
 383    GENERAL_REGNO_P(REGNO)?                                      \
 384     ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
 385    1)
 386
 387 #define HARD_REGNO_MODE_OK(REGNO, MODE)                             \
 388   (FP_REGNO_P(REGNO)?                                               \
 389    ((MODE) == SImode || (MODE) == DImode ||                         \
 390     GET_MODE_CLASS(MODE) == MODE_FLOAT ||                           \
 391     GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) :                   \
 392    GENERAL_REGNO_P(REGNO)?                                          \
 393     (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) :        \
 394    CC_REGNO_P(REGNO)?                                               \
 395      GET_MODE_CLASS (MODE) == MODE_CC :                             \
 396    FRAME_REGNO_P(REGNO)?                                            \
 397      (enum machine_mode) (MODE) == Pmode :                          \
 398    0)
 399
 400 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 401    (((MODE1) == SFmode || (MODE1) == DFmode)    \
 402    == ((MODE2) == SFmode || (MODE2) == DFmode))
 403
 404 /* Maximum number of registers to represent a value of mode MODE
 405    in a register of class CLASS.  */
 406 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 407      ((CLASS) == FP_REGS ?                                              \
 408       (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :           \
 409       (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 410
 411 /* If a 4-byte value is loaded into a FPR, it is placed into the
 412    *upper* half of the register, not the lower.  Therefore, we
 413    cannot use SUBREGs to switch between modes in FP registers.  */
 414 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)               \
 415   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)                   \
 416    ? reg_classes_intersect_p (FP_REGS, CLASS) : 0)
 417
 418 /* Register classes.  */
 419
 420 /* We use the following register classes:
 421    GENERAL_REGS     All general purpose registers
 422    ADDR_REGS        All general purpose registers except %r0
 423                     (These registers can be used in address generation)
 424    FP_REGS          All floating point registers
 425
 426    GENERAL_FP_REGS  Union of GENERAL_REGS and FP_REGS
 427    ADDR_FP_REGS     Union of ADDR_REGS and FP_REGS
 428
 429    NO_REGS          No registers
 430    ALL_REGS         All registers
 431
 432    Note that the 'fake' frame pointer and argument pointer registers
 433    are included amongst the address registers here.  The condition
 434    code register is only included in ALL_REGS.  */
 435
 436 enum reg_class
 437 {
 438   NO_REGS, ADDR_REGS, GENERAL_REGS,
 439   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
 440   ALL_REGS, LIM_REG_CLASSES
 441 };
 442 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 443
 444 #define REG_CLASS_NAMES                                                 \
 445 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS",                               \
 446   "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
 447
 448 /* Class -> register mapping.  */
 449 #define REG_CLASS_CONTENTS \
 450 {                                                       \
 451   { 0x00000000, 0x00000000 },   /* NO_REGS */           \
 452   { 0x0000fffe, 0x0000000d },   /* ADDR_REGS */         \
 453   { 0x0000ffff, 0x0000000d },   /* GENERAL_REGS */      \
 454   { 0xffff0000, 0x00000000 },   /* FP_REGS */           \
 455   { 0xfffffffe, 0x0000000d },   /* ADDR_FP_REGS */      \
 456   { 0xffffffff, 0x0000000d },   /* GENERAL_FP_REGS */   \
 457   { 0xffffffff, 0x0000000f },   /* ALL_REGS */          \
 458 }
 459
 460 /* Register -> class mapping.  */
 461 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 462 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
 463
 464 /* ADDR_REGS can be used as base or index register.  */
 465 #define INDEX_REG_CLASS ADDR_REGS
 466 #define BASE_REG_CLASS ADDR_REGS
 467
 468 /* Check whether REGNO is a hard register of the suitable class
 469    or a pseudo register currently allocated to one such.  */
 470 #define REGNO_OK_FOR_INDEX_P(REGNO)                                     \
 471     (((REGNO) < FIRST_PSEUDO_REGISTER                                   \
 472      && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS)                         \
 473     || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
 474 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
 475
 476
 477 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
 478    return the class of reg to actually use.  */
 479 #define PREFERRED_RELOAD_CLASS(X, CLASS)        \
 480   s390_preferred_reload_class ((X), (CLASS))
 481
 482 /* We need a secondary reload when loading a PLUS which is
 483    not a valid operand for LOAD ADDRESS.  */
 484 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN)   \
 485   s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
 486
 487 /* We need a secondary reload when storing a double-word
 488    to a non-offsettable memory address.  */
 489 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
 490   s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
 491
 492 /* We need secondary memory to move data between GPRs and FPRs.  */
 493 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
 494  ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
 495
 496 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
 497    because the movsi and movsf patterns don't handle r/f moves.  */
 498 #define SECONDARY_MEMORY_NEEDED_MODE(MODE)              \
 499  (GET_MODE_BITSIZE (MODE) < 32                          \
 500   ? mode_for_size (32, GET_MODE_CLASS (MODE), 0)        \
 501   : MODE)
 502
 503
 504 /* Define various machine-dependent constraint letters.  */
 505
 506 #define REG_CLASS_FROM_LETTER(C)                                        \
 507   ((C) == 'a' ? ADDR_REGS :                                             \
 508    (C) == 'd' ? GENERAL_REGS :                                          \
 509    (C) == 'f' ? FP_REGS : NO_REGS)
 510
 511 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                          \
 512   s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
 513
 514 #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)  1
 515
 516 #define EXTRA_CONSTRAINT_STR(OP, C, STR)                                \
 517   s390_extra_constraint_str ((OP), (C), (STR))
 518 #define EXTRA_MEMORY_CONSTRAINT(C, STR)                         \
 519   ((C) == 'Q' || (C) == 'R' || (C) == 'S' || (C) == 'T')
 520 #define EXTRA_ADDRESS_CONSTRAINT(C, STR)                        \
 521   ((C) == 'U' || (C) == 'W' || (C) == 'Y')
 522
 523 #define CONSTRAINT_LEN(C, STR)                                   \
 524   ((C) == 'N' ? 5 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
 525
 526 /* Stack layout and calling conventions.  */
 527
 528 /* Our stack grows from higher to lower addresses.  However, local variables
 529    are accessed by positive offsets, and function arguments are stored at
 530    increasing addresses.  */
 531 #define STACK_GROWS_DOWNWARD
 532 /* #undef FRAME_GROWS_DOWNWARD */
 533 /* #undef ARGS_GROW_DOWNWARD */
 534
 535 /* The basic stack layout looks like this: the stack pointer points
 536    to the register save area for called functions.  Above that area
 537    is the location to place outgoing arguments.  Above those follow
 538    dynamic allocations (alloca), and finally the local variables.  */
 539
 540 /* Offset from stack-pointer to first location of outgoing args.  */
 541 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
 542
 543 /* Offset within stack frame to start allocating local variables at.  */
 544 extern int current_function_outgoing_args_size;
 545 #define STARTING_FRAME_OFFSET \
 546      (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
 547
 548 /* Offset from the stack pointer register to an item dynamically
 549    allocated on the stack, e.g., by `alloca'.  */
 550 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
 551
 552 /* Offset of first parameter from the argument pointer register value.
 553    We have a fake argument pointer register that points directly to
 554    the argument area.  */
 555 #define FIRST_PARM_OFFSET(FNDECL) 0
 556
 557 /* The return address of the current frame is retrieved
 558    from the initial value of register RETURN_REGNUM.
 559    For frames farther back, we use the stack slot where
 560    the corresponding RETURN_REGNUM register was saved.  */
 561
 562 #define DYNAMIC_CHAIN_ADDRESS(FRAME)                                            \
 563   ((FRAME) != hard_frame_pointer_rtx ? (FRAME) :                                \
 564    plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
 565
 566 #define RETURN_ADDR_RTX(COUNT, FRAME)                                           \
 567   s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
 568
 569 /* In 31-bit mode, we need to mask off the high bit of return addresses.  */
 570 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
 571
 572
 573 /* Exception handling.  */
 574
 575 /* Describe calling conventions for DWARF-2 exception handling.  */
 576 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, RETURN_REGNUM)
 577 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
 578 #define DWARF_FRAME_RETURN_COLUMN  14
 579
 580 /* Describe how we implement __builtin_eh_return.  */
 581 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
 582 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
 583
 584 /* Select a format to encode pointers in exception handling data.  */
 585 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)                          \
 586   (flag_pic                                                                 \
 587     ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
 588    : DW_EH_PE_absptr)
 589
 590
 591 /* Frame registers.  */
 592
 593 #define STACK_POINTER_REGNUM 15
 594 #define FRAME_POINTER_REGNUM 34
 595 #define HARD_FRAME_POINTER_REGNUM 11
 596 #define ARG_POINTER_REGNUM 32
 597 #define RETURN_ADDRESS_POINTER_REGNUM 35
 598
 599 /* The static chain must be call-clobbered, but not used for
 600    function argument passing.  As register 1 is clobbered by
 601    the trampoline code, we only have one option.  */
 602 #define STATIC_CHAIN_REGNUM 0
 603
 604 /* Number of hardware registers that go into the DWARF-2 unwind info.
 605    To avoid ABI incompatibility, this number must not change even as
 606    'fake' hard registers are added or removed.  */
 607 #define DWARF_FRAME_REGISTERS 34
 608
 609
 610 /* Frame pointer and argument pointer elimination.  */
 611
 612 #define FRAME_POINTER_REQUIRED 0
 613
 614 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
 615
 616 #define ELIMINABLE_REGS                                      \
 617 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},              \
 618  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},         \
 619  { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 620  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},           \
 621  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},     \
 622  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 623
 624 #define CAN_ELIMINATE(FROM, TO) (1)
 625
 626 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                      \
 627 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)     \
 628   { (OFFSET) = 0; }                                                       \
 629   else  if ((FROM) == FRAME_POINTER_REGNUM                                \
 630             && (TO) == HARD_FRAME_POINTER_REGNUM)                         \
 631   { (OFFSET) = 0; }                                                       \
 632   else if ((FROM) == ARG_POINTER_REGNUM                                   \
 633             && (TO) == HARD_FRAME_POINTER_REGNUM)                         \
 634   { (OFFSET) = s390_arg_frame_offset (); }                                \
 635   else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)  \
 636   { (OFFSET) = s390_arg_frame_offset (); }                                \
 637   else if ((FROM) == RETURN_ADDRESS_POINTER_REGNUM                        \
 638             && ((TO) == STACK_POINTER_REGNUM                              \
 639                 || (TO) == HARD_FRAME_POINTER_REGNUM))                    \
 640   { (OFFSET) = s390_return_address_offset (); }                           \
 641   else                                                                    \
 642     abort();                                                              \
 643 }
 644
 645
 646 /* Stack arguments.  */
 647
 648 /* We need current_function_outgoing_args to be valid.  */
 649 #define ACCUMULATE_OUTGOING_ARGS 1
 650
 651 /* Return doesn't modify the stack.  */
 652 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
 653
 654
 655 /* Register arguments.  */
 656
 657 typedef struct s390_arg_structure
 658 {
 659   int gprs;                     /* gpr so far */
 660   int fprs;                     /* fpr so far */
 661 }
 662 CUMULATIVE_ARGS;
 663
 664 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
 665   ((CUM).gprs=0, (CUM).fprs=0)
 666
 667 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 668   s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
 669
 670 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
 671   s390_function_arg (&CUM, MODE, TYPE, NAMED)
 672
 673 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
 674
 675 /* Arguments can be placed in general registers 2 to 6,
 676    or in floating point registers 0 and 2.  */
 677 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
 678                                  (N) == 16 || (N) == 17)
 679
 680
 681 /* Scalar return values.  */
 682
 683 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 684   s390_function_value ((VALTYPE), VOIDmode)
 685
 686 #define LIBCALL_VALUE(MODE) \
 687   s390_function_value (NULL, (MODE))
 688
 689 /* Only gpr 2 and fpr 0 are ever used as return registers.  */
 690 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
 691
 692
 693 /* Function entry and exit.  */
 694
 695 /* When returning from a function, the stack pointer does not matter.  */
 696 #define EXIT_IGNORE_STACK       1
 697
 698
 699 /* Profiling.  */
 700
 701 #define FUNCTION_PROFILER(FILE, LABELNO)                        \
 702   s390_function_profiler ((FILE), ((LABELNO)))
 703
 704 #define PROFILE_BEFORE_PROLOGUE 1
 705
 706
 707 /* Implementing the varargs macros.  */
 708
 709 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
 710   s390_va_start (valist, nextarg)
 711
 712 /* Trampolines for nested functions.  */
 713
 714 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
 715
 716 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT)                       \
 717    s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
 718
 719 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 720    s390_trampoline_template (FILE)
 721
 722
 723 /* Addressing modes, and classification of registers for them.  */
 724
 725 /* Recognize any constant value that is a valid address.  */
 726 #define CONSTANT_ADDRESS_P(X) 0
 727
 728 /* Maximum number of registers that can appear in a valid memory address.  */
 729 #define MAX_REGS_PER_ADDRESS 2
 730
 731 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
 732    its validity for a certain class.  We have two alternate definitions
 733    for each of them.  The usual definition accepts all pseudo regs; the
 734    other rejects them all.  The symbol REG_OK_STRICT causes the latter
 735    definition to be used.
 736
 737    Most source files want to accept pseudo regs in the hope that they will
 738    get allocated to the class that the insn wants them to be in.
 739    Some source files that are used after register allocation
 740    need to be strict.  */
 741
 742 #define REG_OK_FOR_INDEX_NONSTRICT_P(X)         \
 743 ((GET_MODE (X) == Pmode) &&                     \
 744  ((REGNO (X) >= FIRST_PSEUDO_REGISTER)          \
 745   || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
 746
 747 #define REG_OK_FOR_BASE_NONSTRICT_P(X)    REG_OK_FOR_INDEX_NONSTRICT_P (X)
 748
 749 #define REG_OK_FOR_INDEX_STRICT_P(X)                            \
 750 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
 751
 752 #define REG_OK_FOR_BASE_STRICT_P(X)                             \
 753 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
 754
 755 #ifndef REG_OK_STRICT
 756 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_NONSTRICT_P(X)
 757 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P(X)
 758 #else
 759 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_STRICT_P(X)
 760 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_STRICT_P(X)
 761 #endif
 762
 763 /* S/390 has no mode dependent addresses.  */
 764 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
 765
 766 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
 767    valid memory address for an instruction.
 768    The MODE argument is the machine mode for the MEM expression
 769    that wants to use this address.  */
 770 #ifdef REG_OK_STRICT
 771 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 772 {                                                                       \
 773   if (legitimate_address_p (MODE, X, 1))                                \
 774     goto ADDR;                                                          \
 775 }
 776 #else
 777 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 778 {                                                                       \
 779   if (legitimate_address_p (MODE, X, 0))                                \
 780     goto ADDR;                                                          \
 781 }
 782 #endif
 783
 784 /* Try machine-dependent ways of modifying an illegitimate address
 785    to be legitimate.  If we find one, return the new, valid address.
 786    This macro is used in only one place: `memory_address' in explow.c.  */
 787 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)                          \
 788 {                                                                       \
 789   (X) = legitimize_address (X, OLDX, MODE);                             \
 790   if (memory_address_p (MODE, X))                                       \
 791     goto WIN;                                                           \
 792 }
 793
 794 /* Nonzero if the constant value X is a legitimate general operand.
 795    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 796 #define LEGITIMATE_CONSTANT_P(X) \
 797      legitimate_constant_p (X)
 798
 799 /* Helper macro for s390.c and s390.md to check for symbolic constants.  */
 800 #define SYMBOLIC_CONST(X)       \
 801 (GET_CODE (X) == SYMBOL_REF                                             \
 802  || GET_CODE (X) == LABEL_REF                                           \
 803  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 804
 805 #define TLS_SYMBOLIC_CONST(X)   \
 806 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X))       \
 807  || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
 808
 809
 810 /* Condition codes.  */
 811
 812 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
 813    return the mode to be used for the comparison.  */
 814 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
 815
 816 /* Canonicalize a comparison from one we don't have to one we do have.  */
 817 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
 818   s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
 819
 820 /* Define the information needed to generate branch and scc insns.  This is
 821    stored from the compare operation.  Note that we can't use "rtx" here
 822    since it hasn't been defined!  */
 823 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
 824
 825
 826 /* Relative costs of operations.  */
 827
 828 /* On s390, copy between fprs and gprs is expensive.  */
 829 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)                        \
 830   ((   (   reg_classes_intersect_p ((CLASS1), GENERAL_REGS)             \
 831         && reg_classes_intersect_p ((CLASS2), FP_REGS))                 \
 832     || (   reg_classes_intersect_p ((CLASS1), FP_REGS)                  \
 833         && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
 834
 835 /* A C expression for the cost of moving data of mode M between a
 836    register and memory.  A value of 2 is the default; this cost is
 837    relative to those in `REGISTER_MOVE_COST'.  */
 838 #define MEMORY_MOVE_COST(M, C, I) 1
 839
 840 /* A C expression for the cost of a branch instruction.  A value of 1
 841    is the default; other values are interpreted relative to that.  */
 842 #define BRANCH_COST 1
 843
 844 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 845 #define SLOW_BYTE_ACCESS 1
 846
 847 /* The maximum number of bytes that a single instruction can move quickly
 848    between memory and registers or between two memory locations.  */
 849 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
 850 #define MAX_MOVE_MAX 16
 851
 852 /* Determine whether to use move_by_pieces or block move insn.  */
 853 #define MOVE_BY_PIECES_P(SIZE, ALIGN)           \
 854   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 855     || (TARGET_64BIT && (SIZE) == 8) )
 856
 857 /* Determine whether to use clear_by_pieces or block clear insn.  */
 858 #define CLEAR_BY_PIECES_P(SIZE, ALIGN)          \
 859   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 860     || (TARGET_64BIT && (SIZE) == 8) )
 861
 862 /* This macro is used to determine whether store_by_pieces should be
 863    called to "memset" storage with byte values other than zero, or
 864    to "memcpy" storage when the source is a constant string.  */
 865 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
 866
 867 /* Don't perform CSE on function addresses.  */
 868 #define NO_FUNCTION_CSE
 869
 870
 871 /* Sections.  */
 872
 873 /* Output before read-only data.  */
 874 #define TEXT_SECTION_ASM_OP ".text"
 875
 876 /* Output before writable (initialized) data.  */
 877 #define DATA_SECTION_ASM_OP ".data"
 878
 879 /* Output before writable (uninitialized) data.  */
 880 #define BSS_SECTION_ASM_OP ".bss"
 881
 882 /* S/390 constant pool breaks the devices in crtstuff.c to control section
 883    in where code resides.  We have to write it as asm code.  */
 884 #ifndef __s390x__
 885 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
 886     asm (SECTION_OP "\n\
 887         bras\t%r2,1f\n\
 888 0:      .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
 889 1:      l\t%r3,0(%r2)\n\
 890         bas\t%r14,0(%r3,%r2)\n\
 891         .previous");
 892 #endif
 893
 894
 895 /* Position independent code.  */
 896
 897 extern int flag_pic;
 898
 899 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
 900
 901 #define LEGITIMATE_PIC_OPERAND_P(X)  legitimate_pic_operand_p (X)
 902
 903
 904 /* Assembler file format.  */
 905
 906 /* Character to start a comment.  */
 907 #define ASM_COMMENT_START "#"
 908
 909 /* Declare an uninitialized external linkage data object.  */
 910 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 911   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 912
 913 /* Globalizing directive for a label.  */
 914 #define GLOBAL_ASM_OP ".globl "
 915
 916 /* Advance the location counter to a multiple of 2**LOG bytes.  */
 917 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
 918   if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
 919
 920 /* Advance the location counter by SIZE bytes.  */
 921 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
 922   fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 923
 924 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h.  */
 925 #define LOCAL_LABEL_PREFIX "."
 926
 927 /* How to refer to registers in assembler output.  This sequence is
 928    indexed by compiler's hard-register-number (see above).  */
 929 #define REGISTER_NAMES                                                  \
 930 { "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",        \
 931   "%r8",  "%r9",  "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",       \
 932   "%f0",  "%f2",  "%f4",  "%f6",  "%f1",  "%f3",  "%f5",  "%f7",        \
 933   "%f8",  "%f10", "%f12", "%f14", "%f9",  "%f11", "%f13", "%f15",       \
 934   "%ap",  "%cc",  "%fp",  "%rp"                                         \
 935 }
 936
 937 /* Emit a dtp-relative reference to a TLS variable.  */
 938
 939 #ifdef HAVE_AS_TLS
 940 #define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \
 941   s390_output_dwarf_dtprel (FILE, SIZE, X)
 942 #endif
 943
 944 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 945 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 946 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 947
 948 /* Output machine-dependent UNSPECs in address constants.  */
 949 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)          \
 950 do {                                                    \
 951   if (!s390_output_addr_const_extra (FILE, (X)))        \
 952     goto FAIL;                                          \
 953 } while (0);
 954
 955 /* Output an element of a case-vector that is absolute.  */
 956 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                            \
 957 do {                                                                    \
 958   char buf[32];                                                         \
 959   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 960   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 961   assemble_name ((FILE), buf);                                          \
 962   fputc ('\n', (FILE));                                                 \
 963 } while (0)
 964
 965 /* Output an element of a case-vector that is relative.  */
 966 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)                \
 967 do {                                                                    \
 968   char buf[32];                                                         \
 969   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 970   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 971   assemble_name ((FILE), buf);                                          \
 972   fputc ('-', (FILE));                                                  \
 973   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL));                        \
 974   assemble_name ((FILE), buf);                                          \
 975   fputc ('\n', (FILE));                                                 \
 976 } while (0)
 977
 978
 979 /* Miscellaneous parameters.  */
 980
 981 /* Define the codes that are matched by predicates in aux-output.c.  */
 982 #define PREDICATE_CODES                                                 \
 983   {"s_operand",       { SUBREG, MEM }},                                 \
 984   {"s_imm_operand",   { CONST_INT, CONST_DOUBLE, SUBREG, MEM }},        \
 985   {"shift_count_operand", { REG, SUBREG, PLUS, CONST_INT }},            \
 986   {"bras_sym_operand",{ SYMBOL_REF, CONST }},                           \
 987   {"larl_operand",    { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }},  \
 988   {"load_multiple_operation", {PARALLEL}},                              \
 989   {"store_multiple_operation", {PARALLEL}},                             \
 990   {"const0_operand",  { CONST_INT, CONST_DOUBLE }},                     \
 991   {"consttable_operand", { SYMBOL_REF, LABEL_REF, CONST,                \
 992                            CONST_INT, CONST_DOUBLE }},                  \
 993   {"s390_plus_operand", { PLUS }},                                      \
 994   {"s390_alc_comparison", { ZERO_EXTEND, SIGN_EXTEND,                   \
 995                             LTU, GTU, LEU, GEU }},                      \
 996   {"s390_slb_comparison", { ZERO_EXTEND, SIGN_EXTEND,                   \
 997                             LTU, GTU, LEU, GEU }},
 998
 999 /* Specify the machine mode that this machine uses for the index in the
1000    tablejump instruction.  */
1001 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1002
1003 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1004    is done just by pretending it is already truncated.  */
1005 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
1006
1007 /* Specify the machine mode that pointers have.
1008    After generation of rtl, the compiler makes no further distinction
1009    between pointers and any other objects of this machine mode.  */
1010 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1011
1012 /* This is -1 for "pointer mode" extend.  See ptr_extend in s390.md.  */
1013 #define POINTERS_EXTEND_UNSIGNED -1
1014
1015 /* A function address in a call instruction is a byte address (for
1016    indexing purposes) so give the MEM rtx a byte's mode.  */
1017 #define FUNCTION_MODE QImode
1018
1019 #endif