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[gcc.git] / gcc / config / s390 / s390.h
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
22 02110-1301, USA. */
23
24 #ifndef _S390_H
25 #define _S390_H
26
27 /* Override the __fixdfdi etc. routines when building libgcc2.
28 ??? This should be done in a cleaner way ... */
29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
30 #include <config/s390/fixdfdi.h>
31 #endif
32
33 /* Which processor to generate code or schedule for. The cpu attribute
34 defines a list that mirrors this list, so changes to s390.md must be
35 made at the same time. */
36
37 enum processor_type
38 {
39 PROCESSOR_9672_G5,
40 PROCESSOR_9672_G6,
41 PROCESSOR_2064_Z900,
42 PROCESSOR_2084_Z990,
43 PROCESSOR_2094_Z9_109,
44 PROCESSOR_max
45 };
46
47 /* Optional architectural facilities supported by the processor. */
48
49 enum processor_flags
50 {
51 PF_IEEE_FLOAT = 1,
52 PF_ZARCH = 2,
53 PF_LONG_DISPLACEMENT = 4,
54 PF_EXTIMM = 8
55 };
56
57 extern enum processor_type s390_tune;
58 extern enum processor_flags s390_tune_flags;
59
60 extern enum processor_type s390_arch;
61 extern enum processor_flags s390_arch_flags;
62
63 #define TARGET_CPU_IEEE_FLOAT \
64 (s390_arch_flags & PF_IEEE_FLOAT)
65 #define TARGET_CPU_ZARCH \
66 (s390_arch_flags & PF_ZARCH)
67 #define TARGET_CPU_LONG_DISPLACEMENT \
68 (s390_arch_flags & PF_LONG_DISPLACEMENT)
69 #define TARGET_CPU_EXTIMM \
70 (s390_arch_flags & PF_EXTIMM)
71
72 #define TARGET_LONG_DISPLACEMENT \
73 (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
74 #define TARGET_EXTIMM \
75 (TARGET_ZARCH && TARGET_CPU_EXTIMM)
76
77 /* Run-time target specification. */
78
79 /* Defaults for option flags defined only on some subtargets. */
80 #ifndef TARGET_TPF_PROFILING
81 #define TARGET_TPF_PROFILING 0
82 #endif
83
84 /* This will be overridden by OS headers. */
85 #define TARGET_TPF 0
86
87 /* Target CPU builtins. */
88 #define TARGET_CPU_CPP_BUILTINS() \
89 do \
90 { \
91 builtin_assert ("cpu=s390"); \
92 builtin_assert ("machine=s390"); \
93 builtin_define ("__s390__"); \
94 if (TARGET_64BIT) \
95 builtin_define ("__s390x__"); \
96 } \
97 while (0)
98
99 /* ??? Once this actually works, it could be made a runtime option. */
100 #define TARGET_IBM_FLOAT 0
101 #define TARGET_IEEE_FLOAT 1
102
103 #ifdef DEFAULT_TARGET_64BIT
104 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_FLOAT)
105 #else
106 #define TARGET_DEFAULT MASK_HARD_FLOAT
107 #endif
108
109 /* Support for configure-time defaults. */
110 #define OPTION_DEFAULT_SPECS \
111 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
112 { "arch", "%{!march=*:-march=%(VALUE)}" }, \
113 { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
114
115 /* Defaulting rules. */
116 #ifdef DEFAULT_TARGET_64BIT
117 #define DRIVER_SELF_SPECS \
118 "%{!m31:%{!m64:-m64}}", \
119 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
120 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
121 #else
122 #define DRIVER_SELF_SPECS \
123 "%{!m31:%{!m64:-m31}}", \
124 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
125 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
126 #endif
127
128 /* Target version string. Overridden by the OS header. */
129 #ifdef DEFAULT_TARGET_64BIT
130 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
131 #else
132 #define TARGET_VERSION fprintf (stderr, " (S/390)");
133 #endif
134
135 /* Hooks to override options. */
136 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
137 #define OVERRIDE_OPTIONS override_options ()
138
139 /* Frame pointer is not used for debugging. */
140 #define CAN_DEBUG_WITHOUT_FP
141
142
143 /* In libgcc2, determine target settings as compile-time constants. */
144 #ifdef IN_LIBGCC2
145 #undef TARGET_64BIT
146 #ifdef __s390x__
147 #define TARGET_64BIT 1
148 #else
149 #define TARGET_64BIT 0
150 #endif
151 #endif
152
153
154 /* Target machine storage layout. */
155
156 /* Everything is big-endian. */
157 #define BITS_BIG_ENDIAN 1
158 #define BYTES_BIG_ENDIAN 1
159 #define WORDS_BIG_ENDIAN 1
160
161 /* Width of a word, in units (bytes). */
162 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
163 #ifndef IN_LIBGCC2
164 #define MIN_UNITS_PER_WORD 4
165 #endif
166 #define MAX_BITS_PER_WORD 64
167
168 /* Function arguments and return values are promoted to word size. */
169 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \
170 if (INTEGRAL_MODE_P (MODE) && \
171 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
172 (MODE) = Pmode; \
173 }
174
175 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
176 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
177
178 /* Boundary (in *bits*) on which stack pointer should be aligned. */
179 #define STACK_BOUNDARY 64
180
181 /* Allocation boundary (in *bits*) for the code of a function. */
182 #define FUNCTION_BOUNDARY 32
183
184 /* There is no point aligning anything to a rounder boundary than this. */
185 #define BIGGEST_ALIGNMENT 64
186
187 /* Alignment of field after `int : 0' in a structure. */
188 #define EMPTY_FIELD_BOUNDARY 32
189
190 /* Alignment on even addresses for LARL instruction. */
191 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
192 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
193
194 /* Alignment is not required by the hardware. */
195 #define STRICT_ALIGNMENT 0
196
197 /* Mode of stack savearea.
198 FUNCTION is VOIDmode because calling convention maintains SP.
199 BLOCK needs Pmode for SP.
200 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
201 #define STACK_SAVEAREA_MODE(LEVEL) \
202 (LEVEL == SAVE_FUNCTION ? VOIDmode \
203 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
204
205 /* Define target floating point format. */
206 #define TARGET_FLOAT_FORMAT \
207 (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
208
209
210 /* Type layout. */
211
212 /* Sizes in bits of the source language data types. */
213 #define SHORT_TYPE_SIZE 16
214 #define INT_TYPE_SIZE 32
215 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
216 #define LONG_LONG_TYPE_SIZE 64
217 #define FLOAT_TYPE_SIZE 32
218 #define DOUBLE_TYPE_SIZE 64
219 #define LONG_DOUBLE_TYPE_SIZE 64 /* ??? Should support extended format. */
220
221 /* We use "unsigned char" as default. */
222 #define DEFAULT_SIGNED_CHAR 0
223
224
225 /* Register usage. */
226
227 /* We have 16 general purpose registers (registers 0-15),
228 and 16 floating point registers (registers 16-31).
229 (On non-IEEE machines, we have only 4 fp registers.)
230
231 Amongst the general purpose registers, some are used
232 for specific purposes:
233 GPR 11: Hard frame pointer (if needed)
234 GPR 12: Global offset table pointer (if needed)
235 GPR 13: Literal pool base register
236 GPR 14: Return address register
237 GPR 15: Stack pointer
238
239 Registers 32-35 are 'fake' hard registers that do not
240 correspond to actual hardware:
241 Reg 32: Argument pointer
242 Reg 33: Condition code
243 Reg 34: Frame pointer
244 Reg 35: Return address pointer
245
246 Registers 36 and 37 are mapped to access registers
247 0 and 1, used to implement thread-local storage. */
248
249 #define FIRST_PSEUDO_REGISTER 38
250
251 /* Standard register usage. */
252 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
253 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
254 #define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
255 #define CC_REGNO_P(N) ((N) == 33)
256 #define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35)
257 #define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37)
258
259 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
260 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
261 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
262 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
263 #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
264 #define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
265
266 /* Set up fixed registers and calling convention:
267
268 GPRs 0-5 are always call-clobbered,
269 GPRs 6-15 are always call-saved.
270 GPR 12 is fixed if used as GOT pointer.
271 GPR 13 is always fixed (as literal pool pointer).
272 GPR 14 is always fixed on S/390 machines (as return address).
273 GPR 15 is always fixed (as stack pointer).
274 The 'fake' hard registers are call-clobbered and fixed.
275 The access registers are call-saved and fixed.
276
277 On 31-bit, FPRs 18-19 are call-clobbered;
278 on 64-bit, FPRs 24-31 are call-clobbered.
279 The remaining FPRs are call-saved. */
280
281 #define FIXED_REGISTERS \
282 { 0, 0, 0, 0, \
283 0, 0, 0, 0, \
284 0, 0, 0, 0, \
285 0, 1, 1, 1, \
286 0, 0, 0, 0, \
287 0, 0, 0, 0, \
288 0, 0, 0, 0, \
289 0, 0, 0, 0, \
290 1, 1, 1, 1, \
291 1, 1 }
292
293 #define CALL_USED_REGISTERS \
294 { 1, 1, 1, 1, \
295 1, 1, 0, 0, \
296 0, 0, 0, 0, \
297 0, 1, 1, 1, \
298 1, 1, 1, 1, \
299 1, 1, 1, 1, \
300 1, 1, 1, 1, \
301 1, 1, 1, 1, \
302 1, 1, 1, 1, \
303 1, 1 }
304
305 #define CALL_REALLY_USED_REGISTERS \
306 { 1, 1, 1, 1, \
307 1, 1, 0, 0, \
308 0, 0, 0, 0, \
309 0, 0, 0, 0, \
310 1, 1, 1, 1, \
311 1, 1, 1, 1, \
312 1, 1, 1, 1, \
313 1, 1, 1, 1, \
314 1, 1, 1, 1, \
315 0, 0 }
316
317 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
318
319 /* Preferred register allocation order. */
320 #define REG_ALLOC_ORDER \
321 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
322 16, 17, 18, 19, 20, 21, 22, 23, \
323 24, 25, 26, 27, 28, 29, 30, 31, \
324 15, 32, 33, 34, 35, 36, 37 }
325
326
327 /* Fitting values into registers. */
328
329 /* Integer modes <= word size fit into any GPR.
330 Integer modes > word size fit into successive GPRs, starting with
331 an even-numbered register.
332 SImode and DImode fit into FPRs as well.
333
334 Floating point modes <= word size fit into any FPR or GPR.
335 Floating point modes > word size (i.e. DFmode on 32-bit) fit
336 into any FPR, or an even-odd GPR pair.
337
338 Complex floating point modes fit either into two FPRs, or into
339 successive GPRs (again starting with an even number).
340
341 Condition code modes fit only into the CC register. */
342
343 #define HARD_REGNO_NREGS(REGNO, MODE) \
344 (FP_REGNO_P(REGNO)? \
345 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
346 GENERAL_REGNO_P(REGNO)? \
347 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
348 ACCESS_REGNO_P(REGNO)? \
349 ((GET_MODE_SIZE(MODE)+4-1) / 4) : \
350 1)
351
352 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
353 (FP_REGNO_P(REGNO)? \
354 ((MODE) == SImode || (MODE) == DImode || \
355 GET_MODE_CLASS(MODE) == MODE_FLOAT || \
356 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \
357 GENERAL_REGNO_P(REGNO)? \
358 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
359 CC_REGNO_P(REGNO)? \
360 GET_MODE_CLASS (MODE) == MODE_CC : \
361 FRAME_REGNO_P(REGNO)? \
362 (enum machine_mode) (MODE) == Pmode : \
363 ACCESS_REGNO_P(REGNO)? \
364 (((MODE) == SImode || ((enum machine_mode) (MODE) == Pmode)) \
365 && (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))) : \
366 0)
367
368 #define HARD_REGNO_RENAME_OK(FROM, TO) \
369 s390_hard_regno_rename_ok (FROM, TO)
370
371 #define MODES_TIEABLE_P(MODE1, MODE2) \
372 (((MODE1) == SFmode || (MODE1) == DFmode) \
373 == ((MODE2) == SFmode || (MODE2) == DFmode))
374
375 /* Maximum number of registers to represent a value of mode MODE
376 in a register of class CLASS. */
377 #define CLASS_MAX_NREGS(CLASS, MODE) \
378 ((CLASS) == FP_REGS ? \
379 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
380 (CLASS) == ACCESS_REGS ? \
381 (GET_MODE_SIZE (MODE) + 4 - 1) / 4 : \
382 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
383
384 /* If a 4-byte value is loaded into a FPR, it is placed into the
385 *upper* half of the register, not the lower. Therefore, we
386 cannot use SUBREGs to switch between modes in FP registers.
387 Likewise for access registers, since they have only half the
388 word size on 64-bit. */
389 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
390 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
391 ? reg_classes_intersect_p (FP_REGS, CLASS) \
392 || reg_classes_intersect_p (ACCESS_REGS, CLASS) : 0)
393
394 /* Register classes. */
395
396 /* We use the following register classes:
397 GENERAL_REGS All general purpose registers
398 ADDR_REGS All general purpose registers except %r0
399 (These registers can be used in address generation)
400 FP_REGS All floating point registers
401 CC_REGS The condition code register
402 ACCESS_REGS The access registers
403
404 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
405 ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
406 GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS
407 ADDR_CC_REGS Union of ADDR_REGS and CC_REGS
408
409 NO_REGS No registers
410 ALL_REGS All registers
411
412 Note that the 'fake' frame pointer and argument pointer registers
413 are included amongst the address registers here. */
414
415 enum reg_class
416 {
417 NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
418 ADDR_CC_REGS, GENERAL_CC_REGS,
419 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
420 ALL_REGS, LIM_REG_CLASSES
421 };
422 #define N_REG_CLASSES (int) LIM_REG_CLASSES
423
424 #define REG_CLASS_NAMES \
425 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \
426 "ADDR_CC_REGS", "GENERAL_CC_REGS", \
427 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
428
429 /* Class -> register mapping. */
430 #define REG_CLASS_CONTENTS \
431 { \
432 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
433 { 0x00000000, 0x00000002 }, /* CC_REGS */ \
434 { 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \
435 { 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \
436 { 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \
437 { 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \
438 { 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \
439 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
440 { 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \
441 { 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \
442 { 0xffffffff, 0x0000003f }, /* ALL_REGS */ \
443 }
444
445 /* Register -> class mapping. */
446 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
447 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
448
449 /* ADDR_REGS can be used as base or index register. */
450 #define INDEX_REG_CLASS ADDR_REGS
451 #define BASE_REG_CLASS ADDR_REGS
452
453 /* Check whether REGNO is a hard register of the suitable class
454 or a pseudo register currently allocated to one such. */
455 #define REGNO_OK_FOR_INDEX_P(REGNO) \
456 (((REGNO) < FIRST_PSEUDO_REGISTER \
457 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
458 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
459 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
460
461
462 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
463 return the class of reg to actually use. */
464 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
465 s390_preferred_reload_class ((X), (CLASS))
466
467 /* We need a secondary reload when loading a PLUS which is
468 not a valid operand for LOAD ADDRESS. */
469 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
470 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
471
472 /* We need a secondary reload when storing a double-word
473 to a non-offsettable memory address. */
474 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
475 s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
476
477 /* We need secondary memory to move data between GPRs and FPRs. */
478 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
479 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
480
481 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
482 because the movsi and movsf patterns don't handle r/f moves. */
483 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
484 (GET_MODE_BITSIZE (MODE) < 32 \
485 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
486 : MODE)
487
488
489 /* Define various machine-dependent constraint letters. */
490
491 #define REG_CLASS_FROM_LETTER(C) \
492 ((C) == 'a' ? ADDR_REGS : \
493 (C) == 'd' ? GENERAL_REGS : \
494 (C) == 'f' ? FP_REGS : \
495 (C) == 'c' ? CC_REGS : \
496 (C) == 't' ? ACCESS_REGS : NO_REGS)
497
498 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR) \
499 s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
500
501 #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR) \
502 s390_const_double_ok_for_constraint_p ((VALUE), (C), (STR))
503
504 #define EXTRA_CONSTRAINT_STR(OP, C, STR) \
505 s390_extra_constraint_str ((OP), (C), (STR))
506 #define EXTRA_MEMORY_CONSTRAINT(C, STR) \
507 ((C) == 'Q' || (C) == 'R' || (C) == 'S' || (C) == 'T' || (C) == 'A')
508 #define EXTRA_ADDRESS_CONSTRAINT(C, STR) \
509 ((C) == 'U' || (C) == 'W' || (C) == 'Y')
510
511 #define CONSTRAINT_LEN(C, STR) \
512 ((C) == 'N' ? 5 : \
513 (C) == 'O' ? 2 : \
514 (C) == 'A' ? 2 : \
515 (C) == 'B' ? 2 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
516
517 /* Stack layout and calling conventions. */
518
519 /* Our stack grows from higher to lower addresses. However, local variables
520 are accessed by positive offsets, and function arguments are stored at
521 increasing addresses. */
522 #define STACK_GROWS_DOWNWARD
523 #define FRAME_GROWS_DOWNWARD 1
524 /* #undef ARGS_GROW_DOWNWARD */
525
526 /* The basic stack layout looks like this: the stack pointer points
527 to the register save area for called functions. Above that area
528 is the location to place outgoing arguments. Above those follow
529 dynamic allocations (alloca), and finally the local variables. */
530
531 /* Offset from stack-pointer to first location of outgoing args. */
532 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
533
534 /* Offset within stack frame to start allocating local variables at. */
535 #define STARTING_FRAME_OFFSET 0
536
537 /* Offset from the stack pointer register to an item dynamically
538 allocated on the stack, e.g., by `alloca'. */
539 extern int current_function_outgoing_args_size;
540 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
541 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
542
543 /* Offset of first parameter from the argument pointer register value.
544 We have a fake argument pointer register that points directly to
545 the argument area. */
546 #define FIRST_PARM_OFFSET(FNDECL) 0
547
548 /* Defining this macro makes __builtin_frame_address(0) and
549 __builtin_return_address(0) work with -fomit-frame-pointer. */
550 #define INITIAL_FRAME_ADDRESS_RTX \
551 (TARGET_PACKED_STACK ? \
552 plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) : \
553 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
554
555 /* The return address of the current frame is retrieved
556 from the initial value of register RETURN_REGNUM.
557 For frames farther back, we use the stack slot where
558 the corresponding RETURN_REGNUM register was saved. */
559 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
560 (TARGET_PACKED_STACK ? \
561 plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
562
563 #define RETURN_ADDR_RTX(COUNT, FRAME) \
564 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
565
566 /* In 31-bit mode, we need to mask off the high bit of return addresses. */
567 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
568
569
570 /* Exception handling. */
571
572 /* Describe calling conventions for DWARF-2 exception handling. */
573 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
574 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
575 #define DWARF_FRAME_RETURN_COLUMN 14
576
577 /* Describe how we implement __builtin_eh_return. */
578 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
579 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
580
581 /* Select a format to encode pointers in exception handling data. */
582 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
583 (flag_pic \
584 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
585 : DW_EH_PE_absptr)
586
587
588 /* Frame registers. */
589
590 #define STACK_POINTER_REGNUM 15
591 #define FRAME_POINTER_REGNUM 34
592 #define HARD_FRAME_POINTER_REGNUM 11
593 #define ARG_POINTER_REGNUM 32
594 #define RETURN_ADDRESS_POINTER_REGNUM 35
595
596 /* The static chain must be call-clobbered, but not used for
597 function argument passing. As register 1 is clobbered by
598 the trampoline code, we only have one option. */
599 #define STATIC_CHAIN_REGNUM 0
600
601 /* Number of hardware registers that go into the DWARF-2 unwind info.
602 To avoid ABI incompatibility, this number must not change even as
603 'fake' hard registers are added or removed. */
604 #define DWARF_FRAME_REGISTERS 34
605
606
607 /* Frame pointer and argument pointer elimination. */
608
609 #define FRAME_POINTER_REQUIRED 0
610
611 #define ELIMINABLE_REGS \
612 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
613 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
614 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
615 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
616 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
617 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
618 { BASE_REGNUM, BASE_REGNUM }}
619
620 #define CAN_ELIMINATE(FROM, TO) \
621 s390_can_eliminate ((FROM), (TO))
622
623 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
624 (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
625
626
627 /* Stack arguments. */
628
629 /* We need current_function_outgoing_args to be valid. */
630 #define ACCUMULATE_OUTGOING_ARGS 1
631
632 /* Return doesn't modify the stack. */
633 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
634
635
636 /* Register arguments. */
637
638 typedef struct s390_arg_structure
639 {
640 int gprs; /* gpr so far */
641 int fprs; /* fpr so far */
642 }
643 CUMULATIVE_ARGS;
644
645 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
646 ((CUM).gprs=0, (CUM).fprs=0)
647
648 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
649 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
650
651 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
652 s390_function_arg (&CUM, MODE, TYPE, NAMED)
653
654 /* Arguments can be placed in general registers 2 to 6,
655 or in floating point registers 0 and 2. */
656 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
657 (N) == 16 || (N) == 17)
658
659
660 /* Scalar return values. */
661
662 #define FUNCTION_VALUE(VALTYPE, FUNC) \
663 s390_function_value ((VALTYPE), VOIDmode)
664
665 #define LIBCALL_VALUE(MODE) \
666 s390_function_value (NULL, (MODE))
667
668 /* Only gpr 2 and fpr 0 are ever used as return registers. */
669 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
670
671
672 /* Function entry and exit. */
673
674 /* When returning from a function, the stack pointer does not matter. */
675 #define EXIT_IGNORE_STACK 1
676
677
678 /* Profiling. */
679
680 #define FUNCTION_PROFILER(FILE, LABELNO) \
681 s390_function_profiler ((FILE), ((LABELNO)))
682
683 #define PROFILE_BEFORE_PROLOGUE 1
684
685
686 /* Implementing the varargs macros. */
687
688 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
689 s390_va_start (valist, nextarg)
690
691 /* Trampolines for nested functions. */
692
693 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
694
695 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
696 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
697
698 #define TRAMPOLINE_TEMPLATE(FILE) \
699 s390_trampoline_template (FILE)
700
701
702 /* Addressing modes, and classification of registers for them. */
703
704 /* Recognize any constant value that is a valid address. */
705 #define CONSTANT_ADDRESS_P(X) 0
706
707 /* Maximum number of registers that can appear in a valid memory address. */
708 #define MAX_REGS_PER_ADDRESS 2
709
710 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
711 its validity for a certain class. We have two alternate definitions
712 for each of them. The usual definition accepts all pseudo regs; the
713 other rejects them all. The symbol REG_OK_STRICT causes the latter
714 definition to be used.
715
716 Most source files want to accept pseudo regs in the hope that they will
717 get allocated to the class that the insn wants them to be in.
718 Some source files that are used after register allocation
719 need to be strict. */
720
721 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
722 ((GET_MODE (X) == Pmode) && \
723 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
724 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
725
726 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
727
728 #define REG_OK_FOR_INDEX_STRICT_P(X) \
729 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
730
731 #define REG_OK_FOR_BASE_STRICT_P(X) \
732 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
733
734 #ifndef REG_OK_STRICT
735 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
736 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
737 #else
738 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
739 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
740 #endif
741
742 /* S/390 has no mode dependent addresses. */
743 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
744
745 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
746 valid memory address for an instruction.
747 The MODE argument is the machine mode for the MEM expression
748 that wants to use this address. */
749 #ifdef REG_OK_STRICT
750 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
751 { \
752 if (legitimate_address_p (MODE, X, 1)) \
753 goto ADDR; \
754 }
755 #else
756 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
757 { \
758 if (legitimate_address_p (MODE, X, 0)) \
759 goto ADDR; \
760 }
761 #endif
762
763 /* Try machine-dependent ways of modifying an illegitimate address
764 to be legitimate. If we find one, return the new, valid address.
765 This macro is used in only one place: `memory_address' in explow.c. */
766 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
767 { \
768 (X) = legitimize_address (X, OLDX, MODE); \
769 if (memory_address_p (MODE, X)) \
770 goto WIN; \
771 }
772
773 /* Try a machine-dependent way of reloading an illegitimate address
774 operand. If we find one, push the reload and jump to WIN. This
775 macro is used in only one place: `find_reloads_address' in reload.c. */
776 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
777 do { \
778 rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE)); \
779 if (new) \
780 { \
781 (AD) = new; \
782 goto WIN; \
783 } \
784 } while (0)
785
786 /* Nonzero if the constant value X is a legitimate general operand.
787 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
788 #define LEGITIMATE_CONSTANT_P(X) \
789 legitimate_constant_p (X)
790
791 /* Helper macro for s390.c and s390.md to check for symbolic constants. */
792 #define SYMBOLIC_CONST(X) \
793 (GET_CODE (X) == SYMBOL_REF \
794 || GET_CODE (X) == LABEL_REF \
795 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
796
797 #define TLS_SYMBOLIC_CONST(X) \
798 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
799 || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
800
801
802 /* Condition codes. */
803
804 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
805 return the mode to be used for the comparison. */
806 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
807
808 /* Canonicalize a comparison from one we don't have to one we do have. */
809 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
810 s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
811
812 /* Define the information needed to generate branch and scc insns. This is
813 stored from the compare operation. Note that we can't use "rtx" here
814 since it hasn't been defined! */
815 extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
816
817
818 /* Relative costs of operations. */
819
820 /* On s390, copy between fprs and gprs is expensive. */
821 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
822 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
823 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
824 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
825 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
826
827 /* A C expression for the cost of moving data of mode M between a
828 register and memory. A value of 2 is the default; this cost is
829 relative to those in `REGISTER_MOVE_COST'. */
830 #define MEMORY_MOVE_COST(M, C, I) 1
831
832 /* A C expression for the cost of a branch instruction. A value of 1
833 is the default; other values are interpreted relative to that. */
834 #define BRANCH_COST 1
835
836 /* Nonzero if access to memory by bytes is slow and undesirable. */
837 #define SLOW_BYTE_ACCESS 1
838
839 /* An integer expression for the size in bits of the largest integer machine
840 mode that should actually be used. We allow pairs of registers. */
841 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
842
843 /* The maximum number of bytes that a single instruction can move quickly
844 between memory and registers or between two memory locations. */
845 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
846 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
847 #define MAX_MOVE_MAX 16
848
849 /* Determine whether to use move_by_pieces or block move insn. */
850 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
851 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
852 || (TARGET_64BIT && (SIZE) == 8) )
853
854 /* Determine whether to use clear_by_pieces or block clear insn. */
855 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
856 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
857 || (TARGET_64BIT && (SIZE) == 8) )
858
859 /* This macro is used to determine whether store_by_pieces should be
860 called to "memset" storage with byte values other than zero, or
861 to "memcpy" storage when the source is a constant string. */
862 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
863
864 /* Don't perform CSE on function addresses. */
865 #define NO_FUNCTION_CSE
866
867
868 /* Sections. */
869
870 /* Output before read-only data. */
871 #define TEXT_SECTION_ASM_OP ".text"
872
873 /* Output before writable (initialized) data. */
874 #define DATA_SECTION_ASM_OP ".data"
875
876 /* Output before writable (uninitialized) data. */
877 #define BSS_SECTION_ASM_OP ".bss"
878
879 /* S/390 constant pool breaks the devices in crtstuff.c to control section
880 in where code resides. We have to write it as asm code. */
881 #ifndef __s390x__
882 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
883 asm (SECTION_OP "\n\
884 bras\t%r2,1f\n\
885 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
886 1: l\t%r3,0(%r2)\n\
887 bas\t%r14,0(%r3,%r2)\n\
888 .previous");
889 #endif
890
891
892 /* Position independent code. */
893
894 extern int flag_pic;
895
896 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
897
898 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
899
900
901 /* Assembler file format. */
902
903 /* Character to start a comment. */
904 #define ASM_COMMENT_START "#"
905
906 /* Declare an uninitialized external linkage data object. */
907 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
908 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
909
910 /* Globalizing directive for a label. */
911 #define GLOBAL_ASM_OP ".globl "
912
913 /* Advance the location counter to a multiple of 2**LOG bytes. */
914 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
915 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
916
917 /* Advance the location counter by SIZE bytes. */
918 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
919 fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
920
921 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
922 #define LOCAL_LABEL_PREFIX "."
923
924 /* How to refer to registers in assembler output. This sequence is
925 indexed by compiler's hard-register-number (see above). */
926 #define REGISTER_NAMES \
927 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
928 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
929 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
930 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
931 "%ap", "%cc", "%fp", "%rp", "%a0", "%a1" \
932 }
933
934 /* Print operand X (an rtx) in assembler syntax to file FILE. */
935 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
936 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
937
938 /* Output machine-dependent UNSPECs in address constants. */
939 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \
940 do { \
941 if (!s390_output_addr_const_extra (FILE, (X))) \
942 goto FAIL; \
943 } while (0);
944
945 /* Output an element of a case-vector that is absolute. */
946 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
947 do { \
948 char buf[32]; \
949 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
950 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
951 assemble_name ((FILE), buf); \
952 fputc ('\n', (FILE)); \
953 } while (0)
954
955 /* Output an element of a case-vector that is relative. */
956 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
957 do { \
958 char buf[32]; \
959 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
960 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
961 assemble_name ((FILE), buf); \
962 fputc ('-', (FILE)); \
963 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
964 assemble_name ((FILE), buf); \
965 fputc ('\n', (FILE)); \
966 } while (0)
967
968
969 /* Miscellaneous parameters. */
970
971 /* Specify the machine mode that this machine uses for the index in the
972 tablejump instruction. */
973 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
974
975 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
976 is done just by pretending it is already truncated. */
977 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
978
979 /* Specify the machine mode that pointers have.
980 After generation of rtl, the compiler makes no further distinction
981 between pointers and any other objects of this machine mode. */
982 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
983
984 /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
985 #define POINTERS_EXTEND_UNSIGNED -1
986
987 /* A function address in a call instruction is a byte address (for
988 indexing purposes) so give the MEM rtx a byte's mode. */
989 #define FUNCTION_MODE QImode
990
991 /* Specify the value which is used when clz operand is zero. */
992 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
993
994 /* Machine-specific symbol_ref flags. */
995 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
996
997 /* Check whether integer displacement is in range. */
998 #define DISP_IN_RANGE(d) \
999 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
1000 : ((d) >= 0 && (d) <= 4095))
1001
1002 #endif