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[gcc.git] / gcc / config / s390 / s390.h
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #ifndef _S390_H
23 #define _S390_H
24
25 extern int flag_pic;
26
27 /* Run-time compilation parameters selecting different hardware subsets. */
28
29 extern int target_flags;
30
31 /* Target macros checked at runtime of compiler. */
32
33 #define TARGET_HARD_FLOAT (target_flags & 1)
34 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
35 #define TARGET_BACKCHAIN (target_flags & 2)
36 #define TARGET_SMALL_EXEC (target_flags & 4)
37 #define TARGET_DEBUG_ARG (target_flags & 8)
38 #define TARGET_64BIT (target_flags & 16)
39 #define TARGET_MVCLE (target_flags & 32)
40
41 #ifdef DEFAULT_TARGET_64BIT
42 #define TARGET_DEFAULT 0x13
43 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
44 #else
45 #define TARGET_DEFAULT 0x3
46 #define TARGET_VERSION fprintf (stderr, " (S/390)");
47 #endif
48
49
50 /* Macro to define tables used to set the flags. This is a list in braces
51 of pairs in braces, each pair being { "NAME", VALUE }
52 where VALUE is the bits to set or minus the bits to clear.
53 An empty string NAME is used to identify the default VALUE. */
54
55 #define TARGET_SWITCHES \
56 { { "hard-float", 1, N_("Use hardware fp")}, \
57 { "soft-float", -1, N_("Don't use hardware fp")}, \
58 { "backchain", 2, N_("Set backchain")}, \
59 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
60 { "small-exec", 4, N_("Use bras for execucable < 64k")}, \
61 { "no-small-exec",-4, N_("Don't use bras")}, \
62 { "debug", 8, N_("Additional debug prints")}, \
63 { "no-debug", -8, N_("Don't print additional debug prints")}, \
64 { "64", 16, N_("64 bit mode")}, \
65 { "31", -16, N_("31 bit mode")}, \
66 { "mvcle", 32, N_("mvcle use")}, \
67 { "no-mvcle", -32, N_("mvc&ex")}, \
68 { "", TARGET_DEFAULT, 0 } }
69
70 /* Define this to change the optimizations performed by default. */
71 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
72
73 /* Sometimes certain combinations of command options do not make sense
74 on a particular target machine. You can define a macro
75 `OVERRIDE_OPTIONS' to take account of this. This macro, if
76 defined, is executed once just after all the command options have
77 been parsed. */
78 #define OVERRIDE_OPTIONS override_options ()
79
80
81 /* Defines for REAL_ARITHMETIC. */
82 #define IEEE_FLOAT 1
83 #define TARGET_IBM_FLOAT 0
84 #define TARGET_IEEE_FLOAT 1
85
86 /* The current function count for create unique internal labels. */
87
88 extern int s390_function_count;
89
90 /* The amount of space used for outgoing arguments. */
91
92 extern int current_function_outgoing_args_size;
93
94 /* Target machine storage layout. */
95
96 /* Define this if most significant bit is lowest numbered in instructions
97 that operate on numbered bit-fields. */
98
99 #define BITS_BIG_ENDIAN 1
100
101 /* Define this if most significant byte of a word is the lowest numbered. */
102
103 #define BYTES_BIG_ENDIAN 1
104
105 /* Define this if MS word of a multiword is the lowest numbered. */
106
107 #define WORDS_BIG_ENDIAN 1
108
109 /* Number of bits in an addressable storage unit. */
110
111 #define BITS_PER_UNIT 8
112
113 /* Width in bits of a "word", which is the contents of a machine register. */
114
115 #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
116 #define MAX_BITS_PER_WORD 64
117
118 /* Width of a word, in units (bytes). */
119
120 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
121 #define MIN_UNITS_PER_WORD 4
122
123 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
124
125 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
126
127 /* A C expression for the size in bits of the type `short' on the
128 target machine. If you don't define this, the default is half a
129 word. (If this would be less than one storage unit, it is
130 rounded up to one unit.) */
131 #define SHORT_TYPE_SIZE 16
132
133 /* A C expression for the size in bits of the type `int' on the
134 target machine. If you don't define this, the default is one
135 word. */
136 #define INT_TYPE_SIZE 32
137
138 /* A C expression for the size in bits of the type `long' on the
139 target machine. If you don't define this, the default is one
140 word. */
141 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
142 #define MAX_LONG_TYPE_SIZE 64
143
144 /* A C expression for the size in bits of the type `long long' on the
145 target machine. If you don't define this, the default is two
146 words. */
147 #define LONG_LONG_TYPE_SIZE 64
148
149 /* Right now we only support two floating point formats, the
150 32 and 64 bit ieee formats. */
151
152 #define FLOAT_TYPE_SIZE 32
153 #define DOUBLE_TYPE_SIZE 64
154 #define LONG_DOUBLE_TYPE_SIZE 64
155
156 /* Define this macro if it is advisable to hold scalars in registers
157 in a wider mode than that declared by the program. In such cases,
158 the value is constrained to be within the bounds of the declared
159 type, but kept valid in the wider mode. The signedness of the
160 extension may differ from that of the type. */
161
162 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
163 if (INTEGRAL_MODE_P (MODE) && \
164 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
165 (MODE) = Pmode; \
166 }
167
168 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
169 extensions applied to char/short functions arguments. Defining
170 PROMOTE_FUNCTION_RETURN does the same for function returns. */
171
172 #define PROMOTE_FUNCTION_ARGS
173 #define PROMOTE_FUNCTION_RETURN
174 #define PROMOTE_FOR_CALL_ONLY
175
176 /* Allocation boundary (in *bits*) for storing pointers in memory. */
177
178 #define POINTER_BOUNDARY 32
179
180 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
181
182 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
183
184 /* Boundary (in *bits*) on which stack pointer should be aligned. */
185
186 #define STACK_BOUNDARY 64
187
188 /* Allocation boundary (in *bits*) for the code of a function. */
189
190 #define FUNCTION_BOUNDARY 32
191
192 /* There is no point aligning anything to a rounder boundary than this. */
193
194 #define BIGGEST_ALIGNMENT 64
195
196 /* Alignment of field after `int : 0' in a structure. */
197
198 #define EMPTY_FIELD_BOUNDARY 32
199
200 /* Alignment on even addresses for LARL instruction. */
201
202 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
203
204 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
205
206 /* Define this if move instructions will actually fail to work when given
207 unaligned data. */
208
209 #define STRICT_ALIGNMENT 0
210
211 /* real arithmetic */
212
213 #define REAL_ARITHMETIC
214
215 /* Define target floating point format. */
216
217 #undef TARGET_FLOAT_FORMAT
218 #ifdef IEEE_FLOAT
219 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
220 #else
221 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
222 #endif
223
224 /* Define if special allocation order desired. */
225
226 #define REG_ALLOC_ORDER \
227 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
228 16, 17, 18, 19, 20, 21, 22, 23, \
229 24, 25, 26, 27, 28, 29, 30, 31, \
230 15, 32, 33 }
231
232 /* Standard register usage. */
233
234 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
235 #ifdef IEEE_FLOAT
236 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
237 #else
238 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
239 #endif
240 #define CC_REGNO_P(N) ( (N) == 33 )
241
242 /* Number of actual hardware registers. The hardware registers are
243 assigned numbers for the compiler from 0 to just below
244 FIRST_PSEUDO_REGISTER.
245 All registers that the compiler knows about must be given numbers,
246 even those that are not normally considered general registers.
247 For the 390, we give the data registers numbers 0-15,
248 and the floating point registers numbers 16-19.
249 G5 and following have 16 IEEE floating point register,
250 which get numbers 16-31. */
251
252 #define FIRST_PSEUDO_REGISTER 35
253
254 /* Number of hardware registers that go into the DWARF-2 unwind info.
255 If not defined, equals FIRST_PSEUDO_REGISTER. */
256
257 #define DWARF_FRAME_REGISTERS 34
258
259 /* The following register have a fix usage
260 GPR 12: GOT register points to the GOT, setup in prologue,
261 GOT contains pointer to variables in shared libraries
262 GPR 13: Base register setup in prologue to point to the
263 literal table of each function
264 GPR 14: Return registers holds the return address
265 GPR 15: Stack pointer */
266
267 #define PIC_OFFSET_TABLE_REGNUM 12
268 #define BASE_REGISTER 13
269 #define RETURN_REGNUM 14
270 #define STACK_POINTER_REGNUM 15
271
272 #define FIXED_REGISTERS \
273 { 0, 0, 0, 0, \
274 0, 0, 0, 0, \
275 0, 0, 0, 0, \
276 0, 1, 1, 1, \
277 0, 0, 0, 0, \
278 0, 0, 0, 0, \
279 0, 0, 0, 0, \
280 0, 0, 0, 0, \
281 1, 1, 1 }
282
283 /* 1 for registers not available across function calls. These must include
284 the FIXED_REGISTERS and also any registers that can be used without being
285 saved.
286 The latter must include the registers where values are returned
287 and the register where structure-value addresses are passed. */
288
289 #define CALL_USED_REGISTERS \
290 { 1, 1, 1, 1, \
291 1, 1, 0, 0, \
292 0, 0, 0, 0, \
293 0, 1, 1, 1, \
294 1, 1, 1, 1, \
295 1, 1, 1, 1, \
296 1, 1, 1, 1, \
297 1, 1, 1, 1, \
298 1, 1, 1 }
299
300 /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
301 the entire set of `FIXED_REGISTERS' be included.
302 (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */
303
304 #define CALL_REALLY_USED_REGISTERS \
305 { 1, 1, 1, 1, \
306 1, 1, 0, 0, \
307 0, 0, 0, 0, \
308 0, 0, 0, 0, \
309 1, 1, 1, 1, \
310 1, 1, 1, 1, \
311 1, 1, 1, 1, \
312 1, 1, 1, 1, \
313 1, 1, 1 }
314
315 /* Macro to conditionally modify fixed_regs/call_used_regs. */
316
317 #define CONDITIONAL_REGISTER_USAGE \
318 do \
319 { \
320 int i; \
321 \
322 if (flag_pic) \
323 { \
324 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
325 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
326 } \
327 if (TARGET_64BIT) \
328 { \
329 for (i = 24; i < 32; i++) \
330 call_used_regs[i] = call_really_used_regs[i] = 0; \
331 } \
332 else \
333 { \
334 for (i = 18; i < 20; i++) \
335 call_used_regs[i] = call_really_used_regs[i] = 0; \
336 } \
337 } while (0)
338
339 /* The following register have a special usage
340 GPR 11: Frame pointer if needed to point to automatic variables.
341 GPR 32: In functions with more the 5 args this register
342 points to that arguments, it is always eliminated
343 with stack- or frame-pointer.
344 GPR 33: Condition code 'register' */
345
346 #define HARD_FRAME_POINTER_REGNUM 11
347 #define FRAME_POINTER_REGNUM 34
348
349 #define ARG_POINTER_REGNUM 32
350
351 #define CC_REGNUM 33
352
353 /* We use the register %r0 to pass the static chain to a nested function.
354
355 Note: It is assumed that this register is call-clobbered!
356 We can't use any of the function-argument registers either,
357 and register 1 is needed by the trampoline code, so we have
358 no other choice but using this one ... */
359
360 #define STATIC_CHAIN_REGNUM 0
361
362 /* Return number of consecutive hard regs needed starting at reg REGNO
363 to hold something of mode MODE.
364 This is ordinarily the length in words of a value of mode MODE
365 but can be less for certain modes in special long registers. */
366
367 #define HARD_REGNO_NREGS(REGNO, MODE) \
368 (FLOAT_REGNO_P(REGNO)? \
369 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
370 INT_REGNO_P(REGNO)? \
371 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
372 1)
373
374 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
375 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
376 Even gprs can hold DI.
377 The floating point registers can hold DF, SF, DC and SC. */
378
379 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
380 (FLOAT_REGNO_P(REGNO)? \
381 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
382 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT || \
383 (MODE) == SImode || (MODE) == DImode) : \
384 INT_REGNO_P(REGNO)? \
385 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
386 CC_REGNO_P(REGNO)? \
387 GET_MODE_CLASS (MODE) == MODE_CC : \
388 0)
389
390 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
391 mode MODE1 and one has mode MODE2.
392 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
393 for any hard reg, then this must be 0 for correct output. */
394
395 #define MODES_TIEABLE_P(MODE1, MODE2) \
396 (((MODE1) == SFmode || (MODE1) == DFmode) \
397 == ((MODE2) == SFmode || (MODE2) == DFmode))
398
399 /* If defined, gives a class of registers that cannot be used as the
400 operand of a SUBREG that changes the mode of the object illegally. */
401
402 #define CLASS_CANNOT_CHANGE_MODE FP_REGS
403
404 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
405
406 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
407 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
408
409 /* Define this macro if references to a symbol must be treated
410 differently depending on something about the variable or
411 function named by the symbol (such as what section it is in).
412
413 On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol
414 so that we may access it directly in the GOT. */
415
416 #define ENCODE_SECTION_INFO(DECL) \
417 do \
418 { \
419 if (flag_pic) \
420 { \
421 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
422 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
423 \
424 if (GET_CODE (rtl) == MEM) \
425 { \
426 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
427 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
428 || ! TREE_PUBLIC (DECL)); \
429 } \
430 } \
431 } \
432 while (0)
433
434
435 /* This is an array of structures. Each structure initializes one pair
436 of eliminable registers. The "from" register number is given first,
437 followed by "to". Eliminations of the same "from" register are listed
438 in order of preference. */
439
440 #define ELIMINABLE_REGS \
441 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
442 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
443 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
444 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
445
446 #define CAN_ELIMINATE(FROM, TO) (1)
447
448 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
449 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
450 { (OFFSET) = 0; } \
451 else if ((FROM) == FRAME_POINTER_REGNUM \
452 && (TO) == HARD_FRAME_POINTER_REGNUM) \
453 { (OFFSET) = 0; } \
454 else if ((FROM) == ARG_POINTER_REGNUM \
455 && (TO) == HARD_FRAME_POINTER_REGNUM) \
456 { (OFFSET) = s390_arg_frame_offset (); } \
457 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
458 { (OFFSET) = s390_arg_frame_offset (); } \
459 else \
460 abort(); \
461 }
462
463 #define CAN_DEBUG_WITHOUT_FP
464
465 /* Value should be nonzero if functions must have frame pointers.
466 Zero means the frame pointer need not be set up (and parms may be
467 accessed via the stack pointer) in functions that seem suitable.
468 This is computed in `reload', in reload1.c. */
469
470 #define FRAME_POINTER_REQUIRED 0
471
472 /* Define the classes of registers for register constraints in the
473 machine description. Also define ranges of constants.
474
475 One of the classes must always be named ALL_REGS and include all hard regs.
476 If there is more than one class, another class must be named NO_REGS
477 and contain no registers.
478
479 The name GENERAL_REGS must be the name of a class (or an alias for
480 another name such as ALL_REGS). This is the class of registers
481 that is allowed by "g" or "r" in a register constraint.
482 Also, registers outside this class are allocated only when
483 instructions express preferences for them.
484
485 The classes must be numbered in nondecreasing order; that is,
486 a larger-numbered class must never be contained completely
487 in a smaller-numbered class.
488
489 For any two classes, it is very desirable that there be another
490 class that represents their union. */
491
492 /*#define SMALL_REGISTER_CLASSES 1*/
493
494 enum reg_class
495 {
496 NO_REGS, ADDR_REGS, GENERAL_REGS,
497 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
498 ALL_REGS, LIM_REG_CLASSES
499 };
500
501 #define N_REG_CLASSES (int) LIM_REG_CLASSES
502
503 /* Give names of register classes as strings for dump file. */
504
505 #define REG_CLASS_NAMES \
506 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS", \
507 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
508
509 /* Define which registers fit in which classes. This is an initializer for
510 a vector of HARD_REG_SET of length N_REG_CLASSES.
511 G5 and latter have 16 register and support IEEE floating point operations. */
512
513 #define REG_CLASS_CONTENTS \
514 { \
515 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
516 { 0x0000fffe, 0x00000005 }, /* ADDR_REGS */ \
517 { 0x0000ffff, 0x00000005 }, /* GENERAL_REGS */ \
518 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
519 { 0xfffffffe, 0x00000005 }, /* ADDR_FP_REGS */ \
520 { 0xffffffff, 0x00000005 }, /* GENERAL_FP_REGS */ \
521 { 0xffffffff, 0x00000007 }, /* ALL_REGS */ \
522 }
523
524
525 /* The same information, inverted:
526 Return the class number of the smallest class containing
527 reg number REGNO. This could be a conditional expression
528 or could index an array. */
529
530 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
531
532 extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
533
534 /* The class value for index registers, and the one for base regs. */
535
536 #define INDEX_REG_CLASS ADDR_REGS
537 #define BASE_REG_CLASS ADDR_REGS
538
539 /* Get reg_class from a letter such as appears in the machine description. */
540
541 #define REG_CLASS_FROM_LETTER(C) \
542 ((C) == 'a' ? ADDR_REGS : \
543 (C) == 'd' ? GENERAL_REGS : \
544 (C) == 'f' ? FP_REGS : NO_REGS)
545
546 /* The letters I, J, K, L and M in a register constraint string can be used
547 to stand for particular ranges of immediate operands.
548 This macro defines what the ranges are.
549 C is the letter, and VALUE is a constant value.
550 Return 1 if VALUE is in the range specified by C. */
551
552 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
553 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
554 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
555 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
556 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
557
558 /* Similar, but for floating constants, and defining letters G and H.
559 Here VALUE is the CONST_DOUBLE rtx itself. */
560
561 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
562
563 /* 'Q' means a memory-reference for a S-type operand. */
564
565 #define EXTRA_CONSTRAINT(OP, C) \
566 ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \
567 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
568
569 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
570 return the class of reg to actually use. In general this is just CLASS;
571 but on some machines in some cases it is preferable to use a more
572 restrictive class. */
573
574 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
575 s390_preferred_reload_class ((X), (CLASS))
576
577 /* Return the maximum number of consecutive registers needed to represent
578 mode MODE in a register of class CLASS. */
579
580 #define CLASS_MAX_NREGS(CLASS, MODE) \
581 ((CLASS) == FP_REGS ? \
582 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
583 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
584
585 /* We need a secondary reload when loading a PLUS which is
586 not a valid operand for LOAD ADDRESS. */
587
588 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
589 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
590
591 /* If we are copying between FP registers and anything else, we need a memory
592 location. */
593
594 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
595 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
596
597 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
598 because the movsi and movsf patterns don't handle r/f moves. */
599
600 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
601 (GET_MODE_BITSIZE (MODE) < 32 \
602 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
603 : MODE)
604
605
606 /* A C expression whose value is nonzero if pseudos that have been
607 assigned to registers of class CLASS would likely be spilled
608 because registers of CLASS are needed for spill registers.
609
610 The default value of this macro returns 1 if CLASS has exactly one
611 register and zero otherwise. On most machines, this default
612 should be used. Only define this macro to some other expression
613 if pseudo allocated by `local-alloc.c' end up in memory because
614 their hard registers were needed for spill registers. If this
615 macro returns nonzero for those classes, those pseudos will only
616 be allocated by `global.c', which knows how to reallocate the
617 pseudo to another register. If there would not be another
618 register available for reallocation, you should not change the
619 definition of this macro since the only effect of such a
620 definition would be to slow down register allocation. */
621
622 /* Stack layout; function entry, exit and calling. */
623
624 /* The return address of the current frame is retrieved
625 from the initial value of register RETURN_REGNUM.
626 For frames farther back, we use the stack slot where
627 the corresponding RETURN_REGNUM register was saved. */
628
629 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
630 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
631 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
632
633 #define RETURN_ADDR_RTX(COUNT, FRAME) \
634 ((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, RETURN_REGNUM) : \
635 gen_rtx_MEM (Pmode, \
636 memory_address (Pmode, \
637 plus_constant (DYNAMIC_CHAIN_ADDRESS ((FRAME)), \
638 RETURN_REGNUM * UNITS_PER_WORD))))
639
640 /* The following macros will turn on dwarf2 exception hndling
641 Other code location for this exception handling are
642 in s390.md (eh_return insn) and in linux.c in the prologue. */
643
644 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
645
646 /* We have 31 bit mode. */
647
648 #define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff))
649
650 /* The offset from the incoming value of %sp to the top of the stack frame
651 for the current function. */
652
653 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
654
655 /* Location, from where return address to load. */
656
657 #define DWARF_FRAME_RETURN_COLUMN 14
658
659 /* Describe how we implement __builtin_eh_return. */
660 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
661 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
662 #define EH_RETURN_HANDLER_RTX \
663 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
664 TARGET_64BIT? -48 : -40))
665
666 /* Define this if pushing a word on the stack makes the stack pointer a
667 smaller address. */
668
669 #define STACK_GROWS_DOWNWARD
670
671 /* Define this if the nominal address of the stack frame is at the
672 high-address end of the local variables; that is, each additional local
673 variable allocated goes at a more negative offset in the frame. */
674
675 /* #define FRAME_GROWS_DOWNWARD */
676
677 /* Offset from stack-pointer to first location of outgoing args. */
678
679 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
680
681 /* Offset within stack frame to start allocating local variables at.
682 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
683 first local allocated. Otherwise, it is the offset to the BEGINNING
684 of the first local allocated. */
685
686 #define STARTING_FRAME_OFFSET \
687 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
688
689 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
690
691 /* If we generate an insn to push BYTES bytes, this says how many the stack
692 pointer really advances by. On S/390, we have no push instruction. */
693
694 /* #define PUSH_ROUNDING(BYTES) */
695
696 /* Accumulate the outgoing argument count so we can request the right
697 DSA size and determine stack offset. */
698
699 #define ACCUMULATE_OUTGOING_ARGS 1
700
701 /* Offset from the stack pointer register to an item dynamically
702 allocated on the stack, e.g., by `alloca'.
703
704 The default value for this macro is `STACK_POINTER_OFFSET' plus the
705 length of the outgoing arguments. The default is correct for most
706 machines. See `function.c' for details. */
707 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
708
709 /* Offset of first parameter from the argument pointer register value.
710 On the S/390, we define the argument pointer to the start of the fixed
711 area. */
712 #define FIRST_PARM_OFFSET(FNDECL) 0
713
714 /* Define this if stack space is still allocated for a parameter passed
715 in a register. The value is the number of bytes allocated to this
716 area. */
717 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
718
719 /* Define this if the above stack space is to be considered part of the
720 space allocated by the caller. */
721 /* #define OUTGOING_REG_PARM_STACK_SPACE */
722
723 /* 1 if N is a possible register number for function argument passing.
724 On S390, general registers 2 - 6 and floating point register 0 and 2
725 are used in this way. */
726
727 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
728 (N) == 16 || (N) == 17)
729
730 /* Define a data type for recording info about an argument list during
731 the scan of that argument list. This data type should hold all
732 necessary information about the function itself and about the args
733 processed so far, enough to enable macros such as FUNCTION_ARG to
734 determine where the next arg should go. */
735
736 typedef struct s390_arg_structure
737 {
738 int gprs; /* gpr so far */
739 int fprs; /* fpr so far */
740 }
741 CUMULATIVE_ARGS;
742
743
744 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
745 a function whose data type is FNTYPE.
746 For a library call, FNTYPE is 0. */
747
748 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
749 ((CUM).gprs=0, (CUM).fprs=0)
750
751 /* Update the data in CUM to advance over an argument of mode MODE and
752 data type TYPE. (TYPE is null for libcalls where that information
753 may not be available.) */
754
755 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
756 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
757
758 /* Define where to put the arguments to a function. Value is zero to push
759 the argument on the stack, or a hard register in which to store the
760 argument. */
761
762 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
763 s390_function_arg (&CUM, MODE, TYPE, NAMED)
764
765 /* Define where to expect the arguments of a function. Value is zero, if
766 the argument is on the stack, or a hard register in which the argument
767 is stored. It is the same like FUNCTION_ARG, except for unnamed args
768 That means, that all in case of varargs used, the arguments are expected
769 from the stack.
770 S/390 has already space on the stack for args coming in registers,
771 they are pushed in prologue, if needed. */
772
773
774 /* Define the `__builtin_va_list' type. */
775
776 #define BUILD_VA_LIST_TYPE(VALIST) \
777 (VALIST) = s390_build_va_list ()
778
779 /* Implement `va_start' for varargs and stdarg. */
780
781 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
782 s390_va_start (stdarg, valist, nextarg)
783
784 /* Implement `va_arg'. */
785
786 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
787 s390_va_arg (valist, type)
788
789 /* For an arg passed partly in registers and partly in memory, this is the
790 number of registers used. For args passed entirely in registers or
791 entirely in memory, zero. */
792
793 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
794
795
796 /* Define if returning from a function call automatically pops the
797 arguments described by the number-of-args field in the call. */
798
799 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
800
801
802 /* Define how to find the value returned by a function. VALTYPE is the
803 data type of the value (as a tree).
804 If the precise function being called is known, FUNC is its FUNCTION_DECL;
805 otherwise, FUNC is 15. */
806
807 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
808 || TARGET_SOFT_FLOAT ) ? 2 : 16)
809
810
811 /* for structs the address is passed, and the Callee makes a
812 copy, only if needed */
813
814 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
815 s390_function_arg_pass_by_reference (MODE, TYPE)
816
817
818 /* Register 2 (and 3) for integral values
819 or floating point register 0 (and 2) for fp values are used. */
820
821 #define FUNCTION_VALUE(VALTYPE, FUNC) \
822 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
823 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
824 || POINTER_TYPE_P (VALTYPE) \
825 ? word_mode : TYPE_MODE (VALTYPE), \
826 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
827
828 /* Define how to find the value returned by a library function assuming
829 the value has mode MODE. */
830
831 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
832
833 /* 1 if N is a possible register number for a function value. */
834
835 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
836
837 /* The definition of this macro implies that there are cases where
838 a scalar value cannot be returned in registers. */
839
840 #define RETURN_IN_MEMORY(type) \
841 (TYPE_MODE (type) == BLKmode || \
842 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
843 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
844
845 /* Mode of stack savearea.
846 FUNCTION is VOIDmode because calling convention maintains SP.
847 BLOCK needs Pmode for SP.
848 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
849
850 #define STACK_SAVEAREA_MODE(LEVEL) \
851 (LEVEL == SAVE_FUNCTION ? VOIDmode \
852 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
853
854 /* Structure value address is passed as invisible first argument (gpr 2). */
855
856 #define STRUCT_VALUE 0
857
858 /* This macro definition sets up a default value for `main' to return. */
859
860 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
861
862 /* Length in units of the trampoline for entering a nested function. */
863
864 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
865
866 /* Initialize the dynamic part of trampoline. */
867
868 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
869 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
870
871 /* Template for constant part of trampoline. */
872
873 #define TRAMPOLINE_TEMPLATE(FILE) \
874 s390_trampoline_template (FILE)
875
876 /* Output assembler code to FILE to increment profiler label # LABELNO
877 for profiling a function entry. */
878
879 #define FUNCTION_PROFILER(FILE, LABELNO) \
880 s390_function_profiler ((FILE), ((LABELNO)))
881
882 /* #define PROFILE_BEFORE_PROLOGUE */
883
884 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
885 pointer does not matter (provided there is a frame pointer). */
886
887 #define EXIT_IGNORE_STACK 1
888
889 /* Addressing modes, and classification of registers for them. */
890
891 /* #define HAVE_POST_INCREMENT */
892 /* #define HAVE_POST_DECREMENT */
893
894 /* #define HAVE_PRE_DECREMENT */
895 /* #define HAVE_PRE_INCREMENT */
896
897 /* These assume that REGNO is a hard or pseudo reg number. They give
898 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
899 reg currently allocated to a suitable hard reg.
900 These definitions are NOT overridden anywhere. */
901
902 #define REGNO_OK_FOR_INDEX_P(REGNO) \
903 (((REGNO) < FIRST_PSEUDO_REGISTER \
904 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
905 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
906
907 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
908
909 #define REGNO_OK_FOR_DATA_P(REGNO) \
910 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
911
912 #define REGNO_OK_FOR_FP_P(REGNO) \
913 FLOAT_REGNO_P (REGNO)
914
915 /* Now macros that check whether X is a register and also,
916 strictly, whether it is in a specified class. */
917
918 /* 1 if X is a data register. */
919
920 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
921
922 /* 1 if X is an fp register. */
923
924 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
925
926 /* 1 if X is an address register. */
927
928 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
929
930 /* Maximum number of registers that can appear in a valid memory address. */
931
932 #define MAX_REGS_PER_ADDRESS 2
933
934 /* Recognize any constant value that is a valid address. */
935
936 #define CONSTANT_ADDRESS_P(X) 0
937
938 #define SYMBOLIC_CONST(X) \
939 (GET_CODE (X) == SYMBOL_REF \
940 || GET_CODE (X) == LABEL_REF \
941 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
942
943 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
944 they have to be forced to constant pool
945 CONST_INT have to be forced into constant pool, if greater than
946 64k. Depending on the insn they have to be force into constant pool
947 for smaller value; in this case we have to work with nonimmediate operand. */
948
949 #define LEGITIMATE_PIC_OPERAND_P(X) \
950 legitimate_pic_operand_p (X)
951
952 /* Nonzero if the constant value X is a legitimate general operand.
953 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
954
955 #define LEGITIMATE_CONSTANT_P(X) \
956 legitimate_constant_p (X)
957
958 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
959 its validity for a certain class. We have two alternate definitions
960 for each of them. The usual definition accepts all pseudo regs; the
961 other rejects them all. The symbol REG_OK_STRICT causes the latter
962 definition to be used.
963
964 Most source files want to accept pseudo regs in the hope that they will
965 get allocated to the class that the insn wants them to be in.
966 Some source files that are used after register allocation
967 need to be strict. */
968
969 /*
970 * Nonzero if X is a hard reg that can be used as an index or if it is
971 * a pseudo reg.
972 */
973
974 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
975 ((GET_MODE (X) == Pmode) && \
976 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
977 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
978
979 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
980 a pseudo reg. */
981
982 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
983
984 /* Nonzero if X is a hard reg that can be used as an index. */
985
986 #define REG_OK_FOR_INDEX_STRICT_P(X) \
987 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
988
989 /* Nonzero if X is a hard reg that can be used as a base reg. */
990
991 #define REG_OK_FOR_BASE_STRICT_P(X) \
992 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
993
994
995 #ifndef REG_OK_STRICT
996 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
997 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
998 #else
999 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1000 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1001 #endif
1002
1003
1004 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1005 valid memory address for an instruction.
1006 The MODE argument is the machine mode for the MEM expression
1007 that wants to use this address.
1008
1009 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1010 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1011
1012 #ifdef REG_OK_STRICT
1013 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1014 { \
1015 if (legitimate_address_p (MODE, X, 1)) \
1016 goto ADDR; \
1017 }
1018 #else
1019 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1020 { \
1021 if (legitimate_address_p (MODE, X, 0)) \
1022 goto ADDR; \
1023 }
1024 #endif
1025
1026
1027 /* S/390 has no mode dependent addresses. */
1028
1029 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1030
1031 /* Try machine-dependent ways of modifying an illegitimate address
1032 to be legitimate. If we find one, return the new, valid address.
1033 This macro is used in only one place: `memory_address' in explow.c. */
1034
1035 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1036 { \
1037 (X) = legitimize_address (X, OLDX, MODE); \
1038 if (memory_address_p (MODE, X)) \
1039 goto WIN; \
1040 }
1041
1042 /* Specify the machine mode that this machine uses for the index in the
1043 tablejump instruction. */
1044
1045 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1046
1047 /* Define this if the tablejump instruction expects the table to contain
1048 offsets from the address of the table.
1049 Do not define this if the table should contain absolute addresses. */
1050
1051 /* #define CASE_VECTOR_PC_RELATIVE */
1052
1053 /* Load from integral MODE < SI from memory into register makes sign_extend
1054 or zero_extend
1055 In our case sign_extension happens for Halfwords, other no extension. */
1056
1057 #define LOAD_EXTEND_OP(MODE) \
1058 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1059 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1060 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1061
1062 /* Define this if fixuns_trunc is the same as fix_trunc. */
1063
1064 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1065
1066 /* We use "unsigned char" as default. */
1067
1068 #define DEFAULT_SIGNED_CHAR 0
1069
1070 /* Max number of bytes we can move from memory to memory in one reasonably
1071 fast instruction. */
1072
1073 #define MOVE_MAX 256
1074
1075 /* Nonzero if access to memory by bytes is slow and undesirable. */
1076
1077 #define SLOW_BYTE_ACCESS 1
1078
1079 /* Define if shifts truncate the shift count which implies one can omit
1080 a sign-extension or zero-extension of a shift count. */
1081
1082 /* #define SHIFT_COUNT_TRUNCATED */
1083
1084 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1085 is done just by pretending it is already truncated. */
1086
1087 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1088
1089 /* We assume that the store-condition-codes instructions store 0 for false
1090 and some other value for true. This is the value stored for true. */
1091
1092 /* #define STORE_FLAG_VALUE -1 */
1093
1094 /* Don't perform CSE on function addresses. */
1095
1096 #define NO_FUNCTION_CSE
1097
1098 /* Specify the machine mode that pointers have.
1099 After generation of rtl, the compiler makes no further distinction
1100 between pointers and any other objects of this machine mode. */
1101
1102 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1103
1104 /* A function address in a call instruction is a byte address (for
1105 indexing purposes) so give the MEM rtx a byte's mode. */
1106
1107 #define FUNCTION_MODE QImode
1108
1109
1110 /* A part of a C `switch' statement that describes the relative costs
1111 of constant RTL expressions. It must contain `case' labels for
1112 expression codes `const_int', `const', `symbol_ref', `label_ref'
1113 and `const_double'. Each case must ultimately reach a `return'
1114 statement to return the relative cost of the use of that kind of
1115 constant value in an expression. The cost may depend on the
1116 precise value of the constant, which is available for examination
1117 in X, and the rtx code of the expression in which it is contained,
1118 found in OUTER_CODE.
1119
1120 CODE is the expression code--redundant, since it can be obtained
1121 with `GET_CODE (X)'. */
1122 /* Force_const_mem does not work out of reload, because the saveable_obstack
1123 is set to reload_obstack, which does not live long enough.
1124 Because of this we cannot use force_const_mem in addsi3.
1125 This leads to problems with gen_add2_insn with a constant greater
1126 than a short. Because of that we give an addition of greater
1127 constants a cost of 3 (reload1.c 10096). */
1128
1129
1130 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1131 case CONST: \
1132 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1133 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1134 return 1000; \
1135 case CONST_INT: \
1136 if ((OUTER_CODE == PLUS) && \
1137 ((INTVAL (RTX) > 32767) || \
1138 (INTVAL (RTX) < -32768))) \
1139 return COSTS_N_INSNS (3); \
1140 case LABEL_REF: \
1141 case SYMBOL_REF: \
1142 case CONST_DOUBLE: \
1143 return 0; \
1144
1145
1146 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1147 This can be used, for example, to indicate how costly a multiply
1148 instruction is. In writing this macro, you can use the construct
1149 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1150 instructions. OUTER_CODE is the code of the expression in which X
1151 is contained.
1152
1153 This macro is optional; do not define it if the default cost
1154 assumptions are adequate for the target machine. */
1155
1156 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1157 case ASHIFT: \
1158 case ASHIFTRT: \
1159 case LSHIFTRT: \
1160 case PLUS: \
1161 case AND: \
1162 case IOR: \
1163 case XOR: \
1164 case MINUS: \
1165 case NEG: \
1166 case NOT: \
1167 return 1; \
1168 case MULT: \
1169 if (GET_MODE (XEXP (X, 0)) == DImode) \
1170 return 40; \
1171 else \
1172 return 7; \
1173 case DIV: \
1174 case UDIV: \
1175 case MOD: \
1176 case UMOD: \
1177 return 33;
1178
1179
1180 /* An expression giving the cost of an addressing mode that contains
1181 ADDRESS. If not defined, the cost is computed from the ADDRESS
1182 expression and the `CONST_COSTS' values.
1183
1184 For most CISC machines, the default cost is a good approximation
1185 of the true cost of the addressing mode. However, on RISC
1186 machines, all instructions normally have the same length and
1187 execution time. Hence all addresses will have equal costs.
1188
1189 In cases where more than one form of an address is known, the form
1190 with the lowest cost will be used. If multiple forms have the
1191 same, lowest, cost, the one that is the most complex will be used.
1192
1193 For example, suppose an address that is equal to the sum of a
1194 register and a constant is used twice in the same basic block.
1195 When this macro is not defined, the address will be computed in a
1196 register and memory references will be indirect through that
1197 register. On machines where the cost of the addressing mode
1198 containing the sum is no higher than that of a simple indirect
1199 reference, this will produce an additional instruction and
1200 possibly require an additional register. Proper specification of
1201 this macro eliminates this overhead for such machines.
1202
1203 Similar use of this macro is made in strength reduction of loops.
1204
1205 ADDRESS need not be valid as an address. In such a case, the cost
1206 is not relevant and can be any value; invalid addresses need not be
1207 assigned a different cost.
1208
1209 On machines where an address involving more than one register is as
1210 cheap as an address computation involving only one register,
1211 defining `ADDRESS_COST' to reflect this can cause two registers to
1212 be live over a region of code where only one would have been if
1213 `ADDRESS_COST' were not defined in that manner. This effect should
1214 be considered in the definition of this macro. Equivalent costs
1215 should probably only be given to addresses with different numbers
1216 of registers on machines with lots of registers.
1217
1218 This macro will normally either not be defined or be defined as a
1219 constant.
1220
1221 On s390 symbols are expensive if compiled with fpic
1222 lifetimes. */
1223
1224 #define ADDRESS_COST(RTX) \
1225 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1226
1227 /* On s390, copy between fprs and gprs is expensive. */
1228
1229 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1230 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
1231 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
1232 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
1233 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
1234
1235
1236 /* A C expression for the cost of moving data of mode M between a
1237 register and memory. A value of 2 is the default; this cost is
1238 relative to those in `REGISTER_MOVE_COST'.
1239
1240 If moving between registers and memory is more expensive than
1241 between two registers, you should define this macro to express the
1242 relative cost. */
1243
1244 #define MEMORY_MOVE_COST(M, C, I) 1
1245
1246 /* A C expression for the cost of a branch instruction. A value of 1
1247 is the default; other values are interpreted relative to that. */
1248
1249 #define BRANCH_COST 1
1250
1251 /* Add any extra modes needed to represent the condition code. */
1252 #define EXTRA_CC_MODES \
1253 CC (CCZmode, "CCZ") \
1254 CC (CCAmode, "CCA") \
1255 CC (CCLmode, "CCL") \
1256 CC (CCUmode, "CCU") \
1257 CC (CCSmode, "CCS") \
1258 CC (CCTmode, "CCT")
1259
1260 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1261 return the mode to be used for the comparison. */
1262
1263 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1264
1265
1266 /* Define the information needed to generate branch and scc insns. This is
1267 stored from the compare operation. Note that we can't use "rtx" here
1268 since it hasn't been defined! */
1269
1270 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1271
1272
1273 /* How to refer to registers in assembler output. This sequence is
1274 indexed by compiler's hard-register-number (see above). */
1275
1276 #define REGISTER_NAMES \
1277 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1278 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1279 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1280 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1281 "%ap", "%cc", "%fp" \
1282 }
1283
1284 /* implicit call of memcpy, not bcopy */
1285
1286 #define TARGET_MEM_FUNCTIONS
1287
1288
1289 /* Print operand X (an rtx) in assembler syntax to file FILE.
1290 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1291 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1292
1293 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1294
1295 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1296
1297
1298 /* Define the codes that are matched by predicates in aux-output.c. */
1299
1300 #define PREDICATE_CODES \
1301 {"s_operand", { SUBREG, MEM }}, \
1302 {"s_imm_operand", { CONST_INT, CONST_DOUBLE, SUBREG, MEM }}, \
1303 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1304 {"larl_operand", { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }}, \
1305 {"load_multiple_operation", {PARALLEL}}, \
1306 {"store_multiple_operation", {PARALLEL}}, \
1307 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1308 {"s390_plus_operand", { PLUS }},
1309
1310
1311 /* S/390 constant pool breaks the devices in crtstuff.c to control section
1312 in where code resides. We have to write it as asm code. */
1313 #ifndef __s390x__
1314 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
1315 asm (SECTION_OP "\n\
1316 bras\t%r2,1f\n\
1317 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
1318 1: l\t%r3,0(%r2)\n\
1319 bas\t%r14,0(%r3,%r2)\n\
1320 .previous");
1321 #endif
1322
1323 /* Constant Pool for all symbols operands which are changed with
1324 force_const_mem during insn generation (expand_insn). */
1325
1326 extern struct rtx_def *s390_pool_start_insn;
1327 extern int s390_pool_count;
1328 extern int s390_nr_constants;
1329
1330 /* Function is splitted in chunk, if literal pool could overflow
1331 Value need to be lowered, if problems with displacement overflow. */
1332
1333 #define S390_CHUNK_MAX 0xe00
1334 #define S390_CHUNK_OV 0x1000
1335 #define S390_POOL_MAX 0xe00
1336
1337 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1338 { \
1339 register rtx insn; \
1340 struct pool_constant *pool; \
1341 \
1342 if (s390_pool_count == -1) \
1343 { \
1344 s390_nr_constants = 0; \
1345 for (pool = first_pool; pool; pool = pool->next) \
1346 if (pool->mark) s390_nr_constants++; \
1347 return; \
1348 } \
1349 if (first_pool == 0) { \
1350 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1351 return; \
1352 } \
1353 for (pool = first_pool; pool; pool = pool->next) \
1354 pool->mark = 0; \
1355 \
1356 insn = s390_pool_start_insn; \
1357 \
1358 if (insn==NULL_RTX) \
1359 insn = get_insns (); \
1360 else \
1361 insn = NEXT_INSN (insn); \
1362 for (; insn; insn = NEXT_INSN (insn)) { \
1363 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { \
1364 if (s390_stop_dump_lit_p (insn)) { \
1365 mark_constants (PATTERN (insn)); \
1366 break; \
1367 } else \
1368 mark_constants (PATTERN (insn)); \
1369 } \
1370 } \
1371 \
1372 /* Mark entries referenced by other entries */ \
1373 for (pool = first_pool; pool; pool = pool->next) \
1374 if (pool->mark) \
1375 mark_constants (pool->constant); \
1376 \
1377 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1378 }
1379
1380 /* We need to return, because otherwise the pool is deleted of the
1381 constant pool after the first output. */
1382
1383 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1384
1385 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1386 { \
1387 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1388 { \
1389 fprintf (FILE, ".LC%d:\n", LABELNO); \
1390 LABELNO = ~LABELNO; \
1391 } \
1392 if (s390_pool_count > 0) \
1393 { \
1394 fprintf (FILE, ".LC%d_%X:\n", ~LABELNO, s390_pool_count); \
1395 } \
1396 \
1397 /* Output the value of the constant itself. */ \
1398 switch (GET_MODE_CLASS (MODE)) \
1399 { \
1400 case MODE_FLOAT: \
1401 if (GET_CODE (EXP) != CONST_DOUBLE) \
1402 abort (); \
1403 \
1404 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \
1405 assemble_real (u.d, MODE, ALIGN); \
1406 break; \
1407 \
1408 case MODE_INT: \
1409 case MODE_PARTIAL_INT: \
1410 if (flag_pic \
1411 && (GET_CODE (EXP) == CONST \
1412 || GET_CODE (EXP) == SYMBOL_REF \
1413 || GET_CODE (EXP) == LABEL_REF )) \
1414 { \
1415 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \
1416 s390_output_symbolic_const (FILE, EXP); \
1417 fputc ('\n', (FILE)); \
1418 } \
1419 else \
1420 { \
1421 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1422 if (GET_MODE_SIZE (MODE) == 1) \
1423 ASM_OUTPUT_SKIP ((FILE), 1); \
1424 } \
1425 break; \
1426 \
1427 default: \
1428 abort (); \
1429 } \
1430 goto WIN; \
1431 }
1432
1433 #endif