gcc/config/s390/s390.h

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
   3    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   4                   Ulrich Weigand (uweigand@de.ibm.com).
   5 This file is part of GNU CC.
   6
   7 GNU CC is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 GNU CC is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GNU CC; see the file COPYING.  If not, write to
  19 the Free Software Foundation, 59 Temple Place - Suite 330,
  20 Boston, MA 02111-1307, USA.  */
  21
  22 #ifndef _S390_H
  23 #define _S390_H
  24
  25 /* Override the __fixdfdi etc. routines when building libgcc2.
  26    ??? This should be done in a cleaner way ...  */
  27 #ifdef IN_LIBGCC2
  28 #include <s390/fixdfdi.h>
  29 #endif
  30
  31 /* Which processor to generate code or schedule for. The cpu attribute
  32    defines a list that mirrors this list, so changes to s390.md must be
  33    made at the same time.  */
  34
  35 enum processor_type
  36 {
  37   PROCESSOR_9672_G5,
  38   PROCESSOR_9672_G6,
  39   PROCESSOR_2064_Z900,
  40   PROCESSOR_max
  41 };
  42
  43 extern enum processor_type s390_cpu;
  44 extern const char *s390_cpu_string;
  45
  46 extern enum processor_type s390_arch;
  47 extern const char *s390_arch_string;
  48
  49 #define TARGET_CPU_DEFAULT_9672 0
  50 #define TARGET_CPU_DEFAULT_2064 2
  51
  52 #define TARGET_CPU_DEFAULT_NAMES {"g5", "g6", "z900"}
  53
  54 /* Run-time target specification.  */
  55
  56 /* Target CPU builtins.  */
  57 #define TARGET_CPU_CPP_BUILTINS()                       \
  58   do                                                    \
  59     {                                                   \
  60       builtin_assert ("cpu=s390");                      \
  61       builtin_assert ("machine=s390");                  \
  62       builtin_define ("__s390__");                      \
  63       if (TARGET_64BIT)                                 \
  64         builtin_define ("__s390x__");                   \
  65     }                                                   \
  66   while (0)
  67
  68 /* Optional target features.  */
  69 extern int target_flags;
  70
  71 #define MASK_HARD_FLOAT            0x01
  72 #define MASK_BACKCHAIN             0x02
  73 #define MASK_SMALL_EXEC            0x04
  74 #define MASK_DEBUG_ARG             0x08
  75 #define MASK_64BIT                 0x10
  76 #define MASK_ZARCH                 0x20
  77 #define MASK_MVCLE                 0x40
  78
  79 #define TARGET_HARD_FLOAT          (target_flags & MASK_HARD_FLOAT)
  80 #define TARGET_SOFT_FLOAT          (!(target_flags & MASK_HARD_FLOAT))
  81 #define TARGET_BACKCHAIN           (target_flags & MASK_BACKCHAIN)
  82 #define TARGET_SMALL_EXEC          (target_flags & MASK_SMALL_EXEC)
  83 #define TARGET_DEBUG_ARG           (target_flags & MASK_DEBUG_ARG)
  84 #define TARGET_64BIT               (target_flags & MASK_64BIT)
  85 #define TARGET_ZARCH               (target_flags & MASK_ZARCH)
  86 #define TARGET_MVCLE               (target_flags & MASK_MVCLE)
  87
  88 /* ??? Once this actually works, it could be made a runtime option.  */
  89 #define TARGET_IBM_FLOAT           0
  90 #define TARGET_IEEE_FLOAT          1
  91
  92 #ifdef DEFAULT_TARGET_64BIT
  93 #define TARGET_DEFAULT             0x33
  94 #else
  95 #define TARGET_DEFAULT             0x3
  96 #endif
  97
  98 #define TARGET_SWITCHES                                                \
  99 { { "hard-float",    1, N_("Use hardware fp")},                        \
 100   { "soft-float",   -1, N_("Don't use hardware fp")},                  \
 101   { "backchain",     2, N_("Set backchain")},                          \
 102   { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
 103   { "small-exec",    4, N_("Use bras for execucable < 64k")},          \
 104   { "no-small-exec",-4, N_("Don't use bras")},                         \
 105   { "debug",         8, N_("Additional debug prints")},                \
 106   { "no-debug",     -8, N_("Don't print additional debug prints")},    \
 107   { "64",           16, N_("64 bit ABI")},                             \
 108   { "31",          -16, N_("31 bit ABI")},                             \
 109   { "zarch",        32, N_("z/Architecture")},                         \
 110   { "esa",         -32, N_("ESA/390 architecture")},                   \
 111   { "mvcle",        64, N_("mvcle use")},                              \
 112   { "no-mvcle",    -64, N_("mvc&ex")},                                 \
 113   { "", TARGET_DEFAULT, 0 } }
 114
 115 #define TARGET_OPTIONS                                          \
 116 { { "cpu=",             &s390_cpu_string,                       \
 117     N_("Schedule code for given CPU")},                         \
 118   { "arch=",            &s390_arch_string,                      \
 119     N_("Generate code for given CPU")},                         \
 120 }
 121
 122 /* Target version string.  Overridden by the OS header.  */
 123 #ifdef DEFAULT_TARGET_64BIT
 124 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
 125 #else
 126 #define TARGET_VERSION fprintf (stderr, " (S/390)");
 127 #endif
 128
 129 /* Hooks to override options.  */
 130 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
 131 #define OVERRIDE_OPTIONS override_options ()
 132
 133 /* Frame pointer is not used for debugging.  */
 134 #define CAN_DEBUG_WITHOUT_FP
 135
 136
 137 /* Target machine storage layout.  */
 138
 139 /* Everything is big-endian.  */
 140 #define BITS_BIG_ENDIAN 1
 141 #define BYTES_BIG_ENDIAN 1
 142 #define WORDS_BIG_ENDIAN 1
 143
 144 /* Width of a word, in units (bytes).  */
 145 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
 146 #define MIN_UNITS_PER_WORD 4
 147 #define MAX_BITS_PER_WORD 64
 148
 149 /* Function arguments and return values are promoted to word size.  */
 150 #define PROMOTE_FUNCTION_ARGS
 151 #define PROMOTE_FUNCTION_RETURN
 152 #define PROMOTE_FOR_CALL_ONLY
 153
 154 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)             \
 155 if (INTEGRAL_MODE_P (MODE) &&                           \
 156     GET_MODE_SIZE (MODE) < UNITS_PER_WORD) {            \
 157   (MODE) = Pmode;                                       \
 158           }
 159
 160 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 161 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
 162
 163 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 164 #define STACK_BOUNDARY 64
 165
 166 /* Allocation boundary (in *bits*) for the code of a function.  */
 167 #define FUNCTION_BOUNDARY 32
 168
 169 /* There is no point aligning anything to a rounder boundary than this.  */
 170 #define BIGGEST_ALIGNMENT 64
 171
 172 /* Alignment of field after `int : 0' in a structure.  */
 173 #define EMPTY_FIELD_BOUNDARY 32
 174
 175 /* Alignment on even addresses for LARL instruction.  */
 176 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 177 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 178
 179 /* Alignment is not required by the hardware.  */
 180 #define STRICT_ALIGNMENT 0
 181
 182 /* Mode of stack savearea.
 183    FUNCTION is VOIDmode because calling convention maintains SP.
 184    BLOCK needs Pmode for SP.
 185    NONLOCAL needs twice Pmode to maintain both backchain and SP.  */
 186 #define STACK_SAVEAREA_MODE(LEVEL)      \
 187   (LEVEL == SAVE_FUNCTION ? VOIDmode    \
 188   : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
 189
 190 /* Define target floating point format.  */
 191 #define TARGET_FLOAT_FORMAT \
 192   (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
 193
 194
 195 /* Type layout.  */
 196
 197 /* Sizes in bits of the source language data types.  */
 198 #define SHORT_TYPE_SIZE 16
 199 #define INT_TYPE_SIZE 32
 200 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
 201 #define MAX_LONG_TYPE_SIZE 64
 202 #define LONG_LONG_TYPE_SIZE 64
 203 #define FLOAT_TYPE_SIZE 32
 204 #define DOUBLE_TYPE_SIZE 64
 205 #define LONG_DOUBLE_TYPE_SIZE 64  /* ??? Should support extended format.  */
 206
 207 /* We use "unsigned char" as default.  */
 208 #define DEFAULT_SIGNED_CHAR 0
 209
 210
 211 /* Register usage.  */
 212
 213 /* We have 16 general purpose registers (registers 0-15),
 214    and 16 floating point registers (registers 16-31).
 215    (On non-IEEE machines, we have only 4 fp registers.)
 216
 217    Amongst the general purpose registers, some are used
 218    for specific purposes:
 219    GPR 11: Hard frame pointer (if needed)
 220    GPR 12: Global offset table pointer (if needed)
 221    GPR 13: Literal pool base register
 222    GPR 14: Return address register
 223    GPR 15: Stack pointer
 224
 225    Registers 32-34 are 'fake' hard registers that do not
 226    correspond to actual hardware:
 227    Reg 32: Argument pointer
 228    Reg 33: Condition code
 229    Reg 34: Frame pointer  */
 230
 231 #define FIRST_PSEUDO_REGISTER 35
 232
 233 /* Standard register usage.  */
 234 #define GENERAL_REGNO_P(N)      ((int)(N) >= 0 && (N) < 16)
 235 #define ADDR_REGNO_P(N)         ((N) >= 1 && (N) < 16)
 236 #define FP_REGNO_P(N)           ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
 237 #define CC_REGNO_P(N)           ((N) == 33)
 238
 239 #define GENERAL_REG_P(X)        (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 240 #define ADDR_REG_P(X)           (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
 241 #define FP_REG_P(X)             (REG_P (X) && FP_REGNO_P (REGNO (X)))
 242 #define CC_REG_P(X)             (REG_P (X) && CC_REGNO_P (REGNO (X)))
 243
 244 #define BASE_REGISTER 13
 245 #define RETURN_REGNUM 14
 246 #define CC_REGNUM 33
 247
 248 /* Set up fixed registers and calling convention:
 249
 250    GPRs 0-5 are always call-clobbered,
 251    GPRs 6-15 are always call-saved.
 252    GPR 12 is fixed if used as GOT pointer.
 253    GPR 13 is always fixed (as literal pool pointer).
 254    GPR 14 is always fixed (as return address).
 255    GPR 15 is always fixed (as stack pointer).
 256    The 'fake' hard registers are call-clobbered and fixed.
 257
 258    On 31-bit, FPRs 18-19 are call-clobbered;
 259    on 64-bit, FPRs 24-31 are call-clobbered.
 260    The remaining FPRs are call-saved.  */
 261
 262 #define FIXED_REGISTERS                         \
 263 { 0, 0, 0, 0,                                   \
 264   0, 0, 0, 0,                                   \
 265   0, 0, 0, 0,                                   \
 266   0, 1, 1, 1,                                   \
 267   0, 0, 0, 0,                                   \
 268   0, 0, 0, 0,                                   \
 269   0, 0, 0, 0,                                   \
 270   0, 0, 0, 0,                                   \
 271   1, 1, 1 }
 272
 273 #define CALL_USED_REGISTERS                     \
 274 { 1, 1, 1, 1,                                   \
 275   1, 1, 0, 0,                                   \
 276   0, 0, 0, 0,                                   \
 277   0, 1, 1, 1,                                   \
 278   1, 1, 1, 1,                                   \
 279   1, 1, 1, 1,                                   \
 280   1, 1, 1, 1,                                   \
 281   1, 1, 1, 1,                                   \
 282   1, 1, 1 }
 283
 284 #define CALL_REALLY_USED_REGISTERS              \
 285 { 1, 1, 1, 1,                                   \
 286   1, 1, 0, 0,                                   \
 287   0, 0, 0, 0,                                   \
 288   0, 0, 0, 0,                                   \
 289   1, 1, 1, 1,                                   \
 290   1, 1, 1, 1,                                   \
 291   1, 1, 1, 1,                                   \
 292   1, 1, 1, 1,                                   \
 293   1, 1, 1 }
 294
 295 #define CONDITIONAL_REGISTER_USAGE                              \
 296 do                                                              \
 297   {                                                             \
 298     int i;                                                      \
 299                                                                 \
 300     if (flag_pic)                                               \
 301       {                                                         \
 302         fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;                \
 303         call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;            \
 304       }                                                         \
 305     if (TARGET_64BIT)                                           \
 306       {                                                         \
 307         for (i = 24; i < 32; i++)                               \
 308             call_used_regs[i] = call_really_used_regs[i] = 0;   \
 309       }                                                         \
 310     else                                                        \
 311       {                                                         \
 312         for (i = 18; i < 20; i++)                               \
 313             call_used_regs[i] = call_really_used_regs[i] = 0;   \
 314       }                                                         \
 315  } while (0)
 316
 317 /* Preferred register allocation order.  */
 318 #define REG_ALLOC_ORDER                                         \
 319 {  1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6,            \
 320    16, 17, 18, 19, 20, 21, 22, 23,                              \
 321    24, 25, 26, 27, 28, 29, 30, 31,                              \
 322    15, 32, 33, 34 }
 323
 324
 325 /* Fitting values into registers.  */
 326
 327 /* Integer modes <= word size fit into any GPR.
 328    Integer modes > word size fit into successive GPRs, starting with
 329    an even-numbered register.
 330    SImode and DImode fit into FPRs as well.
 331
 332    Floating point modes <= word size fit into any FPR or GPR.
 333    Floating point modes > word size (i.e. DFmode on 32-bit) fit
 334    into any FPR, or an even-odd GPR pair.
 335
 336    Complex floating point modes fit either into two FPRs, or into
 337    successive GPRs (again starting with an even number).
 338
 339    Condition code modes fit only into the CC register.  */
 340
 341 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
 342   (FP_REGNO_P(REGNO)?                                           \
 343     (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :      \
 344    GENERAL_REGNO_P(REGNO)?                                      \
 345     ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
 346    1)
 347
 348 #define HARD_REGNO_MODE_OK(REGNO, MODE)                             \
 349   (FP_REGNO_P(REGNO)?                                               \
 350    ((MODE) == SImode || (MODE) == DImode ||                         \
 351     GET_MODE_CLASS(MODE) == MODE_FLOAT ||                           \
 352     GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) :                   \
 353    GENERAL_REGNO_P(REGNO)?                                          \
 354     (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) :        \
 355    CC_REGNO_P(REGNO)?                                               \
 356      GET_MODE_CLASS (MODE) == MODE_CC :                             \
 357    0)
 358
 359 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 360    (((MODE1) == SFmode || (MODE1) == DFmode)    \
 361    == ((MODE2) == SFmode || (MODE2) == DFmode))
 362
 363 /* Maximum number of registers to represent a value of mode MODE
 364    in a register of class CLASS.  */
 365 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 366      ((CLASS) == FP_REGS ?                                              \
 367       (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :           \
 368       (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 369
 370 /* If a 4-byte value is loaded into a FPR, it is placed into the
 371    *upper* half of the register, not the lower.  Therefore, we
 372    cannot use SUBREGs to switch between modes in FP registers.  */
 373 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO)              \
 374   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) ? FP_REGS : NO_REGS)
 375
 376 /* Register classes.  */
 377
 378 /* We use the following register classes:
 379    GENERAL_REGS     All general purpose registers
 380    ADDR_REGS        All general purpose registers except %r0
 381                     (These registers can be used in address generation)
 382    FP_REGS          All floating point registers
 383
 384    GENERAL_FP_REGS  Union of GENERAL_REGS and FP_REGS
 385    ADDR_FP_REGS     Union of ADDR_REGS and FP_REGS
 386
 387    NO_REGS          No registers
 388    ALL_REGS         All registers
 389
 390    Note that the 'fake' frame pointer and argument pointer registers
 391    are included amongst the address registers here.  The condition
 392    code register is only included in ALL_REGS.  */
 393
 394 enum reg_class
 395 {
 396   NO_REGS, ADDR_REGS, GENERAL_REGS,
 397   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
 398   ALL_REGS, LIM_REG_CLASSES
 399 };
 400 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 401
 402 #define REG_CLASS_NAMES                                                 \
 403 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS",                               \
 404   "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
 405
 406 /* Class -> register mapping.  */
 407 #define REG_CLASS_CONTENTS \
 408 {                                                       \
 409   { 0x00000000, 0x00000000 },   /* NO_REGS */           \
 410   { 0x0000fffe, 0x00000005 },   /* ADDR_REGS */         \
 411   { 0x0000ffff, 0x00000005 },   /* GENERAL_REGS */      \
 412   { 0xffff0000, 0x00000000 },   /* FP_REGS */           \
 413   { 0xfffffffe, 0x00000005 },   /* ADDR_FP_REGS */      \
 414   { 0xffffffff, 0x00000005 },   /* GENERAL_FP_REGS */   \
 415   { 0xffffffff, 0x00000007 },   /* ALL_REGS */          \
 416 }
 417
 418 /* Register -> class mapping.  */
 419 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 420 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
 421
 422 /* ADDR_REGS can be used as base or index register.  */
 423 #define INDEX_REG_CLASS ADDR_REGS
 424 #define BASE_REG_CLASS ADDR_REGS
 425
 426 /* Check whether REGNO is a hard register of the suitable class
 427    or a pseudo register currently allocated to one such.  */
 428 #define REGNO_OK_FOR_INDEX_P(REGNO)                                     \
 429     (((REGNO) < FIRST_PSEUDO_REGISTER                                   \
 430      && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS)                         \
 431     || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
 432 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
 433
 434
 435 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
 436    return the class of reg to actually use.  */
 437 #define PREFERRED_RELOAD_CLASS(X, CLASS)        \
 438   s390_preferred_reload_class ((X), (CLASS))
 439
 440 /* We need a secondary reload when loading a PLUS which is
 441    not a valid operand for LOAD ADDRESS.  */
 442 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN)   \
 443   s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
 444
 445 /* We need secondary memory to move data between GPRs and FPRs.  */
 446 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
 447  ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
 448
 449 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
 450    because the movsi and movsf patterns don't handle r/f moves.  */
 451 #define SECONDARY_MEMORY_NEEDED_MODE(MODE)              \
 452  (GET_MODE_BITSIZE (MODE) < 32                          \
 453   ? mode_for_size (32, GET_MODE_CLASS (MODE), 0)        \
 454   : MODE)
 455
 456
 457 /* Define various machine-dependent constraint letters.  */
 458
 459 #define REG_CLASS_FROM_LETTER(C)                                        \
 460   ((C) == 'a' ? ADDR_REGS :                                             \
 461    (C) == 'd' ? GENERAL_REGS :                                          \
 462    (C) == 'f' ? FP_REGS : NO_REGS)
 463
 464 #define CONST_OK_FOR_LETTER_P(VALUE, C)                                 \
 465   ((C) == 'I' ? (unsigned long) (VALUE) < 256 :                         \
 466    (C) == 'J' ? (unsigned long) (VALUE) < 4096 :                        \
 467    (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 :                  \
 468    (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
 469
 470 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)  1
 471
 472 #define EXTRA_CONSTRAINT(OP, C)                                 \
 473      ((C) == 'Q' ?  q_constraint (OP) :                         \
 474       (C) == 'S' ?  larl_operand (OP, GET_MODE (OP)) : 0)
 475
 476 #define EXTRA_MEMORY_CONSTRAINT(C) ((C) == 'Q')
 477
 478
 479 /* Stack layout and calling conventions.  */
 480
 481 /* Our stack grows from higher to lower addresses.  However, local variables
 482    are accessed by positive offsets, and function arguments are stored at
 483    increasing addresses.  */
 484 #define STACK_GROWS_DOWNWARD
 485 /* #undef FRAME_GROWS_DOWNWARD */
 486 /* #undef ARGS_GROW_DOWNWARD */
 487
 488 /* The basic stack layout looks like this: the stack pointer points
 489    to the register save area for called functions.  Above that area
 490    is the location to place outgoing arguments.  Above those follow
 491    dynamic allocations (alloca), and finally the local variables.  */
 492
 493 /* Offset from stack-pointer to first location of outgoing args.  */
 494 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
 495
 496 /* Offset within stack frame to start allocating local variables at.  */
 497 extern int current_function_outgoing_args_size;
 498 #define STARTING_FRAME_OFFSET \
 499      (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
 500
 501 /* Offset from the stack pointer register to an item dynamically
 502    allocated on the stack, e.g., by `alloca'.  */
 503 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
 504
 505 /* Offset of first parameter from the argument pointer register value.
 506    We have a fake argument pointer register that points directly to
 507    the argument area.  */
 508 #define FIRST_PARM_OFFSET(FNDECL) 0
 509
 510 /* The return address of the current frame is retrieved
 511    from the initial value of register RETURN_REGNUM.
 512    For frames farther back, we use the stack slot where
 513    the corresponding RETURN_REGNUM register was saved.  */
 514
 515 #define DYNAMIC_CHAIN_ADDRESS(FRAME)                                            \
 516   ((FRAME) != hard_frame_pointer_rtx ? (FRAME) :                                \
 517    plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
 518
 519 #define RETURN_ADDR_RTX(COUNT, FRAME)                                           \
 520   s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
 521
 522 /* In 31-bit mode, we need to mask off the high bit of return addresses.  */
 523 #define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff))
 524
 525
 526 /* Exception handling.  */
 527
 528 /* Describe calling conventions for DWARF-2 exception handling.  */
 529 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, RETURN_REGNUM)
 530 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
 531 #define DWARF_FRAME_RETURN_COLUMN  14
 532
 533 /* Describe how we implement __builtin_eh_return.  */
 534 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
 535 #define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, 10)
 536 #define EH_RETURN_HANDLER_RTX \
 537   gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
 538                                      TARGET_64BIT? -48 : -40))
 539
 540 /* Select a format to encode pointers in exception handling data.  */
 541 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)                          \
 542   (flag_pic                                                                 \
 543     ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
 544    : DW_EH_PE_absptr)
 545
 546
 547 /* Frame registers.  */
 548
 549 #define STACK_POINTER_REGNUM 15
 550 #define FRAME_POINTER_REGNUM 34
 551 #define HARD_FRAME_POINTER_REGNUM 11
 552 #define ARG_POINTER_REGNUM 32
 553
 554 /* The static chain must be call-clobbered, but not used for
 555    function argument passing.  As register 1 is clobbered by
 556    the trampoline code, we only have one option.  */
 557 #define STATIC_CHAIN_REGNUM 0
 558
 559 /* Number of hardware registers that go into the DWARF-2 unwind info.
 560    To avoid ABI incompatibility, this number must not change even as
 561    'fake' hard registers are added or removed.  */
 562 #define DWARF_FRAME_REGISTERS 34
 563
 564
 565 /* Frame pointer and argument pointer elimination.  */
 566
 567 #define FRAME_POINTER_REQUIRED 0
 568
 569 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
 570
 571 #define ELIMINABLE_REGS                                 \
 572 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},         \
 573  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},    \
 574  { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},           \
 575  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 576
 577 #define CAN_ELIMINATE(FROM, TO) (1)
 578
 579 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                      \
 580 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)     \
 581   { (OFFSET) = 0; }                                                       \
 582   else  if ((FROM) == FRAME_POINTER_REGNUM                                \
 583             && (TO) == HARD_FRAME_POINTER_REGNUM)                         \
 584   { (OFFSET) = 0; }                                                       \
 585   else if ((FROM) == ARG_POINTER_REGNUM                                   \
 586             && (TO) == HARD_FRAME_POINTER_REGNUM)                         \
 587   { (OFFSET) = s390_arg_frame_offset (); }                                \
 588   else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)  \
 589   { (OFFSET) = s390_arg_frame_offset (); }                                \
 590   else                                                                    \
 591     abort();                                                              \
 592 }
 593
 594
 595 /* Stack arguments.  */
 596
 597 /* We need current_function_outgoing_args to be valid.  */
 598 #define ACCUMULATE_OUTGOING_ARGS 1
 599
 600 /* Return doesn't modify the stack.  */
 601 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
 602
 603
 604 /* Register arguments.  */
 605
 606 typedef struct s390_arg_structure
 607 {
 608   int gprs;                     /* gpr so far */
 609   int fprs;                     /* fpr so far */
 610 }
 611 CUMULATIVE_ARGS;
 612
 613 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
 614   ((CUM).gprs=0, (CUM).fprs=0)
 615
 616 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 617   s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
 618
 619 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
 620   s390_function_arg (&CUM, MODE, TYPE, NAMED)
 621
 622 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
 623   s390_function_arg_pass_by_reference (MODE, TYPE)
 624
 625 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
 626
 627 /* Arguments can be placed in general registers 2 to 6,
 628    or in floating point registers 0 and 2.  */
 629 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
 630                                  (N) == 16 || (N) == 17)
 631
 632
 633 /* Scalar return values.  */
 634
 635 /* We return scalars in general purpose register 2 for integral values,
 636    and floating point register 0 for fp values.  */
 637 #define FUNCTION_VALUE(VALTYPE, FUNC)                           \
 638   gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE)                       \
 639                 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD)    \
 640                || POINTER_TYPE_P (VALTYPE)                      \
 641                ? word_mode : TYPE_MODE (VALTYPE),               \
 642                TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
 643
 644 /* Define how to find the value returned by a library function assuming
 645    the value has mode MODE.  */
 646 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT       \
 647                        || TARGET_SOFT_FLOAT ) ? 2 : 16)
 648 #define LIBCALL_VALUE(MODE)  gen_rtx (REG, MODE, RET_REG (MODE))
 649
 650 /* Only gpr 2 and fpr 0 are ever used as return registers.  */
 651 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
 652
 653
 654 /* Aggregate return values.  */
 655
 656 /* The definition of this macro implies that there are cases where
 657    a scalar value cannot be returned in registers.  */
 658 #define RETURN_IN_MEMORY(type)                                  \
 659   (TYPE_MODE (type) == BLKmode ||                               \
 660    GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT  ||    \
 661    GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
 662
 663 /* Structure value address is passed as invisible first argument (gpr 2).  */
 664 #define STRUCT_VALUE 0
 665
 666
 667 /* Function entry and exit.  */
 668
 669 /* When returning from a function, the stack pointer does not matter.  */
 670 #define EXIT_IGNORE_STACK       1
 671
 672
 673 /* Profiling.  */
 674
 675 #define FUNCTION_PROFILER(FILE, LABELNO)                        \
 676   s390_function_profiler ((FILE), ((LABELNO)))
 677
 678 #define PROFILE_BEFORE_PROLOGUE 1
 679
 680
 681 /* Implementing the varargs macros.  */
 682
 683 #define BUILD_VA_LIST_TYPE(VALIST) \
 684   (VALIST) = s390_build_va_list ()
 685
 686 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
 687   s390_va_start (valist, nextarg)
 688
 689 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
 690   s390_va_arg (valist, type)
 691
 692
 693 /* Trampolines for nested functions.  */
 694
 695 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
 696
 697 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT)                       \
 698    s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
 699
 700 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 701    s390_trampoline_template (FILE)
 702
 703
 704 /* Library calls.  */
 705
 706 /* We should use memcpy, not bcopy.  */
 707 #define TARGET_MEM_FUNCTIONS
 708
 709
 710 /* Addressing modes, and classification of registers for them.  */
 711
 712 /* Recognize any constant value that is a valid address.  */
 713 #define CONSTANT_ADDRESS_P(X) 0
 714
 715 /* Maximum number of registers that can appear in a valid memory address.  */
 716 #define MAX_REGS_PER_ADDRESS 2
 717
 718 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
 719    its validity for a certain class.  We have two alternate definitions
 720    for each of them.  The usual definition accepts all pseudo regs; the
 721    other rejects them all.  The symbol REG_OK_STRICT causes the latter
 722    definition to be used.
 723
 724    Most source files want to accept pseudo regs in the hope that they will
 725    get allocated to the class that the insn wants them to be in.
 726    Some source files that are used after register allocation
 727    need to be strict.  */
 728
 729 #define REG_OK_FOR_INDEX_NONSTRICT_P(X)         \
 730 ((GET_MODE (X) == Pmode) &&                     \
 731  ((REGNO (X) >= FIRST_PSEUDO_REGISTER)          \
 732   || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
 733
 734 #define REG_OK_FOR_BASE_NONSTRICT_P(X)    REG_OK_FOR_INDEX_NONSTRICT_P (X)
 735
 736 #define REG_OK_FOR_INDEX_STRICT_P(X)                            \
 737 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
 738
 739 #define REG_OK_FOR_BASE_STRICT_P(X)                             \
 740 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
 741
 742 #ifndef REG_OK_STRICT
 743 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_NONSTRICT_P(X)
 744 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P(X)
 745 #else
 746 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_STRICT_P(X)
 747 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_STRICT_P(X)
 748 #endif
 749
 750 /* S/390 has no mode dependent addresses.  */
 751 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
 752
 753 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
 754    valid memory address for an instruction.
 755    The MODE argument is the machine mode for the MEM expression
 756    that wants to use this address.  */
 757 #ifdef REG_OK_STRICT
 758 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 759 {                                                                       \
 760   if (legitimate_address_p (MODE, X, 1))                                \
 761     goto ADDR;                                                          \
 762 }
 763 #else
 764 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 765 {                                                                       \
 766   if (legitimate_address_p (MODE, X, 0))                                \
 767     goto ADDR;                                                          \
 768 }
 769 #endif
 770
 771 /* Try machine-dependent ways of modifying an illegitimate address
 772    to be legitimate.  If we find one, return the new, valid address.
 773    This macro is used in only one place: `memory_address' in explow.c.  */
 774 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)                          \
 775 {                                                                       \
 776   (X) = legitimize_address (X, OLDX, MODE);                             \
 777   if (memory_address_p (MODE, X))                                       \
 778     goto WIN;                                                           \
 779 }
 780
 781 /* Nonzero if the constant value X is a legitimate general operand.
 782    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 783 #define LEGITIMATE_CONSTANT_P(X) \
 784      legitimate_constant_p (X)
 785
 786 /* Helper macro for s390.c and s390.md to check for symbolic constants.  */
 787 #define SYMBOLIC_CONST(X)       \
 788 (GET_CODE (X) == SYMBOL_REF                                             \
 789  || GET_CODE (X) == LABEL_REF                                           \
 790  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 791
 792
 793 /* Condition codes.  */
 794
 795 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
 796    return the mode to be used for the comparison.  */
 797 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
 798
 799 /* Define the information needed to generate branch and scc insns.  This is
 800    stored from the compare operation.  Note that we can't use "rtx" here
 801    since it hasn't been defined!  */
 802 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
 803
 804
 805 /* Relative costs of operations.  */
 806
 807 /* A part of a C `switch' statement that describes the relative costs
 808    of constant RTL expressions.  It must contain `case' labels for
 809    expression codes `const_int', `const', `symbol_ref', `label_ref'
 810    and `const_double'.  Each case must ultimately reach a `return'
 811    statement to return the relative cost of the use of that kind of
 812    constant value in an expression.  The cost may depend on the
 813    precise value of the constant, which is available for examination
 814    in X, and the rtx code of the expression in which it is contained,
 815    found in OUTER_CODE.
 816
 817    CODE is the expression code--redundant, since it can be obtained
 818    with `GET_CODE (X)'.  */
 819 /* Force_const_mem does not work out of reload, because the saveable_obstack
 820    is set to reload_obstack, which does not live long enough.
 821    Because of this we cannot use force_const_mem in addsi3.
 822    This leads to problems with gen_add2_insn with a constant greater
 823    than a short. Because of that we give an addition of greater
 824    constants a cost of 3 (reload1.c 10096).  */
 825
 826 #define CONST_COSTS(RTX, CODE, OUTER_CODE)                      \
 827   case CONST:                                                   \
 828     if ((GET_CODE (XEXP (RTX, 0)) == MINUS) &&                  \
 829         (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT))      \
 830      return 1000;                                               \
 831   case CONST_INT:                                               \
 832        if ((OUTER_CODE == PLUS) &&                              \
 833            ((INTVAL (RTX) > 32767) ||                           \
 834            (INTVAL (RTX) < -32768)))                            \
 835          return COSTS_N_INSNS (3);                              \
 836   case LABEL_REF:                                               \
 837   case SYMBOL_REF:                                              \
 838   case CONST_DOUBLE:                                            \
 839     return 0;                                                   \
 840
 841
 842 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
 843    This can be used, for example, to indicate how costly a multiply
 844    instruction is.  In writing this macro, you can use the construct
 845    `COSTS_N_INSNS (N)' to specify a cost equal to N fast
 846    instructions.  OUTER_CODE is the code of the expression in which X
 847    is contained.  */
 848
 849 #define RTX_COSTS(X, CODE, OUTER_CODE)                                  \
 850   case ASHIFT:                                                          \
 851   case ASHIFTRT:                                                        \
 852   case LSHIFTRT:                                                        \
 853   case PLUS:                                                            \
 854   case AND:                                                             \
 855   case IOR:                                                             \
 856   case XOR:                                                             \
 857   case MINUS:                                                           \
 858   case NEG:                                                             \
 859   case NOT:                                                             \
 860     return COSTS_N_INSNS (1);                                           \
 861   case MULT:                                                            \
 862     if (GET_MODE (XEXP (X, 0)) == DImode)                               \
 863       return COSTS_N_INSNS (40);                                        \
 864     else                                                                \
 865       return COSTS_N_INSNS (7);                                         \
 866   case DIV:                                                             \
 867   case UDIV:                                                            \
 868   case MOD:                                                             \
 869   case UMOD:                                                            \
 870     return COSTS_N_INSNS (33);
 871
 872
 873 /* An expression giving the cost of an addressing mode that contains
 874    ADDRESS.  If not defined, the cost is computed from the ADDRESS
 875    expression and the `CONST_COSTS' values.  */
 876 #define ADDRESS_COST(RTX) s390_address_cost ((RTX))
 877
 878 /* On s390, copy between fprs and gprs is expensive.  */
 879 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)                        \
 880   ((   (   reg_classes_intersect_p ((CLASS1), GENERAL_REGS)             \
 881         && reg_classes_intersect_p ((CLASS2), FP_REGS))                 \
 882     || (   reg_classes_intersect_p ((CLASS1), FP_REGS)                  \
 883         && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
 884
 885 /* A C expression for the cost of moving data of mode M between a
 886    register and memory.  A value of 2 is the default; this cost is
 887    relative to those in `REGISTER_MOVE_COST'.  */
 888 #define MEMORY_MOVE_COST(M, C, I) 1
 889
 890 /* A C expression for the cost of a branch instruction.  A value of 1
 891    is the default; other values are interpreted relative to that.  */
 892 #define BRANCH_COST 1
 893
 894 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 895 #define SLOW_BYTE_ACCESS 1
 896
 897 /* The maximum number of bytes that a single instruction can move quickly
 898    between memory and registers or between two memory locations. */
 899 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
 900 #define MAX_MOVE_MAX 16
 901
 902 /* Determine whether to use move_by_pieces or block move insn.  */
 903 #define MOVE_BY_PIECES_P(SIZE, ALIGN)           \
 904   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 905     || (TARGET_64BIT && (SIZE) == 8) )
 906
 907 /* Determine whether to use clear_by_pieces or block clear insn.  */
 908 #define CLEAR_BY_PIECES_P(SIZE, ALIGN)          \
 909   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 910     || (TARGET_64BIT && (SIZE) == 8) )
 911
 912 /* Don't perform CSE on function addresses.  */
 913 #define NO_FUNCTION_CSE
 914
 915
 916 /* Sections.  */
 917
 918 /* Output before read-only data.  */
 919 #define TEXT_SECTION_ASM_OP ".text"
 920
 921 /* Output before writable (initialized) data.  */
 922 #define DATA_SECTION_ASM_OP ".data"
 923
 924 /* Output before writable (uninitialized) data.  */
 925 #define BSS_SECTION_ASM_OP ".bss"
 926
 927 /* S/390 constant pool breaks the devices in crtstuff.c to control section
 928    in where code resides.  We have to write it as asm code.  */
 929 #ifndef __s390x__
 930 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
 931     asm (SECTION_OP "\n\
 932         bras\t%r2,1f\n\
 933 0:      .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
 934 1:      l\t%r3,0(%r2)\n\
 935         bas\t%r14,0(%r3,%r2)\n\
 936         .previous");
 937 #endif
 938
 939
 940 /* Position independent code.  */
 941
 942 extern int flag_pic;
 943
 944 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
 945
 946 #define LEGITIMATE_PIC_OPERAND_P(X)  legitimate_pic_operand_p (X)
 947
 948
 949 /* Assembler file format.  */
 950
 951 /* Character to start a comment.  */
 952 #define ASM_COMMENT_START "#"
 953
 954 /* Declare an uninitialized external linkage data object.  */
 955 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 956   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 957
 958 /* Globalizing directive for a label.  */
 959 #define GLOBAL_ASM_OP ".globl "
 960
 961 /* Advance the location counter to a multiple of 2**LOG bytes.  */
 962 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
 963   if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
 964
 965 /* Advance the location counter by SIZE bytes.  */
 966 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
 967   fprintf ((FILE), "\t.set\t.,.+%u\n", (SIZE))
 968
 969 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h.  */
 970 #define LOCAL_LABEL_PREFIX "."
 971
 972 /* Either simplify a location expression, or return the original.  */
 973 #define ASM_SIMPLIFY_DWARF_ADDR(X) \
 974   s390_simplify_dwarf_addr (X)
 975
 976 /* How to refer to registers in assembler output.  This sequence is
 977    indexed by compiler's hard-register-number (see above).  */
 978 #define REGISTER_NAMES                                                  \
 979 { "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",        \
 980   "%r8",  "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",        \
 981   "%f0",  "%f2",  "%f4",  "%f6",  "%f1",  "%f3",  "%f5",  "%f7",        \
 982   "%f8",  "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15",        \
 983   "%ap",  "%cc",  "%fp"                                                 \
 984 }
 985
 986 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 987 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 988 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 989
 990 /* Output an element of a case-vector that is absolute.  */
 991 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                            \
 992 do {                                                                    \
 993   char buf[32];                                                         \
 994   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 995   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 996   assemble_name ((FILE), buf);                                          \
 997   fputc ('\n', (FILE));                                                 \
 998 } while (0)
 999
1000 /* Output an element of a case-vector that is relative.  */
1001 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)                \
1002 do {                                                                    \
1003   char buf[32];                                                         \
1004   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
1005   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
1006   assemble_name ((FILE), buf);                                          \
1007   fputc ('-', (FILE));                                                  \
1008   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL));                        \
1009   assemble_name ((FILE), buf);                                          \
1010   fputc ('\n', (FILE));                                                 \
1011 } while (0)
1012
1013
1014 /* Constant Pool for all symbols operands which are changed with
1015    force_const_mem during insn generation (expand_insn).  */
1016
1017 extern int s390_pool_count;
1018 extern int s390_nr_constants;
1019
1020 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size)           \
1021 {                                                                       \
1022   struct pool_constant *pool;                                           \
1023                                                                         \
1024     if (s390_pool_count == -1)                                          \
1025      {                                                                  \
1026        s390_nr_constants = 0;                                           \
1027        for (pool = first_pool; pool; pool = pool->next)                 \
1028          if (pool->mark) s390_nr_constants++;                           \
1029        return;                                                          \
1030      }                                                                  \
1031 }
1032
1033 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1034 {                                                                           \
1035   fprintf (FILE, ".LC%d:\n", LABELNO);                                      \
1036                                                                             \
1037   /* Output the value of the constant itself.  */                           \
1038   switch (GET_MODE_CLASS (MODE))                                            \
1039     {                                                                       \
1040     case MODE_FLOAT:                                                        \
1041       if (GET_CODE (EXP) != CONST_DOUBLE)                                   \
1042         abort ();                                                           \
1043                                                                             \
1044       REAL_VALUE_FROM_CONST_DOUBLE (r, EXP);                                \
1045       assemble_real (r, MODE, ALIGN);                                       \
1046       break;                                                                \
1047                                                                             \
1048     case MODE_INT:                                                          \
1049     case MODE_PARTIAL_INT:                                                  \
1050       if (flag_pic                                                          \
1051           && (GET_CODE (EXP) == CONST                                       \
1052               || GET_CODE (EXP) == SYMBOL_REF                               \
1053               || GET_CODE (EXP) == LABEL_REF ))                             \
1054         {                                                                   \
1055           fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE);              \
1056           s390_output_symbolic_const (FILE, EXP);                           \
1057           fputc ('\n', (FILE));                                             \
1058         }                                                                   \
1059       else                                                                  \
1060         {                                                                   \
1061           assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1);           \
1062           if (GET_MODE_SIZE (MODE) == 1)                                    \
1063             ASM_OUTPUT_SKIP ((FILE), 1);                                    \
1064         }                                                                   \
1065       break;                                                                \
1066                                                                             \
1067     default:                                                                \
1068       abort ();                                                             \
1069     }                                                                       \
1070   goto WIN;                                                                 \
1071 }
1072
1073
1074 /* Miscellaneous parameters.  */
1075
1076 /* Define the codes that are matched by predicates in aux-output.c.  */
1077 #define PREDICATE_CODES                                                 \
1078   {"s_operand",       { SUBREG, MEM }},                                 \
1079   {"s_imm_operand",   { CONST_INT, CONST_DOUBLE, SUBREG, MEM }},        \
1080   {"bras_sym_operand",{ SYMBOL_REF, CONST }},                           \
1081   {"larl_operand",    { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }},  \
1082   {"load_multiple_operation", {PARALLEL}},                              \
1083   {"store_multiple_operation", {PARALLEL}},                             \
1084   {"const0_operand",  { CONST_INT, CONST_DOUBLE }},                     \
1085   {"consttable_operand", { SYMBOL_REF, LABEL_REF, CONST,                \
1086                            CONST_INT, CONST_DOUBLE }},                  \
1087   {"s390_plus_operand", { PLUS }},
1088
1089 /* Specify the machine mode that this machine uses for the index in the
1090    tablejump instruction.  */
1091 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1092
1093 /* Load from integral MODE < SI from memory into register makes sign_extend
1094    or zero_extend
1095    In our case sign_extension happens for Halfwords, other no extension.  */
1096 #define LOAD_EXTEND_OP(MODE)                                    \
1097 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND :               \
1098                  (MODE) == HImode ? SIGN_EXTEND : NIL)          \
1099               : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1100
1101 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1102    is done just by pretending it is already truncated.  */
1103 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
1104
1105 /* Specify the machine mode that pointers have.
1106    After generation of rtl, the compiler makes no further distinction
1107    between pointers and any other objects of this machine mode.  */
1108 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1109
1110 /* A function address in a call instruction is a byte address (for
1111    indexing purposes) so give the MEM rtx a byte's mode.  */
1112 #define FUNCTION_MODE QImode
1113
1114 /* This macro definition sets up a default value for `main' to return.  */
1115 #define DEFAULT_MAIN_RETURN  c_expand_return (integer_zero_node)
1116
1117 /* In rare cases, correct code generation requires extra machine dependent
1118    processing between the second jump optimization pass and delayed branch
1119    scheduling.  On those machines, define this macro as a C statement to act on
1120    the code starting at INSN.  */
1121 #define MACHINE_DEPENDENT_REORG(INSN) s390_machine_dependent_reorg (INSN)
1122
1123 #endif