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[gcc.git] / gcc / config / s390 / s390.h
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #ifndef _S390_H
23 #define _S390_H
24
25 extern int flag_pic;
26
27 /* Run-time compilation parameters selecting different hardware subsets. */
28
29 extern int target_flags;
30
31 /* Target macros checked at runtime of compiler. */
32
33 #define TARGET_HARD_FLOAT (target_flags & 1)
34 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
35 #define TARGET_BACKCHAIN (target_flags & 2)
36 #define TARGET_SMALL_EXEC (target_flags & 4)
37 #define TARGET_DEBUG_ARG (target_flags & 8)
38 #define TARGET_64BIT (target_flags & 16)
39 #define TARGET_MVCLE (target_flags & 32)
40
41 #ifdef DEFAULT_TARGET_64BIT
42 #define TARGET_DEFAULT 0x13
43 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
44 #else
45 #define TARGET_DEFAULT 0x3
46 #define TARGET_VERSION fprintf (stderr, " (S/390)");
47 #endif
48
49
50 /* Macro to define tables used to set the flags. This is a list in braces
51 of pairs in braces, each pair being { "NAME", VALUE }
52 where VALUE is the bits to set or minus the bits to clear.
53 An empty string NAME is used to identify the default VALUE. */
54
55 #define TARGET_SWITCHES \
56 { { "hard-float", 1, N_("Use hardware fp")}, \
57 { "soft-float", -1, N_("Don't use hardware fp")}, \
58 { "backchain", 2, N_("Set backchain")}, \
59 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
60 { "small-exec", 4, N_("Use bras for execucable < 64k")}, \
61 { "no-small-exec",-4, N_("Don't use bras")}, \
62 { "debug", 8, N_("Additional debug prints")}, \
63 { "no-debug", -8, N_("Don't print additional debug prints")}, \
64 { "64", 16, N_("64 bit mode")}, \
65 { "31", -16, N_("31 bit mode")}, \
66 { "mvcle", 32, N_("mvcle use")}, \
67 { "no-mvcle", -32, N_("mvc&ex")}, \
68 { "", TARGET_DEFAULT, 0 } }
69
70 /* Define this to change the optimizations performed by default. */
71 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
72
73 /* Sometimes certain combinations of command options do not make sense
74 on a particular target machine. You can define a macro
75 `OVERRIDE_OPTIONS' to take account of this. This macro, if
76 defined, is executed once just after all the command options have
77 been parsed. */
78 #define OVERRIDE_OPTIONS override_options ()
79
80
81 /* Defines for REAL_ARITHMETIC. */
82 #define IEEE_FLOAT 1
83 #define TARGET_IBM_FLOAT 0
84 #define TARGET_IEEE_FLOAT 1
85
86 /* The current function count for create unique internal labels. */
87
88 extern int s390_function_count;
89
90 /* The amount of space used for outgoing arguments. */
91
92 extern int current_function_outgoing_args_size;
93
94 /* Target machine storage layout. */
95
96 /* Define this if most significant bit is lowest numbered in instructions
97 that operate on numbered bit-fields. */
98
99 #define BITS_BIG_ENDIAN 1
100
101 /* Define this if most significant byte of a word is the lowest numbered. */
102
103 #define BYTES_BIG_ENDIAN 1
104
105 /* Define this if MS word of a multiword is the lowest numbered. */
106
107 #define WORDS_BIG_ENDIAN 1
108
109 /* Width in bits of a "word", which is the contents of a machine register. */
110
111 #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
112 #define MAX_BITS_PER_WORD 64
113
114 /* Width of a word, in units (bytes). */
115
116 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
117 #define MIN_UNITS_PER_WORD 4
118
119 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
120
121 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
122
123 /* A C expression for the size in bits of the type `short' on the
124 target machine. If you don't define this, the default is half a
125 word. (If this would be less than one storage unit, it is
126 rounded up to one unit.) */
127 #define SHORT_TYPE_SIZE 16
128
129 /* A C expression for the size in bits of the type `int' on the
130 target machine. If you don't define this, the default is one
131 word. */
132 #define INT_TYPE_SIZE 32
133
134 /* A C expression for the size in bits of the type `long' on the
135 target machine. If you don't define this, the default is one
136 word. */
137 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
138 #define MAX_LONG_TYPE_SIZE 64
139
140 /* A C expression for the size in bits of the type `long long' on the
141 target machine. If you don't define this, the default is two
142 words. */
143 #define LONG_LONG_TYPE_SIZE 64
144
145 /* Right now we only support two floating point formats, the
146 32 and 64 bit ieee formats. */
147
148 #define FLOAT_TYPE_SIZE 32
149 #define DOUBLE_TYPE_SIZE 64
150 #define LONG_DOUBLE_TYPE_SIZE 64
151
152 /* Define this macro if it is advisable to hold scalars in registers
153 in a wider mode than that declared by the program. In such cases,
154 the value is constrained to be within the bounds of the declared
155 type, but kept valid in the wider mode. The signedness of the
156 extension may differ from that of the type. */
157
158 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
159 if (INTEGRAL_MODE_P (MODE) && \
160 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
161 (MODE) = Pmode; \
162 }
163
164 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
165 extensions applied to char/short functions arguments. Defining
166 PROMOTE_FUNCTION_RETURN does the same for function returns. */
167
168 #define PROMOTE_FUNCTION_ARGS
169 #define PROMOTE_FUNCTION_RETURN
170 #define PROMOTE_FOR_CALL_ONLY
171
172 /* Allocation boundary (in *bits*) for storing pointers in memory. */
173
174 #define POINTER_BOUNDARY 32
175
176 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
177
178 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
179
180 /* Boundary (in *bits*) on which stack pointer should be aligned. */
181
182 #define STACK_BOUNDARY 64
183
184 /* Allocation boundary (in *bits*) for the code of a function. */
185
186 #define FUNCTION_BOUNDARY 32
187
188 /* There is no point aligning anything to a rounder boundary than this. */
189
190 #define BIGGEST_ALIGNMENT 64
191
192 /* Alignment of field after `int : 0' in a structure. */
193
194 #define EMPTY_FIELD_BOUNDARY 32
195
196 /* Alignment on even addresses for LARL instruction. */
197
198 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
199
200 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
201
202 /* Define this if move instructions will actually fail to work when given
203 unaligned data. */
204
205 #define STRICT_ALIGNMENT 0
206
207 /* real arithmetic */
208
209 #define REAL_ARITHMETIC
210
211 /* Define target floating point format. */
212
213 #undef TARGET_FLOAT_FORMAT
214 #ifdef IEEE_FLOAT
215 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
216 #else
217 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
218 #endif
219
220 /* Define if special allocation order desired. */
221
222 #define REG_ALLOC_ORDER \
223 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
224 16, 17, 18, 19, 20, 21, 22, 23, \
225 24, 25, 26, 27, 28, 29, 30, 31, \
226 15, 32, 33 }
227
228 /* Standard register usage. */
229
230 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
231 #ifdef IEEE_FLOAT
232 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
233 #else
234 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
235 #endif
236 #define CC_REGNO_P(N) ( (N) == 33 )
237
238 /* Number of actual hardware registers. The hardware registers are
239 assigned numbers for the compiler from 0 to just below
240 FIRST_PSEUDO_REGISTER.
241 All registers that the compiler knows about must be given numbers,
242 even those that are not normally considered general registers.
243 For the 390, we give the data registers numbers 0-15,
244 and the floating point registers numbers 16-19.
245 G5 and following have 16 IEEE floating point register,
246 which get numbers 16-31. */
247
248 #define FIRST_PSEUDO_REGISTER 35
249
250 /* Number of hardware registers that go into the DWARF-2 unwind info.
251 If not defined, equals FIRST_PSEUDO_REGISTER. */
252
253 #define DWARF_FRAME_REGISTERS 34
254
255 /* The following register have a fix usage
256 GPR 12: GOT register points to the GOT, setup in prologue,
257 GOT contains pointer to variables in shared libraries
258 GPR 13: Base register setup in prologue to point to the
259 literal table of each function
260 GPR 14: Return registers holds the return address
261 GPR 15: Stack pointer */
262
263 #define PIC_OFFSET_TABLE_REGNUM 12
264 #define BASE_REGISTER 13
265 #define RETURN_REGNUM 14
266 #define STACK_POINTER_REGNUM 15
267
268 #define FIXED_REGISTERS \
269 { 0, 0, 0, 0, \
270 0, 0, 0, 0, \
271 0, 0, 0, 0, \
272 0, 1, 1, 1, \
273 0, 0, 0, 0, \
274 0, 0, 0, 0, \
275 0, 0, 0, 0, \
276 0, 0, 0, 0, \
277 1, 1, 1 }
278
279 /* 1 for registers not available across function calls. These must include
280 the FIXED_REGISTERS and also any registers that can be used without being
281 saved.
282 The latter must include the registers where values are returned
283 and the register where structure-value addresses are passed. */
284
285 #define CALL_USED_REGISTERS \
286 { 1, 1, 1, 1, \
287 1, 1, 0, 0, \
288 0, 0, 0, 0, \
289 0, 1, 1, 1, \
290 1, 1, 1, 1, \
291 1, 1, 1, 1, \
292 1, 1, 1, 1, \
293 1, 1, 1, 1, \
294 1, 1, 1 }
295
296 /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
297 the entire set of `FIXED_REGISTERS' be included.
298 (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */
299
300 #define CALL_REALLY_USED_REGISTERS \
301 { 1, 1, 1, 1, \
302 1, 1, 0, 0, \
303 0, 0, 0, 0, \
304 0, 0, 0, 0, \
305 1, 1, 1, 1, \
306 1, 1, 1, 1, \
307 1, 1, 1, 1, \
308 1, 1, 1, 1, \
309 1, 1, 1 }
310
311 /* Macro to conditionally modify fixed_regs/call_used_regs. */
312
313 #define CONDITIONAL_REGISTER_USAGE \
314 do \
315 { \
316 int i; \
317 \
318 if (flag_pic) \
319 { \
320 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
321 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
322 } \
323 if (TARGET_64BIT) \
324 { \
325 for (i = 24; i < 32; i++) \
326 call_used_regs[i] = call_really_used_regs[i] = 0; \
327 } \
328 else \
329 { \
330 for (i = 18; i < 20; i++) \
331 call_used_regs[i] = call_really_used_regs[i] = 0; \
332 } \
333 } while (0)
334
335 /* The following register have a special usage
336 GPR 11: Frame pointer if needed to point to automatic variables.
337 GPR 32: In functions with more the 5 args this register
338 points to that arguments, it is always eliminated
339 with stack- or frame-pointer.
340 GPR 33: Condition code 'register' */
341
342 #define HARD_FRAME_POINTER_REGNUM 11
343 #define FRAME_POINTER_REGNUM 34
344
345 #define ARG_POINTER_REGNUM 32
346
347 #define CC_REGNUM 33
348
349 /* We use the register %r0 to pass the static chain to a nested function.
350
351 Note: It is assumed that this register is call-clobbered!
352 We can't use any of the function-argument registers either,
353 and register 1 is needed by the trampoline code, so we have
354 no other choice but using this one ... */
355
356 #define STATIC_CHAIN_REGNUM 0
357
358 /* Return number of consecutive hard regs needed starting at reg REGNO
359 to hold something of mode MODE.
360 This is ordinarily the length in words of a value of mode MODE
361 but can be less for certain modes in special long registers. */
362
363 #define HARD_REGNO_NREGS(REGNO, MODE) \
364 (FLOAT_REGNO_P(REGNO)? \
365 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
366 INT_REGNO_P(REGNO)? \
367 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
368 1)
369
370 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
371 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
372 Even gprs can hold DI.
373 The floating point registers can hold DF, SF, DC and SC. */
374
375 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
376 (FLOAT_REGNO_P(REGNO)? \
377 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
378 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT || \
379 (MODE) == SImode || (MODE) == DImode) : \
380 INT_REGNO_P(REGNO)? \
381 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
382 CC_REGNO_P(REGNO)? \
383 GET_MODE_CLASS (MODE) == MODE_CC : \
384 0)
385
386 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
387 mode MODE1 and one has mode MODE2.
388 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
389 for any hard reg, then this must be 0 for correct output. */
390
391 #define MODES_TIEABLE_P(MODE1, MODE2) \
392 (((MODE1) == SFmode || (MODE1) == DFmode) \
393 == ((MODE2) == SFmode || (MODE2) == DFmode))
394
395 /* If defined, gives a class of registers that cannot be used as the
396 operand of a SUBREG that changes the mode of the object illegally. */
397
398 #define CLASS_CANNOT_CHANGE_MODE FP_REGS
399
400 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
401
402 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
403 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
404
405 /* Define this macro if references to a symbol must be treated
406 differently depending on something about the variable or
407 function named by the symbol (such as what section it is in).
408
409 On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol
410 so that we may access it directly in the GOT. */
411
412 #define ENCODE_SECTION_INFO(DECL) \
413 do \
414 { \
415 if (flag_pic) \
416 { \
417 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
418 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
419 \
420 if (GET_CODE (rtl) == MEM) \
421 { \
422 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
423 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
424 || ! TREE_PUBLIC (DECL)); \
425 } \
426 } \
427 } \
428 while (0)
429
430
431 /* This is an array of structures. Each structure initializes one pair
432 of eliminable registers. The "from" register number is given first,
433 followed by "to". Eliminations of the same "from" register are listed
434 in order of preference. */
435
436 #define ELIMINABLE_REGS \
437 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
438 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
439 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
440 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
441
442 #define CAN_ELIMINATE(FROM, TO) (1)
443
444 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
445 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
446 { (OFFSET) = 0; } \
447 else if ((FROM) == FRAME_POINTER_REGNUM \
448 && (TO) == HARD_FRAME_POINTER_REGNUM) \
449 { (OFFSET) = 0; } \
450 else if ((FROM) == ARG_POINTER_REGNUM \
451 && (TO) == HARD_FRAME_POINTER_REGNUM) \
452 { (OFFSET) = s390_arg_frame_offset (); } \
453 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
454 { (OFFSET) = s390_arg_frame_offset (); } \
455 else \
456 abort(); \
457 }
458
459 #define CAN_DEBUG_WITHOUT_FP
460
461 /* Value should be nonzero if functions must have frame pointers.
462 Zero means the frame pointer need not be set up (and parms may be
463 accessed via the stack pointer) in functions that seem suitable.
464 This is computed in `reload', in reload1.c. */
465
466 #define FRAME_POINTER_REQUIRED 0
467
468 /* Define the classes of registers for register constraints in the
469 machine description. Also define ranges of constants.
470
471 One of the classes must always be named ALL_REGS and include all hard regs.
472 If there is more than one class, another class must be named NO_REGS
473 and contain no registers.
474
475 The name GENERAL_REGS must be the name of a class (or an alias for
476 another name such as ALL_REGS). This is the class of registers
477 that is allowed by "g" or "r" in a register constraint.
478 Also, registers outside this class are allocated only when
479 instructions express preferences for them.
480
481 The classes must be numbered in nondecreasing order; that is,
482 a larger-numbered class must never be contained completely
483 in a smaller-numbered class.
484
485 For any two classes, it is very desirable that there be another
486 class that represents their union. */
487
488 /*#define SMALL_REGISTER_CLASSES 1*/
489
490 enum reg_class
491 {
492 NO_REGS, ADDR_REGS, GENERAL_REGS,
493 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
494 ALL_REGS, LIM_REG_CLASSES
495 };
496
497 #define N_REG_CLASSES (int) LIM_REG_CLASSES
498
499 /* Give names of register classes as strings for dump file. */
500
501 #define REG_CLASS_NAMES \
502 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS", \
503 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
504
505 /* Define which registers fit in which classes. This is an initializer for
506 a vector of HARD_REG_SET of length N_REG_CLASSES.
507 G5 and latter have 16 register and support IEEE floating point operations. */
508
509 #define REG_CLASS_CONTENTS \
510 { \
511 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
512 { 0x0000fffe, 0x00000005 }, /* ADDR_REGS */ \
513 { 0x0000ffff, 0x00000005 }, /* GENERAL_REGS */ \
514 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
515 { 0xfffffffe, 0x00000005 }, /* ADDR_FP_REGS */ \
516 { 0xffffffff, 0x00000005 }, /* GENERAL_FP_REGS */ \
517 { 0xffffffff, 0x00000007 }, /* ALL_REGS */ \
518 }
519
520
521 /* The same information, inverted:
522 Return the class number of the smallest class containing
523 reg number REGNO. This could be a conditional expression
524 or could index an array. */
525
526 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
527
528 extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
529
530 /* The class value for index registers, and the one for base regs. */
531
532 #define INDEX_REG_CLASS ADDR_REGS
533 #define BASE_REG_CLASS ADDR_REGS
534
535 /* Get reg_class from a letter such as appears in the machine description. */
536
537 #define REG_CLASS_FROM_LETTER(C) \
538 ((C) == 'a' ? ADDR_REGS : \
539 (C) == 'd' ? GENERAL_REGS : \
540 (C) == 'f' ? FP_REGS : NO_REGS)
541
542 /* The letters I, J, K, L and M in a register constraint string can be used
543 to stand for particular ranges of immediate operands.
544 This macro defines what the ranges are.
545 C is the letter, and VALUE is a constant value.
546 Return 1 if VALUE is in the range specified by C. */
547
548 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
549 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
550 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
551 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
552 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
553
554 /* Similar, but for floating constants, and defining letters G and H.
555 Here VALUE is the CONST_DOUBLE rtx itself. */
556
557 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
558
559 /* 'Q' means a memory-reference for a S-type operand. */
560
561 #define EXTRA_CONSTRAINT(OP, C) \
562 ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \
563 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
564
565 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
566 return the class of reg to actually use. In general this is just CLASS;
567 but on some machines in some cases it is preferable to use a more
568 restrictive class. */
569
570 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
571 s390_preferred_reload_class ((X), (CLASS))
572
573 /* Return the maximum number of consecutive registers needed to represent
574 mode MODE in a register of class CLASS. */
575
576 #define CLASS_MAX_NREGS(CLASS, MODE) \
577 ((CLASS) == FP_REGS ? \
578 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
579 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
580
581 /* We need a secondary reload when loading a PLUS which is
582 not a valid operand for LOAD ADDRESS. */
583
584 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
585 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
586
587 /* If we are copying between FP registers and anything else, we need a memory
588 location. */
589
590 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
591 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
592
593 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
594 because the movsi and movsf patterns don't handle r/f moves. */
595
596 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
597 (GET_MODE_BITSIZE (MODE) < 32 \
598 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
599 : MODE)
600
601
602 /* A C expression whose value is nonzero if pseudos that have been
603 assigned to registers of class CLASS would likely be spilled
604 because registers of CLASS are needed for spill registers.
605
606 The default value of this macro returns 1 if CLASS has exactly one
607 register and zero otherwise. On most machines, this default
608 should be used. Only define this macro to some other expression
609 if pseudo allocated by `local-alloc.c' end up in memory because
610 their hard registers were needed for spill registers. If this
611 macro returns nonzero for those classes, those pseudos will only
612 be allocated by `global.c', which knows how to reallocate the
613 pseudo to another register. If there would not be another
614 register available for reallocation, you should not change the
615 definition of this macro since the only effect of such a
616 definition would be to slow down register allocation. */
617
618 /* Stack layout; function entry, exit and calling. */
619
620 /* The return address of the current frame is retrieved
621 from the initial value of register RETURN_REGNUM.
622 For frames farther back, we use the stack slot where
623 the corresponding RETURN_REGNUM register was saved. */
624
625 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
626 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
627 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
628
629 #define RETURN_ADDR_RTX(COUNT, FRAME) \
630 ((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, RETURN_REGNUM) : \
631 gen_rtx_MEM (Pmode, \
632 memory_address (Pmode, \
633 plus_constant (DYNAMIC_CHAIN_ADDRESS ((FRAME)), \
634 RETURN_REGNUM * UNITS_PER_WORD))))
635
636 /* The following macros will turn on dwarf2 exception hndling
637 Other code location for this exception handling are
638 in s390.md (eh_return insn) and in linux.c in the prologue. */
639
640 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
641
642 /* We have 31 bit mode. */
643
644 #define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff))
645
646 /* The offset from the incoming value of %sp to the top of the stack frame
647 for the current function. */
648
649 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
650
651 /* Location, from where return address to load. */
652
653 #define DWARF_FRAME_RETURN_COLUMN 14
654
655 /* Describe how we implement __builtin_eh_return. */
656 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
657 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
658 #define EH_RETURN_HANDLER_RTX \
659 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
660 TARGET_64BIT? -48 : -40))
661
662 /* Define this if pushing a word on the stack makes the stack pointer a
663 smaller address. */
664
665 #define STACK_GROWS_DOWNWARD
666
667 /* Define this if the nominal address of the stack frame is at the
668 high-address end of the local variables; that is, each additional local
669 variable allocated goes at a more negative offset in the frame. */
670
671 /* #define FRAME_GROWS_DOWNWARD */
672
673 /* Offset from stack-pointer to first location of outgoing args. */
674
675 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
676
677 /* Offset within stack frame to start allocating local variables at.
678 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
679 first local allocated. Otherwise, it is the offset to the BEGINNING
680 of the first local allocated. */
681
682 #define STARTING_FRAME_OFFSET \
683 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
684
685 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
686
687 /* If we generate an insn to push BYTES bytes, this says how many the stack
688 pointer really advances by. On S/390, we have no push instruction. */
689
690 /* #define PUSH_ROUNDING(BYTES) */
691
692 /* Accumulate the outgoing argument count so we can request the right
693 DSA size and determine stack offset. */
694
695 #define ACCUMULATE_OUTGOING_ARGS 1
696
697 /* Offset from the stack pointer register to an item dynamically
698 allocated on the stack, e.g., by `alloca'.
699
700 The default value for this macro is `STACK_POINTER_OFFSET' plus the
701 length of the outgoing arguments. The default is correct for most
702 machines. See `function.c' for details. */
703 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
704
705 /* Offset of first parameter from the argument pointer register value.
706 On the S/390, we define the argument pointer to the start of the fixed
707 area. */
708 #define FIRST_PARM_OFFSET(FNDECL) 0
709
710 /* Define this if stack space is still allocated for a parameter passed
711 in a register. The value is the number of bytes allocated to this
712 area. */
713 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
714
715 /* Define this if the above stack space is to be considered part of the
716 space allocated by the caller. */
717 /* #define OUTGOING_REG_PARM_STACK_SPACE */
718
719 /* 1 if N is a possible register number for function argument passing.
720 On S390, general registers 2 - 6 and floating point register 0 and 2
721 are used in this way. */
722
723 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
724 (N) == 16 || (N) == 17)
725
726 /* Define a data type for recording info about an argument list during
727 the scan of that argument list. This data type should hold all
728 necessary information about the function itself and about the args
729 processed so far, enough to enable macros such as FUNCTION_ARG to
730 determine where the next arg should go. */
731
732 typedef struct s390_arg_structure
733 {
734 int gprs; /* gpr so far */
735 int fprs; /* fpr so far */
736 }
737 CUMULATIVE_ARGS;
738
739
740 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
741 a function whose data type is FNTYPE.
742 For a library call, FNTYPE is 0. */
743
744 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
745 ((CUM).gprs=0, (CUM).fprs=0)
746
747 /* Update the data in CUM to advance over an argument of mode MODE and
748 data type TYPE. (TYPE is null for libcalls where that information
749 may not be available.) */
750
751 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
752 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
753
754 /* Define where to put the arguments to a function. Value is zero to push
755 the argument on the stack, or a hard register in which to store the
756 argument. */
757
758 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
759 s390_function_arg (&CUM, MODE, TYPE, NAMED)
760
761 /* Define where to expect the arguments of a function. Value is zero, if
762 the argument is on the stack, or a hard register in which the argument
763 is stored. It is the same like FUNCTION_ARG, except for unnamed args
764 That means, that all in case of varargs used, the arguments are expected
765 from the stack.
766 S/390 has already space on the stack for args coming in registers,
767 they are pushed in prologue, if needed. */
768
769
770 /* Define the `__builtin_va_list' type. */
771
772 #define BUILD_VA_LIST_TYPE(VALIST) \
773 (VALIST) = s390_build_va_list ()
774
775 /* Implement `va_start' for varargs and stdarg. */
776
777 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
778 s390_va_start (stdarg, valist, nextarg)
779
780 /* Implement `va_arg'. */
781
782 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
783 s390_va_arg (valist, type)
784
785 /* For an arg passed partly in registers and partly in memory, this is the
786 number of registers used. For args passed entirely in registers or
787 entirely in memory, zero. */
788
789 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
790
791
792 /* Define if returning from a function call automatically pops the
793 arguments described by the number-of-args field in the call. */
794
795 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
796
797
798 /* Define how to find the value returned by a function. VALTYPE is the
799 data type of the value (as a tree).
800 If the precise function being called is known, FUNC is its FUNCTION_DECL;
801 otherwise, FUNC is 15. */
802
803 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
804 || TARGET_SOFT_FLOAT ) ? 2 : 16)
805
806
807 /* for structs the address is passed, and the Callee makes a
808 copy, only if needed */
809
810 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
811 s390_function_arg_pass_by_reference (MODE, TYPE)
812
813
814 /* Register 2 (and 3) for integral values
815 or floating point register 0 (and 2) for fp values are used. */
816
817 #define FUNCTION_VALUE(VALTYPE, FUNC) \
818 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
819 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
820 || POINTER_TYPE_P (VALTYPE) \
821 ? word_mode : TYPE_MODE (VALTYPE), \
822 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
823
824 /* Define how to find the value returned by a library function assuming
825 the value has mode MODE. */
826
827 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
828
829 /* 1 if N is a possible register number for a function value. */
830
831 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
832
833 /* The definition of this macro implies that there are cases where
834 a scalar value cannot be returned in registers. */
835
836 #define RETURN_IN_MEMORY(type) \
837 (TYPE_MODE (type) == BLKmode || \
838 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
839 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
840
841 /* Mode of stack savearea.
842 FUNCTION is VOIDmode because calling convention maintains SP.
843 BLOCK needs Pmode for SP.
844 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
845
846 #define STACK_SAVEAREA_MODE(LEVEL) \
847 (LEVEL == SAVE_FUNCTION ? VOIDmode \
848 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
849
850 /* Structure value address is passed as invisible first argument (gpr 2). */
851
852 #define STRUCT_VALUE 0
853
854 /* This macro definition sets up a default value for `main' to return. */
855
856 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
857
858 /* Length in units of the trampoline for entering a nested function. */
859
860 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
861
862 /* Initialize the dynamic part of trampoline. */
863
864 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
865 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
866
867 /* Template for constant part of trampoline. */
868
869 #define TRAMPOLINE_TEMPLATE(FILE) \
870 s390_trampoline_template (FILE)
871
872 /* Output assembler code to FILE to increment profiler label # LABELNO
873 for profiling a function entry. */
874
875 #define FUNCTION_PROFILER(FILE, LABELNO) \
876 s390_function_profiler ((FILE), ((LABELNO)))
877
878 /* #define PROFILE_BEFORE_PROLOGUE */
879
880 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
881 pointer does not matter (provided there is a frame pointer). */
882
883 #define EXIT_IGNORE_STACK 1
884
885 /* Addressing modes, and classification of registers for them. */
886
887 /* #define HAVE_POST_INCREMENT */
888 /* #define HAVE_POST_DECREMENT */
889
890 /* #define HAVE_PRE_DECREMENT */
891 /* #define HAVE_PRE_INCREMENT */
892
893 /* These assume that REGNO is a hard or pseudo reg number. They give
894 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
895 reg currently allocated to a suitable hard reg.
896 These definitions are NOT overridden anywhere. */
897
898 #define REGNO_OK_FOR_INDEX_P(REGNO) \
899 (((REGNO) < FIRST_PSEUDO_REGISTER \
900 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
901 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
902
903 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
904
905 #define REGNO_OK_FOR_DATA_P(REGNO) \
906 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
907
908 #define REGNO_OK_FOR_FP_P(REGNO) \
909 FLOAT_REGNO_P (REGNO)
910
911 /* Now macros that check whether X is a register and also,
912 strictly, whether it is in a specified class. */
913
914 /* 1 if X is a data register. */
915
916 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
917
918 /* 1 if X is an fp register. */
919
920 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
921
922 /* 1 if X is an address register. */
923
924 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
925
926 /* Maximum number of registers that can appear in a valid memory address. */
927
928 #define MAX_REGS_PER_ADDRESS 2
929
930 /* Recognize any constant value that is a valid address. */
931
932 #define CONSTANT_ADDRESS_P(X) 0
933
934 #define SYMBOLIC_CONST(X) \
935 (GET_CODE (X) == SYMBOL_REF \
936 || GET_CODE (X) == LABEL_REF \
937 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
938
939 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
940 they have to be forced to constant pool
941 CONST_INT have to be forced into constant pool, if greater than
942 64k. Depending on the insn they have to be force into constant pool
943 for smaller value; in this case we have to work with nonimmediate operand. */
944
945 #define LEGITIMATE_PIC_OPERAND_P(X) \
946 legitimate_pic_operand_p (X)
947
948 /* Nonzero if the constant value X is a legitimate general operand.
949 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
950
951 #define LEGITIMATE_CONSTANT_P(X) \
952 legitimate_constant_p (X)
953
954 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
955 its validity for a certain class. We have two alternate definitions
956 for each of them. The usual definition accepts all pseudo regs; the
957 other rejects them all. The symbol REG_OK_STRICT causes the latter
958 definition to be used.
959
960 Most source files want to accept pseudo regs in the hope that they will
961 get allocated to the class that the insn wants them to be in.
962 Some source files that are used after register allocation
963 need to be strict. */
964
965 /*
966 * Nonzero if X is a hard reg that can be used as an index or if it is
967 * a pseudo reg.
968 */
969
970 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
971 ((GET_MODE (X) == Pmode) && \
972 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
973 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
974
975 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
976 a pseudo reg. */
977
978 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
979
980 /* Nonzero if X is a hard reg that can be used as an index. */
981
982 #define REG_OK_FOR_INDEX_STRICT_P(X) \
983 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
984
985 /* Nonzero if X is a hard reg that can be used as a base reg. */
986
987 #define REG_OK_FOR_BASE_STRICT_P(X) \
988 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
989
990
991 #ifndef REG_OK_STRICT
992 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
993 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
994 #else
995 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
996 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
997 #endif
998
999
1000 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1001 valid memory address for an instruction.
1002 The MODE argument is the machine mode for the MEM expression
1003 that wants to use this address.
1004
1005 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1006 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1007
1008 #ifdef REG_OK_STRICT
1009 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1010 { \
1011 if (legitimate_address_p (MODE, X, 1)) \
1012 goto ADDR; \
1013 }
1014 #else
1015 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1016 { \
1017 if (legitimate_address_p (MODE, X, 0)) \
1018 goto ADDR; \
1019 }
1020 #endif
1021
1022
1023 /* S/390 has no mode dependent addresses. */
1024
1025 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1026
1027 /* Try machine-dependent ways of modifying an illegitimate address
1028 to be legitimate. If we find one, return the new, valid address.
1029 This macro is used in only one place: `memory_address' in explow.c. */
1030
1031 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1032 { \
1033 (X) = legitimize_address (X, OLDX, MODE); \
1034 if (memory_address_p (MODE, X)) \
1035 goto WIN; \
1036 }
1037
1038 /* Specify the machine mode that this machine uses for the index in the
1039 tablejump instruction. */
1040
1041 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1042
1043 /* Define this if the tablejump instruction expects the table to contain
1044 offsets from the address of the table.
1045 Do not define this if the table should contain absolute addresses. */
1046
1047 /* #define CASE_VECTOR_PC_RELATIVE */
1048
1049 /* Load from integral MODE < SI from memory into register makes sign_extend
1050 or zero_extend
1051 In our case sign_extension happens for Halfwords, other no extension. */
1052
1053 #define LOAD_EXTEND_OP(MODE) \
1054 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1055 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1056 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1057
1058 /* Define this if fixuns_trunc is the same as fix_trunc. */
1059
1060 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1061
1062 /* We use "unsigned char" as default. */
1063
1064 #define DEFAULT_SIGNED_CHAR 0
1065
1066 /* Max number of bytes we can move from memory to memory in one reasonably
1067 fast instruction. */
1068
1069 #define MOVE_MAX 256
1070
1071 /* Nonzero if access to memory by bytes is slow and undesirable. */
1072
1073 #define SLOW_BYTE_ACCESS 1
1074
1075 /* Define if shifts truncate the shift count which implies one can omit
1076 a sign-extension or zero-extension of a shift count. */
1077
1078 /* #define SHIFT_COUNT_TRUNCATED */
1079
1080 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1081 is done just by pretending it is already truncated. */
1082
1083 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1084
1085 /* We assume that the store-condition-codes instructions store 0 for false
1086 and some other value for true. This is the value stored for true. */
1087
1088 /* #define STORE_FLAG_VALUE -1 */
1089
1090 /* Don't perform CSE on function addresses. */
1091
1092 #define NO_FUNCTION_CSE
1093
1094 /* Specify the machine mode that pointers have.
1095 After generation of rtl, the compiler makes no further distinction
1096 between pointers and any other objects of this machine mode. */
1097
1098 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1099
1100 /* A function address in a call instruction is a byte address (for
1101 indexing purposes) so give the MEM rtx a byte's mode. */
1102
1103 #define FUNCTION_MODE QImode
1104
1105
1106 /* A part of a C `switch' statement that describes the relative costs
1107 of constant RTL expressions. It must contain `case' labels for
1108 expression codes `const_int', `const', `symbol_ref', `label_ref'
1109 and `const_double'. Each case must ultimately reach a `return'
1110 statement to return the relative cost of the use of that kind of
1111 constant value in an expression. The cost may depend on the
1112 precise value of the constant, which is available for examination
1113 in X, and the rtx code of the expression in which it is contained,
1114 found in OUTER_CODE.
1115
1116 CODE is the expression code--redundant, since it can be obtained
1117 with `GET_CODE (X)'. */
1118 /* Force_const_mem does not work out of reload, because the saveable_obstack
1119 is set to reload_obstack, which does not live long enough.
1120 Because of this we cannot use force_const_mem in addsi3.
1121 This leads to problems with gen_add2_insn with a constant greater
1122 than a short. Because of that we give an addition of greater
1123 constants a cost of 3 (reload1.c 10096). */
1124
1125
1126 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1127 case CONST: \
1128 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1129 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1130 return 1000; \
1131 case CONST_INT: \
1132 if ((OUTER_CODE == PLUS) && \
1133 ((INTVAL (RTX) > 32767) || \
1134 (INTVAL (RTX) < -32768))) \
1135 return COSTS_N_INSNS (3); \
1136 case LABEL_REF: \
1137 case SYMBOL_REF: \
1138 case CONST_DOUBLE: \
1139 return 0; \
1140
1141
1142 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1143 This can be used, for example, to indicate how costly a multiply
1144 instruction is. In writing this macro, you can use the construct
1145 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1146 instructions. OUTER_CODE is the code of the expression in which X
1147 is contained.
1148
1149 This macro is optional; do not define it if the default cost
1150 assumptions are adequate for the target machine. */
1151
1152 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1153 case ASHIFT: \
1154 case ASHIFTRT: \
1155 case LSHIFTRT: \
1156 case PLUS: \
1157 case AND: \
1158 case IOR: \
1159 case XOR: \
1160 case MINUS: \
1161 case NEG: \
1162 case NOT: \
1163 return 1; \
1164 case MULT: \
1165 if (GET_MODE (XEXP (X, 0)) == DImode) \
1166 return 40; \
1167 else \
1168 return 7; \
1169 case DIV: \
1170 case UDIV: \
1171 case MOD: \
1172 case UMOD: \
1173 return 33;
1174
1175
1176 /* An expression giving the cost of an addressing mode that contains
1177 ADDRESS. If not defined, the cost is computed from the ADDRESS
1178 expression and the `CONST_COSTS' values.
1179
1180 For most CISC machines, the default cost is a good approximation
1181 of the true cost of the addressing mode. However, on RISC
1182 machines, all instructions normally have the same length and
1183 execution time. Hence all addresses will have equal costs.
1184
1185 In cases where more than one form of an address is known, the form
1186 with the lowest cost will be used. If multiple forms have the
1187 same, lowest, cost, the one that is the most complex will be used.
1188
1189 For example, suppose an address that is equal to the sum of a
1190 register and a constant is used twice in the same basic block.
1191 When this macro is not defined, the address will be computed in a
1192 register and memory references will be indirect through that
1193 register. On machines where the cost of the addressing mode
1194 containing the sum is no higher than that of a simple indirect
1195 reference, this will produce an additional instruction and
1196 possibly require an additional register. Proper specification of
1197 this macro eliminates this overhead for such machines.
1198
1199 Similar use of this macro is made in strength reduction of loops.
1200
1201 ADDRESS need not be valid as an address. In such a case, the cost
1202 is not relevant and can be any value; invalid addresses need not be
1203 assigned a different cost.
1204
1205 On machines where an address involving more than one register is as
1206 cheap as an address computation involving only one register,
1207 defining `ADDRESS_COST' to reflect this can cause two registers to
1208 be live over a region of code where only one would have been if
1209 `ADDRESS_COST' were not defined in that manner. This effect should
1210 be considered in the definition of this macro. Equivalent costs
1211 should probably only be given to addresses with different numbers
1212 of registers on machines with lots of registers.
1213
1214 This macro will normally either not be defined or be defined as a
1215 constant.
1216
1217 On s390 symbols are expensive if compiled with fpic
1218 lifetimes. */
1219
1220 #define ADDRESS_COST(RTX) \
1221 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1222
1223 /* On s390, copy between fprs and gprs is expensive. */
1224
1225 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1226 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
1227 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
1228 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
1229 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
1230
1231
1232 /* A C expression for the cost of moving data of mode M between a
1233 register and memory. A value of 2 is the default; this cost is
1234 relative to those in `REGISTER_MOVE_COST'.
1235
1236 If moving between registers and memory is more expensive than
1237 between two registers, you should define this macro to express the
1238 relative cost. */
1239
1240 #define MEMORY_MOVE_COST(M, C, I) 1
1241
1242 /* A C expression for the cost of a branch instruction. A value of 1
1243 is the default; other values are interpreted relative to that. */
1244
1245 #define BRANCH_COST 1
1246
1247 /* Add any extra modes needed to represent the condition code. */
1248 #define EXTRA_CC_MODES \
1249 CC (CCZmode, "CCZ") \
1250 CC (CCAmode, "CCA") \
1251 CC (CCLmode, "CCL") \
1252 CC (CCUmode, "CCU") \
1253 CC (CCSmode, "CCS") \
1254 CC (CCTmode, "CCT")
1255
1256 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1257 return the mode to be used for the comparison. */
1258
1259 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1260
1261
1262 /* Define the information needed to generate branch and scc insns. This is
1263 stored from the compare operation. Note that we can't use "rtx" here
1264 since it hasn't been defined! */
1265
1266 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1267
1268
1269 /* How to refer to registers in assembler output. This sequence is
1270 indexed by compiler's hard-register-number (see above). */
1271
1272 #define REGISTER_NAMES \
1273 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1274 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1275 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1276 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1277 "%ap", "%cc", "%fp" \
1278 }
1279
1280 /* implicit call of memcpy, not bcopy */
1281
1282 #define TARGET_MEM_FUNCTIONS
1283
1284
1285 /* Print operand X (an rtx) in assembler syntax to file FILE.
1286 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1287 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1288
1289 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1290
1291 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1292
1293
1294 /* Define the codes that are matched by predicates in aux-output.c. */
1295
1296 #define PREDICATE_CODES \
1297 {"s_operand", { SUBREG, MEM }}, \
1298 {"s_imm_operand", { CONST_INT, CONST_DOUBLE, SUBREG, MEM }}, \
1299 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1300 {"larl_operand", { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }}, \
1301 {"load_multiple_operation", {PARALLEL}}, \
1302 {"store_multiple_operation", {PARALLEL}}, \
1303 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1304 {"s390_plus_operand", { PLUS }},
1305
1306
1307 /* S/390 constant pool breaks the devices in crtstuff.c to control section
1308 in where code resides. We have to write it as asm code. */
1309 #ifndef __s390x__
1310 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
1311 asm (SECTION_OP "\n\
1312 bras\t%r2,1f\n\
1313 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
1314 1: l\t%r3,0(%r2)\n\
1315 bas\t%r14,0(%r3,%r2)\n\
1316 .previous");
1317 #endif
1318
1319 /* Constant Pool for all symbols operands which are changed with
1320 force_const_mem during insn generation (expand_insn). */
1321
1322 extern struct rtx_def *s390_pool_start_insn;
1323 extern int s390_pool_count;
1324 extern int s390_nr_constants;
1325
1326 /* Function is splitted in chunk, if literal pool could overflow
1327 Value need to be lowered, if problems with displacement overflow. */
1328
1329 #define S390_CHUNK_MAX 0xe00
1330 #define S390_CHUNK_OV 0x1000
1331 #define S390_POOL_MAX 0xe00
1332
1333 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1334 { \
1335 register rtx insn; \
1336 struct pool_constant *pool; \
1337 \
1338 if (s390_pool_count == -1) \
1339 { \
1340 s390_nr_constants = 0; \
1341 for (pool = first_pool; pool; pool = pool->next) \
1342 if (pool->mark) s390_nr_constants++; \
1343 return; \
1344 } \
1345 if (first_pool == 0) { \
1346 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1347 return; \
1348 } \
1349 for (pool = first_pool; pool; pool = pool->next) \
1350 pool->mark = 0; \
1351 \
1352 insn = s390_pool_start_insn; \
1353 \
1354 if (insn==NULL_RTX) \
1355 insn = get_insns (); \
1356 else \
1357 insn = NEXT_INSN (insn); \
1358 for (; insn; insn = NEXT_INSN (insn)) { \
1359 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { \
1360 if (s390_stop_dump_lit_p (insn)) { \
1361 mark_constants (PATTERN (insn)); \
1362 break; \
1363 } else \
1364 mark_constants (PATTERN (insn)); \
1365 } \
1366 } \
1367 \
1368 /* Mark entries referenced by other entries */ \
1369 for (pool = first_pool; pool; pool = pool->next) \
1370 if (pool->mark) \
1371 mark_constants (pool->constant); \
1372 \
1373 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1374 }
1375
1376 /* We need to return, because otherwise the pool is deleted of the
1377 constant pool after the first output. */
1378
1379 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1380
1381 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1382 { \
1383 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1384 { \
1385 fprintf (FILE, ".LC%d:\n", LABELNO); \
1386 LABELNO = ~LABELNO; \
1387 } \
1388 if (s390_pool_count > 0) \
1389 { \
1390 fprintf (FILE, ".LC%d_%X:\n", ~LABELNO, s390_pool_count); \
1391 } \
1392 \
1393 /* Output the value of the constant itself. */ \
1394 switch (GET_MODE_CLASS (MODE)) \
1395 { \
1396 case MODE_FLOAT: \
1397 if (GET_CODE (EXP) != CONST_DOUBLE) \
1398 abort (); \
1399 \
1400 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \
1401 assemble_real (u.d, MODE, ALIGN); \
1402 break; \
1403 \
1404 case MODE_INT: \
1405 case MODE_PARTIAL_INT: \
1406 if (flag_pic \
1407 && (GET_CODE (EXP) == CONST \
1408 || GET_CODE (EXP) == SYMBOL_REF \
1409 || GET_CODE (EXP) == LABEL_REF )) \
1410 { \
1411 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \
1412 s390_output_symbolic_const (FILE, EXP); \
1413 fputc ('\n', (FILE)); \
1414 } \
1415 else \
1416 { \
1417 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1418 if (GET_MODE_SIZE (MODE) == 1) \
1419 ASM_OUTPUT_SKIP ((FILE), 1); \
1420 } \
1421 break; \
1422 \
1423 default: \
1424 abort (); \
1425 } \
1426 goto WIN; \
1427 }
1428
1429 #endif