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[gcc.git] / gcc / config / s390 / s390.h
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #ifndef _S390_H
23 #define _S390_H
24
25 /* Override the __fixdfdi etc. routines when building libgcc2.
26 ??? This should be done in a cleaner way ... */
27 #ifdef IN_LIBGCC2
28 #include <s390/fixdfdi.h>
29 #endif
30
31
32 extern int flag_pic;
33
34 /* Run-time compilation parameters selecting different hardware subsets. */
35
36 extern int target_flags;
37
38 /* Target macros checked at runtime of compiler. */
39
40 #define TARGET_HARD_FLOAT (target_flags & 1)
41 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
42 #define TARGET_BACKCHAIN (target_flags & 2)
43 #define TARGET_SMALL_EXEC (target_flags & 4)
44 #define TARGET_DEBUG_ARG (target_flags & 8)
45 #define TARGET_64BIT (target_flags & 16)
46 #define TARGET_MVCLE (target_flags & 32)
47
48 /* ??? Once this actually works, it could be made a runtime option. */
49 #define TARGET_IBM_FLOAT 0
50 #define TARGET_IEEE_FLOAT 1
51
52 #ifdef DEFAULT_TARGET_64BIT
53 #define TARGET_DEFAULT 0x13
54 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
55 #else
56 #define TARGET_DEFAULT 0x3
57 #define TARGET_VERSION fprintf (stderr, " (S/390)");
58 #endif
59
60
61 /* Macro to define tables used to set the flags. This is a list in braces
62 of pairs in braces, each pair being { "NAME", VALUE }
63 where VALUE is the bits to set or minus the bits to clear.
64 An empty string NAME is used to identify the default VALUE. */
65
66 #define TARGET_SWITCHES \
67 { { "hard-float", 1, N_("Use hardware fp")}, \
68 { "soft-float", -1, N_("Don't use hardware fp")}, \
69 { "backchain", 2, N_("Set backchain")}, \
70 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
71 { "small-exec", 4, N_("Use bras for execucable < 64k")}, \
72 { "no-small-exec",-4, N_("Don't use bras")}, \
73 { "debug", 8, N_("Additional debug prints")}, \
74 { "no-debug", -8, N_("Don't print additional debug prints")}, \
75 { "64", 16, N_("64 bit mode")}, \
76 { "31", -16, N_("31 bit mode")}, \
77 { "mvcle", 32, N_("mvcle use")}, \
78 { "no-mvcle", -32, N_("mvc&ex")}, \
79 { "", TARGET_DEFAULT, 0 } }
80
81 /* Define this to change the optimizations performed by default. */
82 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
83
84 /* Sometimes certain combinations of command options do not make sense
85 on a particular target machine. You can define a macro
86 `OVERRIDE_OPTIONS' to take account of this. This macro, if
87 defined, is executed once just after all the command options have
88 been parsed. */
89 #define OVERRIDE_OPTIONS override_options ()
90
91 /* Target CPU builtins. */
92 #define TARGET_CPU_CPP_BUILTINS() \
93 do \
94 { \
95 builtin_assert ("cpu=s390"); \
96 builtin_assert ("machine=s390"); \
97 builtin_define ("__s390__"); \
98 if (TARGET_64BIT) \
99 builtin_define ("__s390x__"); \
100 } \
101 while (0)
102
103 /* The amount of space used for outgoing arguments. */
104
105 extern int current_function_outgoing_args_size;
106
107 /* Target machine storage layout. */
108
109 /* Define this if most significant bit is lowest numbered in instructions
110 that operate on numbered bit-fields. */
111
112 #define BITS_BIG_ENDIAN 1
113
114 /* Define this if most significant byte of a word is the lowest numbered. */
115
116 #define BYTES_BIG_ENDIAN 1
117
118 /* Define this if MS word of a multiword is the lowest numbered. */
119
120 #define WORDS_BIG_ENDIAN 1
121
122 #define MAX_BITS_PER_WORD 64
123
124 /* Width of a word, in units (bytes). */
125
126 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
127 #define MIN_UNITS_PER_WORD 4
128
129 /* A C expression for the size in bits of the type `short' on the
130 target machine. If you don't define this, the default is half a
131 word. (If this would be less than one storage unit, it is
132 rounded up to one unit.) */
133 #define SHORT_TYPE_SIZE 16
134
135 /* A C expression for the size in bits of the type `int' on the
136 target machine. If you don't define this, the default is one
137 word. */
138 #define INT_TYPE_SIZE 32
139
140 /* A C expression for the size in bits of the type `long' on the
141 target machine. If you don't define this, the default is one
142 word. */
143 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
144 #define MAX_LONG_TYPE_SIZE 64
145
146 /* A C expression for the size in bits of the type `long long' on the
147 target machine. If you don't define this, the default is two
148 words. */
149 #define LONG_LONG_TYPE_SIZE 64
150
151 /* Right now we only support two floating point formats, the
152 32 and 64 bit ieee formats. */
153
154 #define FLOAT_TYPE_SIZE 32
155 #define DOUBLE_TYPE_SIZE 64
156 #define LONG_DOUBLE_TYPE_SIZE 64
157
158 /* Define this macro if it is advisable to hold scalars in registers
159 in a wider mode than that declared by the program. In such cases,
160 the value is constrained to be within the bounds of the declared
161 type, but kept valid in the wider mode. The signedness of the
162 extension may differ from that of the type. */
163
164 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
165 if (INTEGRAL_MODE_P (MODE) && \
166 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
167 (MODE) = Pmode; \
168 }
169
170 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
171 extensions applied to char/short functions arguments. Defining
172 PROMOTE_FUNCTION_RETURN does the same for function returns. */
173
174 #define PROMOTE_FUNCTION_ARGS
175 #define PROMOTE_FUNCTION_RETURN
176 #define PROMOTE_FOR_CALL_ONLY
177
178 /* Allocation boundary (in *bits*) for storing pointers in memory. */
179
180 #define POINTER_BOUNDARY 32
181
182 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
183
184 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
185
186 /* Boundary (in *bits*) on which stack pointer should be aligned. */
187
188 #define STACK_BOUNDARY 64
189
190 /* Allocation boundary (in *bits*) for the code of a function. */
191
192 #define FUNCTION_BOUNDARY 32
193
194 /* There is no point aligning anything to a rounder boundary than this. */
195
196 #define BIGGEST_ALIGNMENT 64
197
198 /* Alignment of field after `int : 0' in a structure. */
199
200 #define EMPTY_FIELD_BOUNDARY 32
201
202 /* Alignment on even addresses for LARL instruction. */
203
204 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
205
206 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
207
208 /* Define this if move instructions will actually fail to work when given
209 unaligned data. */
210
211 #define STRICT_ALIGNMENT 0
212
213 /* Define target floating point format. */
214 #define TARGET_FLOAT_FORMAT \
215 (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
216
217 /* Define if special allocation order desired. */
218
219 #define REG_ALLOC_ORDER \
220 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
221 16, 17, 18, 19, 20, 21, 22, 23, \
222 24, 25, 26, 27, 28, 29, 30, 31, \
223 15, 32, 33, 34 }
224
225 /* Standard register usage. */
226
227 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
228 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
229 #define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
230 #define CC_REGNO_P(N) ((N) == 33)
231
232 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
233 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
234 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
235 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
236
237 /* Number of actual hardware registers. The hardware registers are
238 assigned numbers for the compiler from 0 to just below
239 FIRST_PSEUDO_REGISTER.
240 All registers that the compiler knows about must be given numbers,
241 even those that are not normally considered general registers.
242 For the 390, we give the data registers numbers 0-15,
243 and the floating point registers numbers 16-19.
244 G5 and following have 16 IEEE floating point register,
245 which get numbers 16-31. */
246
247 #define FIRST_PSEUDO_REGISTER 35
248
249 /* Number of hardware registers that go into the DWARF-2 unwind info.
250 If not defined, equals FIRST_PSEUDO_REGISTER. */
251
252 #define DWARF_FRAME_REGISTERS 34
253
254 /* The following register have a fix usage
255 GPR 12: GOT register points to the GOT, setup in prologue,
256 GOT contains pointer to variables in shared libraries
257 GPR 13: Base register setup in prologue to point to the
258 literal table of each function
259 GPR 14: Return registers holds the return address
260 GPR 15: Stack pointer */
261
262 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
263 #define BASE_REGISTER 13
264 #define RETURN_REGNUM 14
265 #define STACK_POINTER_REGNUM 15
266
267 #define FIXED_REGISTERS \
268 { 0, 0, 0, 0, \
269 0, 0, 0, 0, \
270 0, 0, 0, 0, \
271 0, 1, 1, 1, \
272 0, 0, 0, 0, \
273 0, 0, 0, 0, \
274 0, 0, 0, 0, \
275 0, 0, 0, 0, \
276 1, 1, 1 }
277
278 /* 1 for registers not available across function calls. These must include
279 the FIXED_REGISTERS and also any registers that can be used without being
280 saved.
281 The latter must include the registers where values are returned
282 and the register where structure-value addresses are passed. */
283
284 #define CALL_USED_REGISTERS \
285 { 1, 1, 1, 1, \
286 1, 1, 0, 0, \
287 0, 0, 0, 0, \
288 0, 1, 1, 1, \
289 1, 1, 1, 1, \
290 1, 1, 1, 1, \
291 1, 1, 1, 1, \
292 1, 1, 1, 1, \
293 1, 1, 1 }
294
295 /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
296 the entire set of `FIXED_REGISTERS' be included.
297 (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */
298
299 #define CALL_REALLY_USED_REGISTERS \
300 { 1, 1, 1, 1, \
301 1, 1, 0, 0, \
302 0, 0, 0, 0, \
303 0, 0, 0, 0, \
304 1, 1, 1, 1, \
305 1, 1, 1, 1, \
306 1, 1, 1, 1, \
307 1, 1, 1, 1, \
308 1, 1, 1 }
309
310 /* Macro to conditionally modify fixed_regs/call_used_regs. */
311
312 #define CONDITIONAL_REGISTER_USAGE \
313 do \
314 { \
315 int i; \
316 \
317 if (flag_pic) \
318 { \
319 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
320 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
321 } \
322 if (TARGET_64BIT) \
323 { \
324 for (i = 24; i < 32; i++) \
325 call_used_regs[i] = call_really_used_regs[i] = 0; \
326 } \
327 else \
328 { \
329 for (i = 18; i < 20; i++) \
330 call_used_regs[i] = call_really_used_regs[i] = 0; \
331 } \
332 } while (0)
333
334 /* The following register have a special usage
335 GPR 11: Frame pointer if needed to point to automatic variables.
336 GPR 32: In functions with more the 5 args this register
337 points to that arguments, it is always eliminated
338 with stack- or frame-pointer.
339 GPR 33: Condition code 'register' */
340
341 #define HARD_FRAME_POINTER_REGNUM 11
342 #define FRAME_POINTER_REGNUM 34
343
344 #define ARG_POINTER_REGNUM 32
345
346 #define CC_REGNUM 33
347
348 /* We use the register %r0 to pass the static chain to a nested function.
349
350 Note: It is assumed that this register is call-clobbered!
351 We can't use any of the function-argument registers either,
352 and register 1 is needed by the trampoline code, so we have
353 no other choice but using this one ... */
354
355 #define STATIC_CHAIN_REGNUM 0
356
357 /* Return number of consecutive hard regs needed starting at reg REGNO
358 to hold something of mode MODE.
359 This is ordinarily the length in words of a value of mode MODE
360 but can be less for certain modes in special long registers. */
361
362 #define HARD_REGNO_NREGS(REGNO, MODE) \
363 (FP_REGNO_P(REGNO)? \
364 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
365 GENERAL_REGNO_P(REGNO)? \
366 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
367 1)
368
369 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
370 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
371 Even gprs can hold DI.
372 The floating point registers can hold DF, SF, DC and SC. */
373
374 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
375 (FP_REGNO_P(REGNO)? \
376 ((MODE) == SImode || (MODE) == DImode || \
377 GET_MODE_CLASS(MODE) == MODE_FLOAT || \
378 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \
379 GENERAL_REGNO_P(REGNO)? \
380 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
381 CC_REGNO_P(REGNO)? \
382 GET_MODE_CLASS (MODE) == MODE_CC : \
383 0)
384
385 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
386 mode MODE1 and one has mode MODE2.
387 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
388 for any hard reg, then this must be 0 for correct output. */
389
390 #define MODES_TIEABLE_P(MODE1, MODE2) \
391 (((MODE1) == SFmode || (MODE1) == DFmode) \
392 == ((MODE2) == SFmode || (MODE2) == DFmode))
393
394 /* If defined, gives a class of registers that cannot be used as the
395 operand of a SUBREG that changes the mode of the object illegally. */
396
397 #define CLASS_CANNOT_CHANGE_MODE FP_REGS
398
399 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
400
401 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
402 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
403
404 /* This is an array of structures. Each structure initializes one pair
405 of eliminable registers. The "from" register number is given first,
406 followed by "to". Eliminations of the same "from" register are listed
407 in order of preference. */
408
409 #define ELIMINABLE_REGS \
410 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
411 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
412 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
413 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
414
415 #define CAN_ELIMINATE(FROM, TO) (1)
416
417 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
418 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
419 { (OFFSET) = 0; } \
420 else if ((FROM) == FRAME_POINTER_REGNUM \
421 && (TO) == HARD_FRAME_POINTER_REGNUM) \
422 { (OFFSET) = 0; } \
423 else if ((FROM) == ARG_POINTER_REGNUM \
424 && (TO) == HARD_FRAME_POINTER_REGNUM) \
425 { (OFFSET) = s390_arg_frame_offset (); } \
426 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
427 { (OFFSET) = s390_arg_frame_offset (); } \
428 else \
429 abort(); \
430 }
431
432 #define CAN_DEBUG_WITHOUT_FP
433
434 /* Value should be nonzero if functions must have frame pointers.
435 Zero means the frame pointer need not be set up (and parms may be
436 accessed via the stack pointer) in functions that seem suitable.
437 This is computed in `reload', in reload1.c. */
438
439 #define FRAME_POINTER_REQUIRED 0
440
441 /* Define the classes of registers for register constraints in the
442 machine description. Also define ranges of constants.
443
444 One of the classes must always be named ALL_REGS and include all hard regs.
445 If there is more than one class, another class must be named NO_REGS
446 and contain no registers.
447
448 The name GENERAL_REGS must be the name of a class (or an alias for
449 another name such as ALL_REGS). This is the class of registers
450 that is allowed by "g" or "r" in a register constraint.
451 Also, registers outside this class are allocated only when
452 instructions express preferences for them.
453
454 The classes must be numbered in nondecreasing order; that is,
455 a larger-numbered class must never be contained completely
456 in a smaller-numbered class.
457
458 For any two classes, it is very desirable that there be another
459 class that represents their union. */
460
461 /*#define SMALL_REGISTER_CLASSES 1*/
462
463 enum reg_class
464 {
465 NO_REGS, ADDR_REGS, GENERAL_REGS,
466 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
467 ALL_REGS, LIM_REG_CLASSES
468 };
469
470 #define N_REG_CLASSES (int) LIM_REG_CLASSES
471
472 /* Give names of register classes as strings for dump file. */
473
474 #define REG_CLASS_NAMES \
475 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS", \
476 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
477
478 /* Define which registers fit in which classes. This is an initializer for
479 a vector of HARD_REG_SET of length N_REG_CLASSES.
480 G5 and latter have 16 register and support IEEE floating point operations. */
481
482 #define REG_CLASS_CONTENTS \
483 { \
484 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
485 { 0x0000fffe, 0x00000005 }, /* ADDR_REGS */ \
486 { 0x0000ffff, 0x00000005 }, /* GENERAL_REGS */ \
487 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
488 { 0xfffffffe, 0x00000005 }, /* ADDR_FP_REGS */ \
489 { 0xffffffff, 0x00000005 }, /* GENERAL_FP_REGS */ \
490 { 0xffffffff, 0x00000007 }, /* ALL_REGS */ \
491 }
492
493
494 /* The same information, inverted:
495 Return the class number of the smallest class containing
496 reg number REGNO. This could be a conditional expression
497 or could index an array. */
498
499 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
500
501 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
502
503 /* The class value for index registers, and the one for base regs. */
504
505 #define INDEX_REG_CLASS ADDR_REGS
506 #define BASE_REG_CLASS ADDR_REGS
507
508 /* Get reg_class from a letter such as appears in the machine description. */
509
510 #define REG_CLASS_FROM_LETTER(C) \
511 ((C) == 'a' ? ADDR_REGS : \
512 (C) == 'd' ? GENERAL_REGS : \
513 (C) == 'f' ? FP_REGS : NO_REGS)
514
515 /* The letters I, J, K, L and M in a register constraint string can be used
516 to stand for particular ranges of immediate operands.
517 This macro defines what the ranges are.
518 C is the letter, and VALUE is a constant value.
519 Return 1 if VALUE is in the range specified by C. */
520
521 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
522 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
523 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
524 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
525 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
526
527 /* Similar, but for floating constants, and defining letters G and H.
528 Here VALUE is the CONST_DOUBLE rtx itself. */
529
530 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
531
532 /* 'Q' means a memory-reference for a S-type operand. */
533
534 #define EXTRA_CONSTRAINT(OP, C) \
535 ((C) == 'Q' ? q_constraint (OP) : \
536 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
537
538 #define EXTRA_MEMORY_CONSTRAINT(C) ((C) == 'Q')
539
540 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
541 return the class of reg to actually use. In general this is just CLASS;
542 but on some machines in some cases it is preferable to use a more
543 restrictive class. */
544
545 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
546 s390_preferred_reload_class ((X), (CLASS))
547
548 /* Return the maximum number of consecutive registers needed to represent
549 mode MODE in a register of class CLASS. */
550
551 #define CLASS_MAX_NREGS(CLASS, MODE) \
552 ((CLASS) == FP_REGS ? \
553 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
554 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
555
556 /* We need a secondary reload when loading a PLUS which is
557 not a valid operand for LOAD ADDRESS. */
558
559 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
560 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
561
562 /* If we are copying between FP registers and anything else, we need a memory
563 location. */
564
565 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
566 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
567
568 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
569 because the movsi and movsf patterns don't handle r/f moves. */
570
571 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
572 (GET_MODE_BITSIZE (MODE) < 32 \
573 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
574 : MODE)
575
576
577 /* A C expression whose value is nonzero if pseudos that have been
578 assigned to registers of class CLASS would likely be spilled
579 because registers of CLASS are needed for spill registers.
580
581 The default value of this macro returns 1 if CLASS has exactly one
582 register and zero otherwise. On most machines, this default
583 should be used. Only define this macro to some other expression
584 if pseudo allocated by `local-alloc.c' end up in memory because
585 their hard registers were needed for spill registers. If this
586 macro returns nonzero for those classes, those pseudos will only
587 be allocated by `global.c', which knows how to reallocate the
588 pseudo to another register. If there would not be another
589 register available for reallocation, you should not change the
590 definition of this macro since the only effect of such a
591 definition would be to slow down register allocation. */
592
593 /* Stack layout; function entry, exit and calling. */
594
595 /* The return address of the current frame is retrieved
596 from the initial value of register RETURN_REGNUM.
597 For frames farther back, we use the stack slot where
598 the corresponding RETURN_REGNUM register was saved. */
599
600 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
601 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
602 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
603
604 #define RETURN_ADDR_RTX(COUNT, FRAME) \
605 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
606
607 /* The following macros will turn on dwarf2 exception hndling
608 Other code location for this exception handling are
609 in s390.md (eh_return insn) and in linux.c in the prologue. */
610
611 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
612
613 /* We have 31 bit mode. */
614
615 #define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff))
616
617 /* The offset from the incoming value of %sp to the top of the stack frame
618 for the current function. */
619
620 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
621
622 /* Location, from where return address to load. */
623
624 #define DWARF_FRAME_RETURN_COLUMN 14
625
626 /* Describe how we implement __builtin_eh_return. */
627 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
628 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
629 #define EH_RETURN_HANDLER_RTX \
630 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
631 TARGET_64BIT? -48 : -40))
632
633 /* Define this if pushing a word on the stack makes the stack pointer a
634 smaller address. */
635
636 #define STACK_GROWS_DOWNWARD
637
638 /* Define this if the nominal address of the stack frame is at the
639 high-address end of the local variables; that is, each additional local
640 variable allocated goes at a more negative offset in the frame. */
641
642 /* #define FRAME_GROWS_DOWNWARD */
643
644 /* Offset from stack-pointer to first location of outgoing args. */
645
646 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
647
648 /* Offset within stack frame to start allocating local variables at.
649 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
650 first local allocated. Otherwise, it is the offset to the BEGINNING
651 of the first local allocated. */
652
653 #define STARTING_FRAME_OFFSET \
654 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
655
656 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
657
658 /* If we generate an insn to push BYTES bytes, this says how many the stack
659 pointer really advances by. On S/390, we have no push instruction. */
660
661 /* #define PUSH_ROUNDING(BYTES) */
662
663 /* Accumulate the outgoing argument count so we can request the right
664 DSA size and determine stack offset. */
665
666 #define ACCUMULATE_OUTGOING_ARGS 1
667
668 /* Offset from the stack pointer register to an item dynamically
669 allocated on the stack, e.g., by `alloca'.
670
671 The default value for this macro is `STACK_POINTER_OFFSET' plus the
672 length of the outgoing arguments. The default is correct for most
673 machines. See `function.c' for details. */
674 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
675
676 /* Offset of first parameter from the argument pointer register value.
677 On the S/390, we define the argument pointer to the start of the fixed
678 area. */
679 #define FIRST_PARM_OFFSET(FNDECL) 0
680
681 /* Define this if stack space is still allocated for a parameter passed
682 in a register. The value is the number of bytes allocated to this
683 area. */
684 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
685
686 /* Define this if the above stack space is to be considered part of the
687 space allocated by the caller. */
688 /* #define OUTGOING_REG_PARM_STACK_SPACE */
689
690 /* 1 if N is a possible register number for function argument passing.
691 On S390, general registers 2 - 6 and floating point register 0 and 2
692 are used in this way. */
693
694 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
695 (N) == 16 || (N) == 17)
696
697 /* Define a data type for recording info about an argument list during
698 the scan of that argument list. This data type should hold all
699 necessary information about the function itself and about the args
700 processed so far, enough to enable macros such as FUNCTION_ARG to
701 determine where the next arg should go. */
702
703 typedef struct s390_arg_structure
704 {
705 int gprs; /* gpr so far */
706 int fprs; /* fpr so far */
707 }
708 CUMULATIVE_ARGS;
709
710
711 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
712 a function whose data type is FNTYPE.
713 For a library call, FNTYPE is 0. */
714
715 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
716 ((CUM).gprs=0, (CUM).fprs=0)
717
718 /* Update the data in CUM to advance over an argument of mode MODE and
719 data type TYPE. (TYPE is null for libcalls where that information
720 may not be available.) */
721
722 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
723 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
724
725 /* Define where to put the arguments to a function. Value is zero to push
726 the argument on the stack, or a hard register in which to store the
727 argument. */
728
729 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
730 s390_function_arg (&CUM, MODE, TYPE, NAMED)
731
732 /* Define where to expect the arguments of a function. Value is zero, if
733 the argument is on the stack, or a hard register in which the argument
734 is stored. It is the same like FUNCTION_ARG, except for unnamed args
735 That means, that all in case of varargs used, the arguments are expected
736 from the stack.
737 S/390 has already space on the stack for args coming in registers,
738 they are pushed in prologue, if needed. */
739
740
741 /* Define the `__builtin_va_list' type. */
742
743 #define BUILD_VA_LIST_TYPE(VALIST) \
744 (VALIST) = s390_build_va_list ()
745
746 /* Implement `va_start' for varargs and stdarg. */
747
748 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
749 s390_va_start (valist, nextarg)
750
751 /* Implement `va_arg'. */
752
753 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
754 s390_va_arg (valist, type)
755
756 /* For an arg passed partly in registers and partly in memory, this is the
757 number of registers used. For args passed entirely in registers or
758 entirely in memory, zero. */
759
760 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
761
762
763 /* Define if returning from a function call automatically pops the
764 arguments described by the number-of-args field in the call. */
765
766 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
767
768
769 /* Define how to find the value returned by a function. VALTYPE is the
770 data type of the value (as a tree).
771 If the precise function being called is known, FUNC is its FUNCTION_DECL;
772 otherwise, FUNC is 15. */
773
774 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
775 || TARGET_SOFT_FLOAT ) ? 2 : 16)
776
777
778 /* for structs the address is passed, and the Callee makes a
779 copy, only if needed */
780
781 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
782 s390_function_arg_pass_by_reference (MODE, TYPE)
783
784
785 /* Register 2 (and 3) for integral values
786 or floating point register 0 (and 2) for fp values are used. */
787
788 #define FUNCTION_VALUE(VALTYPE, FUNC) \
789 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
790 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
791 || POINTER_TYPE_P (VALTYPE) \
792 ? word_mode : TYPE_MODE (VALTYPE), \
793 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
794
795 /* Define how to find the value returned by a library function assuming
796 the value has mode MODE. */
797
798 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
799
800 /* 1 if N is a possible register number for a function value. */
801
802 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
803
804 /* The definition of this macro implies that there are cases where
805 a scalar value cannot be returned in registers. */
806
807 #define RETURN_IN_MEMORY(type) \
808 (TYPE_MODE (type) == BLKmode || \
809 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
810 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
811
812 /* Mode of stack savearea.
813 FUNCTION is VOIDmode because calling convention maintains SP.
814 BLOCK needs Pmode for SP.
815 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
816
817 #define STACK_SAVEAREA_MODE(LEVEL) \
818 (LEVEL == SAVE_FUNCTION ? VOIDmode \
819 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
820
821 /* Structure value address is passed as invisible first argument (gpr 2). */
822
823 #define STRUCT_VALUE 0
824
825 /* This macro definition sets up a default value for `main' to return. */
826
827 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
828
829 /* Length in units of the trampoline for entering a nested function. */
830
831 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
832
833 /* Initialize the dynamic part of trampoline. */
834
835 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
836 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
837
838 /* Template for constant part of trampoline. */
839
840 #define TRAMPOLINE_TEMPLATE(FILE) \
841 s390_trampoline_template (FILE)
842
843 /* Output assembler code to FILE to increment profiler label # LABELNO
844 for profiling a function entry. */
845
846 #define FUNCTION_PROFILER(FILE, LABELNO) \
847 s390_function_profiler ((FILE), ((LABELNO)))
848
849 #define PROFILE_BEFORE_PROLOGUE 1
850
851 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
852 pointer does not matter (provided there is a frame pointer). */
853
854 #define EXIT_IGNORE_STACK 1
855
856 /* Addressing modes, and classification of registers for them. */
857
858 /* #define HAVE_POST_INCREMENT */
859 /* #define HAVE_POST_DECREMENT */
860
861 /* #define HAVE_PRE_DECREMENT */
862 /* #define HAVE_PRE_INCREMENT */
863
864 /* These assume that REGNO is a hard or pseudo reg number. They give
865 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
866 reg currently allocated to a suitable hard reg.
867 These definitions are NOT overridden anywhere. */
868
869 #define REGNO_OK_FOR_INDEX_P(REGNO) \
870 (((REGNO) < FIRST_PSEUDO_REGISTER \
871 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
872 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
873
874 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
875
876 /* Maximum number of registers that can appear in a valid memory address. */
877
878 #define MAX_REGS_PER_ADDRESS 2
879
880 /* Recognize any constant value that is a valid address. */
881
882 #define CONSTANT_ADDRESS_P(X) 0
883
884 #define SYMBOLIC_CONST(X) \
885 (GET_CODE (X) == SYMBOL_REF \
886 || GET_CODE (X) == LABEL_REF \
887 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
888
889 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
890 they have to be forced to constant pool
891 CONST_INT have to be forced into constant pool, if greater than
892 64k. Depending on the insn they have to be force into constant pool
893 for smaller value; in this case we have to work with nonimmediate operand. */
894
895 #define LEGITIMATE_PIC_OPERAND_P(X) \
896 legitimate_pic_operand_p (X)
897
898 /* Nonzero if the constant value X is a legitimate general operand.
899 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
900
901 #define LEGITIMATE_CONSTANT_P(X) \
902 legitimate_constant_p (X)
903
904 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
905 its validity for a certain class. We have two alternate definitions
906 for each of them. The usual definition accepts all pseudo regs; the
907 other rejects them all. The symbol REG_OK_STRICT causes the latter
908 definition to be used.
909
910 Most source files want to accept pseudo regs in the hope that they will
911 get allocated to the class that the insn wants them to be in.
912 Some source files that are used after register allocation
913 need to be strict. */
914
915 /*
916 * Nonzero if X is a hard reg that can be used as an index or if it is
917 * a pseudo reg.
918 */
919
920 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
921 ((GET_MODE (X) == Pmode) && \
922 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
923 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
924
925 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
926 a pseudo reg. */
927
928 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
929
930 /* Nonzero if X is a hard reg that can be used as an index. */
931
932 #define REG_OK_FOR_INDEX_STRICT_P(X) \
933 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
934
935 /* Nonzero if X is a hard reg that can be used as a base reg. */
936
937 #define REG_OK_FOR_BASE_STRICT_P(X) \
938 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
939
940
941 #ifndef REG_OK_STRICT
942 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
943 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
944 #else
945 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
946 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
947 #endif
948
949
950 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
951 valid memory address for an instruction.
952 The MODE argument is the machine mode for the MEM expression
953 that wants to use this address.
954
955 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
956 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
957
958 #ifdef REG_OK_STRICT
959 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
960 { \
961 if (legitimate_address_p (MODE, X, 1)) \
962 goto ADDR; \
963 }
964 #else
965 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
966 { \
967 if (legitimate_address_p (MODE, X, 0)) \
968 goto ADDR; \
969 }
970 #endif
971
972
973 /* S/390 has no mode dependent addresses. */
974
975 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
976
977 /* Try machine-dependent ways of modifying an illegitimate address
978 to be legitimate. If we find one, return the new, valid address.
979 This macro is used in only one place: `memory_address' in explow.c. */
980
981 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
982 { \
983 (X) = legitimize_address (X, OLDX, MODE); \
984 if (memory_address_p (MODE, X)) \
985 goto WIN; \
986 }
987
988 /* Specify the machine mode that this machine uses for the index in the
989 tablejump instruction. */
990
991 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
992
993 /* Define this if the tablejump instruction expects the table to contain
994 offsets from the address of the table.
995 Do not define this if the table should contain absolute addresses. */
996
997 /* #define CASE_VECTOR_PC_RELATIVE */
998
999 /* Load from integral MODE < SI from memory into register makes sign_extend
1000 or zero_extend
1001 In our case sign_extension happens for Halfwords, other no extension. */
1002
1003 #define LOAD_EXTEND_OP(MODE) \
1004 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1005 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1006 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1007
1008 /* Define this if fixuns_trunc is the same as fix_trunc. */
1009
1010 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1011
1012 /* We use "unsigned char" as default. */
1013
1014 #define DEFAULT_SIGNED_CHAR 0
1015
1016 /* The maximum number of bytes that a single instruction can move quickly
1017 between memory and registers or between two memory locations. */
1018
1019 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
1020 #define MAX_MOVE_MAX 16
1021
1022 /* Determine whether to use move_by_pieces or block move insn. */
1023
1024 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
1025 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
1026 || (TARGET_64BIT && (SIZE) == 8) )
1027
1028 /* Determine whether to use clear_by_pieces or block clear insn. */
1029
1030 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
1031 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
1032 || (TARGET_64BIT && (SIZE) == 8) )
1033
1034 /* Nonzero if access to memory by bytes is slow and undesirable. */
1035
1036 #define SLOW_BYTE_ACCESS 1
1037
1038 /* Define if shifts truncate the shift count which implies one can omit
1039 a sign-extension or zero-extension of a shift count. */
1040
1041 /* #define SHIFT_COUNT_TRUNCATED */
1042
1043 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1044 is done just by pretending it is already truncated. */
1045
1046 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1047
1048 /* We assume that the store-condition-codes instructions store 0 for false
1049 and some other value for true. This is the value stored for true. */
1050
1051 /* #define STORE_FLAG_VALUE -1 */
1052
1053 /* Don't perform CSE on function addresses. */
1054
1055 #define NO_FUNCTION_CSE
1056
1057 /* Specify the machine mode that pointers have.
1058 After generation of rtl, the compiler makes no further distinction
1059 between pointers and any other objects of this machine mode. */
1060
1061 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1062
1063 /* A function address in a call instruction is a byte address (for
1064 indexing purposes) so give the MEM rtx a byte's mode. */
1065
1066 #define FUNCTION_MODE QImode
1067
1068
1069 /* A part of a C `switch' statement that describes the relative costs
1070 of constant RTL expressions. It must contain `case' labels for
1071 expression codes `const_int', `const', `symbol_ref', `label_ref'
1072 and `const_double'. Each case must ultimately reach a `return'
1073 statement to return the relative cost of the use of that kind of
1074 constant value in an expression. The cost may depend on the
1075 precise value of the constant, which is available for examination
1076 in X, and the rtx code of the expression in which it is contained,
1077 found in OUTER_CODE.
1078
1079 CODE is the expression code--redundant, since it can be obtained
1080 with `GET_CODE (X)'. */
1081 /* Force_const_mem does not work out of reload, because the saveable_obstack
1082 is set to reload_obstack, which does not live long enough.
1083 Because of this we cannot use force_const_mem in addsi3.
1084 This leads to problems with gen_add2_insn with a constant greater
1085 than a short. Because of that we give an addition of greater
1086 constants a cost of 3 (reload1.c 10096). */
1087
1088
1089 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1090 case CONST: \
1091 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1092 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1093 return 1000; \
1094 case CONST_INT: \
1095 if ((OUTER_CODE == PLUS) && \
1096 ((INTVAL (RTX) > 32767) || \
1097 (INTVAL (RTX) < -32768))) \
1098 return COSTS_N_INSNS (3); \
1099 case LABEL_REF: \
1100 case SYMBOL_REF: \
1101 case CONST_DOUBLE: \
1102 return 0; \
1103
1104
1105 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1106 This can be used, for example, to indicate how costly a multiply
1107 instruction is. In writing this macro, you can use the construct
1108 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1109 instructions. OUTER_CODE is the code of the expression in which X
1110 is contained.
1111
1112 This macro is optional; do not define it if the default cost
1113 assumptions are adequate for the target machine. */
1114
1115 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1116 case ASHIFT: \
1117 case ASHIFTRT: \
1118 case LSHIFTRT: \
1119 case PLUS: \
1120 case AND: \
1121 case IOR: \
1122 case XOR: \
1123 case MINUS: \
1124 case NEG: \
1125 case NOT: \
1126 return COSTS_N_INSNS (1); \
1127 case MULT: \
1128 if (GET_MODE (XEXP (X, 0)) == DImode) \
1129 return COSTS_N_INSNS (40); \
1130 else \
1131 return COSTS_N_INSNS (7); \
1132 case DIV: \
1133 case UDIV: \
1134 case MOD: \
1135 case UMOD: \
1136 return COSTS_N_INSNS (33);
1137
1138
1139 /* An expression giving the cost of an addressing mode that contains
1140 ADDRESS. If not defined, the cost is computed from the ADDRESS
1141 expression and the `CONST_COSTS' values.
1142
1143 For most CISC machines, the default cost is a good approximation
1144 of the true cost of the addressing mode. However, on RISC
1145 machines, all instructions normally have the same length and
1146 execution time. Hence all addresses will have equal costs.
1147
1148 In cases where more than one form of an address is known, the form
1149 with the lowest cost will be used. If multiple forms have the
1150 same, lowest, cost, the one that is the most complex will be used.
1151
1152 For example, suppose an address that is equal to the sum of a
1153 register and a constant is used twice in the same basic block.
1154 When this macro is not defined, the address will be computed in a
1155 register and memory references will be indirect through that
1156 register. On machines where the cost of the addressing mode
1157 containing the sum is no higher than that of a simple indirect
1158 reference, this will produce an additional instruction and
1159 possibly require an additional register. Proper specification of
1160 this macro eliminates this overhead for such machines.
1161
1162 Similar use of this macro is made in strength reduction of loops.
1163
1164 ADDRESS need not be valid as an address. In such a case, the cost
1165 is not relevant and can be any value; invalid addresses need not be
1166 assigned a different cost.
1167
1168 On machines where an address involving more than one register is as
1169 cheap as an address computation involving only one register,
1170 defining `ADDRESS_COST' to reflect this can cause two registers to
1171 be live over a region of code where only one would have been if
1172 `ADDRESS_COST' were not defined in that manner. This effect should
1173 be considered in the definition of this macro. Equivalent costs
1174 should probably only be given to addresses with different numbers
1175 of registers on machines with lots of registers.
1176
1177 This macro will normally either not be defined or be defined as a
1178 constant. */
1179
1180 #define ADDRESS_COST(RTX) s390_address_cost ((RTX))
1181
1182 /* On s390, copy between fprs and gprs is expensive. */
1183
1184 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1185 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
1186 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
1187 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
1188 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
1189
1190
1191 /* A C expression for the cost of moving data of mode M between a
1192 register and memory. A value of 2 is the default; this cost is
1193 relative to those in `REGISTER_MOVE_COST'.
1194
1195 If moving between registers and memory is more expensive than
1196 between two registers, you should define this macro to express the
1197 relative cost. */
1198
1199 #define MEMORY_MOVE_COST(M, C, I) 1
1200
1201 /* A C expression for the cost of a branch instruction. A value of 1
1202 is the default; other values are interpreted relative to that. */
1203
1204 #define BRANCH_COST 1
1205
1206 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1207 return the mode to be used for the comparison. */
1208
1209 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1210
1211
1212 /* Define the information needed to generate branch and scc insns. This is
1213 stored from the compare operation. Note that we can't use "rtx" here
1214 since it hasn't been defined! */
1215
1216 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1217
1218 /* implicit call of memcpy, not bcopy */
1219
1220 #define TARGET_MEM_FUNCTIONS
1221
1222
1223 /* Assembler file format. */
1224
1225 /* Character to start a comment. */
1226 #define ASM_COMMENT_START "#"
1227
1228 /* Declare an uninitialized external linkage data object. */
1229 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1230 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
1231
1232 /* Globalizing directive for a label. */
1233 #define GLOBAL_ASM_OP ".globl "
1234
1235 /* Advance the location counter to a multiple of 2**LOG bytes. */
1236 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1237 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
1238
1239 /* Advance the location counter by SIZE bytes. */
1240 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1241 fprintf ((FILE), "\t.set\t.,.+%u\n", (SIZE))
1242
1243 /* Store in OUTPUT a string (made with alloca) containing
1244 an assembler-name for a local static variable named NAME.
1245 LABELNO is an integer which is different for each call. */
1246 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1247 ((OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1248 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1249
1250 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
1251 #define LOCAL_LABEL_PREFIX "."
1252
1253 /* How to refer to registers in assembler output. This sequence is
1254 indexed by compiler's hard-register-number (see above). */
1255 #define REGISTER_NAMES \
1256 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1257 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1258 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1259 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1260 "%ap", "%cc", "%fp" \
1261 }
1262
1263 /* Either simplify a location expression, or return the original. */
1264 #define ASM_SIMPLIFY_DWARF_ADDR(X) \
1265 s390_simplify_dwarf_addr (X)
1266
1267 /* Print operand X (an rtx) in assembler syntax to file FILE. */
1268 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1269 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1270
1271 /* Output an element of a case-vector that is absolute. */
1272 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1273 do { \
1274 char buf[32]; \
1275 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
1276 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
1277 assemble_name ((FILE), buf); \
1278 fputc ('\n', (FILE)); \
1279 } while (0)
1280
1281 /* Output an element of a case-vector that is relative. */
1282 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1283 do { \
1284 char buf[32]; \
1285 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
1286 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
1287 assemble_name ((FILE), buf); \
1288 fputc ('-', (FILE)); \
1289 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
1290 assemble_name ((FILE), buf); \
1291 fputc ('\n', (FILE)); \
1292 } while (0)
1293
1294
1295 /* Define the codes that are matched by predicates in aux-output.c. */
1296
1297 #define PREDICATE_CODES \
1298 {"s_operand", { SUBREG, MEM }}, \
1299 {"s_imm_operand", { CONST_INT, CONST_DOUBLE, SUBREG, MEM }}, \
1300 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1301 {"larl_operand", { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }}, \
1302 {"load_multiple_operation", {PARALLEL}}, \
1303 {"store_multiple_operation", {PARALLEL}}, \
1304 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1305 {"consttable_operand", { SYMBOL_REF, LABEL_REF, CONST, \
1306 CONST_INT, CONST_DOUBLE }}, \
1307 {"s390_plus_operand", { PLUS }},
1308
1309
1310 /* Sections. */
1311
1312 /* Output before read-only data. */
1313 #define TEXT_SECTION_ASM_OP ".text"
1314
1315 /* Output before writable (initialized) data. */
1316 #define DATA_SECTION_ASM_OP ".data"
1317
1318 /* Output before writable (uninitialized) data. */
1319 #define BSS_SECTION_ASM_OP ".bss"
1320
1321 /* S/390 constant pool breaks the devices in crtstuff.c to control section
1322 in where code resides. We have to write it as asm code. */
1323 #ifndef __s390x__
1324 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
1325 asm (SECTION_OP "\n\
1326 bras\t%r2,1f\n\
1327 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
1328 1: l\t%r3,0(%r2)\n\
1329 bas\t%r14,0(%r3,%r2)\n\
1330 .previous");
1331 #endif
1332
1333 /* Constant Pool for all symbols operands which are changed with
1334 force_const_mem during insn generation (expand_insn). */
1335
1336 extern int s390_pool_count;
1337 extern int s390_nr_constants;
1338
1339 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1340 { \
1341 struct pool_constant *pool; \
1342 \
1343 if (s390_pool_count == -1) \
1344 { \
1345 s390_nr_constants = 0; \
1346 for (pool = first_pool; pool; pool = pool->next) \
1347 if (pool->mark) s390_nr_constants++; \
1348 return; \
1349 } \
1350 }
1351
1352 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1353 { \
1354 fprintf (FILE, ".LC%d:\n", LABELNO); \
1355 \
1356 /* Output the value of the constant itself. */ \
1357 switch (GET_MODE_CLASS (MODE)) \
1358 { \
1359 case MODE_FLOAT: \
1360 if (GET_CODE (EXP) != CONST_DOUBLE) \
1361 abort (); \
1362 \
1363 REAL_VALUE_FROM_CONST_DOUBLE (r, EXP); \
1364 assemble_real (r, MODE, ALIGN); \
1365 break; \
1366 \
1367 case MODE_INT: \
1368 case MODE_PARTIAL_INT: \
1369 if (flag_pic \
1370 && (GET_CODE (EXP) == CONST \
1371 || GET_CODE (EXP) == SYMBOL_REF \
1372 || GET_CODE (EXP) == LABEL_REF )) \
1373 { \
1374 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \
1375 s390_output_symbolic_const (FILE, EXP); \
1376 fputc ('\n', (FILE)); \
1377 } \
1378 else \
1379 { \
1380 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1381 if (GET_MODE_SIZE (MODE) == 1) \
1382 ASM_OUTPUT_SKIP ((FILE), 1); \
1383 } \
1384 break; \
1385 \
1386 default: \
1387 abort (); \
1388 } \
1389 goto WIN; \
1390 }
1391
1392 /* In rare cases, correct code generation requires extra machine dependent
1393 processing between the second jump optimization pass and delayed branch
1394 scheduling. On those machines, define this macro as a C statement to act on
1395 the code starting at INSN. */
1396
1397 #define MACHINE_DEPENDENT_REORG(INSN) s390_machine_dependent_reorg (INSN)
1398
1399 #endif