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s390.c: New.
[gcc.git] / gcc / config / s390 / s390.h
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (weigand@de.ibm.com).
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #ifndef _S390_H
23 #define _S390_H
24
25 #define TARGET_VERSION fprintf (stderr, " (S/390)");
26
27 extern int flag_pic;
28
29 /* Run-time compilation parameters selecting different hardware subsets. */
30
31 extern int target_flags;
32
33 /* Target macros checked at runtime of compiler. */
34
35 #define TARGET_HARD_FLOAT (target_flags & 1)
36 #define TARGET_BACKCHAIN (target_flags & 2)
37 #define TARGET_SMALL_EXEC (target_flags & 4)
38 #define TARGET_DEBUG_ARG (target_flags & 8)
39 #define TARGET_64BIT (target_flags & 16)
40 #define TARGET_MVCLE (target_flags & 32)
41
42 #define TARGET_DEFAULT 0x3
43 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
44
45 /* Macro to define tables used to set the flags. This is a list in braces
46 of pairs in braces, each pair being { "NAME", VALUE }
47 where VALUE is the bits to set or minus the bits to clear.
48 An empty string NAME is used to identify the default VALUE. */
49
50 #define TARGET_SWITCHES \
51 { { "hard-float", 1,N_("Use hardware fp")}, \
52 { "soft-float", -1,N_("Don't use hardware fp")}, \
53 { "backchain", 2,N_("Set backchain")}, \
54 { "no-backchain", -2,N_("Don't set backchain (faster, but debug harder")}, \
55 { "small-exec", 4,N_("Use bras for execucable < 64k")}, \
56 { "no-small-exec",-4,N_("Don't use bras")}, \
57 { "debug_arg", 8,N_("Additional debug prints")}, \
58 { "no-debug_arg", -8,N_("Don't print additional debug prints")}, \
59 { "64", 16,N_("64 bit mode")}, \
60 { "31", -16,N_("31 bit mode")}, \
61 { "mvcle", 32,N_("mvcle use")}, \
62 { "no-mvcle", -32,N_("mvc&ex")}, \
63 { "", TARGET_DEFAULT, 0 } }
64
65 /* Define this to change the optimizations performed by default. */
66 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
67
68 /* The current function count for create unique internal labels. */
69
70 extern int s390_function_count;
71
72 /* The amount of space used for outgoing arguments. */
73
74 extern int current_function_outgoing_args_size;
75
76 /* Target machine storage layout. */
77
78 /* Define this if most significant bit is lowest numbered in instructions
79 that operate on numbered bit-fields. */
80
81 #define BITS_BIG_ENDIAN 1
82
83 /* Define this if most significant byte of a word is the lowest numbered. */
84
85 #define BYTES_BIG_ENDIAN 1
86
87 /* Define this if MS word of a multiword is the lowest numbered. */
88
89 #define WORDS_BIG_ENDIAN 1
90
91 /* Number of bits in an addressable storage unit. */
92
93 #define BITS_PER_UNIT 8
94
95 /* Width in bits of a "word", which is the contents of a machine register. */
96
97 #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
98 #define MAX_BITS_PER_WORD 32
99
100 /* Width of a word, in units (bytes). */
101
102 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
103 #define MIN_UNITS_PER_WORD 4
104
105 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
106
107 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
108
109 /* A C expression for the size in bits of the type `short' on the
110 target machine. If you don't define this, the default is half a
111 word. (If this would be less than one storage unit, it is
112 rounded up to one unit.) */
113 #define SHORT_TYPE_SIZE 16
114
115 /* A C expression for the size in bits of the type `int' on the
116 target machine. If you don't define this, the default is one
117 word. */
118 #define INT_TYPE_SIZE 32
119
120 /* A C expression for the size in bits of the type `long' on the
121 target machine. If you don't define this, the default is one
122 word. */
123 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
124 #define MAX_LONG_TYPE_SIZE 32
125
126 /* A C expression for the size in bits of the type `long long' on the
127 target machine. If you don't define this, the default is two
128 words. */
129 #define LONG_LONG_TYPE_SIZE 64
130
131 /* Right now we only support two floating point formats, the
132 32 and 64 bit ieee formats. */
133
134 #define FLOAT_TYPE_SIZE 32
135 #define DOUBLE_TYPE_SIZE 64
136 #define LONG_DOUBLE_TYPE_SIZE 64
137
138 /* Define this macro if it is advisable to hold scalars in registers
139 in a wider mode than that declared by the program. In such cases,
140 the value is constrained to be within the bounds of the declared
141 type, but kept valid in the wider mode. The signedness of the
142 extension may differ from that of the type. */
143
144 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
145 if (INTEGRAL_MODE_P (MODE) && \
146 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
147 (MODE) = Pmode; \
148 }
149
150 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
151 extensions applied to char/short functions arguments. Defining
152 PROMOTE_FUNCTION_RETURN does the same for function returns. */
153
154 #define PROMOTE_FUNCTION_ARGS
155 #define PROMOTE_FUNCTION_RETURN
156 #define PROMOTE_FOR_CALL_ONLY
157
158 /* Allocation boundary (in *bits*) for storing pointers in memory. */
159
160 #define POINTER_BOUNDARY 32
161
162 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
163
164 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
165
166 /* Boundary (in *bits*) on which stack pointer should be aligned. */
167
168 #define STACK_BOUNDARY 64
169
170 /* Allocation boundary (in *bits*) for the code of a function. */
171
172 #define FUNCTION_BOUNDARY 32
173
174 /* There is no point aligning anything to a rounder boundary than this. */
175
176 #define BIGGEST_ALIGNMENT 64
177
178 /* Alignment of field after `int : 0' in a structure. */
179
180 #define EMPTY_FIELD_BOUNDARY 32
181
182 /* Alignment on even adresses for LARL instruction. */
183
184 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
185
186 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
187
188 /* Define this if move instructions will actually fail to work when given
189 unaligned data. */
190
191 #define STRICT_ALIGNMENT 0
192
193 /* real arithmetic */
194
195 #define REAL_ARITHMETIC
196
197 /* Define target floating point format. */
198
199 #undef TARGET_FLOAT_FORMAT
200 #ifdef IEEE_FLOAT
201 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
202 #else
203 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
204 #endif
205
206 /* Define if special allocation order desired. */
207
208 #define REG_ALLOC_ORDER \
209 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
210 16, 17, 18, 19, 20, 21, 22, 23, \
211 24, 25, 26, 27, 28, 29, 30, 31, \
212 15, 32, 33 }
213
214 /* Standard register usage. */
215
216 #define INT_REGNO_P(N) ( (N) >= 0 && (N) < 16 )
217 #ifdef IEEE_FLOAT
218 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
219 #else
220 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
221 #endif
222 #define CC_REGNO_P(N) ( (N) == 33 )
223
224 /* Number of actual hardware registers. The hardware registers are
225 assigned numbers for the compiler from 0 to just below
226 FIRST_PSEUDO_REGISTER.
227 All registers that the compiler knows about must be given numbers,
228 even those that are not normally considered general registers.
229 For the 390, we give the data registers numbers 0-15,
230 and the floating point registers numbers 16-19.
231 G5 and following have 16 IEEE floating point register,
232 which get numbers 16-31. */
233
234 #define FIRST_PSEUDO_REGISTER 34
235
236 /* The following register have a fix usage
237 GPR 12: GOT register points to the GOT, setup in prologue,
238 GOT contains pointer to variables in shared libraries
239 GPR 13: Base register setup in prologue to point to the
240 literal table of each function
241 GPR 14: Return registers holds the return address
242 GPR 15: Stack pointer */
243
244 #define PIC_OFFSET_TABLE_REGNUM 12
245 #define BASE_REGISTER 13
246 #define RETURN_REGNUM 14
247 #define STACK_POINTER_REGNUM 15
248
249 #define FIXED_REGISTERS \
250 { 0, 0, 0, 0, \
251 0, 0, 0, 0, \
252 0, 0, 0, 0, \
253 0, 1, 1, 1, \
254 0, 0, 0, 0, \
255 0, 0, 0, 0, \
256 0, 0, 0, 0, \
257 0, 0, 0, 0, \
258 1, 1 }
259
260 /* 1 for registers not available across function calls. These must include
261 the FIXED_REGISTERS and also any registers that can be used without being
262 saved.
263 The latter must include the registers where values are returned
264 and the register where structure-value addresses are passed. */
265
266 #define CALL_USED_REGISTERS \
267 { 1, 1, 1, 1, \
268 1, 1, 0, 0, \
269 0, 0, 0, 0, \
270 0, 1, 1, 1, \
271 1, 1, 0, 0, \
272 1, 1, 1, 1, \
273 1, 1, 1, 1, \
274 1, 1, 1, 1, \
275 1, 1 }
276
277 /* If not pic code, gpr 12 can be used. */
278
279 #define CONDITIONAL_REGISTER_USAGE \
280 do \
281 { \
282 if (flag_pic) \
283 { \
284 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
285 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
286 } \
287 } while (0)
288
289 /* The following register have a special usage
290 GPR 11: Frame pointer if needed to point to automatic variables.
291 GPR 32: In functions with more the 5 args this register
292 points to that arguments, it is always eliminated
293 with stack- or frame-pointer.
294 GPR 33: Condition code 'register' */
295
296 #define FRAME_POINTER_REGNUM 11
297
298 #define ARG_POINTER_REGNUM 32
299
300 #define CC_REGNUM 33
301
302 /* We use the register %r0 to pass the static chain to a nested function.
303
304 Note: It is assumed that this register is call-clobbered!
305 We can't use any of the function-argument registers either,
306 and register 1 is needed by the trampoline code, so we have
307 no other choice but using this one ... */
308
309 #define STATIC_CHAIN_REGNUM 0
310
311 /* Return number of consecutive hard regs needed starting at reg REGNO
312 to hold something of mode MODE.
313 This is ordinarily the length in words of a value of mode MODE
314 but can be less for certain modes in special long registers. */
315
316 #define HARD_REGNO_NREGS(REGNO, MODE) \
317 (FLOAT_REGNO_P(REGNO)? \
318 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
319 INT_REGNO_P(REGNO)? \
320 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
321 1)
322
323 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
324 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
325 Even gprs can hold DI.
326 The floating point registers can hold DF, SF, DC and SC. */
327
328 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
329 (FLOAT_REGNO_P(REGNO)? \
330 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
331 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \
332 INT_REGNO_P(REGNO)? \
333 (!((TARGET_64BIT && (MODE) == TImode) || \
334 (!TARGET_64BIT && (MODE) == DImode)) || ((REGNO) & 1) == 0 ) : \
335 CC_REGNO_P(REGNO)? \
336 GET_MODE_CLASS (MODE) == MODE_CC : \
337 0)
338
339 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
340 mode MODE1 and one has mode MODE2.
341 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
342 for any hard reg, then this must be 0 for correct output. */
343
344 #define MODES_TIEABLE_P(MODE1, MODE2) \
345 (((MODE1) == SFmode || (MODE1) == DFmode) \
346 == ((MODE2) == SFmode || (MODE2) == DFmode))
347
348
349 /* Define this macro if references to a symbol must be treated
350 differently depending on something about the variable or
351 function named by the symbol (such as what section it is in).
352
353 On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol
354 so that we may access it directly in the GOT. */
355
356 #define ENCODE_SECTION_INFO(DECL) \
357 do \
358 { \
359 if (flag_pic) \
360 { \
361 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
362 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
363 \
364 if (GET_CODE (rtl) == MEM) \
365 { \
366 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
367 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
368 || ! TREE_PUBLIC (DECL)); \
369 } \
370 } \
371 } \
372 while (0)
373
374
375 /* This is an array of structures. Each structure initializes one pair
376 of eliminable registers. The "from" register number is given first,
377 followed by "to". Eliminations of the same "from" register are listed
378 in order of preference. */
379
380 #define ELIMINABLE_REGS \
381 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
382 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
383 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}}
384
385 #define CAN_ELIMINATE(FROM, TO) (1)
386
387 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
388 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
389 { (OFFSET) = 0; } \
390 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
391 { (OFFSET) = s390_arg_frame_offset (); } \
392 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
393 { (OFFSET) = s390_arg_frame_offset (); } \
394 }
395
396 #define CAN_DEBUG_WITHOUT_FP
397
398 /* Value should be nonzero if functions must have frame pointers.
399 Zero means the frame pointer need not be set up (and parms may be
400 accessed via the stack pointer) in functions that seem suitable.
401 This is computed in `reload', in reload1.c. */
402
403 #define FRAME_POINTER_REQUIRED 0
404
405 /* Define the classes of registers for register constraints in the
406 machine description. Also define ranges of constants.
407
408 One of the classes must always be named ALL_REGS and include all hard regs.
409 If there is more than one class, another class must be named NO_REGS
410 and contain no registers.
411
412 The name GENERAL_REGS must be the name of a class (or an alias for
413 another name such as ALL_REGS). This is the class of registers
414 that is allowed by "g" or "r" in a register constraint.
415 Also, registers outside this class are allocated only when
416 instructions express preferences for them.
417
418 The classes must be numbered in nondecreasing order; that is,
419 a larger-numbered class must never be contained completely
420 in a smaller-numbered class.
421
422 For any two classes, it is very desirable that there be another
423 class that represents their union. */
424
425 /*#define SMALL_REGISTER_CLASSES 1*/
426
427 enum reg_class
428 {
429 NO_REGS, ADDR_REGS, GENERAL_REGS,
430 FP_REGS, CC_REGS, ALL_REGS, LIM_REG_CLASSES
431 };
432
433 #define N_REG_CLASSES (int) LIM_REG_CLASSES
434
435 /* Give names of register classes as strings for dump file. */
436
437 #define REG_CLASS_NAMES \
438 { "NO_REGS","ADDR_REGS", "GENERAL_REGS", "FP_REGS", "CC_REGS", "ALL_REGS" }
439
440 /* Define which registers fit in which classes. This is an initializer for
441 a vector of HARD_REG_SET of length N_REG_CLASSES.
442 G5 and latter have 16 register and support IEEE floating point operations. */
443
444 #define REG_CLASS_CONTENTS \
445 { \
446 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
447 { 0x0000fffe, 0x00000001 }, /* ADDR_REGS */ \
448 { 0x0000ffff, 0x00000001 }, /* GENERAL_REGS */ \
449 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
450 { 0x00000000, 0x00000002 }, /* CC_REGS */ \
451 { 0xffffffff, 0x00000003 }, /* ALL_REGS */ \
452 }
453
454
455 /* The same information, inverted:
456 Return the class number of the smallest class containing
457 reg number REGNO. This could be a conditional expression
458 or could index an array. */
459
460 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
461
462 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
463
464 /* The class value for index registers, and the one for base regs. */
465
466 #define INDEX_REG_CLASS ADDR_REGS
467 #define BASE_REG_CLASS ADDR_REGS
468
469 /* Get reg_class from a letter such as appears in the machine description. */
470
471 #define REG_CLASS_FROM_LETTER(C) \
472 ((C) == 'a' ? ADDR_REGS : \
473 (C) == 'd' ? GENERAL_REGS : \
474 (C) == 'f' ? FP_REGS : NO_REGS)
475
476 /* The letters I, J, K, L and M in a register constraint string can be used
477 to stand for particular ranges of immediate operands.
478 This macro defines what the ranges are.
479 C is the letter, and VALUE is a constant value.
480 Return 1 if VALUE is in the range specified by C. */
481
482 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
483 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
484 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
485 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
486 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
487
488 /* Similar, but for floating constants, and defining letters G and H.
489 Here VALUE is the CONST_DOUBLE rtx itself. */
490
491 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
492
493 /* 'Q' means a memory-reference for a S-type operand. */
494
495 #define EXTRA_CONSTRAINT(OP, C) \
496 ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \
497 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
498
499 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
500 return the class of reg to actually use. In general this is just CLASS;
501 but on some machines in some cases it is preferable to use a more
502 restrictive class. */
503
504 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
505 (GET_CODE (X) == CONST_DOUBLE ? \
506 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\
507 (GET_CODE (X) == CONST_INT ? \
508 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\
509 GET_CODE (X) == PLUS || \
510 GET_CODE (X) == LABEL_REF || \
511 GET_CODE (X) == SYMBOL_REF || \
512 GET_CODE (X) == CONST ? ADDR_REGS : (CLASS)))
513
514 /* Return the maximum number of consecutive registers needed to represent
515 mode MODE in a register of class CLASS. */
516
517 #define CLASS_MAX_NREGS(CLASS, MODE) \
518 ((CLASS) == FP_REGS ? \
519 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
520 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
521
522 /* If we are copying between FP registers and anything else, we need a memory
523 location. */
524
525 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
526 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
527
528 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
529 because the movsi and movsf patterns don't handle r/f moves. */
530
531 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
532 (GET_MODE_BITSIZE (MODE) < 32 \
533 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
534 : MODE)
535
536
537 /* A C expression whose value is nonzero if pseudos that have been
538 assigned to registers of class CLASS would likely be spilled
539 because registers of CLASS are needed for spill registers.
540
541 The default value of this macro returns 1 if CLASS has exactly one
542 register and zero otherwise. On most machines, this default
543 should be used. Only define this macro to some other expression
544 if pseudo allocated by `local-alloc.c' end up in memory because
545 their hard registers were needed for spill registers. If this
546 macro returns nonzero for those classes, those pseudos will only
547 be allocated by `global.c', which knows how to reallocate the
548 pseudo to another register. If there would not be another
549 register available for reallocation, you should not change the
550 definition of this macro since the only effect of such a
551 definition would be to slow down register allocation. */
552
553 /* Stack layout; function entry, exit and calling. */
554
555 /* The current return address is on Offset 56 of the current frame
556 if we are in an leaf_function. Otherwise we have to go one stack
557 back.
558 The return address of anything farther back is accessed normally
559 at an offset of 56 from the frame pointer.
560
561 FIXME: builtin_return_addr does not work correctly in a leaf
562 function, we need to find way to find out, if we
563 are in a leaf function
564 */
565
566 #define _RETURN_ADDR_OFFSET (TARGET_64BIT ? 112 : 56)
567
568 #define RETURN_ADDR_RTX(count, frame) \
569 gen_rtx (MEM, Pmode, \
570 memory_address (Pmode, \
571 plus_constant ( \
572 copy_to_reg (gen_rtx (MEM, Pmode, \
573 memory_address (Pmode, frame))), \
574 _RETURN_ADDR_OFFSET)));
575
576 /* The following macros will turn on dwarf2 exception hndling
577 Other code location for this exception handling are
578 in s390.md (eh_return insn) and in linux.c in the prologue. */
579
580 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
581
582 /* We have 31 bit mode. */
583
584 #define MASK_RETURN_ADDR (GEN_INT (0x7fffffff))
585
586 /* Location, from where return address to load. */
587
588 #define DWARF_FRAME_RETURN_COLUMN 14
589
590 /* Describe how we implement __builtin_eh_return. */
591 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
592 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
593 #define EH_RETURN_HANDLER_RTX \
594 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -40))
595
596 /* Define this if pushing a word on the stack makes the stack pointer a
597 smaller address. */
598
599 #define STACK_GROWS_DOWNWARD
600
601 /* Define this if the nominal address of the stack frame is at the
602 high-address end of the local variables; that is, each additional local
603 variable allocated goes at a more negative offset in the frame. */
604
605 /* #define FRAME_GROWS_DOWNWARD */
606
607 /* Offset from stack-pointer to first location of outgoing args. */
608
609 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
610
611 /* Offset within stack frame to start allocating local variables at.
612 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
613 first local allocated. Otherwise, it is the offset to the BEGINNING
614 of the first local allocated. */
615
616 #define STARTING_FRAME_OFFSET \
617 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
618
619 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
620
621 /* If we generate an insn to push BYTES bytes, this says how many the stack
622 pointer really advances by. On S/390, we have no push instruction. */
623
624 /* #define PUSH_ROUNDING(BYTES) */
625
626 /* Accumulate the outgoing argument count so we can request the right
627 DSA size and determine stack offset. */
628
629 #define ACCUMULATE_OUTGOING_ARGS 1
630
631 /* Offset from the stack pointer register to an item dynamically
632 allocated on the stack, e.g., by `alloca'.
633
634 The default value for this macro is `STACK_POINTER_OFFSET' plus the
635 length of the outgoing arguments. The default is correct for most
636 machines. See `function.c' for details. */
637 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
638
639 /* Offset of first parameter from the argument pointer register value.
640 On the S/390, we define the argument pointer to the start of the fixed
641 area. */
642 #define FIRST_PARM_OFFSET(FNDECL) 0
643
644 /* Define this if stack space is still allocated for a parameter passed
645 in a register. The value is the number of bytes allocated to this
646 area. */
647 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
648
649 /* Define this if the above stack space is to be considered part of the
650 space allocated by the caller. */
651 /* #define OUTGOING_REG_PARM_STACK_SPACE */
652
653 /* 1 if N is a possible register number for function argument passing.
654 On S390, general registers 2 - 6 and floating point register 0 and 2
655 are used in this way. */
656
657 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
658 (N) == 16 || (N) == 17)
659
660 /* Define a data type for recording info about an argument list during
661 the scan of that argument list. This data type should hold all
662 necessary information about the function itself and about the args
663 processed so far, enough to enable macros such as FUNCTION_ARG to
664 determine where the next arg should go. */
665
666 typedef struct s390_arg_structure
667 {
668 int gprs; /* gpr so far */
669 int fprs; /* fpr so far */
670 }
671 CUMULATIVE_ARGS;
672
673
674 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
675 a function whose data type is FNTYPE.
676 For a library call, FNTYPE is 0. */
677
678 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
679 ((CUM).gprs=0, (CUM).fprs=0)
680
681 /* Update the data in CUM to advance over an argument of mode MODE and
682 data type TYPE. (TYPE is null for libcalls where that information
683 may not be available.) */
684
685 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
686 s390_function_arg_advance(&CUM, MODE, TYPE, NAMED)
687
688 /* Define where to put the arguments to a function. Value is zero to push
689 the argument on the stack, or a hard register in which to store the
690 argument. */
691
692 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
693 s390_function_arg(&CUM, MODE, TYPE, NAMED)
694
695 /* Define where to expect the arguments of a function. Value is zero, if
696 the argument is on the stack, or a hard register in which the argument
697 is stored. It is the same like FUNCTION_ARG, except for unnamed args
698 That means, that all in case of varargs used, the arguments are expected
699 from the stack.
700 S/390 has already space on the stack for args coming in registers,
701 they are pushed in prologue, if needed. */
702
703
704 /* Define the `__builtin_va_list' type. */
705
706 #define BUILD_VA_LIST_TYPE(VALIST) \
707 (VALIST) = s390_build_va_list ()
708
709 /* Implement `va_start' for varargs and stdarg. */
710
711 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
712 s390_va_start (stdarg, valist, nextarg)
713
714 /* Implement `va_arg'. */
715
716 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
717 s390_va_arg (valist, type)
718
719 /* For an arg passed partly in registers and partly in memory, this is the
720 number of registers used. For args passed entirely in registers or
721 entirely in memory, zero. */
722
723 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
724
725
726 /* Define if returning from a function call automatically pops the
727 arguments described by the number-of-args field in the call. */
728
729 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
730
731
732 /* Define how to find the value returned by a function. VALTYPE is the
733 data type of the value (as a tree).
734 If the precise function being called is known, FUNC is its FUNCTION_DECL;
735 otherwise, FUNC is 15. */
736
737 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
738 || TARGET_SOFT_FLOAT ) ? 2 : 16)
739
740
741 /* for structs the address is passed, and the Callee makes a
742 copy, only if needed */
743
744 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
745 s390_function_arg_pass_by_reference (MODE, TYPE)
746
747
748 /* Register 2 (and 3) for integral values
749 or floating point register 0 (and 2) for fp values are used. */
750
751 #define FUNCTION_VALUE(VALTYPE, FUNC) \
752 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
753 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
754 || POINTER_TYPE_P (VALTYPE) \
755 ? word_mode : TYPE_MODE (VALTYPE), \
756 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
757
758 /* Define how to find the value returned by a library function assuming
759 the value has mode MODE. */
760
761 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
762
763 /* 1 if N is a possible register number for a function value. */
764
765 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
766
767 /* The definition of this macro implies that there are cases where
768 a scalar value cannot be returned in registers. */
769
770 #define RETURN_IN_MEMORY(type) \
771 (TYPE_MODE (type) == BLKmode || \
772 TYPE_MODE (type) == DCmode || \
773 TYPE_MODE (type) == SCmode)
774
775 /* Mode of stack savearea.
776 FUNCTION is VOIDmode because calling convention maintains SP.
777 BLOCK needs Pmode for SP.
778 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
779
780 #define STACK_SAVEAREA_MODE(LEVEL) \
781 (LEVEL == SAVE_FUNCTION ? VOIDmode \
782 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
783
784 /* Structure value address is passed as invisible first argument (gpr 2). */
785
786 #define STRUCT_VALUE 0
787
788 /* This macro definition sets up a default value for `main' to return. */
789
790 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
791
792 /* Length in units of the trampoline for entering a nested function. */
793
794 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
795
796 /* Initialize the dynamic part of trampoline. */
797
798 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
799 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
800
801 /* Template for constant part of trampoline. */
802
803 #define TRAMPOLINE_TEMPLATE(FILE) \
804 s390_trampoline_template (FILE)
805
806 /* Output assembler code to FILE to increment profiler label # LABELNO
807 for profiling a function entry. */
808
809 #define FUNCTION_PROFILER(FILE, LABELNO) \
810 do { \
811 extern rtx s390_profile[]; \
812 extern s390_pool_count; \
813 rtx tmp; \
814 static char label[128]; \
815 fprintf (FILE, "# function profiler \n"); \
816 if (TARGET_64BIT) \
817 { \
818 rtx tmp[1]; \
819 output_asm_insn ("stg\t14,8(15)", tmp); \
820 sprintf (label, "%sP%d", LPREFIX, LABELNO); \
821 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, label); \
822 SYMBOL_REF_FLAG (tmp[0]) = 1; \
823 output_asm_insn ("larl\t1,%0", tmp); \
824 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "_mcount"); \
825 if (flag_pic) \
826 { \
827 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
828 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
829 } \
830 output_asm_insn ("brasl\t14,%0", tmp); \
831 output_asm_insn ("lg\t14,8(15)", tmp); \
832 } \
833 else \
834 { \
835 output_asm_insn ("l 14,4(15)", s390_profile); \
836 s390_pool_count = 0; \
837 output_asm_insn ("st 14,4(15)", s390_profile); \
838 output_asm_insn ("l 14,%4", s390_profile); \
839 output_asm_insn ("l 1,%9", s390_profile); \
840 if (flag_pic) \
841 { \
842 output_asm_insn ("ar 1,13", s390_profile); \
843 output_asm_insn ("bas 14,0(14,13)", s390_profile); \
844 } \
845 else \
846 { \
847 output_asm_insn ("basr 14,14", s390_profile); \
848 } \
849 output_asm_insn ("l 14,4(15)", s390_profile); \
850 } \
851 } while (0)
852
853 /* #define PROFILE_BEFORE_PROLOGUE */
854
855 /* There are three profiling modes for basic blocks available.
856 The modes are selected at compile time by using the options
857 -a or -ax of the gnu compiler.
858 The variable `profile_block_flag' will be set according to the
859 selected option.
860
861 profile_block_flag == 0, no option used:
862
863 No profiling done.
864
865 profile_block_flag == 1, -a option used.
866
867 Count frequency of execution of every basic block.
868
869 profile_block_flag == 2, -ax option used.
870
871 Generate code to allow several different profiling modes at run time.
872 Available modes are:
873 Produce a trace of all basic blocks.
874 Count frequency of jump instructions executed.
875 In every mode it is possible to start profiling upon entering
876 certain functions and to disable profiling of some other functions.
877
878 The result of basic-block profiling will be written to a file `bb.out'.
879 If the -ax option is used parameters for the profiling will be read
880 from file `bb.in'.
881
882 */
883
884 /* The following macro shall output assembler code to FILE
885 to initialize basic-block profiling.
886
887 If profile_block_flag == 2
888
889 Output code to call the subroutine `__bb_init_trace_func'
890 and pass two parameters to it. The first parameter is
891 the address of a block allocated in the object module.
892 The second parameter is the number of the first basic block
893 of the function.
894
895 The name of the block is a local symbol made with this statement:
896
897 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
898
899 Of course, since you are writing the definition of
900 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
901 can take a short cut in the definition of this macro and use the
902 name that you know will result.
903
904 The number of the first basic block of the function is
905 passed to the macro in BLOCK_OR_LABEL.
906
907 If described in a virtual assembler language the code to be
908 output looks like:
909
910 parameter1 <- LPBX0
911 parameter2 <- BLOCK_OR_LABEL
912 call __bb_init_trace_func
913
914 else if profile_block_flag != 0
915
916 Output code to call the subroutine `__bb_init_func'
917 and pass one single parameter to it, which is the same
918 as the first parameter to `__bb_init_trace_func'.
919
920 The first word of this parameter is a flag which will be nonzero if
921 the object module has already been initialized. So test this word
922 first, and do not call `__bb_init_func' if the flag is nonzero.
923 Note: When profile_block_flag == 2 the test need not be done
924 but `__bb_init_trace_func' *must* be called.
925
926 BLOCK_OR_LABEL may be used to generate a label number as a
927 branch destination in case `__bb_init_func' will not be called.
928
929 If described in a virtual assembler language the code to be
930 output looks like:
931
932 cmp (LPBX0),0
933 jne local_label
934 parameter1 <- LPBX0
935 call __bb_init_func
936 local_label:
937
938 */
939
940 #undef FUNCTION_BLOCK_PROFILER
941 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
942 do \
943 { \
944 if (TARGET_64BIT) \
945 { \
946 rtx tmp[1]; \
947 fprintf (FILE, "# function block profiler %d \n", profile_block_flag); \
948 output_asm_insn ("ipm 0", tmp); \
949 output_asm_insn ("aghi 15,-224", tmp); \
950 output_asm_insn ("stmg 14,5,160(15)", tmp); \
951 output_asm_insn ("larl 2,.LPBX0", tmp); \
952 switch (profile_block_flag) \
953 { \
954 case 2: \
955 if (BLOCK_OR_LABEL < 0x10000) { \
956 tmp[0] = gen_rtx_CONST_INT (Pmode, (BLOCK_OR_LABEL)); \
957 output_asm_insn ("llill 3,%x0", tmp); \
958 } else { \
959 int bo = BLOCK_OR_LABEL; \
960 tmp[0] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
961 output_asm_insn ("llill 3,%x0", tmp); \
962 tmp[0] = gen_rtx_CONST_INT (Pmode, (bo&0xffff0000)>>16); \
963 output_asm_insn ("iilh 3,%x0", tmp); \
964 } \
965 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_init_trace_func"); \
966 if (flag_pic) \
967 { \
968 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
969 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
970 } \
971 output_asm_insn ("brasl\t14,%0", tmp); \
972 break; \
973 default: \
974 output_asm_insn ("cli 7(2),0", tmp); \
975 output_asm_insn ("jne 2f", tmp); \
976 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_init_func"); \
977 if (flag_pic) \
978 { \
979 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
980 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
981 } \
982 output_asm_insn ("brasl\t14,%0", tmp); \
983 break; \
984 } \
985 output_asm_insn ("2:", tmp); \
986 output_asm_insn ("lmg 14,5,160(15)", tmp); \
987 output_asm_insn ("aghi 15,224", tmp); \
988 output_asm_insn ("spm 0", tmp); \
989 } \
990 else \
991 { \
992 extern rtx s390_profile[]; \
993 fprintf (FILE, "# function block profiler %d \n", profile_block_flag); \
994 output_asm_insn ("ipm 0", s390_profile); \
995 output_asm_insn ("ahi 15,-128", s390_profile); \
996 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
997 output_asm_insn ("l 2,%6", s390_profile); \
998 if (flag_pic) \
999 output_asm_insn ("ar 2,13", s390_profile); \
1000 switch (profile_block_flag) \
1001 { \
1002 case 2: \
1003 output_asm_insn ("l 4,%1", s390_profile); \
1004 if (BLOCK_OR_LABEL < 0x8000) { \
1005 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (BLOCK_OR_LABEL)); \
1006 output_asm_insn ("lhi 3,%8", s390_profile); \
1007 } else { \
1008 int bo = BLOCK_OR_LABEL; \
1009 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1010 output_asm_insn ("lhi 3,%8", s390_profile); \
1011 output_asm_insn ("sll 3,15", s390_profile); \
1012 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1013 output_asm_insn ("ahi 3,%8", s390_profile); \
1014 } \
1015 break; \
1016 default: \
1017 output_asm_insn ("l 4,%0", s390_profile); \
1018 output_asm_insn ("cli 3(2),0", s390_profile); \
1019 output_asm_insn ("jne 2f", s390_profile); \
1020 break; \
1021 } \
1022 if (flag_pic) \
1023 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1024 else \
1025 output_asm_insn ("basr 14,4", s390_profile); \
1026 output_asm_insn ("2:", s390_profile); \
1027 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1028 output_asm_insn ("ahi 15,128", s390_profile); \
1029 output_asm_insn ("spm 0", s390_profile); \
1030 } \
1031 } while (0)
1032
1033 /* The following macro shall output assembler code to FILE
1034 to increment a counter associated with basic block number BLOCKNO.
1035
1036 If profile_block_flag == 2
1037
1038 Output code to initialize the global structure `__bb' and
1039 call the function `__bb_trace_func' which will increment the
1040 counter.
1041
1042 `__bb' consists of two words. In the first word the number
1043 of the basic block has to be stored. In the second word
1044 the address of a block allocated in the object module
1045 has to be stored.
1046
1047 The basic block number is given by BLOCKNO.
1048
1049 The address of the block is given by the label created with
1050
1051 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1052
1053 by FUNCTION_BLOCK_PROFILER.
1054
1055 Of course, since you are writing the definition of
1056 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1057 can take a short cut in the definition of this macro and use the
1058 name that you know will result.
1059
1060 If described in a virtual assembler language the code to be
1061 output looks like:
1062
1063 move BLOCKNO -> (__bb)
1064 move LPBX0 -> (__bb+4)
1065 call __bb_trace_func
1066
1067 Note that function `__bb_trace_func' must not change the
1068 machine state, especially the flag register. To grant
1069 this, you must output code to save and restore registers
1070 either in this macro or in the macros MACHINE_STATE_SAVE
1071 and MACHINE_STATE_RESTORE. The last two macros will be
1072 used in the function `__bb_trace_func', so you must make
1073 sure that the function prologue does not change any
1074 register prior to saving it with MACHINE_STATE_SAVE.
1075
1076 else if profile_block_flag != 0
1077
1078 Output code to increment the counter directly.
1079 Basic blocks are numbered separately from zero within each
1080 compiled object module. The count associated with block number
1081 BLOCKNO is at index BLOCKNO in an array of words; the name of
1082 this array is a local symbol made with this statement:
1083
1084 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1085
1086 Of course, since you are writing the definition of
1087 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1088 can take a short cut in the definition of this macro and use the
1089 name that you know will result.
1090
1091 If described in a virtual assembler language the code to be
1092 output looks like:
1093
1094 inc (LPBX2+4*BLOCKNO)
1095
1096 */
1097
1098 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1099 do \
1100 { \
1101 if (TARGET_64BIT) \
1102 { \
1103 rtx tmp[1]; \
1104 fprintf (FILE, "# block profiler %d block %d \n", \
1105 profile_block_flag,BLOCKNO); \
1106 output_asm_insn ("ipm 14", tmp); \
1107 output_asm_insn ("aghi 15,-224", tmp); \
1108 output_asm_insn ("stmg 14,5,160(15)", tmp); \
1109 output_asm_insn ("larl 2,_bb", tmp); \
1110 if ((BLOCKNO*8) < 0x10000) { \
1111 tmp[0] = gen_rtx_CONST_INT (Pmode, (BLOCKNO*8)); \
1112 output_asm_insn ("llill 3,%x0", tmp); \
1113 } else { \
1114 int bo = BLOCKNO*8; \
1115 tmp[0] = gen_rtx_CONST_INT (Pmode, bo&0xffff); \
1116 output_asm_insn ("llill 3,%x0", tmp); \
1117 tmp[0] = gen_rtx_CONST_INT (Pmode, (bo&0xffff0000)>>16); \
1118 output_asm_insn ("iilh 3,%x0", tmp); \
1119 } \
1120 switch (profile_block_flag) \
1121 { \
1122 case 2: \
1123 output_asm_insn ("stg 3,0(2)", tmp); \
1124 output_asm_insn ("larl 3,.LPBX0", tmp); \
1125 output_asm_insn ("stg 3,0(2)", tmp); \
1126 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_trace_func"); \
1127 if (flag_pic) \
1128 { \
1129 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
1130 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
1131 } \
1132 output_asm_insn ("brasl\t14,%0", tmp); \
1133 break; \
1134 default: \
1135 output_asm_insn ("larl 2,.LPBX2", tmp); \
1136 output_asm_insn ("la 2,0(2,3)", tmp); \
1137 output_asm_insn ("lg 3,0(2)", tmp); \
1138 output_asm_insn ("aghi 3,1", tmp); \
1139 output_asm_insn ("stg 3,0(2)", tmp); \
1140 break; \
1141 } \
1142 output_asm_insn ("lmg 14,5,160(15)", tmp); \
1143 output_asm_insn ("ahi 15,224", tmp); \
1144 output_asm_insn ("spm 14", tmp); \
1145 } \
1146 else \
1147 { \
1148 extern rtx s390_profile[]; \
1149 fprintf (FILE, "# block profiler %d block %d \n", \
1150 profile_block_flag,BLOCKNO); \
1151 output_asm_insn ("ipm 14", s390_profile); \
1152 output_asm_insn ("ahi 15,-128", s390_profile); \
1153 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
1154 switch (profile_block_flag) \
1155 { \
1156 case 2: \
1157 output_asm_insn ("l 4,%2", s390_profile); \
1158 output_asm_insn ("l 2,%5", s390_profile); \
1159 if (flag_pic) \
1160 output_asm_insn ("ar 2,13", s390_profile); \
1161 if (BLOCKNO < 0x8000) { \
1162 s390_profile[7] = gen_rtx_CONST_INT (Pmode, (BLOCKNO)*4); \
1163 output_asm_insn ("lhi 3,%8", s390_profile); \
1164 } else { \
1165 int bo = BLOCKNO; \
1166 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1167 output_asm_insn ("lhi 3,%8", s390_profile); \
1168 output_asm_insn ("sll 3,15", s390_profile); \
1169 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1170 output_asm_insn ("ahi 3,%7", s390_profile); \
1171 } \
1172 output_asm_insn ("st 3,0(2)", s390_profile); \
1173 output_asm_insn ("mvc 0(4,2),%5", s390_profile); \
1174 if (flag_pic) \
1175 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1176 else \
1177 output_asm_insn ("basr 14,4", s390_profile); \
1178 break; \
1179 default: \
1180 if (BLOCKNO < 0x2000) { \
1181 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (BLOCKNO)*4); \
1182 output_asm_insn ("lhi 2,%8", s390_profile); \
1183 } else { \
1184 int bo = BLOCKNO*4; \
1185 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1186 output_asm_insn ("lhi 2,%8", s390_profile); \
1187 output_asm_insn ("sll 2,15", s390_profile); \
1188 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1189 output_asm_insn ("ahi 2,%8", s390_profile); \
1190 } \
1191 output_asm_insn ("a 2,%7", s390_profile); \
1192 if (flag_pic) \
1193 output_asm_insn ("l 3,0(2,13)", s390_profile); \
1194 else \
1195 output_asm_insn ("l 3,0(2)", s390_profile); \
1196 output_asm_insn ("ahi 3,1", s390_profile); \
1197 if (flag_pic) \
1198 output_asm_insn ("st 3,0(2,13)", s390_profile); \
1199 else \
1200 output_asm_insn ("st 3,0(2)", s390_profile); \
1201 break; \
1202 } \
1203 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1204 output_asm_insn ("ahi 15,128", s390_profile); \
1205 output_asm_insn ("spm 14", s390_profile); \
1206 } \
1207 } while (0)
1208
1209
1210 /* The following macro shall output assembler code to FILE
1211 to indicate a return from function during basic-block profiling.
1212
1213 If profiling_block_flag == 2:
1214
1215 Output assembler code to call function `__bb_trace_ret'.
1216
1217 Note that function `__bb_trace_ret' must not change the
1218 machine state, especially the flag register. To grant
1219 this, you must output code to save and restore registers
1220 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1221 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1222 used in the function `__bb_trace_ret', so you must make
1223 sure that the function prologue does not change any
1224 register prior to saving it with MACHINE_STATE_SAVE_RET.
1225
1226 else if profiling_block_flag != 0:
1227
1228 The macro will not be used, so it need not distinguish
1229 these cases.
1230 */
1231
1232 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1233 do { \
1234 if (TARGET_64BIT) \
1235 { \
1236 rtx tmp[1]; \
1237 fprintf (FILE, "# block profiler exit \n"); \
1238 output_asm_insn ("ipm 14", tmp); \
1239 output_asm_insn ("aghi 15,-224", tmp); \
1240 output_asm_insn ("stmg 14,5,160(15)", tmp); \
1241 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_trace_ret"); \
1242 if (flag_pic) \
1243 { \
1244 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
1245 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
1246 } \
1247 output_asm_insn ("brasl 14,%0", tmp); \
1248 output_asm_insn ("lmg 14,5,160(15)", tmp); \
1249 output_asm_insn ("aghi 15,224", tmp); \
1250 output_asm_insn ("spm 14", tmp); \
1251 } \
1252 else \
1253 { \
1254 extern rtx s390_profile[]; \
1255 fprintf (FILE, "# block profiler exit \n"); \
1256 output_asm_insn ("ipm 14", s390_profile); \
1257 output_asm_insn ("ahi 15,-128", s390_profile); \
1258 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
1259 output_asm_insn ("l 4,%3", s390_profile); \
1260 if (flag_pic) \
1261 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1262 else \
1263 output_asm_insn ("basr 14,4", s390_profile); \
1264 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1265 output_asm_insn ("ahi 15,128", s390_profile); \
1266 output_asm_insn ("spm 14", s390_profile); \
1267 } \
1268 } while (0)
1269
1270 /* The function `__bb_trace_func' is called in every basic block
1271 and is not allowed to change the machine state. Saving (restoring)
1272 the state can either be done in the BLOCK_PROFILER macro,
1273 before calling function (rsp. after returning from function)
1274 `__bb_trace_func', or it can be done inside the function by
1275 defining the macros:
1276
1277 MACHINE_STATE_SAVE(ID)
1278 MACHINE_STATE_RESTORE(ID)
1279
1280 In the latter case care must be taken, that the prologue code
1281 of function `__bb_trace_func' does not already change the
1282 state prior to saving it with MACHINE_STATE_SAVE.
1283
1284 The parameter `ID' is a string identifying a unique macro use.
1285
1286 On the s390 all save/restore is done in macros above
1287 */
1288
1289 /*
1290 #define MACHINE_STATE_SAVE(ID) \
1291 fprintf (FILE, "\tahi 15,-128 # save state\n"); \
1292 fprintf (FILE, "\tstm 14,5,96(15)\n"); \
1293
1294 #define MACHINE_STATE_RESTORE(ID) \
1295 fprintf (FILE, "\tlm 14,5,96(15) # restore state\n"); \
1296 fprintf (FILE, "\tahi 15,128\n"); \
1297 */
1298
1299
1300 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
1301 pointer does not matter (provided there is a frame pointer). */
1302
1303 #define EXIT_IGNORE_STACK 1
1304
1305 /* Addressing modes, and classification of registers for them. */
1306
1307 /* #define HAVE_POST_INCREMENT */
1308 /* #define HAVE_POST_DECREMENT */
1309
1310 /* #define HAVE_PRE_DECREMENT */
1311 /* #define HAVE_PRE_INCREMENT */
1312
1313 /* These assume that REGNO is a hard or pseudo reg number. They give
1314 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
1315 reg currently allocated to a suitable hard reg.
1316 These definitions are NOT overridden anywhere. */
1317
1318 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1319 (((REGNO) > 0 && (REGNO) < 16) || (REGNO) == ARG_POINTER_REGNUM \
1320 /* || (REGNO) == FRAME_POINTER_REGNUM */ \
1321 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
1322
1323 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
1324
1325 #define REGNO_OK_FOR_DATA_P(REGNO) \
1326 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1327
1328 #define REGNO_OK_FOR_FP_P(REGNO) \
1329 FLOAT_REGNO_P(REGNO)
1330
1331 /* Now macros that check whether X is a register and also,
1332 strictly, whether it is in a specified class. */
1333
1334 /* 1 if X is a data register. */
1335
1336 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1337
1338 /* 1 if X is an fp register. */
1339
1340 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1341
1342 /* 1 if X is an address register. */
1343
1344 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1345
1346 /* Maximum number of registers that can appear in a valid memory address. */
1347
1348 #define MAX_REGS_PER_ADDRESS 2
1349
1350 /* Recognize any constant value that is a valid address. */
1351
1352 #define CONSTANT_ADDRESS_P(X) 0
1353
1354 #define SYMBOLIC_CONST(X) \
1355 (GET_CODE (X) == SYMBOL_REF \
1356 || GET_CODE (X) == LABEL_REF \
1357 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1358
1359 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
1360 they have to be forced to constant pool
1361 CONST_INT have to be forced into constant pool, if greater than
1362 64k. Depending on the insn they have to be force into constant pool
1363 for smaller value; in this case we have to work with nonimmediate operand. */
1364
1365 #define LEGITIMATE_PIC_OPERAND_P(X) \
1366 legitimate_pic_operand_p (X)
1367
1368 /* Nonzero if the constant value X is a legitimate general operand.
1369 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1370
1371 #define LEGITIMATE_CONSTANT_P(X) \
1372 legitimate_constant_p (X)
1373
1374 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
1375 its validity for a certain class. We have two alternate definitions
1376 for each of them. The usual definition accepts all pseudo regs; the
1377 other rejects them all. The symbol REG_OK_STRICT causes the latter
1378 definition to be used.
1379
1380 Most source files want to accept pseudo regs in the hope that they will
1381 get allocated to the class that the insn wants them to be in.
1382 Some source files that are used after register allocation
1383 need to be strict. */
1384
1385 /*
1386 * Nonzero if X is a hard reg that can be used as an index or if it is
1387 * a pseudo reg.
1388 */
1389
1390 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1391 ((GET_MODE (X) == Pmode) && \
1392 ((REGNO (X) > 0 && REGNO (X) < 16) || \
1393 (REGNO (X) == ARG_POINTER_REGNUM) || \
1394 (REGNO (X) >= FIRST_PSEUDO_REGISTER)))
1395
1396 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
1397 a pseudo reg. */
1398
1399 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
1400
1401 /* Nonzero if X is a hard reg that can be used as an index. */
1402
1403 #define REG_OK_FOR_INDEX_STRICT_P(X) \
1404 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
1405
1406 /* Nonzero if X is a hard reg that can be used as a base reg. */
1407
1408 #define REG_OK_FOR_BASE_STRICT_P(X) \
1409 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
1410
1411
1412 #ifndef REG_OK_STRICT
1413 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1414 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1415 #else
1416 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1417 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1418 #endif
1419
1420
1421 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1422 valid memory address for an instruction.
1423 The MODE argument is the machine mode for the MEM expression
1424 that wants to use this address.
1425
1426 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1427 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1428
1429 #ifdef REG_OK_STRICT
1430 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1431 { \
1432 if (legitimate_address_p (MODE, X, 1)) \
1433 goto ADDR; \
1434 }
1435 #else
1436 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1437 { \
1438 if (legitimate_address_p (MODE, X, 0)) \
1439 goto ADDR; \
1440 }
1441 #endif
1442
1443
1444 /* S/390 has no mode dependent addresses. */
1445
1446 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1447
1448 /* Try machine-dependent ways of modifying an illegitimate address
1449 to be legitimate. If we find one, return the new, valid address.
1450 This macro is used in only one place: `memory_address' in explow.c. */
1451
1452 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1453 { \
1454 (X) = legitimize_address (X, OLDX, MODE); \
1455 if (memory_address_p (MODE, X)) \
1456 goto WIN; \
1457 }
1458
1459 /* Specify the machine mode that this machine uses for the index in the
1460 tablejump instruction. */
1461
1462 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1463
1464 /* Define this if the tablejump instruction expects the table to contain
1465 offsets from the address of the table.
1466 Do not define this if the table should contain absolute addresses. */
1467
1468 /* #define CASE_VECTOR_PC_RELATIVE */
1469
1470 /* Load from integral MODE < SI from memory into register makes sign_extend
1471 or zero_extend
1472 In our case sign_extension happens for Halfwords, other no extension. */
1473
1474 #define LOAD_EXTEND_OP(MODE) \
1475 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1476 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1477 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1478
1479 /* Specify the tree operation to be used to convert reals to integers. */
1480
1481 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1482
1483 /* Define this if fixuns_trunc is the same as fix_trunc. */
1484
1485 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1486
1487 /* We use "unsigned char" as default. */
1488
1489 #define DEFAULT_SIGNED_CHAR 0
1490
1491 /* This is the kind of divide that is easiest to do in the general case. */
1492
1493 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1494
1495 /* Max number of bytes we can move from memory to memory in one reasonably
1496 fast instruction. */
1497
1498 #define MOVE_MAX 256
1499
1500 /* Define this if zero-extension is slow (more than one real instruction). */
1501
1502 #define SLOW_ZERO_EXTEND
1503
1504 /* Nonzero if access to memory by bytes is slow and undesirable. */
1505
1506 #define SLOW_BYTE_ACCESS 1
1507
1508 /* Define if shifts truncate the shift count which implies one can omit
1509 a sign-extension or zero-extension of a shift count. */
1510
1511 /* #define SHIFT_COUNT_TRUNCATED */
1512
1513 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1514 is done just by pretending it is already truncated. */
1515
1516 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1517
1518 /* We assume that the store-condition-codes instructions store 0 for false
1519 and some other value for true. This is the value stored for true. */
1520
1521 /* #define STORE_FLAG_VALUE -1 */
1522
1523 /* When a prototype says `char' or `short', really pass an `int'. */
1524
1525 #define PROMOTE_PROTOTYPES 1
1526
1527 /* Don't perform CSE on function addresses. */
1528
1529 #define NO_FUNCTION_CSE
1530
1531 /* Specify the machine mode that pointers have.
1532 After generation of rtl, the compiler makes no further distinction
1533 between pointers and any other objects of this machine mode. */
1534
1535 #define Pmode (TARGET_64BIT ? DImode : SImode)
1536
1537 /* A function address in a call instruction is a byte address (for
1538 indexing purposes) so give the MEM rtx a byte's mode. */
1539
1540 #define FUNCTION_MODE QImode
1541
1542
1543 /* A part of a C `switch' statement that describes the relative costs
1544 of constant RTL expressions. It must contain `case' labels for
1545 expression codes `const_int', `const', `symbol_ref', `label_ref'
1546 and `const_double'. Each case must ultimately reach a `return'
1547 statement to return the relative cost of the use of that kind of
1548 constant value in an expression. The cost may depend on the
1549 precise value of the constant, which is available for examination
1550 in X, and the rtx code of the expression in which it is contained,
1551 found in OUTER_CODE.
1552
1553 CODE is the expression code--redundant, since it can be obtained
1554 with `GET_CODE (X)'. */
1555 /* Force_const_mem does not work out of reload, because the saveable_obstack
1556 is set to reload_obstack, which does not live long enough.
1557 Because of this we cannot use force_const_mem in addsi3.
1558 This leads to problems with gen_add2_insn with a constant greater
1559 than a short. Because of that we give a addition of greater
1560 constants a cost of 3 (reload1.c 10096). */
1561
1562
1563 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1564 case CONST: \
1565 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1566 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1567 return 1000; \
1568 case CONST_INT: \
1569 if ((OUTER_CODE == PLUS) && \
1570 ((INTVAL (RTX) > 32767) || \
1571 (INTVAL (RTX) < -32768))) \
1572 return 3; \
1573 case LABEL_REF: \
1574 case SYMBOL_REF: \
1575 case CONST_DOUBLE: \
1576 return 1; \
1577
1578
1579 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1580 This can be used, for example, to indicate how costly a multiply
1581 instruction is. In writing this macro, you can use the construct
1582 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1583 instructions. OUTER_CODE is the code of the expression in which X
1584 is contained.
1585
1586 This macro is optional; do not define it if the default cost
1587 assumptions are adequate for the target machine. */
1588
1589 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1590 case ASHIFT: \
1591 case ASHIFTRT: \
1592 case LSHIFTRT: \
1593 case PLUS: \
1594 case AND: \
1595 case IOR: \
1596 case XOR: \
1597 case MINUS: \
1598 case NEG: \
1599 case NOT: \
1600 return 1; \
1601 case MULT: \
1602 if (GET_MODE (XEXP (X, 0)) == DImode) \
1603 return 40; \
1604 else \
1605 return 7; \
1606 case DIV: \
1607 case UDIV: \
1608 case MOD: \
1609 case UMOD: \
1610 return 33;
1611
1612
1613 /* An expression giving the cost of an addressing mode that contains
1614 ADDRESS. If not defined, the cost is computed from the ADDRESS
1615 expression and the `CONST_COSTS' values.
1616
1617 For most CISC machines, the default cost is a good approximation
1618 of the true cost of the addressing mode. However, on RISC
1619 machines, all instructions normally have the same length and
1620 execution time. Hence all addresses will have equal costs.
1621
1622 In cases where more than one form of an address is known, the form
1623 with the lowest cost will be used. If multiple forms have the
1624 same, lowest, cost, the one that is the most complex will be used.
1625
1626 For example, suppose an address that is equal to the sum of a
1627 register and a constant is used twice in the same basic block.
1628 When this macro is not defined, the address will be computed in a
1629 register and memory references will be indirect through that
1630 register. On machines where the cost of the addressing mode
1631 containing the sum is no higher than that of a simple indirect
1632 reference, this will produce an additional instruction and
1633 possibly require an additional register. Proper specification of
1634 this macro eliminates this overhead for such machines.
1635
1636 Similar use of this macro is made in strength reduction of loops.
1637
1638 ADDRESS need not be valid as an address. In such a case, the cost
1639 is not relevant and can be any value; invalid addresses need not be
1640 assigned a different cost.
1641
1642 On machines where an address involving more than one register is as
1643 cheap as an address computation involving only one register,
1644 defining `ADDRESS_COST' to reflect this can cause two registers to
1645 be live over a region of code where only one would have been if
1646 `ADDRESS_COST' were not defined in that manner. This effect should
1647 be considered in the definition of this macro. Equivalent costs
1648 should probably only be given to addresses with different numbers
1649 of registers on machines with lots of registers.
1650
1651 This macro will normally either not be defined or be defined as a
1652 constant.
1653
1654 On s390 symbols are expensive if compiled with fpic
1655 lifetimes. */
1656
1657 #define ADDRESS_COST(RTX) \
1658 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1659
1660 /* On s390, copy between fprs and gprs is expensive. */
1661
1662 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1663 (((CLASS1 != CLASS2) && \
1664 (CLASS1 == FP_REGS || CLASS2 == FP_REGS)) ? 10 : 1)
1665
1666
1667 /* A C expression for the cost of moving data of mode M between a
1668 register and memory. A value of 2 is the default; this cost is
1669 relative to those in `REGISTER_MOVE_COST'.
1670
1671 If moving between registers and memory is more expensive than
1672 between two registers, you should define this macro to express the
1673 relative cost. */
1674
1675 #define MEMORY_MOVE_COST(M, C, I) 1
1676
1677 /* A C expression for the cost of a branch instruction. A value of 1
1678 is the default; other values are interpreted relative to that. */
1679
1680 #define BRANCH_COST 1
1681
1682 /* Add any extra modes needed to represent the condition code. */
1683 #define EXTRA_CC_MODES \
1684 CC (CCZmode, "CCZ") \
1685 CC (CCAmode, "CCA") \
1686 CC (CCUmode, "CCU") \
1687 CC (CCSmode, "CCS") \
1688 CC (CCTmode, "CCT")
1689
1690 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1691 return the mode to be used for the comparison. */
1692
1693 #define SELECT_CC_MODE(OP,X,Y) \
1694 ( (OP) == EQ || (OP) == NE ? CCZmode \
1695 : (OP) == LE || (OP) == LT || \
1696 (OP) == GE || (OP) == GT ? CCSmode \
1697 : (OP) == LEU || (OP) == LTU || \
1698 (OP) == GEU || (OP) == GTU ? CCUmode \
1699 : CCmode )
1700
1701
1702 /* Define the information needed to generate branch and scc insns. This is
1703 stored from the compare operation. Note that we can't use "rtx" here
1704 since it hasn't been defined! */
1705
1706 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1707
1708 extern int s390_match_ccmode PARAMS ((struct rtx_def *, int));
1709
1710
1711 /* How to refer to registers in assembler output. This sequence is
1712 indexed by compiler's hard-register-number (see above). */
1713
1714 #define REGISTER_NAMES \
1715 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1716 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1717 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1718 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1719 "%ap", "%cc" \
1720 }
1721
1722 /* implicit call of memcpy, not bcopy */
1723
1724 #define TARGET_MEM_FUNCTIONS
1725
1726 /* Print operand X (an rtx) in assembler syntax to file FILE.
1727 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1728 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1729
1730 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1731
1732 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1733
1734
1735 /* Define the codes that are matched by predicates in aux-output.c. */
1736
1737 #define PREDICATE_CODES \
1738 {"s_operand", { MEM }}, \
1739 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1740 {"r_or_s_operand", { MEM, SUBREG, REG }}, \
1741 {"r_or_im8_operand", { CONST_INT, SUBREG, REG }}, \
1742 {"r_or_s_or_im8_operand", { MEM, SUBREG, REG, CONST_INT }}, \
1743 {"r_or_x_or_im16_operand", { MEM, SUBREG, REG, CONST_INT }}, \
1744 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1745 {"const1_operand", { CONST_INT, CONST_DOUBLE }}, \
1746 {"tmxx_operand", { CONST_INT, MEM }},
1747
1748
1749 /* A C statement (sans semicolon) to update the integer variable COST
1750 based on the relationship between INSN that is dependent on
1751 DEP_INSN through the dependence LINK. The default is to make no
1752 adjustment to COST. This can be used for example to specify to
1753 the scheduler that an output- or anti-dependence does not incur
1754 the same cost as a data-dependence. */
1755
1756 #define ADJUST_COST(insn, link, dep_insn, cost) \
1757 (cost) = s390_adjust_cost (insn, link, dep_insn, cost)
1758
1759
1760 /* Constant Pool for all symbols operands which are changed with
1761 force_const_mem during insn generation (expand_insn). */
1762
1763 extern struct rtx_def *s390_pool_start_insn;
1764 extern int s390_pool_count;
1765 extern int s390_nr_constants;
1766
1767 /* Function is splitted in chunk, if literal pool could overflow
1768 Value need to be lowered, if problems with displacement overflow. */
1769
1770 #define S390_REL_MAX 55000
1771 #define S390_CHUNK_MAX 0x2000
1772 #define S390_CHUNK_OV 0x8000
1773 #define S390_POOL_MAX 0xe00
1774
1775 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1776 { \
1777 register rtx insn; \
1778 struct pool_constant *pool; \
1779 \
1780 if (s390_pool_count == -1) \
1781 { \
1782 s390_nr_constants = 0; \
1783 for (pool = first_pool; pool; pool = pool->next) \
1784 if (pool->mark) s390_nr_constants++; \
1785 return; \
1786 } \
1787 if (first_pool == 0) { \
1788 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1789 return; \
1790 } \
1791 for (pool = first_pool; pool; pool = pool->next) \
1792 pool->mark = 0; \
1793 \
1794 insn = s390_pool_start_insn; \
1795 \
1796 if (insn==NULL_RTX) \
1797 insn = get_insns (); \
1798 else \
1799 insn = NEXT_INSN (insn); \
1800 for (; insn; insn = NEXT_INSN (insn)) { \
1801 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { \
1802 if (s390_stop_dump_lit_p (insn)) { \
1803 mark_constants (PATTERN (insn)); \
1804 break; \
1805 } else \
1806 mark_constants (PATTERN (insn)); \
1807 } \
1808 } \
1809 \
1810 /* Mark entries referenced by other entries */ \
1811 for (pool = first_pool; pool; pool = pool->next) \
1812 if (pool->mark) \
1813 mark_constants(pool->constant); \
1814 \
1815 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1816 }
1817
1818 /* We need to return, because otherwise the pool is deleted of the
1819 constant pool after the first output. */
1820
1821 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1822
1823 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1824 { \
1825 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1826 { \
1827 fprintf (FILE, ".LC%d:\n", LABELNO); \
1828 LABELNO = ~LABELNO; \
1829 } \
1830 if (s390_pool_count > 0) \
1831 { \
1832 fprintf (FILE, ".LC%d_%X:\n", ~LABELNO, s390_pool_count); \
1833 } \
1834 \
1835 /* Output the value of the constant itself. */ \
1836 switch (GET_MODE_CLASS (pool->mode)) \
1837 { \
1838 case MODE_FLOAT: \
1839 if (GET_CODE (x) != CONST_DOUBLE) \
1840 abort (); \
1841 \
1842 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (x), sizeof u); \
1843 assemble_real (u.d, pool->mode); \
1844 break; \
1845 \
1846 case MODE_INT: \
1847 case MODE_PARTIAL_INT: \
1848 if (flag_pic && (GET_CODE (x) == CONST || \
1849 GET_CODE (x) == SYMBOL_REF || \
1850 GET_CODE (x) == LABEL_REF )) \
1851 { \
1852 fprintf (FILE, "%s\t",TARGET_64BIT ? ASM_QUAD : ASM_LONG); \
1853 s390_output_symbolic_const (FILE, x); \
1854 fputc ('\n', (FILE)); \
1855 } \
1856 else \
1857 assemble_integer (x, GET_MODE_SIZE (pool->mode), 1); \
1858 break; \
1859 \
1860 default: \
1861 abort (); \
1862 } \
1863 goto WIN; \
1864 }
1865
1866 #endif