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Makefile.in (MACHMODE_H): Add @extra_modes_file@.
[gcc.git] / gcc / config / s390 / s390.h
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #ifndef _S390_H
23 #define _S390_H
24
25 extern int flag_pic;
26
27 /* Run-time compilation parameters selecting different hardware subsets. */
28
29 extern int target_flags;
30
31 /* Target macros checked at runtime of compiler. */
32
33 #define TARGET_HARD_FLOAT (target_flags & 1)
34 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
35 #define TARGET_BACKCHAIN (target_flags & 2)
36 #define TARGET_SMALL_EXEC (target_flags & 4)
37 #define TARGET_DEBUG_ARG (target_flags & 8)
38 #define TARGET_64BIT (target_flags & 16)
39 #define TARGET_MVCLE (target_flags & 32)
40
41 #ifdef DEFAULT_TARGET_64BIT
42 #define TARGET_DEFAULT 0x13
43 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
44 #else
45 #define TARGET_DEFAULT 0x3
46 #define TARGET_VERSION fprintf (stderr, " (S/390)");
47 #endif
48
49
50 /* Macro to define tables used to set the flags. This is a list in braces
51 of pairs in braces, each pair being { "NAME", VALUE }
52 where VALUE is the bits to set or minus the bits to clear.
53 An empty string NAME is used to identify the default VALUE. */
54
55 #define TARGET_SWITCHES \
56 { { "hard-float", 1, N_("Use hardware fp")}, \
57 { "soft-float", -1, N_("Don't use hardware fp")}, \
58 { "backchain", 2, N_("Set backchain")}, \
59 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
60 { "small-exec", 4, N_("Use bras for execucable < 64k")}, \
61 { "no-small-exec",-4, N_("Don't use bras")}, \
62 { "debug", 8, N_("Additional debug prints")}, \
63 { "no-debug", -8, N_("Don't print additional debug prints")}, \
64 { "64", 16, N_("64 bit mode")}, \
65 { "31", -16, N_("31 bit mode")}, \
66 { "mvcle", 32, N_("mvcle use")}, \
67 { "no-mvcle", -32, N_("mvc&ex")}, \
68 { "", TARGET_DEFAULT, 0 } }
69
70 /* Define this to change the optimizations performed by default. */
71 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
72
73 /* Sometimes certain combinations of command options do not make sense
74 on a particular target machine. You can define a macro
75 `OVERRIDE_OPTIONS' to take account of this. This macro, if
76 defined, is executed once just after all the command options have
77 been parsed. */
78 #define OVERRIDE_OPTIONS override_options ()
79
80
81 /* Defines for real.c. */
82 #define IEEE_FLOAT 1
83 #define TARGET_IBM_FLOAT 0
84 #define TARGET_IEEE_FLOAT 1
85
86 /* The current function count for create unique internal labels. */
87
88 extern int s390_function_count;
89
90 /* The amount of space used for outgoing arguments. */
91
92 extern int current_function_outgoing_args_size;
93
94 /* Target machine storage layout. */
95
96 /* Define this if most significant bit is lowest numbered in instructions
97 that operate on numbered bit-fields. */
98
99 #define BITS_BIG_ENDIAN 1
100
101 /* Define this if most significant byte of a word is the lowest numbered. */
102
103 #define BYTES_BIG_ENDIAN 1
104
105 /* Define this if MS word of a multiword is the lowest numbered. */
106
107 #define WORDS_BIG_ENDIAN 1
108
109 #define MAX_BITS_PER_WORD 64
110
111 /* Width of a word, in units (bytes). */
112
113 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
114 #define MIN_UNITS_PER_WORD 4
115
116 /* A C expression for the size in bits of the type `short' on the
117 target machine. If you don't define this, the default is half a
118 word. (If this would be less than one storage unit, it is
119 rounded up to one unit.) */
120 #define SHORT_TYPE_SIZE 16
121
122 /* A C expression for the size in bits of the type `int' on the
123 target machine. If you don't define this, the default is one
124 word. */
125 #define INT_TYPE_SIZE 32
126
127 /* A C expression for the size in bits of the type `long' on the
128 target machine. If you don't define this, the default is one
129 word. */
130 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
131 #define MAX_LONG_TYPE_SIZE 64
132
133 /* A C expression for the size in bits of the type `long long' on the
134 target machine. If you don't define this, the default is two
135 words. */
136 #define LONG_LONG_TYPE_SIZE 64
137
138 /* Right now we only support two floating point formats, the
139 32 and 64 bit ieee formats. */
140
141 #define FLOAT_TYPE_SIZE 32
142 #define DOUBLE_TYPE_SIZE 64
143 #define LONG_DOUBLE_TYPE_SIZE 64
144
145 /* Define this macro if it is advisable to hold scalars in registers
146 in a wider mode than that declared by the program. In such cases,
147 the value is constrained to be within the bounds of the declared
148 type, but kept valid in the wider mode. The signedness of the
149 extension may differ from that of the type. */
150
151 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
152 if (INTEGRAL_MODE_P (MODE) && \
153 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
154 (MODE) = Pmode; \
155 }
156
157 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
158 extensions applied to char/short functions arguments. Defining
159 PROMOTE_FUNCTION_RETURN does the same for function returns. */
160
161 #define PROMOTE_FUNCTION_ARGS
162 #define PROMOTE_FUNCTION_RETURN
163 #define PROMOTE_FOR_CALL_ONLY
164
165 /* Allocation boundary (in *bits*) for storing pointers in memory. */
166
167 #define POINTER_BOUNDARY 32
168
169 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
170
171 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
172
173 /* Boundary (in *bits*) on which stack pointer should be aligned. */
174
175 #define STACK_BOUNDARY 64
176
177 /* Allocation boundary (in *bits*) for the code of a function. */
178
179 #define FUNCTION_BOUNDARY 32
180
181 /* There is no point aligning anything to a rounder boundary than this. */
182
183 #define BIGGEST_ALIGNMENT 64
184
185 /* Alignment of field after `int : 0' in a structure. */
186
187 #define EMPTY_FIELD_BOUNDARY 32
188
189 /* Alignment on even addresses for LARL instruction. */
190
191 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
192
193 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
194
195 /* Define this if move instructions will actually fail to work when given
196 unaligned data. */
197
198 #define STRICT_ALIGNMENT 0
199
200 /* Define target floating point format. */
201
202 #undef TARGET_FLOAT_FORMAT
203 #ifdef IEEE_FLOAT
204 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
205 #else
206 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
207 #endif
208
209 /* Define if special allocation order desired. */
210
211 #define REG_ALLOC_ORDER \
212 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
213 16, 17, 18, 19, 20, 21, 22, 23, \
214 24, 25, 26, 27, 28, 29, 30, 31, \
215 15, 32, 33, 34 }
216
217 /* Standard register usage. */
218
219 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
220 #ifdef IEEE_FLOAT
221 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
222 #else
223 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
224 #endif
225 #define CC_REGNO_P(N) ( (N) == 33 )
226
227 /* Number of actual hardware registers. The hardware registers are
228 assigned numbers for the compiler from 0 to just below
229 FIRST_PSEUDO_REGISTER.
230 All registers that the compiler knows about must be given numbers,
231 even those that are not normally considered general registers.
232 For the 390, we give the data registers numbers 0-15,
233 and the floating point registers numbers 16-19.
234 G5 and following have 16 IEEE floating point register,
235 which get numbers 16-31. */
236
237 #define FIRST_PSEUDO_REGISTER 35
238
239 /* Number of hardware registers that go into the DWARF-2 unwind info.
240 If not defined, equals FIRST_PSEUDO_REGISTER. */
241
242 #define DWARF_FRAME_REGISTERS 34
243
244 /* The following register have a fix usage
245 GPR 12: GOT register points to the GOT, setup in prologue,
246 GOT contains pointer to variables in shared libraries
247 GPR 13: Base register setup in prologue to point to the
248 literal table of each function
249 GPR 14: Return registers holds the return address
250 GPR 15: Stack pointer */
251
252 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
253 #define BASE_REGISTER 13
254 #define RETURN_REGNUM 14
255 #define STACK_POINTER_REGNUM 15
256
257 #define FIXED_REGISTERS \
258 { 0, 0, 0, 0, \
259 0, 0, 0, 0, \
260 0, 0, 0, 0, \
261 0, 1, 1, 1, \
262 0, 0, 0, 0, \
263 0, 0, 0, 0, \
264 0, 0, 0, 0, \
265 0, 0, 0, 0, \
266 1, 1, 1 }
267
268 /* 1 for registers not available across function calls. These must include
269 the FIXED_REGISTERS and also any registers that can be used without being
270 saved.
271 The latter must include the registers where values are returned
272 and the register where structure-value addresses are passed. */
273
274 #define CALL_USED_REGISTERS \
275 { 1, 1, 1, 1, \
276 1, 1, 0, 0, \
277 0, 0, 0, 0, \
278 0, 1, 1, 1, \
279 1, 1, 1, 1, \
280 1, 1, 1, 1, \
281 1, 1, 1, 1, \
282 1, 1, 1, 1, \
283 1, 1, 1 }
284
285 /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
286 the entire set of `FIXED_REGISTERS' be included.
287 (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */
288
289 #define CALL_REALLY_USED_REGISTERS \
290 { 1, 1, 1, 1, \
291 1, 1, 0, 0, \
292 0, 0, 0, 0, \
293 0, 0, 0, 0, \
294 1, 1, 1, 1, \
295 1, 1, 1, 1, \
296 1, 1, 1, 1, \
297 1, 1, 1, 1, \
298 1, 1, 1 }
299
300 /* Macro to conditionally modify fixed_regs/call_used_regs. */
301
302 #define CONDITIONAL_REGISTER_USAGE \
303 do \
304 { \
305 int i; \
306 \
307 if (flag_pic) \
308 { \
309 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
310 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
311 } \
312 if (TARGET_64BIT) \
313 { \
314 for (i = 24; i < 32; i++) \
315 call_used_regs[i] = call_really_used_regs[i] = 0; \
316 } \
317 else \
318 { \
319 for (i = 18; i < 20; i++) \
320 call_used_regs[i] = call_really_used_regs[i] = 0; \
321 } \
322 } while (0)
323
324 /* The following register have a special usage
325 GPR 11: Frame pointer if needed to point to automatic variables.
326 GPR 32: In functions with more the 5 args this register
327 points to that arguments, it is always eliminated
328 with stack- or frame-pointer.
329 GPR 33: Condition code 'register' */
330
331 #define HARD_FRAME_POINTER_REGNUM 11
332 #define FRAME_POINTER_REGNUM 34
333
334 #define ARG_POINTER_REGNUM 32
335
336 #define CC_REGNUM 33
337
338 /* We use the register %r0 to pass the static chain to a nested function.
339
340 Note: It is assumed that this register is call-clobbered!
341 We can't use any of the function-argument registers either,
342 and register 1 is needed by the trampoline code, so we have
343 no other choice but using this one ... */
344
345 #define STATIC_CHAIN_REGNUM 0
346
347 /* Return number of consecutive hard regs needed starting at reg REGNO
348 to hold something of mode MODE.
349 This is ordinarily the length in words of a value of mode MODE
350 but can be less for certain modes in special long registers. */
351
352 #define HARD_REGNO_NREGS(REGNO, MODE) \
353 (FLOAT_REGNO_P(REGNO)? \
354 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
355 INT_REGNO_P(REGNO)? \
356 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
357 1)
358
359 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
360 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
361 Even gprs can hold DI.
362 The floating point registers can hold DF, SF, DC and SC. */
363
364 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
365 (FLOAT_REGNO_P(REGNO)? \
366 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
367 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT || \
368 (MODE) == SImode || (MODE) == DImode) : \
369 INT_REGNO_P(REGNO)? \
370 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
371 CC_REGNO_P(REGNO)? \
372 GET_MODE_CLASS (MODE) == MODE_CC : \
373 0)
374
375 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
376 mode MODE1 and one has mode MODE2.
377 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
378 for any hard reg, then this must be 0 for correct output. */
379
380 #define MODES_TIEABLE_P(MODE1, MODE2) \
381 (((MODE1) == SFmode || (MODE1) == DFmode) \
382 == ((MODE2) == SFmode || (MODE2) == DFmode))
383
384 /* If defined, gives a class of registers that cannot be used as the
385 operand of a SUBREG that changes the mode of the object illegally. */
386
387 #define CLASS_CANNOT_CHANGE_MODE FP_REGS
388
389 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
390
391 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
392 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
393
394 /* This is an array of structures. Each structure initializes one pair
395 of eliminable registers. The "from" register number is given first,
396 followed by "to". Eliminations of the same "from" register are listed
397 in order of preference. */
398
399 #define ELIMINABLE_REGS \
400 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
401 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
402 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
403 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
404
405 #define CAN_ELIMINATE(FROM, TO) (1)
406
407 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
408 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
409 { (OFFSET) = 0; } \
410 else if ((FROM) == FRAME_POINTER_REGNUM \
411 && (TO) == HARD_FRAME_POINTER_REGNUM) \
412 { (OFFSET) = 0; } \
413 else if ((FROM) == ARG_POINTER_REGNUM \
414 && (TO) == HARD_FRAME_POINTER_REGNUM) \
415 { (OFFSET) = s390_arg_frame_offset (); } \
416 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
417 { (OFFSET) = s390_arg_frame_offset (); } \
418 else \
419 abort(); \
420 }
421
422 #define CAN_DEBUG_WITHOUT_FP
423
424 /* Value should be nonzero if functions must have frame pointers.
425 Zero means the frame pointer need not be set up (and parms may be
426 accessed via the stack pointer) in functions that seem suitable.
427 This is computed in `reload', in reload1.c. */
428
429 #define FRAME_POINTER_REQUIRED 0
430
431 /* Define the classes of registers for register constraints in the
432 machine description. Also define ranges of constants.
433
434 One of the classes must always be named ALL_REGS and include all hard regs.
435 If there is more than one class, another class must be named NO_REGS
436 and contain no registers.
437
438 The name GENERAL_REGS must be the name of a class (or an alias for
439 another name such as ALL_REGS). This is the class of registers
440 that is allowed by "g" or "r" in a register constraint.
441 Also, registers outside this class are allocated only when
442 instructions express preferences for them.
443
444 The classes must be numbered in nondecreasing order; that is,
445 a larger-numbered class must never be contained completely
446 in a smaller-numbered class.
447
448 For any two classes, it is very desirable that there be another
449 class that represents their union. */
450
451 /*#define SMALL_REGISTER_CLASSES 1*/
452
453 enum reg_class
454 {
455 NO_REGS, ADDR_REGS, GENERAL_REGS,
456 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
457 ALL_REGS, LIM_REG_CLASSES
458 };
459
460 #define N_REG_CLASSES (int) LIM_REG_CLASSES
461
462 /* Give names of register classes as strings for dump file. */
463
464 #define REG_CLASS_NAMES \
465 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS", \
466 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
467
468 /* Define which registers fit in which classes. This is an initializer for
469 a vector of HARD_REG_SET of length N_REG_CLASSES.
470 G5 and latter have 16 register and support IEEE floating point operations. */
471
472 #define REG_CLASS_CONTENTS \
473 { \
474 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
475 { 0x0000fffe, 0x00000005 }, /* ADDR_REGS */ \
476 { 0x0000ffff, 0x00000005 }, /* GENERAL_REGS */ \
477 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
478 { 0xfffffffe, 0x00000005 }, /* ADDR_FP_REGS */ \
479 { 0xffffffff, 0x00000005 }, /* GENERAL_FP_REGS */ \
480 { 0xffffffff, 0x00000007 }, /* ALL_REGS */ \
481 }
482
483
484 /* The same information, inverted:
485 Return the class number of the smallest class containing
486 reg number REGNO. This could be a conditional expression
487 or could index an array. */
488
489 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
490
491 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
492
493 /* The class value for index registers, and the one for base regs. */
494
495 #define INDEX_REG_CLASS ADDR_REGS
496 #define BASE_REG_CLASS ADDR_REGS
497
498 /* Get reg_class from a letter such as appears in the machine description. */
499
500 #define REG_CLASS_FROM_LETTER(C) \
501 ((C) == 'a' ? ADDR_REGS : \
502 (C) == 'd' ? GENERAL_REGS : \
503 (C) == 'f' ? FP_REGS : NO_REGS)
504
505 /* The letters I, J, K, L and M in a register constraint string can be used
506 to stand for particular ranges of immediate operands.
507 This macro defines what the ranges are.
508 C is the letter, and VALUE is a constant value.
509 Return 1 if VALUE is in the range specified by C. */
510
511 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
512 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
513 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
514 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
515 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
516
517 /* Similar, but for floating constants, and defining letters G and H.
518 Here VALUE is the CONST_DOUBLE rtx itself. */
519
520 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
521
522 /* 'Q' means a memory-reference for a S-type operand. */
523
524 #define EXTRA_CONSTRAINT(OP, C) \
525 ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \
526 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
527
528 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
529 return the class of reg to actually use. In general this is just CLASS;
530 but on some machines in some cases it is preferable to use a more
531 restrictive class. */
532
533 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
534 s390_preferred_reload_class ((X), (CLASS))
535
536 /* Return the maximum number of consecutive registers needed to represent
537 mode MODE in a register of class CLASS. */
538
539 #define CLASS_MAX_NREGS(CLASS, MODE) \
540 ((CLASS) == FP_REGS ? \
541 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
542 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
543
544 /* We need a secondary reload when loading a PLUS which is
545 not a valid operand for LOAD ADDRESS. */
546
547 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
548 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
549
550 /* If we are copying between FP registers and anything else, we need a memory
551 location. */
552
553 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
554 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
555
556 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
557 because the movsi and movsf patterns don't handle r/f moves. */
558
559 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
560 (GET_MODE_BITSIZE (MODE) < 32 \
561 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
562 : MODE)
563
564
565 /* A C expression whose value is nonzero if pseudos that have been
566 assigned to registers of class CLASS would likely be spilled
567 because registers of CLASS are needed for spill registers.
568
569 The default value of this macro returns 1 if CLASS has exactly one
570 register and zero otherwise. On most machines, this default
571 should be used. Only define this macro to some other expression
572 if pseudo allocated by `local-alloc.c' end up in memory because
573 their hard registers were needed for spill registers. If this
574 macro returns nonzero for those classes, those pseudos will only
575 be allocated by `global.c', which knows how to reallocate the
576 pseudo to another register. If there would not be another
577 register available for reallocation, you should not change the
578 definition of this macro since the only effect of such a
579 definition would be to slow down register allocation. */
580
581 /* Stack layout; function entry, exit and calling. */
582
583 /* The return address of the current frame is retrieved
584 from the initial value of register RETURN_REGNUM.
585 For frames farther back, we use the stack slot where
586 the corresponding RETURN_REGNUM register was saved. */
587
588 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
589 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
590 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
591
592 #define RETURN_ADDR_RTX(COUNT, FRAME) \
593 ((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, RETURN_REGNUM) : \
594 gen_rtx_MEM (Pmode, \
595 memory_address (Pmode, \
596 plus_constant (DYNAMIC_CHAIN_ADDRESS ((FRAME)), \
597 RETURN_REGNUM * UNITS_PER_WORD))))
598
599 /* The following macros will turn on dwarf2 exception hndling
600 Other code location for this exception handling are
601 in s390.md (eh_return insn) and in linux.c in the prologue. */
602
603 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
604
605 /* We have 31 bit mode. */
606
607 #define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff))
608
609 /* The offset from the incoming value of %sp to the top of the stack frame
610 for the current function. */
611
612 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
613
614 /* Location, from where return address to load. */
615
616 #define DWARF_FRAME_RETURN_COLUMN 14
617
618 /* Describe how we implement __builtin_eh_return. */
619 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
620 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
621 #define EH_RETURN_HANDLER_RTX \
622 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
623 TARGET_64BIT? -48 : -40))
624
625 /* Define this if pushing a word on the stack makes the stack pointer a
626 smaller address. */
627
628 #define STACK_GROWS_DOWNWARD
629
630 /* Define this if the nominal address of the stack frame is at the
631 high-address end of the local variables; that is, each additional local
632 variable allocated goes at a more negative offset in the frame. */
633
634 /* #define FRAME_GROWS_DOWNWARD */
635
636 /* Offset from stack-pointer to first location of outgoing args. */
637
638 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
639
640 /* Offset within stack frame to start allocating local variables at.
641 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
642 first local allocated. Otherwise, it is the offset to the BEGINNING
643 of the first local allocated. */
644
645 #define STARTING_FRAME_OFFSET \
646 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
647
648 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
649
650 /* If we generate an insn to push BYTES bytes, this says how many the stack
651 pointer really advances by. On S/390, we have no push instruction. */
652
653 /* #define PUSH_ROUNDING(BYTES) */
654
655 /* Accumulate the outgoing argument count so we can request the right
656 DSA size and determine stack offset. */
657
658 #define ACCUMULATE_OUTGOING_ARGS 1
659
660 /* Offset from the stack pointer register to an item dynamically
661 allocated on the stack, e.g., by `alloca'.
662
663 The default value for this macro is `STACK_POINTER_OFFSET' plus the
664 length of the outgoing arguments. The default is correct for most
665 machines. See `function.c' for details. */
666 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
667
668 /* Offset of first parameter from the argument pointer register value.
669 On the S/390, we define the argument pointer to the start of the fixed
670 area. */
671 #define FIRST_PARM_OFFSET(FNDECL) 0
672
673 /* Define this if stack space is still allocated for a parameter passed
674 in a register. The value is the number of bytes allocated to this
675 area. */
676 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
677
678 /* Define this if the above stack space is to be considered part of the
679 space allocated by the caller. */
680 /* #define OUTGOING_REG_PARM_STACK_SPACE */
681
682 /* 1 if N is a possible register number for function argument passing.
683 On S390, general registers 2 - 6 and floating point register 0 and 2
684 are used in this way. */
685
686 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
687 (N) == 16 || (N) == 17)
688
689 /* Define a data type for recording info about an argument list during
690 the scan of that argument list. This data type should hold all
691 necessary information about the function itself and about the args
692 processed so far, enough to enable macros such as FUNCTION_ARG to
693 determine where the next arg should go. */
694
695 typedef struct s390_arg_structure
696 {
697 int gprs; /* gpr so far */
698 int fprs; /* fpr so far */
699 }
700 CUMULATIVE_ARGS;
701
702
703 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
704 a function whose data type is FNTYPE.
705 For a library call, FNTYPE is 0. */
706
707 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
708 ((CUM).gprs=0, (CUM).fprs=0)
709
710 /* Update the data in CUM to advance over an argument of mode MODE and
711 data type TYPE. (TYPE is null for libcalls where that information
712 may not be available.) */
713
714 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
715 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
716
717 /* Define where to put the arguments to a function. Value is zero to push
718 the argument on the stack, or a hard register in which to store the
719 argument. */
720
721 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
722 s390_function_arg (&CUM, MODE, TYPE, NAMED)
723
724 /* Define where to expect the arguments of a function. Value is zero, if
725 the argument is on the stack, or a hard register in which the argument
726 is stored. It is the same like FUNCTION_ARG, except for unnamed args
727 That means, that all in case of varargs used, the arguments are expected
728 from the stack.
729 S/390 has already space on the stack for args coming in registers,
730 they are pushed in prologue, if needed. */
731
732
733 /* Define the `__builtin_va_list' type. */
734
735 #define BUILD_VA_LIST_TYPE(VALIST) \
736 (VALIST) = s390_build_va_list ()
737
738 /* Implement `va_start' for varargs and stdarg. */
739
740 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
741 s390_va_start (stdarg, valist, nextarg)
742
743 /* Implement `va_arg'. */
744
745 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
746 s390_va_arg (valist, type)
747
748 /* For an arg passed partly in registers and partly in memory, this is the
749 number of registers used. For args passed entirely in registers or
750 entirely in memory, zero. */
751
752 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
753
754
755 /* Define if returning from a function call automatically pops the
756 arguments described by the number-of-args field in the call. */
757
758 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
759
760
761 /* Define how to find the value returned by a function. VALTYPE is the
762 data type of the value (as a tree).
763 If the precise function being called is known, FUNC is its FUNCTION_DECL;
764 otherwise, FUNC is 15. */
765
766 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
767 || TARGET_SOFT_FLOAT ) ? 2 : 16)
768
769
770 /* for structs the address is passed, and the Callee makes a
771 copy, only if needed */
772
773 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
774 s390_function_arg_pass_by_reference (MODE, TYPE)
775
776
777 /* Register 2 (and 3) for integral values
778 or floating point register 0 (and 2) for fp values are used. */
779
780 #define FUNCTION_VALUE(VALTYPE, FUNC) \
781 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
782 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
783 || POINTER_TYPE_P (VALTYPE) \
784 ? word_mode : TYPE_MODE (VALTYPE), \
785 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
786
787 /* Define how to find the value returned by a library function assuming
788 the value has mode MODE. */
789
790 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
791
792 /* 1 if N is a possible register number for a function value. */
793
794 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
795
796 /* The definition of this macro implies that there are cases where
797 a scalar value cannot be returned in registers. */
798
799 #define RETURN_IN_MEMORY(type) \
800 (TYPE_MODE (type) == BLKmode || \
801 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
802 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
803
804 /* Mode of stack savearea.
805 FUNCTION is VOIDmode because calling convention maintains SP.
806 BLOCK needs Pmode for SP.
807 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
808
809 #define STACK_SAVEAREA_MODE(LEVEL) \
810 (LEVEL == SAVE_FUNCTION ? VOIDmode \
811 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
812
813 /* Structure value address is passed as invisible first argument (gpr 2). */
814
815 #define STRUCT_VALUE 0
816
817 /* This macro definition sets up a default value for `main' to return. */
818
819 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
820
821 /* Length in units of the trampoline for entering a nested function. */
822
823 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
824
825 /* Initialize the dynamic part of trampoline. */
826
827 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
828 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
829
830 /* Template for constant part of trampoline. */
831
832 #define TRAMPOLINE_TEMPLATE(FILE) \
833 s390_trampoline_template (FILE)
834
835 /* Output assembler code to FILE to increment profiler label # LABELNO
836 for profiling a function entry. */
837
838 #define FUNCTION_PROFILER(FILE, LABELNO) \
839 s390_function_profiler ((FILE), ((LABELNO)))
840
841 #define PROFILE_BEFORE_PROLOGUE 1
842
843 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
844 pointer does not matter (provided there is a frame pointer). */
845
846 #define EXIT_IGNORE_STACK 1
847
848 /* Addressing modes, and classification of registers for them. */
849
850 /* #define HAVE_POST_INCREMENT */
851 /* #define HAVE_POST_DECREMENT */
852
853 /* #define HAVE_PRE_DECREMENT */
854 /* #define HAVE_PRE_INCREMENT */
855
856 /* These assume that REGNO is a hard or pseudo reg number. They give
857 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
858 reg currently allocated to a suitable hard reg.
859 These definitions are NOT overridden anywhere. */
860
861 #define REGNO_OK_FOR_INDEX_P(REGNO) \
862 (((REGNO) < FIRST_PSEUDO_REGISTER \
863 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
864 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
865
866 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
867
868 #define REGNO_OK_FOR_DATA_P(REGNO) \
869 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
870
871 #define REGNO_OK_FOR_FP_P(REGNO) \
872 FLOAT_REGNO_P (REGNO)
873
874 /* Now macros that check whether X is a register and also,
875 strictly, whether it is in a specified class. */
876
877 /* 1 if X is a data register. */
878
879 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
880
881 /* 1 if X is an fp register. */
882
883 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
884
885 /* 1 if X is an address register. */
886
887 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
888
889 /* Maximum number of registers that can appear in a valid memory address. */
890
891 #define MAX_REGS_PER_ADDRESS 2
892
893 /* Recognize any constant value that is a valid address. */
894
895 #define CONSTANT_ADDRESS_P(X) 0
896
897 #define SYMBOLIC_CONST(X) \
898 (GET_CODE (X) == SYMBOL_REF \
899 || GET_CODE (X) == LABEL_REF \
900 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
901
902 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
903 they have to be forced to constant pool
904 CONST_INT have to be forced into constant pool, if greater than
905 64k. Depending on the insn they have to be force into constant pool
906 for smaller value; in this case we have to work with nonimmediate operand. */
907
908 #define LEGITIMATE_PIC_OPERAND_P(X) \
909 legitimate_pic_operand_p (X)
910
911 /* Nonzero if the constant value X is a legitimate general operand.
912 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
913
914 #define LEGITIMATE_CONSTANT_P(X) \
915 legitimate_constant_p (X)
916
917 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
918 its validity for a certain class. We have two alternate definitions
919 for each of them. The usual definition accepts all pseudo regs; the
920 other rejects them all. The symbol REG_OK_STRICT causes the latter
921 definition to be used.
922
923 Most source files want to accept pseudo regs in the hope that they will
924 get allocated to the class that the insn wants them to be in.
925 Some source files that are used after register allocation
926 need to be strict. */
927
928 /*
929 * Nonzero if X is a hard reg that can be used as an index or if it is
930 * a pseudo reg.
931 */
932
933 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
934 ((GET_MODE (X) == Pmode) && \
935 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
936 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
937
938 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
939 a pseudo reg. */
940
941 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
942
943 /* Nonzero if X is a hard reg that can be used as an index. */
944
945 #define REG_OK_FOR_INDEX_STRICT_P(X) \
946 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
947
948 /* Nonzero if X is a hard reg that can be used as a base reg. */
949
950 #define REG_OK_FOR_BASE_STRICT_P(X) \
951 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
952
953
954 #ifndef REG_OK_STRICT
955 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
956 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
957 #else
958 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
959 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
960 #endif
961
962
963 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
964 valid memory address for an instruction.
965 The MODE argument is the machine mode for the MEM expression
966 that wants to use this address.
967
968 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
969 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
970
971 #ifdef REG_OK_STRICT
972 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
973 { \
974 if (legitimate_address_p (MODE, X, 1)) \
975 goto ADDR; \
976 }
977 #else
978 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
979 { \
980 if (legitimate_address_p (MODE, X, 0)) \
981 goto ADDR; \
982 }
983 #endif
984
985
986 /* S/390 has no mode dependent addresses. */
987
988 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
989
990 /* Try machine-dependent ways of modifying an illegitimate address
991 to be legitimate. If we find one, return the new, valid address.
992 This macro is used in only one place: `memory_address' in explow.c. */
993
994 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
995 { \
996 (X) = legitimize_address (X, OLDX, MODE); \
997 if (memory_address_p (MODE, X)) \
998 goto WIN; \
999 }
1000
1001 /* Specify the machine mode that this machine uses for the index in the
1002 tablejump instruction. */
1003
1004 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1005
1006 /* Define this if the tablejump instruction expects the table to contain
1007 offsets from the address of the table.
1008 Do not define this if the table should contain absolute addresses. */
1009
1010 /* #define CASE_VECTOR_PC_RELATIVE */
1011
1012 /* Load from integral MODE < SI from memory into register makes sign_extend
1013 or zero_extend
1014 In our case sign_extension happens for Halfwords, other no extension. */
1015
1016 #define LOAD_EXTEND_OP(MODE) \
1017 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1018 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1019 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1020
1021 /* Define this if fixuns_trunc is the same as fix_trunc. */
1022
1023 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1024
1025 /* We use "unsigned char" as default. */
1026
1027 #define DEFAULT_SIGNED_CHAR 0
1028
1029 /* Max number of bytes we can move from memory to memory in one reasonably
1030 fast instruction. */
1031
1032 #define MOVE_MAX 256
1033
1034 /* Nonzero if access to memory by bytes is slow and undesirable. */
1035
1036 #define SLOW_BYTE_ACCESS 1
1037
1038 /* Define if shifts truncate the shift count which implies one can omit
1039 a sign-extension or zero-extension of a shift count. */
1040
1041 /* #define SHIFT_COUNT_TRUNCATED */
1042
1043 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1044 is done just by pretending it is already truncated. */
1045
1046 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1047
1048 /* We assume that the store-condition-codes instructions store 0 for false
1049 and some other value for true. This is the value stored for true. */
1050
1051 /* #define STORE_FLAG_VALUE -1 */
1052
1053 /* Don't perform CSE on function addresses. */
1054
1055 #define NO_FUNCTION_CSE
1056
1057 /* Specify the machine mode that pointers have.
1058 After generation of rtl, the compiler makes no further distinction
1059 between pointers and any other objects of this machine mode. */
1060
1061 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1062
1063 /* A function address in a call instruction is a byte address (for
1064 indexing purposes) so give the MEM rtx a byte's mode. */
1065
1066 #define FUNCTION_MODE QImode
1067
1068
1069 /* A part of a C `switch' statement that describes the relative costs
1070 of constant RTL expressions. It must contain `case' labels for
1071 expression codes `const_int', `const', `symbol_ref', `label_ref'
1072 and `const_double'. Each case must ultimately reach a `return'
1073 statement to return the relative cost of the use of that kind of
1074 constant value in an expression. The cost may depend on the
1075 precise value of the constant, which is available for examination
1076 in X, and the rtx code of the expression in which it is contained,
1077 found in OUTER_CODE.
1078
1079 CODE is the expression code--redundant, since it can be obtained
1080 with `GET_CODE (X)'. */
1081 /* Force_const_mem does not work out of reload, because the saveable_obstack
1082 is set to reload_obstack, which does not live long enough.
1083 Because of this we cannot use force_const_mem in addsi3.
1084 This leads to problems with gen_add2_insn with a constant greater
1085 than a short. Because of that we give an addition of greater
1086 constants a cost of 3 (reload1.c 10096). */
1087
1088
1089 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1090 case CONST: \
1091 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1092 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1093 return 1000; \
1094 case CONST_INT: \
1095 if ((OUTER_CODE == PLUS) && \
1096 ((INTVAL (RTX) > 32767) || \
1097 (INTVAL (RTX) < -32768))) \
1098 return COSTS_N_INSNS (3); \
1099 case LABEL_REF: \
1100 case SYMBOL_REF: \
1101 case CONST_DOUBLE: \
1102 return 0; \
1103
1104
1105 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1106 This can be used, for example, to indicate how costly a multiply
1107 instruction is. In writing this macro, you can use the construct
1108 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1109 instructions. OUTER_CODE is the code of the expression in which X
1110 is contained.
1111
1112 This macro is optional; do not define it if the default cost
1113 assumptions are adequate for the target machine. */
1114
1115 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1116 case ASHIFT: \
1117 case ASHIFTRT: \
1118 case LSHIFTRT: \
1119 case PLUS: \
1120 case AND: \
1121 case IOR: \
1122 case XOR: \
1123 case MINUS: \
1124 case NEG: \
1125 case NOT: \
1126 return 1; \
1127 case MULT: \
1128 if (GET_MODE (XEXP (X, 0)) == DImode) \
1129 return 40; \
1130 else \
1131 return 7; \
1132 case DIV: \
1133 case UDIV: \
1134 case MOD: \
1135 case UMOD: \
1136 return 33;
1137
1138
1139 /* An expression giving the cost of an addressing mode that contains
1140 ADDRESS. If not defined, the cost is computed from the ADDRESS
1141 expression and the `CONST_COSTS' values.
1142
1143 For most CISC machines, the default cost is a good approximation
1144 of the true cost of the addressing mode. However, on RISC
1145 machines, all instructions normally have the same length and
1146 execution time. Hence all addresses will have equal costs.
1147
1148 In cases where more than one form of an address is known, the form
1149 with the lowest cost will be used. If multiple forms have the
1150 same, lowest, cost, the one that is the most complex will be used.
1151
1152 For example, suppose an address that is equal to the sum of a
1153 register and a constant is used twice in the same basic block.
1154 When this macro is not defined, the address will be computed in a
1155 register and memory references will be indirect through that
1156 register. On machines where the cost of the addressing mode
1157 containing the sum is no higher than that of a simple indirect
1158 reference, this will produce an additional instruction and
1159 possibly require an additional register. Proper specification of
1160 this macro eliminates this overhead for such machines.
1161
1162 Similar use of this macro is made in strength reduction of loops.
1163
1164 ADDRESS need not be valid as an address. In such a case, the cost
1165 is not relevant and can be any value; invalid addresses need not be
1166 assigned a different cost.
1167
1168 On machines where an address involving more than one register is as
1169 cheap as an address computation involving only one register,
1170 defining `ADDRESS_COST' to reflect this can cause two registers to
1171 be live over a region of code where only one would have been if
1172 `ADDRESS_COST' were not defined in that manner. This effect should
1173 be considered in the definition of this macro. Equivalent costs
1174 should probably only be given to addresses with different numbers
1175 of registers on machines with lots of registers.
1176
1177 This macro will normally either not be defined or be defined as a
1178 constant.
1179
1180 On s390 symbols are expensive if compiled with fpic
1181 lifetimes. */
1182
1183 #define ADDRESS_COST(RTX) \
1184 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1185
1186 /* On s390, copy between fprs and gprs is expensive. */
1187
1188 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1189 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
1190 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
1191 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
1192 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
1193
1194
1195 /* A C expression for the cost of moving data of mode M between a
1196 register and memory. A value of 2 is the default; this cost is
1197 relative to those in `REGISTER_MOVE_COST'.
1198
1199 If moving between registers and memory is more expensive than
1200 between two registers, you should define this macro to express the
1201 relative cost. */
1202
1203 #define MEMORY_MOVE_COST(M, C, I) 1
1204
1205 /* A C expression for the cost of a branch instruction. A value of 1
1206 is the default; other values are interpreted relative to that. */
1207
1208 #define BRANCH_COST 1
1209
1210 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1211 return the mode to be used for the comparison. */
1212
1213 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1214
1215
1216 /* Define the information needed to generate branch and scc insns. This is
1217 stored from the compare operation. Note that we can't use "rtx" here
1218 since it hasn't been defined! */
1219
1220 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1221
1222
1223 /* How to refer to registers in assembler output. This sequence is
1224 indexed by compiler's hard-register-number (see above). */
1225
1226 #define REGISTER_NAMES \
1227 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1228 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1229 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1230 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1231 "%ap", "%cc", "%fp" \
1232 }
1233
1234 /* implicit call of memcpy, not bcopy */
1235
1236 #define TARGET_MEM_FUNCTIONS
1237
1238 /* Either simplify a location expression, or return the original. */
1239
1240 #define ASM_SIMPLIFY_DWARF_ADDR(X) \
1241 s390_simplify_dwarf_addr (X)
1242
1243 /* Print operand X (an rtx) in assembler syntax to file FILE.
1244 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1245 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1246
1247 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1248
1249 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1250
1251
1252 /* Define the codes that are matched by predicates in aux-output.c. */
1253
1254 #define PREDICATE_CODES \
1255 {"s_operand", { SUBREG, MEM }}, \
1256 {"s_imm_operand", { CONST_INT, CONST_DOUBLE, SUBREG, MEM }}, \
1257 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1258 {"larl_operand", { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }}, \
1259 {"load_multiple_operation", {PARALLEL}}, \
1260 {"store_multiple_operation", {PARALLEL}}, \
1261 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1262 {"s390_plus_operand", { PLUS }},
1263
1264
1265 /* S/390 constant pool breaks the devices in crtstuff.c to control section
1266 in where code resides. We have to write it as asm code. */
1267 #ifndef __s390x__
1268 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
1269 asm (SECTION_OP "\n\
1270 bras\t%r2,1f\n\
1271 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
1272 1: l\t%r3,0(%r2)\n\
1273 bas\t%r14,0(%r3,%r2)\n\
1274 .previous");
1275 #endif
1276
1277 /* Constant Pool for all symbols operands which are changed with
1278 force_const_mem during insn generation (expand_insn). */
1279
1280 extern struct rtx_def *s390_pool_start_insn;
1281 extern int s390_pool_count;
1282 extern int s390_nr_constants;
1283
1284 /* Function is splitted in chunk, if literal pool could overflow
1285 Value need to be lowered, if problems with displacement overflow. */
1286
1287 #define S390_CHUNK_MAX 0xe00
1288 #define S390_CHUNK_OV 0x1000
1289 #define S390_POOL_MAX 0xe00
1290
1291 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1292 { \
1293 register rtx insn; \
1294 struct pool_constant *pool; \
1295 \
1296 if (s390_pool_count == -1) \
1297 { \
1298 s390_nr_constants = 0; \
1299 for (pool = first_pool; pool; pool = pool->next) \
1300 if (pool->mark) s390_nr_constants++; \
1301 return; \
1302 } \
1303 if (first_pool == 0) { \
1304 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1305 return; \
1306 } \
1307 for (pool = first_pool; pool; pool = pool->next) \
1308 pool->mark = 0; \
1309 \
1310 insn = s390_pool_start_insn; \
1311 \
1312 if (insn==NULL_RTX) \
1313 insn = get_insns (); \
1314 else \
1315 insn = NEXT_INSN (insn); \
1316 for (; insn; insn = NEXT_INSN (insn)) { \
1317 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { \
1318 if (s390_stop_dump_lit_p (insn)) { \
1319 mark_constants (PATTERN (insn)); \
1320 break; \
1321 } else \
1322 mark_constants (PATTERN (insn)); \
1323 } \
1324 } \
1325 \
1326 /* Mark entries referenced by other entries */ \
1327 for (pool = first_pool; pool; pool = pool->next) \
1328 if (pool->mark) \
1329 mark_constants (pool->constant); \
1330 \
1331 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1332 }
1333
1334 /* We need to return, because otherwise the pool is deleted of the
1335 constant pool after the first output. */
1336
1337 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1338
1339 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1340 { \
1341 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1342 { \
1343 fprintf (FILE, ".LC%d:\n", LABELNO); \
1344 LABELNO = ~LABELNO; \
1345 } \
1346 if (s390_pool_count > 0) \
1347 { \
1348 fprintf (FILE, ".LC%d_%X:\n", ~LABELNO, s390_pool_count); \
1349 } \
1350 \
1351 /* Output the value of the constant itself. */ \
1352 switch (GET_MODE_CLASS (MODE)) \
1353 { \
1354 case MODE_FLOAT: \
1355 if (GET_CODE (EXP) != CONST_DOUBLE) \
1356 abort (); \
1357 \
1358 REAL_VALUE_FROM_CONST_DOUBLE (r, EXP); \
1359 assemble_real (r, MODE, ALIGN); \
1360 break; \
1361 \
1362 case MODE_INT: \
1363 case MODE_PARTIAL_INT: \
1364 if (flag_pic \
1365 && (GET_CODE (EXP) == CONST \
1366 || GET_CODE (EXP) == SYMBOL_REF \
1367 || GET_CODE (EXP) == LABEL_REF )) \
1368 { \
1369 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \
1370 s390_output_symbolic_const (FILE, EXP); \
1371 fputc ('\n', (FILE)); \
1372 } \
1373 else \
1374 { \
1375 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1376 if (GET_MODE_SIZE (MODE) == 1) \
1377 ASM_OUTPUT_SKIP ((FILE), 1); \
1378 } \
1379 break; \
1380 \
1381 default: \
1382 abort (); \
1383 } \
1384 goto WIN; \
1385 }
1386
1387 #endif