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1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #ifndef _S390_H
23 #define _S390_H
24
25 #define TARGET_VERSION fprintf (stderr, " (S/390)");
26
27 extern int flag_pic;
28
29 /* Run-time compilation parameters selecting different hardware subsets. */
30
31 extern int target_flags;
32
33 /* Target macros checked at runtime of compiler. */
34
35 #define TARGET_HARD_FLOAT (target_flags & 1)
36 #define TARGET_BACKCHAIN (target_flags & 2)
37 #define TARGET_SMALL_EXEC (target_flags & 4)
38 #define TARGET_DEBUG_ARG (target_flags & 8)
39 #define TARGET_64BIT (target_flags & 16)
40 #define TARGET_MVCLE (target_flags & 32)
41
42 #define TARGET_DEFAULT 0x3
43 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
44
45 /* Macro to define tables used to set the flags. This is a list in braces
46 of pairs in braces, each pair being { "NAME", VALUE }
47 where VALUE is the bits to set or minus the bits to clear.
48 An empty string NAME is used to identify the default VALUE. */
49
50 #define TARGET_SWITCHES \
51 { { "hard-float", 1, N_("Use hardware fp")}, \
52 { "soft-float", -1, N_("Don't use hardware fp")}, \
53 { "backchain", 2, N_("Set backchain")}, \
54 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
55 { "small-exec", 4, N_("Use bras for execucable < 64k")}, \
56 { "no-small-exec",-4, N_("Don't use bras")}, \
57 { "debug", 8, N_("Additional debug prints")}, \
58 { "no-debug", -8, N_("Don't print additional debug prints")}, \
59 { "64", 16, N_("64 bit mode")}, \
60 { "31", -16, N_("31 bit mode")}, \
61 { "mvcle", 32, N_("mvcle use")}, \
62 { "no-mvcle", -32, N_("mvc&ex")}, \
63 { "", TARGET_DEFAULT, 0 } }
64
65 /* Define this to change the optimizations performed by default. */
66 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
67
68 /* The current function count for create unique internal labels. */
69
70 extern int s390_function_count;
71
72 /* The amount of space used for outgoing arguments. */
73
74 extern int current_function_outgoing_args_size;
75
76 /* Target machine storage layout. */
77
78 /* Define this if most significant bit is lowest numbered in instructions
79 that operate on numbered bit-fields. */
80
81 #define BITS_BIG_ENDIAN 1
82
83 /* Define this if most significant byte of a word is the lowest numbered. */
84
85 #define BYTES_BIG_ENDIAN 1
86
87 /* Define this if MS word of a multiword is the lowest numbered. */
88
89 #define WORDS_BIG_ENDIAN 1
90
91 /* Number of bits in an addressable storage unit. */
92
93 #define BITS_PER_UNIT 8
94
95 /* Width in bits of a "word", which is the contents of a machine register. */
96
97 #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
98 #define MAX_BITS_PER_WORD 64
99
100 /* Width of a word, in units (bytes). */
101
102 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
103 #define MIN_UNITS_PER_WORD 4
104
105 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
106
107 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
108
109 /* A C expression for the size in bits of the type `short' on the
110 target machine. If you don't define this, the default is half a
111 word. (If this would be less than one storage unit, it is
112 rounded up to one unit.) */
113 #define SHORT_TYPE_SIZE 16
114
115 /* A C expression for the size in bits of the type `int' on the
116 target machine. If you don't define this, the default is one
117 word. */
118 #define INT_TYPE_SIZE 32
119
120 /* A C expression for the size in bits of the type `long' on the
121 target machine. If you don't define this, the default is one
122 word. */
123 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
124 #define MAX_LONG_TYPE_SIZE 64
125
126 /* A C expression for the size in bits of the type `long long' on the
127 target machine. If you don't define this, the default is two
128 words. */
129 #define LONG_LONG_TYPE_SIZE 64
130
131 /* Right now we only support two floating point formats, the
132 32 and 64 bit ieee formats. */
133
134 #define FLOAT_TYPE_SIZE 32
135 #define DOUBLE_TYPE_SIZE 64
136 #define LONG_DOUBLE_TYPE_SIZE 64
137
138 /* Define this macro if it is advisable to hold scalars in registers
139 in a wider mode than that declared by the program. In such cases,
140 the value is constrained to be within the bounds of the declared
141 type, but kept valid in the wider mode. The signedness of the
142 extension may differ from that of the type. */
143
144 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
145 if (INTEGRAL_MODE_P (MODE) && \
146 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
147 (MODE) = Pmode; \
148 }
149
150 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
151 extensions applied to char/short functions arguments. Defining
152 PROMOTE_FUNCTION_RETURN does the same for function returns. */
153
154 #define PROMOTE_FUNCTION_ARGS
155 #define PROMOTE_FUNCTION_RETURN
156 #define PROMOTE_FOR_CALL_ONLY
157
158 /* Allocation boundary (in *bits*) for storing pointers in memory. */
159
160 #define POINTER_BOUNDARY 32
161
162 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
163
164 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
165
166 /* Boundary (in *bits*) on which stack pointer should be aligned. */
167
168 #define STACK_BOUNDARY 64
169
170 /* Allocation boundary (in *bits*) for the code of a function. */
171
172 #define FUNCTION_BOUNDARY 32
173
174 /* There is no point aligning anything to a rounder boundary than this. */
175
176 #define BIGGEST_ALIGNMENT 64
177
178 /* Alignment of field after `int : 0' in a structure. */
179
180 #define EMPTY_FIELD_BOUNDARY 32
181
182 /* Alignment on even adresses for LARL instruction. */
183
184 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
185
186 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
187
188 /* Define this if move instructions will actually fail to work when given
189 unaligned data. */
190
191 #define STRICT_ALIGNMENT 0
192
193 /* real arithmetic */
194
195 #define REAL_ARITHMETIC
196
197 /* Define target floating point format. */
198
199 #undef TARGET_FLOAT_FORMAT
200 #ifdef IEEE_FLOAT
201 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
202 #else
203 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
204 #endif
205
206 /* Define if special allocation order desired. */
207
208 #define REG_ALLOC_ORDER \
209 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
210 16, 17, 18, 19, 20, 21, 22, 23, \
211 24, 25, 26, 27, 28, 29, 30, 31, \
212 15, 32, 33 }
213
214 /* Standard register usage. */
215
216 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
217 #ifdef IEEE_FLOAT
218 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
219 #else
220 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
221 #endif
222 #define CC_REGNO_P(N) ( (N) == 33 )
223
224 /* Number of actual hardware registers. The hardware registers are
225 assigned numbers for the compiler from 0 to just below
226 FIRST_PSEUDO_REGISTER.
227 All registers that the compiler knows about must be given numbers,
228 even those that are not normally considered general registers.
229 For the 390, we give the data registers numbers 0-15,
230 and the floating point registers numbers 16-19.
231 G5 and following have 16 IEEE floating point register,
232 which get numbers 16-31. */
233
234 #define FIRST_PSEUDO_REGISTER 34
235
236 /* The following register have a fix usage
237 GPR 12: GOT register points to the GOT, setup in prologue,
238 GOT contains pointer to variables in shared libraries
239 GPR 13: Base register setup in prologue to point to the
240 literal table of each function
241 GPR 14: Return registers holds the return address
242 GPR 15: Stack pointer */
243
244 #define PIC_OFFSET_TABLE_REGNUM 12
245 #define BASE_REGISTER 13
246 #define RETURN_REGNUM 14
247 #define STACK_POINTER_REGNUM 15
248
249 #define FIXED_REGISTERS \
250 { 0, 0, 0, 0, \
251 0, 0, 0, 0, \
252 0, 0, 0, 0, \
253 0, 1, 1, 1, \
254 0, 0, 0, 0, \
255 0, 0, 0, 0, \
256 0, 0, 0, 0, \
257 0, 0, 0, 0, \
258 1, 1 }
259
260 /* 1 for registers not available across function calls. These must include
261 the FIXED_REGISTERS and also any registers that can be used without being
262 saved.
263 The latter must include the registers where values are returned
264 and the register where structure-value addresses are passed. */
265
266 #define CALL_USED_REGISTERS \
267 { 1, 1, 1, 1, \
268 1, 1, 0, 0, \
269 0, 0, 0, 0, \
270 0, 1, 1, 1, \
271 1, 1, 0, 0, \
272 1, 1, 1, 1, \
273 1, 1, 1, 1, \
274 1, 1, 1, 1, \
275 1, 1 }
276
277 /* If not pic code, gpr 12 can be used. */
278
279 #define CONDITIONAL_REGISTER_USAGE \
280 do \
281 { \
282 if (flag_pic) \
283 { \
284 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
285 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
286 } \
287 } while (0)
288
289 /* The following register have a special usage
290 GPR 11: Frame pointer if needed to point to automatic variables.
291 GPR 32: In functions with more the 5 args this register
292 points to that arguments, it is always eliminated
293 with stack- or frame-pointer.
294 GPR 33: Condition code 'register' */
295
296 #define FRAME_POINTER_REGNUM 11
297
298 #define ARG_POINTER_REGNUM 32
299
300 #define CC_REGNUM 33
301
302 /* We use the register %r0 to pass the static chain to a nested function.
303
304 Note: It is assumed that this register is call-clobbered!
305 We can't use any of the function-argument registers either,
306 and register 1 is needed by the trampoline code, so we have
307 no other choice but using this one ... */
308
309 #define STATIC_CHAIN_REGNUM 0
310
311 /* Return number of consecutive hard regs needed starting at reg REGNO
312 to hold something of mode MODE.
313 This is ordinarily the length in words of a value of mode MODE
314 but can be less for certain modes in special long registers. */
315
316 #define HARD_REGNO_NREGS(REGNO, MODE) \
317 (FLOAT_REGNO_P(REGNO)? \
318 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
319 INT_REGNO_P(REGNO)? \
320 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
321 1)
322
323 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
324 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
325 Even gprs can hold DI.
326 The floating point registers can hold DF, SF, DC and SC. */
327
328 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
329 (FLOAT_REGNO_P(REGNO)? \
330 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
331 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \
332 INT_REGNO_P(REGNO)? \
333 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
334 CC_REGNO_P(REGNO)? \
335 GET_MODE_CLASS (MODE) == MODE_CC : \
336 0)
337
338 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
339 mode MODE1 and one has mode MODE2.
340 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
341 for any hard reg, then this must be 0 for correct output. */
342
343 #define MODES_TIEABLE_P(MODE1, MODE2) \
344 (((MODE1) == SFmode || (MODE1) == DFmode) \
345 == ((MODE2) == SFmode || (MODE2) == DFmode))
346
347
348 /* Define this macro if references to a symbol must be treated
349 differently depending on something about the variable or
350 function named by the symbol (such as what section it is in).
351
352 On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol
353 so that we may access it directly in the GOT. */
354
355 #define ENCODE_SECTION_INFO(DECL) \
356 do \
357 { \
358 if (flag_pic) \
359 { \
360 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
361 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
362 \
363 if (GET_CODE (rtl) == MEM) \
364 { \
365 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
366 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
367 || ! TREE_PUBLIC (DECL)); \
368 } \
369 } \
370 } \
371 while (0)
372
373
374 /* This is an array of structures. Each structure initializes one pair
375 of eliminable registers. The "from" register number is given first,
376 followed by "to". Eliminations of the same "from" register are listed
377 in order of preference. */
378
379 #define ELIMINABLE_REGS \
380 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
381 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
382 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}}
383
384 #define CAN_ELIMINATE(FROM, TO) (1)
385
386 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
387 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
388 { (OFFSET) = 0; } \
389 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
390 { (OFFSET) = s390_arg_frame_offset (); } \
391 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
392 { (OFFSET) = s390_arg_frame_offset (); } \
393 }
394
395 #define CAN_DEBUG_WITHOUT_FP
396
397 /* Value should be nonzero if functions must have frame pointers.
398 Zero means the frame pointer need not be set up (and parms may be
399 accessed via the stack pointer) in functions that seem suitable.
400 This is computed in `reload', in reload1.c. */
401
402 #define FRAME_POINTER_REQUIRED 0
403
404 /* Define the classes of registers for register constraints in the
405 machine description. Also define ranges of constants.
406
407 One of the classes must always be named ALL_REGS and include all hard regs.
408 If there is more than one class, another class must be named NO_REGS
409 and contain no registers.
410
411 The name GENERAL_REGS must be the name of a class (or an alias for
412 another name such as ALL_REGS). This is the class of registers
413 that is allowed by "g" or "r" in a register constraint.
414 Also, registers outside this class are allocated only when
415 instructions express preferences for them.
416
417 The classes must be numbered in nondecreasing order; that is,
418 a larger-numbered class must never be contained completely
419 in a smaller-numbered class.
420
421 For any two classes, it is very desirable that there be another
422 class that represents their union. */
423
424 /*#define SMALL_REGISTER_CLASSES 1*/
425
426 enum reg_class
427 {
428 NO_REGS, ADDR_REGS, GENERAL_REGS,
429 FP_REGS, ALL_REGS, LIM_REG_CLASSES
430 };
431
432 #define N_REG_CLASSES (int) LIM_REG_CLASSES
433
434 /* Give names of register classes as strings for dump file. */
435
436 #define REG_CLASS_NAMES \
437 { "NO_REGS","ADDR_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
438
439 /* Define which registers fit in which classes. This is an initializer for
440 a vector of HARD_REG_SET of length N_REG_CLASSES.
441 G5 and latter have 16 register and support IEEE floating point operations. */
442
443 #define REG_CLASS_CONTENTS \
444 { \
445 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
446 { 0x0000fffe, 0x00000001 }, /* ADDR_REGS */ \
447 { 0x0000ffff, 0x00000001 }, /* GENERAL_REGS */ \
448 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
449 { 0xffffffff, 0x00000003 }, /* ALL_REGS */ \
450 }
451
452
453 /* The same information, inverted:
454 Return the class number of the smallest class containing
455 reg number REGNO. This could be a conditional expression
456 or could index an array. */
457
458 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
459
460 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
461
462 /* The class value for index registers, and the one for base regs. */
463
464 #define INDEX_REG_CLASS ADDR_REGS
465 #define BASE_REG_CLASS ADDR_REGS
466
467 /* Get reg_class from a letter such as appears in the machine description. */
468
469 #define REG_CLASS_FROM_LETTER(C) \
470 ((C) == 'a' ? ADDR_REGS : \
471 (C) == 'd' ? GENERAL_REGS : \
472 (C) == 'f' ? FP_REGS : NO_REGS)
473
474 /* The letters I, J, K, L and M in a register constraint string can be used
475 to stand for particular ranges of immediate operands.
476 This macro defines what the ranges are.
477 C is the letter, and VALUE is a constant value.
478 Return 1 if VALUE is in the range specified by C. */
479
480 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
481 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
482 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
483 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
484 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
485
486 /* Similar, but for floating constants, and defining letters G and H.
487 Here VALUE is the CONST_DOUBLE rtx itself. */
488
489 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
490
491 /* 'Q' means a memory-reference for a S-type operand. */
492
493 #define EXTRA_CONSTRAINT(OP, C) \
494 ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \
495 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
496
497 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
498 return the class of reg to actually use. In general this is just CLASS;
499 but on some machines in some cases it is preferable to use a more
500 restrictive class. */
501
502 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
503 (GET_CODE (X) == CONST_DOUBLE ? \
504 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\
505 (GET_CODE (X) == CONST_INT ? \
506 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\
507 GET_CODE (X) == PLUS || \
508 GET_CODE (X) == LABEL_REF || \
509 GET_CODE (X) == SYMBOL_REF || \
510 GET_CODE (X) == CONST ? ADDR_REGS : (CLASS)))
511
512 /* Return the maximum number of consecutive registers needed to represent
513 mode MODE in a register of class CLASS. */
514
515 #define CLASS_MAX_NREGS(CLASS, MODE) \
516 ((CLASS) == FP_REGS ? \
517 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
518 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
519
520 /* If we are copying between FP registers and anything else, we need a memory
521 location. */
522
523 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
524 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
525
526 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
527 because the movsi and movsf patterns don't handle r/f moves. */
528
529 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
530 (GET_MODE_BITSIZE (MODE) < 32 \
531 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
532 : MODE)
533
534
535 /* A C expression whose value is nonzero if pseudos that have been
536 assigned to registers of class CLASS would likely be spilled
537 because registers of CLASS are needed for spill registers.
538
539 The default value of this macro returns 1 if CLASS has exactly one
540 register and zero otherwise. On most machines, this default
541 should be used. Only define this macro to some other expression
542 if pseudo allocated by `local-alloc.c' end up in memory because
543 their hard registers were needed for spill registers. If this
544 macro returns nonzero for those classes, those pseudos will only
545 be allocated by `global.c', which knows how to reallocate the
546 pseudo to another register. If there would not be another
547 register available for reallocation, you should not change the
548 definition of this macro since the only effect of such a
549 definition would be to slow down register allocation. */
550
551 /* Stack layout; function entry, exit and calling. */
552
553 /* The current return address is on Offset 56 of the current frame
554 if we are in an leaf_function. Otherwise we have to go one stack
555 back.
556 The return address of anything farther back is accessed normally
557 at an offset of 56 from the frame pointer.
558
559 FIXME: builtin_return_addr does not work correctly in a leaf
560 function, we need to find way to find out, if we
561 are in a leaf function
562 */
563
564 #define _RETURN_ADDR_OFFSET (TARGET_64BIT ? 112 : 56)
565
566 #define RETURN_ADDR_RTX(count, frame) \
567 gen_rtx (MEM, Pmode, \
568 memory_address (Pmode, \
569 plus_constant ( \
570 copy_to_reg (gen_rtx (MEM, Pmode, \
571 memory_address (Pmode, frame))), \
572 _RETURN_ADDR_OFFSET)));
573
574 /* The following macros will turn on dwarf2 exception hndling
575 Other code location for this exception handling are
576 in s390.md (eh_return insn) and in linux.c in the prologue. */
577
578 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
579
580 /* We have 31 bit mode. */
581
582 #define MASK_RETURN_ADDR (GEN_INT (0x7fffffff))
583
584 /* Location, from where return address to load. */
585
586 #define DWARF_FRAME_RETURN_COLUMN 14
587
588 /* Describe how we implement __builtin_eh_return. */
589 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
590 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
591 #define EH_RETURN_HANDLER_RTX \
592 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
593 TARGET_64BIT? -48 : -40))
594
595 /* Define this if pushing a word on the stack makes the stack pointer a
596 smaller address. */
597
598 #define STACK_GROWS_DOWNWARD
599
600 /* Define this if the nominal address of the stack frame is at the
601 high-address end of the local variables; that is, each additional local
602 variable allocated goes at a more negative offset in the frame. */
603
604 /* #define FRAME_GROWS_DOWNWARD */
605
606 /* Offset from stack-pointer to first location of outgoing args. */
607
608 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
609
610 /* Offset within stack frame to start allocating local variables at.
611 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
612 first local allocated. Otherwise, it is the offset to the BEGINNING
613 of the first local allocated. */
614
615 #define STARTING_FRAME_OFFSET \
616 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
617
618 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
619
620 /* If we generate an insn to push BYTES bytes, this says how many the stack
621 pointer really advances by. On S/390, we have no push instruction. */
622
623 /* #define PUSH_ROUNDING(BYTES) */
624
625 /* Accumulate the outgoing argument count so we can request the right
626 DSA size and determine stack offset. */
627
628 #define ACCUMULATE_OUTGOING_ARGS 1
629
630 /* Offset from the stack pointer register to an item dynamically
631 allocated on the stack, e.g., by `alloca'.
632
633 The default value for this macro is `STACK_POINTER_OFFSET' plus the
634 length of the outgoing arguments. The default is correct for most
635 machines. See `function.c' for details. */
636 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
637
638 /* Offset of first parameter from the argument pointer register value.
639 On the S/390, we define the argument pointer to the start of the fixed
640 area. */
641 #define FIRST_PARM_OFFSET(FNDECL) 0
642
643 /* Define this if stack space is still allocated for a parameter passed
644 in a register. The value is the number of bytes allocated to this
645 area. */
646 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
647
648 /* Define this if the above stack space is to be considered part of the
649 space allocated by the caller. */
650 /* #define OUTGOING_REG_PARM_STACK_SPACE */
651
652 /* 1 if N is a possible register number for function argument passing.
653 On S390, general registers 2 - 6 and floating point register 0 and 2
654 are used in this way. */
655
656 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
657 (N) == 16 || (N) == 17)
658
659 /* Define a data type for recording info about an argument list during
660 the scan of that argument list. This data type should hold all
661 necessary information about the function itself and about the args
662 processed so far, enough to enable macros such as FUNCTION_ARG to
663 determine where the next arg should go. */
664
665 typedef struct s390_arg_structure
666 {
667 int gprs; /* gpr so far */
668 int fprs; /* fpr so far */
669 }
670 CUMULATIVE_ARGS;
671
672
673 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
674 a function whose data type is FNTYPE.
675 For a library call, FNTYPE is 0. */
676
677 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
678 ((CUM).gprs=0, (CUM).fprs=0)
679
680 /* Update the data in CUM to advance over an argument of mode MODE and
681 data type TYPE. (TYPE is null for libcalls where that information
682 may not be available.) */
683
684 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
685 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
686
687 /* Define where to put the arguments to a function. Value is zero to push
688 the argument on the stack, or a hard register in which to store the
689 argument. */
690
691 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
692 s390_function_arg (&CUM, MODE, TYPE, NAMED)
693
694 /* Define where to expect the arguments of a function. Value is zero, if
695 the argument is on the stack, or a hard register in which the argument
696 is stored. It is the same like FUNCTION_ARG, except for unnamed args
697 That means, that all in case of varargs used, the arguments are expected
698 from the stack.
699 S/390 has already space on the stack for args coming in registers,
700 they are pushed in prologue, if needed. */
701
702
703 /* Define the `__builtin_va_list' type. */
704
705 #define BUILD_VA_LIST_TYPE(VALIST) \
706 (VALIST) = s390_build_va_list ()
707
708 /* Implement `va_start' for varargs and stdarg. */
709
710 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
711 s390_va_start (stdarg, valist, nextarg)
712
713 /* Implement `va_arg'. */
714
715 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
716 s390_va_arg (valist, type)
717
718 /* For an arg passed partly in registers and partly in memory, this is the
719 number of registers used. For args passed entirely in registers or
720 entirely in memory, zero. */
721
722 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
723
724
725 /* Define if returning from a function call automatically pops the
726 arguments described by the number-of-args field in the call. */
727
728 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
729
730
731 /* Define how to find the value returned by a function. VALTYPE is the
732 data type of the value (as a tree).
733 If the precise function being called is known, FUNC is its FUNCTION_DECL;
734 otherwise, FUNC is 15. */
735
736 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
737 || TARGET_SOFT_FLOAT ) ? 2 : 16)
738
739
740 /* for structs the address is passed, and the Callee makes a
741 copy, only if needed */
742
743 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
744 s390_function_arg_pass_by_reference (MODE, TYPE)
745
746
747 /* Register 2 (and 3) for integral values
748 or floating point register 0 (and 2) for fp values are used. */
749
750 #define FUNCTION_VALUE(VALTYPE, FUNC) \
751 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
752 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
753 || POINTER_TYPE_P (VALTYPE) \
754 ? word_mode : TYPE_MODE (VALTYPE), \
755 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
756
757 /* Define how to find the value returned by a library function assuming
758 the value has mode MODE. */
759
760 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
761
762 /* 1 if N is a possible register number for a function value. */
763
764 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
765
766 /* The definition of this macro implies that there are cases where
767 a scalar value cannot be returned in registers. */
768
769 #define RETURN_IN_MEMORY(type) \
770 (TYPE_MODE (type) == BLKmode || \
771 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
772 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
773
774 /* Mode of stack savearea.
775 FUNCTION is VOIDmode because calling convention maintains SP.
776 BLOCK needs Pmode for SP.
777 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
778
779 #define STACK_SAVEAREA_MODE(LEVEL) \
780 (LEVEL == SAVE_FUNCTION ? VOIDmode \
781 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
782
783 /* Structure value address is passed as invisible first argument (gpr 2). */
784
785 #define STRUCT_VALUE 0
786
787 /* This macro definition sets up a default value for `main' to return. */
788
789 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
790
791 /* Length in units of the trampoline for entering a nested function. */
792
793 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
794
795 /* Initialize the dynamic part of trampoline. */
796
797 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
798 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
799
800 /* Template for constant part of trampoline. */
801
802 #define TRAMPOLINE_TEMPLATE(FILE) \
803 s390_trampoline_template (FILE)
804
805 /* Output assembler code to FILE to increment profiler label # LABELNO
806 for profiling a function entry. */
807
808 #define FUNCTION_PROFILER(FILE, LABELNO) \
809 do { \
810 extern rtx s390_profile[]; \
811 extern int s390_pool_count; \
812 rtx tmp; \
813 static char label[128]; \
814 fprintf (FILE, "# function profiler \n"); \
815 if (TARGET_64BIT) \
816 { \
817 rtx tmp[1]; \
818 output_asm_insn ("stg\t14,8(15)", tmp); \
819 sprintf (label, "%sP%d", LPREFIX, LABELNO); \
820 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, label); \
821 SYMBOL_REF_FLAG (tmp[0]) = 1; \
822 output_asm_insn ("larl\t1,%0", tmp); \
823 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "_mcount"); \
824 if (flag_pic) \
825 { \
826 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
827 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
828 } \
829 output_asm_insn ("brasl\t14,%0", tmp); \
830 output_asm_insn ("lg\t14,8(15)", tmp); \
831 } \
832 else \
833 { \
834 output_asm_insn ("l 14,4(15)", s390_profile); \
835 s390_pool_count = 0; \
836 output_asm_insn ("st 14,4(15)", s390_profile); \
837 output_asm_insn ("l 14,%4", s390_profile); \
838 output_asm_insn ("l 1,%9", s390_profile); \
839 if (flag_pic) \
840 { \
841 output_asm_insn ("ar 1,13", s390_profile); \
842 output_asm_insn ("bas 14,0(14,13)", s390_profile); \
843 } \
844 else \
845 { \
846 output_asm_insn ("basr 14,14", s390_profile); \
847 } \
848 output_asm_insn ("l 14,4(15)", s390_profile); \
849 } \
850 } while (0)
851
852 /* #define PROFILE_BEFORE_PROLOGUE */
853
854 /* There are three profiling modes for basic blocks available.
855 The modes are selected at compile time by using the options
856 -a or -ax of the gnu compiler.
857 The variable `profile_block_flag' will be set according to the
858 selected option.
859
860 profile_block_flag == 0, no option used:
861
862 No profiling done.
863
864 profile_block_flag == 1, -a option used.
865
866 Count frequency of execution of every basic block.
867
868 profile_block_flag == 2, -ax option used.
869
870 Generate code to allow several different profiling modes at run time.
871 Available modes are:
872 Produce a trace of all basic blocks.
873 Count frequency of jump instructions executed.
874 In every mode it is possible to start profiling upon entering
875 certain functions and to disable profiling of some other functions.
876
877 The result of basic-block profiling will be written to a file `bb.out'.
878 If the -ax option is used parameters for the profiling will be read
879 from file `bb.in'.
880
881 */
882
883 /* The following macro shall output assembler code to FILE
884 to initialize basic-block profiling.
885
886 If profile_block_flag == 2
887
888 Output code to call the subroutine `__bb_init_trace_func'
889 and pass two parameters to it. The first parameter is
890 the address of a block allocated in the object module.
891 The second parameter is the number of the first basic block
892 of the function.
893
894 The name of the block is a local symbol made with this statement:
895
896 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
897
898 Of course, since you are writing the definition of
899 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
900 can take a short cut in the definition of this macro and use the
901 name that you know will result.
902
903 The number of the first basic block of the function is
904 passed to the macro in BLOCK_OR_LABEL.
905
906 If described in a virtual assembler language the code to be
907 output looks like:
908
909 parameter1 <- LPBX0
910 parameter2 <- BLOCK_OR_LABEL
911 call __bb_init_trace_func
912
913 else if profile_block_flag != 0
914
915 Output code to call the subroutine `__bb_init_func'
916 and pass one single parameter to it, which is the same
917 as the first parameter to `__bb_init_trace_func'.
918
919 The first word of this parameter is a flag which will be nonzero if
920 the object module has already been initialized. So test this word
921 first, and do not call `__bb_init_func' if the flag is nonzero.
922 Note: When profile_block_flag == 2 the test need not be done
923 but `__bb_init_trace_func' *must* be called.
924
925 BLOCK_OR_LABEL may be used to generate a label number as a
926 branch destination in case `__bb_init_func' will not be called.
927
928 If described in a virtual assembler language the code to be
929 output looks like:
930
931 cmp (LPBX0),0
932 jne local_label
933 parameter1 <- LPBX0
934 call __bb_init_func
935 local_label:
936
937 */
938
939 #undef FUNCTION_BLOCK_PROFILER
940 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
941 do \
942 { \
943 if (TARGET_64BIT) \
944 { \
945 rtx tmp[1]; \
946 fprintf (FILE, "# function block profiler %d \n", profile_block_flag); \
947 output_asm_insn ("ipm 0", tmp); \
948 output_asm_insn ("aghi 15,-224", tmp); \
949 output_asm_insn ("stmg 14,5,160(15)", tmp); \
950 output_asm_insn ("larl 2,.LPBX0", tmp); \
951 switch (profile_block_flag) \
952 { \
953 case 2: \
954 if (BLOCK_OR_LABEL < 0x10000) { \
955 tmp[0] = gen_rtx_CONST_INT (Pmode, (BLOCK_OR_LABEL)); \
956 output_asm_insn ("llill 3,%x0", tmp); \
957 } else { \
958 int bo = BLOCK_OR_LABEL; \
959 tmp[0] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
960 output_asm_insn ("llill 3,%x0", tmp); \
961 tmp[0] = gen_rtx_CONST_INT (Pmode, (bo&0xffff0000)>>16); \
962 output_asm_insn ("iilh 3,%x0", tmp); \
963 } \
964 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_init_trace_func"); \
965 if (flag_pic) \
966 { \
967 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
968 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
969 } \
970 output_asm_insn ("brasl\t14,%0", tmp); \
971 break; \
972 default: \
973 output_asm_insn ("cli 7(2),0", tmp); \
974 output_asm_insn ("jne 2f", tmp); \
975 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_init_func"); \
976 if (flag_pic) \
977 { \
978 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
979 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
980 } \
981 output_asm_insn ("brasl\t14,%0", tmp); \
982 break; \
983 } \
984 output_asm_insn ("2:", tmp); \
985 output_asm_insn ("lmg 14,5,160(15)", tmp); \
986 output_asm_insn ("aghi 15,224", tmp); \
987 output_asm_insn ("spm 0", tmp); \
988 } \
989 else \
990 { \
991 extern rtx s390_profile[]; \
992 fprintf (FILE, "# function block profiler %d \n", profile_block_flag); \
993 output_asm_insn ("ipm 0", s390_profile); \
994 output_asm_insn ("ahi 15,-128", s390_profile); \
995 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
996 output_asm_insn ("l 2,%6", s390_profile); \
997 if (flag_pic) \
998 output_asm_insn ("ar 2,13", s390_profile); \
999 switch (profile_block_flag) \
1000 { \
1001 case 2: \
1002 output_asm_insn ("l 4,%1", s390_profile); \
1003 if (BLOCK_OR_LABEL < 0x8000) { \
1004 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (BLOCK_OR_LABEL)); \
1005 output_asm_insn ("lhi 3,%8", s390_profile); \
1006 } else { \
1007 int bo = BLOCK_OR_LABEL; \
1008 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1009 output_asm_insn ("lhi 3,%8", s390_profile); \
1010 output_asm_insn ("sll 3,15", s390_profile); \
1011 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1012 output_asm_insn ("ahi 3,%8", s390_profile); \
1013 } \
1014 break; \
1015 default: \
1016 output_asm_insn ("l 4,%0", s390_profile); \
1017 output_asm_insn ("cli 3(2),0", s390_profile); \
1018 output_asm_insn ("jne 2f", s390_profile); \
1019 break; \
1020 } \
1021 if (flag_pic) \
1022 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1023 else \
1024 output_asm_insn ("basr 14,4", s390_profile); \
1025 output_asm_insn ("2:", s390_profile); \
1026 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1027 output_asm_insn ("ahi 15,128", s390_profile); \
1028 output_asm_insn ("spm 0", s390_profile); \
1029 } \
1030 } while (0)
1031
1032 /* The following macro shall output assembler code to FILE
1033 to increment a counter associated with basic block number BLOCKNO.
1034
1035 If profile_block_flag == 2
1036
1037 Output code to initialize the global structure `__bb' and
1038 call the function `__bb_trace_func' which will increment the
1039 counter.
1040
1041 `__bb' consists of two words. In the first word the number
1042 of the basic block has to be stored. In the second word
1043 the address of a block allocated in the object module
1044 has to be stored.
1045
1046 The basic block number is given by BLOCKNO.
1047
1048 The address of the block is given by the label created with
1049
1050 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1051
1052 by FUNCTION_BLOCK_PROFILER.
1053
1054 Of course, since you are writing the definition of
1055 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1056 can take a short cut in the definition of this macro and use the
1057 name that you know will result.
1058
1059 If described in a virtual assembler language the code to be
1060 output looks like:
1061
1062 move BLOCKNO -> (__bb)
1063 move LPBX0 -> (__bb+4)
1064 call __bb_trace_func
1065
1066 Note that function `__bb_trace_func' must not change the
1067 machine state, especially the flag register. To grant
1068 this, you must output code to save and restore registers
1069 either in this macro or in the macros MACHINE_STATE_SAVE
1070 and MACHINE_STATE_RESTORE. The last two macros will be
1071 used in the function `__bb_trace_func', so you must make
1072 sure that the function prologue does not change any
1073 register prior to saving it with MACHINE_STATE_SAVE.
1074
1075 else if profile_block_flag != 0
1076
1077 Output code to increment the counter directly.
1078 Basic blocks are numbered separately from zero within each
1079 compiled object module. The count associated with block number
1080 BLOCKNO is at index BLOCKNO in an array of words; the name of
1081 this array is a local symbol made with this statement:
1082
1083 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1084
1085 Of course, since you are writing the definition of
1086 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1087 can take a short cut in the definition of this macro and use the
1088 name that you know will result.
1089
1090 If described in a virtual assembler language the code to be
1091 output looks like:
1092
1093 inc (LPBX2+4*BLOCKNO)
1094
1095 */
1096
1097 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1098 do \
1099 { \
1100 if (TARGET_64BIT) \
1101 { \
1102 rtx tmp[1]; \
1103 fprintf (FILE, "# block profiler %d block %d \n", \
1104 profile_block_flag, BLOCKNO); \
1105 output_asm_insn ("ipm 14", tmp); \
1106 output_asm_insn ("aghi 15,-224", tmp); \
1107 output_asm_insn ("stmg 14,5,160(15)", tmp); \
1108 output_asm_insn ("larl 2,_bb", tmp); \
1109 if ((BLOCKNO*8) < 0x10000) { \
1110 tmp[0] = gen_rtx_CONST_INT (Pmode, (BLOCKNO*8)); \
1111 output_asm_insn ("llill 3,%x0", tmp); \
1112 } else { \
1113 int bo = BLOCKNO*8; \
1114 tmp[0] = gen_rtx_CONST_INT (Pmode, bo&0xffff); \
1115 output_asm_insn ("llill 3,%x0", tmp); \
1116 tmp[0] = gen_rtx_CONST_INT (Pmode, (bo&0xffff0000)>>16); \
1117 output_asm_insn ("iilh 3,%x0", tmp); \
1118 } \
1119 switch (profile_block_flag) \
1120 { \
1121 case 2: \
1122 output_asm_insn ("stg 3,0(2)", tmp); \
1123 output_asm_insn ("larl 3,.LPBX0", tmp); \
1124 output_asm_insn ("stg 3,0(2)", tmp); \
1125 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_trace_func"); \
1126 if (flag_pic) \
1127 { \
1128 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
1129 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
1130 } \
1131 output_asm_insn ("brasl\t14,%0", tmp); \
1132 break; \
1133 default: \
1134 output_asm_insn ("larl 2,.LPBX2", tmp); \
1135 output_asm_insn ("la 2,0(2,3)", tmp); \
1136 output_asm_insn ("lg 3,0(2)", tmp); \
1137 output_asm_insn ("aghi 3,1", tmp); \
1138 output_asm_insn ("stg 3,0(2)", tmp); \
1139 break; \
1140 } \
1141 output_asm_insn ("lmg 14,5,160(15)", tmp); \
1142 output_asm_insn ("ahi 15,224", tmp); \
1143 output_asm_insn ("spm 14", tmp); \
1144 } \
1145 else \
1146 { \
1147 extern rtx s390_profile[]; \
1148 fprintf (FILE, "# block profiler %d block %d \n", \
1149 profile_block_flag,BLOCKNO); \
1150 output_asm_insn ("ipm 14", s390_profile); \
1151 output_asm_insn ("ahi 15,-128", s390_profile); \
1152 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
1153 switch (profile_block_flag) \
1154 { \
1155 case 2: \
1156 output_asm_insn ("l 4,%2", s390_profile); \
1157 output_asm_insn ("l 2,%5", s390_profile); \
1158 if (flag_pic) \
1159 output_asm_insn ("ar 2,13", s390_profile); \
1160 if (BLOCKNO < 0x8000) { \
1161 s390_profile[7] = gen_rtx_CONST_INT (Pmode, (BLOCKNO)*4); \
1162 output_asm_insn ("lhi 3,%8", s390_profile); \
1163 } else { \
1164 int bo = BLOCKNO; \
1165 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1166 output_asm_insn ("lhi 3,%8", s390_profile); \
1167 output_asm_insn ("sll 3,15", s390_profile); \
1168 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1169 output_asm_insn ("ahi 3,%7", s390_profile); \
1170 } \
1171 output_asm_insn ("st 3,0(2)", s390_profile); \
1172 output_asm_insn ("mvc 0(4,2),%5", s390_profile); \
1173 if (flag_pic) \
1174 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1175 else \
1176 output_asm_insn ("basr 14,4", s390_profile); \
1177 break; \
1178 default: \
1179 if (BLOCKNO < 0x2000) { \
1180 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (BLOCKNO)*4); \
1181 output_asm_insn ("lhi 2,%8", s390_profile); \
1182 } else { \
1183 int bo = BLOCKNO*4; \
1184 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1185 output_asm_insn ("lhi 2,%8", s390_profile); \
1186 output_asm_insn ("sll 2,15", s390_profile); \
1187 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1188 output_asm_insn ("ahi 2,%8", s390_profile); \
1189 } \
1190 output_asm_insn ("a 2,%7", s390_profile); \
1191 if (flag_pic) \
1192 output_asm_insn ("l 3,0(2,13)", s390_profile); \
1193 else \
1194 output_asm_insn ("l 3,0(2)", s390_profile); \
1195 output_asm_insn ("ahi 3,1", s390_profile); \
1196 if (flag_pic) \
1197 output_asm_insn ("st 3,0(2,13)", s390_profile); \
1198 else \
1199 output_asm_insn ("st 3,0(2)", s390_profile); \
1200 break; \
1201 } \
1202 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1203 output_asm_insn ("ahi 15,128", s390_profile); \
1204 output_asm_insn ("spm 14", s390_profile); \
1205 } \
1206 } while (0)
1207
1208
1209 /* The following macro shall output assembler code to FILE
1210 to indicate a return from function during basic-block profiling.
1211
1212 If profiling_block_flag == 2:
1213
1214 Output assembler code to call function `__bb_trace_ret'.
1215
1216 Note that function `__bb_trace_ret' must not change the
1217 machine state, especially the flag register. To grant
1218 this, you must output code to save and restore registers
1219 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1220 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1221 used in the function `__bb_trace_ret', so you must make
1222 sure that the function prologue does not change any
1223 register prior to saving it with MACHINE_STATE_SAVE_RET.
1224
1225 else if profiling_block_flag != 0:
1226
1227 The macro will not be used, so it need not distinguish
1228 these cases.
1229 */
1230
1231 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1232 do { \
1233 if (TARGET_64BIT) \
1234 { \
1235 rtx tmp[1]; \
1236 fprintf (FILE, "# block profiler exit \n"); \
1237 output_asm_insn ("ipm 14", tmp); \
1238 output_asm_insn ("aghi 15,-224", tmp); \
1239 output_asm_insn ("stmg 14,5,160(15)", tmp); \
1240 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_trace_ret"); \
1241 if (flag_pic) \
1242 { \
1243 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
1244 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
1245 } \
1246 output_asm_insn ("brasl 14,%0", tmp); \
1247 output_asm_insn ("lmg 14,5,160(15)", tmp); \
1248 output_asm_insn ("aghi 15,224", tmp); \
1249 output_asm_insn ("spm 14", tmp); \
1250 } \
1251 else \
1252 { \
1253 extern rtx s390_profile[]; \
1254 fprintf (FILE, "# block profiler exit \n"); \
1255 output_asm_insn ("ipm 14", s390_profile); \
1256 output_asm_insn ("ahi 15,-128", s390_profile); \
1257 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
1258 output_asm_insn ("l 4,%3", s390_profile); \
1259 if (flag_pic) \
1260 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1261 else \
1262 output_asm_insn ("basr 14,4", s390_profile); \
1263 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1264 output_asm_insn ("ahi 15,128", s390_profile); \
1265 output_asm_insn ("spm 14", s390_profile); \
1266 } \
1267 } while (0)
1268
1269 /* The function `__bb_trace_func' is called in every basic block
1270 and is not allowed to change the machine state. Saving (restoring)
1271 the state can either be done in the BLOCK_PROFILER macro,
1272 before calling function (rsp. after returning from function)
1273 `__bb_trace_func', or it can be done inside the function by
1274 defining the macros:
1275
1276 MACHINE_STATE_SAVE(ID)
1277 MACHINE_STATE_RESTORE(ID)
1278
1279 In the latter case care must be taken, that the prologue code
1280 of function `__bb_trace_func' does not already change the
1281 state prior to saving it with MACHINE_STATE_SAVE.
1282
1283 The parameter `ID' is a string identifying a unique macro use.
1284
1285 On the s390 all save/restore is done in macros above
1286 */
1287
1288 /*
1289 #define MACHINE_STATE_SAVE(ID) \
1290 fprintf (FILE, "\tahi 15,-128 # save state\n"); \
1291 fprintf (FILE, "\tstm 14,5,96(15)\n"); \
1292
1293 #define MACHINE_STATE_RESTORE(ID) \
1294 fprintf (FILE, "\tlm 14,5,96(15) # restore state\n"); \
1295 fprintf (FILE, "\tahi 15,128\n"); \
1296 */
1297
1298
1299 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
1300 pointer does not matter (provided there is a frame pointer). */
1301
1302 #define EXIT_IGNORE_STACK 1
1303
1304 /* Addressing modes, and classification of registers for them. */
1305
1306 /* #define HAVE_POST_INCREMENT */
1307 /* #define HAVE_POST_DECREMENT */
1308
1309 /* #define HAVE_PRE_DECREMENT */
1310 /* #define HAVE_PRE_INCREMENT */
1311
1312 /* These assume that REGNO is a hard or pseudo reg number. They give
1313 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
1314 reg currently allocated to a suitable hard reg.
1315 These definitions are NOT overridden anywhere. */
1316
1317 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1318 (((REGNO) > 0 && (REGNO) < 16) || (REGNO) == ARG_POINTER_REGNUM \
1319 /* || (REGNO) == FRAME_POINTER_REGNUM */ \
1320 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
1321
1322 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
1323
1324 #define REGNO_OK_FOR_DATA_P(REGNO) \
1325 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1326
1327 #define REGNO_OK_FOR_FP_P(REGNO) \
1328 FLOAT_REGNO_P (REGNO)
1329
1330 /* Now macros that check whether X is a register and also,
1331 strictly, whether it is in a specified class. */
1332
1333 /* 1 if X is a data register. */
1334
1335 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1336
1337 /* 1 if X is an fp register. */
1338
1339 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1340
1341 /* 1 if X is an address register. */
1342
1343 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1344
1345 /* Maximum number of registers that can appear in a valid memory address. */
1346
1347 #define MAX_REGS_PER_ADDRESS 2
1348
1349 /* Recognize any constant value that is a valid address. */
1350
1351 #define CONSTANT_ADDRESS_P(X) 0
1352
1353 #define SYMBOLIC_CONST(X) \
1354 (GET_CODE (X) == SYMBOL_REF \
1355 || GET_CODE (X) == LABEL_REF \
1356 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1357
1358 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
1359 they have to be forced to constant pool
1360 CONST_INT have to be forced into constant pool, if greater than
1361 64k. Depending on the insn they have to be force into constant pool
1362 for smaller value; in this case we have to work with nonimmediate operand. */
1363
1364 #define LEGITIMATE_PIC_OPERAND_P(X) \
1365 legitimate_pic_operand_p (X)
1366
1367 /* Nonzero if the constant value X is a legitimate general operand.
1368 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1369
1370 #define LEGITIMATE_CONSTANT_P(X) \
1371 legitimate_constant_p (X)
1372
1373 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
1374 its validity for a certain class. We have two alternate definitions
1375 for each of them. The usual definition accepts all pseudo regs; the
1376 other rejects them all. The symbol REG_OK_STRICT causes the latter
1377 definition to be used.
1378
1379 Most source files want to accept pseudo regs in the hope that they will
1380 get allocated to the class that the insn wants them to be in.
1381 Some source files that are used after register allocation
1382 need to be strict. */
1383
1384 /*
1385 * Nonzero if X is a hard reg that can be used as an index or if it is
1386 * a pseudo reg.
1387 */
1388
1389 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1390 ((GET_MODE (X) == Pmode) && \
1391 ((REGNO (X) > 0 && REGNO (X) < 16) || \
1392 (REGNO (X) == ARG_POINTER_REGNUM) || \
1393 (REGNO (X) >= FIRST_PSEUDO_REGISTER)))
1394
1395 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
1396 a pseudo reg. */
1397
1398 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
1399
1400 /* Nonzero if X is a hard reg that can be used as an index. */
1401
1402 #define REG_OK_FOR_INDEX_STRICT_P(X) \
1403 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
1404
1405 /* Nonzero if X is a hard reg that can be used as a base reg. */
1406
1407 #define REG_OK_FOR_BASE_STRICT_P(X) \
1408 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
1409
1410
1411 #ifndef REG_OK_STRICT
1412 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1413 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1414 #else
1415 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1416 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1417 #endif
1418
1419
1420 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1421 valid memory address for an instruction.
1422 The MODE argument is the machine mode for the MEM expression
1423 that wants to use this address.
1424
1425 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1426 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1427
1428 #ifdef REG_OK_STRICT
1429 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1430 { \
1431 if (legitimate_address_p (MODE, X, 1)) \
1432 goto ADDR; \
1433 }
1434 #else
1435 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1436 { \
1437 if (legitimate_address_p (MODE, X, 0)) \
1438 goto ADDR; \
1439 }
1440 #endif
1441
1442
1443 /* S/390 has no mode dependent addresses. */
1444
1445 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1446
1447 /* Try machine-dependent ways of modifying an illegitimate address
1448 to be legitimate. If we find one, return the new, valid address.
1449 This macro is used in only one place: `memory_address' in explow.c. */
1450
1451 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1452 { \
1453 (X) = legitimize_address (X, OLDX, MODE); \
1454 if (memory_address_p (MODE, X)) \
1455 goto WIN; \
1456 }
1457
1458 /* Specify the machine mode that this machine uses for the index in the
1459 tablejump instruction. */
1460
1461 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1462
1463 /* Define this if the tablejump instruction expects the table to contain
1464 offsets from the address of the table.
1465 Do not define this if the table should contain absolute addresses. */
1466
1467 /* #define CASE_VECTOR_PC_RELATIVE */
1468
1469 /* Load from integral MODE < SI from memory into register makes sign_extend
1470 or zero_extend
1471 In our case sign_extension happens for Halfwords, other no extension. */
1472
1473 #define LOAD_EXTEND_OP(MODE) \
1474 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1475 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1476 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1477
1478 /* Specify the tree operation to be used to convert reals to integers. */
1479
1480 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1481
1482 /* Define this if fixuns_trunc is the same as fix_trunc. */
1483
1484 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1485
1486 /* We use "unsigned char" as default. */
1487
1488 #define DEFAULT_SIGNED_CHAR 0
1489
1490 /* This is the kind of divide that is easiest to do in the general case. */
1491
1492 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1493
1494 /* Max number of bytes we can move from memory to memory in one reasonably
1495 fast instruction. */
1496
1497 #define MOVE_MAX 256
1498
1499 /* Define this if zero-extension is slow (more than one real instruction). */
1500
1501 #define SLOW_ZERO_EXTEND
1502
1503 /* Nonzero if access to memory by bytes is slow and undesirable. */
1504
1505 #define SLOW_BYTE_ACCESS 1
1506
1507 /* Define if shifts truncate the shift count which implies one can omit
1508 a sign-extension or zero-extension of a shift count. */
1509
1510 /* #define SHIFT_COUNT_TRUNCATED */
1511
1512 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1513 is done just by pretending it is already truncated. */
1514
1515 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1516
1517 /* We assume that the store-condition-codes instructions store 0 for false
1518 and some other value for true. This is the value stored for true. */
1519
1520 /* #define STORE_FLAG_VALUE -1 */
1521
1522 /* When a prototype says `char' or `short', really pass an `int'. */
1523
1524 #define PROMOTE_PROTOTYPES 1
1525
1526 /* Don't perform CSE on function addresses. */
1527
1528 #define NO_FUNCTION_CSE
1529
1530 /* Specify the machine mode that pointers have.
1531 After generation of rtl, the compiler makes no further distinction
1532 between pointers and any other objects of this machine mode. */
1533
1534 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1535
1536 /* A function address in a call instruction is a byte address (for
1537 indexing purposes) so give the MEM rtx a byte's mode. */
1538
1539 #define FUNCTION_MODE QImode
1540
1541
1542 /* A part of a C `switch' statement that describes the relative costs
1543 of constant RTL expressions. It must contain `case' labels for
1544 expression codes `const_int', `const', `symbol_ref', `label_ref'
1545 and `const_double'. Each case must ultimately reach a `return'
1546 statement to return the relative cost of the use of that kind of
1547 constant value in an expression. The cost may depend on the
1548 precise value of the constant, which is available for examination
1549 in X, and the rtx code of the expression in which it is contained,
1550 found in OUTER_CODE.
1551
1552 CODE is the expression code--redundant, since it can be obtained
1553 with `GET_CODE (X)'. */
1554 /* Force_const_mem does not work out of reload, because the saveable_obstack
1555 is set to reload_obstack, which does not live long enough.
1556 Because of this we cannot use force_const_mem in addsi3.
1557 This leads to problems with gen_add2_insn with a constant greater
1558 than a short. Because of that we give a addition of greater
1559 constants a cost of 3 (reload1.c 10096). */
1560
1561
1562 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1563 case CONST: \
1564 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1565 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1566 return 1000; \
1567 case CONST_INT: \
1568 if ((OUTER_CODE == PLUS) && \
1569 ((INTVAL (RTX) > 32767) || \
1570 (INTVAL (RTX) < -32768))) \
1571 return COSTS_N_INSNS (3); \
1572 case LABEL_REF: \
1573 case SYMBOL_REF: \
1574 case CONST_DOUBLE: \
1575 return 0; \
1576
1577
1578 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1579 This can be used, for example, to indicate how costly a multiply
1580 instruction is. In writing this macro, you can use the construct
1581 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1582 instructions. OUTER_CODE is the code of the expression in which X
1583 is contained.
1584
1585 This macro is optional; do not define it if the default cost
1586 assumptions are adequate for the target machine. */
1587
1588 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1589 case ASHIFT: \
1590 case ASHIFTRT: \
1591 case LSHIFTRT: \
1592 case PLUS: \
1593 case AND: \
1594 case IOR: \
1595 case XOR: \
1596 case MINUS: \
1597 case NEG: \
1598 case NOT: \
1599 return 1; \
1600 case MULT: \
1601 if (GET_MODE (XEXP (X, 0)) == DImode) \
1602 return 40; \
1603 else \
1604 return 7; \
1605 case DIV: \
1606 case UDIV: \
1607 case MOD: \
1608 case UMOD: \
1609 return 33;
1610
1611
1612 /* An expression giving the cost of an addressing mode that contains
1613 ADDRESS. If not defined, the cost is computed from the ADDRESS
1614 expression and the `CONST_COSTS' values.
1615
1616 For most CISC machines, the default cost is a good approximation
1617 of the true cost of the addressing mode. However, on RISC
1618 machines, all instructions normally have the same length and
1619 execution time. Hence all addresses will have equal costs.
1620
1621 In cases where more than one form of an address is known, the form
1622 with the lowest cost will be used. If multiple forms have the
1623 same, lowest, cost, the one that is the most complex will be used.
1624
1625 For example, suppose an address that is equal to the sum of a
1626 register and a constant is used twice in the same basic block.
1627 When this macro is not defined, the address will be computed in a
1628 register and memory references will be indirect through that
1629 register. On machines where the cost of the addressing mode
1630 containing the sum is no higher than that of a simple indirect
1631 reference, this will produce an additional instruction and
1632 possibly require an additional register. Proper specification of
1633 this macro eliminates this overhead for such machines.
1634
1635 Similar use of this macro is made in strength reduction of loops.
1636
1637 ADDRESS need not be valid as an address. In such a case, the cost
1638 is not relevant and can be any value; invalid addresses need not be
1639 assigned a different cost.
1640
1641 On machines where an address involving more than one register is as
1642 cheap as an address computation involving only one register,
1643 defining `ADDRESS_COST' to reflect this can cause two registers to
1644 be live over a region of code where only one would have been if
1645 `ADDRESS_COST' were not defined in that manner. This effect should
1646 be considered in the definition of this macro. Equivalent costs
1647 should probably only be given to addresses with different numbers
1648 of registers on machines with lots of registers.
1649
1650 This macro will normally either not be defined or be defined as a
1651 constant.
1652
1653 On s390 symbols are expensive if compiled with fpic
1654 lifetimes. */
1655
1656 #define ADDRESS_COST(RTX) \
1657 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1658
1659 /* On s390, copy between fprs and gprs is expensive. */
1660
1661 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1662 (((CLASS1 != CLASS2) && \
1663 (CLASS1 == FP_REGS || CLASS2 == FP_REGS)) ? 10 : 1)
1664
1665
1666 /* A C expression for the cost of moving data of mode M between a
1667 register and memory. A value of 2 is the default; this cost is
1668 relative to those in `REGISTER_MOVE_COST'.
1669
1670 If moving between registers and memory is more expensive than
1671 between two registers, you should define this macro to express the
1672 relative cost. */
1673
1674 #define MEMORY_MOVE_COST(M, C, I) 1
1675
1676 /* A C expression for the cost of a branch instruction. A value of 1
1677 is the default; other values are interpreted relative to that. */
1678
1679 #define BRANCH_COST 1
1680
1681 /* Add any extra modes needed to represent the condition code. */
1682 #define EXTRA_CC_MODES \
1683 CC (CCZmode, "CCZ") \
1684 CC (CCAmode, "CCA") \
1685 CC (CCUmode, "CCU") \
1686 CC (CCSmode, "CCS") \
1687 CC (CCTmode, "CCT")
1688
1689 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1690 return the mode to be used for the comparison. */
1691
1692 #define SELECT_CC_MODE(OP, X, Y) \
1693 ( (OP) == EQ || (OP) == NE ? CCZmode \
1694 : (OP) == LE || (OP) == LT || \
1695 (OP) == GE || (OP) == GT ? CCSmode \
1696 : (OP) == LEU || (OP) == LTU || \
1697 (OP) == GEU || (OP) == GTU ? CCUmode \
1698 : CCmode )
1699
1700
1701 /* Define the information needed to generate branch and scc insns. This is
1702 stored from the compare operation. Note that we can't use "rtx" here
1703 since it hasn't been defined! */
1704
1705 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1706
1707
1708 /* How to refer to registers in assembler output. This sequence is
1709 indexed by compiler's hard-register-number (see above). */
1710
1711 #define REGISTER_NAMES \
1712 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1713 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1714 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1715 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1716 "%ap", "%cc" \
1717 }
1718
1719 /* implicit call of memcpy, not bcopy */
1720
1721 #define TARGET_MEM_FUNCTIONS
1722
1723 /* Print operand X (an rtx) in assembler syntax to file FILE.
1724 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1725 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1726
1727 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1728
1729 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1730
1731
1732 /* Define the codes that are matched by predicates in aux-output.c. */
1733
1734 #define PREDICATE_CODES \
1735 {"s_operand", { MEM }}, \
1736 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1737 {"r_or_s_operand", { MEM, SUBREG, REG }}, \
1738 {"r_or_im8_operand", { CONST_INT, SUBREG, REG }}, \
1739 {"r_or_s_or_im8_operand", { MEM, SUBREG, REG, CONST_INT }}, \
1740 {"r_or_x_or_im16_operand", { MEM, SUBREG, REG, CONST_INT }}, \
1741 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1742 {"const1_operand", { CONST_INT, CONST_DOUBLE }}, \
1743 {"tmxx_operand", { CONST_INT, MEM }},
1744
1745
1746 /* A C statement (sans semicolon) to update the integer variable COST
1747 based on the relationship between INSN that is dependent on
1748 DEP_INSN through the dependence LINK. The default is to make no
1749 adjustment to COST. This can be used for example to specify to
1750 the scheduler that an output- or anti-dependence does not incur
1751 the same cost as a data-dependence. */
1752
1753 #define ADJUST_COST(insn, link, dep_insn, cost) \
1754 (cost) = s390_adjust_cost (insn, link, dep_insn, cost)
1755
1756
1757 /* Constant Pool for all symbols operands which are changed with
1758 force_const_mem during insn generation (expand_insn). */
1759
1760 extern struct rtx_def *s390_pool_start_insn;
1761 extern int s390_pool_count;
1762 extern int s390_nr_constants;
1763
1764 /* Function is splitted in chunk, if literal pool could overflow
1765 Value need to be lowered, if problems with displacement overflow. */
1766
1767 #define S390_REL_MAX 55000
1768 #define S390_CHUNK_MAX 0x2000
1769 #define S390_CHUNK_OV 0x8000
1770 #define S390_POOL_MAX 0xe00
1771
1772 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1773 { \
1774 register rtx insn; \
1775 struct pool_constant *pool; \
1776 \
1777 if (s390_pool_count == -1) \
1778 { \
1779 s390_nr_constants = 0; \
1780 for (pool = first_pool; pool; pool = pool->next) \
1781 if (pool->mark) s390_nr_constants++; \
1782 return; \
1783 } \
1784 if (first_pool == 0) { \
1785 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1786 return; \
1787 } \
1788 for (pool = first_pool; pool; pool = pool->next) \
1789 pool->mark = 0; \
1790 \
1791 insn = s390_pool_start_insn; \
1792 \
1793 if (insn==NULL_RTX) \
1794 insn = get_insns (); \
1795 else \
1796 insn = NEXT_INSN (insn); \
1797 for (; insn; insn = NEXT_INSN (insn)) { \
1798 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { \
1799 if (s390_stop_dump_lit_p (insn)) { \
1800 mark_constants (PATTERN (insn)); \
1801 break; \
1802 } else \
1803 mark_constants (PATTERN (insn)); \
1804 } \
1805 } \
1806 \
1807 /* Mark entries referenced by other entries */ \
1808 for (pool = first_pool; pool; pool = pool->next) \
1809 if (pool->mark) \
1810 mark_constants (pool->constant); \
1811 \
1812 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1813 }
1814
1815 /* We need to return, because otherwise the pool is deleted of the
1816 constant pool after the first output. */
1817
1818 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1819
1820 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1821 { \
1822 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1823 { \
1824 fprintf (FILE, ".LC%d:\n", LABELNO); \
1825 LABELNO = ~LABELNO; \
1826 } \
1827 if (s390_pool_count > 0) \
1828 { \
1829 fprintf (FILE, ".LC%d_%X:\n", ~LABELNO, s390_pool_count); \
1830 } \
1831 \
1832 /* Output the value of the constant itself. */ \
1833 switch (GET_MODE_CLASS (MODE)) \
1834 { \
1835 case MODE_FLOAT: \
1836 if (GET_CODE (EXP) != CONST_DOUBLE) \
1837 abort (); \
1838 \
1839 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \
1840 assemble_real (u.d, MODE, ALIGN); \
1841 break; \
1842 \
1843 case MODE_INT: \
1844 case MODE_PARTIAL_INT: \
1845 if (flag_pic \
1846 && (GET_CODE (EXP) == CONST \
1847 || GET_CODE (EXP) == SYMBOL_REF \
1848 || GET_CODE (EXP) == LABEL_REF )) \
1849 { \
1850 fprintf (FILE, "%s\t",TARGET_64BIT ? ASM_QUAD : ASM_LONG); \
1851 s390_output_symbolic_const (FILE, EXP); \
1852 fputc ('\n', (FILE)); \
1853 } \
1854 else \
1855 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1856 break; \
1857 \
1858 default: \
1859 abort (); \
1860 } \
1861 goto WIN; \
1862 }
1863
1864 #endif