1 /* Definitions of target machine for GNU compiler, for SPUR chip.
2 Copyright (C) 1988, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
26 /* Names to predefine in the preprocessor for this target machine. */
28 #define CPP_PREDEFINES "-Dspur -Acpu(spur) -Amachine(spur)"
30 /* Link with libg.a when debugging, for dbx's sake. */
32 #define LIB_SPEC "%{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
34 /* Print subsidiary information on the compiler version in use. */
35 #define TARGET_VERSION fprintf (stderr, " (spur)");
37 /* Run-time compilation parameters selecting different hardware subsets.
39 On the SPUR, we don't yet need any. */
41 extern int target_flags
;
43 /* Nonzero if we should generate code to use the fpu. */
44 #define TARGET_FPU (target_flags & 1)
46 /* Nonzero if we should expand constant shifts into series of shift
48 #define TARGET_EXPAND_SHIFTS (target_flags & 2)
50 /* Nonzero if we should generate long jumps for compares. */
51 #define TARGET_LONG_JUMPS (target_flags & 4)
53 /* Macro to define tables used to set the flags.
54 This is a list in braces of pairs in braces,
55 each pair being { "NAME", VALUE }
56 where VALUE is the bits to set or minus the bits to clear.
57 An empty string NAME is used to identify the default VALUE. */
59 #define TARGET_SWITCHES \
62 {"expand-shifts", 2}, \
65 {"short-jumps", -4}, \
66 { "", TARGET_DEFAULT}}
68 #define TARGET_DEFAULT 0
70 /* target machine storage layout */
72 /* Define this if most significant bit is lowest numbered
73 in instructions that operate on numbered bit-fields.
74 This is a moot question on the SPUR due to the lack of bit-field insns. */
75 #define BITS_BIG_ENDIAN 0
77 /* Define this if most significant byte of a word is the lowest numbered. */
78 /* That is not true on SPUR. */
79 #define BYTES_BIG_ENDIAN 0
81 /* Define this if most significant word of a multiword number is the lowest
83 /* For SPUR we can decide arbitrarily
84 since there are no machine instructions for them. */
85 #define WORDS_BIG_ENDIAN 0
87 /* number of bits in an addressable storage unit */
88 #define BITS_PER_UNIT 8
90 /* Width in bits of a "word", which is the contents of a machine register.
91 Note that this is not necessarily the width of data type `int';
92 if using 16-bit ints on a 68000, this would still be 32.
93 But on a machine with 16-bit registers, this would be 16. */
94 #define BITS_PER_WORD 32
96 /* Width of a word, in units (bytes). */
97 #define UNITS_PER_WORD 4
99 /* Width in bits of a pointer.
100 See also the macro `Pmode' defined below. */
101 #define POINTER_SIZE 32
103 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
104 #define PARM_BOUNDARY 64
106 /* Boundary (in *bits*) on which stack pointer should be aligned. */
107 #define STACK_BOUNDARY 64
109 /* Allocation boundary (in *bits*) for the code of a function. */
110 #define FUNCTION_BOUNDARY 32
112 /* Alignment of field after `int : 0' in a structure. */
113 #define EMPTY_FIELD_BOUNDARY 32
115 /* Every structure's size must be a multiple of this. */
116 #define STRUCTURE_SIZE_BOUNDARY 32
118 /* No data type wants to be aligned rounder than this. */
119 #define BIGGEST_ALIGNMENT 64
121 /* Set this nonzero if move instructions will actually fail to work
122 when given unaligned data. */
123 #define STRICT_ALIGNMENT 1
125 /* Standard register usage. */
127 /* Number of actual hardware registers.
128 The hardware registers are assigned numbers for the compiler
129 from 0 to just below FIRST_PSEUDO_REGISTER.
130 All registers that the compiler knows about must be given numbers,
131 even those that are not normally considered general registers.
133 SPUR has 32 fullword registers and 15 floating point registers. */
135 #define FIRST_PSEUDO_REGISTER 47
137 /* 1 for registers that have pervasive standard uses
138 and are not available for the register allocator.
139 On SPUR, this includes all the global registers
140 and the callee return address register. */
141 #define FIXED_REGISTERS \
142 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
144 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
146 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
148 /* 1 for registers not available across function calls.
149 These must include the FIXED_REGISTERS and also any
150 registers that can be used without being saved.
151 The latter must include the registers where values are returned
152 and the register where structure-value addresses are passed.
153 Aside from that, you can include as many other registers as you like. */
154 #define CALL_USED_REGISTERS \
155 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
157 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
159 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}
161 /* Return number of consecutive hard regs needed starting at reg REGNO
162 to hold something of mode MODE.
163 This is ordinarily the length in words of a value of mode MODE
164 but can be less for certain modes in special long registers.
166 On SPUR, ordinary registers hold 32 bits worth;
167 a single floating point register is always enough for
168 anything that can be stored in them at all. */
169 #define HARD_REGNO_NREGS(REGNO, MODE) \
170 ((REGNO) >= 32 ? GET_MODE_NUNITS ((MODE)) \
171 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
173 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
174 On SPUR, the cpu registers can hold any mode but the float registers
175 can hold only floating point. And they can't hold anything if use
176 of hardware floating point is disabled. */
177 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
179 && (REGNO) + ((GET_MODE_UNIT_SIZE ((MODE)) + 3) / 4) <= 32) \
180 || (TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode \
181 || (MODE) == SCmode || (MODE) == DCmode)))
183 /* Value is 1 if it is a good idea to tie two pseudo registers
184 when one has mode MODE1 and one has mode MODE2.
185 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
186 for any hard reg, then this must be 0 for correct output. */
187 #define MODES_TIEABLE_P(MODE1, MODE2) \
188 (((MODE1) == SFmode || (MODE1) == DFmode \
189 || (MODE1) == SCmode || (MODE1) == DCmode) \
190 == ((MODE2) == SFmode || (MODE2) == DFmode \
191 || (MODE2) == SCmode || (MODE2) == DCmode))
193 /* Specify the registers used for certain standard purposes.
194 The values of these macros are register numbers. */
196 /* SPUR pc isn't overloaded on a register that the compiler knows about. */
197 /* #define PC_REGNUM */
199 /* Register to use for pushing function arguments. */
200 #define STACK_POINTER_REGNUM 4
202 /* Base register for access to local variables of the function. */
203 #define FRAME_POINTER_REGNUM 25
205 /* Value should be nonzero if functions must have frame pointers.
206 Zero means the frame pointer need not be set up (and parms
207 may be accessed via the stack pointer) in functions that seem suitable.
208 This is computed in `reload', in reload1.c. */
209 #define FRAME_POINTER_REQUIRED 1
211 /* Base register for access to arguments of the function. */
212 #define ARG_POINTER_REGNUM 25
214 /* Register in which static-chain is passed to a function. */
216 #define STATIC_CHAIN_REGNUM 8
218 /* Register in which address to store a structure value
219 is passed to a function. */
220 #define STRUCT_VALUE_REGNUM 27
221 #define STRUCT_VALUE_INCOMING_REGNUM 11
223 /* Define the classes of registers for register constraints in the
224 machine description. Also define ranges of constants.
226 One of the classes must always be named ALL_REGS and include all hard regs.
227 If there is more than one class, another class must be named NO_REGS
228 and contain no registers.
230 The name GENERAL_REGS must be the name of a class (or an alias for
231 another name such as ALL_REGS). This is the class of registers
232 that is allowed by "g" or "r" in a register constraint.
233 Also, registers outside this class are allocated only when
234 instructions express preferences for them.
236 The classes must be numbered in nondecreasing order; that is,
237 a larger-numbered class must never be contained completely
238 in a smaller-numbered class.
240 For any two classes, it is very desirable that there be another
241 class that represents their union. */
243 /* The 68000 has two kinds of registers, hence four classes. */
245 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FP_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
247 #define N_REG_CLASSES (int) LIM_REG_CLASSES
249 /* Give names of register classes as strings for dump file. */
251 #define REG_CLASS_NAMES \
252 {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
254 /* Define which registers fit in which classes.
255 This is an initializer for a vector of HARD_REG_SET
256 of length N_REG_CLASSES. */
258 #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, 0x7fff}, {-1, 0x7fff}}
260 /* The same information, inverted:
261 Return the class number of the smallest class containing
262 reg number REGNO. This could be a conditional expression
263 or could index an array. */
265 #define REGNO_REG_CLASS(REGNO) \
266 ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
268 /* The class value for index registers, and the one for base regs. */
269 #define INDEX_REG_CLASS GENERAL_REGS
270 #define BASE_REG_CLASS GENERAL_REGS
272 /* Get reg_class from a letter such as appears in the machine description. */
274 #define REG_CLASS_FROM_LETTER(C) \
275 ((C) == 'f' ? FP_REGS : NO_REGS)
277 /* The letters I, J, K, L and M in a register constraint string
278 can be used to stand for particular ranges of immediate operands.
279 This macro defines what the ranges are.
280 C is the letter, and VALUE is a constant value.
281 Return 1 if VALUE is in the range specified by C.
283 For SPUR, `I' is used for the range of constants an insn
284 can actually contain.
285 `J' is used for the range which is just zero (since that is R0).
286 `K' is used for the 5-bit operand of a compare insns. */
288 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
289 ((C) == 'I' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
290 : (C) == 'J' ? (VALUE) == 0 \
291 : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
294 /* Similar, but for floating constants, and defining letters G and H.
295 Here VALUE is the CONST_DOUBLE rtx itself. */
297 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
298 ((C) == 'G' && CONST_DOUBLE_HIGH (VALUE) == 0 \
299 && CONST_DOUBLE_LOW (VALUE) == 0)
301 /* Given an rtx X being reloaded into a reg required to be
302 in class CLASS, return the class of reg to actually use.
303 In general this is just CLASS; but on some machines
304 in some cases it is preferable to use a more restrictive class. */
305 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
307 /* Return the maximum number of consecutive registers
308 needed to represent mode MODE in a register of class CLASS. */
309 /* On SPUR, this is the size of MODE in words,
310 except in the FP regs, where a single reg is always enough. */
311 #define CLASS_MAX_NREGS(CLASS, MODE) \
312 ((CLASS) == FP_REGS ? 1 \
313 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
315 /* Stack layout; function entry, exit and calling. */
317 /* Define this if pushing a word on the stack
318 makes the stack pointer a smaller address. */
319 #define STACK_GROWS_DOWNWARD
321 /* Define this if the nominal address of the stack frame
322 is at the high-address end of the local variables;
323 that is, each additional local variable allocated
324 goes at a more negative offset in the frame. */
325 #define FRAME_GROWS_DOWNWARD
327 /* Offset within stack frame to start allocating local variables at.
328 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
329 first local allocated. Otherwise, it is the offset to the BEGINNING
330 of the first local allocated. */
331 #define STARTING_FRAME_OFFSET 0
333 /* If we generate an insn to push BYTES bytes,
334 this says how many the stack pointer really advances by.
335 On SPUR, don't define this because there are no push insns. */
336 /* #define PUSH_ROUNDING(BYTES) */
338 /* Offset of first parameter from the argument pointer register value. */
339 #define FIRST_PARM_OFFSET(FNDECL) 0
341 /* Value is the number of bytes of arguments automatically
342 popped when returning from a subroutine call.
343 FUNDECL is the declaration node of the function (as a tree),
344 FUNTYPE is the data type of the function (as a tree),
345 or for a library call it is an identifier node for the subroutine name.
346 SIZE is the number of bytes of arguments passed on the stack. */
348 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
350 /* Define how to find the value returned by a function.
351 VALTYPE is the data type of the value (as a tree).
352 If the precise function being called is known, FUNC is its FUNCTION_DECL;
353 otherwise, FUNC is 0. */
355 /* On SPUR the value is found in the second "output" register. */
357 #define FUNCTION_VALUE(VALTYPE, FUNC) \
358 gen_rtx (REG, TYPE_MODE (VALTYPE), 27)
360 /* But the called function leaves it in the second "input" register. */
362 #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
363 gen_rtx (REG, TYPE_MODE (VALTYPE), 11)
365 /* Define how to find the value returned by a library function
366 assuming the value has mode MODE. */
368 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 27)
370 /* 1 if N is a possible register number for a function value
371 as seen by the caller.
372 On SPUR, the first "output" reg is the only register thus used. */
374 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 27)
376 /* 1 if N is a possible register number for function argument passing.
377 On SPUR, these are the "output" registers. */
379 #define FUNCTION_ARG_REGNO_P(N) ((N) < 32 && (N) > 26)
381 /* Define this macro if the target machine has "register windows". This
382 C expression returns the register number as seen by the called function
383 corresponding to register number OUT as seen by the calling function.
384 Return OUT if register number OUT is not an outbound register. */
386 #define INCOMING_REGNO(OUT) \
387 (((OUT) < 27 || (OUT) > 31) ? (OUT) : (OUT) - 16)
389 /* Define this macro if the target machine has "register windows". This
390 C expression returns the register number as seen by the calling function
391 corresponding to register number IN as seen by the called function.
392 Return IN if register number IN is not an inbound register. */
394 #define OUTGOING_REGNO(IN) \
395 (((IN) < 11 || (IN) > 15) ? (IN) : (IN) + 16)
397 /* Define a data type for recording info about an argument list
398 during the scan of that argument list. This data type should
399 hold all necessary information about the function itself
400 and about the args processed so far, enough to enable macros
401 such as FUNCTION_ARG to determine where the next arg should go.
403 On SPUR, this is a single integer, which is a number of words
404 of arguments scanned so far (including the invisible argument,
405 if any, which holds the structure-value-address).
406 Thus 5 or more means all following args should go on the stack. */
408 #define CUMULATIVE_ARGS int
410 /* Initialize a variable CUM of type CUMULATIVE_ARGS
411 for a call to a function whose data type is FNTYPE.
412 For a library call, FNTYPE is 0.
414 On SPUR, the offset normally starts at 0, but starts at 4 bytes
415 when the function gets a structure-value-address as an
416 invisible first argument. */
418 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
419 ((CUM) = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE)))))
421 /* Update the data in CUM to advance over an argument
422 of mode MODE and data type TYPE.
423 (TYPE is null for libcalls where that information may not be available.) */
425 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
426 ((CUM) += ((MODE) != BLKmode \
427 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
428 : (int_size_in_bytes (TYPE) + 3) / 4))
430 /* Determine where to put an argument to a function.
431 Value is zero to push the argument on the stack,
432 or a hard register in which to store the argument.
434 MODE is the argument's machine mode.
435 TYPE is the data type of the argument (as a tree).
436 This is null for libcalls where that information may
438 CUM is a variable of type CUMULATIVE_ARGS which gives info about
439 the preceding args and about the function being called.
440 NAMED is nonzero if this argument is a named parameter
441 (otherwise it is an extra parameter matching an ellipsis). */
443 /* On SPUR the first five words of args are normally in registers
444 and the rest are pushed. But any arg that won't entirely fit in regs
447 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
449 + ((MODE) == BLKmode \
450 ? (int_size_in_bytes (TYPE) + 3) / 4 \
451 : (GET_MODE_SIZE (MODE) + 3) / 4)) \
452 ? gen_rtx (REG, (MODE), 27 + (CUM)) \
455 /* Define where a function finds its arguments.
456 This is different from FUNCTION_ARG because of register windows. */
458 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
460 + ((MODE) == BLKmode \
461 ? (int_size_in_bytes (TYPE) + 3) / 4 \
462 : (GET_MODE_SIZE (MODE) + 3) / 4)) \
463 ? gen_rtx (REG, (MODE), 11 + (CUM)) \
466 /* For an arg passed partly in registers and partly in memory,
467 this is the number of registers used.
468 For args passed entirely in registers or entirely in memory, zero. */
470 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
472 /* This macro generates the assembly code for function entry.
473 FILE is a stdio stream to output the code to.
474 SIZE is an int: how many units of temporary storage to allocate.
475 Refer to the array `regs_ever_live' to determine which registers
476 to save; `regs_ever_live[I]' is nonzero if register number I
477 is ever used in the function. This macro is responsible for
478 knowing which registers should not be saved even if used. */
480 /* On spur, move-double insns between fpu and cpu need an 8-byte block
481 of memory. If any fpu reg is used in the function, we allocate
482 such a block here, at the bottom of the frame, just in case it's needed. */
484 #define FUNCTION_PROLOGUE(FILE, SIZE) \
486 extern char call_used_regs[]; \
487 extern int current_function_pretend_args_size; \
488 int fsize = ((SIZE) + 7) & ~7; \
489 int nregs, i, fp_used = 0; \
490 for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
492 if (regs_ever_live[i] && ! call_used_regs[i]) \
494 if (regs_ever_live[i]) fp_used = 1; \
496 if (fp_used) fsize += 8; \
497 fprintf (FILE, "0:\trd_special r24,pc\n"); \
498 fprintf (FILE, "\tand r24,r24,$~0x3\n"); \
499 fprintf (FILE, "\tadd_nt r25,r4,$%d\n", \
500 - current_function_pretend_args_size); \
501 if (fsize + nregs != 0 || current_function_pretend_args_size > 0)\
503 int n = - fsize - nregs * 16; \
505 fprintf (FILE, "\tadd_nt r4,r25,$%d\n", n); \
508 fprintf (FILE, "\tadd_nt r4,r25,$-8192\n"); \
511 fprintf (FILE, "\tadd_nt r4,r4,$-8192\n"), n += 8192; \
513 fprintf (FILE, "\tadd_nt r4,r4,$%d\n", n); \
516 for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
517 if (regs_ever_live[i] && ! call_used_regs[i]) \
519 fprintf (FILE, "\tst_ext1 %s,r4,$%d\n", \
520 reg_names[i], 8 * nregs++); \
521 fprintf (FILE, "\tst_ext2 %s,r4,$%d\n", \
522 reg_names[i], 8 * nregs++); \
526 /* Output assembler code to FILE to increment profiler label # LABELNO
527 for profiling a function entry. */
529 #define FUNCTION_PROFILER(FILE, LABELNO) \
532 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
533 the stack pointer does not matter. The value is tested only in
534 functions that have frame pointers.
535 No definition is equivalent to always zero. */
537 extern int current_function_calls_alloca
;
538 extern int current_function_pretend_args_size
;
540 #define EXIT_IGNORE_STACK \
541 (get_frame_size () != 0 \
542 || current_function_calls_alloca || current_function_pretend_args_size)
544 /* This macro generates the assembly code for function exit,
545 on machines that need it. If FUNCTION_EPILOGUE is not defined
546 then individual return instructions are generated for each
547 return statement. Args are same as for FUNCTION_PROLOGUE.
549 The function epilogue should not depend on the current stack pointer!
550 It should use the frame pointer only. This is mandatory because
551 of alloca; we also take advantage of it to omit stack adjustments
554 #define FUNCTION_EPILOGUE(FILE, SIZE) \
556 extern char call_used_regs[]; \
557 extern int current_function_calls_alloca; \
558 extern int current_function_pretend_args_size; \
559 int fsize = ((SIZE) + 7) & ~7; \
560 int nregs, i, fp_used = 0; \
561 for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
563 if (regs_ever_live[i] && ! call_used_regs[i]) \
565 if (regs_ever_live[i]) fp_used = 1; \
567 if (fp_used) fsize += 8; \
570 fprintf (FILE, "\tadd_nt r4,r25,$%d\n", - fsize - nregs * 16); \
571 for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
572 if (regs_ever_live[i] && ! call_used_regs[i]) \
574 fprintf (FILE, "\tld_ext1 %s,r4,$%d\n\tnop\n", \
575 reg_names[i], 8 * nregs++); \
576 fprintf (FILE, "\tld_ext2 %s,r4,$%d\n\tnop\n", \
577 reg_names[i], 8 * nregs++); \
580 if (fsize != 0 || nregs != 0 || current_function_calls_alloca \
581 || current_function_pretend_args_size > 0) \
582 fprintf (FILE, "\tadd_nt r4,r25,$%d\n", \
583 current_function_pretend_args_size); \
584 fprintf (FILE, "\treturn r10,$8\n\tnop\n"); \
587 /* Addressing modes, and classification of registers for them. */
589 /* #define HAVE_POST_INCREMENT */
590 /* #define HAVE_POST_DECREMENT */
592 /* #define HAVE_PRE_DECREMENT */
593 /* #define HAVE_PRE_INCREMENT */
595 /* Macros to check register numbers against specific register classes. */
597 /* These assume that REGNO is a hard or pseudo reg number.
598 They give nonzero only if REGNO is a hard reg of the suitable class
599 or a pseudo reg currently allocated to a suitable hard reg.
600 Since they use reg_renumber, they are safe only once reg_renumber
601 has been allocated, which happens in local-alloc.c. */
603 #define REGNO_OK_FOR_INDEX_P(REGNO) \
604 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
605 #define REGNO_OK_FOR_BASE_P(REGNO) \
606 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
607 #define REGNO_OK_FOR_FP_P(REGNO) \
608 (((REGNO) ^ 0x20) < 14 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 14)
610 /* Now macros that check whether X is a register and also,
611 strictly, whether it is in a specified class.
613 These macros are specific to the SPUR, and may be used only
614 in code for printing assembler insns and in conditions for
615 define_optimization. */
617 /* 1 if X is an fp register. */
619 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
621 /* Maximum number of registers that can appear in a valid memory address. */
623 #define MAX_REGS_PER_ADDRESS 2
625 /* Recognize any constant value that is a valid address. */
627 #define CONSTANT_ADDRESS_P(X) \
628 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
629 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
630 || GET_CODE (X) == HIGH)
632 /* Nonzero if the constant value X is a legitimate general operand.
633 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
635 #define LEGITIMATE_CONSTANT_P(X) \
636 ((GET_CODE (X) == CONST_INT \
637 && (unsigned) (INTVAL (X) + 0x2000) < 0x4000)\
638 || (GET_CODE (X) == SYMBOL_REF && (X)->unchanging))
640 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
641 and check its validity for a certain class.
642 We have two alternate definitions for each of them.
643 The usual definition accepts all pseudo regs; the other rejects
644 them unless they have been allocated suitable hard regs.
645 The symbol REG_OK_STRICT causes the latter definition to be used.
647 Most source files want to accept pseudo regs in the hope that
648 they will get allocated to the class that the insn wants them to be in.
649 Source files for reload pass need to be strict.
650 After reload, it makes no difference, since pseudo regs have
651 been eliminated by then. */
653 #ifndef REG_OK_STRICT
655 /* Nonzero if X is a hard reg that can be used as an index
656 or if it is a pseudo reg. */
657 #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
658 /* Nonzero if X is a hard reg that can be used as a base reg
659 or if it is a pseudo reg. */
660 #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
664 /* Nonzero if X is a hard reg that can be used as an index. */
665 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
666 /* Nonzero if X is a hard reg that can be used as a base reg. */
667 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
671 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
672 that is a valid memory address for an instruction.
673 The MODE argument is the machine mode for the MEM expression
674 that wants to use this address.
676 On SPUR, the actual legitimate addresses must be REG+SMALLINT or REG+REG.
677 Actually, REG+REG is not legitimate for stores, so
678 it is obtained only by combination on loads.
679 We can treat a SYMBOL_REF as legitimate if it is part of this
680 function's constant-pool, because such addresses can actually
681 be output as REG+SMALLINT. */
683 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
684 { if (GET_CODE (X) == REG \
685 && REG_OK_FOR_BASE_P (X)) \
687 if (GET_CODE (X) == SYMBOL_REF && (X)->unchanging) \
689 if (GET_CODE (X) == PLUS \
690 && GET_CODE (XEXP (X, 0)) == REG \
691 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
693 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
694 && INTVAL (XEXP (X, 1)) >= -0x2000 \
695 && INTVAL (XEXP (X, 1)) < 0x2000) \
700 /* Try machine-dependent ways of modifying an illegitimate address
701 to be legitimate. If we find one, return the new, valid address.
702 This macro is used in only one place: `memory_address' in explow.c.
704 OLDX is the address as it was before break_out_memory_refs was called.
705 In some cases it is useful to look at this to decide what needs to be done.
707 MODE and WIN are passed so that this macro can use
708 GO_IF_LEGITIMATE_ADDRESS.
710 It is always safe for this macro to do nothing. It exists to recognize
711 opportunities to optimize the output. */
713 /* On SPUR, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
715 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
716 { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
717 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
718 copy_to_mode_reg (SImode, XEXP (X, 1))); \
719 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
720 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
721 copy_to_mode_reg (SImode, XEXP (X, 0))); \
722 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
723 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
724 force_operand (XEXP (X, 0), 0)); \
725 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
726 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
727 force_operand (XEXP (X, 1), 0)); \
728 if (memory_address_p (MODE, X)) \
731 /* Go to LABEL if ADDR (a legitimate address expression)
732 has an effect that depends on the machine mode it is used for.
733 On the SPUR this is never true. */
735 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
737 /* Specify the machine mode that this machine uses
738 for the index in the tablejump instruction. */
739 #define CASE_VECTOR_MODE SImode
741 /* Define this if the tablejump instruction expects the table
742 to contain offsets from the address of the table.
743 Do not define this if the table should contain absolute addresses. */
744 /* #define CASE_VECTOR_PC_RELATIVE */
746 /* Specify the tree operation to be used to convert reals to integers. */
747 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
749 /* This is the kind of divide that is easiest to do in the general case. */
750 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
752 /* Define this as 1 if `char' should by default be signed; else as 0. */
753 #define DEFAULT_SIGNED_CHAR 0
755 /* Max number of bytes we can move from memory to memory
756 in one reasonably fast instruction. */
759 /* Nonzero if access to memory by bytes is slow and undesirable. */
760 #define SLOW_BYTE_ACCESS 1
762 /* This is BSD, so it wants DBX format. */
763 #define DBX_DEBUGGING_INFO
765 /* Do not break .stabs pseudos into continuations. */
766 #define DBX_CONTIN_LENGTH 0
768 /* Don't try to use the `x' type-cross-reference character in DBX data.
769 Also has the consequence of putting each struct, union or enum
770 into a separate .stabs, containing only cross-refs to the others. */
773 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
774 is done just by pretending it is already truncated. */
775 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
777 /* Specify the machine mode that pointers have.
778 After generation of rtl, the compiler makes no further distinction
779 between pointers and any other objects of this machine mode. */
782 /* A function address in a call instruction
783 is a byte address (for indexing purposes)
784 so give the MEM rtx a byte's mode. */
785 #define FUNCTION_MODE SImode
787 /* Define this if addresses of constant functions
788 shouldn't be put through pseudo regs where they can be cse'd.
789 Desirable on machines where ordinary constants are expensive
790 but a CALL with constant address is cheap. */
791 #define NO_FUNCTION_CSE
793 /* Compute the cost of computing a constant rtl expression RTX
794 whose rtx-code is CODE. The body of this macro is a portion
795 of a switch statement. If the code is computed here,
796 return it with a return statement. Otherwise, break from the switch. */
798 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
800 if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \
808 /* Tell final.c how to eliminate redundant test instructions. */
810 /* Here we define machine-dependent flags and fields in cc_status
811 (see `conditions.h'). */
813 /* (None are needed on SPUR.) */
815 /* Store in cc_status the expressions
816 that the condition codes will describe
817 after execution of an instruction whose pattern is EXP.
818 Do not alter them if the instruction would not alter the cc's. */
820 /* The SPUR does not really have a condition code. */
822 #define NOTICE_UPDATE_CC(EXP, INSN) \
825 /* Control the assembler format that we output. */
827 /* Output at beginning of assembler file. */
829 #define ASM_FILE_START(FILE)
831 /* Output to assembler file text saying following lines
832 may contain character constants, extra white space, comments, etc. */
834 #define ASM_APP_ON ""
836 /* Output to assembler file text saying following lines
837 no longer contain unusual constructs. */
839 #define ASM_APP_OFF ""
841 /* Output before read-only data. */
843 #define TEXT_SECTION_ASM_OP ".text"
845 /* Output before writable data. */
847 #define DATA_SECTION_ASM_OP ".data"
849 /* How to refer to registers in assembler output.
850 This sequence is indexed by compiler's hard-register-number (see above). */
852 #define REGISTER_NAMES \
853 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
854 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
855 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
857 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
858 "f10", "f11", "f12", "f13", "f14" }
860 /* How to renumber registers for dbx and gdb. */
862 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
864 /* This is how to output the definition of a user-level label named NAME,
865 such as the label on a static function or variable NAME. */
867 #define ASM_OUTPUT_LABEL(FILE,NAME) \
868 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
870 /* This is how to output a command to make the user-level label named NAME
871 defined for reference from other files. */
873 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
874 do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
876 /* This is how to output a reference to a user-level label named NAME.
877 `assemble_name' uses this. */
879 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
880 fprintf (FILE, "_%s", NAME)
882 /* This is how to output an internal numbered label where
883 PREFIX is the class of label and NUM is the number within the class. */
885 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
886 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
888 /* This is how to store into the string LABEL
889 the symbol_ref name of an internal numbered label where
890 PREFIX is the class of label and NUM is the number within the class.
891 This is suitable for output with `assemble_name'. */
893 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
894 sprintf (LABEL, "*%s%d", PREFIX, NUM)
896 /* This is how to output an assembler line defining a `double' constant. */
898 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
899 fprintf (FILE, "\t.double %.20e\n", (VALUE))
901 /* This is how to output an assembler line defining a `float' constant. */
903 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
904 fprintf (FILE, "\t.single %.12e\n", (VALUE))
906 /* This is how to output an assembler line defining an `int' constant. */
908 #define ASM_OUTPUT_INT(FILE,VALUE) \
909 ( fprintf (FILE, "\t.long "), \
910 output_addr_const (FILE, (VALUE)), \
911 fprintf (FILE, "\n"))
913 /* Likewise for `char' and `short' constants. */
915 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
916 ( fprintf (FILE, "\t.word "), \
917 output_addr_const (FILE, (VALUE)), \
918 fprintf (FILE, "\n"))
920 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
921 ( fprintf (FILE, "\t.byte "), \
922 output_addr_const (FILE, (VALUE)), \
923 fprintf (FILE, "\n"))
925 /* This is how to output an assembler line for a numeric constant byte. */
927 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
928 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
930 /* This is how to output code to push a register on the stack.
931 It need not be very fast code. */
933 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
934 fprintf (FILE, "\tadd_nt r4,r4,$-4\n\tst_32 %s,r4,$0\n", reg_names[REGNO])
936 /* This is how to output an insn to pop a register from the stack.
937 It need not be very fast code. */
939 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
940 fprintf (FILE, "\tld_32 %s,r4,$0\n\tadd_nt r4,r4,$4\n", reg_names[REGNO])
942 /* This is how to output an element of a case-vector that is absolute. */
944 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
945 fprintf (FILE, "\t.long L%d\n", VALUE)
947 /* This is how to output an element of a case-vector that is relative.
948 (SPUR does not use such vectors,
949 but we must define this macro anyway.) */
951 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
952 fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
954 /* This is how to output an assembler line
955 that says to advance the location counter
956 to a multiple of 2**LOG bytes. */
958 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
960 fprintf (FILE, "\t.align %d\n", (LOG))
962 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
963 fprintf (FILE, "\t.space %u\n", (SIZE))
965 /* This says how to output an assembler line
966 to define a global common symbol. */
968 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
969 ( fputs (".comm ", (FILE)), \
970 assemble_name ((FILE), (NAME)), \
971 fprintf ((FILE), ",%u\n", (ROUNDED)))
973 /* This says how to output an assembler line
974 to define a local common symbol. */
976 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
977 ( fputs (".lcomm ", (FILE)), \
978 assemble_name ((FILE), (NAME)), \
979 fprintf ((FILE), ",%u\n", (ROUNDED)))
981 /* Store in OUTPUT a string (made with alloca) containing
982 an assembler-name for a local static variable named NAME.
983 LABELNO is an integer which is different for each call. */
985 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
986 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
987 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
989 /* Define the parentheses used to group arithmetic operations
990 in assembler code. */
992 #define ASM_OPEN_PAREN "("
993 #define ASM_CLOSE_PAREN ")"
995 /* Define results of standard character escape sequences. */
996 #define TARGET_BELL 007
997 #define TARGET_BS 010
998 #define TARGET_TAB 011
999 #define TARGET_NEWLINE 012
1000 #define TARGET_VT 013
1001 #define TARGET_FF 014
1002 #define TARGET_CR 015
1004 /* Print operand X (an rtx) in assembler syntax to file FILE.
1005 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1006 For `%' followed by punctuation, CODE is the punctuation and X is null.
1008 On SPUR, the CODE can be `r', meaning this is a register-only operand
1009 and an immediate zero should be represented as `r0'. */
1011 #define PRINT_OPERAND(FILE, X, CODE) \
1012 { if (GET_CODE (X) == REG) \
1013 fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1014 else if (GET_CODE (X) == MEM) \
1015 output_address (XEXP (X, 0)); \
1016 else if (GET_CODE (X) == CONST_DOUBLE) \
1018 else if ((CODE) == 'r' && (X) == const0_rtx) \
1019 fprintf (FILE, "r0"); \
1020 else { putc ('$', FILE); output_addr_const (FILE, X); }}
1022 /* Print a memory address as an operand to reference that memory location. */
1024 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1025 { register rtx base, index = 0; \
1027 register rtx addr = ADDR; \
1028 if (GET_CODE (addr) == REG) \
1030 fprintf (FILE, "%s,$0", reg_names[REGNO (addr)]); \
1032 else if (GET_CODE (addr) == PLUS) \
1034 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1035 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1036 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1037 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1039 base = XEXP (addr, 0), index = XEXP (addr, 1); \
1040 fprintf (FILE, "%s,", reg_names[REGNO (base)]); \
1042 fprintf (FILE, "$%d", offset); \
1044 fprintf (FILE, "%s,", reg_names[REGNO (index)]); \
1048 fprintf (FILE, "r24,$("); \
1049 output_addr_const (FILE, addr); \
1050 fprintf (FILE, "-0b)"); \