config.gcc: Unify V850 architecture options and add support for newer V850 architectures.
[gcc.git] / gcc / config / v850 / v850.h
1 /* Definitions of target machine for GNU compiler. NEC V850 series
2 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
4 Contributed by Jeff Law (law@cygnus.com).
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #ifndef GCC_V850_H
23 #define GCC_V850_H
24
25 extern GTY(()) rtx v850_compare_op0;
26 extern GTY(()) rtx v850_compare_op1;
27
28 #undef LIB_SPEC
29 #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -lgcc --end-group}}"
30
31 #undef ENDFILE_SPEC
32 #undef LINK_SPEC
33 #undef STARTFILE_SPEC
34 #undef ASM_SPEC
35
36 #define TARGET_CPU_generic 1
37 #define TARGET_CPU_v850e 2
38 #define TARGET_CPU_v850e1 3
39 #define TARGET_CPU_v850e2 4
40 #define TARGET_CPU_v850e2v3 5
41
42
43 #ifndef TARGET_CPU_DEFAULT
44 #define TARGET_CPU_DEFAULT TARGET_CPU_generic
45 #endif
46
47 #define MASK_DEFAULT MASK_V850
48 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850}"
49 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850__}"
50
51 /* Choose which processor will be the default.
52 We must pass a -mv850xx option to the assembler if no explicit -mv* option
53 is given, because the assembler's processor default may not be correct. */
54 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e
55 #undef MASK_DEFAULT
56 #define MASK_DEFAULT MASK_V850E
57 #undef SUBTARGET_ASM_SPEC
58 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e}"
59 #undef SUBTARGET_CPP_SPEC
60 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e__}"
61 #endif
62
63 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1
64 #undef MASK_DEFAULT
65 #define MASK_DEFAULT MASK_V850E /* No practical difference. */
66 #undef SUBTARGET_ASM_SPEC
67 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}"
68 #undef SUBTARGET_CPP_SPEC
69 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}"
70 #endif
71
72 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2
73 #undef MASK_DEFAULT
74 #define MASK_DEFAULT MASK_V850E2
75 #undef SUBTARGET_ASM_SPEC
76 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2}"
77 #undef SUBTARGET_CPP_SPEC
78 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2__} %{mv850e2:-D__v850e2__}"
79 #endif
80
81 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2v3
82 #undef MASK_DEFAULT
83 #define MASK_DEFAULT MASK_V850E2V3
84 #undef SUBTARGET_ASM_SPEC
85 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2v3}"
86 #undef SUBTARGET_CPP_SPEC
87 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2v3__} %{mv850e2v3:-D__v850e2v3__}"
88 #endif
89
90 #define TARGET_V850E2_ALL (TARGET_V850E2 || TARGET_V850E2V3)
91
92 #define ASM_SPEC "%{mv850es:-mv850e1}%{!mv850es:%{mv*:-mv%*}}"
93 #define CPP_SPEC "\
94 %{mv850e2v3:-D__v850e2v3__} \
95 %{mv850e2:-D__v850e2__} \
96 %{mv850es:-D__v850e1__} \
97 %{mv850e1:-D__v850e1__} \
98 %{mv850:-D__v850__} \
99 %(subtarget_cpp_spec)" \
100 " %{mep:-D__EP__}"
101
102 #define EXTRA_SPECS \
103 { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
104 { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }
105
106 /* Names to predefine in the preprocessor for this target machine. */
107 #define TARGET_CPU_CPP_BUILTINS() do { \
108 builtin_define( "__v851__" ); \
109 builtin_define( "__v850" ); \
110 builtin_assert( "machine=v850" ); \
111 builtin_assert( "cpu=v850" ); \
112 if (TARGET_EP) \
113 builtin_define ("__EP__"); \
114 } while(0)
115
116 #define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3)
117 \f
118 /* Target machine storage layout */
119
120 /* Define this if most significant bit is lowest numbered
121 in instructions that operate on numbered bit-fields.
122 This is not true on the NEC V850. */
123 #define BITS_BIG_ENDIAN 0
124
125 /* Define this if most significant byte of a word is the lowest numbered. */
126 /* This is not true on the NEC V850. */
127 #define BYTES_BIG_ENDIAN 0
128
129 /* Define this if most significant word of a multiword number is lowest
130 numbered.
131 This is not true on the NEC V850. */
132 #define WORDS_BIG_ENDIAN 0
133
134 /* Width of a word, in units (bytes). */
135 #define UNITS_PER_WORD 4
136
137 /* Define this macro if it is advisable to hold scalars in registers
138 in a wider mode than that declared by the program. In such cases,
139 the value is constrained to be within the bounds of the declared
140 type, but kept valid in the wider mode. The signedness of the
141 extension may differ from that of the type.
142
143 Some simple experiments have shown that leaving UNSIGNEDP alone
144 generates the best overall code. */
145
146 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
147 if (GET_MODE_CLASS (MODE) == MODE_INT \
148 && GET_MODE_SIZE (MODE) < 4) \
149 { (MODE) = SImode; }
150
151 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
152 #define PARM_BOUNDARY 32
153
154 /* The stack goes in 32-bit lumps. */
155 #define STACK_BOUNDARY 32
156
157 /* Allocation boundary (in *bits*) for the code of a function.
158 16 is the minimum boundary; 32 would give better performance. */
159 #define FUNCTION_BOUNDARY (optimize_size ? 16 : 32)
160
161 /* No data type wants to be aligned rounder than this. */
162 #define BIGGEST_ALIGNMENT 32
163
164 /* Alignment of field after `int : 0' in a structure. */
165 #define EMPTY_FIELD_BOUNDARY 32
166
167 /* No structure field wants to be aligned rounder than this. */
168 #define BIGGEST_FIELD_ALIGNMENT 32
169
170 /* Define this if move instructions will actually fail to work
171 when given unaligned data. */
172 #define STRICT_ALIGNMENT (!TARGET_NO_STRICT_ALIGN)
173
174 /* Define this as 1 if `char' should by default be signed; else as 0.
175
176 On the NEC V850, loads do sign extension, so make this default. */
177 #define DEFAULT_SIGNED_CHAR 1
178
179 #undef SIZE_TYPE
180 #define SIZE_TYPE "unsigned int"
181
182 #undef PTRDIFF_TYPE
183 #define PTRDIFF_TYPE "int"
184
185 #undef WCHAR_TYPE
186 #define WCHAR_TYPE "long int"
187
188 #undef WCHAR_TYPE_SIZE
189 #define WCHAR_TYPE_SIZE BITS_PER_WORD
190 \f
191 /* Standard register usage. */
192
193 /* Number of actual hardware registers.
194 The hardware registers are assigned numbers for the compiler
195 from 0 to just below FIRST_PSEUDO_REGISTER.
196
197 All registers that the compiler knows about must be given numbers,
198 even those that are not normally considered general registers. */
199
200 #define FIRST_PSEUDO_REGISTER 36
201
202 /* 1 for registers that have pervasive standard uses
203 and are not available for the register allocator. */
204
205 #define FIXED_REGISTERS \
206 { 1, 1, 1, 1, 1, 1, 0, 0, \
207 0, 0, 0, 0, 0, 0, 0, 0, \
208 0, 0, 0, 0, 0, 0, 0, 0, \
209 0, 0, 0, 0, 0, 0, 1, 0, \
210 1, 1, \
211 1, 1}
212
213 /* 1 for registers not available across function calls.
214 These must include the FIXED_REGISTERS and also any
215 registers that can be used without being saved.
216 The latter must include the registers where values are returned
217 and the register where structure-value addresses are passed.
218 Aside from that, you can include as many other registers as you
219 like. */
220
221 #define CALL_USED_REGISTERS \
222 { 1, 1, 1, 1, 1, 1, 1, 1, \
223 1, 1, 1, 1, 1, 1, 1, 1, \
224 1, 1, 1, 1, 0, 0, 0, 0, \
225 0, 0, 0, 0, 0, 0, 1, 1, \
226 1, 1, \
227 1, 1}
228
229 /* List the order in which to allocate registers. Each register must be
230 listed once, even those in FIXED_REGISTERS.
231
232 On the 850, we make the return registers first, then all of the volatile
233 registers, then the saved registers in reverse order to better save the
234 registers with an out of line function, and finally the fixed
235 registers. */
236
237 #define REG_ALLOC_ORDER \
238 { \
239 10, 11, /* return registers */ \
240 12, 13, 14, 15, 16, 17, 18, 19, /* scratch registers */ \
241 6, 7, 8, 9, 31, /* argument registers */ \
242 29, 28, 27, 26, 25, 24, 23, 22, /* saved registers */ \
243 21, 20, 2, \
244 0, 1, 3, 4, 5, 30, 32, 33, /* fixed registers */ \
245 34, 35 \
246 }
247
248 /* Return number of consecutive hard regs needed starting at reg REGNO
249 to hold something of mode MODE.
250
251 This is ordinarily the length in words of a value of mode MODE
252 but can be less for certain modes in special long registers. */
253
254 #define HARD_REGNO_NREGS(REGNO, MODE) \
255 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
256
257 /* Value is 1 if hard register REGNO can hold a value of machine-mode
258 MODE. */
259
260 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
261 ((GET_MODE_SIZE (MODE) <= 4) || (((REGNO) & 1) == 0 && (REGNO) != 0))
262
263 /* Value is 1 if it is a good idea to tie two pseudo registers
264 when one has mode MODE1 and one has mode MODE2.
265 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
266 for any hard reg, then this must be 0 for correct output. */
267 #define MODES_TIEABLE_P(MODE1, MODE2) \
268 (MODE1 == MODE2 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
269
270 \f
271 /* Define the classes of registers for register constraints in the
272 machine description. Also define ranges of constants.
273
274 One of the classes must always be named ALL_REGS and include all hard regs.
275 If there is more than one class, another class must be named NO_REGS
276 and contain no registers.
277
278 The name GENERAL_REGS must be the name of a class (or an alias for
279 another name such as ALL_REGS). This is the class of registers
280 that is allowed by "g" or "r" in a register constraint.
281 Also, registers outside this class are allocated only when
282 instructions express preferences for them.
283
284 The classes must be numbered in nondecreasing order; that is,
285 a larger-numbered class must never be contained completely
286 in a smaller-numbered class.
287
288 For any two classes, it is very desirable that there be another
289 class that represents their union. */
290
291 enum reg_class
292 {
293 NO_REGS, GENERAL_REGS, EVEN_REGS, ALL_REGS, LIM_REG_CLASSES
294 };
295
296 #define N_REG_CLASSES (int) LIM_REG_CLASSES
297
298 /* Give names of register classes as strings for dump file. */
299
300 #define REG_CLASS_NAMES \
301 { "NO_REGS", "GENERAL_REGS", "EVEN_REGS", "ALL_REGS", "LIM_REGS" }
302
303 /* Define which registers fit in which classes.
304 This is an initializer for a vector of HARD_REG_SET
305 of length N_REG_CLASSES. */
306
307 #define REG_CLASS_CONTENTS \
308 { \
309 { 0x00000000,0x0 }, /* NO_REGS */ \
310 { 0xffffffff,0x0 }, /* GENERAL_REGS */ \
311 { 0x55555554,0x0 }, /* EVEN_REGS */ \
312 { 0xffffffff,0x0 }, /* ALL_REGS */ \
313 }
314
315 /* The same information, inverted:
316 Return the class number of the smallest class containing
317 reg number REGNO. This could be a conditional expression
318 or could index an array. */
319
320 #define REGNO_REG_CLASS(REGNO) ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_REGS)
321
322 /* The class value for index registers, and the one for base regs. */
323
324 #define INDEX_REG_CLASS NO_REGS
325 #define BASE_REG_CLASS GENERAL_REGS
326
327 /* Macros to check register numbers against specific register classes. */
328
329 /* These assume that REGNO is a hard or pseudo reg number.
330 They give nonzero only if REGNO is a hard reg of the suitable class
331 or a pseudo reg currently allocated to a suitable hard reg.
332 Since they use reg_renumber, they are safe only once reg_renumber
333 has been allocated, which happens in local-alloc.c. */
334
335 #define REGNO_OK_FOR_BASE_P(regno) \
336 (((regno) < FIRST_PSEUDO_REGISTER \
337 && (regno) != CC_REGNUM \
338 && (regno) != FCC_REGNUM) \
339 || reg_renumber[regno] >= 0)
340
341 #define REGNO_OK_FOR_INDEX_P(regno) 0
342
343 /* Return the maximum number of consecutive registers
344 needed to represent mode MODE in a register of class CLASS. */
345
346 #define CLASS_MAX_NREGS(CLASS, MODE) \
347 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
348
349 /* Convenience wrappers around insn_const_int_ok_for_constraint. */
350
351 #define CONST_OK_FOR_I(VALUE) \
352 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I)
353 #define CONST_OK_FOR_J(VALUE) \
354 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J)
355 #define CONST_OK_FOR_K(VALUE) \
356 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K)
357 #define CONST_OK_FOR_L(VALUE) \
358 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L)
359 #define CONST_OK_FOR_M(VALUE) \
360 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M)
361 #define CONST_OK_FOR_N(VALUE) \
362 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N)
363 #define CONST_OK_FOR_O(VALUE) \
364 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O)
365
366 \f
367 /* Stack layout; function entry, exit and calling. */
368
369 /* Define this if pushing a word on the stack
370 makes the stack pointer a smaller address. */
371
372 #define STACK_GROWS_DOWNWARD
373
374 /* Define this to nonzero if the nominal address of the stack frame
375 is at the high-address end of the local variables;
376 that is, each additional local variable allocated
377 goes at a more negative offset in the frame. */
378
379 #define FRAME_GROWS_DOWNWARD 1
380
381 /* Offset within stack frame to start allocating local variables at.
382 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
383 first local allocated. Otherwise, it is the offset to the BEGINNING
384 of the first local allocated. */
385
386 #define STARTING_FRAME_OFFSET 0
387
388 /* Offset of first parameter from the argument pointer register value. */
389 /* Is equal to the size of the saved fp + pc, even if an fp isn't
390 saved since the value is used before we know. */
391
392 #define FIRST_PARM_OFFSET(FNDECL) 0
393
394 /* Specify the registers used for certain standard purposes.
395 The values of these macros are register numbers. */
396
397 /* Register to use for pushing function arguments. */
398 #define STACK_POINTER_REGNUM SP_REGNUM
399
400 /* Base register for access to local variables of the function. */
401 #define FRAME_POINTER_REGNUM 34
402
403 /* Register containing return address from latest function call. */
404 #define LINK_POINTER_REGNUM LP_REGNUM
405
406 /* On some machines the offset between the frame pointer and starting
407 offset of the automatic variables is not known until after register
408 allocation has been done (for example, because the saved registers
409 are between these two locations). On those machines, define
410 `FRAME_POINTER_REGNUM' the number of a special, fixed register to
411 be used internally until the offset is known, and define
412 `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number
413 used for the frame pointer.
414
415 You should define this macro only in the very rare circumstances
416 when it is not possible to calculate the offset between the frame
417 pointer and the automatic variables until after register
418 allocation has been completed. When this macro is defined, you
419 must also indicate in your definition of `ELIMINABLE_REGS' how to
420 eliminate `FRAME_POINTER_REGNUM' into either
421 `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'.
422
423 Do not define this macro if it would be the same as
424 `FRAME_POINTER_REGNUM'. */
425 #undef HARD_FRAME_POINTER_REGNUM
426 #define HARD_FRAME_POINTER_REGNUM 29
427
428 /* Base register for access to arguments of the function. */
429 #define ARG_POINTER_REGNUM 35
430
431 /* Register in which static-chain is passed to a function. */
432 #define STATIC_CHAIN_REGNUM 20
433
434 /* If defined, this macro specifies a table of register pairs used to
435 eliminate unneeded registers that point into the stack frame. If
436 it is not defined, the only elimination attempted by the compiler
437 is to replace references to the frame pointer with references to
438 the stack pointer.
439
440 The definition of this macro is a list of structure
441 initializations, each of which specifies an original and
442 replacement register.
443
444 On some machines, the position of the argument pointer is not
445 known until the compilation is completed. In such a case, a
446 separate hard register must be used for the argument pointer.
447 This register can be eliminated by replacing it with either the
448 frame pointer or the argument pointer, depending on whether or not
449 the frame pointer has been eliminated.
450
451 In this case, you might specify:
452 #define ELIMINABLE_REGS \
453 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
454 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
455 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
456
457 Note that the elimination of the argument pointer with the stack
458 pointer is specified first since that is the preferred elimination. */
459
460 #define ELIMINABLE_REGS \
461 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
462 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
463 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
464 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \
465
466 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
467 specifies the initial difference between the specified pair of
468 registers. This macro must be defined if `ELIMINABLE_REGS' is
469 defined. */
470
471 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
472 { \
473 if ((FROM) == FRAME_POINTER_REGNUM) \
474 (OFFSET) = get_frame_size () + crtl->outgoing_args_size; \
475 else if ((FROM) == ARG_POINTER_REGNUM) \
476 (OFFSET) = compute_frame_size (get_frame_size (), (long *)0); \
477 else \
478 gcc_unreachable (); \
479 }
480
481 /* Keep the stack pointer constant throughout the function. */
482 #define ACCUMULATE_OUTGOING_ARGS 1
483
484 #define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT)
485 \f
486 /* Define a data type for recording info about an argument list
487 during the scan of that argument list. This data type should
488 hold all necessary information about the function itself
489 and about the args processed so far, enough to enable macros
490 such as FUNCTION_ARG to determine where the next arg should go. */
491
492 #define CUMULATIVE_ARGS struct cum_arg
493 struct cum_arg { int nbytes; int anonymous_args; };
494
495 /* Initialize a variable CUM of type CUMULATIVE_ARGS
496 for a call to a function whose data type is FNTYPE.
497 For a library call, FNTYPE is 0. */
498
499 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
500 ((CUM).nbytes = 0, (CUM).anonymous_args = 0)
501
502 /* When a parameter is passed in a register, stack space is still
503 allocated for it. */
504 #define REG_PARM_STACK_SPACE(DECL) 0
505
506 /* 1 if N is a possible register number for function argument passing. */
507
508 #define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9)
509
510 /* Define how to find the value returned by a library function
511 assuming the value has mode MODE. */
512
513 #define LIBCALL_VALUE(MODE) \
514 gen_rtx_REG (MODE, 10)
515
516 #define DEFAULT_PCC_STRUCT_RETURN 0
517
518 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
519 the stack pointer does not matter. The value is tested only in
520 functions that have frame pointers.
521 No definition is equivalent to always zero. */
522
523 #define EXIT_IGNORE_STACK 1
524
525 /* Define this macro as a C expression that is nonzero for registers
526 used by the epilogue or the `return' pattern. */
527
528 #define EPILOGUE_USES(REGNO) \
529 (reload_completed && (REGNO) == LINK_POINTER_REGNUM)
530
531 /* Output assembler code to FILE to increment profiler label # LABELNO
532 for profiling a function entry. */
533
534 #define FUNCTION_PROFILER(FILE, LABELNO) ;
535
536 /* Length in units of the trampoline for entering a nested function. */
537
538 #define TRAMPOLINE_SIZE 24
539
540 /* Addressing modes, and classification of registers for them. */
541
542 \f
543 /* 1 if X is an rtx for a constant that is a valid address. */
544
545 /* ??? This seems too exclusive. May get better code by accepting more
546 possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */
547
548 #define CONSTANT_ADDRESS_P(X) constraint_satisfied_p (X, CONSTRAINT_K)
549
550 /* Maximum number of registers that can appear in a valid memory address. */
551
552 #define MAX_REGS_PER_ADDRESS 1
553
554 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
555 and check its validity for a certain class.
556 We have two alternate definitions for each of them.
557 The usual definition accepts all pseudo regs; the other rejects
558 them unless they have been allocated suitable hard regs.
559 The symbol REG_OK_STRICT causes the latter definition to be used.
560
561 Most source files want to accept pseudo regs in the hope that
562 they will get allocated to the class that the insn wants them to be in.
563 Source files for reload pass need to be strict.
564 After reload, it makes no difference, since pseudo regs have
565 been eliminated by then. */
566
567 #ifndef REG_OK_STRICT
568
569 /* Nonzero if X is a hard reg that can be used as an index
570 or if it is a pseudo reg. */
571 #define REG_OK_FOR_INDEX_P(X) 0
572 /* Nonzero if X is a hard reg that can be used as a base reg
573 or if it is a pseudo reg. */
574 #define REG_OK_FOR_BASE_P(X) 1
575 #define REG_OK_FOR_INDEX_P_STRICT(X) 0
576 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
577 #define STRICT 0
578
579 #else
580
581 /* Nonzero if X is a hard reg that can be used as an index. */
582 #define REG_OK_FOR_INDEX_P(X) 0
583 /* Nonzero if X is a hard reg that can be used as a base reg. */
584 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
585 #define STRICT 1
586
587 #endif
588
589 \f
590 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
591 that is a valid memory address for an instruction.
592 The MODE argument is the machine mode for the MEM expression
593 that wants to use this address.
594
595 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
596 except for CONSTANT_ADDRESS_P which is actually
597 machine-independent. */
598
599 /* Accept either REG or SUBREG where a register is valid. */
600
601 #define RTX_OK_FOR_BASE_P(X) \
602 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
603 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
604 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
605
606 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
607 do { \
608 if (RTX_OK_FOR_BASE_P (X)) \
609 goto ADDR; \
610 if (CONSTANT_ADDRESS_P (X) \
611 && (MODE == QImode || INTVAL (X) % 2 == 0) \
612 && (GET_MODE_SIZE (MODE) <= 4 || INTVAL (X) % 4 == 0)) \
613 goto ADDR; \
614 if (GET_CODE (X) == LO_SUM \
615 && REG_P (XEXP (X, 0)) \
616 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
617 && CONSTANT_P (XEXP (X, 1)) \
618 && (GET_CODE (XEXP (X, 1)) != CONST_INT \
619 || ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
620 && CONST_OK_FOR_K (INTVAL (XEXP (X, 1))))) \
621 && GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode)) \
622 goto ADDR; \
623 if (special_symbolref_operand (X, MODE) \
624 && (GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode))) \
625 goto ADDR; \
626 if (GET_CODE (X) == PLUS \
627 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
628 && constraint_satisfied_p (XEXP (X,1), CONSTRAINT_K) \
629 && ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
630 && CONST_OK_FOR_K (INTVAL (XEXP (X, 1)) \
631 + (GET_MODE_NUNITS (MODE) * UNITS_PER_WORD)))) \
632 goto ADDR; \
633 } while (0)
634
635 \f
636 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
637 return the mode to be used for the comparison.
638
639 For floating-point equality comparisons, CCFPEQmode should be used.
640 VOIDmode should be used in all other cases.
641
642 For integer comparisons against zero, reduce to CCNOmode or CCZmode if
643 possible, to allow for more combinations. */
644
645 #define SELECT_CC_MODE(OP, X, Y) v850_select_cc_mode (OP, X, Y)
646
647 /* Tell final.c how to eliminate redundant test instructions. */
648
649 /* Here we define machine-dependent flags and fields in cc_status
650 (see `conditions.h'). No extra ones are needed for the VAX. */
651
652 /* Store in cc_status the expressions
653 that the condition codes will describe
654 after execution of an instruction whose pattern is EXP.
655 Do not alter them if the instruction would not alter the cc's. */
656
657 #define CC_OVERFLOW_UNUSABLE 0x200
658 #define CC_NO_CARRY CC_NO_OVERFLOW
659 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
660
661 /* Nonzero if access to memory by bytes or half words is no faster
662 than accessing full words. */
663 #define SLOW_BYTE_ACCESS 1
664
665 /* According expr.c, a value of around 6 should minimize code size, and
666 for the V850 series, that's our primary concern. */
667 #define MOVE_RATIO(speed) 6
668
669 /* Indirect calls are expensive, never turn a direct call
670 into an indirect call. */
671 #define NO_FUNCTION_CSE
672
673 /* The four different data regions on the v850. */
674 typedef enum
675 {
676 DATA_AREA_NORMAL,
677 DATA_AREA_SDA,
678 DATA_AREA_TDA,
679 DATA_AREA_ZDA
680 } v850_data_area;
681
682 #define TEXT_SECTION_ASM_OP "\t.section .text"
683 #define DATA_SECTION_ASM_OP "\t.section .data"
684 #define BSS_SECTION_ASM_OP "\t.section .bss"
685 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\""
686 #define SBSS_SECTION_ASM_OP "\t.section .sbss,\"aw\""
687
688 #define SCOMMON_ASM_OP "\t.scomm\t"
689 #define ZCOMMON_ASM_OP "\t.zcomm\t"
690 #define TCOMMON_ASM_OP "\t.tcomm\t"
691
692 #define ASM_COMMENT_START "#"
693
694 /* Output to assembler file text saying following lines
695 may contain character constants, extra white space, comments, etc. */
696
697 #define ASM_APP_ON "#APP\n"
698
699 /* Output to assembler file text saying following lines
700 no longer contain unusual constructs. */
701
702 #define ASM_APP_OFF "#NO_APP\n"
703
704 #undef USER_LABEL_PREFIX
705 #define USER_LABEL_PREFIX "_"
706
707 /* This says how to output the assembler to define a global
708 uninitialized but not common symbol. */
709
710 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
711 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
712
713 #undef ASM_OUTPUT_ALIGNED_BSS
714 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
715 v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
716
717 /* This says how to output the assembler to define a global
718 uninitialized, common symbol. */
719 #undef ASM_OUTPUT_ALIGNED_COMMON
720 #undef ASM_OUTPUT_COMMON
721 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
722 v850_output_common (FILE, DECL, NAME, SIZE, ALIGN)
723
724 /* This says how to output the assembler to define a local
725 uninitialized symbol. */
726 #undef ASM_OUTPUT_ALIGNED_LOCAL
727 #undef ASM_OUTPUT_LOCAL
728 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
729 v850_output_local (FILE, DECL, NAME, SIZE, ALIGN)
730
731 /* Globalizing directive for a label. */
732 #define GLOBAL_ASM_OP "\t.global "
733
734 #define ASM_PN_FORMAT "%s___%lu"
735
736 /* This is how we tell the assembler that two symbols have the same value. */
737
738 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
739 do { assemble_name(FILE, NAME1); \
740 fputs(" = ", FILE); \
741 assemble_name(FILE, NAME2); \
742 fputc('\n', FILE); } while (0)
743
744
745 /* How to refer to registers in assembler output.
746 This sequence is indexed by compiler's hard-register-number (see above). */
747
748 #define REGISTER_NAMES \
749 { "r0", "r1", "r2", "sp", "gp", "r5", "r6" , "r7", \
750 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
751 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
752 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31", \
753 "psw", "fcc", \
754 ".fp", ".ap"}
755
756 /* Register numbers */
757
758 #define ADDITIONAL_REGISTER_NAMES \
759 { { "zero", ZERO_REGNUM }, \
760 { "hp", 2 }, \
761 { "r3", 3 }, \
762 { "r4", 4 }, \
763 { "tp", 5 }, \
764 { "fp", 29 }, \
765 { "r30", 30 }, \
766 { "lp", LP_REGNUM} }
767
768 /* This is how to output an element of a case-vector that is absolute. */
769
770 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
771 fprintf (FILE, "\t%s .L%d\n", \
772 (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE)
773
774 /* This is how to output an element of a case-vector that is relative. */
775
776 /* Disable the shift, which is for the currently disabled "switch"
777 opcode. Se casesi in v850.md. */
778
779 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
780 fprintf (FILE, "\t%s %s.L%d-.L%d%s\n", \
781 (TARGET_BIG_SWITCH ? ".long" : ".short"), \
782 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E || TARGET_V850E2_ALL) ? "(" : ""), \
783 VALUE, REL, \
784 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E || TARGET_V850E2_ALL) ? ")>>1" : ""))
785
786 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
787 if ((LOG) != 0) \
788 fprintf (FILE, "\t.align %d\n", (LOG))
789
790 /* We don't have to worry about dbx compatibility for the v850. */
791 #define DEFAULT_GDB_EXTENSIONS 1
792
793 /* Use stabs debugging info by default. */
794 #undef PREFERRED_DEBUGGING_TYPE
795 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
796
797 /* Specify the machine mode that this machine uses
798 for the index in the tablejump instruction. */
799 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode)
800
801 /* Define as C expression which evaluates to nonzero if the tablejump
802 instruction expects the table to contain offsets from the address of the
803 table.
804 Do not define this if the table should contain absolute addresses. */
805 #define CASE_VECTOR_PC_RELATIVE 1
806
807 /* The switch instruction requires that the jump table immediately follow
808 it. */
809 #define JUMP_TABLES_IN_TEXT_SECTION (!TARGET_JUMP_TABLES_IN_DATA_SECTION)
810
811 #undef ASM_OUTPUT_BEFORE_CASE_LABEL
812 #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
813 ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1));
814
815 #define WORD_REGISTER_OPERATIONS
816
817 /* Byte and short loads sign extend the value to a word. */
818 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
819
820 /* This flag, if defined, says the same insns that convert to a signed fixnum
821 also convert validly to an unsigned one. */
822 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
823
824 /* Max number of bytes we can move from memory to memory
825 in one reasonably fast instruction. */
826 #define MOVE_MAX 4
827
828 /* Define if shifts truncate the shift count
829 which implies one can omit a sign-extension or zero-extension
830 of a shift count. */
831 #define SHIFT_COUNT_TRUNCATED 1
832
833 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
834 is done just by pretending it is already truncated. */
835 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
836
837 /* Specify the machine mode that pointers have.
838 After generation of rtl, the compiler makes no further distinction
839 between pointers and any other objects of this machine mode. */
840 #define Pmode SImode
841
842 /* A function address in a call instruction
843 is a byte address (for indexing purposes)
844 so give the MEM rtx a byte's mode. */
845 #define FUNCTION_MODE QImode
846
847 /* Tell compiler we want to support GHS pragmas */
848 #define REGISTER_TARGET_PRAGMAS() do { \
849 c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt); \
850 c_register_pragma ("ghs", "section", ghs_pragma_section); \
851 c_register_pragma ("ghs", "starttda", ghs_pragma_starttda); \
852 c_register_pragma ("ghs", "startsda", ghs_pragma_startsda); \
853 c_register_pragma ("ghs", "startzda", ghs_pragma_startzda); \
854 c_register_pragma ("ghs", "endtda", ghs_pragma_endtda); \
855 c_register_pragma ("ghs", "endsda", ghs_pragma_endsda); \
856 c_register_pragma ("ghs", "endzda", ghs_pragma_endzda); \
857 } while (0)
858
859 /* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that
860 can appear in the "ghs section" pragma. These names are used to index
861 into the GHS_default_section_names[] and GHS_current_section_names[]
862 that are defined in v850.c, and so the ordering of each must remain
863 consistent.
864
865 These arrays give the default and current names for each kind of
866 section defined by the GHS pragmas. The current names can be changed
867 by the "ghs section" pragma. If the current names are null, use
868 the default names. Note that the two arrays have different types.
869
870 For the *normal* section kinds (like .data, .text, etc.) we do not
871 want to explicitly force the name of these sections, but would rather
872 let the linker (or at least the back end) choose the name of the
873 section, UNLESS the user has force a specific name for these section
874 kinds. To accomplish this set the name in ghs_default_section_names
875 to null. */
876
877 enum GHS_section_kind
878 {
879 GHS_SECTION_KIND_DEFAULT,
880
881 GHS_SECTION_KIND_TEXT,
882 GHS_SECTION_KIND_DATA,
883 GHS_SECTION_KIND_RODATA,
884 GHS_SECTION_KIND_BSS,
885 GHS_SECTION_KIND_SDATA,
886 GHS_SECTION_KIND_ROSDATA,
887 GHS_SECTION_KIND_TDATA,
888 GHS_SECTION_KIND_ZDATA,
889 GHS_SECTION_KIND_ROZDATA,
890
891 COUNT_OF_GHS_SECTION_KINDS /* must be last */
892 };
893
894 /* The following code is for handling pragmas supported by the
895 v850 compiler produced by Green Hills Software. This is at
896 the specific request of a customer. */
897
898 typedef struct data_area_stack_element
899 {
900 struct data_area_stack_element * prev;
901 v850_data_area data_area; /* Current default data area. */
902 } data_area_stack_element;
903
904 /* Track the current data area set by the
905 data area pragma (which can be nested). */
906 extern data_area_stack_element * data_area_stack;
907
908 /* Names of the various data areas used on the v850. */
909 extern tree GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
910 extern tree GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
911
912 /* The assembler op to start the file. */
913
914 #define FILE_ASM_OP "\t.file\n"
915
916 /* Enable the register move pass to improve code. */
917 #define ENABLE_REGMOVE_PASS
918
919
920 /* Implement ZDA, TDA, and SDA */
921
922 #define EP_REGNUM 30 /* ep register number */
923
924 #define SYMBOL_FLAG_ZDA (SYMBOL_FLAG_MACH_DEP << 0)
925 #define SYMBOL_FLAG_TDA (SYMBOL_FLAG_MACH_DEP << 1)
926 #define SYMBOL_FLAG_SDA (SYMBOL_FLAG_MACH_DEP << 2)
927 #define SYMBOL_REF_ZDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0)
928 #define SYMBOL_REF_TDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0)
929 #define SYMBOL_REF_SDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0)
930
931 #define TARGET_ASM_INIT_SECTIONS v850_asm_init_sections
932
933 /* Define this so that the cc1plus will not think that system header files
934 need an implicit 'extern "C" { ... }' assumed. This breaks testing C++
935 in a build directory where the libstdc++ header files are found via a
936 -isystem <path-to-build-dir>. */
937 #define NO_IMPLICIT_EXTERN_C
938
939 #endif /* ! GCC_V850_H */