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target.h (init_libfuncs): New hook.
[gcc.git] / gcc / config / v850 / v850.h
1 /* Definitions of target machine for GNU compiler. NEC V850 series
2 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4 Contributed by Jeff Law (law@cygnus.com).
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #ifndef GCC_V850_H
24 #define GCC_V850_H
25
26 /* These are defined in svr4.h but we want to override them. */
27 #undef LIB_SPEC
28 #undef ENDFILE_SPEC
29 #undef LINK_SPEC
30 #undef STARTFILE_SPEC
31 #undef ASM_SPEC
32
33 #define TARGET_CPU_generic 1
34 #define TARGET_CPU_v850e 2
35 #define TARGET_CPU_v850e1 3
36
37 #ifndef TARGET_CPU_DEFAULT
38 #define TARGET_CPU_DEFAULT TARGET_CPU_generic
39 #endif
40
41 #define MASK_DEFAULT MASK_V850
42 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850}"
43 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850__}"
44 #define TARGET_VERSION fprintf (stderr, " (NEC V850)");
45
46 /* Choose which processor will be the default.
47 We must pass a -mv850xx option to the assembler if no explicit -mv* option
48 is given, because the assembler's processor default may not be correct. */
49 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e
50 #undef MASK_DEFAULT
51 #define MASK_DEFAULT MASK_V850E
52 #undef SUBTARGET_ASM_SPEC
53 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e}"
54 #undef SUBTARGET_CPP_SPEC
55 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e__}"
56 #undef TARGET_VERSION
57 #define TARGET_VERSION fprintf (stderr, " (NEC V850E)");
58 #endif
59
60 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1
61 #undef MASK_DEFAULT
62 #define MASK_DEFAULT MASK_V850E /* No practical difference. */
63 #undef SUBTARGET_ASM_SPEC
64 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}"
65 #undef SUBTARGET_CPP_SPEC
66 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}"
67 #undef TARGET_VERSION
68 #define TARGET_VERSION fprintf (stderr, " (NEC V850E1)");
69 #endif
70
71 #define ASM_SPEC "%{mv*:-mv%*}"
72 #define CPP_SPEC "%{mv850e:-D__v850e__} %{mv850:-D__v850__} %(subtarget_cpp_spec)"
73
74 #define EXTRA_SPECS \
75 { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
76 { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }
77
78 /* Names to predefine in the preprocessor for this target machine. */
79 #define TARGET_CPU_CPP_BUILTINS() do { \
80 builtin_define( "__v851__" ); \
81 builtin_define( "__v850" ); \
82 builtin_assert( "machine=v850" ); \
83 builtin_assert( "cpu=v850" ); \
84 } while(0)
85
86 /* Run-time compilation parameters selecting different hardware subsets. */
87
88 extern int target_flags;
89
90 /* Target flags bits, see below for an explanation of the bits. */
91 #define MASK_GHS 0x00000001
92 #define MASK_LONG_CALLS 0x00000002
93 #define MASK_EP 0x00000004
94 #define MASK_PROLOG_FUNCTION 0x00000008
95 #define MASK_DEBUG 0x40000000
96
97 #define MASK_CPU 0x00000030
98 #define MASK_V850 0x00000010
99 #define MASK_V850E 0x00000020
100 #define MASK_SMALL_SLD 0x00000040
101
102 #define MASK_BIG_SWITCH 0x00000100
103 #define MASK_NO_APP_REGS 0x00000200
104 #define MASK_DISABLE_CALLT 0x00000400
105 #define MASK_STRICT_ALIGN 0x00000800
106
107 #define MASK_US_BIT_SET 0x00001000
108 #define MASK_US_MASK_SET 0x00002000
109
110 /* Macros used in the machine description to test the flags. */
111
112 /* The GHS calling convention support doesn't really work,
113 mostly due to a lack of documentation. Outstanding issues:
114
115 * How do varargs & stdarg really work. How to they handle
116 passing structures (if at all).
117
118 * Doubles are normally 4 byte aligned, except in argument
119 lists where they are 8 byte aligned. Is the alignment
120 in the argument list based on the first parameter,
121 first stack parameter, etc etc.
122
123 * Passing/returning of large structures probably isn't the same
124 as GHS. We don't have enough documentation on their conventions
125 to be compatible.
126
127 * Tests of SETUP_INCOMING_VARARGS need to be made runtime checks
128 since it depends on TARGET_GHS. */
129 #define TARGET_GHS (target_flags & MASK_GHS)
130
131 /* Don't do PC-relative calls, instead load the address of the target
132 function into a register and perform a register indirect call. */
133 #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
134
135 /* Whether to optimize space by using ep (r30) for pointers with small offsets
136 in basic blocks. */
137 #define TARGET_EP (target_flags & MASK_EP)
138
139 /* Whether to call out-of-line functions to save registers or not. */
140 #define TARGET_PROLOG_FUNCTION (target_flags & MASK_PROLOG_FUNCTION)
141
142 #define TARGET_V850 ((target_flags & MASK_CPU) == MASK_V850)
143
144 /* Whether to emit 2 byte per entry or 4 byte per entry switch tables. */
145 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
146
147 /* General debug flag. */
148 #define TARGET_DEBUG (target_flags & MASK_DEBUG)
149 #define TARGET_V850E ((target_flags & MASK_V850E) == MASK_V850E)
150
151 #define TARGET_US_BIT_SET (target_flags & MASK_US_BIT_SET)
152
153 /* Whether to assume that the SLD.B and SLD.H instructions only have small
154 displacement fields, thus allowing the generated code to run on any of
155 the V850 range of processors. */
156 #define TARGET_SMALL_SLD (target_flags & MASK_SMALL_SLD)
157
158 /* True if callt will not be used for function prolog & epilog. */
159 #define TARGET_DISABLE_CALLT (target_flags & MASK_DISABLE_CALLT)
160
161 /* False if r2 and r5 can be used by the compiler. True if r2
162 and r5 are to be fixed registers (for compatibility with GHS). */
163 #define TARGET_NO_APP_REGS (target_flags & MASK_NO_APP_REGS)
164
165 #define TARGET_STRICT_ALIGN (target_flags & MASK_STRICT_ALIGN)
166
167 /* Macro to define tables used to set the flags.
168 This is a list in braces of pairs in braces,
169 each pair being { "NAME", VALUE }
170 where VALUE is the bits to set or minus the bits to clear.
171 An empty string NAME is used to identify the default VALUE. */
172
173 #define TARGET_SWITCHES \
174 {{ "ghs", MASK_GHS, N_("Support Green Hills ABI") }, \
175 { "no-ghs", -MASK_GHS, "" }, \
176 { "long-calls", MASK_LONG_CALLS, \
177 N_("Prohibit PC relative function calls") },\
178 { "no-long-calls", -MASK_LONG_CALLS, "" }, \
179 { "ep", MASK_EP, \
180 N_("Reuse r30 on a per function basis") }, \
181 { "no-ep", -MASK_EP, "" }, \
182 { "prolog-function", MASK_PROLOG_FUNCTION, \
183 N_("Use stubs for function prologues") }, \
184 { "no-prolog-function", -MASK_PROLOG_FUNCTION, "" }, \
185 { "space", MASK_EP | MASK_PROLOG_FUNCTION, \
186 N_("Same as: -mep -mprolog-function") }, \
187 { "debug", MASK_DEBUG, N_("Enable backend debugging") }, \
188 { "v850", MASK_V850, \
189 N_("Compile for the v850 processor") }, \
190 { "v850", -(MASK_V850 ^ MASK_CPU), "" }, \
191 { "v850e1", MASK_V850E, N_("Compile for v850e1 processor") }, \
192 { "v850e1", -(MASK_V850E ^ MASK_CPU), "" }, /* Make sure that the other bits are cleared. */ \
193 { "v850e", MASK_V850E, N_("Compile for v850e processor") }, \
194 { "v850e", -(MASK_V850E ^ MASK_CPU), "" }, /* Make sure that the other bits are cleared. */ \
195 { "small-sld", MASK_SMALL_SLD, N_("Enable the use of the short load instructions") }, \
196 { "no-small-sld", -MASK_SMALL_SLD, "" }, \
197 { "disable-callt", MASK_DISABLE_CALLT, \
198 N_("Do not use the callt instruction") }, \
199 { "no-disable-callt", -MASK_DISABLE_CALLT, "" }, \
200 { "US-bit-set", (MASK_US_BIT_SET | MASK_US_MASK_SET), "" }, \
201 { "no-US-bit-set", -MASK_US_BIT_SET, "" }, \
202 { "no-US-bit-set", MASK_US_MASK_SET, "" }, \
203 { "app-regs", -MASK_NO_APP_REGS, "" }, \
204 { "no-app-regs", MASK_NO_APP_REGS, \
205 N_("Do not use registers r2 and r5") }, \
206 { "strict-align", MASK_STRICT_ALIGN, \
207 N_("Enforce strict alignment") }, \
208 { "no-strict-align", -MASK_STRICT_ALIGN, "" }, \
209 { "big-switch", MASK_BIG_SWITCH, \
210 N_("Use 4 byte entries in switch tables") },\
211 { "", MASK_DEFAULT, ""}}
212
213 /* Information about the various small memory areas. */
214 struct small_memory_info {
215 const char *name;
216 const char *value;
217 long max;
218 long physical_max;
219 };
220
221 enum small_memory_type {
222 /* tiny data area, using EP as base register */
223 SMALL_MEMORY_TDA = 0,
224 /* small data area using dp as base register */
225 SMALL_MEMORY_SDA,
226 /* zero data area using r0 as base register */
227 SMALL_MEMORY_ZDA,
228 SMALL_MEMORY_max
229 };
230
231 extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
232
233 #define TARGET_OPTIONS \
234 { \
235 { "tda=", &small_memory[ (int)SMALL_MEMORY_TDA ].value, \
236 N_("Set the max size of data eligible for the TDA area"), 0}, \
237 { "tda-", &small_memory[ (int)SMALL_MEMORY_TDA ].value, "", 0}, \
238 { "sda=", &small_memory[ (int)SMALL_MEMORY_SDA ].value, \
239 N_("Set the max size of data eligible for the SDA area"), 0}, \
240 { "sda-", &small_memory[ (int)SMALL_MEMORY_SDA ].value, "", 0}, \
241 { "zda=", &small_memory[ (int)SMALL_MEMORY_ZDA ].value, \
242 N_("Set the max size of data eligible for the ZDA area"), 0}, \
243 { "zda-", &small_memory[ (int)SMALL_MEMORY_ZDA ].value, "", 0}, \
244 }
245
246 /* Sometimes certain combinations of command options do not make
247 sense on a particular target machine. You can define a macro
248 `OVERRIDE_OPTIONS' to take account of this. This macro, if
249 defined, is executed once just after all the command options have
250 been parsed.
251
252 Don't use this macro to turn on various extra optimizations for
253 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
254 #define OVERRIDE_OPTIONS override_options ()
255
256
257 /* Show we can debug even without a frame pointer. */
258 #define CAN_DEBUG_WITHOUT_FP
259
260 /* Some machines may desire to change what optimizations are
261 performed for various optimization levels. This macro, if
262 defined, is executed once just after the optimization level is
263 determined and before the remainder of the command options have
264 been parsed. Values set in this macro are used as the default
265 values for the other command line options.
266
267 LEVEL is the optimization level specified; 2 if `-O2' is
268 specified, 1 if `-O' is specified, and 0 if neither is specified.
269
270 SIZE is nonzero if `-Os' is specified, 0 otherwise.
271
272 You should not use this macro to change options that are not
273 machine-specific. These should uniformly selected by the same
274 optimization level on all supported machines. Use this macro to
275 enable machine-specific optimizations.
276
277 *Do not examine `write_symbols' in this macro!* The debugging
278 options are not supposed to alter the generated code. */
279
280 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
281 { \
282 target_flags |= MASK_STRICT_ALIGN; \
283 if (LEVEL) \
284 target_flags |= (MASK_EP | MASK_PROLOG_FUNCTION); \
285 }
286
287 \f
288 /* Target machine storage layout */
289
290 /* Define this if most significant bit is lowest numbered
291 in instructions that operate on numbered bit-fields.
292 This is not true on the NEC V850. */
293 #define BITS_BIG_ENDIAN 0
294
295 /* Define this if most significant byte of a word is the lowest numbered. */
296 /* This is not true on the NEC V850. */
297 #define BYTES_BIG_ENDIAN 0
298
299 /* Define this if most significant word of a multiword number is lowest
300 numbered.
301 This is not true on the NEC V850. */
302 #define WORDS_BIG_ENDIAN 0
303
304 /* Width of a word, in units (bytes). */
305 #define UNITS_PER_WORD 4
306
307 /* Define this macro if it is advisable to hold scalars in registers
308 in a wider mode than that declared by the program. In such cases,
309 the value is constrained to be within the bounds of the declared
310 type, but kept valid in the wider mode. The signedness of the
311 extension may differ from that of the type.
312
313 Some simple experiments have shown that leaving UNSIGNEDP alone
314 generates the best overall code. */
315
316 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
317 if (GET_MODE_CLASS (MODE) == MODE_INT \
318 && GET_MODE_SIZE (MODE) < 4) \
319 { (MODE) = SImode; }
320
321 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
322 #define PARM_BOUNDARY 32
323
324 /* The stack goes in 32 bit lumps. */
325 #define STACK_BOUNDARY 32
326
327 /* Allocation boundary (in *bits*) for the code of a function.
328 16 is the minimum boundary; 32 would give better performance. */
329 #define FUNCTION_BOUNDARY 16
330
331 /* No data type wants to be aligned rounder than this. */
332 #define BIGGEST_ALIGNMENT 32
333
334 /* Alignment of field after `int : 0' in a structure. */
335 #define EMPTY_FIELD_BOUNDARY 32
336
337 /* No structure field wants to be aligned rounder than this. */
338 #define BIGGEST_FIELD_ALIGNMENT 32
339
340 /* Define this if move instructions will actually fail to work
341 when given unaligned data. */
342 #define STRICT_ALIGNMENT TARGET_STRICT_ALIGN
343
344 /* Define this as 1 if `char' should by default be signed; else as 0.
345
346 On the NEC V850, loads do sign extension, so make this default. */
347 #define DEFAULT_SIGNED_CHAR 1
348 \f
349 /* Standard register usage. */
350
351 /* Number of actual hardware registers.
352 The hardware registers are assigned numbers for the compiler
353 from 0 to just below FIRST_PSEUDO_REGISTER.
354
355 All registers that the compiler knows about must be given numbers,
356 even those that are not normally considered general registers. */
357
358 #define FIRST_PSEUDO_REGISTER 34
359
360 /* 1 for registers that have pervasive standard uses
361 and are not available for the register allocator. */
362
363 #define FIXED_REGISTERS \
364 { 1, 1, 0, 1, 1, 0, 0, 0, \
365 0, 0, 0, 0, 0, 0, 0, 0, \
366 0, 0, 0, 0, 0, 0, 0, 0, \
367 0, 0, 0, 0, 0, 0, 1, 0, \
368 1, 1}
369
370 /* 1 for registers not available across function calls.
371 These must include the FIXED_REGISTERS and also any
372 registers that can be used without being saved.
373 The latter must include the registers where values are returned
374 and the register where structure-value addresses are passed.
375 Aside from that, you can include as many other registers as you
376 like. */
377
378 #define CALL_USED_REGISTERS \
379 { 1, 1, 0, 1, 1, 1, 1, 1, \
380 1, 1, 1, 1, 1, 1, 1, 1, \
381 1, 1, 1, 1, 0, 0, 0, 0, \
382 0, 0, 0, 0, 0, 0, 1, 1, \
383 1, 1}
384
385 /* List the order in which to allocate registers. Each register must be
386 listed once, even those in FIXED_REGISTERS.
387
388 On the 850, we make the return registers first, then all of the volatile
389 registers, then the saved registers in reverse order to better save the
390 registers with an out of line function, and finally the fixed
391 registers. */
392
393 #define REG_ALLOC_ORDER \
394 { \
395 10, 11, /* return registers */ \
396 12, 13, 14, 15, 16, 17, 18, 19, /* scratch registers */ \
397 6, 7, 8, 9, 31, /* argument registers */ \
398 29, 28, 27, 26, 25, 24, 23, 22, /* saved registers */ \
399 21, 20, 2, \
400 0, 1, 3, 4, 5, 30, 32, 33 /* fixed registers */ \
401 }
402
403 /* If TARGET_NO_APP_REGS is not defined then add r2 and r5 to
404 the pool of fixed registers. See PR 14505. */
405 #define CONDITIONAL_REGISTER_USAGE \
406 { \
407 if (TARGET_NO_APP_REGS) \
408 { \
409 fixed_regs[2] = 1; call_used_regs[2] = 1; \
410 fixed_regs[5] = 1; call_used_regs[5] = 1; \
411 } \
412 }
413
414 /* Return number of consecutive hard regs needed starting at reg REGNO
415 to hold something of mode MODE.
416
417 This is ordinarily the length in words of a value of mode MODE
418 but can be less for certain modes in special long registers. */
419
420 #define HARD_REGNO_NREGS(REGNO, MODE) \
421 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
422
423 /* Value is 1 if hard register REGNO can hold a value of machine-mode
424 MODE. */
425
426 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
427 ((((REGNO) & 1) == 0) || (GET_MODE_SIZE (MODE) <= 4))
428
429 /* Value is 1 if it is a good idea to tie two pseudo registers
430 when one has mode MODE1 and one has mode MODE2.
431 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
432 for any hard reg, then this must be 0 for correct output. */
433 #define MODES_TIEABLE_P(MODE1, MODE2) \
434 (MODE1 == MODE2 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
435
436 \f
437 /* Define the classes of registers for register constraints in the
438 machine description. Also define ranges of constants.
439
440 One of the classes must always be named ALL_REGS and include all hard regs.
441 If there is more than one class, another class must be named NO_REGS
442 and contain no registers.
443
444 The name GENERAL_REGS must be the name of a class (or an alias for
445 another name such as ALL_REGS). This is the class of registers
446 that is allowed by "g" or "r" in a register constraint.
447 Also, registers outside this class are allocated only when
448 instructions express preferences for them.
449
450 The classes must be numbered in nondecreasing order; that is,
451 a larger-numbered class must never be contained completely
452 in a smaller-numbered class.
453
454 For any two classes, it is very desirable that there be another
455 class that represents their union. */
456
457 enum reg_class
458 {
459 NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
460 };
461
462 #define N_REG_CLASSES (int) LIM_REG_CLASSES
463
464 /* Give names of register classes as strings for dump file. */
465
466 #define REG_CLASS_NAMES \
467 { "NO_REGS", "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
468
469 /* Define which registers fit in which classes.
470 This is an initializer for a vector of HARD_REG_SET
471 of length N_REG_CLASSES. */
472
473 #define REG_CLASS_CONTENTS \
474 { \
475 { 0x00000000 }, /* NO_REGS */ \
476 { 0xffffffff }, /* GENERAL_REGS */ \
477 { 0xffffffff }, /* ALL_REGS */ \
478 }
479
480 /* The same information, inverted:
481 Return the class number of the smallest class containing
482 reg number REGNO. This could be a conditional expression
483 or could index an array. */
484
485 #define REGNO_REG_CLASS(REGNO) GENERAL_REGS
486
487 /* The class value for index registers, and the one for base regs. */
488
489 #define INDEX_REG_CLASS NO_REGS
490 #define BASE_REG_CLASS GENERAL_REGS
491
492 /* Get reg_class from a letter such as appears in the machine description. */
493
494 #define REG_CLASS_FROM_LETTER(C) (NO_REGS)
495
496 /* Macros to check register numbers against specific register classes. */
497
498 /* These assume that REGNO is a hard or pseudo reg number.
499 They give nonzero only if REGNO is a hard reg of the suitable class
500 or a pseudo reg currently allocated to a suitable hard reg.
501 Since they use reg_renumber, they are safe only once reg_renumber
502 has been allocated, which happens in local-alloc.c. */
503
504 #define REGNO_OK_FOR_BASE_P(regno) \
505 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
506
507 #define REGNO_OK_FOR_INDEX_P(regno) 0
508
509 /* Given an rtx X being reloaded into a reg required to be
510 in class CLASS, return the class of reg to actually use.
511 In general this is just CLASS; but on some machines
512 in some cases it is preferable to use a more restrictive class. */
513
514 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
515
516 /* Return the maximum number of consecutive registers
517 needed to represent mode MODE in a register of class CLASS. */
518
519 #define CLASS_MAX_NREGS(CLASS, MODE) \
520 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
521
522 /* The letters I, J, K, L, M, N, O, P in a register constraint string
523 can be used to stand for particular ranges of immediate operands.
524 This macro defines what the ranges are.
525 C is the letter, and VALUE is a constant value.
526 Return 1 if VALUE is in the range specified by C. */
527
528 #define INT_7_BITS(VALUE) ((unsigned) (VALUE) + 0x40 < 0x80)
529 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
530 /* zero */
531 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
532 /* 5 bit signed immediate */
533 #define CONST_OK_FOR_J(VALUE) ((unsigned) (VALUE) + 0x10 < 0x20)
534 /* 16 bit signed immediate */
535 #define CONST_OK_FOR_K(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
536 /* valid constant for movhi instruction. */
537 #define CONST_OK_FOR_L(VALUE) \
538 (((unsigned) ((int) (VALUE) >> 16) + 0x8000 < 0x10000) \
539 && CONST_OK_FOR_I ((VALUE & 0xffff)))
540 /* 16 bit unsigned immediate */
541 #define CONST_OK_FOR_M(VALUE) ((unsigned)(VALUE) < 0x10000)
542 /* 5 bit unsigned immediate in shift instructions */
543 #define CONST_OK_FOR_N(VALUE) ((unsigned) (VALUE) <= 31)
544 /* 9 bit signed immediate for word multiply instruction. */
545 #define CONST_OK_FOR_O(VALUE) ((unsigned) (VALUE) + 0x100 < 0x200)
546
547 #define CONST_OK_FOR_P(VALUE) 0
548
549 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
550 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
551 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
552 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
553 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
554 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
555 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
556 (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
557 (C) == 'P' ? CONST_OK_FOR_P (VALUE) : \
558 0)
559
560 /* Similar, but for floating constants, and defining letters G and H.
561 Here VALUE is the CONST_DOUBLE rtx itself.
562
563 `G' is a zero of some form. */
564
565 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
566 ((GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
567 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
568 || (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_INT \
569 && CONST_DOUBLE_LOW (VALUE) == 0 \
570 && CONST_DOUBLE_HIGH (VALUE) == 0))
571
572 #define CONST_DOUBLE_OK_FOR_H(VALUE) 0
573
574 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
575 ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \
576 : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \
577 : 0)
578
579 \f
580 /* Stack layout; function entry, exit and calling. */
581
582 /* Define this if pushing a word on the stack
583 makes the stack pointer a smaller address. */
584
585 #define STACK_GROWS_DOWNWARD
586
587 /* Define this if the nominal address of the stack frame
588 is at the high-address end of the local variables;
589 that is, each additional local variable allocated
590 goes at a more negative offset in the frame. */
591
592 #define FRAME_GROWS_DOWNWARD
593
594 /* Offset within stack frame to start allocating local variables at.
595 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
596 first local allocated. Otherwise, it is the offset to the BEGINNING
597 of the first local allocated. */
598
599 #define STARTING_FRAME_OFFSET 0
600
601 /* Offset of first parameter from the argument pointer register value. */
602 /* Is equal to the size of the saved fp + pc, even if an fp isn't
603 saved since the value is used before we know. */
604
605 #define FIRST_PARM_OFFSET(FNDECL) 0
606
607 /* Specify the registers used for certain standard purposes.
608 The values of these macros are register numbers. */
609
610 /* Register to use for pushing function arguments. */
611 #define STACK_POINTER_REGNUM 3
612
613 /* Base register for access to local variables of the function. */
614 #define FRAME_POINTER_REGNUM 32
615
616 /* Register containing return address from latest function call. */
617 #define LINK_POINTER_REGNUM 31
618
619 /* On some machines the offset between the frame pointer and starting
620 offset of the automatic variables is not known until after register
621 allocation has been done (for example, because the saved registers
622 are between these two locations). On those machines, define
623 `FRAME_POINTER_REGNUM' the number of a special, fixed register to
624 be used internally until the offset is known, and define
625 `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number
626 used for the frame pointer.
627
628 You should define this macro only in the very rare circumstances
629 when it is not possible to calculate the offset between the frame
630 pointer and the automatic variables until after register
631 allocation has been completed. When this macro is defined, you
632 must also indicate in your definition of `ELIMINABLE_REGS' how to
633 eliminate `FRAME_POINTER_REGNUM' into either
634 `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'.
635
636 Do not define this macro if it would be the same as
637 `FRAME_POINTER_REGNUM'. */
638 #undef HARD_FRAME_POINTER_REGNUM
639 #define HARD_FRAME_POINTER_REGNUM 29
640
641 /* Base register for access to arguments of the function. */
642 #define ARG_POINTER_REGNUM 33
643
644 /* Register in which static-chain is passed to a function. */
645 #define STATIC_CHAIN_REGNUM 20
646
647 /* Value should be nonzero if functions must have frame pointers.
648 Zero means the frame pointer need not be set up (and parms
649 may be accessed via the stack pointer) in functions that seem suitable.
650 This is computed in `reload', in reload1.c. */
651 #define FRAME_POINTER_REQUIRED 0
652
653 /* If defined, this macro specifies a table of register pairs used to
654 eliminate unneeded registers that point into the stack frame. If
655 it is not defined, the only elimination attempted by the compiler
656 is to replace references to the frame pointer with references to
657 the stack pointer.
658
659 The definition of this macro is a list of structure
660 initializations, each of which specifies an original and
661 replacement register.
662
663 On some machines, the position of the argument pointer is not
664 known until the compilation is completed. In such a case, a
665 separate hard register must be used for the argument pointer.
666 This register can be eliminated by replacing it with either the
667 frame pointer or the argument pointer, depending on whether or not
668 the frame pointer has been eliminated.
669
670 In this case, you might specify:
671 #define ELIMINABLE_REGS \
672 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
673 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
674 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
675
676 Note that the elimination of the argument pointer with the stack
677 pointer is specified first since that is the preferred elimination. */
678
679 #define ELIMINABLE_REGS \
680 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
681 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
682 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
683 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \
684
685 /* A C expression that returns nonzero if the compiler is allowed to
686 try to replace register number FROM-REG with register number
687 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
688 defined, and will usually be the constant 1, since most of the
689 cases preventing register elimination are things that the compiler
690 already knows about. */
691
692 #define CAN_ELIMINATE(FROM, TO) \
693 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
694
695 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
696 specifies the initial difference between the specified pair of
697 registers. This macro must be defined if `ELIMINABLE_REGS' is
698 defined. */
699
700 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
701 { \
702 if ((FROM) == FRAME_POINTER_REGNUM) \
703 (OFFSET) = get_frame_size () + current_function_outgoing_args_size; \
704 else if ((FROM) == ARG_POINTER_REGNUM) \
705 (OFFSET) = compute_frame_size (get_frame_size (), (long *)0); \
706 else \
707 abort (); \
708 }
709
710 /* A guess for the V850. */
711 #define PROMOTE_PROTOTYPES 1
712
713 /* Keep the stack pointer constant throughout the function. */
714 #define ACCUMULATE_OUTGOING_ARGS 1
715
716 /* Value is the number of bytes of arguments automatically
717 popped when returning from a subroutine call.
718 FUNDECL is the declaration node of the function (as a tree),
719 FUNTYPE is the data type of the function (as a tree),
720 or for a library call it is an identifier node for the subroutine name.
721 SIZE is the number of bytes of arguments passed on the stack. */
722
723 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
724
725 #define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT)
726 \f
727 /* Define a data type for recording info about an argument list
728 during the scan of that argument list. This data type should
729 hold all necessary information about the function itself
730 and about the args processed so far, enough to enable macros
731 such as FUNCTION_ARG to determine where the next arg should go. */
732
733 #define CUMULATIVE_ARGS struct cum_arg
734 struct cum_arg { int nbytes; int anonymous_args; };
735
736 /* Define where to put the arguments to a function.
737 Value is zero to push the argument on the stack,
738 or a hard register in which to store the argument.
739
740 MODE is the argument's machine mode.
741 TYPE is the data type of the argument (as a tree).
742 This is null for libcalls where that information may
743 not be available.
744 CUM is a variable of type CUMULATIVE_ARGS which gives info about
745 the preceding args and about the function being called.
746 NAMED is nonzero if this argument is a named parameter
747 (otherwise it is an extra parameter matching an ellipsis). */
748
749 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
750 function_arg (&CUM, MODE, TYPE, NAMED)
751
752 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
753 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
754
755 /* Initialize a variable CUM of type CUMULATIVE_ARGS
756 for a call to a function whose data type is FNTYPE.
757 For a library call, FNTYPE is 0. */
758
759 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
760 ((CUM).nbytes = 0, (CUM).anonymous_args = 0)
761
762 /* Update the data in CUM to advance over an argument
763 of mode MODE and data type TYPE.
764 (TYPE is null for libcalls where that information may not be available.) */
765
766 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
767 ((CUM).nbytes += ((MODE) != BLKmode \
768 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
769 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
770
771 /* When a parameter is passed in a register, stack space is still
772 allocated for it. */
773 #define REG_PARM_STACK_SPACE(DECL) (!TARGET_GHS ? 16 : 0)
774
775 /* Define this if the above stack space is to be considered part of the
776 space allocated by the caller. */
777 #define OUTGOING_REG_PARM_STACK_SPACE
778
779 /* Do any setup necessary for varargs/stdargs functions. */
780 #define SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PAS, SECOND) \
781 (CUM).anonymous_args = (!TARGET_GHS ? 1 : 0);
782
783 /* Implement `va_arg'. */
784 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
785 v850_va_arg (valist, type)
786
787 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
788 ((TYPE) && int_size_in_bytes (TYPE) > 8)
789
790 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
791 ((TYPE) && int_size_in_bytes (TYPE) > 8)
792
793 /* 1 if N is a possible register number for function argument passing. */
794
795 #define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9)
796
797 /* Define how to find the value returned by a function.
798 VALTYPE is the data type of the value (as a tree).
799 If the precise function being called is known, FUNC is its FUNCTION_DECL;
800 otherwise, FUNC is 0. */
801
802 #define FUNCTION_VALUE(VALTYPE, FUNC) \
803 gen_rtx_REG (TYPE_MODE (VALTYPE), 10)
804
805 /* Define how to find the value returned by a library function
806 assuming the value has mode MODE. */
807
808 #define LIBCALL_VALUE(MODE) \
809 gen_rtx_REG (MODE, 10)
810
811 /* 1 if N is a possible register number for a function value. */
812
813 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 10)
814
815 /* Return values > 8 bytes in length in memory. */
816 #define DEFAULT_PCC_STRUCT_RETURN 0
817 #define RETURN_IN_MEMORY(TYPE) \
818 (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode)
819
820 /* Register in which address to store a structure value
821 is passed to a function. On the V850 it's passed as
822 the first parameter. */
823
824 #define STRUCT_VALUE 0
825
826 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
827 the stack pointer does not matter. The value is tested only in
828 functions that have frame pointers.
829 No definition is equivalent to always zero. */
830
831 #define EXIT_IGNORE_STACK 1
832
833 /* Define this macro as a C expression that is nonzero for registers
834 used by the epilogue or the `return' pattern. */
835
836 #define EPILOGUE_USES(REGNO) \
837 (reload_completed && (REGNO) == LINK_POINTER_REGNUM)
838
839 /* Output assembler code to FILE to increment profiler label # LABELNO
840 for profiling a function entry. */
841
842 #define FUNCTION_PROFILER(FILE, LABELNO) ;
843
844 #define TRAMPOLINE_TEMPLATE(FILE) \
845 do { \
846 fprintf (FILE, "\tjarl .+4,r12\n"); \
847 fprintf (FILE, "\tld.w 12[r12],r20\n"); \
848 fprintf (FILE, "\tld.w 16[r12],r12\n"); \
849 fprintf (FILE, "\tjmp [r12]\n"); \
850 fprintf (FILE, "\tnop\n"); \
851 fprintf (FILE, "\t.long 0\n"); \
852 fprintf (FILE, "\t.long 0\n"); \
853 } while (0)
854
855 /* Length in units of the trampoline for entering a nested function. */
856
857 #define TRAMPOLINE_SIZE 24
858
859 /* Emit RTL insns to initialize the variable parts of a trampoline.
860 FNADDR is an RTX for the address of the function's pure code.
861 CXT is an RTX for the static chain value for the function. */
862
863 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
864 { \
865 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 16)), \
866 (CXT)); \
867 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 20)), \
868 (FNADDR)); \
869 }
870
871 /* Addressing modes, and classification of registers for them. */
872
873 \f
874 /* 1 if X is an rtx for a constant that is a valid address. */
875
876 /* ??? This seems too exclusive. May get better code by accepting more
877 possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */
878
879 #define CONSTANT_ADDRESS_P(X) \
880 (GET_CODE (X) == CONST_INT \
881 && CONST_OK_FOR_K (INTVAL (X)))
882
883 /* Maximum number of registers that can appear in a valid memory address. */
884
885 #define MAX_REGS_PER_ADDRESS 1
886
887 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
888 and check its validity for a certain class.
889 We have two alternate definitions for each of them.
890 The usual definition accepts all pseudo regs; the other rejects
891 them unless they have been allocated suitable hard regs.
892 The symbol REG_OK_STRICT causes the latter definition to be used.
893
894 Most source files want to accept pseudo regs in the hope that
895 they will get allocated to the class that the insn wants them to be in.
896 Source files for reload pass need to be strict.
897 After reload, it makes no difference, since pseudo regs have
898 been eliminated by then. */
899
900 #ifndef REG_OK_STRICT
901
902 /* Nonzero if X is a hard reg that can be used as an index
903 or if it is a pseudo reg. */
904 #define REG_OK_FOR_INDEX_P(X) 0
905 /* Nonzero if X is a hard reg that can be used as a base reg
906 or if it is a pseudo reg. */
907 #define REG_OK_FOR_BASE_P(X) 1
908 #define REG_OK_FOR_INDEX_P_STRICT(X) 0
909 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
910 #define STRICT 0
911
912 #else
913
914 /* Nonzero if X is a hard reg that can be used as an index. */
915 #define REG_OK_FOR_INDEX_P(X) 0
916 /* Nonzero if X is a hard reg that can be used as a base reg. */
917 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
918 #define STRICT 1
919
920 #endif
921
922 /* A C expression that defines the optional machine-dependent
923 constraint letters that can be used to segregate specific types of
924 operands, usually memory references, for the target machine.
925 Normally this macro will not be defined. If it is required for a
926 particular target machine, it should return 1 if VALUE corresponds
927 to the operand type represented by the constraint letter C. If C
928 is not defined as an extra constraint, the value returned should
929 be 0 regardless of VALUE.
930
931 For example, on the ROMP, load instructions cannot have their
932 output in r0 if the memory reference contains a symbolic address.
933 Constraint letter `Q' is defined as representing a memory address
934 that does *not* contain a symbolic address. An alternative is
935 specified with a `Q' constraint on the input and `r' on the
936 output. The next alternative specifies `m' on the input and a
937 register class that does not include r0 on the output. */
938
939 #define EXTRA_CONSTRAINT(OP, C) \
940 ((C) == 'Q' ? ep_memory_operand (OP, GET_MODE (OP), 0) \
941 : (C) == 'R' ? special_symbolref_operand (OP, VOIDmode) \
942 : (C) == 'S' ? (GET_CODE (OP) == SYMBOL_REF \
943 && !SYMBOL_REF_ZDA_P (OP)) \
944 : (C) == 'T' ? ep_memory_operand(OP,GET_MODE(OP),TRUE) \
945 : (C) == 'U' ? ((GET_CODE (OP) == SYMBOL_REF \
946 && SYMBOL_REF_ZDA_P (OP)) \
947 || (GET_CODE (OP) == CONST \
948 && GET_CODE (XEXP (OP, 0)) == PLUS \
949 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == SYMBOL_REF \
950 && SYMBOL_REF_ZDA_P (XEXP (XEXP (OP, 0), 0)))) \
951 : 0)
952 \f
953 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
954 that is a valid memory address for an instruction.
955 The MODE argument is the machine mode for the MEM expression
956 that wants to use this address.
957
958 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
959 except for CONSTANT_ADDRESS_P which is actually
960 machine-independent. */
961
962 /* Accept either REG or SUBREG where a register is valid. */
963
964 #define RTX_OK_FOR_BASE_P(X) \
965 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
966 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
967 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
968
969 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
970 do { \
971 if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
972 if (CONSTANT_ADDRESS_P (X) \
973 && (MODE == QImode || INTVAL (X) % 2 == 0) \
974 && (GET_MODE_SIZE (MODE) <= 4 || INTVAL (X) % 4 == 0)) \
975 goto ADDR; \
976 if (GET_CODE (X) == LO_SUM \
977 && GET_CODE (XEXP (X, 0)) == REG \
978 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
979 && CONSTANT_P (XEXP (X, 1)) \
980 && (GET_CODE (XEXP (X, 1)) != CONST_INT \
981 || ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
982 && CONST_OK_FOR_K (INTVAL (XEXP (X, 1))))) \
983 && GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode)) \
984 goto ADDR; \
985 if (special_symbolref_operand (X, MODE) \
986 && (GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode))) \
987 goto ADDR; \
988 if (GET_CODE (X) == PLUS \
989 && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
990 && (MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
991 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR; \
992 } while (0)
993
994 \f
995 /* Try machine-dependent ways of modifying an illegitimate address
996 to be legitimate. If we find one, return the new, valid address.
997 This macro is used in only one place: `memory_address' in explow.c.
998
999 OLDX is the address as it was before break_out_memory_refs was called.
1000 In some cases it is useful to look at this to decide what needs to be done.
1001
1002 MODE and WIN are passed so that this macro can use
1003 GO_IF_LEGITIMATE_ADDRESS.
1004
1005 It is always safe for this macro to do nothing. It exists to recognize
1006 opportunities to optimize the output. */
1007
1008 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
1009
1010 /* Go to LABEL if ADDR (a legitimate address expression)
1011 has an effect that depends on the machine mode it is used for. */
1012
1013 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
1014
1015 /* Nonzero if the constant value X is a legitimate general operand.
1016 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1017
1018 #define LEGITIMATE_CONSTANT_P(X) \
1019 (GET_CODE (X) == CONST_DOUBLE \
1020 || !(GET_CODE (X) == CONST \
1021 && GET_CODE (XEXP (X, 0)) == PLUS \
1022 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
1023 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1024 && ! CONST_OK_FOR_K (INTVAL (XEXP (XEXP (X, 0), 1)))))
1025 \f
1026 /* Tell final.c how to eliminate redundant test instructions. */
1027
1028 /* Here we define machine-dependent flags and fields in cc_status
1029 (see `conditions.h'). No extra ones are needed for the VAX. */
1030
1031 /* Store in cc_status the expressions
1032 that the condition codes will describe
1033 after execution of an instruction whose pattern is EXP.
1034 Do not alter them if the instruction would not alter the cc's. */
1035
1036 #define CC_OVERFLOW_UNUSABLE 0x200
1037 #define CC_NO_CARRY CC_NO_OVERFLOW
1038 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
1039
1040 /* Nonzero if access to memory by bytes or half words is no faster
1041 than accessing full words. */
1042 #define SLOW_BYTE_ACCESS 1
1043
1044 /* According expr.c, a value of around 6 should minimize code size, and
1045 for the V850 series, that's our primary concern. */
1046 #define MOVE_RATIO 6
1047
1048 /* Indirect calls are expensive, never turn a direct call
1049 into an indirect call. */
1050 #define NO_FUNCTION_CSE
1051
1052 /* The four different data regions on the v850. */
1053 typedef enum
1054 {
1055 DATA_AREA_NORMAL,
1056 DATA_AREA_SDA,
1057 DATA_AREA_TDA,
1058 DATA_AREA_ZDA
1059 } v850_data_area;
1060
1061 /* A list of names for sections other than the standard two, which are
1062 `in_text' and `in_data'. You need not define this macro on a
1063 system with no other sections (that GCC needs to use). */
1064 #undef EXTRA_SECTIONS
1065 #define EXTRA_SECTIONS in_tdata, in_sdata, in_zdata, \
1066 in_rozdata, in_rosdata, in_sbss, in_zbss, in_zcommon, in_scommon
1067
1068 /* One or more functions to be defined in `varasm.c'. These
1069 functions should do jobs analogous to those of `text_section' and
1070 `data_section', for your additional sections. Do not define this
1071 macro if you do not define `EXTRA_SECTIONS'. */
1072 #undef EXTRA_SECTION_FUNCTIONS
1073
1074 /* This could be done a lot more cleanly using ANSI C ... */
1075 #define EXTRA_SECTION_FUNCTIONS \
1076 void \
1077 sdata_section () \
1078 { \
1079 if (in_section != in_sdata) \
1080 { \
1081 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
1082 in_section = in_sdata; \
1083 } \
1084 } \
1085 \
1086 void \
1087 rosdata_section () \
1088 { \
1089 if (in_section != in_rosdata) \
1090 { \
1091 fprintf (asm_out_file, "%s\n", ROSDATA_SECTION_ASM_OP); \
1092 in_section = in_sdata; \
1093 } \
1094 } \
1095 \
1096 void \
1097 sbss_section () \
1098 { \
1099 if (in_section != in_sbss) \
1100 { \
1101 fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP); \
1102 in_section = in_sbss; \
1103 } \
1104 } \
1105 \
1106 void \
1107 tdata_section () \
1108 { \
1109 if (in_section != in_tdata) \
1110 { \
1111 fprintf (asm_out_file, "%s\n", TDATA_SECTION_ASM_OP); \
1112 in_section = in_tdata; \
1113 } \
1114 } \
1115 \
1116 void \
1117 zdata_section () \
1118 { \
1119 if (in_section != in_zdata) \
1120 { \
1121 fprintf (asm_out_file, "%s\n", ZDATA_SECTION_ASM_OP); \
1122 in_section = in_zdata; \
1123 } \
1124 } \
1125 \
1126 void \
1127 rozdata_section () \
1128 { \
1129 if (in_section != in_rozdata) \
1130 { \
1131 fprintf (asm_out_file, "%s\n", ROZDATA_SECTION_ASM_OP); \
1132 in_section = in_rozdata; \
1133 } \
1134 } \
1135 \
1136 void \
1137 zbss_section () \
1138 { \
1139 if (in_section != in_zbss) \
1140 { \
1141 fprintf (asm_out_file, "%s\n", ZBSS_SECTION_ASM_OP); \
1142 in_section = in_zbss; \
1143 } \
1144 }
1145
1146 #define TEXT_SECTION_ASM_OP "\t.section .text"
1147 #define DATA_SECTION_ASM_OP "\t.section .data"
1148 #define BSS_SECTION_ASM_OP "\t.section .bss"
1149 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\""
1150 #define SBSS_SECTION_ASM_OP "\t.section .sbss,\"aw\""
1151 #define ZDATA_SECTION_ASM_OP "\t.section .zdata,\"aw\""
1152 #define ZBSS_SECTION_ASM_OP "\t.section .zbss,\"aw\""
1153 #define TDATA_SECTION_ASM_OP "\t.section .tdata,\"aw\""
1154 #define ROSDATA_SECTION_ASM_OP "\t.section .rosdata,\"a\""
1155 #define ROZDATA_SECTION_ASM_OP "\t.section .rozdata,\"a\""
1156
1157 #define SCOMMON_ASM_OP "\t.scomm\t"
1158 #define ZCOMMON_ASM_OP "\t.zcomm\t"
1159 #define TCOMMON_ASM_OP "\t.tcomm\t"
1160
1161 #define ASM_COMMENT_START "#"
1162
1163 /* Output to assembler file text saying following lines
1164 may contain character constants, extra white space, comments, etc. */
1165
1166 #define ASM_APP_ON "#APP\n"
1167
1168 /* Output to assembler file text saying following lines
1169 no longer contain unusual constructs. */
1170
1171 #define ASM_APP_OFF "#NO_APP\n"
1172
1173 #undef USER_LABEL_PREFIX
1174 #define USER_LABEL_PREFIX "_"
1175
1176 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \
1177 if (! v850_output_addr_const_extra (FILE, X)) \
1178 goto FAIL
1179
1180 /* This says how to output the assembler to define a global
1181 uninitialized but not common symbol. */
1182
1183 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1184 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
1185
1186 #undef ASM_OUTPUT_ALIGNED_BSS
1187 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1188 v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
1189
1190 /* This says how to output the assembler to define a global
1191 uninitialized, common symbol. */
1192 #undef ASM_OUTPUT_ALIGNED_COMMON
1193 #undef ASM_OUTPUT_COMMON
1194 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
1195 v850_output_common (FILE, DECL, NAME, SIZE, ALIGN)
1196
1197 /* This says how to output the assembler to define a local
1198 uninitialized symbol. */
1199 #undef ASM_OUTPUT_ALIGNED_LOCAL
1200 #undef ASM_OUTPUT_LOCAL
1201 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
1202 v850_output_local (FILE, DECL, NAME, SIZE, ALIGN)
1203
1204 /* Globalizing directive for a label. */
1205 #define GLOBAL_ASM_OP "\t.global "
1206
1207 #define ASM_PN_FORMAT "%s___%lu"
1208
1209 /* This is how we tell the assembler that two symbols have the same value. */
1210
1211 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
1212 do { assemble_name(FILE, NAME1); \
1213 fputs(" = ", FILE); \
1214 assemble_name(FILE, NAME2); \
1215 fputc('\n', FILE); } while (0)
1216
1217
1218 /* How to refer to registers in assembler output.
1219 This sequence is indexed by compiler's hard-register-number (see above). */
1220
1221 #define REGISTER_NAMES \
1222 { "r0", "r1", "r2", "sp", "gp", "r5", "r6" , "r7", \
1223 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1224 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
1225 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31", \
1226 ".fp", ".ap"}
1227
1228 #define ADDITIONAL_REGISTER_NAMES \
1229 { { "zero", 0 }, \
1230 { "hp", 2 }, \
1231 { "r3", 3 }, \
1232 { "r4", 4 }, \
1233 { "tp", 5 }, \
1234 { "fp", 29 }, \
1235 { "r30", 30 }, \
1236 { "lp", 31} }
1237
1238 /* Print an instruction operand X on file FILE.
1239 look in v850.c for details */
1240
1241 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1242
1243 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1244 ((CODE) == '.')
1245
1246 /* Print a memory operand whose address is X, on file FILE.
1247 This uses a function in output-vax.c. */
1248
1249 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1250
1251 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1252 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1253
1254 /* This is how to output an element of a case-vector that is absolute. */
1255
1256 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1257 fprintf (FILE, "\t%s .L%d\n", \
1258 (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE)
1259
1260 /* This is how to output an element of a case-vector that is relative. */
1261
1262 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1263 fprintf (FILE, "\t%s %s.L%d-.L%d%s\n", \
1264 (TARGET_BIG_SWITCH ? ".long" : ".short"), \
1265 (! TARGET_BIG_SWITCH && TARGET_V850E ? "(" : ""), \
1266 VALUE, REL, \
1267 (! TARGET_BIG_SWITCH && TARGET_V850E ? ")>>1" : ""))
1268
1269 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1270 if ((LOG) != 0) \
1271 fprintf (FILE, "\t.align %d\n", (LOG))
1272
1273 /* We don't have to worry about dbx compatibility for the v850. */
1274 #define DEFAULT_GDB_EXTENSIONS 1
1275
1276 /* Use stabs debugging info by default. */
1277 #undef PREFERRED_DEBUGGING_TYPE
1278 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1279
1280 /* Specify the machine mode that this machine uses
1281 for the index in the tablejump instruction. */
1282 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode)
1283
1284 /* Define this if the case instruction drops through after the table
1285 when the index is out of range. Don't define it if the case insn
1286 jumps to the default label instead. */
1287 /* #define CASE_DROPS_THROUGH */
1288
1289 /* Define as C expression which evaluates to nonzero if the tablejump
1290 instruction expects the table to contain offsets from the address of the
1291 table.
1292 Do not define this if the table should contain absolute addresses. */
1293 #define CASE_VECTOR_PC_RELATIVE 1
1294
1295 /* The switch instruction requires that the jump table immediately follow
1296 it. */
1297 #define JUMP_TABLES_IN_TEXT_SECTION 1
1298
1299 /* svr4.h defines this assuming that 4 byte alignment is required. */
1300 #undef ASM_OUTPUT_BEFORE_CASE_LABEL
1301 #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
1302 ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1));
1303
1304 #define WORD_REGISTER_OPERATIONS
1305
1306 /* Byte and short loads sign extend the value to a word. */
1307 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
1308
1309 /* This flag, if defined, says the same insns that convert to a signed fixnum
1310 also convert validly to an unsigned one. */
1311 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1312
1313 /* Max number of bytes we can move from memory to memory
1314 in one reasonably fast instruction. */
1315 #define MOVE_MAX 4
1316
1317 /* Define if shifts truncate the shift count
1318 which implies one can omit a sign-extension or zero-extension
1319 of a shift count. */
1320 #define SHIFT_COUNT_TRUNCATED 1
1321
1322 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1323 is done just by pretending it is already truncated. */
1324 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1325
1326 /* Specify the machine mode that pointers have.
1327 After generation of rtl, the compiler makes no further distinction
1328 between pointers and any other objects of this machine mode. */
1329 #define Pmode SImode
1330
1331 /* A function address in a call instruction
1332 is a byte address (for indexing purposes)
1333 so give the MEM rtx a byte's mode. */
1334 #define FUNCTION_MODE QImode
1335
1336 /* Tell compiler we want to support GHS pragmas */
1337 #define REGISTER_TARGET_PRAGMAS() do { \
1338 c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt); \
1339 c_register_pragma ("ghs", "section", ghs_pragma_section); \
1340 c_register_pragma ("ghs", "starttda", ghs_pragma_starttda); \
1341 c_register_pragma ("ghs", "startsda", ghs_pragma_startsda); \
1342 c_register_pragma ("ghs", "startzda", ghs_pragma_startzda); \
1343 c_register_pragma ("ghs", "endtda", ghs_pragma_endtda); \
1344 c_register_pragma ("ghs", "endsda", ghs_pragma_endsda); \
1345 c_register_pragma ("ghs", "endzda", ghs_pragma_endzda); \
1346 } while (0)
1347
1348 /* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that
1349 can appear in the "ghs section" pragma. These names are used to index
1350 into the GHS_default_section_names[] and GHS_current_section_names[]
1351 that are defined in v850.c, and so the ordering of each must remain
1352 consistant.
1353
1354 These arrays give the default and current names for each kind of
1355 section defined by the GHS pragmas. The current names can be changed
1356 by the "ghs section" pragma. If the current names are null, use
1357 the default names. Note that the two arrays have different types.
1358
1359 For the *normal* section kinds (like .data, .text, etc.) we do not
1360 want to explicitly force the name of these sections, but would rather
1361 let the linker (or at least the back end) choose the name of the
1362 section, UNLESS the user has force a specific name for these section
1363 kinds. To accomplish this set the name in ghs_default_section_names
1364 to null. */
1365
1366 enum GHS_section_kind
1367 {
1368 GHS_SECTION_KIND_DEFAULT,
1369
1370 GHS_SECTION_KIND_TEXT,
1371 GHS_SECTION_KIND_DATA,
1372 GHS_SECTION_KIND_RODATA,
1373 GHS_SECTION_KIND_BSS,
1374 GHS_SECTION_KIND_SDATA,
1375 GHS_SECTION_KIND_ROSDATA,
1376 GHS_SECTION_KIND_TDATA,
1377 GHS_SECTION_KIND_ZDATA,
1378 GHS_SECTION_KIND_ROZDATA,
1379
1380 COUNT_OF_GHS_SECTION_KINDS /* must be last */
1381 };
1382
1383 /* The following code is for handling pragmas supported by the
1384 v850 compiler produced by Green Hills Software. This is at
1385 the specific request of a customer. */
1386
1387 typedef struct data_area_stack_element
1388 {
1389 struct data_area_stack_element * prev;
1390 v850_data_area data_area; /* Current default data area. */
1391 } data_area_stack_element;
1392
1393 /* Track the current data area set by the
1394 data area pragma (which can be nested). */
1395 extern data_area_stack_element * data_area_stack;
1396
1397 /* Names of the various data areas used on the v850. */
1398 extern union tree_node * GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
1399 extern union tree_node * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
1400
1401 /* The assembler op to start the file. */
1402
1403 #define FILE_ASM_OP "\t.file\n"
1404
1405 /* Enable the register move pass to improve code. */
1406 #define ENABLE_REGMOVE_PASS
1407
1408
1409 /* Implement ZDA, TDA, and SDA */
1410
1411 #define EP_REGNUM 30 /* ep register number */
1412
1413 #define SYMBOL_FLAG_ZDA (SYMBOL_FLAG_MACH_DEP << 0)
1414 #define SYMBOL_FLAG_TDA (SYMBOL_FLAG_MACH_DEP << 1)
1415 #define SYMBOL_FLAG_SDA (SYMBOL_FLAG_MACH_DEP << 2)
1416 #define SYMBOL_REF_ZDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0)
1417 #define SYMBOL_REF_TDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0)
1418 #define SYMBOL_REF_SDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0)
1419
1420 /* Define this if you have defined special-purpose predicates in the
1421 file `MACHINE.c'. This macro is called within an initializer of an
1422 array of structures. The first field in the structure is the name
1423 of a predicate and the second field is an array of rtl codes. For
1424 each predicate, list all rtl codes that can be in expressions
1425 matched by the predicate. The list should have a trailing comma. */
1426
1427 #define PREDICATE_CODES \
1428 { "reg_or_0_operand", { REG, SUBREG, CONST_INT, CONST_DOUBLE }}, \
1429 { "reg_or_int5_operand", { REG, SUBREG, CONST_INT }}, \
1430 { "reg_or_int9_operand", { REG, SUBREG, CONST_INT }}, \
1431 { "reg_or_const_operand", { REG, CONST_INT }}, \
1432 { "call_address_operand", { REG, SYMBOL_REF }}, \
1433 { "movsi_source_operand", { LABEL_REF, SYMBOL_REF, CONST_INT, \
1434 CONST_DOUBLE, CONST, HIGH, MEM, \
1435 REG, SUBREG }}, \
1436 { "special_symbolref_operand", { SYMBOL_REF }}, \
1437 { "power_of_two_operand", { CONST_INT }}, \
1438 { "pattern_is_ok_for_prologue", { PARALLEL }}, \
1439 { "pattern_is_ok_for_epilogue", { PARALLEL }}, \
1440 { "register_is_ok_for_epilogue",{ REG }}, \
1441 { "pattern_is_ok_for_dispose", { PARALLEL }}, \
1442 { "pattern_is_ok_for_prepare", { PARALLEL }}, \
1443 { "register_is_ok_for_dispose", { REG }}, \
1444 { "not_power_of_two_operand", { CONST_INT }},
1445
1446 #endif /* ! GCC_V850_H */