osf.h (TARGET_OS_CPP_BUILTINS): Define __STDC_VERSION__ to ISO C94 for C++.
[gcc.git] / gcc / cse.c
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
45 #include "params.h"
46
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
51
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
56 global CSE.
57
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
61
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
65
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
74
75 Registers and "quantity numbers":
76
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `reg_qty' records what quantity a register is currently thought
84 of as containing.
85
86 All real quantity numbers are greater than or equal to `max_reg'.
87 If register N has not been assigned a quantity, reg_qty[N] will equal N.
88
89 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
90 entries should be referenced with an index below `max_reg'.
91
92 We also maintain a bidirectional chain of registers for each
93 quantity number. The `qty_table` members `first_reg' and `last_reg',
94 and `reg_eqv_table' members `next' and `prev' hold these chains.
95
96 The first register in a chain is the one whose lifespan is least local.
97 Among equals, it is the one that was seen first.
98 We replace any equivalent register with that one.
99
100 If two registers have the same quantity number, it must be true that
101 REG expressions with qty_table `mode' must be in the hash table for both
102 registers and must be in the same class.
103
104 The converse is not true. Since hard registers may be referenced in
105 any mode, two REG expressions might be equivalent in the hash table
106 but not have the same quantity number if the quantity number of one
107 of the registers is not the same mode as those expressions.
108
109 Constants and quantity numbers
110
111 When a quantity has a known constant value, that value is stored
112 in the appropriate qty_table `const_rtx'. This is in addition to
113 putting the constant in the hash table as is usual for non-regs.
114
115 Whether a reg or a constant is preferred is determined by the configuration
116 macro CONST_COSTS and will often depend on the constant value. In any
117 event, expressions containing constants can be simplified, by fold_rtx.
118
119 When a quantity has a known nearly constant value (such as an address
120 of a stack slot), that value is stored in the appropriate qty_table
121 `const_rtx'.
122
123 Integer constants don't have a machine mode. However, cse
124 determines the intended machine mode from the destination
125 of the instruction that moves the constant. The machine mode
126 is recorded in the hash table along with the actual RTL
127 constant expression so that different modes are kept separate.
128
129 Other expressions:
130
131 To record known equivalences among expressions in general
132 we use a hash table called `table'. It has a fixed number of buckets
133 that contain chains of `struct table_elt' elements for expressions.
134 These chains connect the elements whose expressions have the same
135 hash codes.
136
137 Other chains through the same elements connect the elements which
138 currently have equivalent values.
139
140 Register references in an expression are canonicalized before hashing
141 the expression. This is done using `reg_qty' and qty_table `first_reg'.
142 The hash code of a register reference is computed using the quantity
143 number, not the register number.
144
145 When the value of an expression changes, it is necessary to remove from the
146 hash table not just that expression but all expressions whose values
147 could be different as a result.
148
149 1. If the value changing is in memory, except in special cases
150 ANYTHING referring to memory could be changed. That is because
151 nobody knows where a pointer does not point.
152 The function `invalidate_memory' removes what is necessary.
153
154 The special cases are when the address is constant or is
155 a constant plus a fixed register such as the frame pointer
156 or a static chain pointer. When such addresses are stored in,
157 we can tell exactly which other such addresses must be invalidated
158 due to overlap. `invalidate' does this.
159 All expressions that refer to non-constant
160 memory addresses are also invalidated. `invalidate_memory' does this.
161
162 2. If the value changing is a register, all expressions
163 containing references to that register, and only those,
164 must be removed.
165
166 Because searching the entire hash table for expressions that contain
167 a register is very slow, we try to figure out when it isn't necessary.
168 Precisely, this is necessary only when expressions have been
169 entered in the hash table using this register, and then the value has
170 changed, and then another expression wants to be added to refer to
171 the register's new value. This sequence of circumstances is rare
172 within any one basic block.
173
174 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
175 reg_tick[i] is incremented whenever a value is stored in register i.
176 reg_in_table[i] holds -1 if no references to register i have been
177 entered in the table; otherwise, it contains the value reg_tick[i] had
178 when the references were entered. If we want to enter a reference
179 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
180 Until we want to enter a new entry, the mere fact that the two vectors
181 don't match makes the entries be ignored if anyone tries to match them.
182
183 Registers themselves are entered in the hash table as well as in
184 the equivalent-register chains. However, the vectors `reg_tick'
185 and `reg_in_table' do not apply to expressions which are simple
186 register references. These expressions are removed from the table
187 immediately when they become invalid, and this can be done even if
188 we do not immediately search for all the expressions that refer to
189 the register.
190
191 A CLOBBER rtx in an instruction invalidates its operand for further
192 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
193 invalidates everything that resides in memory.
194
195 Related expressions:
196
197 Constant expressions that differ only by an additive integer
198 are called related. When a constant expression is put in
199 the table, the related expression with no constant term
200 is also entered. These are made to point at each other
201 so that it is possible to find out if there exists any
202 register equivalent to an expression related to a given expression. */
203
204 /* One plus largest register number used in this function. */
205
206 static int max_reg;
207
208 /* One plus largest instruction UID used in this function at time of
209 cse_main call. */
210
211 static int max_insn_uid;
212
213 /* Length of qty_table vector. We know in advance we will not need
214 a quantity number this big. */
215
216 static int max_qty;
217
218 /* Next quantity number to be allocated.
219 This is 1 + the largest number needed so far. */
220
221 static int next_qty;
222
223 /* Per-qty information tracking.
224
225 `first_reg' and `last_reg' track the head and tail of the
226 chain of registers which currently contain this quantity.
227
228 `mode' contains the machine mode of this quantity.
229
230 `const_rtx' holds the rtx of the constant value of this
231 quantity, if known. A summations of the frame/arg pointer
232 and a constant can also be entered here. When this holds
233 a known value, `const_insn' is the insn which stored the
234 constant value.
235
236 `comparison_{code,const,qty}' are used to track when a
237 comparison between a quantity and some constant or register has
238 been passed. In such a case, we know the results of the comparison
239 in case we see it again. These members record a comparison that
240 is known to be true. `comparison_code' holds the rtx code of such
241 a comparison, else it is set to UNKNOWN and the other two
242 comparison members are undefined. `comparison_const' holds
243 the constant being compared against, or zero if the comparison
244 is not against a constant. `comparison_qty' holds the quantity
245 being compared against when the result is known. If the comparison
246 is not with a register, `comparison_qty' is -1. */
247
248 struct qty_table_elem
249 {
250 rtx const_rtx;
251 rtx const_insn;
252 rtx comparison_const;
253 int comparison_qty;
254 unsigned int first_reg, last_reg;
255 /* The sizes of these fields should match the sizes of the
256 code and mode fields of struct rtx_def (see rtl.h). */
257 ENUM_BITFIELD(rtx_code) comparison_code : 16;
258 ENUM_BITFIELD(machine_mode) mode : 8;
259 };
260
261 /* The table of all qtys, indexed by qty number. */
262 static struct qty_table_elem *qty_table;
263
264 #ifdef HAVE_cc0
265 /* For machines that have a CC0, we do not record its value in the hash
266 table since its use is guaranteed to be the insn immediately following
267 its definition and any other insn is presumed to invalidate it.
268
269 Instead, we store below the value last assigned to CC0. If it should
270 happen to be a constant, it is stored in preference to the actual
271 assigned value. In case it is a constant, we store the mode in which
272 the constant should be interpreted. */
273
274 static rtx prev_insn_cc0;
275 static enum machine_mode prev_insn_cc0_mode;
276
277 /* Previous actual insn. 0 if at first insn of basic block. */
278
279 static rtx prev_insn;
280 #endif
281
282 /* Insn being scanned. */
283
284 static rtx this_insn;
285
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
288 value.
289
290 Or -1 if this register is at the end of the chain.
291
292 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
293
294 /* Per-register equivalence chain. */
295 struct reg_eqv_elem
296 {
297 int next, prev;
298 };
299
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem *reg_eqv_table;
302
303 struct cse_reg_info
304 {
305 /* Next in hash chain. */
306 struct cse_reg_info *hash_next;
307
308 /* The next cse_reg_info structure in the free or used list. */
309 struct cse_reg_info *next;
310
311 /* Search key */
312 unsigned int regno;
313
314 /* The quantity number of the register's current contents. */
315 int reg_qty;
316
317 /* The number of times the register has been altered in the current
318 basic block. */
319 int reg_tick;
320
321 /* The REG_TICK value at which rtx's containing this register are
322 valid in the hash table. If this does not equal the current
323 reg_tick value, such expressions existing in the hash table are
324 invalid. */
325 int reg_in_table;
326
327 /* The SUBREG that was set when REG_TICK was last incremented. Set
328 to -1 if the last store was to the whole register, not a subreg. */
329 unsigned int subreg_ticked;
330 };
331
332 /* A free list of cse_reg_info entries. */
333 static struct cse_reg_info *cse_reg_info_free_list;
334
335 /* A used list of cse_reg_info entries. */
336 static struct cse_reg_info *cse_reg_info_used_list;
337 static struct cse_reg_info *cse_reg_info_used_list_end;
338
339 /* A mapping from registers to cse_reg_info data structures. */
340 #define REGHASH_SHIFT 7
341 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
342 #define REGHASH_MASK (REGHASH_SIZE - 1)
343 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
344
345 #define REGHASH_FN(REGNO) \
346 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
347
348 /* The last lookup we did into the cse_reg_info_tree. This allows us
349 to cache repeated lookups. */
350 static unsigned int cached_regno;
351 static struct cse_reg_info *cached_cse_reg_info;
352
353 /* A HARD_REG_SET containing all the hard registers for which there is
354 currently a REG expression in the hash table. Note the difference
355 from the above variables, which indicate if the REG is mentioned in some
356 expression in the table. */
357
358 static HARD_REG_SET hard_regs_in_table;
359
360 /* CUID of insn that starts the basic block currently being cse-processed. */
361
362 static int cse_basic_block_start;
363
364 /* CUID of insn that ends the basic block currently being cse-processed. */
365
366 static int cse_basic_block_end;
367
368 /* Vector mapping INSN_UIDs to cuids.
369 The cuids are like uids but increase monotonically always.
370 We use them to see whether a reg is used outside a given basic block. */
371
372 static int *uid_cuid;
373
374 /* Highest UID in UID_CUID. */
375 static int max_uid;
376
377 /* Get the cuid of an insn. */
378
379 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
380
381 /* Nonzero if this pass has made changes, and therefore it's
382 worthwhile to run the garbage collector. */
383
384 static int cse_altered;
385
386 /* Nonzero if cse has altered conditional jump insns
387 in such a way that jump optimization should be redone. */
388
389 static int cse_jumps_altered;
390
391 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
392 REG_LABEL, we have to rerun jump after CSE to put in the note. */
393 static int recorded_label_ref;
394
395 /* canon_hash stores 1 in do_not_record
396 if it notices a reference to CC0, PC, or some other volatile
397 subexpression. */
398
399 static int do_not_record;
400
401 #ifdef LOAD_EXTEND_OP
402
403 /* Scratch rtl used when looking for load-extended copy of a MEM. */
404 static rtx memory_extend_rtx;
405 #endif
406
407 /* canon_hash stores 1 in hash_arg_in_memory
408 if it notices a reference to memory within the expression being hashed. */
409
410 static int hash_arg_in_memory;
411
412 /* The hash table contains buckets which are chains of `struct table_elt's,
413 each recording one expression's information.
414 That expression is in the `exp' field.
415
416 The canon_exp field contains a canonical (from the point of view of
417 alias analysis) version of the `exp' field.
418
419 Those elements with the same hash code are chained in both directions
420 through the `next_same_hash' and `prev_same_hash' fields.
421
422 Each set of expressions with equivalent values
423 are on a two-way chain through the `next_same_value'
424 and `prev_same_value' fields, and all point with
425 the `first_same_value' field at the first element in
426 that chain. The chain is in order of increasing cost.
427 Each element's cost value is in its `cost' field.
428
429 The `in_memory' field is nonzero for elements that
430 involve any reference to memory. These elements are removed
431 whenever a write is done to an unidentified location in memory.
432 To be safe, we assume that a memory address is unidentified unless
433 the address is either a symbol constant or a constant plus
434 the frame pointer or argument pointer.
435
436 The `related_value' field is used to connect related expressions
437 (that differ by adding an integer).
438 The related expressions are chained in a circular fashion.
439 `related_value' is zero for expressions for which this
440 chain is not useful.
441
442 The `cost' field stores the cost of this element's expression.
443 The `regcost' field stores the value returned by approx_reg_cost for
444 this element's expression.
445
446 The `is_const' flag is set if the element is a constant (including
447 a fixed address).
448
449 The `flag' field is used as a temporary during some search routines.
450
451 The `mode' field is usually the same as GET_MODE (`exp'), but
452 if `exp' is a CONST_INT and has no machine mode then the `mode'
453 field is the mode it was being used as. Each constant is
454 recorded separately for each mode it is used with. */
455
456 struct table_elt
457 {
458 rtx exp;
459 rtx canon_exp;
460 struct table_elt *next_same_hash;
461 struct table_elt *prev_same_hash;
462 struct table_elt *next_same_value;
463 struct table_elt *prev_same_value;
464 struct table_elt *first_same_value;
465 struct table_elt *related_value;
466 int cost;
467 int regcost;
468 /* The size of this field should match the size
469 of the mode field of struct rtx_def (see rtl.h). */
470 ENUM_BITFIELD(machine_mode) mode : 8;
471 char in_memory;
472 char is_const;
473 char flag;
474 };
475
476 /* We don't want a lot of buckets, because we rarely have very many
477 things stored in the hash table, and a lot of buckets slows
478 down a lot of loops that happen frequently. */
479 #define HASH_SHIFT 5
480 #define HASH_SIZE (1 << HASH_SHIFT)
481 #define HASH_MASK (HASH_SIZE - 1)
482
483 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
484 register (hard registers may require `do_not_record' to be set). */
485
486 #define HASH(X, M) \
487 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
488 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
489 : canon_hash (X, M)) & HASH_MASK)
490
491 /* Determine whether register number N is considered a fixed register for the
492 purpose of approximating register costs.
493 It is desirable to replace other regs with fixed regs, to reduce need for
494 non-fixed hard regs.
495 A reg wins if it is either the frame pointer or designated as fixed. */
496 #define FIXED_REGNO_P(N) \
497 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
498 || fixed_regs[N] || global_regs[N])
499
500 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
501 hard registers and pointers into the frame are the cheapest with a cost
502 of 0. Next come pseudos with a cost of one and other hard registers with
503 a cost of 2. Aside from these special cases, call `rtx_cost'. */
504
505 #define CHEAP_REGNO(N) \
506 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
507 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
508 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
509 || ((N) < FIRST_PSEUDO_REGISTER \
510 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
511
512 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
513 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
514
515 /* Get the info associated with register N. */
516
517 #define GET_CSE_REG_INFO(N) \
518 (((N) == cached_regno && cached_cse_reg_info) \
519 ? cached_cse_reg_info : get_cse_reg_info ((N)))
520
521 /* Get the number of times this register has been updated in this
522 basic block. */
523
524 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
525
526 /* Get the point at which REG was recorded in the table. */
527
528 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
529
530 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
531 SUBREG). */
532
533 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
534
535 /* Get the quantity number for REG. */
536
537 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
538
539 /* Determine if the quantity number for register X represents a valid index
540 into the qty_table. */
541
542 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
543
544 static struct table_elt *table[HASH_SIZE];
545
546 /* Chain of `struct table_elt's made so far for this function
547 but currently removed from the table. */
548
549 static struct table_elt *free_element_chain;
550
551 /* Number of `struct table_elt' structures made so far for this function. */
552
553 static int n_elements_made;
554
555 /* Maximum value `n_elements_made' has had so far in this compilation
556 for functions previously processed. */
557
558 static int max_elements_made;
559
560 /* Surviving equivalence class when two equivalence classes are merged
561 by recording the effects of a jump in the last insn. Zero if the
562 last insn was not a conditional jump. */
563
564 static struct table_elt *last_jump_equiv_class;
565
566 /* Set to the cost of a constant pool reference if one was found for a
567 symbolic constant. If this was found, it means we should try to
568 convert constants into constant pool entries if they don't fit in
569 the insn. */
570
571 static int constant_pool_entries_cost;
572 static int constant_pool_entries_regcost;
573
574 /* This data describes a block that will be processed by cse_basic_block. */
575
576 struct cse_basic_block_data
577 {
578 /* Lowest CUID value of insns in block. */
579 int low_cuid;
580 /* Highest CUID value of insns in block. */
581 int high_cuid;
582 /* Total number of SETs in block. */
583 int nsets;
584 /* Last insn in the block. */
585 rtx last;
586 /* Size of current branch path, if any. */
587 int path_size;
588 /* Current branch path, indicating which branches will be taken. */
589 struct branch_path
590 {
591 /* The branch insn. */
592 rtx branch;
593 /* Whether it should be taken or not. AROUND is the same as taken
594 except that it is used when the destination label is not preceded
595 by a BARRIER. */
596 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
597 } *path;
598 };
599
600 static bool fixed_base_plus_p (rtx x);
601 static int notreg_cost (rtx, enum rtx_code);
602 static int approx_reg_cost_1 (rtx *, void *);
603 static int approx_reg_cost (rtx);
604 static int preferrable (int, int, int, int);
605 static void new_basic_block (void);
606 static void make_new_qty (unsigned int, enum machine_mode);
607 static void make_regs_eqv (unsigned int, unsigned int);
608 static void delete_reg_equiv (unsigned int);
609 static int mention_regs (rtx);
610 static int insert_regs (rtx, struct table_elt *, int);
611 static void remove_from_table (struct table_elt *, unsigned);
612 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
613 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
614 static rtx lookup_as_function (rtx, enum rtx_code);
615 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
616 enum machine_mode);
617 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
618 static void invalidate (rtx, enum machine_mode);
619 static int cse_rtx_varies_p (rtx, int);
620 static void remove_invalid_refs (unsigned int);
621 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
622 enum machine_mode);
623 static void rehash_using_reg (rtx);
624 static void invalidate_memory (void);
625 static void invalidate_for_call (void);
626 static rtx use_related_value (rtx, struct table_elt *);
627 static unsigned canon_hash (rtx, enum machine_mode);
628 static unsigned canon_hash_string (const char *);
629 static unsigned safe_hash (rtx, enum machine_mode);
630 static int exp_equiv_p (rtx, rtx, int, int);
631 static rtx canon_reg (rtx, rtx);
632 static void find_best_addr (rtx, rtx *, enum machine_mode);
633 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
634 enum machine_mode *,
635 enum machine_mode *);
636 static rtx fold_rtx (rtx, rtx);
637 static rtx equiv_constant (rtx);
638 static void record_jump_equiv (rtx, int);
639 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
640 int);
641 static void cse_insn (rtx, rtx);
642 static int addr_affects_sp_p (rtx);
643 static void invalidate_from_clobbers (rtx);
644 static rtx cse_process_notes (rtx, rtx);
645 static void cse_around_loop (rtx);
646 static void invalidate_skipped_set (rtx, rtx, void *);
647 static void invalidate_skipped_block (rtx);
648 static void cse_check_loop_start (rtx, rtx, void *);
649 static void cse_set_around_loop (rtx, rtx, rtx);
650 static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
651 static void count_reg_usage (rtx, int *, int);
652 static int check_for_label_ref (rtx *, void *);
653 extern void dump_class (struct table_elt*);
654 static struct cse_reg_info * get_cse_reg_info (unsigned int);
655 static int check_dependence (rtx *, void *);
656
657 static void flush_hash_table (void);
658 static bool insn_live_p (rtx, int *);
659 static bool set_live_p (rtx, rtx, int *);
660 static bool dead_libcall_p (rtx, int *);
661 \f
662 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
663 virtual regs here because the simplify_*_operation routines are called
664 by integrate.c, which is called before virtual register instantiation. */
665
666 static bool
667 fixed_base_plus_p (rtx x)
668 {
669 switch (GET_CODE (x))
670 {
671 case REG:
672 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
673 return true;
674 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
675 return true;
676 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
677 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
678 return true;
679 return false;
680
681 case PLUS:
682 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
683 return false;
684 return fixed_base_plus_p (XEXP (x, 0));
685
686 case ADDRESSOF:
687 return true;
688
689 default:
690 return false;
691 }
692 }
693
694 /* Dump the expressions in the equivalence class indicated by CLASSP.
695 This function is used only for debugging. */
696 void
697 dump_class (struct table_elt *classp)
698 {
699 struct table_elt *elt;
700
701 fprintf (stderr, "Equivalence chain for ");
702 print_rtl (stderr, classp->exp);
703 fprintf (stderr, ": \n");
704
705 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
706 {
707 print_rtl (stderr, elt->exp);
708 fprintf (stderr, "\n");
709 }
710 }
711
712 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
713
714 static int
715 approx_reg_cost_1 (rtx *xp, void *data)
716 {
717 rtx x = *xp;
718 int *cost_p = data;
719
720 if (x && GET_CODE (x) == REG)
721 {
722 unsigned int regno = REGNO (x);
723
724 if (! CHEAP_REGNO (regno))
725 {
726 if (regno < FIRST_PSEUDO_REGISTER)
727 {
728 if (SMALL_REGISTER_CLASSES)
729 return 1;
730 *cost_p += 2;
731 }
732 else
733 *cost_p += 1;
734 }
735 }
736
737 return 0;
738 }
739
740 /* Return an estimate of the cost of the registers used in an rtx.
741 This is mostly the number of different REG expressions in the rtx;
742 however for some exceptions like fixed registers we use a cost of
743 0. If any other hard register reference occurs, return MAX_COST. */
744
745 static int
746 approx_reg_cost (rtx x)
747 {
748 int cost = 0;
749
750 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
751 return MAX_COST;
752
753 return cost;
754 }
755
756 /* Return a negative value if an rtx A, whose costs are given by COST_A
757 and REGCOST_A, is more desirable than an rtx B.
758 Return a positive value if A is less desirable, or 0 if the two are
759 equally good. */
760 static int
761 preferrable (int cost_a, int regcost_a, int cost_b, int regcost_b)
762 {
763 /* First, get rid of cases involving expressions that are entirely
764 unwanted. */
765 if (cost_a != cost_b)
766 {
767 if (cost_a == MAX_COST)
768 return 1;
769 if (cost_b == MAX_COST)
770 return -1;
771 }
772
773 /* Avoid extending lifetimes of hardregs. */
774 if (regcost_a != regcost_b)
775 {
776 if (regcost_a == MAX_COST)
777 return 1;
778 if (regcost_b == MAX_COST)
779 return -1;
780 }
781
782 /* Normal operation costs take precedence. */
783 if (cost_a != cost_b)
784 return cost_a - cost_b;
785 /* Only if these are identical consider effects on register pressure. */
786 if (regcost_a != regcost_b)
787 return regcost_a - regcost_b;
788 return 0;
789 }
790
791 /* Internal function, to compute cost when X is not a register; called
792 from COST macro to keep it simple. */
793
794 static int
795 notreg_cost (rtx x, enum rtx_code outer)
796 {
797 return ((GET_CODE (x) == SUBREG
798 && GET_CODE (SUBREG_REG (x)) == REG
799 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
800 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
801 && (GET_MODE_SIZE (GET_MODE (x))
802 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
803 && subreg_lowpart_p (x)
804 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
805 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
806 ? 0
807 : rtx_cost (x, outer) * 2);
808 }
809
810 /* Return an estimate of the cost of computing rtx X.
811 One use is in cse, to decide which expression to keep in the hash table.
812 Another is in rtl generation, to pick the cheapest way to multiply.
813 Other uses like the latter are expected in the future. */
814
815 int
816 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED)
817 {
818 int i, j;
819 enum rtx_code code;
820 const char *fmt;
821 int total;
822
823 if (x == 0)
824 return 0;
825
826 /* Compute the default costs of certain things.
827 Note that targetm.rtx_costs can override the defaults. */
828
829 code = GET_CODE (x);
830 switch (code)
831 {
832 case MULT:
833 total = COSTS_N_INSNS (5);
834 break;
835 case DIV:
836 case UDIV:
837 case MOD:
838 case UMOD:
839 total = COSTS_N_INSNS (7);
840 break;
841 case USE:
842 /* Used in loop.c and combine.c as a marker. */
843 total = 0;
844 break;
845 default:
846 total = COSTS_N_INSNS (1);
847 }
848
849 switch (code)
850 {
851 case REG:
852 return 0;
853
854 case SUBREG:
855 /* If we can't tie these modes, make this expensive. The larger
856 the mode, the more expensive it is. */
857 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
858 return COSTS_N_INSNS (2
859 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
860 break;
861
862 default:
863 if ((*targetm.rtx_costs) (x, code, outer_code, &total))
864 return total;
865 break;
866 }
867
868 /* Sum the costs of the sub-rtx's, plus cost of this operation,
869 which is already in total. */
870
871 fmt = GET_RTX_FORMAT (code);
872 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
873 if (fmt[i] == 'e')
874 total += rtx_cost (XEXP (x, i), code);
875 else if (fmt[i] == 'E')
876 for (j = 0; j < XVECLEN (x, i); j++)
877 total += rtx_cost (XVECEXP (x, i, j), code);
878
879 return total;
880 }
881 \f
882 /* Return cost of address expression X.
883 Expect that X is properly formed address reference. */
884
885 int
886 address_cost (rtx x, enum machine_mode mode)
887 {
888 /* The address_cost target hook does not deal with ADDRESSOF nodes. But,
889 during CSE, such nodes are present. Using an ADDRESSOF node which
890 refers to the address of a REG is a good thing because we can then
891 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
892
893 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
894 return -1;
895
896 /* We may be asked for cost of various unusual addresses, such as operands
897 of push instruction. It is not worthwhile to complicate writing
898 of the target hook by such cases. */
899
900 if (!memory_address_p (mode, x))
901 return 1000;
902
903 return (*targetm.address_cost) (x);
904 }
905
906 /* If the target doesn't override, compute the cost as with arithmetic. */
907
908 int
909 default_address_cost (rtx x)
910 {
911 return rtx_cost (x, MEM);
912 }
913 \f
914 static struct cse_reg_info *
915 get_cse_reg_info (unsigned int regno)
916 {
917 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
918 struct cse_reg_info *p;
919
920 for (p = *hash_head; p != NULL; p = p->hash_next)
921 if (p->regno == regno)
922 break;
923
924 if (p == NULL)
925 {
926 /* Get a new cse_reg_info structure. */
927 if (cse_reg_info_free_list)
928 {
929 p = cse_reg_info_free_list;
930 cse_reg_info_free_list = p->next;
931 }
932 else
933 p = xmalloc (sizeof (struct cse_reg_info));
934
935 /* Insert into hash table. */
936 p->hash_next = *hash_head;
937 *hash_head = p;
938
939 /* Initialize it. */
940 p->reg_tick = 1;
941 p->reg_in_table = -1;
942 p->subreg_ticked = -1;
943 p->reg_qty = regno;
944 p->regno = regno;
945 p->next = cse_reg_info_used_list;
946 cse_reg_info_used_list = p;
947 if (!cse_reg_info_used_list_end)
948 cse_reg_info_used_list_end = p;
949 }
950
951 /* Cache this lookup; we tend to be looking up information about the
952 same register several times in a row. */
953 cached_regno = regno;
954 cached_cse_reg_info = p;
955
956 return p;
957 }
958
959 /* Clear the hash table and initialize each register with its own quantity,
960 for a new basic block. */
961
962 static void
963 new_basic_block (void)
964 {
965 int i;
966
967 next_qty = max_reg;
968
969 /* Clear out hash table state for this pass. */
970
971 memset (reg_hash, 0, sizeof reg_hash);
972
973 if (cse_reg_info_used_list)
974 {
975 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
976 cse_reg_info_free_list = cse_reg_info_used_list;
977 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
978 }
979 cached_cse_reg_info = 0;
980
981 CLEAR_HARD_REG_SET (hard_regs_in_table);
982
983 /* The per-quantity values used to be initialized here, but it is
984 much faster to initialize each as it is made in `make_new_qty'. */
985
986 for (i = 0; i < HASH_SIZE; i++)
987 {
988 struct table_elt *first;
989
990 first = table[i];
991 if (first != NULL)
992 {
993 struct table_elt *last = first;
994
995 table[i] = NULL;
996
997 while (last->next_same_hash != NULL)
998 last = last->next_same_hash;
999
1000 /* Now relink this hash entire chain into
1001 the free element list. */
1002
1003 last->next_same_hash = free_element_chain;
1004 free_element_chain = first;
1005 }
1006 }
1007
1008 #ifdef HAVE_cc0
1009 prev_insn = 0;
1010 prev_insn_cc0 = 0;
1011 #endif
1012 }
1013
1014 /* Say that register REG contains a quantity in mode MODE not in any
1015 register before and initialize that quantity. */
1016
1017 static void
1018 make_new_qty (unsigned int reg, enum machine_mode mode)
1019 {
1020 int q;
1021 struct qty_table_elem *ent;
1022 struct reg_eqv_elem *eqv;
1023
1024 if (next_qty >= max_qty)
1025 abort ();
1026
1027 q = REG_QTY (reg) = next_qty++;
1028 ent = &qty_table[q];
1029 ent->first_reg = reg;
1030 ent->last_reg = reg;
1031 ent->mode = mode;
1032 ent->const_rtx = ent->const_insn = NULL_RTX;
1033 ent->comparison_code = UNKNOWN;
1034
1035 eqv = &reg_eqv_table[reg];
1036 eqv->next = eqv->prev = -1;
1037 }
1038
1039 /* Make reg NEW equivalent to reg OLD.
1040 OLD is not changing; NEW is. */
1041
1042 static void
1043 make_regs_eqv (unsigned int new, unsigned int old)
1044 {
1045 unsigned int lastr, firstr;
1046 int q = REG_QTY (old);
1047 struct qty_table_elem *ent;
1048
1049 ent = &qty_table[q];
1050
1051 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1052 if (! REGNO_QTY_VALID_P (old))
1053 abort ();
1054
1055 REG_QTY (new) = q;
1056 firstr = ent->first_reg;
1057 lastr = ent->last_reg;
1058
1059 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1060 hard regs. Among pseudos, if NEW will live longer than any other reg
1061 of the same qty, and that is beyond the current basic block,
1062 make it the new canonical replacement for this qty. */
1063 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1064 /* Certain fixed registers might be of the class NO_REGS. This means
1065 that not only can they not be allocated by the compiler, but
1066 they cannot be used in substitutions or canonicalizations
1067 either. */
1068 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1069 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1070 || (new >= FIRST_PSEUDO_REGISTER
1071 && (firstr < FIRST_PSEUDO_REGISTER
1072 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1073 || (uid_cuid[REGNO_FIRST_UID (new)]
1074 < cse_basic_block_start))
1075 && (uid_cuid[REGNO_LAST_UID (new)]
1076 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1077 {
1078 reg_eqv_table[firstr].prev = new;
1079 reg_eqv_table[new].next = firstr;
1080 reg_eqv_table[new].prev = -1;
1081 ent->first_reg = new;
1082 }
1083 else
1084 {
1085 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1086 Otherwise, insert before any non-fixed hard regs that are at the
1087 end. Registers of class NO_REGS cannot be used as an
1088 equivalent for anything. */
1089 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1090 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1091 && new >= FIRST_PSEUDO_REGISTER)
1092 lastr = reg_eqv_table[lastr].prev;
1093 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1094 if (reg_eqv_table[lastr].next >= 0)
1095 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1096 else
1097 qty_table[q].last_reg = new;
1098 reg_eqv_table[lastr].next = new;
1099 reg_eqv_table[new].prev = lastr;
1100 }
1101 }
1102
1103 /* Remove REG from its equivalence class. */
1104
1105 static void
1106 delete_reg_equiv (unsigned int reg)
1107 {
1108 struct qty_table_elem *ent;
1109 int q = REG_QTY (reg);
1110 int p, n;
1111
1112 /* If invalid, do nothing. */
1113 if (q == (int) reg)
1114 return;
1115
1116 ent = &qty_table[q];
1117
1118 p = reg_eqv_table[reg].prev;
1119 n = reg_eqv_table[reg].next;
1120
1121 if (n != -1)
1122 reg_eqv_table[n].prev = p;
1123 else
1124 ent->last_reg = p;
1125 if (p != -1)
1126 reg_eqv_table[p].next = n;
1127 else
1128 ent->first_reg = n;
1129
1130 REG_QTY (reg) = reg;
1131 }
1132
1133 /* Remove any invalid expressions from the hash table
1134 that refer to any of the registers contained in expression X.
1135
1136 Make sure that newly inserted references to those registers
1137 as subexpressions will be considered valid.
1138
1139 mention_regs is not called when a register itself
1140 is being stored in the table.
1141
1142 Return 1 if we have done something that may have changed the hash code
1143 of X. */
1144
1145 static int
1146 mention_regs (rtx x)
1147 {
1148 enum rtx_code code;
1149 int i, j;
1150 const char *fmt;
1151 int changed = 0;
1152
1153 if (x == 0)
1154 return 0;
1155
1156 code = GET_CODE (x);
1157 if (code == REG)
1158 {
1159 unsigned int regno = REGNO (x);
1160 unsigned int endregno
1161 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1162 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1163 unsigned int i;
1164
1165 for (i = regno; i < endregno; i++)
1166 {
1167 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1168 remove_invalid_refs (i);
1169
1170 REG_IN_TABLE (i) = REG_TICK (i);
1171 SUBREG_TICKED (i) = -1;
1172 }
1173
1174 return 0;
1175 }
1176
1177 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1178 pseudo if they don't use overlapping words. We handle only pseudos
1179 here for simplicity. */
1180 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1181 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1182 {
1183 unsigned int i = REGNO (SUBREG_REG (x));
1184
1185 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1186 {
1187 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1188 the last store to this register really stored into this
1189 subreg, then remove the memory of this subreg.
1190 Otherwise, remove any memory of the entire register and
1191 all its subregs from the table. */
1192 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1193 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1194 remove_invalid_refs (i);
1195 else
1196 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1197 }
1198
1199 REG_IN_TABLE (i) = REG_TICK (i);
1200 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1201 return 0;
1202 }
1203
1204 /* If X is a comparison or a COMPARE and either operand is a register
1205 that does not have a quantity, give it one. This is so that a later
1206 call to record_jump_equiv won't cause X to be assigned a different
1207 hash code and not found in the table after that call.
1208
1209 It is not necessary to do this here, since rehash_using_reg can
1210 fix up the table later, but doing this here eliminates the need to
1211 call that expensive function in the most common case where the only
1212 use of the register is in the comparison. */
1213
1214 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1215 {
1216 if (GET_CODE (XEXP (x, 0)) == REG
1217 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1218 if (insert_regs (XEXP (x, 0), NULL, 0))
1219 {
1220 rehash_using_reg (XEXP (x, 0));
1221 changed = 1;
1222 }
1223
1224 if (GET_CODE (XEXP (x, 1)) == REG
1225 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1226 if (insert_regs (XEXP (x, 1), NULL, 0))
1227 {
1228 rehash_using_reg (XEXP (x, 1));
1229 changed = 1;
1230 }
1231 }
1232
1233 fmt = GET_RTX_FORMAT (code);
1234 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1235 if (fmt[i] == 'e')
1236 changed |= mention_regs (XEXP (x, i));
1237 else if (fmt[i] == 'E')
1238 for (j = 0; j < XVECLEN (x, i); j++)
1239 changed |= mention_regs (XVECEXP (x, i, j));
1240
1241 return changed;
1242 }
1243
1244 /* Update the register quantities for inserting X into the hash table
1245 with a value equivalent to CLASSP.
1246 (If the class does not contain a REG, it is irrelevant.)
1247 If MODIFIED is nonzero, X is a destination; it is being modified.
1248 Note that delete_reg_equiv should be called on a register
1249 before insert_regs is done on that register with MODIFIED != 0.
1250
1251 Nonzero value means that elements of reg_qty have changed
1252 so X's hash code may be different. */
1253
1254 static int
1255 insert_regs (rtx x, struct table_elt *classp, int modified)
1256 {
1257 if (GET_CODE (x) == REG)
1258 {
1259 unsigned int regno = REGNO (x);
1260 int qty_valid;
1261
1262 /* If REGNO is in the equivalence table already but is of the
1263 wrong mode for that equivalence, don't do anything here. */
1264
1265 qty_valid = REGNO_QTY_VALID_P (regno);
1266 if (qty_valid)
1267 {
1268 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1269
1270 if (ent->mode != GET_MODE (x))
1271 return 0;
1272 }
1273
1274 if (modified || ! qty_valid)
1275 {
1276 if (classp)
1277 for (classp = classp->first_same_value;
1278 classp != 0;
1279 classp = classp->next_same_value)
1280 if (GET_CODE (classp->exp) == REG
1281 && GET_MODE (classp->exp) == GET_MODE (x))
1282 {
1283 make_regs_eqv (regno, REGNO (classp->exp));
1284 return 1;
1285 }
1286
1287 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1288 than REG_IN_TABLE to find out if there was only a single preceding
1289 invalidation - for the SUBREG - or another one, which would be
1290 for the full register. However, if we find here that REG_TICK
1291 indicates that the register is invalid, it means that it has
1292 been invalidated in a separate operation. The SUBREG might be used
1293 now (then this is a recursive call), or we might use the full REG
1294 now and a SUBREG of it later. So bump up REG_TICK so that
1295 mention_regs will do the right thing. */
1296 if (! modified
1297 && REG_IN_TABLE (regno) >= 0
1298 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1299 REG_TICK (regno)++;
1300 make_new_qty (regno, GET_MODE (x));
1301 return 1;
1302 }
1303
1304 return 0;
1305 }
1306
1307 /* If X is a SUBREG, we will likely be inserting the inner register in the
1308 table. If that register doesn't have an assigned quantity number at
1309 this point but does later, the insertion that we will be doing now will
1310 not be accessible because its hash code will have changed. So assign
1311 a quantity number now. */
1312
1313 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1314 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1315 {
1316 insert_regs (SUBREG_REG (x), NULL, 0);
1317 mention_regs (x);
1318 return 1;
1319 }
1320 else
1321 return mention_regs (x);
1322 }
1323 \f
1324 /* Look in or update the hash table. */
1325
1326 /* Remove table element ELT from use in the table.
1327 HASH is its hash code, made using the HASH macro.
1328 It's an argument because often that is known in advance
1329 and we save much time not recomputing it. */
1330
1331 static void
1332 remove_from_table (struct table_elt *elt, unsigned int hash)
1333 {
1334 if (elt == 0)
1335 return;
1336
1337 /* Mark this element as removed. See cse_insn. */
1338 elt->first_same_value = 0;
1339
1340 /* Remove the table element from its equivalence class. */
1341
1342 {
1343 struct table_elt *prev = elt->prev_same_value;
1344 struct table_elt *next = elt->next_same_value;
1345
1346 if (next)
1347 next->prev_same_value = prev;
1348
1349 if (prev)
1350 prev->next_same_value = next;
1351 else
1352 {
1353 struct table_elt *newfirst = next;
1354 while (next)
1355 {
1356 next->first_same_value = newfirst;
1357 next = next->next_same_value;
1358 }
1359 }
1360 }
1361
1362 /* Remove the table element from its hash bucket. */
1363
1364 {
1365 struct table_elt *prev = elt->prev_same_hash;
1366 struct table_elt *next = elt->next_same_hash;
1367
1368 if (next)
1369 next->prev_same_hash = prev;
1370
1371 if (prev)
1372 prev->next_same_hash = next;
1373 else if (table[hash] == elt)
1374 table[hash] = next;
1375 else
1376 {
1377 /* This entry is not in the proper hash bucket. This can happen
1378 when two classes were merged by `merge_equiv_classes'. Search
1379 for the hash bucket that it heads. This happens only very
1380 rarely, so the cost is acceptable. */
1381 for (hash = 0; hash < HASH_SIZE; hash++)
1382 if (table[hash] == elt)
1383 table[hash] = next;
1384 }
1385 }
1386
1387 /* Remove the table element from its related-value circular chain. */
1388
1389 if (elt->related_value != 0 && elt->related_value != elt)
1390 {
1391 struct table_elt *p = elt->related_value;
1392
1393 while (p->related_value != elt)
1394 p = p->related_value;
1395 p->related_value = elt->related_value;
1396 if (p->related_value == p)
1397 p->related_value = 0;
1398 }
1399
1400 /* Now add it to the free element chain. */
1401 elt->next_same_hash = free_element_chain;
1402 free_element_chain = elt;
1403 }
1404
1405 /* Look up X in the hash table and return its table element,
1406 or 0 if X is not in the table.
1407
1408 MODE is the machine-mode of X, or if X is an integer constant
1409 with VOIDmode then MODE is the mode with which X will be used.
1410
1411 Here we are satisfied to find an expression whose tree structure
1412 looks like X. */
1413
1414 static struct table_elt *
1415 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1416 {
1417 struct table_elt *p;
1418
1419 for (p = table[hash]; p; p = p->next_same_hash)
1420 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1421 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1422 return p;
1423
1424 return 0;
1425 }
1426
1427 /* Like `lookup' but don't care whether the table element uses invalid regs.
1428 Also ignore discrepancies in the machine mode of a register. */
1429
1430 static struct table_elt *
1431 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1432 {
1433 struct table_elt *p;
1434
1435 if (GET_CODE (x) == REG)
1436 {
1437 unsigned int regno = REGNO (x);
1438
1439 /* Don't check the machine mode when comparing registers;
1440 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1441 for (p = table[hash]; p; p = p->next_same_hash)
1442 if (GET_CODE (p->exp) == REG
1443 && REGNO (p->exp) == regno)
1444 return p;
1445 }
1446 else
1447 {
1448 for (p = table[hash]; p; p = p->next_same_hash)
1449 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1450 return p;
1451 }
1452
1453 return 0;
1454 }
1455
1456 /* Look for an expression equivalent to X and with code CODE.
1457 If one is found, return that expression. */
1458
1459 static rtx
1460 lookup_as_function (rtx x, enum rtx_code code)
1461 {
1462 struct table_elt *p
1463 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1464
1465 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1466 long as we are narrowing. So if we looked in vain for a mode narrower
1467 than word_mode before, look for word_mode now. */
1468 if (p == 0 && code == CONST_INT
1469 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1470 {
1471 x = copy_rtx (x);
1472 PUT_MODE (x, word_mode);
1473 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1474 }
1475
1476 if (p == 0)
1477 return 0;
1478
1479 for (p = p->first_same_value; p; p = p->next_same_value)
1480 if (GET_CODE (p->exp) == code
1481 /* Make sure this is a valid entry in the table. */
1482 && exp_equiv_p (p->exp, p->exp, 1, 0))
1483 return p->exp;
1484
1485 return 0;
1486 }
1487
1488 /* Insert X in the hash table, assuming HASH is its hash code
1489 and CLASSP is an element of the class it should go in
1490 (or 0 if a new class should be made).
1491 It is inserted at the proper position to keep the class in
1492 the order cheapest first.
1493
1494 MODE is the machine-mode of X, or if X is an integer constant
1495 with VOIDmode then MODE is the mode with which X will be used.
1496
1497 For elements of equal cheapness, the most recent one
1498 goes in front, except that the first element in the list
1499 remains first unless a cheaper element is added. The order of
1500 pseudo-registers does not matter, as canon_reg will be called to
1501 find the cheapest when a register is retrieved from the table.
1502
1503 The in_memory field in the hash table element is set to 0.
1504 The caller must set it nonzero if appropriate.
1505
1506 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1507 and if insert_regs returns a nonzero value
1508 you must then recompute its hash code before calling here.
1509
1510 If necessary, update table showing constant values of quantities. */
1511
1512 #define CHEAPER(X, Y) \
1513 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1514
1515 static struct table_elt *
1516 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1517 {
1518 struct table_elt *elt;
1519
1520 /* If X is a register and we haven't made a quantity for it,
1521 something is wrong. */
1522 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1523 abort ();
1524
1525 /* If X is a hard register, show it is being put in the table. */
1526 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1527 {
1528 unsigned int regno = REGNO (x);
1529 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1530 unsigned int i;
1531
1532 for (i = regno; i < endregno; i++)
1533 SET_HARD_REG_BIT (hard_regs_in_table, i);
1534 }
1535
1536 /* Put an element for X into the right hash bucket. */
1537
1538 elt = free_element_chain;
1539 if (elt)
1540 free_element_chain = elt->next_same_hash;
1541 else
1542 {
1543 n_elements_made++;
1544 elt = xmalloc (sizeof (struct table_elt));
1545 }
1546
1547 elt->exp = x;
1548 elt->canon_exp = NULL_RTX;
1549 elt->cost = COST (x);
1550 elt->regcost = approx_reg_cost (x);
1551 elt->next_same_value = 0;
1552 elt->prev_same_value = 0;
1553 elt->next_same_hash = table[hash];
1554 elt->prev_same_hash = 0;
1555 elt->related_value = 0;
1556 elt->in_memory = 0;
1557 elt->mode = mode;
1558 elt->is_const = (CONSTANT_P (x)
1559 /* GNU C++ takes advantage of this for `this'
1560 (and other const values). */
1561 || (GET_CODE (x) == REG
1562 && RTX_UNCHANGING_P (x)
1563 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1564 || fixed_base_plus_p (x));
1565
1566 if (table[hash])
1567 table[hash]->prev_same_hash = elt;
1568 table[hash] = elt;
1569
1570 /* Put it into the proper value-class. */
1571 if (classp)
1572 {
1573 classp = classp->first_same_value;
1574 if (CHEAPER (elt, classp))
1575 /* Insert at the head of the class. */
1576 {
1577 struct table_elt *p;
1578 elt->next_same_value = classp;
1579 classp->prev_same_value = elt;
1580 elt->first_same_value = elt;
1581
1582 for (p = classp; p; p = p->next_same_value)
1583 p->first_same_value = elt;
1584 }
1585 else
1586 {
1587 /* Insert not at head of the class. */
1588 /* Put it after the last element cheaper than X. */
1589 struct table_elt *p, *next;
1590
1591 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1592 p = next);
1593
1594 /* Put it after P and before NEXT. */
1595 elt->next_same_value = next;
1596 if (next)
1597 next->prev_same_value = elt;
1598
1599 elt->prev_same_value = p;
1600 p->next_same_value = elt;
1601 elt->first_same_value = classp;
1602 }
1603 }
1604 else
1605 elt->first_same_value = elt;
1606
1607 /* If this is a constant being set equivalent to a register or a register
1608 being set equivalent to a constant, note the constant equivalence.
1609
1610 If this is a constant, it cannot be equivalent to a different constant,
1611 and a constant is the only thing that can be cheaper than a register. So
1612 we know the register is the head of the class (before the constant was
1613 inserted).
1614
1615 If this is a register that is not already known equivalent to a
1616 constant, we must check the entire class.
1617
1618 If this is a register that is already known equivalent to an insn,
1619 update the qtys `const_insn' to show that `this_insn' is the latest
1620 insn making that quantity equivalent to the constant. */
1621
1622 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1623 && GET_CODE (x) != REG)
1624 {
1625 int exp_q = REG_QTY (REGNO (classp->exp));
1626 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1627
1628 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1629 exp_ent->const_insn = this_insn;
1630 }
1631
1632 else if (GET_CODE (x) == REG
1633 && classp
1634 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1635 && ! elt->is_const)
1636 {
1637 struct table_elt *p;
1638
1639 for (p = classp; p != 0; p = p->next_same_value)
1640 {
1641 if (p->is_const && GET_CODE (p->exp) != REG)
1642 {
1643 int x_q = REG_QTY (REGNO (x));
1644 struct qty_table_elem *x_ent = &qty_table[x_q];
1645
1646 x_ent->const_rtx
1647 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1648 x_ent->const_insn = this_insn;
1649 break;
1650 }
1651 }
1652 }
1653
1654 else if (GET_CODE (x) == REG
1655 && qty_table[REG_QTY (REGNO (x))].const_rtx
1656 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1657 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1658
1659 /* If this is a constant with symbolic value,
1660 and it has a term with an explicit integer value,
1661 link it up with related expressions. */
1662 if (GET_CODE (x) == CONST)
1663 {
1664 rtx subexp = get_related_value (x);
1665 unsigned subhash;
1666 struct table_elt *subelt, *subelt_prev;
1667
1668 if (subexp != 0)
1669 {
1670 /* Get the integer-free subexpression in the hash table. */
1671 subhash = safe_hash (subexp, mode) & HASH_MASK;
1672 subelt = lookup (subexp, subhash, mode);
1673 if (subelt == 0)
1674 subelt = insert (subexp, NULL, subhash, mode);
1675 /* Initialize SUBELT's circular chain if it has none. */
1676 if (subelt->related_value == 0)
1677 subelt->related_value = subelt;
1678 /* Find the element in the circular chain that precedes SUBELT. */
1679 subelt_prev = subelt;
1680 while (subelt_prev->related_value != subelt)
1681 subelt_prev = subelt_prev->related_value;
1682 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1683 This way the element that follows SUBELT is the oldest one. */
1684 elt->related_value = subelt_prev->related_value;
1685 subelt_prev->related_value = elt;
1686 }
1687 }
1688
1689 return elt;
1690 }
1691 \f
1692 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1693 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1694 the two classes equivalent.
1695
1696 CLASS1 will be the surviving class; CLASS2 should not be used after this
1697 call.
1698
1699 Any invalid entries in CLASS2 will not be copied. */
1700
1701 static void
1702 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1703 {
1704 struct table_elt *elt, *next, *new;
1705
1706 /* Ensure we start with the head of the classes. */
1707 class1 = class1->first_same_value;
1708 class2 = class2->first_same_value;
1709
1710 /* If they were already equal, forget it. */
1711 if (class1 == class2)
1712 return;
1713
1714 for (elt = class2; elt; elt = next)
1715 {
1716 unsigned int hash;
1717 rtx exp = elt->exp;
1718 enum machine_mode mode = elt->mode;
1719
1720 next = elt->next_same_value;
1721
1722 /* Remove old entry, make a new one in CLASS1's class.
1723 Don't do this for invalid entries as we cannot find their
1724 hash code (it also isn't necessary). */
1725 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1726 {
1727 hash_arg_in_memory = 0;
1728 hash = HASH (exp, mode);
1729
1730 if (GET_CODE (exp) == REG)
1731 delete_reg_equiv (REGNO (exp));
1732
1733 remove_from_table (elt, hash);
1734
1735 if (insert_regs (exp, class1, 0))
1736 {
1737 rehash_using_reg (exp);
1738 hash = HASH (exp, mode);
1739 }
1740 new = insert (exp, class1, hash, mode);
1741 new->in_memory = hash_arg_in_memory;
1742 }
1743 }
1744 }
1745 \f
1746 /* Flush the entire hash table. */
1747
1748 static void
1749 flush_hash_table (void)
1750 {
1751 int i;
1752 struct table_elt *p;
1753
1754 for (i = 0; i < HASH_SIZE; i++)
1755 for (p = table[i]; p; p = table[i])
1756 {
1757 /* Note that invalidate can remove elements
1758 after P in the current hash chain. */
1759 if (GET_CODE (p->exp) == REG)
1760 invalidate (p->exp, p->mode);
1761 else
1762 remove_from_table (p, i);
1763 }
1764 }
1765 \f
1766 /* Function called for each rtx to check whether true dependence exist. */
1767 struct check_dependence_data
1768 {
1769 enum machine_mode mode;
1770 rtx exp;
1771 };
1772
1773 static int
1774 check_dependence (rtx *x, void *data)
1775 {
1776 struct check_dependence_data *d = (struct check_dependence_data *) data;
1777 if (*x && GET_CODE (*x) == MEM)
1778 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1779 else
1780 return 0;
1781 }
1782 \f
1783 /* Remove from the hash table, or mark as invalid, all expressions whose
1784 values could be altered by storing in X. X is a register, a subreg, or
1785 a memory reference with nonvarying address (because, when a memory
1786 reference with a varying address is stored in, all memory references are
1787 removed by invalidate_memory so specific invalidation is superfluous).
1788 FULL_MODE, if not VOIDmode, indicates that this much should be
1789 invalidated instead of just the amount indicated by the mode of X. This
1790 is only used for bitfield stores into memory.
1791
1792 A nonvarying address may be just a register or just a symbol reference,
1793 or it may be either of those plus a numeric offset. */
1794
1795 static void
1796 invalidate (rtx x, enum machine_mode full_mode)
1797 {
1798 int i;
1799 struct table_elt *p;
1800
1801 switch (GET_CODE (x))
1802 {
1803 case REG:
1804 {
1805 /* If X is a register, dependencies on its contents are recorded
1806 through the qty number mechanism. Just change the qty number of
1807 the register, mark it as invalid for expressions that refer to it,
1808 and remove it itself. */
1809 unsigned int regno = REGNO (x);
1810 unsigned int hash = HASH (x, GET_MODE (x));
1811
1812 /* Remove REGNO from any quantity list it might be on and indicate
1813 that its value might have changed. If it is a pseudo, remove its
1814 entry from the hash table.
1815
1816 For a hard register, we do the first two actions above for any
1817 additional hard registers corresponding to X. Then, if any of these
1818 registers are in the table, we must remove any REG entries that
1819 overlap these registers. */
1820
1821 delete_reg_equiv (regno);
1822 REG_TICK (regno)++;
1823 SUBREG_TICKED (regno) = -1;
1824
1825 if (regno >= FIRST_PSEUDO_REGISTER)
1826 {
1827 /* Because a register can be referenced in more than one mode,
1828 we might have to remove more than one table entry. */
1829 struct table_elt *elt;
1830
1831 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1832 remove_from_table (elt, hash);
1833 }
1834 else
1835 {
1836 HOST_WIDE_INT in_table
1837 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1838 unsigned int endregno
1839 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1840 unsigned int tregno, tendregno, rn;
1841 struct table_elt *p, *next;
1842
1843 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1844
1845 for (rn = regno + 1; rn < endregno; rn++)
1846 {
1847 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1848 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1849 delete_reg_equiv (rn);
1850 REG_TICK (rn)++;
1851 SUBREG_TICKED (rn) = -1;
1852 }
1853
1854 if (in_table)
1855 for (hash = 0; hash < HASH_SIZE; hash++)
1856 for (p = table[hash]; p; p = next)
1857 {
1858 next = p->next_same_hash;
1859
1860 if (GET_CODE (p->exp) != REG
1861 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1862 continue;
1863
1864 tregno = REGNO (p->exp);
1865 tendregno
1866 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1867 if (tendregno > regno && tregno < endregno)
1868 remove_from_table (p, hash);
1869 }
1870 }
1871 }
1872 return;
1873
1874 case SUBREG:
1875 invalidate (SUBREG_REG (x), VOIDmode);
1876 return;
1877
1878 case PARALLEL:
1879 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1880 invalidate (XVECEXP (x, 0, i), VOIDmode);
1881 return;
1882
1883 case EXPR_LIST:
1884 /* This is part of a disjoint return value; extract the location in
1885 question ignoring the offset. */
1886 invalidate (XEXP (x, 0), VOIDmode);
1887 return;
1888
1889 case MEM:
1890 /* Calculate the canonical version of X here so that
1891 true_dependence doesn't generate new RTL for X on each call. */
1892 x = canon_rtx (x);
1893
1894 /* Remove all hash table elements that refer to overlapping pieces of
1895 memory. */
1896 if (full_mode == VOIDmode)
1897 full_mode = GET_MODE (x);
1898
1899 for (i = 0; i < HASH_SIZE; i++)
1900 {
1901 struct table_elt *next;
1902
1903 for (p = table[i]; p; p = next)
1904 {
1905 next = p->next_same_hash;
1906 if (p->in_memory)
1907 {
1908 struct check_dependence_data d;
1909
1910 /* Just canonicalize the expression once;
1911 otherwise each time we call invalidate
1912 true_dependence will canonicalize the
1913 expression again. */
1914 if (!p->canon_exp)
1915 p->canon_exp = canon_rtx (p->exp);
1916 d.exp = x;
1917 d.mode = full_mode;
1918 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1919 remove_from_table (p, i);
1920 }
1921 }
1922 }
1923 return;
1924
1925 default:
1926 abort ();
1927 }
1928 }
1929 \f
1930 /* Remove all expressions that refer to register REGNO,
1931 since they are already invalid, and we are about to
1932 mark that register valid again and don't want the old
1933 expressions to reappear as valid. */
1934
1935 static void
1936 remove_invalid_refs (unsigned int regno)
1937 {
1938 unsigned int i;
1939 struct table_elt *p, *next;
1940
1941 for (i = 0; i < HASH_SIZE; i++)
1942 for (p = table[i]; p; p = next)
1943 {
1944 next = p->next_same_hash;
1945 if (GET_CODE (p->exp) != REG
1946 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1947 remove_from_table (p, i);
1948 }
1949 }
1950
1951 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1952 and mode MODE. */
1953 static void
1954 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1955 enum machine_mode mode)
1956 {
1957 unsigned int i;
1958 struct table_elt *p, *next;
1959 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1960
1961 for (i = 0; i < HASH_SIZE; i++)
1962 for (p = table[i]; p; p = next)
1963 {
1964 rtx exp = p->exp;
1965 next = p->next_same_hash;
1966
1967 if (GET_CODE (exp) != REG
1968 && (GET_CODE (exp) != SUBREG
1969 || GET_CODE (SUBREG_REG (exp)) != REG
1970 || REGNO (SUBREG_REG (exp)) != regno
1971 || (((SUBREG_BYTE (exp)
1972 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1973 && SUBREG_BYTE (exp) <= end))
1974 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1975 remove_from_table (p, i);
1976 }
1977 }
1978 \f
1979 /* Recompute the hash codes of any valid entries in the hash table that
1980 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1981
1982 This is called when we make a jump equivalence. */
1983
1984 static void
1985 rehash_using_reg (rtx x)
1986 {
1987 unsigned int i;
1988 struct table_elt *p, *next;
1989 unsigned hash;
1990
1991 if (GET_CODE (x) == SUBREG)
1992 x = SUBREG_REG (x);
1993
1994 /* If X is not a register or if the register is known not to be in any
1995 valid entries in the table, we have no work to do. */
1996
1997 if (GET_CODE (x) != REG
1998 || REG_IN_TABLE (REGNO (x)) < 0
1999 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2000 return;
2001
2002 /* Scan all hash chains looking for valid entries that mention X.
2003 If we find one and it is in the wrong hash chain, move it. We can skip
2004 objects that are registers, since they are handled specially. */
2005
2006 for (i = 0; i < HASH_SIZE; i++)
2007 for (p = table[i]; p; p = next)
2008 {
2009 next = p->next_same_hash;
2010 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2011 && exp_equiv_p (p->exp, p->exp, 1, 0)
2012 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2013 {
2014 if (p->next_same_hash)
2015 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2016
2017 if (p->prev_same_hash)
2018 p->prev_same_hash->next_same_hash = p->next_same_hash;
2019 else
2020 table[i] = p->next_same_hash;
2021
2022 p->next_same_hash = table[hash];
2023 p->prev_same_hash = 0;
2024 if (table[hash])
2025 table[hash]->prev_same_hash = p;
2026 table[hash] = p;
2027 }
2028 }
2029 }
2030 \f
2031 /* Remove from the hash table any expression that is a call-clobbered
2032 register. Also update their TICK values. */
2033
2034 static void
2035 invalidate_for_call (void)
2036 {
2037 unsigned int regno, endregno;
2038 unsigned int i;
2039 unsigned hash;
2040 struct table_elt *p, *next;
2041 int in_table = 0;
2042
2043 /* Go through all the hard registers. For each that is clobbered in
2044 a CALL_INSN, remove the register from quantity chains and update
2045 reg_tick if defined. Also see if any of these registers is currently
2046 in the table. */
2047
2048 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2049 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2050 {
2051 delete_reg_equiv (regno);
2052 if (REG_TICK (regno) >= 0)
2053 {
2054 REG_TICK (regno)++;
2055 SUBREG_TICKED (regno) = -1;
2056 }
2057
2058 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2059 }
2060
2061 /* In the case where we have no call-clobbered hard registers in the
2062 table, we are done. Otherwise, scan the table and remove any
2063 entry that overlaps a call-clobbered register. */
2064
2065 if (in_table)
2066 for (hash = 0; hash < HASH_SIZE; hash++)
2067 for (p = table[hash]; p; p = next)
2068 {
2069 next = p->next_same_hash;
2070
2071 if (GET_CODE (p->exp) != REG
2072 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2073 continue;
2074
2075 regno = REGNO (p->exp);
2076 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2077
2078 for (i = regno; i < endregno; i++)
2079 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2080 {
2081 remove_from_table (p, hash);
2082 break;
2083 }
2084 }
2085 }
2086 \f
2087 /* Given an expression X of type CONST,
2088 and ELT which is its table entry (or 0 if it
2089 is not in the hash table),
2090 return an alternate expression for X as a register plus integer.
2091 If none can be found, return 0. */
2092
2093 static rtx
2094 use_related_value (rtx x, struct table_elt *elt)
2095 {
2096 struct table_elt *relt = 0;
2097 struct table_elt *p, *q;
2098 HOST_WIDE_INT offset;
2099
2100 /* First, is there anything related known?
2101 If we have a table element, we can tell from that.
2102 Otherwise, must look it up. */
2103
2104 if (elt != 0 && elt->related_value != 0)
2105 relt = elt;
2106 else if (elt == 0 && GET_CODE (x) == CONST)
2107 {
2108 rtx subexp = get_related_value (x);
2109 if (subexp != 0)
2110 relt = lookup (subexp,
2111 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2112 GET_MODE (subexp));
2113 }
2114
2115 if (relt == 0)
2116 return 0;
2117
2118 /* Search all related table entries for one that has an
2119 equivalent register. */
2120
2121 p = relt;
2122 while (1)
2123 {
2124 /* This loop is strange in that it is executed in two different cases.
2125 The first is when X is already in the table. Then it is searching
2126 the RELATED_VALUE list of X's class (RELT). The second case is when
2127 X is not in the table. Then RELT points to a class for the related
2128 value.
2129
2130 Ensure that, whatever case we are in, that we ignore classes that have
2131 the same value as X. */
2132
2133 if (rtx_equal_p (x, p->exp))
2134 q = 0;
2135 else
2136 for (q = p->first_same_value; q; q = q->next_same_value)
2137 if (GET_CODE (q->exp) == REG)
2138 break;
2139
2140 if (q)
2141 break;
2142
2143 p = p->related_value;
2144
2145 /* We went all the way around, so there is nothing to be found.
2146 Alternatively, perhaps RELT was in the table for some other reason
2147 and it has no related values recorded. */
2148 if (p == relt || p == 0)
2149 break;
2150 }
2151
2152 if (q == 0)
2153 return 0;
2154
2155 offset = (get_integer_term (x) - get_integer_term (p->exp));
2156 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2157 return plus_constant (q->exp, offset);
2158 }
2159 \f
2160 /* Hash a string. Just add its bytes up. */
2161 static inline unsigned
2162 canon_hash_string (const char *ps)
2163 {
2164 unsigned hash = 0;
2165 const unsigned char *p = (const unsigned char *) ps;
2166
2167 if (p)
2168 while (*p)
2169 hash += *p++;
2170
2171 return hash;
2172 }
2173
2174 /* Hash an rtx. We are careful to make sure the value is never negative.
2175 Equivalent registers hash identically.
2176 MODE is used in hashing for CONST_INTs only;
2177 otherwise the mode of X is used.
2178
2179 Store 1 in do_not_record if any subexpression is volatile.
2180
2181 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2182 which does not have the RTX_UNCHANGING_P bit set.
2183
2184 Note that cse_insn knows that the hash code of a MEM expression
2185 is just (int) MEM plus the hash code of the address. */
2186
2187 static unsigned
2188 canon_hash (rtx x, enum machine_mode mode)
2189 {
2190 int i, j;
2191 unsigned hash = 0;
2192 enum rtx_code code;
2193 const char *fmt;
2194
2195 /* repeat is used to turn tail-recursion into iteration. */
2196 repeat:
2197 if (x == 0)
2198 return hash;
2199
2200 code = GET_CODE (x);
2201 switch (code)
2202 {
2203 case REG:
2204 {
2205 unsigned int regno = REGNO (x);
2206 bool record;
2207
2208 /* On some machines, we can't record any non-fixed hard register,
2209 because extending its life will cause reload problems. We
2210 consider ap, fp, sp, gp to be fixed for this purpose.
2211
2212 We also consider CCmode registers to be fixed for this purpose;
2213 failure to do so leads to failure to simplify 0<100 type of
2214 conditionals.
2215
2216 On all machines, we can't record any global registers.
2217 Nor should we record any register that is in a small
2218 class, as defined by CLASS_LIKELY_SPILLED_P. */
2219
2220 if (regno >= FIRST_PSEUDO_REGISTER)
2221 record = true;
2222 else if (x == frame_pointer_rtx
2223 || x == hard_frame_pointer_rtx
2224 || x == arg_pointer_rtx
2225 || x == stack_pointer_rtx
2226 || x == pic_offset_table_rtx)
2227 record = true;
2228 else if (global_regs[regno])
2229 record = false;
2230 else if (fixed_regs[regno])
2231 record = true;
2232 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2233 record = true;
2234 else if (SMALL_REGISTER_CLASSES)
2235 record = false;
2236 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2237 record = false;
2238 else
2239 record = true;
2240
2241 if (!record)
2242 {
2243 do_not_record = 1;
2244 return 0;
2245 }
2246
2247 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2248 return hash;
2249 }
2250
2251 /* We handle SUBREG of a REG specially because the underlying
2252 reg changes its hash value with every value change; we don't
2253 want to have to forget unrelated subregs when one subreg changes. */
2254 case SUBREG:
2255 {
2256 if (GET_CODE (SUBREG_REG (x)) == REG)
2257 {
2258 hash += (((unsigned) SUBREG << 7)
2259 + REGNO (SUBREG_REG (x))
2260 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2261 return hash;
2262 }
2263 break;
2264 }
2265
2266 case CONST_INT:
2267 {
2268 unsigned HOST_WIDE_INT tem = INTVAL (x);
2269 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2270 return hash;
2271 }
2272
2273 case CONST_DOUBLE:
2274 /* This is like the general case, except that it only counts
2275 the integers representing the constant. */
2276 hash += (unsigned) code + (unsigned) GET_MODE (x);
2277 if (GET_MODE (x) != VOIDmode)
2278 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2279 else
2280 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2281 + (unsigned) CONST_DOUBLE_HIGH (x));
2282 return hash;
2283
2284 case CONST_VECTOR:
2285 {
2286 int units;
2287 rtx elt;
2288
2289 units = CONST_VECTOR_NUNITS (x);
2290
2291 for (i = 0; i < units; ++i)
2292 {
2293 elt = CONST_VECTOR_ELT (x, i);
2294 hash += canon_hash (elt, GET_MODE (elt));
2295 }
2296
2297 return hash;
2298 }
2299
2300 /* Assume there is only one rtx object for any given label. */
2301 case LABEL_REF:
2302 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2303 return hash;
2304
2305 case SYMBOL_REF:
2306 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2307 return hash;
2308
2309 case MEM:
2310 /* We don't record if marked volatile or if BLKmode since we don't
2311 know the size of the move. */
2312 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2313 {
2314 do_not_record = 1;
2315 return 0;
2316 }
2317 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2318 hash_arg_in_memory = 1;
2319
2320 /* Now that we have already found this special case,
2321 might as well speed it up as much as possible. */
2322 hash += (unsigned) MEM;
2323 x = XEXP (x, 0);
2324 goto repeat;
2325
2326 case USE:
2327 /* A USE that mentions non-volatile memory needs special
2328 handling since the MEM may be BLKmode which normally
2329 prevents an entry from being made. Pure calls are
2330 marked by a USE which mentions BLKmode memory. */
2331 if (GET_CODE (XEXP (x, 0)) == MEM
2332 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2333 {
2334 hash += (unsigned) USE;
2335 x = XEXP (x, 0);
2336
2337 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2338 hash_arg_in_memory = 1;
2339
2340 /* Now that we have already found this special case,
2341 might as well speed it up as much as possible. */
2342 hash += (unsigned) MEM;
2343 x = XEXP (x, 0);
2344 goto repeat;
2345 }
2346 break;
2347
2348 case PRE_DEC:
2349 case PRE_INC:
2350 case POST_DEC:
2351 case POST_INC:
2352 case PRE_MODIFY:
2353 case POST_MODIFY:
2354 case PC:
2355 case CC0:
2356 case CALL:
2357 case UNSPEC_VOLATILE:
2358 do_not_record = 1;
2359 return 0;
2360
2361 case ASM_OPERANDS:
2362 if (MEM_VOLATILE_P (x))
2363 {
2364 do_not_record = 1;
2365 return 0;
2366 }
2367 else
2368 {
2369 /* We don't want to take the filename and line into account. */
2370 hash += (unsigned) code + (unsigned) GET_MODE (x)
2371 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2372 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2373 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2374
2375 if (ASM_OPERANDS_INPUT_LENGTH (x))
2376 {
2377 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2378 {
2379 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2380 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2381 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2382 (x, i)));
2383 }
2384
2385 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2386 x = ASM_OPERANDS_INPUT (x, 0);
2387 mode = GET_MODE (x);
2388 goto repeat;
2389 }
2390
2391 return hash;
2392 }
2393 break;
2394
2395 default:
2396 break;
2397 }
2398
2399 i = GET_RTX_LENGTH (code) - 1;
2400 hash += (unsigned) code + (unsigned) GET_MODE (x);
2401 fmt = GET_RTX_FORMAT (code);
2402 for (; i >= 0; i--)
2403 {
2404 if (fmt[i] == 'e')
2405 {
2406 rtx tem = XEXP (x, i);
2407
2408 /* If we are about to do the last recursive call
2409 needed at this level, change it into iteration.
2410 This function is called enough to be worth it. */
2411 if (i == 0)
2412 {
2413 x = tem;
2414 goto repeat;
2415 }
2416 hash += canon_hash (tem, 0);
2417 }
2418 else if (fmt[i] == 'E')
2419 for (j = 0; j < XVECLEN (x, i); j++)
2420 hash += canon_hash (XVECEXP (x, i, j), 0);
2421 else if (fmt[i] == 's')
2422 hash += canon_hash_string (XSTR (x, i));
2423 else if (fmt[i] == 'i')
2424 {
2425 unsigned tem = XINT (x, i);
2426 hash += tem;
2427 }
2428 else if (fmt[i] == '0' || fmt[i] == 't')
2429 /* Unused. */
2430 ;
2431 else
2432 abort ();
2433 }
2434 return hash;
2435 }
2436
2437 /* Like canon_hash but with no side effects. */
2438
2439 static unsigned
2440 safe_hash (rtx x, enum machine_mode mode)
2441 {
2442 int save_do_not_record = do_not_record;
2443 int save_hash_arg_in_memory = hash_arg_in_memory;
2444 unsigned hash = canon_hash (x, mode);
2445 hash_arg_in_memory = save_hash_arg_in_memory;
2446 do_not_record = save_do_not_record;
2447 return hash;
2448 }
2449 \f
2450 /* Return 1 iff X and Y would canonicalize into the same thing,
2451 without actually constructing the canonicalization of either one.
2452 If VALIDATE is nonzero,
2453 we assume X is an expression being processed from the rtl
2454 and Y was found in the hash table. We check register refs
2455 in Y for being marked as valid.
2456
2457 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2458 that is known to be in the register. Ordinarily, we don't allow them
2459 to match, because letting them match would cause unpredictable results
2460 in all the places that search a hash table chain for an equivalent
2461 for a given value. A possible equivalent that has different structure
2462 has its hash code computed from different data. Whether the hash code
2463 is the same as that of the given value is pure luck. */
2464
2465 static int
2466 exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
2467 {
2468 int i, j;
2469 enum rtx_code code;
2470 const char *fmt;
2471
2472 /* Note: it is incorrect to assume an expression is equivalent to itself
2473 if VALIDATE is nonzero. */
2474 if (x == y && !validate)
2475 return 1;
2476 if (x == 0 || y == 0)
2477 return x == y;
2478
2479 code = GET_CODE (x);
2480 if (code != GET_CODE (y))
2481 {
2482 if (!equal_values)
2483 return 0;
2484
2485 /* If X is a constant and Y is a register or vice versa, they may be
2486 equivalent. We only have to validate if Y is a register. */
2487 if (CONSTANT_P (x) && GET_CODE (y) == REG
2488 && REGNO_QTY_VALID_P (REGNO (y)))
2489 {
2490 int y_q = REG_QTY (REGNO (y));
2491 struct qty_table_elem *y_ent = &qty_table[y_q];
2492
2493 if (GET_MODE (y) == y_ent->mode
2494 && rtx_equal_p (x, y_ent->const_rtx)
2495 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2496 return 1;
2497 }
2498
2499 if (CONSTANT_P (y) && code == REG
2500 && REGNO_QTY_VALID_P (REGNO (x)))
2501 {
2502 int x_q = REG_QTY (REGNO (x));
2503 struct qty_table_elem *x_ent = &qty_table[x_q];
2504
2505 if (GET_MODE (x) == x_ent->mode
2506 && rtx_equal_p (y, x_ent->const_rtx))
2507 return 1;
2508 }
2509
2510 return 0;
2511 }
2512
2513 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2514 if (GET_MODE (x) != GET_MODE (y))
2515 return 0;
2516
2517 switch (code)
2518 {
2519 case PC:
2520 case CC0:
2521 case CONST_INT:
2522 return x == y;
2523
2524 case LABEL_REF:
2525 return XEXP (x, 0) == XEXP (y, 0);
2526
2527 case SYMBOL_REF:
2528 return XSTR (x, 0) == XSTR (y, 0);
2529
2530 case REG:
2531 {
2532 unsigned int regno = REGNO (y);
2533 unsigned int endregno
2534 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2535 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2536 unsigned int i;
2537
2538 /* If the quantities are not the same, the expressions are not
2539 equivalent. If there are and we are not to validate, they
2540 are equivalent. Otherwise, ensure all regs are up-to-date. */
2541
2542 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2543 return 0;
2544
2545 if (! validate)
2546 return 1;
2547
2548 for (i = regno; i < endregno; i++)
2549 if (REG_IN_TABLE (i) != REG_TICK (i))
2550 return 0;
2551
2552 return 1;
2553 }
2554
2555 /* For commutative operations, check both orders. */
2556 case PLUS:
2557 case MULT:
2558 case AND:
2559 case IOR:
2560 case XOR:
2561 case NE:
2562 case EQ:
2563 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2564 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2565 validate, equal_values))
2566 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2567 validate, equal_values)
2568 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2569 validate, equal_values)));
2570
2571 case ASM_OPERANDS:
2572 /* We don't use the generic code below because we want to
2573 disregard filename and line numbers. */
2574
2575 /* A volatile asm isn't equivalent to any other. */
2576 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2577 return 0;
2578
2579 if (GET_MODE (x) != GET_MODE (y)
2580 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2581 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2582 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2583 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2584 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2585 return 0;
2586
2587 if (ASM_OPERANDS_INPUT_LENGTH (x))
2588 {
2589 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2590 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2591 ASM_OPERANDS_INPUT (y, i),
2592 validate, equal_values)
2593 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2594 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2595 return 0;
2596 }
2597
2598 return 1;
2599
2600 default:
2601 break;
2602 }
2603
2604 /* Compare the elements. If any pair of corresponding elements
2605 fail to match, return 0 for the whole things. */
2606
2607 fmt = GET_RTX_FORMAT (code);
2608 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2609 {
2610 switch (fmt[i])
2611 {
2612 case 'e':
2613 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2614 return 0;
2615 break;
2616
2617 case 'E':
2618 if (XVECLEN (x, i) != XVECLEN (y, i))
2619 return 0;
2620 for (j = 0; j < XVECLEN (x, i); j++)
2621 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2622 validate, equal_values))
2623 return 0;
2624 break;
2625
2626 case 's':
2627 if (strcmp (XSTR (x, i), XSTR (y, i)))
2628 return 0;
2629 break;
2630
2631 case 'i':
2632 if (XINT (x, i) != XINT (y, i))
2633 return 0;
2634 break;
2635
2636 case 'w':
2637 if (XWINT (x, i) != XWINT (y, i))
2638 return 0;
2639 break;
2640
2641 case '0':
2642 case 't':
2643 break;
2644
2645 default:
2646 abort ();
2647 }
2648 }
2649
2650 return 1;
2651 }
2652 \f
2653 /* Return 1 if X has a value that can vary even between two
2654 executions of the program. 0 means X can be compared reliably
2655 against certain constants or near-constants. */
2656
2657 static int
2658 cse_rtx_varies_p (rtx x, int from_alias)
2659 {
2660 /* We need not check for X and the equivalence class being of the same
2661 mode because if X is equivalent to a constant in some mode, it
2662 doesn't vary in any mode. */
2663
2664 if (GET_CODE (x) == REG
2665 && REGNO_QTY_VALID_P (REGNO (x)))
2666 {
2667 int x_q = REG_QTY (REGNO (x));
2668 struct qty_table_elem *x_ent = &qty_table[x_q];
2669
2670 if (GET_MODE (x) == x_ent->mode
2671 && x_ent->const_rtx != NULL_RTX)
2672 return 0;
2673 }
2674
2675 if (GET_CODE (x) == PLUS
2676 && GET_CODE (XEXP (x, 1)) == CONST_INT
2677 && GET_CODE (XEXP (x, 0)) == REG
2678 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2679 {
2680 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2681 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2682
2683 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2684 && x0_ent->const_rtx != NULL_RTX)
2685 return 0;
2686 }
2687
2688 /* This can happen as the result of virtual register instantiation, if
2689 the initial constant is too large to be a valid address. This gives
2690 us a three instruction sequence, load large offset into a register,
2691 load fp minus a constant into a register, then a MEM which is the
2692 sum of the two `constant' registers. */
2693 if (GET_CODE (x) == PLUS
2694 && GET_CODE (XEXP (x, 0)) == REG
2695 && GET_CODE (XEXP (x, 1)) == REG
2696 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2697 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2698 {
2699 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2700 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2701 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2702 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2703
2704 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2705 && x0_ent->const_rtx != NULL_RTX
2706 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2707 && x1_ent->const_rtx != NULL_RTX)
2708 return 0;
2709 }
2710
2711 return rtx_varies_p (x, from_alias);
2712 }
2713 \f
2714 /* Canonicalize an expression:
2715 replace each register reference inside it
2716 with the "oldest" equivalent register.
2717
2718 If INSN is nonzero and we are replacing a pseudo with a hard register
2719 or vice versa, validate_change is used to ensure that INSN remains valid
2720 after we make our substitution. The calls are made with IN_GROUP nonzero
2721 so apply_change_group must be called upon the outermost return from this
2722 function (unless INSN is zero). The result of apply_change_group can
2723 generally be discarded since the changes we are making are optional. */
2724
2725 static rtx
2726 canon_reg (rtx x, rtx insn)
2727 {
2728 int i;
2729 enum rtx_code code;
2730 const char *fmt;
2731
2732 if (x == 0)
2733 return x;
2734
2735 code = GET_CODE (x);
2736 switch (code)
2737 {
2738 case PC:
2739 case CC0:
2740 case CONST:
2741 case CONST_INT:
2742 case CONST_DOUBLE:
2743 case CONST_VECTOR:
2744 case SYMBOL_REF:
2745 case LABEL_REF:
2746 case ADDR_VEC:
2747 case ADDR_DIFF_VEC:
2748 return x;
2749
2750 case REG:
2751 {
2752 int first;
2753 int q;
2754 struct qty_table_elem *ent;
2755
2756 /* Never replace a hard reg, because hard regs can appear
2757 in more than one machine mode, and we must preserve the mode
2758 of each occurrence. Also, some hard regs appear in
2759 MEMs that are shared and mustn't be altered. Don't try to
2760 replace any reg that maps to a reg of class NO_REGS. */
2761 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2762 || ! REGNO_QTY_VALID_P (REGNO (x)))
2763 return x;
2764
2765 q = REG_QTY (REGNO (x));
2766 ent = &qty_table[q];
2767 first = ent->first_reg;
2768 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2769 : REGNO_REG_CLASS (first) == NO_REGS ? x
2770 : gen_rtx_REG (ent->mode, first));
2771 }
2772
2773 default:
2774 break;
2775 }
2776
2777 fmt = GET_RTX_FORMAT (code);
2778 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2779 {
2780 int j;
2781
2782 if (fmt[i] == 'e')
2783 {
2784 rtx new = canon_reg (XEXP (x, i), insn);
2785 int insn_code;
2786
2787 /* If replacing pseudo with hard reg or vice versa, ensure the
2788 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2789 if (insn != 0 && new != 0
2790 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2791 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2792 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2793 || (insn_code = recog_memoized (insn)) < 0
2794 || insn_data[insn_code].n_dups > 0))
2795 validate_change (insn, &XEXP (x, i), new, 1);
2796 else
2797 XEXP (x, i) = new;
2798 }
2799 else if (fmt[i] == 'E')
2800 for (j = 0; j < XVECLEN (x, i); j++)
2801 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2802 }
2803
2804 return x;
2805 }
2806 \f
2807 /* LOC is a location within INSN that is an operand address (the contents of
2808 a MEM). Find the best equivalent address to use that is valid for this
2809 insn.
2810
2811 On most CISC machines, complicated address modes are costly, and rtx_cost
2812 is a good approximation for that cost. However, most RISC machines have
2813 only a few (usually only one) memory reference formats. If an address is
2814 valid at all, it is often just as cheap as any other address. Hence, for
2815 RISC machines, we use `address_cost' to compare the costs of various
2816 addresses. For two addresses of equal cost, choose the one with the
2817 highest `rtx_cost' value as that has the potential of eliminating the
2818 most insns. For equal costs, we choose the first in the equivalence
2819 class. Note that we ignore the fact that pseudo registers are cheaper than
2820 hard registers here because we would also prefer the pseudo registers. */
2821
2822 static void
2823 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2824 {
2825 struct table_elt *elt;
2826 rtx addr = *loc;
2827 struct table_elt *p;
2828 int found_better = 1;
2829 int save_do_not_record = do_not_record;
2830 int save_hash_arg_in_memory = hash_arg_in_memory;
2831 int addr_volatile;
2832 int regno;
2833 unsigned hash;
2834
2835 /* Do not try to replace constant addresses or addresses of local and
2836 argument slots. These MEM expressions are made only once and inserted
2837 in many instructions, as well as being used to control symbol table
2838 output. It is not safe to clobber them.
2839
2840 There are some uncommon cases where the address is already in a register
2841 for some reason, but we cannot take advantage of that because we have
2842 no easy way to unshare the MEM. In addition, looking up all stack
2843 addresses is costly. */
2844 if ((GET_CODE (addr) == PLUS
2845 && GET_CODE (XEXP (addr, 0)) == REG
2846 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2847 && (regno = REGNO (XEXP (addr, 0)),
2848 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2849 || regno == ARG_POINTER_REGNUM))
2850 || (GET_CODE (addr) == REG
2851 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2852 || regno == HARD_FRAME_POINTER_REGNUM
2853 || regno == ARG_POINTER_REGNUM))
2854 || GET_CODE (addr) == ADDRESSOF
2855 || CONSTANT_ADDRESS_P (addr))
2856 return;
2857
2858 /* If this address is not simply a register, try to fold it. This will
2859 sometimes simplify the expression. Many simplifications
2860 will not be valid, but some, usually applying the associative rule, will
2861 be valid and produce better code. */
2862 if (GET_CODE (addr) != REG)
2863 {
2864 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2865 int addr_folded_cost = address_cost (folded, mode);
2866 int addr_cost = address_cost (addr, mode);
2867
2868 if ((addr_folded_cost < addr_cost
2869 || (addr_folded_cost == addr_cost
2870 /* ??? The rtx_cost comparison is left over from an older
2871 version of this code. It is probably no longer helpful. */
2872 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2873 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2874 && validate_change (insn, loc, folded, 0))
2875 addr = folded;
2876 }
2877
2878 /* If this address is not in the hash table, we can't look for equivalences
2879 of the whole address. Also, ignore if volatile. */
2880
2881 do_not_record = 0;
2882 hash = HASH (addr, Pmode);
2883 addr_volatile = do_not_record;
2884 do_not_record = save_do_not_record;
2885 hash_arg_in_memory = save_hash_arg_in_memory;
2886
2887 if (addr_volatile)
2888 return;
2889
2890 elt = lookup (addr, hash, Pmode);
2891
2892 if (elt)
2893 {
2894 /* We need to find the best (under the criteria documented above) entry
2895 in the class that is valid. We use the `flag' field to indicate
2896 choices that were invalid and iterate until we can't find a better
2897 one that hasn't already been tried. */
2898
2899 for (p = elt->first_same_value; p; p = p->next_same_value)
2900 p->flag = 0;
2901
2902 while (found_better)
2903 {
2904 int best_addr_cost = address_cost (*loc, mode);
2905 int best_rtx_cost = (elt->cost + 1) >> 1;
2906 int exp_cost;
2907 struct table_elt *best_elt = elt;
2908
2909 found_better = 0;
2910 for (p = elt->first_same_value; p; p = p->next_same_value)
2911 if (! p->flag)
2912 {
2913 if ((GET_CODE (p->exp) == REG
2914 || exp_equiv_p (p->exp, p->exp, 1, 0))
2915 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2916 || (exp_cost == best_addr_cost
2917 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2918 {
2919 found_better = 1;
2920 best_addr_cost = exp_cost;
2921 best_rtx_cost = (p->cost + 1) >> 1;
2922 best_elt = p;
2923 }
2924 }
2925
2926 if (found_better)
2927 {
2928 if (validate_change (insn, loc,
2929 canon_reg (copy_rtx (best_elt->exp),
2930 NULL_RTX), 0))
2931 return;
2932 else
2933 best_elt->flag = 1;
2934 }
2935 }
2936 }
2937
2938 /* If the address is a binary operation with the first operand a register
2939 and the second a constant, do the same as above, but looking for
2940 equivalences of the register. Then try to simplify before checking for
2941 the best address to use. This catches a few cases: First is when we
2942 have REG+const and the register is another REG+const. We can often merge
2943 the constants and eliminate one insn and one register. It may also be
2944 that a machine has a cheap REG+REG+const. Finally, this improves the
2945 code on the Alpha for unaligned byte stores. */
2946
2947 if (flag_expensive_optimizations
2948 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2949 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2950 && GET_CODE (XEXP (*loc, 0)) == REG)
2951 {
2952 rtx op1 = XEXP (*loc, 1);
2953
2954 do_not_record = 0;
2955 hash = HASH (XEXP (*loc, 0), Pmode);
2956 do_not_record = save_do_not_record;
2957 hash_arg_in_memory = save_hash_arg_in_memory;
2958
2959 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2960 if (elt == 0)
2961 return;
2962
2963 /* We need to find the best (under the criteria documented above) entry
2964 in the class that is valid. We use the `flag' field to indicate
2965 choices that were invalid and iterate until we can't find a better
2966 one that hasn't already been tried. */
2967
2968 for (p = elt->first_same_value; p; p = p->next_same_value)
2969 p->flag = 0;
2970
2971 while (found_better)
2972 {
2973 int best_addr_cost = address_cost (*loc, mode);
2974 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2975 struct table_elt *best_elt = elt;
2976 rtx best_rtx = *loc;
2977 int count;
2978
2979 /* This is at worst case an O(n^2) algorithm, so limit our search
2980 to the first 32 elements on the list. This avoids trouble
2981 compiling code with very long basic blocks that can easily
2982 call simplify_gen_binary so many times that we run out of
2983 memory. */
2984
2985 found_better = 0;
2986 for (p = elt->first_same_value, count = 0;
2987 p && count < 32;
2988 p = p->next_same_value, count++)
2989 if (! p->flag
2990 && (GET_CODE (p->exp) == REG
2991 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2992 {
2993 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2994 p->exp, op1);
2995 int new_cost;
2996 new_cost = address_cost (new, mode);
2997
2998 if (new_cost < best_addr_cost
2999 || (new_cost == best_addr_cost
3000 && (COST (new) + 1) >> 1 > best_rtx_cost))
3001 {
3002 found_better = 1;
3003 best_addr_cost = new_cost;
3004 best_rtx_cost = (COST (new) + 1) >> 1;
3005 best_elt = p;
3006 best_rtx = new;
3007 }
3008 }
3009
3010 if (found_better)
3011 {
3012 if (validate_change (insn, loc,
3013 canon_reg (copy_rtx (best_rtx),
3014 NULL_RTX), 0))
3015 return;
3016 else
3017 best_elt->flag = 1;
3018 }
3019 }
3020 }
3021 }
3022 \f
3023 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3024 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3025 what values are being compared.
3026
3027 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3028 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3029 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3030 compared to produce cc0.
3031
3032 The return value is the comparison operator and is either the code of
3033 A or the code corresponding to the inverse of the comparison. */
3034
3035 static enum rtx_code
3036 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
3037 enum machine_mode *pmode1, enum machine_mode *pmode2)
3038 {
3039 rtx arg1, arg2;
3040
3041 arg1 = *parg1, arg2 = *parg2;
3042
3043 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3044
3045 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3046 {
3047 /* Set nonzero when we find something of interest. */
3048 rtx x = 0;
3049 int reverse_code = 0;
3050 struct table_elt *p = 0;
3051
3052 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3053 On machines with CC0, this is the only case that can occur, since
3054 fold_rtx will return the COMPARE or item being compared with zero
3055 when given CC0. */
3056
3057 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3058 x = arg1;
3059
3060 /* If ARG1 is a comparison operator and CODE is testing for
3061 STORE_FLAG_VALUE, get the inner arguments. */
3062
3063 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3064 {
3065 #ifdef FLOAT_STORE_FLAG_VALUE
3066 REAL_VALUE_TYPE fsfv;
3067 #endif
3068
3069 if (code == NE
3070 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3071 && code == LT && STORE_FLAG_VALUE == -1)
3072 #ifdef FLOAT_STORE_FLAG_VALUE
3073 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3074 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3075 REAL_VALUE_NEGATIVE (fsfv)))
3076 #endif
3077 )
3078 x = arg1;
3079 else if (code == EQ
3080 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3081 && code == GE && STORE_FLAG_VALUE == -1)
3082 #ifdef FLOAT_STORE_FLAG_VALUE
3083 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3084 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3085 REAL_VALUE_NEGATIVE (fsfv)))
3086 #endif
3087 )
3088 x = arg1, reverse_code = 1;
3089 }
3090
3091 /* ??? We could also check for
3092
3093 (ne (and (eq (...) (const_int 1))) (const_int 0))
3094
3095 and related forms, but let's wait until we see them occurring. */
3096
3097 if (x == 0)
3098 /* Look up ARG1 in the hash table and see if it has an equivalence
3099 that lets us see what is being compared. */
3100 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3101 GET_MODE (arg1));
3102 if (p)
3103 {
3104 p = p->first_same_value;
3105
3106 /* If what we compare is already known to be constant, that is as
3107 good as it gets.
3108 We need to break the loop in this case, because otherwise we
3109 can have an infinite loop when looking at a reg that is known
3110 to be a constant which is the same as a comparison of a reg
3111 against zero which appears later in the insn stream, which in
3112 turn is constant and the same as the comparison of the first reg
3113 against zero... */
3114 if (p->is_const)
3115 break;
3116 }
3117
3118 for (; p; p = p->next_same_value)
3119 {
3120 enum machine_mode inner_mode = GET_MODE (p->exp);
3121 #ifdef FLOAT_STORE_FLAG_VALUE
3122 REAL_VALUE_TYPE fsfv;
3123 #endif
3124
3125 /* If the entry isn't valid, skip it. */
3126 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3127 continue;
3128
3129 if (GET_CODE (p->exp) == COMPARE
3130 /* Another possibility is that this machine has a compare insn
3131 that includes the comparison code. In that case, ARG1 would
3132 be equivalent to a comparison operation that would set ARG1 to
3133 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3134 ORIG_CODE is the actual comparison being done; if it is an EQ,
3135 we must reverse ORIG_CODE. On machine with a negative value
3136 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3137 || ((code == NE
3138 || (code == LT
3139 && GET_MODE_CLASS (inner_mode) == MODE_INT
3140 && (GET_MODE_BITSIZE (inner_mode)
3141 <= HOST_BITS_PER_WIDE_INT)
3142 && (STORE_FLAG_VALUE
3143 & ((HOST_WIDE_INT) 1
3144 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3145 #ifdef FLOAT_STORE_FLAG_VALUE
3146 || (code == LT
3147 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3148 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3149 REAL_VALUE_NEGATIVE (fsfv)))
3150 #endif
3151 )
3152 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3153 {
3154 x = p->exp;
3155 break;
3156 }
3157 else if ((code == EQ
3158 || (code == GE
3159 && GET_MODE_CLASS (inner_mode) == MODE_INT
3160 && (GET_MODE_BITSIZE (inner_mode)
3161 <= HOST_BITS_PER_WIDE_INT)
3162 && (STORE_FLAG_VALUE
3163 & ((HOST_WIDE_INT) 1
3164 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3165 #ifdef FLOAT_STORE_FLAG_VALUE
3166 || (code == GE
3167 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3168 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3169 REAL_VALUE_NEGATIVE (fsfv)))
3170 #endif
3171 )
3172 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3173 {
3174 reverse_code = 1;
3175 x = p->exp;
3176 break;
3177 }
3178
3179 /* If this non-trapping address, e.g. fp + constant, the
3180 equivalent is a better operand since it may let us predict
3181 the value of the comparison. */
3182 else if (!rtx_addr_can_trap_p (p->exp))
3183 {
3184 arg1 = p->exp;
3185 continue;
3186 }
3187 }
3188
3189 /* If we didn't find a useful equivalence for ARG1, we are done.
3190 Otherwise, set up for the next iteration. */
3191 if (x == 0)
3192 break;
3193
3194 /* If we need to reverse the comparison, make sure that that is
3195 possible -- we can't necessarily infer the value of GE from LT
3196 with floating-point operands. */
3197 if (reverse_code)
3198 {
3199 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3200 if (reversed == UNKNOWN)
3201 break;
3202 else
3203 code = reversed;
3204 }
3205 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3206 code = GET_CODE (x);
3207 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3208 }
3209
3210 /* Return our results. Return the modes from before fold_rtx
3211 because fold_rtx might produce const_int, and then it's too late. */
3212 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3213 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3214
3215 return code;
3216 }
3217 \f
3218 /* If X is a nontrivial arithmetic operation on an argument
3219 for which a constant value can be determined, return
3220 the result of operating on that value, as a constant.
3221 Otherwise, return X, possibly with one or more operands
3222 modified by recursive calls to this function.
3223
3224 If X is a register whose contents are known, we do NOT
3225 return those contents here. equiv_constant is called to
3226 perform that task.
3227
3228 INSN is the insn that we may be modifying. If it is 0, make a copy
3229 of X before modifying it. */
3230
3231 static rtx
3232 fold_rtx (rtx x, rtx insn)
3233 {
3234 enum rtx_code code;
3235 enum machine_mode mode;
3236 const char *fmt;
3237 int i;
3238 rtx new = 0;
3239 int copied = 0;
3240 int must_swap = 0;
3241
3242 /* Folded equivalents of first two operands of X. */
3243 rtx folded_arg0;
3244 rtx folded_arg1;
3245
3246 /* Constant equivalents of first three operands of X;
3247 0 when no such equivalent is known. */
3248 rtx const_arg0;
3249 rtx const_arg1;
3250 rtx const_arg2;
3251
3252 /* The mode of the first operand of X. We need this for sign and zero
3253 extends. */
3254 enum machine_mode mode_arg0;
3255
3256 if (x == 0)
3257 return x;
3258
3259 mode = GET_MODE (x);
3260 code = GET_CODE (x);
3261 switch (code)
3262 {
3263 case CONST:
3264 case CONST_INT:
3265 case CONST_DOUBLE:
3266 case CONST_VECTOR:
3267 case SYMBOL_REF:
3268 case LABEL_REF:
3269 case REG:
3270 /* No use simplifying an EXPR_LIST
3271 since they are used only for lists of args
3272 in a function call's REG_EQUAL note. */
3273 case EXPR_LIST:
3274 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3275 want to (e.g.,) make (addressof (const_int 0)) just because
3276 the location is known to be zero. */
3277 case ADDRESSOF:
3278 return x;
3279
3280 #ifdef HAVE_cc0
3281 case CC0:
3282 return prev_insn_cc0;
3283 #endif
3284
3285 case PC:
3286 /* If the next insn is a CODE_LABEL followed by a jump table,
3287 PC's value is a LABEL_REF pointing to that label. That
3288 lets us fold switch statements on the VAX. */
3289 {
3290 rtx next;
3291 if (insn && tablejump_p (insn, &next, NULL))
3292 return gen_rtx_LABEL_REF (Pmode, next);
3293 }
3294 break;
3295
3296 case SUBREG:
3297 /* See if we previously assigned a constant value to this SUBREG. */
3298 if ((new = lookup_as_function (x, CONST_INT)) != 0
3299 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3300 return new;
3301
3302 /* If this is a paradoxical SUBREG, we have no idea what value the
3303 extra bits would have. However, if the operand is equivalent
3304 to a SUBREG whose operand is the same as our mode, and all the
3305 modes are within a word, we can just use the inner operand
3306 because these SUBREGs just say how to treat the register.
3307
3308 Similarly if we find an integer constant. */
3309
3310 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3311 {
3312 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3313 struct table_elt *elt;
3314
3315 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3316 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3317 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3318 imode)) != 0)
3319 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3320 {
3321 if (CONSTANT_P (elt->exp)
3322 && GET_MODE (elt->exp) == VOIDmode)
3323 return elt->exp;
3324
3325 if (GET_CODE (elt->exp) == SUBREG
3326 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3327 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3328 return copy_rtx (SUBREG_REG (elt->exp));
3329 }
3330
3331 return x;
3332 }
3333
3334 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3335 We might be able to if the SUBREG is extracting a single word in an
3336 integral mode or extracting the low part. */
3337
3338 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3339 const_arg0 = equiv_constant (folded_arg0);
3340 if (const_arg0)
3341 folded_arg0 = const_arg0;
3342
3343 if (folded_arg0 != SUBREG_REG (x))
3344 {
3345 new = simplify_subreg (mode, folded_arg0,
3346 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3347 if (new)
3348 return new;
3349 }
3350
3351 /* If this is a narrowing SUBREG and our operand is a REG, see if
3352 we can find an equivalence for REG that is an arithmetic operation
3353 in a wider mode where both operands are paradoxical SUBREGs
3354 from objects of our result mode. In that case, we couldn't report
3355 an equivalent value for that operation, since we don't know what the
3356 extra bits will be. But we can find an equivalence for this SUBREG
3357 by folding that operation is the narrow mode. This allows us to
3358 fold arithmetic in narrow modes when the machine only supports
3359 word-sized arithmetic.
3360
3361 Also look for a case where we have a SUBREG whose operand is the
3362 same as our result. If both modes are smaller than a word, we
3363 are simply interpreting a register in different modes and we
3364 can use the inner value. */
3365
3366 if (GET_CODE (folded_arg0) == REG
3367 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3368 && subreg_lowpart_p (x))
3369 {
3370 struct table_elt *elt;
3371
3372 /* We can use HASH here since we know that canon_hash won't be
3373 called. */
3374 elt = lookup (folded_arg0,
3375 HASH (folded_arg0, GET_MODE (folded_arg0)),
3376 GET_MODE (folded_arg0));
3377
3378 if (elt)
3379 elt = elt->first_same_value;
3380
3381 for (; elt; elt = elt->next_same_value)
3382 {
3383 enum rtx_code eltcode = GET_CODE (elt->exp);
3384
3385 /* Just check for unary and binary operations. */
3386 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3387 && GET_CODE (elt->exp) != SIGN_EXTEND
3388 && GET_CODE (elt->exp) != ZERO_EXTEND
3389 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3390 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3391 && (GET_MODE_CLASS (mode)
3392 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3393 {
3394 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3395
3396 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3397 op0 = fold_rtx (op0, NULL_RTX);
3398
3399 op0 = equiv_constant (op0);
3400 if (op0)
3401 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3402 op0, mode);
3403 }
3404 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3405 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3406 && eltcode != DIV && eltcode != MOD
3407 && eltcode != UDIV && eltcode != UMOD
3408 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3409 && eltcode != ROTATE && eltcode != ROTATERT
3410 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3411 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3412 == mode))
3413 || CONSTANT_P (XEXP (elt->exp, 0)))
3414 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3415 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3416 == mode))
3417 || CONSTANT_P (XEXP (elt->exp, 1))))
3418 {
3419 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3420 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3421
3422 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3423 op0 = fold_rtx (op0, NULL_RTX);
3424
3425 if (op0)
3426 op0 = equiv_constant (op0);
3427
3428 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3429 op1 = fold_rtx (op1, NULL_RTX);
3430
3431 if (op1)
3432 op1 = equiv_constant (op1);
3433
3434 /* If we are looking for the low SImode part of
3435 (ashift:DI c (const_int 32)), it doesn't work
3436 to compute that in SImode, because a 32-bit shift
3437 in SImode is unpredictable. We know the value is 0. */
3438 if (op0 && op1
3439 && GET_CODE (elt->exp) == ASHIFT
3440 && GET_CODE (op1) == CONST_INT
3441 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3442 {
3443 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3444
3445 /* If the count fits in the inner mode's width,
3446 but exceeds the outer mode's width,
3447 the value will get truncated to 0
3448 by the subreg. */
3449 new = const0_rtx;
3450 else
3451 /* If the count exceeds even the inner mode's width,
3452 don't fold this expression. */
3453 new = 0;
3454 }
3455 else if (op0 && op1)
3456 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3457 op0, op1);
3458 }
3459
3460 else if (GET_CODE (elt->exp) == SUBREG
3461 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3462 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3463 <= UNITS_PER_WORD)
3464 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3465 new = copy_rtx (SUBREG_REG (elt->exp));
3466
3467 if (new)
3468 return new;
3469 }
3470 }
3471
3472 return x;
3473
3474 case NOT:
3475 case NEG:
3476 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3477 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3478 new = lookup_as_function (XEXP (x, 0), code);
3479 if (new)
3480 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3481 break;
3482
3483 case MEM:
3484 /* If we are not actually processing an insn, don't try to find the
3485 best address. Not only don't we care, but we could modify the
3486 MEM in an invalid way since we have no insn to validate against. */
3487 if (insn != 0)
3488 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3489
3490 {
3491 /* Even if we don't fold in the insn itself,
3492 we can safely do so here, in hopes of getting a constant. */
3493 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3494 rtx base = 0;
3495 HOST_WIDE_INT offset = 0;
3496
3497 if (GET_CODE (addr) == REG
3498 && REGNO_QTY_VALID_P (REGNO (addr)))
3499 {
3500 int addr_q = REG_QTY (REGNO (addr));
3501 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3502
3503 if (GET_MODE (addr) == addr_ent->mode
3504 && addr_ent->const_rtx != NULL_RTX)
3505 addr = addr_ent->const_rtx;
3506 }
3507
3508 /* If address is constant, split it into a base and integer offset. */
3509 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3510 base = addr;
3511 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3512 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3513 {
3514 base = XEXP (XEXP (addr, 0), 0);
3515 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3516 }
3517 else if (GET_CODE (addr) == LO_SUM
3518 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3519 base = XEXP (addr, 1);
3520 else if (GET_CODE (addr) == ADDRESSOF)
3521 return change_address (x, VOIDmode, addr);
3522
3523 /* If this is a constant pool reference, we can fold it into its
3524 constant to allow better value tracking. */
3525 if (base && GET_CODE (base) == SYMBOL_REF
3526 && CONSTANT_POOL_ADDRESS_P (base))
3527 {
3528 rtx constant = get_pool_constant (base);
3529 enum machine_mode const_mode = get_pool_mode (base);
3530 rtx new;
3531
3532 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3533 {
3534 constant_pool_entries_cost = COST (constant);
3535 constant_pool_entries_regcost = approx_reg_cost (constant);
3536 }
3537
3538 /* If we are loading the full constant, we have an equivalence. */
3539 if (offset == 0 && mode == const_mode)
3540 return constant;
3541
3542 /* If this actually isn't a constant (weird!), we can't do
3543 anything. Otherwise, handle the two most common cases:
3544 extracting a word from a multi-word constant, and extracting
3545 the low-order bits. Other cases don't seem common enough to
3546 worry about. */
3547 if (! CONSTANT_P (constant))
3548 return x;
3549
3550 if (GET_MODE_CLASS (mode) == MODE_INT
3551 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3552 && offset % UNITS_PER_WORD == 0
3553 && (new = operand_subword (constant,
3554 offset / UNITS_PER_WORD,
3555 0, const_mode)) != 0)
3556 return new;
3557
3558 if (((BYTES_BIG_ENDIAN
3559 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3560 || (! BYTES_BIG_ENDIAN && offset == 0))
3561 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3562 return new;
3563 }
3564
3565 /* If this is a reference to a label at a known position in a jump
3566 table, we also know its value. */
3567 if (base && GET_CODE (base) == LABEL_REF)
3568 {
3569 rtx label = XEXP (base, 0);
3570 rtx table_insn = NEXT_INSN (label);
3571
3572 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3573 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3574 {
3575 rtx table = PATTERN (table_insn);
3576
3577 if (offset >= 0
3578 && (offset / GET_MODE_SIZE (GET_MODE (table))
3579 < XVECLEN (table, 0)))
3580 return XVECEXP (table, 0,
3581 offset / GET_MODE_SIZE (GET_MODE (table)));
3582 }
3583 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3584 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3585 {
3586 rtx table = PATTERN (table_insn);
3587
3588 if (offset >= 0
3589 && (offset / GET_MODE_SIZE (GET_MODE (table))
3590 < XVECLEN (table, 1)))
3591 {
3592 offset /= GET_MODE_SIZE (GET_MODE (table));
3593 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3594 XEXP (table, 0));
3595
3596 if (GET_MODE (table) != Pmode)
3597 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3598
3599 /* Indicate this is a constant. This isn't a
3600 valid form of CONST, but it will only be used
3601 to fold the next insns and then discarded, so
3602 it should be safe.
3603
3604 Note this expression must be explicitly discarded,
3605 by cse_insn, else it may end up in a REG_EQUAL note
3606 and "escape" to cause problems elsewhere. */
3607 return gen_rtx_CONST (GET_MODE (new), new);
3608 }
3609 }
3610 }
3611
3612 return x;
3613 }
3614
3615 #ifdef NO_FUNCTION_CSE
3616 case CALL:
3617 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3618 return x;
3619 break;
3620 #endif
3621
3622 case ASM_OPERANDS:
3623 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3624 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3625 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3626 break;
3627
3628 default:
3629 break;
3630 }
3631
3632 const_arg0 = 0;
3633 const_arg1 = 0;
3634 const_arg2 = 0;
3635 mode_arg0 = VOIDmode;
3636
3637 /* Try folding our operands.
3638 Then see which ones have constant values known. */
3639
3640 fmt = GET_RTX_FORMAT (code);
3641 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3642 if (fmt[i] == 'e')
3643 {
3644 rtx arg = XEXP (x, i);
3645 rtx folded_arg = arg, const_arg = 0;
3646 enum machine_mode mode_arg = GET_MODE (arg);
3647 rtx cheap_arg, expensive_arg;
3648 rtx replacements[2];
3649 int j;
3650 int old_cost = COST_IN (XEXP (x, i), code);
3651
3652 /* Most arguments are cheap, so handle them specially. */
3653 switch (GET_CODE (arg))
3654 {
3655 case REG:
3656 /* This is the same as calling equiv_constant; it is duplicated
3657 here for speed. */
3658 if (REGNO_QTY_VALID_P (REGNO (arg)))
3659 {
3660 int arg_q = REG_QTY (REGNO (arg));
3661 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3662
3663 if (arg_ent->const_rtx != NULL_RTX
3664 && GET_CODE (arg_ent->const_rtx) != REG
3665 && GET_CODE (arg_ent->const_rtx) != PLUS)
3666 const_arg
3667 = gen_lowpart_if_possible (GET_MODE (arg),
3668 arg_ent->const_rtx);
3669 }
3670 break;
3671
3672 case CONST:
3673 case CONST_INT:
3674 case SYMBOL_REF:
3675 case LABEL_REF:
3676 case CONST_DOUBLE:
3677 case CONST_VECTOR:
3678 const_arg = arg;
3679 break;
3680
3681 #ifdef HAVE_cc0
3682 case CC0:
3683 folded_arg = prev_insn_cc0;
3684 mode_arg = prev_insn_cc0_mode;
3685 const_arg = equiv_constant (folded_arg);
3686 break;
3687 #endif
3688
3689 default:
3690 folded_arg = fold_rtx (arg, insn);
3691 const_arg = equiv_constant (folded_arg);
3692 }
3693
3694 /* For the first three operands, see if the operand
3695 is constant or equivalent to a constant. */
3696 switch (i)
3697 {
3698 case 0:
3699 folded_arg0 = folded_arg;
3700 const_arg0 = const_arg;
3701 mode_arg0 = mode_arg;
3702 break;
3703 case 1:
3704 folded_arg1 = folded_arg;
3705 const_arg1 = const_arg;
3706 break;
3707 case 2:
3708 const_arg2 = const_arg;
3709 break;
3710 }
3711
3712 /* Pick the least expensive of the folded argument and an
3713 equivalent constant argument. */
3714 if (const_arg == 0 || const_arg == folded_arg
3715 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3716 cheap_arg = folded_arg, expensive_arg = const_arg;
3717 else
3718 cheap_arg = const_arg, expensive_arg = folded_arg;
3719
3720 /* Try to replace the operand with the cheapest of the two
3721 possibilities. If it doesn't work and this is either of the first
3722 two operands of a commutative operation, try swapping them.
3723 If THAT fails, try the more expensive, provided it is cheaper
3724 than what is already there. */
3725
3726 if (cheap_arg == XEXP (x, i))
3727 continue;
3728
3729 if (insn == 0 && ! copied)
3730 {
3731 x = copy_rtx (x);
3732 copied = 1;
3733 }
3734
3735 /* Order the replacements from cheapest to most expensive. */
3736 replacements[0] = cheap_arg;
3737 replacements[1] = expensive_arg;
3738
3739 for (j = 0; j < 2 && replacements[j]; j++)
3740 {
3741 int new_cost = COST_IN (replacements[j], code);
3742
3743 /* Stop if what existed before was cheaper. Prefer constants
3744 in the case of a tie. */
3745 if (new_cost > old_cost
3746 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3747 break;
3748
3749 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3750 break;
3751
3752 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3753 || code == LTGT || code == UNEQ || code == ORDERED
3754 || code == UNORDERED)
3755 {
3756 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3757 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3758
3759 if (apply_change_group ())
3760 {
3761 /* Swap them back to be invalid so that this loop can
3762 continue and flag them to be swapped back later. */
3763 rtx tem;
3764
3765 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3766 XEXP (x, 1) = tem;
3767 must_swap = 1;
3768 break;
3769 }
3770 }
3771 }
3772 }
3773
3774 else
3775 {
3776 if (fmt[i] == 'E')
3777 /* Don't try to fold inside of a vector of expressions.
3778 Doing nothing is harmless. */
3779 {;}
3780 }
3781
3782 /* If a commutative operation, place a constant integer as the second
3783 operand unless the first operand is also a constant integer. Otherwise,
3784 place any constant second unless the first operand is also a constant. */
3785
3786 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3787 || code == LTGT || code == UNEQ || code == ORDERED
3788 || code == UNORDERED)
3789 {
3790 if (must_swap
3791 || swap_commutative_operands_p (const_arg0 ? const_arg0
3792 : XEXP (x, 0),
3793 const_arg1 ? const_arg1
3794 : XEXP (x, 1)))
3795 {
3796 rtx tem = XEXP (x, 0);
3797
3798 if (insn == 0 && ! copied)
3799 {
3800 x = copy_rtx (x);
3801 copied = 1;
3802 }
3803
3804 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3805 validate_change (insn, &XEXP (x, 1), tem, 1);
3806 if (apply_change_group ())
3807 {
3808 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3809 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3810 }
3811 }
3812 }
3813
3814 /* If X is an arithmetic operation, see if we can simplify it. */
3815
3816 switch (GET_RTX_CLASS (code))
3817 {
3818 case '1':
3819 {
3820 int is_const = 0;
3821
3822 /* We can't simplify extension ops unless we know the
3823 original mode. */
3824 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3825 && mode_arg0 == VOIDmode)
3826 break;
3827
3828 /* If we had a CONST, strip it off and put it back later if we
3829 fold. */
3830 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3831 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3832
3833 new = simplify_unary_operation (code, mode,
3834 const_arg0 ? const_arg0 : folded_arg0,
3835 mode_arg0);
3836 if (new != 0 && is_const)
3837 new = gen_rtx_CONST (mode, new);
3838 }
3839 break;
3840
3841 case '<':
3842 /* See what items are actually being compared and set FOLDED_ARG[01]
3843 to those values and CODE to the actual comparison code. If any are
3844 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3845 do anything if both operands are already known to be constant. */
3846
3847 if (const_arg0 == 0 || const_arg1 == 0)
3848 {
3849 struct table_elt *p0, *p1;
3850 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3851 enum machine_mode mode_arg1;
3852
3853 #ifdef FLOAT_STORE_FLAG_VALUE
3854 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3855 {
3856 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3857 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3858 false_rtx = CONST0_RTX (mode);
3859 }
3860 #endif
3861
3862 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3863 &mode_arg0, &mode_arg1);
3864 const_arg0 = equiv_constant (folded_arg0);
3865 const_arg1 = equiv_constant (folded_arg1);
3866
3867 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3868 what kinds of things are being compared, so we can't do
3869 anything with this comparison. */
3870
3871 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3872 break;
3873
3874 /* If we do not now have two constants being compared, see
3875 if we can nevertheless deduce some things about the
3876 comparison. */
3877 if (const_arg0 == 0 || const_arg1 == 0)
3878 {
3879 /* Some addresses are known to be nonzero. We don't know
3880 their sign, but equality comparisons are known. */
3881 if (const_arg1 == const0_rtx
3882 && nonzero_address_p (folded_arg0))
3883 {
3884 if (code == EQ)
3885 return false_rtx;
3886 else if (code == NE)
3887 return true_rtx;
3888 }
3889
3890 /* See if the two operands are the same. */
3891
3892 if (folded_arg0 == folded_arg1
3893 || (GET_CODE (folded_arg0) == REG
3894 && GET_CODE (folded_arg1) == REG
3895 && (REG_QTY (REGNO (folded_arg0))
3896 == REG_QTY (REGNO (folded_arg1))))
3897 || ((p0 = lookup (folded_arg0,
3898 (safe_hash (folded_arg0, mode_arg0)
3899 & HASH_MASK), mode_arg0))
3900 && (p1 = lookup (folded_arg1,
3901 (safe_hash (folded_arg1, mode_arg0)
3902 & HASH_MASK), mode_arg0))
3903 && p0->first_same_value == p1->first_same_value))
3904 {
3905 /* Sadly two equal NaNs are not equivalent. */
3906 if (!HONOR_NANS (mode_arg0))
3907 return ((code == EQ || code == LE || code == GE
3908 || code == LEU || code == GEU || code == UNEQ
3909 || code == UNLE || code == UNGE
3910 || code == ORDERED)
3911 ? true_rtx : false_rtx);
3912 /* Take care for the FP compares we can resolve. */
3913 if (code == UNEQ || code == UNLE || code == UNGE)
3914 return true_rtx;
3915 if (code == LTGT || code == LT || code == GT)
3916 return false_rtx;
3917 }
3918
3919 /* If FOLDED_ARG0 is a register, see if the comparison we are
3920 doing now is either the same as we did before or the reverse
3921 (we only check the reverse if not floating-point). */
3922 else if (GET_CODE (folded_arg0) == REG)
3923 {
3924 int qty = REG_QTY (REGNO (folded_arg0));
3925
3926 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3927 {
3928 struct qty_table_elem *ent = &qty_table[qty];
3929
3930 if ((comparison_dominates_p (ent->comparison_code, code)
3931 || (! FLOAT_MODE_P (mode_arg0)
3932 && comparison_dominates_p (ent->comparison_code,
3933 reverse_condition (code))))
3934 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3935 || (const_arg1
3936 && rtx_equal_p (ent->comparison_const,
3937 const_arg1))
3938 || (GET_CODE (folded_arg1) == REG
3939 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3940 return (comparison_dominates_p (ent->comparison_code, code)
3941 ? true_rtx : false_rtx);
3942 }
3943 }
3944 }
3945 }
3946
3947 /* If we are comparing against zero, see if the first operand is
3948 equivalent to an IOR with a constant. If so, we may be able to
3949 determine the result of this comparison. */
3950
3951 if (const_arg1 == const0_rtx)
3952 {
3953 rtx y = lookup_as_function (folded_arg0, IOR);
3954 rtx inner_const;
3955
3956 if (y != 0
3957 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3958 && GET_CODE (inner_const) == CONST_INT
3959 && INTVAL (inner_const) != 0)
3960 {
3961 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3962 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3963 && (INTVAL (inner_const)
3964 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3965 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3966
3967 #ifdef FLOAT_STORE_FLAG_VALUE
3968 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3969 {
3970 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3971 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3972 false_rtx = CONST0_RTX (mode);
3973 }
3974 #endif
3975
3976 switch (code)
3977 {
3978 case EQ:
3979 return false_rtx;
3980 case NE:
3981 return true_rtx;
3982 case LT: case LE:
3983 if (has_sign)
3984 return true_rtx;
3985 break;
3986 case GT: case GE:
3987 if (has_sign)
3988 return false_rtx;
3989 break;
3990 default:
3991 break;
3992 }
3993 }
3994 }
3995
3996 new = simplify_relational_operation (code,
3997 (mode_arg0 != VOIDmode
3998 ? mode_arg0
3999 : (GET_MODE (const_arg0
4000 ? const_arg0
4001 : folded_arg0)
4002 != VOIDmode)
4003 ? GET_MODE (const_arg0
4004 ? const_arg0
4005 : folded_arg0)
4006 : GET_MODE (const_arg1
4007 ? const_arg1
4008 : folded_arg1)),
4009 const_arg0 ? const_arg0 : folded_arg0,
4010 const_arg1 ? const_arg1 : folded_arg1);
4011 #ifdef FLOAT_STORE_FLAG_VALUE
4012 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4013 {
4014 if (new == const0_rtx)
4015 new = CONST0_RTX (mode);
4016 else
4017 new = (CONST_DOUBLE_FROM_REAL_VALUE
4018 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4019 }
4020 #endif
4021 break;
4022
4023 case '2':
4024 case 'c':
4025 switch (code)
4026 {
4027 case PLUS:
4028 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4029 with that LABEL_REF as its second operand. If so, the result is
4030 the first operand of that MINUS. This handles switches with an
4031 ADDR_DIFF_VEC table. */
4032 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4033 {
4034 rtx y
4035 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4036 : lookup_as_function (folded_arg0, MINUS);
4037
4038 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4039 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4040 return XEXP (y, 0);
4041
4042 /* Now try for a CONST of a MINUS like the above. */
4043 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4044 : lookup_as_function (folded_arg0, CONST))) != 0
4045 && GET_CODE (XEXP (y, 0)) == MINUS
4046 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4047 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4048 return XEXP (XEXP (y, 0), 0);
4049 }
4050
4051 /* Likewise if the operands are in the other order. */
4052 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4053 {
4054 rtx y
4055 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4056 : lookup_as_function (folded_arg1, MINUS);
4057
4058 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4059 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4060 return XEXP (y, 0);
4061
4062 /* Now try for a CONST of a MINUS like the above. */
4063 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4064 : lookup_as_function (folded_arg1, CONST))) != 0
4065 && GET_CODE (XEXP (y, 0)) == MINUS
4066 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4067 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4068 return XEXP (XEXP (y, 0), 0);
4069 }
4070
4071 /* If second operand is a register equivalent to a negative
4072 CONST_INT, see if we can find a register equivalent to the
4073 positive constant. Make a MINUS if so. Don't do this for
4074 a non-negative constant since we might then alternate between
4075 choosing positive and negative constants. Having the positive
4076 constant previously-used is the more common case. Be sure
4077 the resulting constant is non-negative; if const_arg1 were
4078 the smallest negative number this would overflow: depending
4079 on the mode, this would either just be the same value (and
4080 hence not save anything) or be incorrect. */
4081 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4082 && INTVAL (const_arg1) < 0
4083 /* This used to test
4084
4085 -INTVAL (const_arg1) >= 0
4086
4087 But The Sun V5.0 compilers mis-compiled that test. So
4088 instead we test for the problematic value in a more direct
4089 manner and hope the Sun compilers get it correct. */
4090 && INTVAL (const_arg1) !=
4091 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4092 && GET_CODE (folded_arg1) == REG)
4093 {
4094 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4095 struct table_elt *p
4096 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4097 mode);
4098
4099 if (p)
4100 for (p = p->first_same_value; p; p = p->next_same_value)
4101 if (GET_CODE (p->exp) == REG)
4102 return simplify_gen_binary (MINUS, mode, folded_arg0,
4103 canon_reg (p->exp, NULL_RTX));
4104 }
4105 goto from_plus;
4106
4107 case MINUS:
4108 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4109 If so, produce (PLUS Z C2-C). */
4110 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4111 {
4112 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4113 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4114 return fold_rtx (plus_constant (copy_rtx (y),
4115 -INTVAL (const_arg1)),
4116 NULL_RTX);
4117 }
4118
4119 /* Fall through. */
4120
4121 from_plus:
4122 case SMIN: case SMAX: case UMIN: case UMAX:
4123 case IOR: case AND: case XOR:
4124 case MULT:
4125 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4126 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4127 is known to be of similar form, we may be able to replace the
4128 operation with a combined operation. This may eliminate the
4129 intermediate operation if every use is simplified in this way.
4130 Note that the similar optimization done by combine.c only works
4131 if the intermediate operation's result has only one reference. */
4132
4133 if (GET_CODE (folded_arg0) == REG
4134 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4135 {
4136 int is_shift
4137 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4138 rtx y = lookup_as_function (folded_arg0, code);
4139 rtx inner_const;
4140 enum rtx_code associate_code;
4141 rtx new_const;
4142
4143 if (y == 0
4144 || 0 == (inner_const
4145 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4146 || GET_CODE (inner_const) != CONST_INT
4147 /* If we have compiled a statement like
4148 "if (x == (x & mask1))", and now are looking at
4149 "x & mask2", we will have a case where the first operand
4150 of Y is the same as our first operand. Unless we detect
4151 this case, an infinite loop will result. */
4152 || XEXP (y, 0) == folded_arg0)
4153 break;
4154
4155 /* Don't associate these operations if they are a PLUS with the
4156 same constant and it is a power of two. These might be doable
4157 with a pre- or post-increment. Similarly for two subtracts of
4158 identical powers of two with post decrement. */
4159
4160 if (code == PLUS && const_arg1 == inner_const
4161 && ((HAVE_PRE_INCREMENT
4162 && exact_log2 (INTVAL (const_arg1)) >= 0)
4163 || (HAVE_POST_INCREMENT
4164 && exact_log2 (INTVAL (const_arg1)) >= 0)
4165 || (HAVE_PRE_DECREMENT
4166 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4167 || (HAVE_POST_DECREMENT
4168 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4169 break;
4170
4171 /* Compute the code used to compose the constants. For example,
4172 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4173
4174 associate_code = (is_shift || code == MINUS ? PLUS : code);
4175
4176 new_const = simplify_binary_operation (associate_code, mode,
4177 const_arg1, inner_const);
4178
4179 if (new_const == 0)
4180 break;
4181
4182 /* If we are associating shift operations, don't let this
4183 produce a shift of the size of the object or larger.
4184 This could occur when we follow a sign-extend by a right
4185 shift on a machine that does a sign-extend as a pair
4186 of shifts. */
4187
4188 if (is_shift && GET_CODE (new_const) == CONST_INT
4189 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4190 {
4191 /* As an exception, we can turn an ASHIFTRT of this
4192 form into a shift of the number of bits - 1. */
4193 if (code == ASHIFTRT)
4194 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4195 else
4196 break;
4197 }
4198
4199 y = copy_rtx (XEXP (y, 0));
4200
4201 /* If Y contains our first operand (the most common way this
4202 can happen is if Y is a MEM), we would do into an infinite
4203 loop if we tried to fold it. So don't in that case. */
4204
4205 if (! reg_mentioned_p (folded_arg0, y))
4206 y = fold_rtx (y, insn);
4207
4208 return simplify_gen_binary (code, mode, y, new_const);
4209 }
4210 break;
4211
4212 case DIV: case UDIV:
4213 /* ??? The associative optimization performed immediately above is
4214 also possible for DIV and UDIV using associate_code of MULT.
4215 However, we would need extra code to verify that the
4216 multiplication does not overflow, that is, there is no overflow
4217 in the calculation of new_const. */
4218 break;
4219
4220 default:
4221 break;
4222 }
4223
4224 new = simplify_binary_operation (code, mode,
4225 const_arg0 ? const_arg0 : folded_arg0,
4226 const_arg1 ? const_arg1 : folded_arg1);
4227 break;
4228
4229 case 'o':
4230 /* (lo_sum (high X) X) is simply X. */
4231 if (code == LO_SUM && const_arg0 != 0
4232 && GET_CODE (const_arg0) == HIGH
4233 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4234 return const_arg1;
4235 break;
4236
4237 case '3':
4238 case 'b':
4239 new = simplify_ternary_operation (code, mode, mode_arg0,
4240 const_arg0 ? const_arg0 : folded_arg0,
4241 const_arg1 ? const_arg1 : folded_arg1,
4242 const_arg2 ? const_arg2 : XEXP (x, 2));
4243 break;
4244
4245 case 'x':
4246 /* Eliminate CONSTANT_P_RTX if its constant. */
4247 if (code == CONSTANT_P_RTX)
4248 {
4249 if (const_arg0)
4250 return const1_rtx;
4251 if (optimize == 0 || !flag_gcse)
4252 return const0_rtx;
4253 }
4254 break;
4255 }
4256
4257 return new ? new : x;
4258 }
4259 \f
4260 /* Return a constant value currently equivalent to X.
4261 Return 0 if we don't know one. */
4262
4263 static rtx
4264 equiv_constant (rtx x)
4265 {
4266 if (GET_CODE (x) == REG
4267 && REGNO_QTY_VALID_P (REGNO (x)))
4268 {
4269 int x_q = REG_QTY (REGNO (x));
4270 struct qty_table_elem *x_ent = &qty_table[x_q];
4271
4272 if (x_ent->const_rtx)
4273 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4274 }
4275
4276 if (x == 0 || CONSTANT_P (x))
4277 return x;
4278
4279 /* If X is a MEM, try to fold it outside the context of any insn to see if
4280 it might be equivalent to a constant. That handles the case where it
4281 is a constant-pool reference. Then try to look it up in the hash table
4282 in case it is something whose value we have seen before. */
4283
4284 if (GET_CODE (x) == MEM)
4285 {
4286 struct table_elt *elt;
4287
4288 x = fold_rtx (x, NULL_RTX);
4289 if (CONSTANT_P (x))
4290 return x;
4291
4292 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4293 if (elt == 0)
4294 return 0;
4295
4296 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4297 if (elt->is_const && CONSTANT_P (elt->exp))
4298 return elt->exp;
4299 }
4300
4301 return 0;
4302 }
4303 \f
4304 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4305 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4306 least-significant part of X.
4307 MODE specifies how big a part of X to return.
4308
4309 If the requested operation cannot be done, 0 is returned.
4310
4311 This is similar to gen_lowpart in emit-rtl.c. */
4312
4313 rtx
4314 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4315 {
4316 rtx result = gen_lowpart_common (mode, x);
4317
4318 if (result)
4319 return result;
4320 else if (GET_CODE (x) == MEM)
4321 {
4322 /* This is the only other case we handle. */
4323 int offset = 0;
4324 rtx new;
4325
4326 if (WORDS_BIG_ENDIAN)
4327 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4328 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4329 if (BYTES_BIG_ENDIAN)
4330 /* Adjust the address so that the address-after-the-data is
4331 unchanged. */
4332 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4333 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4334
4335 new = adjust_address_nv (x, mode, offset);
4336 if (! memory_address_p (mode, XEXP (new, 0)))
4337 return 0;
4338
4339 return new;
4340 }
4341 else
4342 return 0;
4343 }
4344 \f
4345 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4346 branch. It will be zero if not.
4347
4348 In certain cases, this can cause us to add an equivalence. For example,
4349 if we are following the taken case of
4350 if (i == 2)
4351 we can add the fact that `i' and '2' are now equivalent.
4352
4353 In any case, we can record that this comparison was passed. If the same
4354 comparison is seen later, we will know its value. */
4355
4356 static void
4357 record_jump_equiv (rtx insn, int taken)
4358 {
4359 int cond_known_true;
4360 rtx op0, op1;
4361 rtx set;
4362 enum machine_mode mode, mode0, mode1;
4363 int reversed_nonequality = 0;
4364 enum rtx_code code;
4365
4366 /* Ensure this is the right kind of insn. */
4367 if (! any_condjump_p (insn))
4368 return;
4369 set = pc_set (insn);
4370
4371 /* See if this jump condition is known true or false. */
4372 if (taken)
4373 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4374 else
4375 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4376
4377 /* Get the type of comparison being done and the operands being compared.
4378 If we had to reverse a non-equality condition, record that fact so we
4379 know that it isn't valid for floating-point. */
4380 code = GET_CODE (XEXP (SET_SRC (set), 0));
4381 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4382 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4383
4384 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4385 if (! cond_known_true)
4386 {
4387 code = reversed_comparison_code_parts (code, op0, op1, insn);
4388
4389 /* Don't remember if we can't find the inverse. */
4390 if (code == UNKNOWN)
4391 return;
4392 }
4393
4394 /* The mode is the mode of the non-constant. */
4395 mode = mode0;
4396 if (mode1 != VOIDmode)
4397 mode = mode1;
4398
4399 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4400 }
4401
4402 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4403 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4404 Make any useful entries we can with that information. Called from
4405 above function and called recursively. */
4406
4407 static void
4408 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4409 rtx op1, int reversed_nonequality)
4410 {
4411 unsigned op0_hash, op1_hash;
4412 int op0_in_memory, op1_in_memory;
4413 struct table_elt *op0_elt, *op1_elt;
4414
4415 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4416 we know that they are also equal in the smaller mode (this is also
4417 true for all smaller modes whether or not there is a SUBREG, but
4418 is not worth testing for with no SUBREG). */
4419
4420 /* Note that GET_MODE (op0) may not equal MODE. */
4421 if (code == EQ && GET_CODE (op0) == SUBREG
4422 && (GET_MODE_SIZE (GET_MODE (op0))
4423 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4424 {
4425 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4426 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4427
4428 record_jump_cond (code, mode, SUBREG_REG (op0),
4429 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4430 reversed_nonequality);
4431 }
4432
4433 if (code == EQ && GET_CODE (op1) == SUBREG
4434 && (GET_MODE_SIZE (GET_MODE (op1))
4435 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4436 {
4437 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4438 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4439
4440 record_jump_cond (code, mode, SUBREG_REG (op1),
4441 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4442 reversed_nonequality);
4443 }
4444
4445 /* Similarly, if this is an NE comparison, and either is a SUBREG
4446 making a smaller mode, we know the whole thing is also NE. */
4447
4448 /* Note that GET_MODE (op0) may not equal MODE;
4449 if we test MODE instead, we can get an infinite recursion
4450 alternating between two modes each wider than MODE. */
4451
4452 if (code == NE && GET_CODE (op0) == SUBREG
4453 && subreg_lowpart_p (op0)
4454 && (GET_MODE_SIZE (GET_MODE (op0))
4455 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4456 {
4457 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4458 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4459
4460 record_jump_cond (code, mode, SUBREG_REG (op0),
4461 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4462 reversed_nonequality);
4463 }
4464
4465 if (code == NE && GET_CODE (op1) == SUBREG
4466 && subreg_lowpart_p (op1)
4467 && (GET_MODE_SIZE (GET_MODE (op1))
4468 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4469 {
4470 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4471 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4472
4473 record_jump_cond (code, mode, SUBREG_REG (op1),
4474 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4475 reversed_nonequality);
4476 }
4477
4478 /* Hash both operands. */
4479
4480 do_not_record = 0;
4481 hash_arg_in_memory = 0;
4482 op0_hash = HASH (op0, mode);
4483 op0_in_memory = hash_arg_in_memory;
4484
4485 if (do_not_record)
4486 return;
4487
4488 do_not_record = 0;
4489 hash_arg_in_memory = 0;
4490 op1_hash = HASH (op1, mode);
4491 op1_in_memory = hash_arg_in_memory;
4492
4493 if (do_not_record)
4494 return;
4495
4496 /* Look up both operands. */
4497 op0_elt = lookup (op0, op0_hash, mode);
4498 op1_elt = lookup (op1, op1_hash, mode);
4499
4500 /* If both operands are already equivalent or if they are not in the
4501 table but are identical, do nothing. */
4502 if ((op0_elt != 0 && op1_elt != 0
4503 && op0_elt->first_same_value == op1_elt->first_same_value)
4504 || op0 == op1 || rtx_equal_p (op0, op1))
4505 return;
4506
4507 /* If we aren't setting two things equal all we can do is save this
4508 comparison. Similarly if this is floating-point. In the latter
4509 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4510 If we record the equality, we might inadvertently delete code
4511 whose intent was to change -0 to +0. */
4512
4513 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4514 {
4515 struct qty_table_elem *ent;
4516 int qty;
4517
4518 /* If we reversed a floating-point comparison, if OP0 is not a
4519 register, or if OP1 is neither a register or constant, we can't
4520 do anything. */
4521
4522 if (GET_CODE (op1) != REG)
4523 op1 = equiv_constant (op1);
4524
4525 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4526 || GET_CODE (op0) != REG || op1 == 0)
4527 return;
4528
4529 /* Put OP0 in the hash table if it isn't already. This gives it a
4530 new quantity number. */
4531 if (op0_elt == 0)
4532 {
4533 if (insert_regs (op0, NULL, 0))
4534 {
4535 rehash_using_reg (op0);
4536 op0_hash = HASH (op0, mode);
4537
4538 /* If OP0 is contained in OP1, this changes its hash code
4539 as well. Faster to rehash than to check, except
4540 for the simple case of a constant. */
4541 if (! CONSTANT_P (op1))
4542 op1_hash = HASH (op1,mode);
4543 }
4544
4545 op0_elt = insert (op0, NULL, op0_hash, mode);
4546 op0_elt->in_memory = op0_in_memory;
4547 }
4548
4549 qty = REG_QTY (REGNO (op0));
4550 ent = &qty_table[qty];
4551
4552 ent->comparison_code = code;
4553 if (GET_CODE (op1) == REG)
4554 {
4555 /* Look it up again--in case op0 and op1 are the same. */
4556 op1_elt = lookup (op1, op1_hash, mode);
4557
4558 /* Put OP1 in the hash table so it gets a new quantity number. */
4559 if (op1_elt == 0)
4560 {
4561 if (insert_regs (op1, NULL, 0))
4562 {
4563 rehash_using_reg (op1);
4564 op1_hash = HASH (op1, mode);
4565 }
4566
4567 op1_elt = insert (op1, NULL, op1_hash, mode);
4568 op1_elt->in_memory = op1_in_memory;
4569 }
4570
4571 ent->comparison_const = NULL_RTX;
4572 ent->comparison_qty = REG_QTY (REGNO (op1));
4573 }
4574 else
4575 {
4576 ent->comparison_const = op1;
4577 ent->comparison_qty = -1;
4578 }
4579
4580 return;
4581 }
4582
4583 /* If either side is still missing an equivalence, make it now,
4584 then merge the equivalences. */
4585
4586 if (op0_elt == 0)
4587 {
4588 if (insert_regs (op0, NULL, 0))
4589 {
4590 rehash_using_reg (op0);
4591 op0_hash = HASH (op0, mode);
4592 }
4593
4594 op0_elt = insert (op0, NULL, op0_hash, mode);
4595 op0_elt->in_memory = op0_in_memory;
4596 }
4597
4598 if (op1_elt == 0)
4599 {
4600 if (insert_regs (op1, NULL, 0))
4601 {
4602 rehash_using_reg (op1);
4603 op1_hash = HASH (op1, mode);
4604 }
4605
4606 op1_elt = insert (op1, NULL, op1_hash, mode);
4607 op1_elt->in_memory = op1_in_memory;
4608 }
4609
4610 merge_equiv_classes (op0_elt, op1_elt);
4611 last_jump_equiv_class = op0_elt;
4612 }
4613 \f
4614 /* CSE processing for one instruction.
4615 First simplify sources and addresses of all assignments
4616 in the instruction, using previously-computed equivalents values.
4617 Then install the new sources and destinations in the table
4618 of available values.
4619
4620 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4621 the insn. It means that INSN is inside libcall block. In this
4622 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4623
4624 /* Data on one SET contained in the instruction. */
4625
4626 struct set
4627 {
4628 /* The SET rtx itself. */
4629 rtx rtl;
4630 /* The SET_SRC of the rtx (the original value, if it is changing). */
4631 rtx src;
4632 /* The hash-table element for the SET_SRC of the SET. */
4633 struct table_elt *src_elt;
4634 /* Hash value for the SET_SRC. */
4635 unsigned src_hash;
4636 /* Hash value for the SET_DEST. */
4637 unsigned dest_hash;
4638 /* The SET_DEST, with SUBREG, etc., stripped. */
4639 rtx inner_dest;
4640 /* Nonzero if the SET_SRC is in memory. */
4641 char src_in_memory;
4642 /* Nonzero if the SET_SRC contains something
4643 whose value cannot be predicted and understood. */
4644 char src_volatile;
4645 /* Original machine mode, in case it becomes a CONST_INT.
4646 The size of this field should match the size of the mode
4647 field of struct rtx_def (see rtl.h). */
4648 ENUM_BITFIELD(machine_mode) mode : 8;
4649 /* A constant equivalent for SET_SRC, if any. */
4650 rtx src_const;
4651 /* Original SET_SRC value used for libcall notes. */
4652 rtx orig_src;
4653 /* Hash value of constant equivalent for SET_SRC. */
4654 unsigned src_const_hash;
4655 /* Table entry for constant equivalent for SET_SRC, if any. */
4656 struct table_elt *src_const_elt;
4657 };
4658
4659 static void
4660 cse_insn (rtx insn, rtx libcall_insn)
4661 {
4662 rtx x = PATTERN (insn);
4663 int i;
4664 rtx tem;
4665 int n_sets = 0;
4666
4667 #ifdef HAVE_cc0
4668 /* Records what this insn does to set CC0. */
4669 rtx this_insn_cc0 = 0;
4670 enum machine_mode this_insn_cc0_mode = VOIDmode;
4671 #endif
4672
4673 rtx src_eqv = 0;
4674 struct table_elt *src_eqv_elt = 0;
4675 int src_eqv_volatile = 0;
4676 int src_eqv_in_memory = 0;
4677 unsigned src_eqv_hash = 0;
4678
4679 struct set *sets = (struct set *) 0;
4680
4681 this_insn = insn;
4682
4683 /* Find all the SETs and CLOBBERs in this instruction.
4684 Record all the SETs in the array `set' and count them.
4685 Also determine whether there is a CLOBBER that invalidates
4686 all memory references, or all references at varying addresses. */
4687
4688 if (GET_CODE (insn) == CALL_INSN)
4689 {
4690 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4691 {
4692 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4693 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4694 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4695 }
4696 }
4697
4698 if (GET_CODE (x) == SET)
4699 {
4700 sets = alloca (sizeof (struct set));
4701 sets[0].rtl = x;
4702
4703 /* Ignore SETs that are unconditional jumps.
4704 They never need cse processing, so this does not hurt.
4705 The reason is not efficiency but rather
4706 so that we can test at the end for instructions
4707 that have been simplified to unconditional jumps
4708 and not be misled by unchanged instructions
4709 that were unconditional jumps to begin with. */
4710 if (SET_DEST (x) == pc_rtx
4711 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4712 ;
4713
4714 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4715 The hard function value register is used only once, to copy to
4716 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4717 Ensure we invalidate the destination register. On the 80386 no
4718 other code would invalidate it since it is a fixed_reg.
4719 We need not check the return of apply_change_group; see canon_reg. */
4720
4721 else if (GET_CODE (SET_SRC (x)) == CALL)
4722 {
4723 canon_reg (SET_SRC (x), insn);
4724 apply_change_group ();
4725 fold_rtx (SET_SRC (x), insn);
4726 invalidate (SET_DEST (x), VOIDmode);
4727 }
4728 else
4729 n_sets = 1;
4730 }
4731 else if (GET_CODE (x) == PARALLEL)
4732 {
4733 int lim = XVECLEN (x, 0);
4734
4735 sets = alloca (lim * sizeof (struct set));
4736
4737 /* Find all regs explicitly clobbered in this insn,
4738 and ensure they are not replaced with any other regs
4739 elsewhere in this insn.
4740 When a reg that is clobbered is also used for input,
4741 we should presume that that is for a reason,
4742 and we should not substitute some other register
4743 which is not supposed to be clobbered.
4744 Therefore, this loop cannot be merged into the one below
4745 because a CALL may precede a CLOBBER and refer to the
4746 value clobbered. We must not let a canonicalization do
4747 anything in that case. */
4748 for (i = 0; i < lim; i++)
4749 {
4750 rtx y = XVECEXP (x, 0, i);
4751 if (GET_CODE (y) == CLOBBER)
4752 {
4753 rtx clobbered = XEXP (y, 0);
4754
4755 if (GET_CODE (clobbered) == REG
4756 || GET_CODE (clobbered) == SUBREG)
4757 invalidate (clobbered, VOIDmode);
4758 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4759 || GET_CODE (clobbered) == ZERO_EXTRACT)
4760 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4761 }
4762 }
4763
4764 for (i = 0; i < lim; i++)
4765 {
4766 rtx y = XVECEXP (x, 0, i);
4767 if (GET_CODE (y) == SET)
4768 {
4769 /* As above, we ignore unconditional jumps and call-insns and
4770 ignore the result of apply_change_group. */
4771 if (GET_CODE (SET_SRC (y)) == CALL)
4772 {
4773 canon_reg (SET_SRC (y), insn);
4774 apply_change_group ();
4775 fold_rtx (SET_SRC (y), insn);
4776 invalidate (SET_DEST (y), VOIDmode);
4777 }
4778 else if (SET_DEST (y) == pc_rtx
4779 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4780 ;
4781 else
4782 sets[n_sets++].rtl = y;
4783 }
4784 else if (GET_CODE (y) == CLOBBER)
4785 {
4786 /* If we clobber memory, canon the address.
4787 This does nothing when a register is clobbered
4788 because we have already invalidated the reg. */
4789 if (GET_CODE (XEXP (y, 0)) == MEM)
4790 canon_reg (XEXP (y, 0), NULL_RTX);
4791 }
4792 else if (GET_CODE (y) == USE
4793 && ! (GET_CODE (XEXP (y, 0)) == REG
4794 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4795 canon_reg (y, NULL_RTX);
4796 else if (GET_CODE (y) == CALL)
4797 {
4798 /* The result of apply_change_group can be ignored; see
4799 canon_reg. */
4800 canon_reg (y, insn);
4801 apply_change_group ();
4802 fold_rtx (y, insn);
4803 }
4804 }
4805 }
4806 else if (GET_CODE (x) == CLOBBER)
4807 {
4808 if (GET_CODE (XEXP (x, 0)) == MEM)
4809 canon_reg (XEXP (x, 0), NULL_RTX);
4810 }
4811
4812 /* Canonicalize a USE of a pseudo register or memory location. */
4813 else if (GET_CODE (x) == USE
4814 && ! (GET_CODE (XEXP (x, 0)) == REG
4815 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4816 canon_reg (XEXP (x, 0), NULL_RTX);
4817 else if (GET_CODE (x) == CALL)
4818 {
4819 /* The result of apply_change_group can be ignored; see canon_reg. */
4820 canon_reg (x, insn);
4821 apply_change_group ();
4822 fold_rtx (x, insn);
4823 }
4824
4825 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4826 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4827 is handled specially for this case, and if it isn't set, then there will
4828 be no equivalence for the destination. */
4829 if (n_sets == 1 && REG_NOTES (insn) != 0
4830 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4831 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4832 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4833 {
4834 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4835 XEXP (tem, 0) = src_eqv;
4836 }
4837
4838 /* Canonicalize sources and addresses of destinations.
4839 We do this in a separate pass to avoid problems when a MATCH_DUP is
4840 present in the insn pattern. In that case, we want to ensure that
4841 we don't break the duplicate nature of the pattern. So we will replace
4842 both operands at the same time. Otherwise, we would fail to find an
4843 equivalent substitution in the loop calling validate_change below.
4844
4845 We used to suppress canonicalization of DEST if it appears in SRC,
4846 but we don't do this any more. */
4847
4848 for (i = 0; i < n_sets; i++)
4849 {
4850 rtx dest = SET_DEST (sets[i].rtl);
4851 rtx src = SET_SRC (sets[i].rtl);
4852 rtx new = canon_reg (src, insn);
4853 int insn_code;
4854
4855 sets[i].orig_src = src;
4856 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4857 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4858 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4859 || (insn_code = recog_memoized (insn)) < 0
4860 || insn_data[insn_code].n_dups > 0)
4861 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4862 else
4863 SET_SRC (sets[i].rtl) = new;
4864
4865 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4866 {
4867 validate_change (insn, &XEXP (dest, 1),
4868 canon_reg (XEXP (dest, 1), insn), 1);
4869 validate_change (insn, &XEXP (dest, 2),
4870 canon_reg (XEXP (dest, 2), insn), 1);
4871 }
4872
4873 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4874 || GET_CODE (dest) == ZERO_EXTRACT
4875 || GET_CODE (dest) == SIGN_EXTRACT)
4876 dest = XEXP (dest, 0);
4877
4878 if (GET_CODE (dest) == MEM)
4879 canon_reg (dest, insn);
4880 }
4881
4882 /* Now that we have done all the replacements, we can apply the change
4883 group and see if they all work. Note that this will cause some
4884 canonicalizations that would have worked individually not to be applied
4885 because some other canonicalization didn't work, but this should not
4886 occur often.
4887
4888 The result of apply_change_group can be ignored; see canon_reg. */
4889
4890 apply_change_group ();
4891
4892 /* Set sets[i].src_elt to the class each source belongs to.
4893 Detect assignments from or to volatile things
4894 and set set[i] to zero so they will be ignored
4895 in the rest of this function.
4896
4897 Nothing in this loop changes the hash table or the register chains. */
4898
4899 for (i = 0; i < n_sets; i++)
4900 {
4901 rtx src, dest;
4902 rtx src_folded;
4903 struct table_elt *elt = 0, *p;
4904 enum machine_mode mode;
4905 rtx src_eqv_here;
4906 rtx src_const = 0;
4907 rtx src_related = 0;
4908 struct table_elt *src_const_elt = 0;
4909 int src_cost = MAX_COST;
4910 int src_eqv_cost = MAX_COST;
4911 int src_folded_cost = MAX_COST;
4912 int src_related_cost = MAX_COST;
4913 int src_elt_cost = MAX_COST;
4914 int src_regcost = MAX_COST;
4915 int src_eqv_regcost = MAX_COST;
4916 int src_folded_regcost = MAX_COST;
4917 int src_related_regcost = MAX_COST;
4918 int src_elt_regcost = MAX_COST;
4919 /* Set nonzero if we need to call force_const_mem on with the
4920 contents of src_folded before using it. */
4921 int src_folded_force_flag = 0;
4922
4923 dest = SET_DEST (sets[i].rtl);
4924 src = SET_SRC (sets[i].rtl);
4925
4926 /* If SRC is a constant that has no machine mode,
4927 hash it with the destination's machine mode.
4928 This way we can keep different modes separate. */
4929
4930 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4931 sets[i].mode = mode;
4932
4933 if (src_eqv)
4934 {
4935 enum machine_mode eqvmode = mode;
4936 if (GET_CODE (dest) == STRICT_LOW_PART)
4937 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4938 do_not_record = 0;
4939 hash_arg_in_memory = 0;
4940 src_eqv_hash = HASH (src_eqv, eqvmode);
4941
4942 /* Find the equivalence class for the equivalent expression. */
4943
4944 if (!do_not_record)
4945 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4946
4947 src_eqv_volatile = do_not_record;
4948 src_eqv_in_memory = hash_arg_in_memory;
4949 }
4950
4951 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4952 value of the INNER register, not the destination. So it is not
4953 a valid substitution for the source. But save it for later. */
4954 if (GET_CODE (dest) == STRICT_LOW_PART)
4955 src_eqv_here = 0;
4956 else
4957 src_eqv_here = src_eqv;
4958
4959 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4960 simplified result, which may not necessarily be valid. */
4961 src_folded = fold_rtx (src, insn);
4962
4963 #if 0
4964 /* ??? This caused bad code to be generated for the m68k port with -O2.
4965 Suppose src is (CONST_INT -1), and that after truncation src_folded
4966 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4967 At the end we will add src and src_const to the same equivalence
4968 class. We now have 3 and -1 on the same equivalence class. This
4969 causes later instructions to be mis-optimized. */
4970 /* If storing a constant in a bitfield, pre-truncate the constant
4971 so we will be able to record it later. */
4972 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4973 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4974 {
4975 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4976
4977 if (GET_CODE (src) == CONST_INT
4978 && GET_CODE (width) == CONST_INT
4979 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4980 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4981 src_folded
4982 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4983 << INTVAL (width)) - 1));
4984 }
4985 #endif
4986
4987 /* Compute SRC's hash code, and also notice if it
4988 should not be recorded at all. In that case,
4989 prevent any further processing of this assignment. */
4990 do_not_record = 0;
4991 hash_arg_in_memory = 0;
4992
4993 sets[i].src = src;
4994 sets[i].src_hash = HASH (src, mode);
4995 sets[i].src_volatile = do_not_record;
4996 sets[i].src_in_memory = hash_arg_in_memory;
4997
4998 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4999 a pseudo, do not record SRC. Using SRC as a replacement for
5000 anything else will be incorrect in that situation. Note that
5001 this usually occurs only for stack slots, in which case all the
5002 RTL would be referring to SRC, so we don't lose any optimization
5003 opportunities by not having SRC in the hash table. */
5004
5005 if (GET_CODE (src) == MEM
5006 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5007 && GET_CODE (dest) == REG
5008 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5009 sets[i].src_volatile = 1;
5010
5011 #if 0
5012 /* It is no longer clear why we used to do this, but it doesn't
5013 appear to still be needed. So let's try without it since this
5014 code hurts cse'ing widened ops. */
5015 /* If source is a perverse subreg (such as QI treated as an SI),
5016 treat it as volatile. It may do the work of an SI in one context
5017 where the extra bits are not being used, but cannot replace an SI
5018 in general. */
5019 if (GET_CODE (src) == SUBREG
5020 && (GET_MODE_SIZE (GET_MODE (src))
5021 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5022 sets[i].src_volatile = 1;
5023 #endif
5024
5025 /* Locate all possible equivalent forms for SRC. Try to replace
5026 SRC in the insn with each cheaper equivalent.
5027
5028 We have the following types of equivalents: SRC itself, a folded
5029 version, a value given in a REG_EQUAL note, or a value related
5030 to a constant.
5031
5032 Each of these equivalents may be part of an additional class
5033 of equivalents (if more than one is in the table, they must be in
5034 the same class; we check for this).
5035
5036 If the source is volatile, we don't do any table lookups.
5037
5038 We note any constant equivalent for possible later use in a
5039 REG_NOTE. */
5040
5041 if (!sets[i].src_volatile)
5042 elt = lookup (src, sets[i].src_hash, mode);
5043
5044 sets[i].src_elt = elt;
5045
5046 if (elt && src_eqv_here && src_eqv_elt)
5047 {
5048 if (elt->first_same_value != src_eqv_elt->first_same_value)
5049 {
5050 /* The REG_EQUAL is indicating that two formerly distinct
5051 classes are now equivalent. So merge them. */
5052 merge_equiv_classes (elt, src_eqv_elt);
5053 src_eqv_hash = HASH (src_eqv, elt->mode);
5054 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5055 }
5056
5057 src_eqv_here = 0;
5058 }
5059
5060 else if (src_eqv_elt)
5061 elt = src_eqv_elt;
5062
5063 /* Try to find a constant somewhere and record it in `src_const'.
5064 Record its table element, if any, in `src_const_elt'. Look in
5065 any known equivalences first. (If the constant is not in the
5066 table, also set `sets[i].src_const_hash'). */
5067 if (elt)
5068 for (p = elt->first_same_value; p; p = p->next_same_value)
5069 if (p->is_const)
5070 {
5071 src_const = p->exp;
5072 src_const_elt = elt;
5073 break;
5074 }
5075
5076 if (src_const == 0
5077 && (CONSTANT_P (src_folded)
5078 /* Consider (minus (label_ref L1) (label_ref L2)) as
5079 "constant" here so we will record it. This allows us
5080 to fold switch statements when an ADDR_DIFF_VEC is used. */
5081 || (GET_CODE (src_folded) == MINUS
5082 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5083 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5084 src_const = src_folded, src_const_elt = elt;
5085 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5086 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5087
5088 /* If we don't know if the constant is in the table, get its
5089 hash code and look it up. */
5090 if (src_const && src_const_elt == 0)
5091 {
5092 sets[i].src_const_hash = HASH (src_const, mode);
5093 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5094 }
5095
5096 sets[i].src_const = src_const;
5097 sets[i].src_const_elt = src_const_elt;
5098
5099 /* If the constant and our source are both in the table, mark them as
5100 equivalent. Otherwise, if a constant is in the table but the source
5101 isn't, set ELT to it. */
5102 if (src_const_elt && elt
5103 && src_const_elt->first_same_value != elt->first_same_value)
5104 merge_equiv_classes (elt, src_const_elt);
5105 else if (src_const_elt && elt == 0)
5106 elt = src_const_elt;
5107
5108 /* See if there is a register linearly related to a constant
5109 equivalent of SRC. */
5110 if (src_const
5111 && (GET_CODE (src_const) == CONST
5112 || (src_const_elt && src_const_elt->related_value != 0)))
5113 {
5114 src_related = use_related_value (src_const, src_const_elt);
5115 if (src_related)
5116 {
5117 struct table_elt *src_related_elt
5118 = lookup (src_related, HASH (src_related, mode), mode);
5119 if (src_related_elt && elt)
5120 {
5121 if (elt->first_same_value
5122 != src_related_elt->first_same_value)
5123 /* This can occur when we previously saw a CONST
5124 involving a SYMBOL_REF and then see the SYMBOL_REF
5125 twice. Merge the involved classes. */
5126 merge_equiv_classes (elt, src_related_elt);
5127
5128 src_related = 0;
5129 src_related_elt = 0;
5130 }
5131 else if (src_related_elt && elt == 0)
5132 elt = src_related_elt;
5133 }
5134 }
5135
5136 /* See if we have a CONST_INT that is already in a register in a
5137 wider mode. */
5138
5139 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5140 && GET_MODE_CLASS (mode) == MODE_INT
5141 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5142 {
5143 enum machine_mode wider_mode;
5144
5145 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5146 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5147 && src_related == 0;
5148 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5149 {
5150 struct table_elt *const_elt
5151 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5152
5153 if (const_elt == 0)
5154 continue;
5155
5156 for (const_elt = const_elt->first_same_value;
5157 const_elt; const_elt = const_elt->next_same_value)
5158 if (GET_CODE (const_elt->exp) == REG)
5159 {
5160 src_related = gen_lowpart_if_possible (mode,
5161 const_elt->exp);
5162 break;
5163 }
5164 }
5165 }
5166
5167 /* Another possibility is that we have an AND with a constant in
5168 a mode narrower than a word. If so, it might have been generated
5169 as part of an "if" which would narrow the AND. If we already
5170 have done the AND in a wider mode, we can use a SUBREG of that
5171 value. */
5172
5173 if (flag_expensive_optimizations && ! src_related
5174 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5175 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5176 {
5177 enum machine_mode tmode;
5178 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5179
5180 for (tmode = GET_MODE_WIDER_MODE (mode);
5181 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5182 tmode = GET_MODE_WIDER_MODE (tmode))
5183 {
5184 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5185 struct table_elt *larger_elt;
5186
5187 if (inner)
5188 {
5189 PUT_MODE (new_and, tmode);
5190 XEXP (new_and, 0) = inner;
5191 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5192 if (larger_elt == 0)
5193 continue;
5194
5195 for (larger_elt = larger_elt->first_same_value;
5196 larger_elt; larger_elt = larger_elt->next_same_value)
5197 if (GET_CODE (larger_elt->exp) == REG)
5198 {
5199 src_related
5200 = gen_lowpart_if_possible (mode, larger_elt->exp);
5201 break;
5202 }
5203
5204 if (src_related)
5205 break;
5206 }
5207 }
5208 }
5209
5210 #ifdef LOAD_EXTEND_OP
5211 /* See if a MEM has already been loaded with a widening operation;
5212 if it has, we can use a subreg of that. Many CISC machines
5213 also have such operations, but this is only likely to be
5214 beneficial these machines. */
5215
5216 if (flag_expensive_optimizations && src_related == 0
5217 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5218 && GET_MODE_CLASS (mode) == MODE_INT
5219 && GET_CODE (src) == MEM && ! do_not_record
5220 && LOAD_EXTEND_OP (mode) != NIL)
5221 {
5222 enum machine_mode tmode;
5223
5224 /* Set what we are trying to extend and the operation it might
5225 have been extended with. */
5226 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5227 XEXP (memory_extend_rtx, 0) = src;
5228
5229 for (tmode = GET_MODE_WIDER_MODE (mode);
5230 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5231 tmode = GET_MODE_WIDER_MODE (tmode))
5232 {
5233 struct table_elt *larger_elt;
5234
5235 PUT_MODE (memory_extend_rtx, tmode);
5236 larger_elt = lookup (memory_extend_rtx,
5237 HASH (memory_extend_rtx, tmode), tmode);
5238 if (larger_elt == 0)
5239 continue;
5240
5241 for (larger_elt = larger_elt->first_same_value;
5242 larger_elt; larger_elt = larger_elt->next_same_value)
5243 if (GET_CODE (larger_elt->exp) == REG)
5244 {
5245 src_related = gen_lowpart_if_possible (mode,
5246 larger_elt->exp);
5247 break;
5248 }
5249
5250 if (src_related)
5251 break;
5252 }
5253 }
5254 #endif /* LOAD_EXTEND_OP */
5255
5256 if (src == src_folded)
5257 src_folded = 0;
5258
5259 /* At this point, ELT, if nonzero, points to a class of expressions
5260 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5261 and SRC_RELATED, if nonzero, each contain additional equivalent
5262 expressions. Prune these latter expressions by deleting expressions
5263 already in the equivalence class.
5264
5265 Check for an equivalent identical to the destination. If found,
5266 this is the preferred equivalent since it will likely lead to
5267 elimination of the insn. Indicate this by placing it in
5268 `src_related'. */
5269
5270 if (elt)
5271 elt = elt->first_same_value;
5272 for (p = elt; p; p = p->next_same_value)
5273 {
5274 enum rtx_code code = GET_CODE (p->exp);
5275
5276 /* If the expression is not valid, ignore it. Then we do not
5277 have to check for validity below. In most cases, we can use
5278 `rtx_equal_p', since canonicalization has already been done. */
5279 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5280 continue;
5281
5282 /* Also skip paradoxical subregs, unless that's what we're
5283 looking for. */
5284 if (code == SUBREG
5285 && (GET_MODE_SIZE (GET_MODE (p->exp))
5286 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5287 && ! (src != 0
5288 && GET_CODE (src) == SUBREG
5289 && GET_MODE (src) == GET_MODE (p->exp)
5290 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5291 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5292 continue;
5293
5294 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5295 src = 0;
5296 else if (src_folded && GET_CODE (src_folded) == code
5297 && rtx_equal_p (src_folded, p->exp))
5298 src_folded = 0;
5299 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5300 && rtx_equal_p (src_eqv_here, p->exp))
5301 src_eqv_here = 0;
5302 else if (src_related && GET_CODE (src_related) == code
5303 && rtx_equal_p (src_related, p->exp))
5304 src_related = 0;
5305
5306 /* This is the same as the destination of the insns, we want
5307 to prefer it. Copy it to src_related. The code below will
5308 then give it a negative cost. */
5309 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5310 src_related = dest;
5311 }
5312
5313 /* Find the cheapest valid equivalent, trying all the available
5314 possibilities. Prefer items not in the hash table to ones
5315 that are when they are equal cost. Note that we can never
5316 worsen an insn as the current contents will also succeed.
5317 If we find an equivalent identical to the destination, use it as best,
5318 since this insn will probably be eliminated in that case. */
5319 if (src)
5320 {
5321 if (rtx_equal_p (src, dest))
5322 src_cost = src_regcost = -1;
5323 else
5324 {
5325 src_cost = COST (src);
5326 src_regcost = approx_reg_cost (src);
5327 }
5328 }
5329
5330 if (src_eqv_here)
5331 {
5332 if (rtx_equal_p (src_eqv_here, dest))
5333 src_eqv_cost = src_eqv_regcost = -1;
5334 else
5335 {
5336 src_eqv_cost = COST (src_eqv_here);
5337 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5338 }
5339 }
5340
5341 if (src_folded)
5342 {
5343 if (rtx_equal_p (src_folded, dest))
5344 src_folded_cost = src_folded_regcost = -1;
5345 else
5346 {
5347 src_folded_cost = COST (src_folded);
5348 src_folded_regcost = approx_reg_cost (src_folded);
5349 }
5350 }
5351
5352 if (src_related)
5353 {
5354 if (rtx_equal_p (src_related, dest))
5355 src_related_cost = src_related_regcost = -1;
5356 else
5357 {
5358 src_related_cost = COST (src_related);
5359 src_related_regcost = approx_reg_cost (src_related);
5360 }
5361 }
5362
5363 /* If this was an indirect jump insn, a known label will really be
5364 cheaper even though it looks more expensive. */
5365 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5366 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5367
5368 /* Terminate loop when replacement made. This must terminate since
5369 the current contents will be tested and will always be valid. */
5370 while (1)
5371 {
5372 rtx trial;
5373
5374 /* Skip invalid entries. */
5375 while (elt && GET_CODE (elt->exp) != REG
5376 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5377 elt = elt->next_same_value;
5378
5379 /* A paradoxical subreg would be bad here: it'll be the right
5380 size, but later may be adjusted so that the upper bits aren't
5381 what we want. So reject it. */
5382 if (elt != 0
5383 && GET_CODE (elt->exp) == SUBREG
5384 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5385 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5386 /* It is okay, though, if the rtx we're trying to match
5387 will ignore any of the bits we can't predict. */
5388 && ! (src != 0
5389 && GET_CODE (src) == SUBREG
5390 && GET_MODE (src) == GET_MODE (elt->exp)
5391 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5392 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5393 {
5394 elt = elt->next_same_value;
5395 continue;
5396 }
5397
5398 if (elt)
5399 {
5400 src_elt_cost = elt->cost;
5401 src_elt_regcost = elt->regcost;
5402 }
5403
5404 /* Find cheapest and skip it for the next time. For items
5405 of equal cost, use this order:
5406 src_folded, src, src_eqv, src_related and hash table entry. */
5407 if (src_folded
5408 && preferrable (src_folded_cost, src_folded_regcost,
5409 src_cost, src_regcost) <= 0
5410 && preferrable (src_folded_cost, src_folded_regcost,
5411 src_eqv_cost, src_eqv_regcost) <= 0
5412 && preferrable (src_folded_cost, src_folded_regcost,
5413 src_related_cost, src_related_regcost) <= 0
5414 && preferrable (src_folded_cost, src_folded_regcost,
5415 src_elt_cost, src_elt_regcost) <= 0)
5416 {
5417 trial = src_folded, src_folded_cost = MAX_COST;
5418 if (src_folded_force_flag)
5419 {
5420 rtx forced = force_const_mem (mode, trial);
5421 if (forced)
5422 trial = forced;
5423 }
5424 }
5425 else if (src
5426 && preferrable (src_cost, src_regcost,
5427 src_eqv_cost, src_eqv_regcost) <= 0
5428 && preferrable (src_cost, src_regcost,
5429 src_related_cost, src_related_regcost) <= 0
5430 && preferrable (src_cost, src_regcost,
5431 src_elt_cost, src_elt_regcost) <= 0)
5432 trial = src, src_cost = MAX_COST;
5433 else if (src_eqv_here
5434 && preferrable (src_eqv_cost, src_eqv_regcost,
5435 src_related_cost, src_related_regcost) <= 0
5436 && preferrable (src_eqv_cost, src_eqv_regcost,
5437 src_elt_cost, src_elt_regcost) <= 0)
5438 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5439 else if (src_related
5440 && preferrable (src_related_cost, src_related_regcost,
5441 src_elt_cost, src_elt_regcost) <= 0)
5442 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5443 else
5444 {
5445 trial = copy_rtx (elt->exp);
5446 elt = elt->next_same_value;
5447 src_elt_cost = MAX_COST;
5448 }
5449
5450 /* We don't normally have an insn matching (set (pc) (pc)), so
5451 check for this separately here. We will delete such an
5452 insn below.
5453
5454 For other cases such as a table jump or conditional jump
5455 where we know the ultimate target, go ahead and replace the
5456 operand. While that may not make a valid insn, we will
5457 reemit the jump below (and also insert any necessary
5458 barriers). */
5459 if (n_sets == 1 && dest == pc_rtx
5460 && (trial == pc_rtx
5461 || (GET_CODE (trial) == LABEL_REF
5462 && ! condjump_p (insn))))
5463 {
5464 SET_SRC (sets[i].rtl) = trial;
5465 cse_jumps_altered = 1;
5466 break;
5467 }
5468
5469 /* Look for a substitution that makes a valid insn. */
5470 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5471 {
5472 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5473
5474 /* If we just made a substitution inside a libcall, then we
5475 need to make the same substitution in any notes attached
5476 to the RETVAL insn. */
5477 if (libcall_insn
5478 && (GET_CODE (sets[i].orig_src) == REG
5479 || GET_CODE (sets[i].orig_src) == SUBREG
5480 || GET_CODE (sets[i].orig_src) == MEM))
5481 simplify_replace_rtx (REG_NOTES (libcall_insn),
5482 sets[i].orig_src, copy_rtx (new));
5483
5484 /* The result of apply_change_group can be ignored; see
5485 canon_reg. */
5486
5487 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5488 apply_change_group ();
5489 break;
5490 }
5491
5492 /* If we previously found constant pool entries for
5493 constants and this is a constant, try making a
5494 pool entry. Put it in src_folded unless we already have done
5495 this since that is where it likely came from. */
5496
5497 else if (constant_pool_entries_cost
5498 && CONSTANT_P (trial)
5499 /* Reject cases that will abort in decode_rtx_const.
5500 On the alpha when simplifying a switch, we get
5501 (const (truncate (minus (label_ref) (label_ref)))). */
5502 && ! (GET_CODE (trial) == CONST
5503 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5504 /* Likewise on IA-64, except without the truncate. */
5505 && ! (GET_CODE (trial) == CONST
5506 && GET_CODE (XEXP (trial, 0)) == MINUS
5507 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5508 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5509 && (src_folded == 0
5510 || (GET_CODE (src_folded) != MEM
5511 && ! src_folded_force_flag))
5512 && GET_MODE_CLASS (mode) != MODE_CC
5513 && mode != VOIDmode)
5514 {
5515 src_folded_force_flag = 1;
5516 src_folded = trial;
5517 src_folded_cost = constant_pool_entries_cost;
5518 src_folded_regcost = constant_pool_entries_regcost;
5519 }
5520 }
5521
5522 src = SET_SRC (sets[i].rtl);
5523
5524 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5525 However, there is an important exception: If both are registers
5526 that are not the head of their equivalence class, replace SET_SRC
5527 with the head of the class. If we do not do this, we will have
5528 both registers live over a portion of the basic block. This way,
5529 their lifetimes will likely abut instead of overlapping. */
5530 if (GET_CODE (dest) == REG
5531 && REGNO_QTY_VALID_P (REGNO (dest)))
5532 {
5533 int dest_q = REG_QTY (REGNO (dest));
5534 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5535
5536 if (dest_ent->mode == GET_MODE (dest)
5537 && dest_ent->first_reg != REGNO (dest)
5538 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5539 /* Don't do this if the original insn had a hard reg as
5540 SET_SRC or SET_DEST. */
5541 && (GET_CODE (sets[i].src) != REG
5542 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5543 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5544 /* We can't call canon_reg here because it won't do anything if
5545 SRC is a hard register. */
5546 {
5547 int src_q = REG_QTY (REGNO (src));
5548 struct qty_table_elem *src_ent = &qty_table[src_q];
5549 int first = src_ent->first_reg;
5550 rtx new_src
5551 = (first >= FIRST_PSEUDO_REGISTER
5552 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5553
5554 /* We must use validate-change even for this, because this
5555 might be a special no-op instruction, suitable only to
5556 tag notes onto. */
5557 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5558 {
5559 src = new_src;
5560 /* If we had a constant that is cheaper than what we are now
5561 setting SRC to, use that constant. We ignored it when we
5562 thought we could make this into a no-op. */
5563 if (src_const && COST (src_const) < COST (src)
5564 && validate_change (insn, &SET_SRC (sets[i].rtl),
5565 src_const, 0))
5566 src = src_const;
5567 }
5568 }
5569 }
5570
5571 /* If we made a change, recompute SRC values. */
5572 if (src != sets[i].src)
5573 {
5574 cse_altered = 1;
5575 do_not_record = 0;
5576 hash_arg_in_memory = 0;
5577 sets[i].src = src;
5578 sets[i].src_hash = HASH (src, mode);
5579 sets[i].src_volatile = do_not_record;
5580 sets[i].src_in_memory = hash_arg_in_memory;
5581 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5582 }
5583
5584 /* If this is a single SET, we are setting a register, and we have an
5585 equivalent constant, we want to add a REG_NOTE. We don't want
5586 to write a REG_EQUAL note for a constant pseudo since verifying that
5587 that pseudo hasn't been eliminated is a pain. Such a note also
5588 won't help anything.
5589
5590 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5591 which can be created for a reference to a compile time computable
5592 entry in a jump table. */
5593
5594 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5595 && GET_CODE (src_const) != REG
5596 && ! (GET_CODE (src_const) == CONST
5597 && GET_CODE (XEXP (src_const, 0)) == MINUS
5598 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5599 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5600 {
5601 /* We only want a REG_EQUAL note if src_const != src. */
5602 if (! rtx_equal_p (src, src_const))
5603 {
5604 /* Make sure that the rtx is not shared. */
5605 src_const = copy_rtx (src_const);
5606
5607 /* Record the actual constant value in a REG_EQUAL note,
5608 making a new one if one does not already exist. */
5609 set_unique_reg_note (insn, REG_EQUAL, src_const);
5610 }
5611 }
5612
5613 /* Now deal with the destination. */
5614 do_not_record = 0;
5615
5616 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5617 to the MEM or REG within it. */
5618 while (GET_CODE (dest) == SIGN_EXTRACT
5619 || GET_CODE (dest) == ZERO_EXTRACT
5620 || GET_CODE (dest) == SUBREG
5621 || GET_CODE (dest) == STRICT_LOW_PART)
5622 dest = XEXP (dest, 0);
5623
5624 sets[i].inner_dest = dest;
5625
5626 if (GET_CODE (dest) == MEM)
5627 {
5628 #ifdef PUSH_ROUNDING
5629 /* Stack pushes invalidate the stack pointer. */
5630 rtx addr = XEXP (dest, 0);
5631 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5632 && XEXP (addr, 0) == stack_pointer_rtx)
5633 invalidate (stack_pointer_rtx, Pmode);
5634 #endif
5635 dest = fold_rtx (dest, insn);
5636 }
5637
5638 /* Compute the hash code of the destination now,
5639 before the effects of this instruction are recorded,
5640 since the register values used in the address computation
5641 are those before this instruction. */
5642 sets[i].dest_hash = HASH (dest, mode);
5643
5644 /* Don't enter a bit-field in the hash table
5645 because the value in it after the store
5646 may not equal what was stored, due to truncation. */
5647
5648 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5649 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5650 {
5651 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5652
5653 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5654 && GET_CODE (width) == CONST_INT
5655 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5656 && ! (INTVAL (src_const)
5657 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5658 /* Exception: if the value is constant,
5659 and it won't be truncated, record it. */
5660 ;
5661 else
5662 {
5663 /* This is chosen so that the destination will be invalidated
5664 but no new value will be recorded.
5665 We must invalidate because sometimes constant
5666 values can be recorded for bitfields. */
5667 sets[i].src_elt = 0;
5668 sets[i].src_volatile = 1;
5669 src_eqv = 0;
5670 src_eqv_elt = 0;
5671 }
5672 }
5673
5674 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5675 the insn. */
5676 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5677 {
5678 /* One less use of the label this insn used to jump to. */
5679 delete_insn (insn);
5680 cse_jumps_altered = 1;
5681 /* No more processing for this set. */
5682 sets[i].rtl = 0;
5683 }
5684
5685 /* If this SET is now setting PC to a label, we know it used to
5686 be a conditional or computed branch. */
5687 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5688 {
5689 /* Now emit a BARRIER after the unconditional jump. */
5690 if (NEXT_INSN (insn) == 0
5691 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5692 emit_barrier_after (insn);
5693
5694 /* We reemit the jump in as many cases as possible just in
5695 case the form of an unconditional jump is significantly
5696 different than a computed jump or conditional jump.
5697
5698 If this insn has multiple sets, then reemitting the
5699 jump is nontrivial. So instead we just force rerecognition
5700 and hope for the best. */
5701 if (n_sets == 1)
5702 {
5703 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5704
5705 JUMP_LABEL (new) = XEXP (src, 0);
5706 LABEL_NUSES (XEXP (src, 0))++;
5707 delete_insn (insn);
5708 insn = new;
5709
5710 /* Now emit a BARRIER after the unconditional jump. */
5711 if (NEXT_INSN (insn) == 0
5712 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5713 emit_barrier_after (insn);
5714 }
5715 else
5716 INSN_CODE (insn) = -1;
5717
5718 never_reached_warning (insn, NULL);
5719
5720 /* Do not bother deleting any unreachable code,
5721 let jump/flow do that. */
5722
5723 cse_jumps_altered = 1;
5724 sets[i].rtl = 0;
5725 }
5726
5727 /* If destination is volatile, invalidate it and then do no further
5728 processing for this assignment. */
5729
5730 else if (do_not_record)
5731 {
5732 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5733 invalidate (dest, VOIDmode);
5734 else if (GET_CODE (dest) == MEM)
5735 {
5736 /* Outgoing arguments for a libcall don't
5737 affect any recorded expressions. */
5738 if (! libcall_insn || insn == libcall_insn)
5739 invalidate (dest, VOIDmode);
5740 }
5741 else if (GET_CODE (dest) == STRICT_LOW_PART
5742 || GET_CODE (dest) == ZERO_EXTRACT)
5743 invalidate (XEXP (dest, 0), GET_MODE (dest));
5744 sets[i].rtl = 0;
5745 }
5746
5747 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5748 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5749
5750 #ifdef HAVE_cc0
5751 /* If setting CC0, record what it was set to, or a constant, if it
5752 is equivalent to a constant. If it is being set to a floating-point
5753 value, make a COMPARE with the appropriate constant of 0. If we
5754 don't do this, later code can interpret this as a test against
5755 const0_rtx, which can cause problems if we try to put it into an
5756 insn as a floating-point operand. */
5757 if (dest == cc0_rtx)
5758 {
5759 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5760 this_insn_cc0_mode = mode;
5761 if (FLOAT_MODE_P (mode))
5762 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5763 CONST0_RTX (mode));
5764 }
5765 #endif
5766 }
5767
5768 /* Now enter all non-volatile source expressions in the hash table
5769 if they are not already present.
5770 Record their equivalence classes in src_elt.
5771 This way we can insert the corresponding destinations into
5772 the same classes even if the actual sources are no longer in them
5773 (having been invalidated). */
5774
5775 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5776 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5777 {
5778 struct table_elt *elt;
5779 struct table_elt *classp = sets[0].src_elt;
5780 rtx dest = SET_DEST (sets[0].rtl);
5781 enum machine_mode eqvmode = GET_MODE (dest);
5782
5783 if (GET_CODE (dest) == STRICT_LOW_PART)
5784 {
5785 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5786 classp = 0;
5787 }
5788 if (insert_regs (src_eqv, classp, 0))
5789 {
5790 rehash_using_reg (src_eqv);
5791 src_eqv_hash = HASH (src_eqv, eqvmode);
5792 }
5793 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5794 elt->in_memory = src_eqv_in_memory;
5795 src_eqv_elt = elt;
5796
5797 /* Check to see if src_eqv_elt is the same as a set source which
5798 does not yet have an elt, and if so set the elt of the set source
5799 to src_eqv_elt. */
5800 for (i = 0; i < n_sets; i++)
5801 if (sets[i].rtl && sets[i].src_elt == 0
5802 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5803 sets[i].src_elt = src_eqv_elt;
5804 }
5805
5806 for (i = 0; i < n_sets; i++)
5807 if (sets[i].rtl && ! sets[i].src_volatile
5808 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5809 {
5810 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5811 {
5812 /* REG_EQUAL in setting a STRICT_LOW_PART
5813 gives an equivalent for the entire destination register,
5814 not just for the subreg being stored in now.
5815 This is a more interesting equivalence, so we arrange later
5816 to treat the entire reg as the destination. */
5817 sets[i].src_elt = src_eqv_elt;
5818 sets[i].src_hash = src_eqv_hash;
5819 }
5820 else
5821 {
5822 /* Insert source and constant equivalent into hash table, if not
5823 already present. */
5824 struct table_elt *classp = src_eqv_elt;
5825 rtx src = sets[i].src;
5826 rtx dest = SET_DEST (sets[i].rtl);
5827 enum machine_mode mode
5828 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5829
5830 /* It's possible that we have a source value known to be
5831 constant but don't have a REG_EQUAL note on the insn.
5832 Lack of a note will mean src_eqv_elt will be NULL. This
5833 can happen where we've generated a SUBREG to access a
5834 CONST_INT that is already in a register in a wider mode.
5835 Ensure that the source expression is put in the proper
5836 constant class. */
5837 if (!classp)
5838 classp = sets[i].src_const_elt;
5839
5840 if (sets[i].src_elt == 0)
5841 {
5842 /* Don't put a hard register source into the table if this is
5843 the last insn of a libcall. In this case, we only need
5844 to put src_eqv_elt in src_elt. */
5845 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5846 {
5847 struct table_elt *elt;
5848
5849 /* Note that these insert_regs calls cannot remove
5850 any of the src_elt's, because they would have failed to
5851 match if not still valid. */
5852 if (insert_regs (src, classp, 0))
5853 {
5854 rehash_using_reg (src);
5855 sets[i].src_hash = HASH (src, mode);
5856 }
5857 elt = insert (src, classp, sets[i].src_hash, mode);
5858 elt->in_memory = sets[i].src_in_memory;
5859 sets[i].src_elt = classp = elt;
5860 }
5861 else
5862 sets[i].src_elt = classp;
5863 }
5864 if (sets[i].src_const && sets[i].src_const_elt == 0
5865 && src != sets[i].src_const
5866 && ! rtx_equal_p (sets[i].src_const, src))
5867 sets[i].src_elt = insert (sets[i].src_const, classp,
5868 sets[i].src_const_hash, mode);
5869 }
5870 }
5871 else if (sets[i].src_elt == 0)
5872 /* If we did not insert the source into the hash table (e.g., it was
5873 volatile), note the equivalence class for the REG_EQUAL value, if any,
5874 so that the destination goes into that class. */
5875 sets[i].src_elt = src_eqv_elt;
5876
5877 invalidate_from_clobbers (x);
5878
5879 /* Some registers are invalidated by subroutine calls. Memory is
5880 invalidated by non-constant calls. */
5881
5882 if (GET_CODE (insn) == CALL_INSN)
5883 {
5884 if (! CONST_OR_PURE_CALL_P (insn))
5885 invalidate_memory ();
5886 invalidate_for_call ();
5887 }
5888
5889 /* Now invalidate everything set by this instruction.
5890 If a SUBREG or other funny destination is being set,
5891 sets[i].rtl is still nonzero, so here we invalidate the reg
5892 a part of which is being set. */
5893
5894 for (i = 0; i < n_sets; i++)
5895 if (sets[i].rtl)
5896 {
5897 /* We can't use the inner dest, because the mode associated with
5898 a ZERO_EXTRACT is significant. */
5899 rtx dest = SET_DEST (sets[i].rtl);
5900
5901 /* Needed for registers to remove the register from its
5902 previous quantity's chain.
5903 Needed for memory if this is a nonvarying address, unless
5904 we have just done an invalidate_memory that covers even those. */
5905 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5906 invalidate (dest, VOIDmode);
5907 else if (GET_CODE (dest) == MEM)
5908 {
5909 /* Outgoing arguments for a libcall don't
5910 affect any recorded expressions. */
5911 if (! libcall_insn || insn == libcall_insn)
5912 invalidate (dest, VOIDmode);
5913 }
5914 else if (GET_CODE (dest) == STRICT_LOW_PART
5915 || GET_CODE (dest) == ZERO_EXTRACT)
5916 invalidate (XEXP (dest, 0), GET_MODE (dest));
5917 }
5918
5919 /* A volatile ASM invalidates everything. */
5920 if (GET_CODE (insn) == INSN
5921 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5922 && MEM_VOLATILE_P (PATTERN (insn)))
5923 flush_hash_table ();
5924
5925 /* Make sure registers mentioned in destinations
5926 are safe for use in an expression to be inserted.
5927 This removes from the hash table
5928 any invalid entry that refers to one of these registers.
5929
5930 We don't care about the return value from mention_regs because
5931 we are going to hash the SET_DEST values unconditionally. */
5932
5933 for (i = 0; i < n_sets; i++)
5934 {
5935 if (sets[i].rtl)
5936 {
5937 rtx x = SET_DEST (sets[i].rtl);
5938
5939 if (GET_CODE (x) != REG)
5940 mention_regs (x);
5941 else
5942 {
5943 /* We used to rely on all references to a register becoming
5944 inaccessible when a register changes to a new quantity,
5945 since that changes the hash code. However, that is not
5946 safe, since after HASH_SIZE new quantities we get a
5947 hash 'collision' of a register with its own invalid
5948 entries. And since SUBREGs have been changed not to
5949 change their hash code with the hash code of the register,
5950 it wouldn't work any longer at all. So we have to check
5951 for any invalid references lying around now.
5952 This code is similar to the REG case in mention_regs,
5953 but it knows that reg_tick has been incremented, and
5954 it leaves reg_in_table as -1 . */
5955 unsigned int regno = REGNO (x);
5956 unsigned int endregno
5957 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5958 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5959 unsigned int i;
5960
5961 for (i = regno; i < endregno; i++)
5962 {
5963 if (REG_IN_TABLE (i) >= 0)
5964 {
5965 remove_invalid_refs (i);
5966 REG_IN_TABLE (i) = -1;
5967 }
5968 }
5969 }
5970 }
5971 }
5972
5973 /* We may have just removed some of the src_elt's from the hash table.
5974 So replace each one with the current head of the same class. */
5975
5976 for (i = 0; i < n_sets; i++)
5977 if (sets[i].rtl)
5978 {
5979 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5980 /* If elt was removed, find current head of same class,
5981 or 0 if nothing remains of that class. */
5982 {
5983 struct table_elt *elt = sets[i].src_elt;
5984
5985 while (elt && elt->prev_same_value)
5986 elt = elt->prev_same_value;
5987
5988 while (elt && elt->first_same_value == 0)
5989 elt = elt->next_same_value;
5990 sets[i].src_elt = elt ? elt->first_same_value : 0;
5991 }
5992 }
5993
5994 /* Now insert the destinations into their equivalence classes. */
5995
5996 for (i = 0; i < n_sets; i++)
5997 if (sets[i].rtl)
5998 {
5999 rtx dest = SET_DEST (sets[i].rtl);
6000 rtx inner_dest = sets[i].inner_dest;
6001 struct table_elt *elt;
6002
6003 /* Don't record value if we are not supposed to risk allocating
6004 floating-point values in registers that might be wider than
6005 memory. */
6006 if ((flag_float_store
6007 && GET_CODE (dest) == MEM
6008 && FLOAT_MODE_P (GET_MODE (dest)))
6009 /* Don't record BLKmode values, because we don't know the
6010 size of it, and can't be sure that other BLKmode values
6011 have the same or smaller size. */
6012 || GET_MODE (dest) == BLKmode
6013 /* Don't record values of destinations set inside a libcall block
6014 since we might delete the libcall. Things should have been set
6015 up so we won't want to reuse such a value, but we play it safe
6016 here. */
6017 || libcall_insn
6018 /* If we didn't put a REG_EQUAL value or a source into the hash
6019 table, there is no point is recording DEST. */
6020 || sets[i].src_elt == 0
6021 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6022 or SIGN_EXTEND, don't record DEST since it can cause
6023 some tracking to be wrong.
6024
6025 ??? Think about this more later. */
6026 || (GET_CODE (dest) == SUBREG
6027 && (GET_MODE_SIZE (GET_MODE (dest))
6028 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6029 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6030 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6031 continue;
6032
6033 /* STRICT_LOW_PART isn't part of the value BEING set,
6034 and neither is the SUBREG inside it.
6035 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6036 if (GET_CODE (dest) == STRICT_LOW_PART)
6037 dest = SUBREG_REG (XEXP (dest, 0));
6038
6039 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6040 /* Registers must also be inserted into chains for quantities. */
6041 if (insert_regs (dest, sets[i].src_elt, 1))
6042 {
6043 /* If `insert_regs' changes something, the hash code must be
6044 recalculated. */
6045 rehash_using_reg (dest);
6046 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6047 }
6048
6049 if (GET_CODE (inner_dest) == MEM
6050 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6051 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6052 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6053 Consider the case in which the address of the MEM is
6054 passed to a function, which alters the MEM. Then, if we
6055 later use Y instead of the MEM we'll miss the update. */
6056 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6057 else
6058 elt = insert (dest, sets[i].src_elt,
6059 sets[i].dest_hash, GET_MODE (dest));
6060
6061 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6062 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6063 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
6064 0))));
6065
6066 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6067 narrower than M2, and both M1 and M2 are the same number of words,
6068 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6069 make that equivalence as well.
6070
6071 However, BAR may have equivalences for which gen_lowpart_if_possible
6072 will produce a simpler value than gen_lowpart_if_possible applied to
6073 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6074 BAR's equivalences. If we don't get a simplified form, make
6075 the SUBREG. It will not be used in an equivalence, but will
6076 cause two similar assignments to be detected.
6077
6078 Note the loop below will find SUBREG_REG (DEST) since we have
6079 already entered SRC and DEST of the SET in the table. */
6080
6081 if (GET_CODE (dest) == SUBREG
6082 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6083 / UNITS_PER_WORD)
6084 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6085 && (GET_MODE_SIZE (GET_MODE (dest))
6086 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6087 && sets[i].src_elt != 0)
6088 {
6089 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6090 struct table_elt *elt, *classp = 0;
6091
6092 for (elt = sets[i].src_elt->first_same_value; elt;
6093 elt = elt->next_same_value)
6094 {
6095 rtx new_src = 0;
6096 unsigned src_hash;
6097 struct table_elt *src_elt;
6098 int byte = 0;
6099
6100 /* Ignore invalid entries. */
6101 if (GET_CODE (elt->exp) != REG
6102 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6103 continue;
6104
6105 /* We may have already been playing subreg games. If the
6106 mode is already correct for the destination, use it. */
6107 if (GET_MODE (elt->exp) == new_mode)
6108 new_src = elt->exp;
6109 else
6110 {
6111 /* Calculate big endian correction for the SUBREG_BYTE.
6112 We have already checked that M1 (GET_MODE (dest))
6113 is not narrower than M2 (new_mode). */
6114 if (BYTES_BIG_ENDIAN)
6115 byte = (GET_MODE_SIZE (GET_MODE (dest))
6116 - GET_MODE_SIZE (new_mode));
6117
6118 new_src = simplify_gen_subreg (new_mode, elt->exp,
6119 GET_MODE (dest), byte);
6120 }
6121
6122 /* The call to simplify_gen_subreg fails if the value
6123 is VOIDmode, yet we can't do any simplification, e.g.
6124 for EXPR_LISTs denoting function call results.
6125 It is invalid to construct a SUBREG with a VOIDmode
6126 SUBREG_REG, hence a zero new_src means we can't do
6127 this substitution. */
6128 if (! new_src)
6129 continue;
6130
6131 src_hash = HASH (new_src, new_mode);
6132 src_elt = lookup (new_src, src_hash, new_mode);
6133
6134 /* Put the new source in the hash table is if isn't
6135 already. */
6136 if (src_elt == 0)
6137 {
6138 if (insert_regs (new_src, classp, 0))
6139 {
6140 rehash_using_reg (new_src);
6141 src_hash = HASH (new_src, new_mode);
6142 }
6143 src_elt = insert (new_src, classp, src_hash, new_mode);
6144 src_elt->in_memory = elt->in_memory;
6145 }
6146 else if (classp && classp != src_elt->first_same_value)
6147 /* Show that two things that we've seen before are
6148 actually the same. */
6149 merge_equiv_classes (src_elt, classp);
6150
6151 classp = src_elt->first_same_value;
6152 /* Ignore invalid entries. */
6153 while (classp
6154 && GET_CODE (classp->exp) != REG
6155 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6156 classp = classp->next_same_value;
6157 }
6158 }
6159 }
6160
6161 /* Special handling for (set REG0 REG1) where REG0 is the
6162 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6163 be used in the sequel, so (if easily done) change this insn to
6164 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6165 that computed their value. Then REG1 will become a dead store
6166 and won't cloud the situation for later optimizations.
6167
6168 Do not make this change if REG1 is a hard register, because it will
6169 then be used in the sequel and we may be changing a two-operand insn
6170 into a three-operand insn.
6171
6172 Also do not do this if we are operating on a copy of INSN.
6173
6174 Also don't do this if INSN ends a libcall; this would cause an unrelated
6175 register to be set in the middle of a libcall, and we then get bad code
6176 if the libcall is deleted. */
6177
6178 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6179 && NEXT_INSN (PREV_INSN (insn)) == insn
6180 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6181 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6182 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6183 {
6184 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6185 struct qty_table_elem *src_ent = &qty_table[src_q];
6186
6187 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6188 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6189 {
6190 rtx prev = insn;
6191 /* Scan for the previous nonnote insn, but stop at a basic
6192 block boundary. */
6193 do
6194 {
6195 prev = PREV_INSN (prev);
6196 }
6197 while (prev && GET_CODE (prev) == NOTE
6198 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6199
6200 /* Do not swap the registers around if the previous instruction
6201 attaches a REG_EQUIV note to REG1.
6202
6203 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6204 from the pseudo that originally shadowed an incoming argument
6205 to another register. Some uses of REG_EQUIV might rely on it
6206 being attached to REG1 rather than REG2.
6207
6208 This section previously turned the REG_EQUIV into a REG_EQUAL
6209 note. We cannot do that because REG_EQUIV may provide an
6210 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6211
6212 if (prev != 0 && GET_CODE (prev) == INSN
6213 && GET_CODE (PATTERN (prev)) == SET
6214 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6215 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6216 {
6217 rtx dest = SET_DEST (sets[0].rtl);
6218 rtx src = SET_SRC (sets[0].rtl);
6219 rtx note;
6220
6221 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6222 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6223 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6224 apply_change_group ();
6225
6226 /* If INSN has a REG_EQUAL note, and this note mentions
6227 REG0, then we must delete it, because the value in
6228 REG0 has changed. If the note's value is REG1, we must
6229 also delete it because that is now this insn's dest. */
6230 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6231 if (note != 0
6232 && (reg_mentioned_p (dest, XEXP (note, 0))
6233 || rtx_equal_p (src, XEXP (note, 0))))
6234 remove_note (insn, note);
6235 }
6236 }
6237 }
6238
6239 /* If this is a conditional jump insn, record any known equivalences due to
6240 the condition being tested. */
6241
6242 last_jump_equiv_class = 0;
6243 if (GET_CODE (insn) == JUMP_INSN
6244 && n_sets == 1 && GET_CODE (x) == SET
6245 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6246 record_jump_equiv (insn, 0);
6247
6248 #ifdef HAVE_cc0
6249 /* If the previous insn set CC0 and this insn no longer references CC0,
6250 delete the previous insn. Here we use the fact that nothing expects CC0
6251 to be valid over an insn, which is true until the final pass. */
6252 if (prev_insn && GET_CODE (prev_insn) == INSN
6253 && (tem = single_set (prev_insn)) != 0
6254 && SET_DEST (tem) == cc0_rtx
6255 && ! reg_mentioned_p (cc0_rtx, x))
6256 delete_insn (prev_insn);
6257
6258 prev_insn_cc0 = this_insn_cc0;
6259 prev_insn_cc0_mode = this_insn_cc0_mode;
6260 prev_insn = insn;
6261 #endif
6262 }
6263 \f
6264 /* Remove from the hash table all expressions that reference memory. */
6265
6266 static void
6267 invalidate_memory (void)
6268 {
6269 int i;
6270 struct table_elt *p, *next;
6271
6272 for (i = 0; i < HASH_SIZE; i++)
6273 for (p = table[i]; p; p = next)
6274 {
6275 next = p->next_same_hash;
6276 if (p->in_memory)
6277 remove_from_table (p, i);
6278 }
6279 }
6280
6281 /* If ADDR is an address that implicitly affects the stack pointer, return
6282 1 and update the register tables to show the effect. Else, return 0. */
6283
6284 static int
6285 addr_affects_sp_p (rtx addr)
6286 {
6287 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6288 && GET_CODE (XEXP (addr, 0)) == REG
6289 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6290 {
6291 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6292 {
6293 REG_TICK (STACK_POINTER_REGNUM)++;
6294 /* Is it possible to use a subreg of SP? */
6295 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6296 }
6297
6298 /* This should be *very* rare. */
6299 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6300 invalidate (stack_pointer_rtx, VOIDmode);
6301
6302 return 1;
6303 }
6304
6305 return 0;
6306 }
6307
6308 /* Perform invalidation on the basis of everything about an insn
6309 except for invalidating the actual places that are SET in it.
6310 This includes the places CLOBBERed, and anything that might
6311 alias with something that is SET or CLOBBERed.
6312
6313 X is the pattern of the insn. */
6314
6315 static void
6316 invalidate_from_clobbers (rtx x)
6317 {
6318 if (GET_CODE (x) == CLOBBER)
6319 {
6320 rtx ref = XEXP (x, 0);
6321 if (ref)
6322 {
6323 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6324 || GET_CODE (ref) == MEM)
6325 invalidate (ref, VOIDmode);
6326 else if (GET_CODE (ref) == STRICT_LOW_PART
6327 || GET_CODE (ref) == ZERO_EXTRACT)
6328 invalidate (XEXP (ref, 0), GET_MODE (ref));
6329 }
6330 }
6331 else if (GET_CODE (x) == PARALLEL)
6332 {
6333 int i;
6334 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6335 {
6336 rtx y = XVECEXP (x, 0, i);
6337 if (GET_CODE (y) == CLOBBER)
6338 {
6339 rtx ref = XEXP (y, 0);
6340 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6341 || GET_CODE (ref) == MEM)
6342 invalidate (ref, VOIDmode);
6343 else if (GET_CODE (ref) == STRICT_LOW_PART
6344 || GET_CODE (ref) == ZERO_EXTRACT)
6345 invalidate (XEXP (ref, 0), GET_MODE (ref));
6346 }
6347 }
6348 }
6349 }
6350 \f
6351 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6352 and replace any registers in them with either an equivalent constant
6353 or the canonical form of the register. If we are inside an address,
6354 only do this if the address remains valid.
6355
6356 OBJECT is 0 except when within a MEM in which case it is the MEM.
6357
6358 Return the replacement for X. */
6359
6360 static rtx
6361 cse_process_notes (rtx x, rtx object)
6362 {
6363 enum rtx_code code = GET_CODE (x);
6364 const char *fmt = GET_RTX_FORMAT (code);
6365 int i;
6366
6367 switch (code)
6368 {
6369 case CONST_INT:
6370 case CONST:
6371 case SYMBOL_REF:
6372 case LABEL_REF:
6373 case CONST_DOUBLE:
6374 case CONST_VECTOR:
6375 case PC:
6376 case CC0:
6377 case LO_SUM:
6378 return x;
6379
6380 case MEM:
6381 validate_change (x, &XEXP (x, 0),
6382 cse_process_notes (XEXP (x, 0), x), 0);
6383 return x;
6384
6385 case EXPR_LIST:
6386 case INSN_LIST:
6387 if (REG_NOTE_KIND (x) == REG_EQUAL)
6388 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6389 if (XEXP (x, 1))
6390 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6391 return x;
6392
6393 case SIGN_EXTEND:
6394 case ZERO_EXTEND:
6395 case SUBREG:
6396 {
6397 rtx new = cse_process_notes (XEXP (x, 0), object);
6398 /* We don't substitute VOIDmode constants into these rtx,
6399 since they would impede folding. */
6400 if (GET_MODE (new) != VOIDmode)
6401 validate_change (object, &XEXP (x, 0), new, 0);
6402 return x;
6403 }
6404
6405 case REG:
6406 i = REG_QTY (REGNO (x));
6407
6408 /* Return a constant or a constant register. */
6409 if (REGNO_QTY_VALID_P (REGNO (x)))
6410 {
6411 struct qty_table_elem *ent = &qty_table[i];
6412
6413 if (ent->const_rtx != NULL_RTX
6414 && (CONSTANT_P (ent->const_rtx)
6415 || GET_CODE (ent->const_rtx) == REG))
6416 {
6417 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6418 if (new)
6419 return new;
6420 }
6421 }
6422
6423 /* Otherwise, canonicalize this register. */
6424 return canon_reg (x, NULL_RTX);
6425
6426 default:
6427 break;
6428 }
6429
6430 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6431 if (fmt[i] == 'e')
6432 validate_change (object, &XEXP (x, i),
6433 cse_process_notes (XEXP (x, i), object), 0);
6434
6435 return x;
6436 }
6437 \f
6438 /* Find common subexpressions between the end test of a loop and the beginning
6439 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6440
6441 Often we have a loop where an expression in the exit test is used
6442 in the body of the loop. For example "while (*p) *q++ = *p++;".
6443 Because of the way we duplicate the loop exit test in front of the loop,
6444 however, we don't detect that common subexpression. This will be caught
6445 when global cse is implemented, but this is a quite common case.
6446
6447 This function handles the most common cases of these common expressions.
6448 It is called after we have processed the basic block ending with the
6449 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6450 jumps to a label used only once. */
6451
6452 static void
6453 cse_around_loop (rtx loop_start)
6454 {
6455 rtx insn;
6456 int i;
6457 struct table_elt *p;
6458
6459 /* If the jump at the end of the loop doesn't go to the start, we don't
6460 do anything. */
6461 for (insn = PREV_INSN (loop_start);
6462 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6463 insn = PREV_INSN (insn))
6464 ;
6465
6466 if (insn == 0
6467 || GET_CODE (insn) != NOTE
6468 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6469 return;
6470
6471 /* If the last insn of the loop (the end test) was an NE comparison,
6472 we will interpret it as an EQ comparison, since we fell through
6473 the loop. Any equivalences resulting from that comparison are
6474 therefore not valid and must be invalidated. */
6475 if (last_jump_equiv_class)
6476 for (p = last_jump_equiv_class->first_same_value; p;
6477 p = p->next_same_value)
6478 {
6479 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6480 || (GET_CODE (p->exp) == SUBREG
6481 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6482 invalidate (p->exp, VOIDmode);
6483 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6484 || GET_CODE (p->exp) == ZERO_EXTRACT)
6485 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6486 }
6487
6488 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6489 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6490
6491 The only thing we do with SET_DEST is invalidate entries, so we
6492 can safely process each SET in order. It is slightly less efficient
6493 to do so, but we only want to handle the most common cases.
6494
6495 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6496 These pseudos won't have valid entries in any of the tables indexed
6497 by register number, such as reg_qty. We avoid out-of-range array
6498 accesses by not processing any instructions created after cse started. */
6499
6500 for (insn = NEXT_INSN (loop_start);
6501 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6502 && INSN_UID (insn) < max_insn_uid
6503 && ! (GET_CODE (insn) == NOTE
6504 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6505 insn = NEXT_INSN (insn))
6506 {
6507 if (INSN_P (insn)
6508 && (GET_CODE (PATTERN (insn)) == SET
6509 || GET_CODE (PATTERN (insn)) == CLOBBER))
6510 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6511 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6512 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6513 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6514 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6515 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6516 loop_start);
6517 }
6518 }
6519 \f
6520 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6521 since they are done elsewhere. This function is called via note_stores. */
6522
6523 static void
6524 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6525 {
6526 enum rtx_code code = GET_CODE (dest);
6527
6528 if (code == MEM
6529 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6530 /* There are times when an address can appear varying and be a PLUS
6531 during this scan when it would be a fixed address were we to know
6532 the proper equivalences. So invalidate all memory if there is
6533 a BLKmode or nonscalar memory reference or a reference to a
6534 variable address. */
6535 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6536 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6537 {
6538 invalidate_memory ();
6539 return;
6540 }
6541
6542 if (GET_CODE (set) == CLOBBER
6543 || CC0_P (dest)
6544 || dest == pc_rtx)
6545 return;
6546
6547 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6548 invalidate (XEXP (dest, 0), GET_MODE (dest));
6549 else if (code == REG || code == SUBREG || code == MEM)
6550 invalidate (dest, VOIDmode);
6551 }
6552
6553 /* Invalidate all insns from START up to the end of the function or the
6554 next label. This called when we wish to CSE around a block that is
6555 conditionally executed. */
6556
6557 static void
6558 invalidate_skipped_block (rtx start)
6559 {
6560 rtx insn;
6561
6562 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6563 insn = NEXT_INSN (insn))
6564 {
6565 if (! INSN_P (insn))
6566 continue;
6567
6568 if (GET_CODE (insn) == CALL_INSN)
6569 {
6570 if (! CONST_OR_PURE_CALL_P (insn))
6571 invalidate_memory ();
6572 invalidate_for_call ();
6573 }
6574
6575 invalidate_from_clobbers (PATTERN (insn));
6576 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6577 }
6578 }
6579 \f
6580 /* If modifying X will modify the value in *DATA (which is really an
6581 `rtx *'), indicate that fact by setting the pointed to value to
6582 NULL_RTX. */
6583
6584 static void
6585 cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
6586 {
6587 rtx *cse_check_loop_start_value = (rtx *) data;
6588
6589 if (*cse_check_loop_start_value == NULL_RTX
6590 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6591 return;
6592
6593 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6594 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6595 *cse_check_loop_start_value = NULL_RTX;
6596 }
6597
6598 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6599 a loop that starts with the label at LOOP_START.
6600
6601 If X is a SET, we see if its SET_SRC is currently in our hash table.
6602 If so, we see if it has a value equal to some register used only in the
6603 loop exit code (as marked by jump.c).
6604
6605 If those two conditions are true, we search backwards from the start of
6606 the loop to see if that same value was loaded into a register that still
6607 retains its value at the start of the loop.
6608
6609 If so, we insert an insn after the load to copy the destination of that
6610 load into the equivalent register and (try to) replace our SET_SRC with that
6611 register.
6612
6613 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6614
6615 static void
6616 cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
6617 {
6618 struct table_elt *src_elt;
6619
6620 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6621 are setting PC or CC0 or whose SET_SRC is already a register. */
6622 if (GET_CODE (x) == SET
6623 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6624 && GET_CODE (SET_SRC (x)) != REG)
6625 {
6626 src_elt = lookup (SET_SRC (x),
6627 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6628 GET_MODE (SET_DEST (x)));
6629
6630 if (src_elt)
6631 for (src_elt = src_elt->first_same_value; src_elt;
6632 src_elt = src_elt->next_same_value)
6633 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6634 && COST (src_elt->exp) < COST (SET_SRC (x)))
6635 {
6636 rtx p, set;
6637
6638 /* Look for an insn in front of LOOP_START that sets
6639 something in the desired mode to SET_SRC (x) before we hit
6640 a label or CALL_INSN. */
6641
6642 for (p = prev_nonnote_insn (loop_start);
6643 p && GET_CODE (p) != CALL_INSN
6644 && GET_CODE (p) != CODE_LABEL;
6645 p = prev_nonnote_insn (p))
6646 if ((set = single_set (p)) != 0
6647 && GET_CODE (SET_DEST (set)) == REG
6648 && GET_MODE (SET_DEST (set)) == src_elt->mode
6649 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6650 {
6651 /* We now have to ensure that nothing between P
6652 and LOOP_START modified anything referenced in
6653 SET_SRC (x). We know that nothing within the loop
6654 can modify it, or we would have invalidated it in
6655 the hash table. */
6656 rtx q;
6657 rtx cse_check_loop_start_value = SET_SRC (x);
6658 for (q = p; q != loop_start; q = NEXT_INSN (q))
6659 if (INSN_P (q))
6660 note_stores (PATTERN (q),
6661 cse_check_loop_start,
6662 &cse_check_loop_start_value);
6663
6664 /* If nothing was changed and we can replace our
6665 SET_SRC, add an insn after P to copy its destination
6666 to what we will be replacing SET_SRC with. */
6667 if (cse_check_loop_start_value
6668 && single_set (p)
6669 && !can_throw_internal (insn)
6670 && validate_change (insn, &SET_SRC (x),
6671 src_elt->exp, 0))
6672 {
6673 /* If this creates new pseudos, this is unsafe,
6674 because the regno of new pseudo is unsuitable
6675 to index into reg_qty when cse_insn processes
6676 the new insn. Therefore, if a new pseudo was
6677 created, discard this optimization. */
6678 int nregs = max_reg_num ();
6679 rtx move
6680 = gen_move_insn (src_elt->exp, SET_DEST (set));
6681 if (nregs != max_reg_num ())
6682 {
6683 if (! validate_change (insn, &SET_SRC (x),
6684 SET_SRC (set), 0))
6685 abort ();
6686 }
6687 else
6688 {
6689 if (CONSTANT_P (SET_SRC (set))
6690 && ! find_reg_equal_equiv_note (insn))
6691 set_unique_reg_note (insn, REG_EQUAL,
6692 SET_SRC (set));
6693 if (control_flow_insn_p (p))
6694 /* p can cause a control flow transfer so it
6695 is the last insn of a basic block. We can't
6696 therefore use emit_insn_after. */
6697 emit_insn_before (move, next_nonnote_insn (p));
6698 else
6699 emit_insn_after (move, p);
6700 }
6701 }
6702 break;
6703 }
6704 }
6705 }
6706
6707 /* Deal with the destination of X affecting the stack pointer. */
6708 addr_affects_sp_p (SET_DEST (x));
6709
6710 /* See comment on similar code in cse_insn for explanation of these
6711 tests. */
6712 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6713 || GET_CODE (SET_DEST (x)) == MEM)
6714 invalidate (SET_DEST (x), VOIDmode);
6715 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6716 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6717 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6718 }
6719 \f
6720 /* Find the end of INSN's basic block and return its range,
6721 the total number of SETs in all the insns of the block, the last insn of the
6722 block, and the branch path.
6723
6724 The branch path indicates which branches should be followed. If a nonzero
6725 path size is specified, the block should be rescanned and a different set
6726 of branches will be taken. The branch path is only used if
6727 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6728
6729 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6730 used to describe the block. It is filled in with the information about
6731 the current block. The incoming structure's branch path, if any, is used
6732 to construct the output branch path. */
6733
6734 void
6735 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6736 int follow_jumps, int after_loop, int skip_blocks)
6737 {
6738 rtx p = insn, q;
6739 int nsets = 0;
6740 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6741 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6742 int path_size = data->path_size;
6743 int path_entry = 0;
6744 int i;
6745
6746 /* Update the previous branch path, if any. If the last branch was
6747 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6748 shorten the path by one and look at the previous branch. We know that
6749 at least one branch must have been taken if PATH_SIZE is nonzero. */
6750 while (path_size > 0)
6751 {
6752 if (data->path[path_size - 1].status != NOT_TAKEN)
6753 {
6754 data->path[path_size - 1].status = NOT_TAKEN;
6755 break;
6756 }
6757 else
6758 path_size--;
6759 }
6760
6761 /* If the first instruction is marked with QImode, that means we've
6762 already processed this block. Our caller will look at DATA->LAST
6763 to figure out where to go next. We want to return the next block
6764 in the instruction stream, not some branched-to block somewhere
6765 else. We accomplish this by pretending our called forbid us to
6766 follow jumps, or skip blocks. */
6767 if (GET_MODE (insn) == QImode)
6768 follow_jumps = skip_blocks = 0;
6769
6770 /* Scan to end of this basic block. */
6771 while (p && GET_CODE (p) != CODE_LABEL)
6772 {
6773 /* Don't cse out the end of a loop. This makes a difference
6774 only for the unusual loops that always execute at least once;
6775 all other loops have labels there so we will stop in any case.
6776 Cse'ing out the end of the loop is dangerous because it
6777 might cause an invariant expression inside the loop
6778 to be reused after the end of the loop. This would make it
6779 hard to move the expression out of the loop in loop.c,
6780 especially if it is one of several equivalent expressions
6781 and loop.c would like to eliminate it.
6782
6783 If we are running after loop.c has finished, we can ignore
6784 the NOTE_INSN_LOOP_END. */
6785
6786 if (! after_loop && GET_CODE (p) == NOTE
6787 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6788 break;
6789
6790 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6791 the regs restored by the longjmp come from
6792 a later time than the setjmp. */
6793 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6794 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6795 break;
6796
6797 /* A PARALLEL can have lots of SETs in it,
6798 especially if it is really an ASM_OPERANDS. */
6799 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6800 nsets += XVECLEN (PATTERN (p), 0);
6801 else if (GET_CODE (p) != NOTE)
6802 nsets += 1;
6803
6804 /* Ignore insns made by CSE; they cannot affect the boundaries of
6805 the basic block. */
6806
6807 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6808 high_cuid = INSN_CUID (p);
6809 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6810 low_cuid = INSN_CUID (p);
6811
6812 /* See if this insn is in our branch path. If it is and we are to
6813 take it, do so. */
6814 if (path_entry < path_size && data->path[path_entry].branch == p)
6815 {
6816 if (data->path[path_entry].status != NOT_TAKEN)
6817 p = JUMP_LABEL (p);
6818
6819 /* Point to next entry in path, if any. */
6820 path_entry++;
6821 }
6822
6823 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6824 was specified, we haven't reached our maximum path length, there are
6825 insns following the target of the jump, this is the only use of the
6826 jump label, and the target label is preceded by a BARRIER.
6827
6828 Alternatively, we can follow the jump if it branches around a
6829 block of code and there are no other branches into the block.
6830 In this case invalidate_skipped_block will be called to invalidate any
6831 registers set in the block when following the jump. */
6832
6833 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6834 && GET_CODE (p) == JUMP_INSN
6835 && GET_CODE (PATTERN (p)) == SET
6836 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6837 && JUMP_LABEL (p) != 0
6838 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6839 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6840 {
6841 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6842 if ((GET_CODE (q) != NOTE
6843 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6844 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6845 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6846 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6847 break;
6848
6849 /* If we ran into a BARRIER, this code is an extension of the
6850 basic block when the branch is taken. */
6851 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6852 {
6853 /* Don't allow ourself to keep walking around an
6854 always-executed loop. */
6855 if (next_real_insn (q) == next)
6856 {
6857 p = NEXT_INSN (p);
6858 continue;
6859 }
6860
6861 /* Similarly, don't put a branch in our path more than once. */
6862 for (i = 0; i < path_entry; i++)
6863 if (data->path[i].branch == p)
6864 break;
6865
6866 if (i != path_entry)
6867 break;
6868
6869 data->path[path_entry].branch = p;
6870 data->path[path_entry++].status = TAKEN;
6871
6872 /* This branch now ends our path. It was possible that we
6873 didn't see this branch the last time around (when the
6874 insn in front of the target was a JUMP_INSN that was
6875 turned into a no-op). */
6876 path_size = path_entry;
6877
6878 p = JUMP_LABEL (p);
6879 /* Mark block so we won't scan it again later. */
6880 PUT_MODE (NEXT_INSN (p), QImode);
6881 }
6882 /* Detect a branch around a block of code. */
6883 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6884 {
6885 rtx tmp;
6886
6887 if (next_real_insn (q) == next)
6888 {
6889 p = NEXT_INSN (p);
6890 continue;
6891 }
6892
6893 for (i = 0; i < path_entry; i++)
6894 if (data->path[i].branch == p)
6895 break;
6896
6897 if (i != path_entry)
6898 break;
6899
6900 /* This is no_labels_between_p (p, q) with an added check for
6901 reaching the end of a function (in case Q precedes P). */
6902 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6903 if (GET_CODE (tmp) == CODE_LABEL)
6904 break;
6905
6906 if (tmp == q)
6907 {
6908 data->path[path_entry].branch = p;
6909 data->path[path_entry++].status = AROUND;
6910
6911 path_size = path_entry;
6912
6913 p = JUMP_LABEL (p);
6914 /* Mark block so we won't scan it again later. */
6915 PUT_MODE (NEXT_INSN (p), QImode);
6916 }
6917 }
6918 }
6919 p = NEXT_INSN (p);
6920 }
6921
6922 data->low_cuid = low_cuid;
6923 data->high_cuid = high_cuid;
6924 data->nsets = nsets;
6925 data->last = p;
6926
6927 /* If all jumps in the path are not taken, set our path length to zero
6928 so a rescan won't be done. */
6929 for (i = path_size - 1; i >= 0; i--)
6930 if (data->path[i].status != NOT_TAKEN)
6931 break;
6932
6933 if (i == -1)
6934 data->path_size = 0;
6935 else
6936 data->path_size = path_size;
6937
6938 /* End the current branch path. */
6939 data->path[path_size].branch = 0;
6940 }
6941 \f
6942 /* Perform cse on the instructions of a function.
6943 F is the first instruction.
6944 NREGS is one plus the highest pseudo-reg number used in the instruction.
6945
6946 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6947 (only if -frerun-cse-after-loop).
6948
6949 Returns 1 if jump_optimize should be redone due to simplifications
6950 in conditional jump instructions. */
6951
6952 int
6953 cse_main (rtx f, int nregs, int after_loop, FILE *file)
6954 {
6955 struct cse_basic_block_data val;
6956 rtx insn = f;
6957 int i;
6958
6959 val.path = xmalloc (sizeof (struct branch_path)
6960 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6961
6962 cse_jumps_altered = 0;
6963 recorded_label_ref = 0;
6964 constant_pool_entries_cost = 0;
6965 constant_pool_entries_regcost = 0;
6966 val.path_size = 0;
6967
6968 init_recog ();
6969 init_alias_analysis ();
6970
6971 max_reg = nregs;
6972
6973 max_insn_uid = get_max_uid ();
6974
6975 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6976
6977 #ifdef LOAD_EXTEND_OP
6978
6979 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6980 and change the code and mode as appropriate. */
6981 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6982 #endif
6983
6984 /* Reset the counter indicating how many elements have been made
6985 thus far. */
6986 n_elements_made = 0;
6987
6988 /* Find the largest uid. */
6989
6990 max_uid = get_max_uid ();
6991 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6992
6993 /* Compute the mapping from uids to cuids.
6994 CUIDs are numbers assigned to insns, like uids,
6995 except that cuids increase monotonically through the code.
6996 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6997 between two insns is not affected by -g. */
6998
6999 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7000 {
7001 if (GET_CODE (insn) != NOTE
7002 || NOTE_LINE_NUMBER (insn) < 0)
7003 INSN_CUID (insn) = ++i;
7004 else
7005 /* Give a line number note the same cuid as preceding insn. */
7006 INSN_CUID (insn) = i;
7007 }
7008
7009 ggc_push_context ();
7010
7011 /* Loop over basic blocks.
7012 Compute the maximum number of qty's needed for each basic block
7013 (which is 2 for each SET). */
7014 insn = f;
7015 while (insn)
7016 {
7017 cse_altered = 0;
7018 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7019 flag_cse_skip_blocks);
7020
7021 /* If this basic block was already processed or has no sets, skip it. */
7022 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7023 {
7024 PUT_MODE (insn, VOIDmode);
7025 insn = (val.last ? NEXT_INSN (val.last) : 0);
7026 val.path_size = 0;
7027 continue;
7028 }
7029
7030 cse_basic_block_start = val.low_cuid;
7031 cse_basic_block_end = val.high_cuid;
7032 max_qty = val.nsets * 2;
7033
7034 if (file)
7035 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7036 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7037 val.nsets);
7038
7039 /* Make MAX_QTY bigger to give us room to optimize
7040 past the end of this basic block, if that should prove useful. */
7041 if (max_qty < 500)
7042 max_qty = 500;
7043
7044 max_qty += max_reg;
7045
7046 /* If this basic block is being extended by following certain jumps,
7047 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7048 Otherwise, we start after this basic block. */
7049 if (val.path_size > 0)
7050 cse_basic_block (insn, val.last, val.path, 0);
7051 else
7052 {
7053 int old_cse_jumps_altered = cse_jumps_altered;
7054 rtx temp;
7055
7056 /* When cse changes a conditional jump to an unconditional
7057 jump, we want to reprocess the block, since it will give
7058 us a new branch path to investigate. */
7059 cse_jumps_altered = 0;
7060 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7061 if (cse_jumps_altered == 0
7062 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7063 insn = temp;
7064
7065 cse_jumps_altered |= old_cse_jumps_altered;
7066 }
7067
7068 if (cse_altered)
7069 ggc_collect ();
7070
7071 #ifdef USE_C_ALLOCA
7072 alloca (0);
7073 #endif
7074 }
7075
7076 ggc_pop_context ();
7077
7078 if (max_elements_made < n_elements_made)
7079 max_elements_made = n_elements_made;
7080
7081 /* Clean up. */
7082 end_alias_analysis ();
7083 free (uid_cuid);
7084 free (reg_eqv_table);
7085 free (val.path);
7086
7087 return cse_jumps_altered || recorded_label_ref;
7088 }
7089
7090 /* Process a single basic block. FROM and TO and the limits of the basic
7091 block. NEXT_BRANCH points to the branch path when following jumps or
7092 a null path when not following jumps.
7093
7094 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7095 loop. This is true when we are being called for the last time on a
7096 block and this CSE pass is before loop.c. */
7097
7098 static rtx
7099 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7100 int around_loop)
7101 {
7102 rtx insn;
7103 int to_usage = 0;
7104 rtx libcall_insn = NULL_RTX;
7105 int num_insns = 0;
7106
7107 /* This array is undefined before max_reg, so only allocate
7108 the space actually needed and adjust the start. */
7109
7110 qty_table = xmalloc ((max_qty - max_reg) * sizeof (struct qty_table_elem));
7111 qty_table -= max_reg;
7112
7113 new_basic_block ();
7114
7115 /* TO might be a label. If so, protect it from being deleted. */
7116 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7117 ++LABEL_NUSES (to);
7118
7119 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7120 {
7121 enum rtx_code code = GET_CODE (insn);
7122
7123 /* If we have processed 1,000 insns, flush the hash table to
7124 avoid extreme quadratic behavior. We must not include NOTEs
7125 in the count since there may be more of them when generating
7126 debugging information. If we clear the table at different
7127 times, code generated with -g -O might be different than code
7128 generated with -O but not -g.
7129
7130 ??? This is a real kludge and needs to be done some other way.
7131 Perhaps for 2.9. */
7132 if (code != NOTE && num_insns++ > 1000)
7133 {
7134 flush_hash_table ();
7135 num_insns = 0;
7136 }
7137
7138 /* See if this is a branch that is part of the path. If so, and it is
7139 to be taken, do so. */
7140 if (next_branch->branch == insn)
7141 {
7142 enum taken status = next_branch++->status;
7143 if (status != NOT_TAKEN)
7144 {
7145 if (status == TAKEN)
7146 record_jump_equiv (insn, 1);
7147 else
7148 invalidate_skipped_block (NEXT_INSN (insn));
7149
7150 /* Set the last insn as the jump insn; it doesn't affect cc0.
7151 Then follow this branch. */
7152 #ifdef HAVE_cc0
7153 prev_insn_cc0 = 0;
7154 prev_insn = insn;
7155 #endif
7156 insn = JUMP_LABEL (insn);
7157 continue;
7158 }
7159 }
7160
7161 if (GET_MODE (insn) == QImode)
7162 PUT_MODE (insn, VOIDmode);
7163
7164 if (GET_RTX_CLASS (code) == 'i')
7165 {
7166 rtx p;
7167
7168 /* Process notes first so we have all notes in canonical forms when
7169 looking for duplicate operations. */
7170
7171 if (REG_NOTES (insn))
7172 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7173
7174 /* Track when we are inside in LIBCALL block. Inside such a block,
7175 we do not want to record destinations. The last insn of a
7176 LIBCALL block is not considered to be part of the block, since
7177 its destination is the result of the block and hence should be
7178 recorded. */
7179
7180 if (REG_NOTES (insn) != 0)
7181 {
7182 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7183 libcall_insn = XEXP (p, 0);
7184 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7185 libcall_insn = 0;
7186 }
7187
7188 cse_insn (insn, libcall_insn);
7189
7190 /* If we haven't already found an insn where we added a LABEL_REF,
7191 check this one. */
7192 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7193 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7194 (void *) insn))
7195 recorded_label_ref = 1;
7196 }
7197
7198 /* If INSN is now an unconditional jump, skip to the end of our
7199 basic block by pretending that we just did the last insn in the
7200 basic block. If we are jumping to the end of our block, show
7201 that we can have one usage of TO. */
7202
7203 if (any_uncondjump_p (insn))
7204 {
7205 if (to == 0)
7206 {
7207 free (qty_table + max_reg);
7208 return 0;
7209 }
7210
7211 if (JUMP_LABEL (insn) == to)
7212 to_usage = 1;
7213
7214 /* Maybe TO was deleted because the jump is unconditional.
7215 If so, there is nothing left in this basic block. */
7216 /* ??? Perhaps it would be smarter to set TO
7217 to whatever follows this insn,
7218 and pretend the basic block had always ended here. */
7219 if (INSN_DELETED_P (to))
7220 break;
7221
7222 insn = PREV_INSN (to);
7223 }
7224
7225 /* See if it is ok to keep on going past the label
7226 which used to end our basic block. Remember that we incremented
7227 the count of that label, so we decrement it here. If we made
7228 a jump unconditional, TO_USAGE will be one; in that case, we don't
7229 want to count the use in that jump. */
7230
7231 if (to != 0 && NEXT_INSN (insn) == to
7232 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7233 {
7234 struct cse_basic_block_data val;
7235 rtx prev;
7236
7237 insn = NEXT_INSN (to);
7238
7239 /* If TO was the last insn in the function, we are done. */
7240 if (insn == 0)
7241 {
7242 free (qty_table + max_reg);
7243 return 0;
7244 }
7245
7246 /* If TO was preceded by a BARRIER we are done with this block
7247 because it has no continuation. */
7248 prev = prev_nonnote_insn (to);
7249 if (prev && GET_CODE (prev) == BARRIER)
7250 {
7251 free (qty_table + max_reg);
7252 return insn;
7253 }
7254
7255 /* Find the end of the following block. Note that we won't be
7256 following branches in this case. */
7257 to_usage = 0;
7258 val.path_size = 0;
7259 val.path = xmalloc (sizeof (struct branch_path)
7260 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7261 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7262 free (val.path);
7263
7264 /* If the tables we allocated have enough space left
7265 to handle all the SETs in the next basic block,
7266 continue through it. Otherwise, return,
7267 and that block will be scanned individually. */
7268 if (val.nsets * 2 + next_qty > max_qty)
7269 break;
7270
7271 cse_basic_block_start = val.low_cuid;
7272 cse_basic_block_end = val.high_cuid;
7273 to = val.last;
7274
7275 /* Prevent TO from being deleted if it is a label. */
7276 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7277 ++LABEL_NUSES (to);
7278
7279 /* Back up so we process the first insn in the extension. */
7280 insn = PREV_INSN (insn);
7281 }
7282 }
7283
7284 if (next_qty > max_qty)
7285 abort ();
7286
7287 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7288 the previous insn is the only insn that branches to the head of a loop,
7289 we can cse into the loop. Don't do this if we changed the jump
7290 structure of a loop unless we aren't going to be following jumps. */
7291
7292 insn = prev_nonnote_insn (to);
7293 if ((cse_jumps_altered == 0
7294 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7295 && around_loop && to != 0
7296 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7297 && GET_CODE (insn) == JUMP_INSN
7298 && JUMP_LABEL (insn) != 0
7299 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7300 cse_around_loop (JUMP_LABEL (insn));
7301
7302 free (qty_table + max_reg);
7303
7304 return to ? NEXT_INSN (to) : 0;
7305 }
7306 \f
7307 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7308 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7309
7310 static int
7311 check_for_label_ref (rtx *rtl, void *data)
7312 {
7313 rtx insn = (rtx) data;
7314
7315 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7316 we must rerun jump since it needs to place the note. If this is a
7317 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7318 since no REG_LABEL will be added. */
7319 return (GET_CODE (*rtl) == LABEL_REF
7320 && ! LABEL_REF_NONLOCAL_P (*rtl)
7321 && LABEL_P (XEXP (*rtl, 0))
7322 && INSN_UID (XEXP (*rtl, 0)) != 0
7323 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7324 }
7325 \f
7326 /* Count the number of times registers are used (not set) in X.
7327 COUNTS is an array in which we accumulate the count, INCR is how much
7328 we count each register usage. */
7329
7330 static void
7331 count_reg_usage (rtx x, int *counts, int incr)
7332 {
7333 enum rtx_code code;
7334 rtx note;
7335 const char *fmt;
7336 int i, j;
7337
7338 if (x == 0)
7339 return;
7340
7341 switch (code = GET_CODE (x))
7342 {
7343 case REG:
7344 counts[REGNO (x)] += incr;
7345 return;
7346
7347 case PC:
7348 case CC0:
7349 case CONST:
7350 case CONST_INT:
7351 case CONST_DOUBLE:
7352 case CONST_VECTOR:
7353 case SYMBOL_REF:
7354 case LABEL_REF:
7355 return;
7356
7357 case CLOBBER:
7358 /* If we are clobbering a MEM, mark any registers inside the address
7359 as being used. */
7360 if (GET_CODE (XEXP (x, 0)) == MEM)
7361 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7362 return;
7363
7364 case SET:
7365 /* Unless we are setting a REG, count everything in SET_DEST. */
7366 if (GET_CODE (SET_DEST (x)) != REG)
7367 count_reg_usage (SET_DEST (x), counts, incr);
7368 count_reg_usage (SET_SRC (x), counts, incr);
7369 return;
7370
7371 case CALL_INSN:
7372 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7373 /* Fall through. */
7374
7375 case INSN:
7376 case JUMP_INSN:
7377 count_reg_usage (PATTERN (x), counts, incr);
7378
7379 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7380 use them. */
7381
7382 note = find_reg_equal_equiv_note (x);
7383 if (note)
7384 {
7385 rtx eqv = XEXP (note, 0);
7386
7387 if (GET_CODE (eqv) == EXPR_LIST)
7388 /* This REG_EQUAL note describes the result of a function call.
7389 Process all the arguments. */
7390 do
7391 {
7392 count_reg_usage (XEXP (eqv, 0), counts, incr);
7393 eqv = XEXP (eqv, 1);
7394 }
7395 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7396 else
7397 count_reg_usage (eqv, counts, incr);
7398 }
7399 return;
7400
7401 case EXPR_LIST:
7402 if (REG_NOTE_KIND (x) == REG_EQUAL
7403 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7404 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7405 involving registers in the address. */
7406 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7407 count_reg_usage (XEXP (x, 0), counts, incr);
7408
7409 count_reg_usage (XEXP (x, 1), counts, incr);
7410 return;
7411
7412 case ASM_OPERANDS:
7413 /* Iterate over just the inputs, not the constraints as well. */
7414 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7415 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7416 return;
7417
7418 case INSN_LIST:
7419 abort ();
7420
7421 default:
7422 break;
7423 }
7424
7425 fmt = GET_RTX_FORMAT (code);
7426 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7427 {
7428 if (fmt[i] == 'e')
7429 count_reg_usage (XEXP (x, i), counts, incr);
7430 else if (fmt[i] == 'E')
7431 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7432 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7433 }
7434 }
7435 \f
7436 /* Return true if set is live. */
7437 static bool
7438 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7439 int *counts)
7440 {
7441 #ifdef HAVE_cc0
7442 rtx tem;
7443 #endif
7444
7445 if (set_noop_p (set))
7446 ;
7447
7448 #ifdef HAVE_cc0
7449 else if (GET_CODE (SET_DEST (set)) == CC0
7450 && !side_effects_p (SET_SRC (set))
7451 && ((tem = next_nonnote_insn (insn)) == 0
7452 || !INSN_P (tem)
7453 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7454 return false;
7455 #endif
7456 else if (GET_CODE (SET_DEST (set)) != REG
7457 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7458 || counts[REGNO (SET_DEST (set))] != 0
7459 || side_effects_p (SET_SRC (set))
7460 /* An ADDRESSOF expression can turn into a use of the
7461 internal arg pointer, so always consider the
7462 internal arg pointer live. If it is truly dead,
7463 flow will delete the initializing insn. */
7464 || (SET_DEST (set) == current_function_internal_arg_pointer))
7465 return true;
7466 return false;
7467 }
7468
7469 /* Return true if insn is live. */
7470
7471 static bool
7472 insn_live_p (rtx insn, int *counts)
7473 {
7474 int i;
7475 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7476 return true;
7477 else if (GET_CODE (PATTERN (insn)) == SET)
7478 return set_live_p (PATTERN (insn), insn, counts);
7479 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7480 {
7481 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7482 {
7483 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7484
7485 if (GET_CODE (elt) == SET)
7486 {
7487 if (set_live_p (elt, insn, counts))
7488 return true;
7489 }
7490 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7491 return true;
7492 }
7493 return false;
7494 }
7495 else
7496 return true;
7497 }
7498
7499 /* Return true if libcall is dead as a whole. */
7500
7501 static bool
7502 dead_libcall_p (rtx insn, int *counts)
7503 {
7504 rtx note, set, new;
7505
7506 /* See if there's a REG_EQUAL note on this insn and try to
7507 replace the source with the REG_EQUAL expression.
7508
7509 We assume that insns with REG_RETVALs can only be reg->reg
7510 copies at this point. */
7511 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7512 if (!note)
7513 return false;
7514
7515 set = single_set (insn);
7516 if (!set)
7517 return false;
7518
7519 new = simplify_rtx (XEXP (note, 0));
7520 if (!new)
7521 new = XEXP (note, 0);
7522
7523 /* While changing insn, we must update the counts accordingly. */
7524 count_reg_usage (insn, counts, -1);
7525
7526 if (validate_change (insn, &SET_SRC (set), new, 0))
7527 {
7528 count_reg_usage (insn, counts, 1);
7529 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7530 remove_note (insn, note);
7531 return true;
7532 }
7533
7534 if (CONSTANT_P (new))
7535 {
7536 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7537 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7538 {
7539 count_reg_usage (insn, counts, 1);
7540 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7541 remove_note (insn, note);
7542 return true;
7543 }
7544 }
7545
7546 count_reg_usage (insn, counts, 1);
7547 return false;
7548 }
7549
7550 /* Scan all the insns and delete any that are dead; i.e., they store a register
7551 that is never used or they copy a register to itself.
7552
7553 This is used to remove insns made obviously dead by cse, loop or other
7554 optimizations. It improves the heuristics in loop since it won't try to
7555 move dead invariants out of loops or make givs for dead quantities. The
7556 remaining passes of the compilation are also sped up. */
7557
7558 int
7559 delete_trivially_dead_insns (rtx insns, int nreg)
7560 {
7561 int *counts;
7562 rtx insn, prev;
7563 int in_libcall = 0, dead_libcall = 0;
7564 int ndead = 0, nlastdead, niterations = 0;
7565
7566 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7567 /* First count the number of times each register is used. */
7568 counts = xcalloc (nreg, sizeof (int));
7569 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7570 count_reg_usage (insn, counts, 1);
7571
7572 do
7573 {
7574 nlastdead = ndead;
7575 niterations++;
7576 /* Go from the last insn to the first and delete insns that only set unused
7577 registers or copy a register to itself. As we delete an insn, remove
7578 usage counts for registers it uses.
7579
7580 The first jump optimization pass may leave a real insn as the last
7581 insn in the function. We must not skip that insn or we may end
7582 up deleting code that is not really dead. */
7583 insn = get_last_insn ();
7584 if (! INSN_P (insn))
7585 insn = prev_real_insn (insn);
7586
7587 for (; insn; insn = prev)
7588 {
7589 int live_insn = 0;
7590
7591 prev = prev_real_insn (insn);
7592
7593 /* Don't delete any insns that are part of a libcall block unless
7594 we can delete the whole libcall block.
7595
7596 Flow or loop might get confused if we did that. Remember
7597 that we are scanning backwards. */
7598 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7599 {
7600 in_libcall = 1;
7601 live_insn = 1;
7602 dead_libcall = dead_libcall_p (insn, counts);
7603 }
7604 else if (in_libcall)
7605 live_insn = ! dead_libcall;
7606 else
7607 live_insn = insn_live_p (insn, counts);
7608
7609 /* If this is a dead insn, delete it and show registers in it aren't
7610 being used. */
7611
7612 if (! live_insn)
7613 {
7614 count_reg_usage (insn, counts, -1);
7615 delete_insn_and_edges (insn);
7616 ndead++;
7617 }
7618
7619 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7620 {
7621 in_libcall = 0;
7622 dead_libcall = 0;
7623 }
7624 }
7625 }
7626 while (ndead != nlastdead);
7627
7628 if (rtl_dump_file && ndead)
7629 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7630 ndead, niterations);
7631 /* Clean up. */
7632 free (counts);
7633 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7634 return ndead;
7635 }