1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
37 /* The basic idea of common subexpression elimination is to go
38 through the code, keeping a record of expressions that would
39 have the same value at the current scan point, and replacing
40 expressions encountered with the cheapest equivalent expression.
42 It is too complicated to keep track of the different possibilities
43 when control paths merge; so, at each label, we forget all that is
44 known and start fresh. This can be described as processing each
45 basic block separately. Note, however, that these are not quite
46 the same as the basic blocks found by a later pass and used for
47 data flow analysis and register packing. We do not need to start fresh
48 after a conditional jump instruction if there is no label there.
50 We use two data structures to record the equivalent expressions:
51 a hash table for most expressions, and several vectors together
52 with "quantity numbers" to record equivalent (pseudo) registers.
54 The use of the special data structure for registers is desirable
55 because it is faster. It is possible because registers references
56 contain a fairly small number, the register number, taken from
57 a contiguously allocated series, and two register references are
58 identical if they have the same number. General expressions
59 do not have any such thing, so the only way to retrieve the
60 information recorded on an expression other than a register
61 is to keep it in a hash table.
63 Registers and "quantity numbers":
65 At the start of each basic block, all of the (hardware and pseudo)
66 registers used in the function are given distinct quantity
67 numbers to indicate their contents. During scan, when the code
68 copies one register into another, we copy the quantity number.
69 When a register is loaded in any other way, we allocate a new
70 quantity number to describe the value generated by this operation.
71 `reg_qty' records what quantity a register is currently thought
74 All real quantity numbers are greater than or equal to `max_reg'.
75 If register N has not been assigned a quantity, reg_qty[N] will equal N.
77 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
78 variables should be referenced with an index below `max_reg'.
80 We also maintain a bidirectional chain of registers for each
81 quantity number. `qty_first_reg', `qty_last_reg',
82 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
84 The first register in a chain is the one whose lifespan is least local.
85 Among equals, it is the one that was seen first.
86 We replace any equivalent register with that one.
88 If two registers have the same quantity number, it must be true that
89 REG expressions with `qty_mode' must be in the hash table for both
90 registers and must be in the same class.
92 The converse is not true. Since hard registers may be referenced in
93 any mode, two REG expressions might be equivalent in the hash table
94 but not have the same quantity number if the quantity number of one
95 of the registers is not the same mode as those expressions.
97 Constants and quantity numbers
99 When a quantity has a known constant value, that value is stored
100 in the appropriate element of qty_const. This is in addition to
101 putting the constant in the hash table as is usual for non-regs.
103 Whether a reg or a constant is preferred is determined by the configuration
104 macro CONST_COSTS and will often depend on the constant value. In any
105 event, expressions containing constants can be simplified, by fold_rtx.
107 When a quantity has a known nearly constant value (such as an address
108 of a stack slot), that value is stored in the appropriate element
111 Integer constants don't have a machine mode. However, cse
112 determines the intended machine mode from the destination
113 of the instruction that moves the constant. The machine mode
114 is recorded in the hash table along with the actual RTL
115 constant expression so that different modes are kept separate.
119 To record known equivalences among expressions in general
120 we use a hash table called `table'. It has a fixed number of buckets
121 that contain chains of `struct table_elt' elements for expressions.
122 These chains connect the elements whose expressions have the same
125 Other chains through the same elements connect the elements which
126 currently have equivalent values.
128 Register references in an expression are canonicalized before hashing
129 the expression. This is done using `reg_qty' and `qty_first_reg'.
130 The hash code of a register reference is computed using the quantity
131 number, not the register number.
133 When the value of an expression changes, it is necessary to remove from the
134 hash table not just that expression but all expressions whose values
135 could be different as a result.
137 1. If the value changing is in memory, except in special cases
138 ANYTHING referring to memory could be changed. That is because
139 nobody knows where a pointer does not point.
140 The function `invalidate_memory' removes what is necessary.
142 The special cases are when the address is constant or is
143 a constant plus a fixed register such as the frame pointer
144 or a static chain pointer. When such addresses are stored in,
145 we can tell exactly which other such addresses must be invalidated
146 due to overlap. `invalidate' does this.
147 All expressions that refer to non-constant
148 memory addresses are also invalidated. `invalidate_memory' does this.
150 2. If the value changing is a register, all expressions
151 containing references to that register, and only those,
154 Because searching the entire hash table for expressions that contain
155 a register is very slow, we try to figure out when it isn't necessary.
156 Precisely, this is necessary only when expressions have been
157 entered in the hash table using this register, and then the value has
158 changed, and then another expression wants to be added to refer to
159 the register's new value. This sequence of circumstances is rare
160 within any one basic block.
162 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
163 reg_tick[i] is incremented whenever a value is stored in register i.
164 reg_in_table[i] holds -1 if no references to register i have been
165 entered in the table; otherwise, it contains the value reg_tick[i] had
166 when the references were entered. If we want to enter a reference
167 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
168 Until we want to enter a new entry, the mere fact that the two vectors
169 don't match makes the entries be ignored if anyone tries to match them.
171 Registers themselves are entered in the hash table as well as in
172 the equivalent-register chains. However, the vectors `reg_tick'
173 and `reg_in_table' do not apply to expressions which are simple
174 register references. These expressions are removed from the table
175 immediately when they become invalid, and this can be done even if
176 we do not immediately search for all the expressions that refer to
179 A CLOBBER rtx in an instruction invalidates its operand for further
180 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
181 invalidates everything that resides in memory.
185 Constant expressions that differ only by an additive integer
186 are called related. When a constant expression is put in
187 the table, the related expression with no constant term
188 is also entered. These are made to point at each other
189 so that it is possible to find out if there exists any
190 register equivalent to an expression related to a given expression. */
192 /* One plus largest register number used in this function. */
196 /* One plus largest instruction UID used in this function at time of
199 static int max_insn_uid
;
201 /* Length of vectors indexed by quantity number.
202 We know in advance we will not need a quantity number this big. */
206 /* Next quantity number to be allocated.
207 This is 1 + the largest number needed so far. */
211 /* Indexed by quantity number, gives the first (or last) register
212 in the chain of registers that currently contain this quantity. */
214 static int *qty_first_reg
;
215 static int *qty_last_reg
;
217 /* Index by quantity number, gives the mode of the quantity. */
219 static enum machine_mode
*qty_mode
;
221 /* Indexed by quantity number, gives the rtx of the constant value of the
222 quantity, or zero if it does not have a known value.
223 A sum of the frame pointer (or arg pointer) plus a constant
224 can also be entered here. */
226 static rtx
*qty_const
;
228 /* Indexed by qty number, gives the insn that stored the constant value
229 recorded in `qty_const'. */
231 static rtx
*qty_const_insn
;
233 /* The next three variables are used to track when a comparison between a
234 quantity and some constant or register has been passed. In that case, we
235 know the results of the comparison in case we see it again. These variables
236 record a comparison that is known to be true. */
238 /* Indexed by qty number, gives the rtx code of a comparison with a known
239 result involving this quantity. If none, it is UNKNOWN. */
240 static enum rtx_code
*qty_comparison_code
;
242 /* Indexed by qty number, gives the constant being compared against in a
243 comparison of known result. If no such comparison, it is undefined.
244 If the comparison is not with a constant, it is zero. */
246 static rtx
*qty_comparison_const
;
248 /* Indexed by qty number, gives the quantity being compared against in a
249 comparison of known result. If no such comparison, if it undefined.
250 If the comparison is not with a register, it is -1. */
252 static int *qty_comparison_qty
;
255 /* For machines that have a CC0, we do not record its value in the hash
256 table since its use is guaranteed to be the insn immediately following
257 its definition and any other insn is presumed to invalidate it.
259 Instead, we store below the value last assigned to CC0. If it should
260 happen to be a constant, it is stored in preference to the actual
261 assigned value. In case it is a constant, we store the mode in which
262 the constant should be interpreted. */
264 static rtx prev_insn_cc0
;
265 static enum machine_mode prev_insn_cc0_mode
;
268 /* Previous actual insn. 0 if at first insn of basic block. */
270 static rtx prev_insn
;
272 /* Insn being scanned. */
274 static rtx this_insn
;
276 /* Index by register number, gives the quantity number
277 of the register's current contents. */
281 /* Index by register number, gives the number of the next (or
282 previous) register in the chain of registers sharing the same
285 Or -1 if this register is at the end of the chain.
287 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
289 static int *reg_next_eqv
;
290 static int *reg_prev_eqv
;
292 /* Index by register number, gives the number of times
293 that register has been altered in the current basic block. */
295 static int *reg_tick
;
297 /* Index by register number, gives the reg_tick value at which
298 rtx's containing this register are valid in the hash table.
299 If this does not equal the current reg_tick value, such expressions
300 existing in the hash table are invalid.
301 If this is -1, no expressions containing this register have been
302 entered in the table. */
304 static int *reg_in_table
;
306 /* A HARD_REG_SET containing all the hard registers for which there is
307 currently a REG expression in the hash table. Note the difference
308 from the above variables, which indicate if the REG is mentioned in some
309 expression in the table. */
311 static HARD_REG_SET hard_regs_in_table
;
313 /* A HARD_REG_SET containing all the hard registers that are invalidated
316 static HARD_REG_SET regs_invalidated_by_call
;
318 /* Two vectors of ints:
319 one containing max_reg -1's; the other max_reg + 500 (an approximation
320 for max_qty) elements where element i contains i.
321 These are used to initialize various other vectors fast. */
323 static int *all_minus_one
;
324 static int *consec_ints
;
326 /* CUID of insn that starts the basic block currently being cse-processed. */
328 static int cse_basic_block_start
;
330 /* CUID of insn that ends the basic block currently being cse-processed. */
332 static int cse_basic_block_end
;
334 /* Vector mapping INSN_UIDs to cuids.
335 The cuids are like uids but increase monotonically always.
336 We use them to see whether a reg is used outside a given basic block. */
338 static int *uid_cuid
;
340 /* Highest UID in UID_CUID. */
343 /* Get the cuid of an insn. */
345 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
347 /* Nonzero if cse has altered conditional jump insns
348 in such a way that jump optimization should be redone. */
350 static int cse_jumps_altered
;
352 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
353 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
354 to put in the note. */
355 static int recorded_label_ref
;
357 /* canon_hash stores 1 in do_not_record
358 if it notices a reference to CC0, PC, or some other volatile
361 static int do_not_record
;
363 #ifdef LOAD_EXTEND_OP
365 /* Scratch rtl used when looking for load-extended copy of a MEM. */
366 static rtx memory_extend_rtx
;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory
;
374 /* canon_hash stores 1 in hash_arg_in_struct
375 if it notices a reference to memory that's part of a structure. */
377 static int hash_arg_in_struct
;
379 /* The hash table contains buckets which are chains of `struct table_elt's,
380 each recording one expression's information.
381 That expression is in the `exp' field.
383 Those elements with the same hash code are chained in both directions
384 through the `next_same_hash' and `prev_same_hash' fields.
386 Each set of expressions with equivalent values
387 are on a two-way chain through the `next_same_value'
388 and `prev_same_value' fields, and all point with
389 the `first_same_value' field at the first element in
390 that chain. The chain is in order of increasing cost.
391 Each element's cost value is in its `cost' field.
393 The `in_memory' field is nonzero for elements that
394 involve any reference to memory. These elements are removed
395 whenever a write is done to an unidentified location in memory.
396 To be safe, we assume that a memory address is unidentified unless
397 the address is either a symbol constant or a constant plus
398 the frame pointer or argument pointer.
400 The `in_struct' field is nonzero for elements that
401 involve any reference to memory inside a structure or array.
403 The `related_value' field is used to connect related expressions
404 (that differ by adding an integer).
405 The related expressions are chained in a circular fashion.
406 `related_value' is zero for expressions for which this
409 The `cost' field stores the cost of this element's expression.
411 The `is_const' flag is set if the element is a constant (including
414 The `flag' field is used as a temporary during some search routines.
416 The `mode' field is usually the same as GET_MODE (`exp'), but
417 if `exp' is a CONST_INT and has no machine mode then the `mode'
418 field is the mode it was being used as. Each constant is
419 recorded separately for each mode it is used with. */
425 struct table_elt
*next_same_hash
;
426 struct table_elt
*prev_same_hash
;
427 struct table_elt
*next_same_value
;
428 struct table_elt
*prev_same_value
;
429 struct table_elt
*first_same_value
;
430 struct table_elt
*related_value
;
432 enum machine_mode mode
;
439 /* We don't want a lot of buckets, because we rarely have very many
440 things stored in the hash table, and a lot of buckets slows
441 down a lot of loops that happen frequently. */
444 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
445 register (hard registers may require `do_not_record' to be set). */
448 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
449 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
450 : canon_hash (X, M) % NBUCKETS)
452 /* Determine whether register number N is considered a fixed register for CSE.
453 It is desirable to replace other regs with fixed regs, to reduce need for
455 A reg wins if it is either the frame pointer or designated as fixed,
456 but not if it is an overlapping register. */
457 #ifdef OVERLAPPING_REGNO_P
458 #define FIXED_REGNO_P(N) \
459 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
460 || fixed_regs[N] || global_regs[N]) \
461 && ! OVERLAPPING_REGNO_P ((N)))
463 #define FIXED_REGNO_P(N) \
464 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
465 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
475 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
476 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
477 || ((N) < FIRST_PSEUDO_REGISTER \
478 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
480 /* A register is cheap if it is a user variable assigned to the register
481 or if its register number always corresponds to a cheap register. */
483 #define CHEAP_REG(N) \
484 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
485 || CHEAP_REGNO (REGNO (N)))
488 (GET_CODE (X) == REG \
489 ? (CHEAP_REG (X) ? 0 \
490 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
494 /* Determine if the quantity number for register X represents a valid index
495 into the `qty_...' variables. */
497 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
499 static struct table_elt
*table
[NBUCKETS
];
501 /* Chain of `struct table_elt's made so far for this function
502 but currently removed from the table. */
504 static struct table_elt
*free_element_chain
;
506 /* Number of `struct table_elt' structures made so far for this function. */
508 static int n_elements_made
;
510 /* Maximum value `n_elements_made' has had so far in this compilation
511 for functions previously processed. */
513 static int max_elements_made
;
515 /* Surviving equivalence class when two equivalence classes are merged
516 by recording the effects of a jump in the last insn. Zero if the
517 last insn was not a conditional jump. */
519 static struct table_elt
*last_jump_equiv_class
;
521 /* Set to the cost of a constant pool reference if one was found for a
522 symbolic constant. If this was found, it means we should try to
523 convert constants into constant pool entries if they don't fit in
526 static int constant_pool_entries_cost
;
528 /* Define maximum length of a branch path. */
530 #define PATHLENGTH 10
532 /* This data describes a block that will be processed by cse_basic_block. */
534 struct cse_basic_block_data
{
535 /* Lowest CUID value of insns in block. */
537 /* Highest CUID value of insns in block. */
539 /* Total number of SETs in block. */
541 /* Last insn in the block. */
543 /* Size of current branch path, if any. */
545 /* Current branch path, indicating which branches will be taken. */
547 /* The branch insn. */
549 /* Whether it should be taken or not. AROUND is the same as taken
550 except that it is used when the destination label is not preceded
552 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
556 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
557 virtual regs here because the simplify_*_operation routines are called
558 by integrate.c, which is called before virtual register instantiation. */
560 #define FIXED_BASE_PLUS_P(X) \
561 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
562 || (X) == arg_pointer_rtx \
563 || (X) == virtual_stack_vars_rtx \
564 || (X) == virtual_incoming_args_rtx \
565 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
566 && (XEXP (X, 0) == frame_pointer_rtx \
567 || XEXP (X, 0) == hard_frame_pointer_rtx \
568 || XEXP (X, 0) == arg_pointer_rtx \
569 || XEXP (X, 0) == virtual_stack_vars_rtx \
570 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
571 || GET_CODE (X) == ADDRESSOF)
573 /* Similar, but also allows reference to the stack pointer.
575 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
576 arg_pointer_rtx by itself is nonzero, because on at least one machine,
577 the i960, the arg pointer is zero when it is unused. */
579 #define NONZERO_BASE_PLUS_P(X) \
580 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
581 || (X) == virtual_stack_vars_rtx \
582 || (X) == virtual_incoming_args_rtx \
583 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
584 && (XEXP (X, 0) == frame_pointer_rtx \
585 || XEXP (X, 0) == hard_frame_pointer_rtx \
586 || XEXP (X, 0) == arg_pointer_rtx \
587 || XEXP (X, 0) == virtual_stack_vars_rtx \
588 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
589 || (X) == stack_pointer_rtx \
590 || (X) == virtual_stack_dynamic_rtx \
591 || (X) == virtual_outgoing_args_rtx \
592 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
593 && (XEXP (X, 0) == stack_pointer_rtx \
594 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
595 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
596 || GET_CODE (X) == ADDRESSOF)
598 static int notreg_cost
PROTO((rtx
));
599 static void new_basic_block
PROTO((void));
600 static void make_new_qty
PROTO((int));
601 static void make_regs_eqv
PROTO((int, int));
602 static void delete_reg_equiv
PROTO((int));
603 static int mention_regs
PROTO((rtx
));
604 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
605 static void free_element
PROTO((struct table_elt
*));
606 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
607 static struct table_elt
*get_element
PROTO((void));
608 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
609 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
610 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
611 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
613 static void merge_equiv_classes
PROTO((struct table_elt
*,
614 struct table_elt
*));
615 static void invalidate
PROTO((rtx
, enum machine_mode
));
616 static int cse_rtx_varies_p
PROTO((rtx
));
617 static void remove_invalid_refs
PROTO((int));
618 static void rehash_using_reg
PROTO((rtx
));
619 static void invalidate_memory
PROTO((void));
620 static void invalidate_for_call
PROTO((void));
621 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
622 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
623 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
624 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
625 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
628 static int refers_to_p
PROTO((rtx
, rtx
));
629 static rtx canon_reg
PROTO((rtx
, rtx
));
630 static void find_best_addr
PROTO((rtx
, rtx
*));
631 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
633 enum machine_mode
*));
634 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
636 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
638 static rtx fold_rtx
PROTO((rtx
, rtx
));
639 static rtx equiv_constant
PROTO((rtx
));
640 static void record_jump_equiv
PROTO((rtx
, int));
641 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
643 static void cse_insn
PROTO((rtx
, int));
644 static int note_mem_written
PROTO((rtx
));
645 static void invalidate_from_clobbers
PROTO((rtx
));
646 static rtx cse_process_notes
PROTO((rtx
, rtx
));
647 static void cse_around_loop
PROTO((rtx
));
648 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
649 static void invalidate_skipped_block
PROTO((rtx
));
650 static void cse_check_loop_start
PROTO((rtx
, rtx
));
651 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
652 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
653 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
655 extern int rtx_equal_function_value_matters
;
657 /* Return an estimate of the cost of computing rtx X.
658 One use is in cse, to decide which expression to keep in the hash table.
659 Another is in rtl generation, to pick the cheapest way to multiply.
660 Other uses like the latter are expected in the future. */
662 /* Internal function, to compute cost when X is not a register; called
663 from COST macro to keep it simple. */
669 return ((GET_CODE (x
) == SUBREG
670 && GET_CODE (SUBREG_REG (x
)) == REG
671 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
672 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
673 && (GET_MODE_SIZE (GET_MODE (x
))
674 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
675 && subreg_lowpart_p (x
)
676 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
677 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
678 ? (CHEAP_REG (SUBREG_REG (x
)) ? 0
679 : (REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
? 1
681 : rtx_cost (x
, SET
) * 2);
684 /* Return the right cost to give to an operation
685 to make the cost of the corresponding register-to-register instruction
686 N times that of a fast register-to-register instruction. */
688 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
691 rtx_cost (x
, outer_code
)
693 enum rtx_code outer_code
;
696 register enum rtx_code code
;
703 /* Compute the default costs of certain things.
704 Note that RTX_COSTS can override the defaults. */
710 /* Count multiplication by 2**n as a shift,
711 because if we are considering it, we would output it as a shift. */
712 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
713 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
716 total
= COSTS_N_INSNS (5);
722 total
= COSTS_N_INSNS (7);
725 /* Used in loop.c and combine.c as a marker. */
729 /* We don't want these to be used in substitutions because
730 we have no way of validating the resulting insn. So assign
731 anything containing an ASM_OPERANDS a very high cost. */
741 return ! CHEAP_REG (x
);
744 /* If we can't tie these modes, make this expensive. The larger
745 the mode, the more expensive it is. */
746 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
747 return COSTS_N_INSNS (2
748 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
751 RTX_COSTS (x
, code
, outer_code
);
753 CONST_COSTS (x
, code
, outer_code
);
756 #ifdef DEFAULT_RTX_COSTS
757 DEFAULT_RTX_COSTS(x
, code
, outer_code
);
762 /* Sum the costs of the sub-rtx's, plus cost of this operation,
763 which is already in total. */
765 fmt
= GET_RTX_FORMAT (code
);
766 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
768 total
+= rtx_cost (XEXP (x
, i
), code
);
769 else if (fmt
[i
] == 'E')
770 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
771 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
776 /* Clear the hash table and initialize each register with its own quantity,
777 for a new basic block. */
786 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
788 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
789 max_reg
* sizeof (int));
790 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
791 CLEAR_HARD_REG_SET (hard_regs_in_table
);
793 /* The per-quantity values used to be initialized here, but it is
794 much faster to initialize each as it is made in `make_new_qty'. */
796 for (i
= 0; i
< NBUCKETS
; i
++)
798 register struct table_elt
*this, *next
;
799 for (this = table
[i
]; this; this = next
)
801 next
= this->next_same_hash
;
806 bzero ((char *) table
, sizeof table
);
815 /* Say that register REG contains a quantity not in any register before
816 and initialize that quantity. */
824 if (next_qty
>= max_qty
)
827 q
= reg_qty
[reg
] = next_qty
++;
828 qty_first_reg
[q
] = reg
;
829 qty_last_reg
[q
] = reg
;
830 qty_const
[q
] = qty_const_insn
[q
] = 0;
831 qty_comparison_code
[q
] = UNKNOWN
;
833 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
836 /* Make reg NEW equivalent to reg OLD.
837 OLD is not changing; NEW is. */
840 make_regs_eqv (new, old
)
841 register int new, old
;
843 register int lastr
, firstr
;
844 register int q
= reg_qty
[old
];
846 /* Nothing should become eqv until it has a "non-invalid" qty number. */
847 if (! REGNO_QTY_VALID_P (old
))
851 firstr
= qty_first_reg
[q
];
852 lastr
= qty_last_reg
[q
];
854 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
855 hard regs. Among pseudos, if NEW will live longer than any other reg
856 of the same qty, and that is beyond the current basic block,
857 make it the new canonical replacement for this qty. */
858 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
859 /* Certain fixed registers might be of the class NO_REGS. This means
860 that not only can they not be allocated by the compiler, but
861 they cannot be used in substitutions or canonicalizations
863 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
864 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
865 || (new >= FIRST_PSEUDO_REGISTER
866 && (firstr
< FIRST_PSEUDO_REGISTER
867 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
868 || (uid_cuid
[REGNO_FIRST_UID (new)]
869 < cse_basic_block_start
))
870 && (uid_cuid
[REGNO_LAST_UID (new)]
871 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
873 reg_prev_eqv
[firstr
] = new;
874 reg_next_eqv
[new] = firstr
;
875 reg_prev_eqv
[new] = -1;
876 qty_first_reg
[q
] = new;
880 /* If NEW is a hard reg (known to be non-fixed), insert at end.
881 Otherwise, insert before any non-fixed hard regs that are at the
882 end. Registers of class NO_REGS cannot be used as an
883 equivalent for anything. */
884 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
885 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
886 && new >= FIRST_PSEUDO_REGISTER
)
887 lastr
= reg_prev_eqv
[lastr
];
888 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
889 if (reg_next_eqv
[lastr
] >= 0)
890 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
892 qty_last_reg
[q
] = new;
893 reg_next_eqv
[lastr
] = new;
894 reg_prev_eqv
[new] = lastr
;
898 /* Remove REG from its equivalence class. */
901 delete_reg_equiv (reg
)
904 register int q
= reg_qty
[reg
];
907 /* If invalid, do nothing. */
911 p
= reg_prev_eqv
[reg
];
912 n
= reg_next_eqv
[reg
];
921 qty_first_reg
[q
] = n
;
926 /* Remove any invalid expressions from the hash table
927 that refer to any of the registers contained in expression X.
929 Make sure that newly inserted references to those registers
930 as subexpressions will be considered valid.
932 mention_regs is not called when a register itself
933 is being stored in the table.
935 Return 1 if we have done something that may have changed the hash code
942 register enum rtx_code code
;
945 register int changed
= 0;
953 register int regno
= REGNO (x
);
954 register int endregno
955 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
956 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
959 for (i
= regno
; i
< endregno
; i
++)
961 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
962 remove_invalid_refs (i
);
964 reg_in_table
[i
] = reg_tick
[i
];
970 /* If X is a comparison or a COMPARE and either operand is a register
971 that does not have a quantity, give it one. This is so that a later
972 call to record_jump_equiv won't cause X to be assigned a different
973 hash code and not found in the table after that call.
975 It is not necessary to do this here, since rehash_using_reg can
976 fix up the table later, but doing this here eliminates the need to
977 call that expensive function in the most common case where the only
978 use of the register is in the comparison. */
980 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
982 if (GET_CODE (XEXP (x
, 0)) == REG
983 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
984 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
986 rehash_using_reg (XEXP (x
, 0));
990 if (GET_CODE (XEXP (x
, 1)) == REG
991 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
992 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
994 rehash_using_reg (XEXP (x
, 1));
999 fmt
= GET_RTX_FORMAT (code
);
1000 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1002 changed
|= mention_regs (XEXP (x
, i
));
1003 else if (fmt
[i
] == 'E')
1004 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1005 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1010 /* Update the register quantities for inserting X into the hash table
1011 with a value equivalent to CLASSP.
1012 (If the class does not contain a REG, it is irrelevant.)
1013 If MODIFIED is nonzero, X is a destination; it is being modified.
1014 Note that delete_reg_equiv should be called on a register
1015 before insert_regs is done on that register with MODIFIED != 0.
1017 Nonzero value means that elements of reg_qty have changed
1018 so X's hash code may be different. */
1021 insert_regs (x
, classp
, modified
)
1023 struct table_elt
*classp
;
1026 if (GET_CODE (x
) == REG
)
1028 register int regno
= REGNO (x
);
1030 /* If REGNO is in the equivalence table already but is of the
1031 wrong mode for that equivalence, don't do anything here. */
1033 if (REGNO_QTY_VALID_P (regno
)
1034 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1037 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1040 for (classp
= classp
->first_same_value
;
1042 classp
= classp
->next_same_value
)
1043 if (GET_CODE (classp
->exp
) == REG
1044 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1046 make_regs_eqv (regno
, REGNO (classp
->exp
));
1050 make_new_qty (regno
);
1051 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1058 /* If X is a SUBREG, we will likely be inserting the inner register in the
1059 table. If that register doesn't have an assigned quantity number at
1060 this point but does later, the insertion that we will be doing now will
1061 not be accessible because its hash code will have changed. So assign
1062 a quantity number now. */
1064 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1065 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1067 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1068 mention_regs (SUBREG_REG (x
));
1072 return mention_regs (x
);
1075 /* Look in or update the hash table. */
1077 /* Put the element ELT on the list of free elements. */
1081 struct table_elt
*elt
;
1083 elt
->next_same_hash
= free_element_chain
;
1084 free_element_chain
= elt
;
1087 /* Return an element that is free for use. */
1089 static struct table_elt
*
1092 struct table_elt
*elt
= free_element_chain
;
1095 free_element_chain
= elt
->next_same_hash
;
1099 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1102 /* Remove table element ELT from use in the table.
1103 HASH is its hash code, made using the HASH macro.
1104 It's an argument because often that is known in advance
1105 and we save much time not recomputing it. */
1108 remove_from_table (elt
, hash
)
1109 register struct table_elt
*elt
;
1115 /* Mark this element as removed. See cse_insn. */
1116 elt
->first_same_value
= 0;
1118 /* Remove the table element from its equivalence class. */
1121 register struct table_elt
*prev
= elt
->prev_same_value
;
1122 register struct table_elt
*next
= elt
->next_same_value
;
1124 if (next
) next
->prev_same_value
= prev
;
1127 prev
->next_same_value
= next
;
1130 register struct table_elt
*newfirst
= next
;
1133 next
->first_same_value
= newfirst
;
1134 next
= next
->next_same_value
;
1139 /* Remove the table element from its hash bucket. */
1142 register struct table_elt
*prev
= elt
->prev_same_hash
;
1143 register struct table_elt
*next
= elt
->next_same_hash
;
1145 if (next
) next
->prev_same_hash
= prev
;
1148 prev
->next_same_hash
= next
;
1149 else if (table
[hash
] == elt
)
1153 /* This entry is not in the proper hash bucket. This can happen
1154 when two classes were merged by `merge_equiv_classes'. Search
1155 for the hash bucket that it heads. This happens only very
1156 rarely, so the cost is acceptable. */
1157 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1158 if (table
[hash
] == elt
)
1163 /* Remove the table element from its related-value circular chain. */
1165 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1167 register struct table_elt
*p
= elt
->related_value
;
1168 while (p
->related_value
!= elt
)
1169 p
= p
->related_value
;
1170 p
->related_value
= elt
->related_value
;
1171 if (p
->related_value
== p
)
1172 p
->related_value
= 0;
1178 /* Look up X in the hash table and return its table element,
1179 or 0 if X is not in the table.
1181 MODE is the machine-mode of X, or if X is an integer constant
1182 with VOIDmode then MODE is the mode with which X will be used.
1184 Here we are satisfied to find an expression whose tree structure
1187 static struct table_elt
*
1188 lookup (x
, hash
, mode
)
1191 enum machine_mode mode
;
1193 register struct table_elt
*p
;
1195 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1196 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1197 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1203 /* Like `lookup' but don't care whether the table element uses invalid regs.
1204 Also ignore discrepancies in the machine mode of a register. */
1206 static struct table_elt
*
1207 lookup_for_remove (x
, hash
, mode
)
1210 enum machine_mode mode
;
1212 register struct table_elt
*p
;
1214 if (GET_CODE (x
) == REG
)
1216 int regno
= REGNO (x
);
1217 /* Don't check the machine mode when comparing registers;
1218 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1219 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1220 if (GET_CODE (p
->exp
) == REG
1221 && REGNO (p
->exp
) == regno
)
1226 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1227 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1234 /* Look for an expression equivalent to X and with code CODE.
1235 If one is found, return that expression. */
1238 lookup_as_function (x
, code
)
1242 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1247 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1249 if (GET_CODE (p
->exp
) == code
1250 /* Make sure this is a valid entry in the table. */
1251 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1258 /* Insert X in the hash table, assuming HASH is its hash code
1259 and CLASSP is an element of the class it should go in
1260 (or 0 if a new class should be made).
1261 It is inserted at the proper position to keep the class in
1262 the order cheapest first.
1264 MODE is the machine-mode of X, or if X is an integer constant
1265 with VOIDmode then MODE is the mode with which X will be used.
1267 For elements of equal cheapness, the most recent one
1268 goes in front, except that the first element in the list
1269 remains first unless a cheaper element is added. The order of
1270 pseudo-registers does not matter, as canon_reg will be called to
1271 find the cheapest when a register is retrieved from the table.
1273 The in_memory field in the hash table element is set to 0.
1274 The caller must set it nonzero if appropriate.
1276 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1277 and if insert_regs returns a nonzero value
1278 you must then recompute its hash code before calling here.
1280 If necessary, update table showing constant values of quantities. */
1282 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1284 static struct table_elt
*
1285 insert (x
, classp
, hash
, mode
)
1287 register struct table_elt
*classp
;
1289 enum machine_mode mode
;
1291 register struct table_elt
*elt
;
1293 /* If X is a register and we haven't made a quantity for it,
1294 something is wrong. */
1295 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1298 /* If X is a hard register, show it is being put in the table. */
1299 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1301 int regno
= REGNO (x
);
1302 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1305 for (i
= regno
; i
< endregno
; i
++)
1306 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1309 /* If X is a label, show we recorded it. */
1310 if (GET_CODE (x
) == LABEL_REF
1311 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1312 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1313 recorded_label_ref
= 1;
1315 /* Put an element for X into the right hash bucket. */
1317 elt
= get_element ();
1319 elt
->cost
= COST (x
);
1320 elt
->next_same_value
= 0;
1321 elt
->prev_same_value
= 0;
1322 elt
->next_same_hash
= table
[hash
];
1323 elt
->prev_same_hash
= 0;
1324 elt
->related_value
= 0;
1327 elt
->is_const
= (CONSTANT_P (x
)
1328 /* GNU C++ takes advantage of this for `this'
1329 (and other const values). */
1330 || (RTX_UNCHANGING_P (x
)
1331 && GET_CODE (x
) == REG
1332 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1333 || FIXED_BASE_PLUS_P (x
));
1336 table
[hash
]->prev_same_hash
= elt
;
1339 /* Put it into the proper value-class. */
1342 classp
= classp
->first_same_value
;
1343 if (CHEAPER (elt
, classp
))
1344 /* Insert at the head of the class */
1346 register struct table_elt
*p
;
1347 elt
->next_same_value
= classp
;
1348 classp
->prev_same_value
= elt
;
1349 elt
->first_same_value
= elt
;
1351 for (p
= classp
; p
; p
= p
->next_same_value
)
1352 p
->first_same_value
= elt
;
1356 /* Insert not at head of the class. */
1357 /* Put it after the last element cheaper than X. */
1358 register struct table_elt
*p
, *next
;
1359 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1361 /* Put it after P and before NEXT. */
1362 elt
->next_same_value
= next
;
1364 next
->prev_same_value
= elt
;
1365 elt
->prev_same_value
= p
;
1366 p
->next_same_value
= elt
;
1367 elt
->first_same_value
= classp
;
1371 elt
->first_same_value
= elt
;
1373 /* If this is a constant being set equivalent to a register or a register
1374 being set equivalent to a constant, note the constant equivalence.
1376 If this is a constant, it cannot be equivalent to a different constant,
1377 and a constant is the only thing that can be cheaper than a register. So
1378 we know the register is the head of the class (before the constant was
1381 If this is a register that is not already known equivalent to a
1382 constant, we must check the entire class.
1384 If this is a register that is already known equivalent to an insn,
1385 update `qty_const_insn' to show that `this_insn' is the latest
1386 insn making that quantity equivalent to the constant. */
1388 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1389 && GET_CODE (x
) != REG
)
1391 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1392 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1393 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1396 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]]
1399 register struct table_elt
*p
;
1401 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1403 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1405 qty_const
[reg_qty
[REGNO (x
)]]
1406 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1407 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1413 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1414 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1415 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1417 /* If this is a constant with symbolic value,
1418 and it has a term with an explicit integer value,
1419 link it up with related expressions. */
1420 if (GET_CODE (x
) == CONST
)
1422 rtx subexp
= get_related_value (x
);
1424 struct table_elt
*subelt
, *subelt_prev
;
1428 /* Get the integer-free subexpression in the hash table. */
1429 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1430 subelt
= lookup (subexp
, subhash
, mode
);
1432 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1433 /* Initialize SUBELT's circular chain if it has none. */
1434 if (subelt
->related_value
== 0)
1435 subelt
->related_value
= subelt
;
1436 /* Find the element in the circular chain that precedes SUBELT. */
1437 subelt_prev
= subelt
;
1438 while (subelt_prev
->related_value
!= subelt
)
1439 subelt_prev
= subelt_prev
->related_value
;
1440 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1441 This way the element that follows SUBELT is the oldest one. */
1442 elt
->related_value
= subelt_prev
->related_value
;
1443 subelt_prev
->related_value
= elt
;
1450 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1451 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1452 the two classes equivalent.
1454 CLASS1 will be the surviving class; CLASS2 should not be used after this
1457 Any invalid entries in CLASS2 will not be copied. */
1460 merge_equiv_classes (class1
, class2
)
1461 struct table_elt
*class1
, *class2
;
1463 struct table_elt
*elt
, *next
, *new;
1465 /* Ensure we start with the head of the classes. */
1466 class1
= class1
->first_same_value
;
1467 class2
= class2
->first_same_value
;
1469 /* If they were already equal, forget it. */
1470 if (class1
== class2
)
1473 for (elt
= class2
; elt
; elt
= next
)
1477 enum machine_mode mode
= elt
->mode
;
1479 next
= elt
->next_same_value
;
1481 /* Remove old entry, make a new one in CLASS1's class.
1482 Don't do this for invalid entries as we cannot find their
1483 hash code (it also isn't necessary). */
1484 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1486 hash_arg_in_memory
= 0;
1487 hash_arg_in_struct
= 0;
1488 hash
= HASH (exp
, mode
);
1490 if (GET_CODE (exp
) == REG
)
1491 delete_reg_equiv (REGNO (exp
));
1493 remove_from_table (elt
, hash
);
1495 if (insert_regs (exp
, class1
, 0))
1497 rehash_using_reg (exp
);
1498 hash
= HASH (exp
, mode
);
1500 new = insert (exp
, class1
, hash
, mode
);
1501 new->in_memory
= hash_arg_in_memory
;
1502 new->in_struct
= hash_arg_in_struct
;
1507 /* Remove from the hash table, or mark as invalid,
1508 all expressions whose values could be altered by storing in X.
1509 X is a register, a subreg, or a memory reference with nonvarying address
1510 (because, when a memory reference with a varying address is stored in,
1511 all memory references are removed by invalidate_memory
1512 so specific invalidation is superfluous).
1513 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1514 instead of just the amount indicated by the mode of X. This is only used
1515 for bitfield stores into memory.
1517 A nonvarying address may be just a register or just
1518 a symbol reference, or it may be either of those plus
1519 a numeric offset. */
1522 invalidate (x
, full_mode
)
1524 enum machine_mode full_mode
;
1527 register struct table_elt
*p
;
1529 /* If X is a register, dependencies on its contents
1530 are recorded through the qty number mechanism.
1531 Just change the qty number of the register,
1532 mark it as invalid for expressions that refer to it,
1533 and remove it itself. */
1535 if (GET_CODE (x
) == REG
)
1537 register int regno
= REGNO (x
);
1538 register unsigned hash
= HASH (x
, GET_MODE (x
));
1540 /* Remove REGNO from any quantity list it might be on and indicate
1541 that it's value might have changed. If it is a pseudo, remove its
1542 entry from the hash table.
1544 For a hard register, we do the first two actions above for any
1545 additional hard registers corresponding to X. Then, if any of these
1546 registers are in the table, we must remove any REG entries that
1547 overlap these registers. */
1549 delete_reg_equiv (regno
);
1552 if (regno
>= FIRST_PSEUDO_REGISTER
)
1554 /* Because a register can be referenced in more than one mode,
1555 we might have to remove more than one table entry. */
1557 struct table_elt
*elt
;
1559 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1560 remove_from_table (elt
, hash
);
1564 HOST_WIDE_INT in_table
1565 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1566 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1567 int tregno
, tendregno
;
1568 register struct table_elt
*p
, *next
;
1570 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1572 for (i
= regno
+ 1; i
< endregno
; i
++)
1574 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1575 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1576 delete_reg_equiv (i
);
1581 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1582 for (p
= table
[hash
]; p
; p
= next
)
1584 next
= p
->next_same_hash
;
1586 if (GET_CODE (p
->exp
) != REG
1587 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1590 tregno
= REGNO (p
->exp
);
1592 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1593 if (tendregno
> regno
&& tregno
< endregno
)
1594 remove_from_table (p
, hash
);
1601 if (GET_CODE (x
) == SUBREG
)
1603 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1605 invalidate (SUBREG_REG (x
), VOIDmode
);
1609 /* X is not a register; it must be a memory reference with
1610 a nonvarying address. Remove all hash table elements
1611 that refer to overlapping pieces of memory. */
1613 if (GET_CODE (x
) != MEM
)
1616 if (full_mode
== VOIDmode
)
1617 full_mode
= GET_MODE (x
);
1619 for (i
= 0; i
< NBUCKETS
; i
++)
1621 register struct table_elt
*next
;
1622 for (p
= table
[i
]; p
; p
= next
)
1624 next
= p
->next_same_hash
;
1625 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1626 than checking all the aliases). */
1628 && (GET_CODE (p
->exp
) != MEM
1629 || true_dependence (x
, full_mode
, p
->exp
, cse_rtx_varies_p
)))
1630 remove_from_table (p
, i
);
1635 /* Remove all expressions that refer to register REGNO,
1636 since they are already invalid, and we are about to
1637 mark that register valid again and don't want the old
1638 expressions to reappear as valid. */
1641 remove_invalid_refs (regno
)
1645 register struct table_elt
*p
, *next
;
1647 for (i
= 0; i
< NBUCKETS
; i
++)
1648 for (p
= table
[i
]; p
; p
= next
)
1650 next
= p
->next_same_hash
;
1651 if (GET_CODE (p
->exp
) != REG
1652 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1653 remove_from_table (p
, i
);
1657 /* Recompute the hash codes of any valid entries in the hash table that
1658 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1660 This is called when we make a jump equivalence. */
1663 rehash_using_reg (x
)
1667 struct table_elt
*p
, *next
;
1670 if (GET_CODE (x
) == SUBREG
)
1673 /* If X is not a register or if the register is known not to be in any
1674 valid entries in the table, we have no work to do. */
1676 if (GET_CODE (x
) != REG
1677 || reg_in_table
[REGNO (x
)] < 0
1678 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1681 /* Scan all hash chains looking for valid entries that mention X.
1682 If we find one and it is in the wrong hash chain, move it. We can skip
1683 objects that are registers, since they are handled specially. */
1685 for (i
= 0; i
< NBUCKETS
; i
++)
1686 for (p
= table
[i
]; p
; p
= next
)
1688 next
= p
->next_same_hash
;
1689 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1690 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1691 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1693 if (p
->next_same_hash
)
1694 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1696 if (p
->prev_same_hash
)
1697 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1699 table
[i
] = p
->next_same_hash
;
1701 p
->next_same_hash
= table
[hash
];
1702 p
->prev_same_hash
= 0;
1704 table
[hash
]->prev_same_hash
= p
;
1710 /* Remove from the hash table any expression that is a call-clobbered
1711 register. Also update their TICK values. */
1714 invalidate_for_call ()
1716 int regno
, endregno
;
1719 struct table_elt
*p
, *next
;
1722 /* Go through all the hard registers. For each that is clobbered in
1723 a CALL_INSN, remove the register from quantity chains and update
1724 reg_tick if defined. Also see if any of these registers is currently
1727 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1728 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1730 delete_reg_equiv (regno
);
1731 if (reg_tick
[regno
] >= 0)
1734 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1737 /* In the case where we have no call-clobbered hard registers in the
1738 table, we are done. Otherwise, scan the table and remove any
1739 entry that overlaps a call-clobbered register. */
1742 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1743 for (p
= table
[hash
]; p
; p
= next
)
1745 next
= p
->next_same_hash
;
1749 remove_from_table (p
, hash
);
1753 if (GET_CODE (p
->exp
) != REG
1754 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1757 regno
= REGNO (p
->exp
);
1758 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1760 for (i
= regno
; i
< endregno
; i
++)
1761 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1763 remove_from_table (p
, hash
);
1769 /* Given an expression X of type CONST,
1770 and ELT which is its table entry (or 0 if it
1771 is not in the hash table),
1772 return an alternate expression for X as a register plus integer.
1773 If none can be found, return 0. */
1776 use_related_value (x
, elt
)
1778 struct table_elt
*elt
;
1780 register struct table_elt
*relt
= 0;
1781 register struct table_elt
*p
, *q
;
1782 HOST_WIDE_INT offset
;
1784 /* First, is there anything related known?
1785 If we have a table element, we can tell from that.
1786 Otherwise, must look it up. */
1788 if (elt
!= 0 && elt
->related_value
!= 0)
1790 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1792 rtx subexp
= get_related_value (x
);
1794 relt
= lookup (subexp
,
1795 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1802 /* Search all related table entries for one that has an
1803 equivalent register. */
1808 /* This loop is strange in that it is executed in two different cases.
1809 The first is when X is already in the table. Then it is searching
1810 the RELATED_VALUE list of X's class (RELT). The second case is when
1811 X is not in the table. Then RELT points to a class for the related
1814 Ensure that, whatever case we are in, that we ignore classes that have
1815 the same value as X. */
1817 if (rtx_equal_p (x
, p
->exp
))
1820 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1821 if (GET_CODE (q
->exp
) == REG
)
1827 p
= p
->related_value
;
1829 /* We went all the way around, so there is nothing to be found.
1830 Alternatively, perhaps RELT was in the table for some other reason
1831 and it has no related values recorded. */
1832 if (p
== relt
|| p
== 0)
1839 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1840 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1841 return plus_constant (q
->exp
, offset
);
1844 /* Hash an rtx. We are careful to make sure the value is never negative.
1845 Equivalent registers hash identically.
1846 MODE is used in hashing for CONST_INTs only;
1847 otherwise the mode of X is used.
1849 Store 1 in do_not_record if any subexpression is volatile.
1851 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1852 which does not have the RTX_UNCHANGING_P bit set.
1853 In this case, also store 1 in hash_arg_in_struct
1854 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1856 Note that cse_insn knows that the hash code of a MEM expression
1857 is just (int) MEM plus the hash code of the address. */
1860 canon_hash (x
, mode
)
1862 enum machine_mode mode
;
1865 register unsigned hash
= 0;
1866 register enum rtx_code code
;
1869 /* repeat is used to turn tail-recursion into iteration. */
1874 code
= GET_CODE (x
);
1879 register int regno
= REGNO (x
);
1881 /* On some machines, we can't record any non-fixed hard register,
1882 because extending its life will cause reload problems. We
1883 consider ap, fp, and sp to be fixed for this purpose.
1884 On all machines, we can't record any global registers. */
1886 if (regno
< FIRST_PSEUDO_REGISTER
1887 && (global_regs
[regno
]
1888 || (SMALL_REGISTER_CLASSES
1889 && ! fixed_regs
[regno
]
1890 && regno
!= FRAME_POINTER_REGNUM
1891 && regno
!= HARD_FRAME_POINTER_REGNUM
1892 && regno
!= ARG_POINTER_REGNUM
1893 && regno
!= STACK_POINTER_REGNUM
)))
1898 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1904 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1905 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1910 /* This is like the general case, except that it only counts
1911 the integers representing the constant. */
1912 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1913 if (GET_MODE (x
) != VOIDmode
)
1914 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1916 unsigned tem
= XINT (x
, i
);
1920 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
1921 + (unsigned) CONST_DOUBLE_HIGH (x
));
1924 /* Assume there is only one rtx object for any given label. */
1927 += ((unsigned) LABEL_REF
<< 7) + (unsigned long) XEXP (x
, 0);
1932 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned long) XSTR (x
, 0);
1936 if (MEM_VOLATILE_P (x
))
1941 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
1943 hash_arg_in_memory
= 1;
1944 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1946 /* Now that we have already found this special case,
1947 might as well speed it up as much as possible. */
1948 hash
+= (unsigned) MEM
;
1959 case UNSPEC_VOLATILE
:
1964 if (MEM_VOLATILE_P (x
))
1975 i
= GET_RTX_LENGTH (code
) - 1;
1976 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1977 fmt
= GET_RTX_FORMAT (code
);
1982 rtx tem
= XEXP (x
, i
);
1984 /* If we are about to do the last recursive call
1985 needed at this level, change it into iteration.
1986 This function is called enough to be worth it. */
1992 hash
+= canon_hash (tem
, 0);
1994 else if (fmt
[i
] == 'E')
1995 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1996 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1997 else if (fmt
[i
] == 's')
1999 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
2004 else if (fmt
[i
] == 'i')
2006 register unsigned tem
= XINT (x
, i
);
2009 else if (fmt
[i
] == '0')
2017 /* Like canon_hash but with no side effects. */
2022 enum machine_mode mode
;
2024 int save_do_not_record
= do_not_record
;
2025 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2026 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2027 unsigned hash
= canon_hash (x
, mode
);
2028 hash_arg_in_memory
= save_hash_arg_in_memory
;
2029 hash_arg_in_struct
= save_hash_arg_in_struct
;
2030 do_not_record
= save_do_not_record
;
2034 /* Return 1 iff X and Y would canonicalize into the same thing,
2035 without actually constructing the canonicalization of either one.
2036 If VALIDATE is nonzero,
2037 we assume X is an expression being processed from the rtl
2038 and Y was found in the hash table. We check register refs
2039 in Y for being marked as valid.
2041 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2042 that is known to be in the register. Ordinarily, we don't allow them
2043 to match, because letting them match would cause unpredictable results
2044 in all the places that search a hash table chain for an equivalent
2045 for a given value. A possible equivalent that has different structure
2046 has its hash code computed from different data. Whether the hash code
2047 is the same as that of the the given value is pure luck. */
2050 exp_equiv_p (x
, y
, validate
, equal_values
)
2056 register enum rtx_code code
;
2059 /* Note: it is incorrect to assume an expression is equivalent to itself
2060 if VALIDATE is nonzero. */
2061 if (x
== y
&& !validate
)
2063 if (x
== 0 || y
== 0)
2066 code
= GET_CODE (x
);
2067 if (code
!= GET_CODE (y
))
2072 /* If X is a constant and Y is a register or vice versa, they may be
2073 equivalent. We only have to validate if Y is a register. */
2074 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2075 && REGNO_QTY_VALID_P (REGNO (y
))
2076 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2077 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2078 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2081 if (CONSTANT_P (y
) && code
== REG
2082 && REGNO_QTY_VALID_P (REGNO (x
))
2083 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2084 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2090 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2091 if (GET_MODE (x
) != GET_MODE (y
))
2101 return INTVAL (x
) == INTVAL (y
);
2104 return XEXP (x
, 0) == XEXP (y
, 0);
2107 return XSTR (x
, 0) == XSTR (y
, 0);
2111 int regno
= REGNO (y
);
2113 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2114 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2117 /* If the quantities are not the same, the expressions are not
2118 equivalent. If there are and we are not to validate, they
2119 are equivalent. Otherwise, ensure all regs are up-to-date. */
2121 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2127 for (i
= regno
; i
< endregno
; i
++)
2128 if (reg_in_table
[i
] != reg_tick
[i
])
2134 /* For commutative operations, check both orders. */
2142 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2143 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2144 validate
, equal_values
))
2145 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2146 validate
, equal_values
)
2147 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2148 validate
, equal_values
)));
2154 /* Compare the elements. If any pair of corresponding elements
2155 fail to match, return 0 for the whole things. */
2157 fmt
= GET_RTX_FORMAT (code
);
2158 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2163 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2168 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2170 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2171 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2172 validate
, equal_values
))
2177 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2182 if (XINT (x
, i
) != XINT (y
, i
))
2187 if (XWINT (x
, i
) != XWINT (y
, i
))
2202 /* Return 1 iff any subexpression of X matches Y.
2203 Here we do not require that X or Y be valid (for registers referred to)
2204 for being in the hash table. */
2211 register enum rtx_code code
;
2217 if (x
== 0 || y
== 0)
2220 code
= GET_CODE (x
);
2221 /* If X as a whole has the same code as Y, they may match.
2223 if (code
== GET_CODE (y
))
2225 if (exp_equiv_p (x
, y
, 0, 1))
2229 /* X does not match, so try its subexpressions. */
2231 fmt
= GET_RTX_FORMAT (code
);
2232 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2241 if (refers_to_p (XEXP (x
, i
), y
))
2244 else if (fmt
[i
] == 'E')
2247 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2248 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2255 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2256 set PBASE, PSTART, and PEND which correspond to the base of the address,
2257 the starting offset, and ending offset respectively.
2259 ADDR is known to be a nonvarying address. */
2261 /* ??? Despite what the comments say, this function is in fact frequently
2262 passed varying addresses. This does not appear to cause any problems. */
2265 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2269 HOST_WIDE_INT
*pstart
, *pend
;
2272 HOST_WIDE_INT start
, end
;
2278 /* Registers with nonvarying addresses usually have constant equivalents;
2279 but the frame pointer register is also possible. */
2280 if (GET_CODE (base
) == REG
2282 && REGNO_QTY_VALID_P (REGNO (base
))
2283 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2284 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2285 base
= qty_const
[reg_qty
[REGNO (base
)]];
2286 else if (GET_CODE (base
) == PLUS
2287 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2288 && GET_CODE (XEXP (base
, 0)) == REG
2290 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2291 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2292 == GET_MODE (XEXP (base
, 0)))
2293 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2295 start
= INTVAL (XEXP (base
, 1));
2296 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2298 /* This can happen as the result of virtual register instantiation,
2299 if the initial offset is too large to be a valid address. */
2300 else if (GET_CODE (base
) == PLUS
2301 && GET_CODE (XEXP (base
, 0)) == REG
2302 && GET_CODE (XEXP (base
, 1)) == REG
2304 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2305 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2306 == GET_MODE (XEXP (base
, 0)))
2307 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]]
2308 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2309 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 1))]]
2310 == GET_MODE (XEXP (base
, 1)))
2311 && qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]])
2313 rtx tem
= qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]];
2314 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2316 /* One of the two values must be a constant. */
2317 if (GET_CODE (base
) != CONST_INT
)
2319 if (GET_CODE (tem
) != CONST_INT
)
2321 start
= INTVAL (tem
);
2325 start
= INTVAL (base
);
2330 /* Handle everything that we can find inside an address that has been
2331 viewed as constant. */
2335 /* If no part of this switch does a "continue", the code outside
2336 will exit this loop. */
2338 switch (GET_CODE (base
))
2341 /* By definition, operand1 of a LO_SUM is the associated constant
2342 address. Use the associated constant address as the base
2344 base
= XEXP (base
, 1);
2348 /* Strip off CONST. */
2349 base
= XEXP (base
, 0);
2353 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2355 start
+= INTVAL (XEXP (base
, 1));
2356 base
= XEXP (base
, 0);
2362 /* Handle the case of an AND which is the negative of a power of
2363 two. This is used to represent unaligned memory operations. */
2364 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2365 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2367 set_nonvarying_address_components (XEXP (base
, 0), size
,
2368 pbase
, pstart
, pend
);
2370 /* Assume the worst misalignment. START is affected, but not
2371 END, so compensate but adjusting SIZE. Don't lose any
2372 constant we already had. */
2374 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2375 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2388 if (GET_CODE (base
) == CONST_INT
)
2390 start
+= INTVAL (base
);
2396 /* Set the return values. */
2402 /* Return 1 if X has a value that can vary even between two
2403 executions of the program. 0 means X can be compared reliably
2404 against certain constants or near-constants. */
2407 cse_rtx_varies_p (x
)
2410 /* We need not check for X and the equivalence class being of the same
2411 mode because if X is equivalent to a constant in some mode, it
2412 doesn't vary in any mode. */
2414 if (GET_CODE (x
) == REG
2415 && REGNO_QTY_VALID_P (REGNO (x
))
2416 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2417 && qty_const
[reg_qty
[REGNO (x
)]] != 0)
2420 if (GET_CODE (x
) == PLUS
2421 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2422 && GET_CODE (XEXP (x
, 0)) == REG
2423 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2424 && (GET_MODE (XEXP (x
, 0))
2425 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2426 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]])
2429 /* This can happen as the result of virtual register instantiation, if
2430 the initial constant is too large to be a valid address. This gives
2431 us a three instruction sequence, load large offset into a register,
2432 load fp minus a constant into a register, then a MEM which is the
2433 sum of the two `constant' registers. */
2434 if (GET_CODE (x
) == PLUS
2435 && GET_CODE (XEXP (x
, 0)) == REG
2436 && GET_CODE (XEXP (x
, 1)) == REG
2437 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2438 && (GET_MODE (XEXP (x
, 0))
2439 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2440 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]]
2441 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1)))
2442 && (GET_MODE (XEXP (x
, 1))
2443 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 1))]])
2444 && qty_const
[reg_qty
[REGNO (XEXP (x
, 1))]])
2447 return rtx_varies_p (x
);
2450 /* Canonicalize an expression:
2451 replace each register reference inside it
2452 with the "oldest" equivalent register.
2454 If INSN is non-zero and we are replacing a pseudo with a hard register
2455 or vice versa, validate_change is used to ensure that INSN remains valid
2456 after we make our substitution. The calls are made with IN_GROUP non-zero
2457 so apply_change_group must be called upon the outermost return from this
2458 function (unless INSN is zero). The result of apply_change_group can
2459 generally be discarded since the changes we are making are optional. */
2467 register enum rtx_code code
;
2473 code
= GET_CODE (x
);
2491 /* Never replace a hard reg, because hard regs can appear
2492 in more than one machine mode, and we must preserve the mode
2493 of each occurrence. Also, some hard regs appear in
2494 MEMs that are shared and mustn't be altered. Don't try to
2495 replace any reg that maps to a reg of class NO_REGS. */
2496 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2497 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2500 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2501 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2502 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2503 : gen_rtx_REG (qty_mode
[reg_qty
[REGNO (x
)]], first
));
2510 fmt
= GET_RTX_FORMAT (code
);
2511 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2517 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2520 /* If replacing pseudo with hard reg or vice versa, ensure the
2521 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2522 if (insn
!= 0 && new != 0
2523 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2524 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2525 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2526 || (insn_code
= recog_memoized (insn
)) < 0
2527 || insn_n_dups
[insn_code
] > 0))
2528 validate_change (insn
, &XEXP (x
, i
), new, 1);
2532 else if (fmt
[i
] == 'E')
2533 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2534 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2540 /* LOC is a location within INSN that is an operand address (the contents of
2541 a MEM). Find the best equivalent address to use that is valid for this
2544 On most CISC machines, complicated address modes are costly, and rtx_cost
2545 is a good approximation for that cost. However, most RISC machines have
2546 only a few (usually only one) memory reference formats. If an address is
2547 valid at all, it is often just as cheap as any other address. Hence, for
2548 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2549 costs of various addresses. For two addresses of equal cost, choose the one
2550 with the highest `rtx_cost' value as that has the potential of eliminating
2551 the most insns. For equal costs, we choose the first in the equivalence
2552 class. Note that we ignore the fact that pseudo registers are cheaper
2553 than hard registers here because we would also prefer the pseudo registers.
2557 find_best_addr (insn
, loc
)
2561 struct table_elt
*elt
, *p
;
2563 int found_better
= 1;
2564 int save_do_not_record
= do_not_record
;
2565 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2566 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2571 /* Do not try to replace constant addresses or addresses of local and
2572 argument slots. These MEM expressions are made only once and inserted
2573 in many instructions, as well as being used to control symbol table
2574 output. It is not safe to clobber them.
2576 There are some uncommon cases where the address is already in a register
2577 for some reason, but we cannot take advantage of that because we have
2578 no easy way to unshare the MEM. In addition, looking up all stack
2579 addresses is costly. */
2580 if ((GET_CODE (addr
) == PLUS
2581 && GET_CODE (XEXP (addr
, 0)) == REG
2582 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2583 && (regno
= REGNO (XEXP (addr
, 0)),
2584 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2585 || regno
== ARG_POINTER_REGNUM
))
2586 || (GET_CODE (addr
) == REG
2587 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2588 || regno
== HARD_FRAME_POINTER_REGNUM
2589 || regno
== ARG_POINTER_REGNUM
))
2590 || GET_CODE (addr
) == ADDRESSOF
2591 || CONSTANT_ADDRESS_P (addr
))
2594 /* If this address is not simply a register, try to fold it. This will
2595 sometimes simplify the expression. Many simplifications
2596 will not be valid, but some, usually applying the associative rule, will
2597 be valid and produce better code. */
2598 if (GET_CODE (addr
) != REG
)
2600 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2604 && (ADDRESS_COST (folded
) < ADDRESS_COST (addr
)
2605 || (ADDRESS_COST (folded
) == ADDRESS_COST (addr
)
2606 && rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)))
2608 && rtx_cost (folded
, MEM
) < rtx_cost (addr
, MEM
)
2610 && validate_change (insn
, loc
, folded
, 0))
2614 /* If this address is not in the hash table, we can't look for equivalences
2615 of the whole address. Also, ignore if volatile. */
2618 hash
= HASH (addr
, Pmode
);
2619 addr_volatile
= do_not_record
;
2620 do_not_record
= save_do_not_record
;
2621 hash_arg_in_memory
= save_hash_arg_in_memory
;
2622 hash_arg_in_struct
= save_hash_arg_in_struct
;
2627 elt
= lookup (addr
, hash
, Pmode
);
2629 #ifndef ADDRESS_COST
2632 int our_cost
= elt
->cost
;
2634 /* Find the lowest cost below ours that works. */
2635 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2636 if (elt
->cost
< our_cost
2637 && (GET_CODE (elt
->exp
) == REG
2638 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2639 && validate_change (insn
, loc
,
2640 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2647 /* We need to find the best (under the criteria documented above) entry
2648 in the class that is valid. We use the `flag' field to indicate
2649 choices that were invalid and iterate until we can't find a better
2650 one that hasn't already been tried. */
2652 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2655 while (found_better
)
2657 int best_addr_cost
= ADDRESS_COST (*loc
);
2658 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2659 struct table_elt
*best_elt
= elt
;
2662 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2664 && (GET_CODE (p
->exp
) == REG
2665 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2666 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2667 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2668 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2671 best_addr_cost
= ADDRESS_COST (p
->exp
);
2672 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2678 if (validate_change (insn
, loc
,
2679 canon_reg (copy_rtx (best_elt
->exp
),
2688 /* If the address is a binary operation with the first operand a register
2689 and the second a constant, do the same as above, but looking for
2690 equivalences of the register. Then try to simplify before checking for
2691 the best address to use. This catches a few cases: First is when we
2692 have REG+const and the register is another REG+const. We can often merge
2693 the constants and eliminate one insn and one register. It may also be
2694 that a machine has a cheap REG+REG+const. Finally, this improves the
2695 code on the Alpha for unaligned byte stores. */
2697 if (flag_expensive_optimizations
2698 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2699 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2700 && GET_CODE (XEXP (*loc
, 0)) == REG
2701 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2703 rtx c
= XEXP (*loc
, 1);
2706 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2707 do_not_record
= save_do_not_record
;
2708 hash_arg_in_memory
= save_hash_arg_in_memory
;
2709 hash_arg_in_struct
= save_hash_arg_in_struct
;
2711 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2715 /* We need to find the best (under the criteria documented above) entry
2716 in the class that is valid. We use the `flag' field to indicate
2717 choices that were invalid and iterate until we can't find a better
2718 one that hasn't already been tried. */
2720 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2723 while (found_better
)
2725 int best_addr_cost
= ADDRESS_COST (*loc
);
2726 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2727 struct table_elt
*best_elt
= elt
;
2728 rtx best_rtx
= *loc
;
2731 /* This is at worst case an O(n^2) algorithm, so limit our search
2732 to the first 32 elements on the list. This avoids trouble
2733 compiling code with very long basic blocks that can easily
2734 call cse_gen_binary so many times that we run out of memory. */
2737 for (p
= elt
->first_same_value
, count
= 0;
2739 p
= p
->next_same_value
, count
++)
2741 && (GET_CODE (p
->exp
) == REG
2742 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2744 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2746 if ((ADDRESS_COST (new) < best_addr_cost
2747 || (ADDRESS_COST (new) == best_addr_cost
2748 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2751 best_addr_cost
= ADDRESS_COST (new);
2752 best_rtx_cost
= (COST (new) + 1) >> 1;
2760 if (validate_change (insn
, loc
,
2761 canon_reg (copy_rtx (best_rtx
),
2772 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2773 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2774 what values are being compared.
2776 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2777 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2778 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2779 compared to produce cc0.
2781 The return value is the comparison operator and is either the code of
2782 A or the code corresponding to the inverse of the comparison. */
2784 static enum rtx_code
2785 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2788 enum machine_mode
*pmode1
, *pmode2
;
2792 arg1
= *parg1
, arg2
= *parg2
;
2794 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2796 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2798 /* Set non-zero when we find something of interest. */
2800 int reverse_code
= 0;
2801 struct table_elt
*p
= 0;
2803 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2804 On machines with CC0, this is the only case that can occur, since
2805 fold_rtx will return the COMPARE or item being compared with zero
2808 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2811 /* If ARG1 is a comparison operator and CODE is testing for
2812 STORE_FLAG_VALUE, get the inner arguments. */
2814 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2817 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2818 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2819 #ifdef FLOAT_STORE_FLAG_VALUE
2820 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2821 && FLOAT_STORE_FLAG_VALUE
< 0)
2826 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2827 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2828 #ifdef FLOAT_STORE_FLAG_VALUE
2829 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2830 && FLOAT_STORE_FLAG_VALUE
< 0)
2833 x
= arg1
, reverse_code
= 1;
2836 /* ??? We could also check for
2838 (ne (and (eq (...) (const_int 1))) (const_int 0))
2840 and related forms, but let's wait until we see them occurring. */
2843 /* Look up ARG1 in the hash table and see if it has an equivalence
2844 that lets us see what is being compared. */
2845 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2847 if (p
) p
= p
->first_same_value
;
2849 for (; p
; p
= p
->next_same_value
)
2851 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2853 /* If the entry isn't valid, skip it. */
2854 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2857 if (GET_CODE (p
->exp
) == COMPARE
2858 /* Another possibility is that this machine has a compare insn
2859 that includes the comparison code. In that case, ARG1 would
2860 be equivalent to a comparison operation that would set ARG1 to
2861 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2862 ORIG_CODE is the actual comparison being done; if it is an EQ,
2863 we must reverse ORIG_CODE. On machine with a negative value
2864 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2867 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2868 && (GET_MODE_BITSIZE (inner_mode
)
2869 <= HOST_BITS_PER_WIDE_INT
)
2870 && (STORE_FLAG_VALUE
2871 & ((HOST_WIDE_INT
) 1
2872 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2873 #ifdef FLOAT_STORE_FLAG_VALUE
2875 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2876 && FLOAT_STORE_FLAG_VALUE
< 0)
2879 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2884 else if ((code
== EQ
2886 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2887 && (GET_MODE_BITSIZE (inner_mode
)
2888 <= HOST_BITS_PER_WIDE_INT
)
2889 && (STORE_FLAG_VALUE
2890 & ((HOST_WIDE_INT
) 1
2891 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2892 #ifdef FLOAT_STORE_FLAG_VALUE
2894 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2895 && FLOAT_STORE_FLAG_VALUE
< 0)
2898 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2905 /* If this is fp + constant, the equivalent is a better operand since
2906 it may let us predict the value of the comparison. */
2907 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2914 /* If we didn't find a useful equivalence for ARG1, we are done.
2915 Otherwise, set up for the next iteration. */
2919 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2920 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2921 code
= GET_CODE (x
);
2924 code
= reverse_condition (code
);
2927 /* Return our results. Return the modes from before fold_rtx
2928 because fold_rtx might produce const_int, and then it's too late. */
2929 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2930 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2935 /* Try to simplify a unary operation CODE whose output mode is to be
2936 MODE with input operand OP whose mode was originally OP_MODE.
2937 Return zero if no simplification can be made. */
2940 simplify_unary_operation (code
, mode
, op
, op_mode
)
2942 enum machine_mode mode
;
2944 enum machine_mode op_mode
;
2946 register int width
= GET_MODE_BITSIZE (mode
);
2948 /* The order of these tests is critical so that, for example, we don't
2949 check the wrong mode (input vs. output) for a conversion operation,
2950 such as FIX. At some point, this should be simplified. */
2952 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2954 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
2955 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2957 HOST_WIDE_INT hv
, lv
;
2960 if (GET_CODE (op
) == CONST_INT
)
2961 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2963 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2965 #ifdef REAL_ARITHMETIC
2966 REAL_VALUE_FROM_INT (d
, lv
, hv
, mode
);
2970 d
= (double) (~ hv
);
2971 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2972 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2973 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
2979 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2980 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2981 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
2983 #endif /* REAL_ARITHMETIC */
2984 d
= real_value_truncate (mode
, d
);
2985 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2987 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
2988 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2990 HOST_WIDE_INT hv
, lv
;
2993 if (GET_CODE (op
) == CONST_INT
)
2994 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2996 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2998 if (op_mode
== VOIDmode
)
3000 /* We don't know how to interpret negative-looking numbers in
3001 this case, so don't try to fold those. */
3005 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
3008 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
3010 #ifdef REAL_ARITHMETIC
3011 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
, mode
);
3014 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3015 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3016 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3017 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3018 #endif /* REAL_ARITHMETIC */
3019 d
= real_value_truncate (mode
, d
);
3020 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3024 if (GET_CODE (op
) == CONST_INT
3025 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3027 register HOST_WIDE_INT arg0
= INTVAL (op
);
3028 register HOST_WIDE_INT val
;
3041 val
= (arg0
>= 0 ? arg0
: - arg0
);
3045 /* Don't use ffs here. Instead, get low order bit and then its
3046 number. If arg0 is zero, this will return 0, as desired. */
3047 arg0
&= GET_MODE_MASK (mode
);
3048 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3056 if (op_mode
== VOIDmode
)
3058 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3060 /* If we were really extending the mode,
3061 we would have to distinguish between zero-extension
3062 and sign-extension. */
3063 if (width
!= GET_MODE_BITSIZE (op_mode
))
3067 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3068 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3074 if (op_mode
== VOIDmode
)
3076 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3078 /* If we were really extending the mode,
3079 we would have to distinguish between zero-extension
3080 and sign-extension. */
3081 if (width
!= GET_MODE_BITSIZE (op_mode
))
3085 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3088 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3090 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3091 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3104 /* Clear the bits that don't belong in our mode,
3105 unless they and our sign bit are all one.
3106 So we get either a reasonable negative value or a reasonable
3107 unsigned value for this mode. */
3108 if (width
< HOST_BITS_PER_WIDE_INT
3109 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3110 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3111 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3113 return GEN_INT (val
);
3116 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3117 for a DImode operation on a CONST_INT. */
3118 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3119 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3121 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3123 if (GET_CODE (op
) == CONST_DOUBLE
)
3124 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3126 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3136 neg_double (l1
, h1
, &lv
, &hv
);
3141 neg_double (l1
, h1
, &lv
, &hv
);
3149 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3151 lv
= exact_log2 (l1
& (-l1
)) + 1;
3155 /* This is just a change-of-mode, so do nothing. */
3160 if (op_mode
== VOIDmode
3161 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3165 lv
= l1
& GET_MODE_MASK (op_mode
);
3169 if (op_mode
== VOIDmode
3170 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3174 lv
= l1
& GET_MODE_MASK (op_mode
);
3175 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3176 && (lv
& ((HOST_WIDE_INT
) 1
3177 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3178 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3180 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3191 return immed_double_const (lv
, hv
, mode
);
3194 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3195 else if (GET_CODE (op
) == CONST_DOUBLE
3196 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3202 if (setjmp (handler
))
3203 /* There used to be a warning here, but that is inadvisable.
3204 People may want to cause traps, and the natural way
3205 to do it should not get a warning. */
3208 set_float_handler (handler
);
3210 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3215 d
= REAL_VALUE_NEGATE (d
);
3219 if (REAL_VALUE_NEGATIVE (d
))
3220 d
= REAL_VALUE_NEGATE (d
);
3223 case FLOAT_TRUNCATE
:
3224 d
= real_value_truncate (mode
, d
);
3228 /* All this does is change the mode. */
3232 d
= REAL_VALUE_RNDZINT (d
);
3236 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3246 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3247 set_float_handler (NULL_PTR
);
3251 else if (GET_CODE (op
) == CONST_DOUBLE
3252 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3253 && GET_MODE_CLASS (mode
) == MODE_INT
3254 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3260 if (setjmp (handler
))
3263 set_float_handler (handler
);
3265 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3270 val
= REAL_VALUE_FIX (d
);
3274 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3281 set_float_handler (NULL_PTR
);
3283 /* Clear the bits that don't belong in our mode,
3284 unless they and our sign bit are all one.
3285 So we get either a reasonable negative value or a reasonable
3286 unsigned value for this mode. */
3287 if (width
< HOST_BITS_PER_WIDE_INT
3288 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3289 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3290 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3292 /* If this would be an entire word for the target, but is not for
3293 the host, then sign-extend on the host so that the number will look
3294 the same way on the host that it would on the target.
3296 For example, when building a 64 bit alpha hosted 32 bit sparc
3297 targeted compiler, then we want the 32 bit unsigned value -1 to be
3298 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3299 The later confuses the sparc backend. */
3301 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
3302 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
3303 val
|= ((HOST_WIDE_INT
) (-1) << width
);
3305 return GEN_INT (val
);
3308 /* This was formerly used only for non-IEEE float.
3309 eggert@twinsun.com says it is safe for IEEE also. */
3312 /* There are some simplifications we can do even if the operands
3318 /* (not (not X)) == X, similarly for NEG. */
3319 if (GET_CODE (op
) == code
)
3320 return XEXP (op
, 0);
3324 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3325 becomes just the MINUS if its mode is MODE. This allows
3326 folding switch statements on machines using casesi (such as
3328 if (GET_CODE (op
) == TRUNCATE
3329 && GET_MODE (XEXP (op
, 0)) == mode
3330 && GET_CODE (XEXP (op
, 0)) == MINUS
3331 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3332 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3333 return XEXP (op
, 0);
3335 #ifdef POINTERS_EXTEND_UNSIGNED
3336 if (! POINTERS_EXTEND_UNSIGNED
3337 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3339 return convert_memory_address (Pmode
, op
);
3343 #ifdef POINTERS_EXTEND_UNSIGNED
3345 if (POINTERS_EXTEND_UNSIGNED
3346 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3348 return convert_memory_address (Pmode
, op
);
3360 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3361 and OP1. Return 0 if no simplification is possible.
3363 Don't use this for relational operations such as EQ or LT.
3364 Use simplify_relational_operation instead. */
3367 simplify_binary_operation (code
, mode
, op0
, op1
)
3369 enum machine_mode mode
;
3372 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3374 int width
= GET_MODE_BITSIZE (mode
);
3377 /* Relational operations don't work here. We must know the mode
3378 of the operands in order to do the comparison correctly.
3379 Assuming a full word can give incorrect results.
3380 Consider comparing 128 with -128 in QImode. */
3382 if (GET_RTX_CLASS (code
) == '<')
3385 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3386 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3387 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3388 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3390 REAL_VALUE_TYPE f0
, f1
, value
;
3393 if (setjmp (handler
))
3396 set_float_handler (handler
);
3398 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3399 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3400 f0
= real_value_truncate (mode
, f0
);
3401 f1
= real_value_truncate (mode
, f1
);
3403 #ifdef REAL_ARITHMETIC
3404 #ifndef REAL_INFINITY
3405 if (code
== DIV
&& REAL_VALUES_EQUAL (f1
, dconst0
))
3408 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3422 #ifndef REAL_INFINITY
3429 value
= MIN (f0
, f1
);
3432 value
= MAX (f0
, f1
);
3439 value
= real_value_truncate (mode
, value
);
3440 set_float_handler (NULL_PTR
);
3441 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3443 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3445 /* We can fold some multi-word operations. */
3446 if (GET_MODE_CLASS (mode
) == MODE_INT
3447 && width
== HOST_BITS_PER_WIDE_INT
* 2
3448 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3449 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3451 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3453 if (GET_CODE (op0
) == CONST_DOUBLE
)
3454 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3456 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3458 if (GET_CODE (op1
) == CONST_DOUBLE
)
3459 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3461 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3466 /* A - B == A + (-B). */
3467 neg_double (l2
, h2
, &lv
, &hv
);
3470 /* .. fall through ... */
3473 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3477 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3480 case DIV
: case MOD
: case UDIV
: case UMOD
:
3481 /* We'd need to include tree.h to do this and it doesn't seem worth
3486 lv
= l1
& l2
, hv
= h1
& h2
;
3490 lv
= l1
| l2
, hv
= h1
| h2
;
3494 lv
= l1
^ l2
, hv
= h1
^ h2
;
3500 && ((unsigned HOST_WIDE_INT
) l1
3501 < (unsigned HOST_WIDE_INT
) l2
)))
3510 && ((unsigned HOST_WIDE_INT
) l1
3511 > (unsigned HOST_WIDE_INT
) l2
)))
3518 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3520 && ((unsigned HOST_WIDE_INT
) l1
3521 < (unsigned HOST_WIDE_INT
) l2
)))
3528 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3530 && ((unsigned HOST_WIDE_INT
) l1
3531 > (unsigned HOST_WIDE_INT
) l2
)))
3537 case LSHIFTRT
: case ASHIFTRT
:
3539 case ROTATE
: case ROTATERT
:
3540 #ifdef SHIFT_COUNT_TRUNCATED
3541 if (SHIFT_COUNT_TRUNCATED
)
3542 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3545 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3548 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3549 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3551 else if (code
== ASHIFT
)
3552 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3553 else if (code
== ROTATE
)
3554 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3555 else /* code == ROTATERT */
3556 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3563 return immed_double_const (lv
, hv
, mode
);
3566 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3567 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3569 /* Even if we can't compute a constant result,
3570 there are some cases worth simplifying. */
3575 /* In IEEE floating point, x+0 is not the same as x. Similarly
3576 for the other optimizations below. */
3577 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3578 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3581 if (op1
== CONST0_RTX (mode
))
3584 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3585 if (GET_CODE (op0
) == NEG
)
3586 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3587 else if (GET_CODE (op1
) == NEG
)
3588 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3590 /* Handle both-operands-constant cases. We can only add
3591 CONST_INTs to constants since the sum of relocatable symbols
3592 can't be handled by most assemblers. Don't add CONST_INT
3593 to CONST_INT since overflow won't be computed properly if wider
3594 than HOST_BITS_PER_WIDE_INT. */
3596 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3597 && GET_CODE (op1
) == CONST_INT
)
3598 return plus_constant (op0
, INTVAL (op1
));
3599 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3600 && GET_CODE (op0
) == CONST_INT
)
3601 return plus_constant (op1
, INTVAL (op0
));
3603 /* See if this is something like X * C - X or vice versa or
3604 if the multiplication is written as a shift. If so, we can
3605 distribute and make a new multiply, shift, or maybe just
3606 have X (if C is 2 in the example above). But don't make
3607 real multiply if we didn't have one before. */
3609 if (! FLOAT_MODE_P (mode
))
3611 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3612 rtx lhs
= op0
, rhs
= op1
;
3615 if (GET_CODE (lhs
) == NEG
)
3616 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3617 else if (GET_CODE (lhs
) == MULT
3618 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3620 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3623 else if (GET_CODE (lhs
) == ASHIFT
3624 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3625 && INTVAL (XEXP (lhs
, 1)) >= 0
3626 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3628 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3629 lhs
= XEXP (lhs
, 0);
3632 if (GET_CODE (rhs
) == NEG
)
3633 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3634 else if (GET_CODE (rhs
) == MULT
3635 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3637 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3640 else if (GET_CODE (rhs
) == ASHIFT
3641 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3642 && INTVAL (XEXP (rhs
, 1)) >= 0
3643 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3645 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3646 rhs
= XEXP (rhs
, 0);
3649 if (rtx_equal_p (lhs
, rhs
))
3651 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3652 GEN_INT (coeff0
+ coeff1
));
3653 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3657 /* If one of the operands is a PLUS or a MINUS, see if we can
3658 simplify this by the associative law.
3659 Don't use the associative law for floating point.
3660 The inaccuracy makes it nonassociative,
3661 and subtle programs can break if operations are associated. */
3663 if (INTEGRAL_MODE_P (mode
)
3664 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3665 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3666 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3672 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3673 using cc0, in which case we want to leave it as a COMPARE
3674 so we can distinguish it from a register-register-copy.
3676 In IEEE floating point, x-0 is not the same as x. */
3678 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3679 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3680 && op1
== CONST0_RTX (mode
))
3683 /* Do nothing here. */
3688 /* None of these optimizations can be done for IEEE
3690 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3691 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3694 /* We can't assume x-x is 0 even with non-IEEE floating point,
3695 but since it is zero except in very strange circumstances, we
3696 will treat it as zero with -ffast-math. */
3697 if (rtx_equal_p (op0
, op1
)
3698 && ! side_effects_p (op0
)
3699 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3700 return CONST0_RTX (mode
);
3702 /* Change subtraction from zero into negation. */
3703 if (op0
== CONST0_RTX (mode
))
3704 return gen_rtx_NEG (mode
, op1
);
3706 /* (-1 - a) is ~a. */
3707 if (op0
== constm1_rtx
)
3708 return gen_rtx_NOT (mode
, op1
);
3710 /* Subtracting 0 has no effect. */
3711 if (op1
== CONST0_RTX (mode
))
3714 /* See if this is something like X * C - X or vice versa or
3715 if the multiplication is written as a shift. If so, we can
3716 distribute and make a new multiply, shift, or maybe just
3717 have X (if C is 2 in the example above). But don't make
3718 real multiply if we didn't have one before. */
3720 if (! FLOAT_MODE_P (mode
))
3722 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3723 rtx lhs
= op0
, rhs
= op1
;
3726 if (GET_CODE (lhs
) == NEG
)
3727 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3728 else if (GET_CODE (lhs
) == MULT
3729 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3731 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3734 else if (GET_CODE (lhs
) == ASHIFT
3735 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3736 && INTVAL (XEXP (lhs
, 1)) >= 0
3737 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3739 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3740 lhs
= XEXP (lhs
, 0);
3743 if (GET_CODE (rhs
) == NEG
)
3744 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3745 else if (GET_CODE (rhs
) == MULT
3746 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3748 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3751 else if (GET_CODE (rhs
) == ASHIFT
3752 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3753 && INTVAL (XEXP (rhs
, 1)) >= 0
3754 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3756 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3757 rhs
= XEXP (rhs
, 0);
3760 if (rtx_equal_p (lhs
, rhs
))
3762 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3763 GEN_INT (coeff0
- coeff1
));
3764 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3768 /* (a - (-b)) -> (a + b). */
3769 if (GET_CODE (op1
) == NEG
)
3770 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3772 /* If one of the operands is a PLUS or a MINUS, see if we can
3773 simplify this by the associative law.
3774 Don't use the associative law for floating point.
3775 The inaccuracy makes it nonassociative,
3776 and subtle programs can break if operations are associated. */
3778 if (INTEGRAL_MODE_P (mode
)
3779 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3780 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3781 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3784 /* Don't let a relocatable value get a negative coeff. */
3785 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3786 return plus_constant (op0
, - INTVAL (op1
));
3788 /* (x - (x & y)) -> (x & ~y) */
3789 if (GET_CODE (op1
) == AND
)
3791 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
3792 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 1)));
3793 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
3794 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 0)));
3799 if (op1
== constm1_rtx
)
3801 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3803 return tem
? tem
: gen_rtx_NEG (mode
, op0
);
3806 /* In IEEE floating point, x*0 is not always 0. */
3807 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3808 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3809 && op1
== CONST0_RTX (mode
)
3810 && ! side_effects_p (op0
))
3813 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3814 However, ANSI says we can drop signals,
3815 so we can do this anyway. */
3816 if (op1
== CONST1_RTX (mode
))
3819 /* Convert multiply by constant power of two into shift unless
3820 we are still generating RTL. This test is a kludge. */
3821 if (GET_CODE (op1
) == CONST_INT
3822 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3823 /* If the mode is larger than the host word size, and the
3824 uppermost bit is set, then this isn't a power of two due
3825 to implicit sign extension. */
3826 && (width
<= HOST_BITS_PER_WIDE_INT
3827 || val
!= HOST_BITS_PER_WIDE_INT
- 1)
3828 && ! rtx_equal_function_value_matters
)
3829 return gen_rtx_ASHIFT (mode
, op0
, GEN_INT (val
));
3831 if (GET_CODE (op1
) == CONST_DOUBLE
3832 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3836 int op1is2
, op1ism1
;
3838 if (setjmp (handler
))
3841 set_float_handler (handler
);
3842 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3843 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3844 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3845 set_float_handler (NULL_PTR
);
3847 /* x*2 is x+x and x*(-1) is -x */
3848 if (op1is2
&& GET_MODE (op0
) == mode
)
3849 return gen_rtx_PLUS (mode
, op0
, copy_rtx (op0
));
3851 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3852 return gen_rtx_NEG (mode
, op0
);
3857 if (op1
== const0_rtx
)
3859 if (GET_CODE (op1
) == CONST_INT
3860 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3862 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3864 /* A | (~A) -> -1 */
3865 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3866 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3867 && ! side_effects_p (op0
)
3868 && GET_MODE_CLASS (mode
) != MODE_CC
)
3873 if (op1
== const0_rtx
)
3875 if (GET_CODE (op1
) == CONST_INT
3876 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3877 return gen_rtx_NOT (mode
, op0
);
3878 if (op0
== op1
&& ! side_effects_p (op0
)
3879 && GET_MODE_CLASS (mode
) != MODE_CC
)
3884 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3886 if (GET_CODE (op1
) == CONST_INT
3887 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3889 if (op0
== op1
&& ! side_effects_p (op0
)
3890 && GET_MODE_CLASS (mode
) != MODE_CC
)
3893 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3894 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3895 && ! side_effects_p (op0
)
3896 && GET_MODE_CLASS (mode
) != MODE_CC
)
3901 /* Convert divide by power of two into shift (divide by 1 handled
3903 if (GET_CODE (op1
) == CONST_INT
3904 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3905 return gen_rtx_LSHIFTRT (mode
, op0
, GEN_INT (arg1
));
3907 /* ... fall through ... */
3910 if (op1
== CONST1_RTX (mode
))
3913 /* In IEEE floating point, 0/x is not always 0. */
3914 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3915 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3916 && op0
== CONST0_RTX (mode
)
3917 && ! side_effects_p (op1
))
3920 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3921 /* Change division by a constant into multiplication. Only do
3922 this with -ffast-math until an expert says it is safe in
3924 else if (GET_CODE (op1
) == CONST_DOUBLE
3925 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3926 && op1
!= CONST0_RTX (mode
)
3930 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3932 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3934 #if defined (REAL_ARITHMETIC)
3935 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3936 return gen_rtx_MULT (mode
, op0
,
3937 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3939 return gen_rtx_MULT (mode
, op0
,
3940 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3948 /* Handle modulus by power of two (mod with 1 handled below). */
3949 if (GET_CODE (op1
) == CONST_INT
3950 && exact_log2 (INTVAL (op1
)) > 0)
3951 return gen_rtx_AND (mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3953 /* ... fall through ... */
3956 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3957 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3963 /* Rotating ~0 always results in ~0. */
3964 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3965 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3966 && ! side_effects_p (op1
))
3969 /* ... fall through ... */
3974 if (op1
== const0_rtx
)
3976 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3981 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3982 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3983 && ! side_effects_p (op0
))
3985 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3990 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3992 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
3993 && ! side_effects_p (op0
))
3995 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4000 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4002 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4007 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
4009 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4020 /* Get the integer argument values in two forms:
4021 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4023 arg0
= INTVAL (op0
);
4024 arg1
= INTVAL (op1
);
4026 if (width
< HOST_BITS_PER_WIDE_INT
)
4028 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4029 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4032 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4033 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4036 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4037 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4045 /* Compute the value of the arithmetic. */
4050 val
= arg0s
+ arg1s
;
4054 val
= arg0s
- arg1s
;
4058 val
= arg0s
* arg1s
;
4064 val
= arg0s
/ arg1s
;
4070 val
= arg0s
% arg1s
;
4076 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4082 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4098 /* If shift count is undefined, don't fold it; let the machine do
4099 what it wants. But truncate it if the machine will do that. */
4103 #ifdef SHIFT_COUNT_TRUNCATED
4104 if (SHIFT_COUNT_TRUNCATED
)
4108 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4115 #ifdef SHIFT_COUNT_TRUNCATED
4116 if (SHIFT_COUNT_TRUNCATED
)
4120 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4127 #ifdef SHIFT_COUNT_TRUNCATED
4128 if (SHIFT_COUNT_TRUNCATED
)
4132 val
= arg0s
>> arg1
;
4134 /* Bootstrap compiler may not have sign extended the right shift.
4135 Manually extend the sign to insure bootstrap cc matches gcc. */
4136 if (arg0s
< 0 && arg1
> 0)
4137 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4146 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4147 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4155 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4156 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4160 /* Do nothing here. */
4164 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4168 val
= ((unsigned HOST_WIDE_INT
) arg0
4169 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4173 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4177 val
= ((unsigned HOST_WIDE_INT
) arg0
4178 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4185 /* Clear the bits that don't belong in our mode, unless they and our sign
4186 bit are all one. So we get either a reasonable negative value or a
4187 reasonable unsigned value for this mode. */
4188 if (width
< HOST_BITS_PER_WIDE_INT
4189 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4190 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4191 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4193 /* If this would be an entire word for the target, but is not for
4194 the host, then sign-extend on the host so that the number will look
4195 the same way on the host that it would on the target.
4197 For example, when building a 64 bit alpha hosted 32 bit sparc
4198 targeted compiler, then we want the 32 bit unsigned value -1 to be
4199 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4200 The later confuses the sparc backend. */
4202 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
4203 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
4204 val
|= ((HOST_WIDE_INT
) (-1) << width
);
4206 return GEN_INT (val
);
4209 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4212 Rather than test for specific case, we do this by a brute-force method
4213 and do all possible simplifications until no more changes occur. Then
4214 we rebuild the operation. */
4217 simplify_plus_minus (code
, mode
, op0
, op1
)
4219 enum machine_mode mode
;
4225 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4226 int first
= 1, negate
= 0, changed
;
4229 bzero ((char *) ops
, sizeof ops
);
4231 /* Set up the two operands and then expand them until nothing has been
4232 changed. If we run out of room in our array, give up; this should
4233 almost never happen. */
4235 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4242 for (i
= 0; i
< n_ops
; i
++)
4243 switch (GET_CODE (ops
[i
]))
4250 ops
[n_ops
] = XEXP (ops
[i
], 1);
4251 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4252 ops
[i
] = XEXP (ops
[i
], 0);
4258 ops
[i
] = XEXP (ops
[i
], 0);
4259 negs
[i
] = ! negs
[i
];
4264 ops
[i
] = XEXP (ops
[i
], 0);
4270 /* ~a -> (-a - 1) */
4273 ops
[n_ops
] = constm1_rtx
;
4274 negs
[n_ops
++] = negs
[i
];
4275 ops
[i
] = XEXP (ops
[i
], 0);
4276 negs
[i
] = ! negs
[i
];
4283 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4291 /* If we only have two operands, we can't do anything. */
4295 /* Now simplify each pair of operands until nothing changes. The first
4296 time through just simplify constants against each other. */
4303 for (i
= 0; i
< n_ops
- 1; i
++)
4304 for (j
= i
+ 1; j
< n_ops
; j
++)
4305 if (ops
[i
] != 0 && ops
[j
] != 0
4306 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4308 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4309 enum rtx_code ncode
= PLUS
;
4311 if (negs
[i
] && ! negs
[j
])
4312 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4313 else if (! negs
[i
] && negs
[j
])
4316 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4319 ops
[i
] = tem
, ops
[j
] = 0;
4320 negs
[i
] = negs
[i
] && negs
[j
];
4321 if (GET_CODE (tem
) == NEG
)
4322 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4324 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4325 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4333 /* Pack all the operands to the lower-numbered entries and give up if
4334 we didn't reduce the number of operands we had. Make sure we
4335 count a CONST as two operands. If we have the same number of
4336 operands, but have made more CONSTs than we had, this is also
4337 an improvement, so accept it. */
4339 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4342 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4343 if (GET_CODE (ops
[j
]) == CONST
)
4347 if (i
+ n_consts
> input_ops
4348 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4353 /* If we have a CONST_INT, put it last. */
4354 for (i
= 0; i
< n_ops
- 1; i
++)
4355 if (GET_CODE (ops
[i
]) == CONST_INT
)
4357 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4358 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4361 /* Put a non-negated operand first. If there aren't any, make all
4362 operands positive and negate the whole thing later. */
4363 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4368 for (i
= 0; i
< n_ops
; i
++)
4374 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4375 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4378 /* Now make the result by performing the requested operations. */
4380 for (i
= 1; i
< n_ops
; i
++)
4381 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4383 return negate
? gen_rtx_NEG (mode
, result
) : result
;
4386 /* Make a binary operation by properly ordering the operands and
4387 seeing if the expression folds. */
4390 cse_gen_binary (code
, mode
, op0
, op1
)
4392 enum machine_mode mode
;
4397 /* Put complex operands first and constants second if commutative. */
4398 if (GET_RTX_CLASS (code
) == 'c'
4399 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4400 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4401 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4402 || (GET_CODE (op0
) == SUBREG
4403 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4404 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4405 tem
= op0
, op0
= op1
, op1
= tem
;
4407 /* If this simplifies, do it. */
4408 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4413 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4414 just form the operation. */
4416 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4417 && GET_MODE (op0
) != VOIDmode
)
4418 return plus_constant (op0
, INTVAL (op1
));
4419 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4420 && GET_MODE (op0
) != VOIDmode
)
4421 return plus_constant (op0
, - INTVAL (op1
));
4423 return gen_rtx_fmt_ee (code
, mode
, op0
, op1
);
4426 /* Like simplify_binary_operation except used for relational operators.
4427 MODE is the mode of the operands, not that of the result. If MODE
4428 is VOIDmode, both operands must also be VOIDmode and we compare the
4429 operands in "infinite precision".
4431 If no simplification is possible, this function returns zero. Otherwise,
4432 it returns either const_true_rtx or const0_rtx. */
4435 simplify_relational_operation (code
, mode
, op0
, op1
)
4437 enum machine_mode mode
;
4440 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4443 /* If op0 is a compare, extract the comparison arguments from it. */
4444 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4445 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4447 /* We can't simplify MODE_CC values since we don't know what the
4448 actual comparison is. */
4449 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4456 /* For integer comparisons of A and B maybe we can simplify A - B and can
4457 then simplify a comparison of that with zero. If A and B are both either
4458 a register or a CONST_INT, this can't help; testing for these cases will
4459 prevent infinite recursion here and speed things up.
4461 If CODE is an unsigned comparison, then we can never do this optimization,
4462 because it gives an incorrect result if the subtraction wraps around zero.
4463 ANSI C defines unsigned operations such that they never overflow, and
4464 thus such cases can not be ignored. */
4466 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4467 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4468 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4469 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4470 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4471 return simplify_relational_operation (signed_condition (code
),
4472 mode
, tem
, const0_rtx
);
4474 /* For non-IEEE floating-point, if the two operands are equal, we know the
4476 if (rtx_equal_p (op0
, op1
)
4477 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4478 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4479 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4481 /* If the operands are floating-point constants, see if we can fold
4483 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4484 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4485 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4487 REAL_VALUE_TYPE d0
, d1
;
4490 if (setjmp (handler
))
4493 set_float_handler (handler
);
4494 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4495 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4496 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4497 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4498 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4499 set_float_handler (NULL_PTR
);
4501 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4503 /* Otherwise, see if the operands are both integers. */
4504 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4505 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4506 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4508 int width
= GET_MODE_BITSIZE (mode
);
4509 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4510 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4512 /* Get the two words comprising each integer constant. */
4513 if (GET_CODE (op0
) == CONST_DOUBLE
)
4515 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4516 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4520 l0u
= l0s
= INTVAL (op0
);
4521 h0u
= h0s
= l0s
< 0 ? -1 : 0;
4524 if (GET_CODE (op1
) == CONST_DOUBLE
)
4526 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4527 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4531 l1u
= l1s
= INTVAL (op1
);
4532 h1u
= h1s
= l1s
< 0 ? -1 : 0;
4535 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4536 we have to sign or zero-extend the values. */
4537 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4538 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4540 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4542 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4543 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4545 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4546 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4548 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4549 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4552 equal
= (h0u
== h1u
&& l0u
== l1u
);
4553 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4554 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4555 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4556 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4559 /* Otherwise, there are some code-specific tests we can make. */
4565 /* References to the frame plus a constant or labels cannot
4566 be zero, but a SYMBOL_REF can due to #pragma weak. */
4567 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4568 || GET_CODE (op0
) == LABEL_REF
)
4569 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4570 /* On some machines, the ap reg can be 0 sometimes. */
4571 && op0
!= arg_pointer_rtx
4578 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4579 || GET_CODE (op0
) == LABEL_REF
)
4580 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4581 && op0
!= arg_pointer_rtx
4584 return const_true_rtx
;
4588 /* Unsigned values are never negative. */
4589 if (op1
== const0_rtx
)
4590 return const_true_rtx
;
4594 if (op1
== const0_rtx
)
4599 /* Unsigned values are never greater than the largest
4601 if (GET_CODE (op1
) == CONST_INT
4602 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4603 && INTEGRAL_MODE_P (mode
))
4604 return const_true_rtx
;
4608 if (GET_CODE (op1
) == CONST_INT
4609 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4610 && INTEGRAL_MODE_P (mode
))
4621 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4626 return equal
? const_true_rtx
: const0_rtx
;
4628 return ! equal
? const_true_rtx
: const0_rtx
;
4630 return op0lt
? const_true_rtx
: const0_rtx
;
4632 return op1lt
? const_true_rtx
: const0_rtx
;
4634 return op0ltu
? const_true_rtx
: const0_rtx
;
4636 return op1ltu
? const_true_rtx
: const0_rtx
;
4638 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4640 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4642 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4644 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4650 /* Simplify CODE, an operation with result mode MODE and three operands,
4651 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4652 a constant. Return 0 if no simplifications is possible. */
4655 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4657 enum machine_mode mode
, op0_mode
;
4660 int width
= GET_MODE_BITSIZE (mode
);
4662 /* VOIDmode means "infinite" precision. */
4664 width
= HOST_BITS_PER_WIDE_INT
;
4670 if (GET_CODE (op0
) == CONST_INT
4671 && GET_CODE (op1
) == CONST_INT
4672 && GET_CODE (op2
) == CONST_INT
4673 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4674 && width
<= HOST_BITS_PER_WIDE_INT
)
4676 /* Extracting a bit-field from a constant */
4677 HOST_WIDE_INT val
= INTVAL (op0
);
4679 if (BITS_BIG_ENDIAN
)
4680 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4681 - INTVAL (op2
) - INTVAL (op1
));
4683 val
>>= INTVAL (op2
);
4685 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4687 /* First zero-extend. */
4688 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4689 /* If desired, propagate sign bit. */
4690 if (code
== SIGN_EXTRACT
4691 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4692 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4695 /* Clear the bits that don't belong in our mode,
4696 unless they and our sign bit are all one.
4697 So we get either a reasonable negative value or a reasonable
4698 unsigned value for this mode. */
4699 if (width
< HOST_BITS_PER_WIDE_INT
4700 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4701 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4702 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4704 return GEN_INT (val
);
4709 if (GET_CODE (op0
) == CONST_INT
)
4710 return op0
!= const0_rtx
? op1
: op2
;
4712 /* Convert a == b ? b : a to "a". */
4713 if (GET_CODE (op0
) == NE
&& ! side_effects_p (op0
)
4714 && rtx_equal_p (XEXP (op0
, 0), op1
)
4715 && rtx_equal_p (XEXP (op0
, 1), op2
))
4717 else if (GET_CODE (op0
) == EQ
&& ! side_effects_p (op0
)
4718 && rtx_equal_p (XEXP (op0
, 1), op1
)
4719 && rtx_equal_p (XEXP (op0
, 0), op2
))
4721 else if (GET_RTX_CLASS (GET_CODE (op0
)) == '<' && ! side_effects_p (op0
))
4724 temp
= simplify_relational_operation (GET_CODE (op0
), op0_mode
,
4725 XEXP (op0
, 0), XEXP (op0
, 1));
4726 /* See if any simplifications were possible. */
4727 if (temp
== const0_rtx
)
4729 else if (temp
== const1_rtx
)
4741 /* If X is a nontrivial arithmetic operation on an argument
4742 for which a constant value can be determined, return
4743 the result of operating on that value, as a constant.
4744 Otherwise, return X, possibly with one or more operands
4745 modified by recursive calls to this function.
4747 If X is a register whose contents are known, we do NOT
4748 return those contents here. equiv_constant is called to
4751 INSN is the insn that we may be modifying. If it is 0, make a copy
4752 of X before modifying it. */
4759 register enum rtx_code code
;
4760 register enum machine_mode mode
;
4767 /* Folded equivalents of first two operands of X. */
4771 /* Constant equivalents of first three operands of X;
4772 0 when no such equivalent is known. */
4777 /* The mode of the first operand of X. We need this for sign and zero
4779 enum machine_mode mode_arg0
;
4784 mode
= GET_MODE (x
);
4785 code
= GET_CODE (x
);
4794 /* No use simplifying an EXPR_LIST
4795 since they are used only for lists of args
4796 in a function call's REG_EQUAL note. */
4798 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4799 want to (e.g.,) make (addressof (const_int 0)) just because
4800 the location is known to be zero. */
4806 return prev_insn_cc0
;
4810 /* If the next insn is a CODE_LABEL followed by a jump table,
4811 PC's value is a LABEL_REF pointing to that label. That
4812 lets us fold switch statements on the Vax. */
4813 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4815 rtx next
= next_nonnote_insn (insn
);
4817 if (next
&& GET_CODE (next
) == CODE_LABEL
4818 && NEXT_INSN (next
) != 0
4819 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4820 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4821 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4822 return gen_rtx_LABEL_REF (Pmode
, next
);
4827 /* See if we previously assigned a constant value to this SUBREG. */
4828 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4829 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4832 /* If this is a paradoxical SUBREG, we have no idea what value the
4833 extra bits would have. However, if the operand is equivalent
4834 to a SUBREG whose operand is the same as our mode, and all the
4835 modes are within a word, we can just use the inner operand
4836 because these SUBREGs just say how to treat the register.
4838 Similarly if we find an integer constant. */
4840 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4842 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4843 struct table_elt
*elt
;
4845 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4846 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4847 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4849 for (elt
= elt
->first_same_value
;
4850 elt
; elt
= elt
->next_same_value
)
4852 if (CONSTANT_P (elt
->exp
)
4853 && GET_MODE (elt
->exp
) == VOIDmode
)
4856 if (GET_CODE (elt
->exp
) == SUBREG
4857 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4858 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4859 return copy_rtx (SUBREG_REG (elt
->exp
));
4865 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4866 We might be able to if the SUBREG is extracting a single word in an
4867 integral mode or extracting the low part. */
4869 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4870 const_arg0
= equiv_constant (folded_arg0
);
4872 folded_arg0
= const_arg0
;
4874 if (folded_arg0
!= SUBREG_REG (x
))
4878 if (GET_MODE_CLASS (mode
) == MODE_INT
4879 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4880 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4881 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4882 GET_MODE (SUBREG_REG (x
)));
4883 if (new == 0 && subreg_lowpart_p (x
))
4884 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4889 /* If this is a narrowing SUBREG and our operand is a REG, see if
4890 we can find an equivalence for REG that is an arithmetic operation
4891 in a wider mode where both operands are paradoxical SUBREGs
4892 from objects of our result mode. In that case, we couldn't report
4893 an equivalent value for that operation, since we don't know what the
4894 extra bits will be. But we can find an equivalence for this SUBREG
4895 by folding that operation is the narrow mode. This allows us to
4896 fold arithmetic in narrow modes when the machine only supports
4897 word-sized arithmetic.
4899 Also look for a case where we have a SUBREG whose operand is the
4900 same as our result. If both modes are smaller than a word, we
4901 are simply interpreting a register in different modes and we
4902 can use the inner value. */
4904 if (GET_CODE (folded_arg0
) == REG
4905 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4906 && subreg_lowpart_p (x
))
4908 struct table_elt
*elt
;
4910 /* We can use HASH here since we know that canon_hash won't be
4912 elt
= lookup (folded_arg0
,
4913 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4914 GET_MODE (folded_arg0
));
4917 elt
= elt
->first_same_value
;
4919 for (; elt
; elt
= elt
->next_same_value
)
4921 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4923 /* Just check for unary and binary operations. */
4924 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4925 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4926 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4927 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4928 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4930 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4932 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4933 op0
= fold_rtx (op0
, NULL_RTX
);
4935 op0
= equiv_constant (op0
);
4937 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4940 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4941 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4942 && eltcode
!= DIV
&& eltcode
!= MOD
4943 && eltcode
!= UDIV
&& eltcode
!= UMOD
4944 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4945 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4946 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4947 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4949 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4950 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4951 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4953 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4955 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4956 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4958 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4959 op0
= fold_rtx (op0
, NULL_RTX
);
4962 op0
= equiv_constant (op0
);
4964 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4965 op1
= fold_rtx (op1
, NULL_RTX
);
4968 op1
= equiv_constant (op1
);
4970 /* If we are looking for the low SImode part of
4971 (ashift:DI c (const_int 32)), it doesn't work
4972 to compute that in SImode, because a 32-bit shift
4973 in SImode is unpredictable. We know the value is 0. */
4975 && GET_CODE (elt
->exp
) == ASHIFT
4976 && GET_CODE (op1
) == CONST_INT
4977 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4979 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4981 /* If the count fits in the inner mode's width,
4982 but exceeds the outer mode's width,
4983 the value will get truncated to 0
4987 /* If the count exceeds even the inner mode's width,
4988 don't fold this expression. */
4991 else if (op0
&& op1
)
4992 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4996 else if (GET_CODE (elt
->exp
) == SUBREG
4997 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4998 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
5000 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5001 new = copy_rtx (SUBREG_REG (elt
->exp
));
5012 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5013 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5014 new = lookup_as_function (XEXP (x
, 0), code
);
5016 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
5020 /* If we are not actually processing an insn, don't try to find the
5021 best address. Not only don't we care, but we could modify the
5022 MEM in an invalid way since we have no insn to validate against. */
5024 find_best_addr (insn
, &XEXP (x
, 0));
5027 /* Even if we don't fold in the insn itself,
5028 we can safely do so here, in hopes of getting a constant. */
5029 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5031 HOST_WIDE_INT offset
= 0;
5033 if (GET_CODE (addr
) == REG
5034 && REGNO_QTY_VALID_P (REGNO (addr
))
5035 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
5036 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
5037 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
5039 /* If address is constant, split it into a base and integer offset. */
5040 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5042 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5043 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5045 base
= XEXP (XEXP (addr
, 0), 0);
5046 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5048 else if (GET_CODE (addr
) == LO_SUM
5049 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5050 base
= XEXP (addr
, 1);
5051 else if (GET_CODE (addr
) == ADDRESSOF
)
5052 return change_address (x
, VOIDmode
, addr
);
5054 /* If this is a constant pool reference, we can fold it into its
5055 constant to allow better value tracking. */
5056 if (base
&& GET_CODE (base
) == SYMBOL_REF
5057 && CONSTANT_POOL_ADDRESS_P (base
))
5059 rtx constant
= get_pool_constant (base
);
5060 enum machine_mode const_mode
= get_pool_mode (base
);
5063 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5064 constant_pool_entries_cost
= COST (constant
);
5066 /* If we are loading the full constant, we have an equivalence. */
5067 if (offset
== 0 && mode
== const_mode
)
5070 /* If this actually isn't a constant (weird!), we can't do
5071 anything. Otherwise, handle the two most common cases:
5072 extracting a word from a multi-word constant, and extracting
5073 the low-order bits. Other cases don't seem common enough to
5075 if (! CONSTANT_P (constant
))
5078 if (GET_MODE_CLASS (mode
) == MODE_INT
5079 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5080 && offset
% UNITS_PER_WORD
== 0
5081 && (new = operand_subword (constant
,
5082 offset
/ UNITS_PER_WORD
,
5083 0, const_mode
)) != 0)
5086 if (((BYTES_BIG_ENDIAN
5087 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5088 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5089 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5093 /* If this is a reference to a label at a known position in a jump
5094 table, we also know its value. */
5095 if (base
&& GET_CODE (base
) == LABEL_REF
)
5097 rtx label
= XEXP (base
, 0);
5098 rtx table_insn
= NEXT_INSN (label
);
5100 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5101 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5103 rtx table
= PATTERN (table_insn
);
5106 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5107 < XVECLEN (table
, 0)))
5108 return XVECEXP (table
, 0,
5109 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5111 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5112 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5114 rtx table
= PATTERN (table_insn
);
5117 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5118 < XVECLEN (table
, 1)))
5120 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5121 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
5124 if (GET_MODE (table
) != Pmode
)
5125 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
5127 /* Indicate this is a constant. This isn't a
5128 valid form of CONST, but it will only be used
5129 to fold the next insns and then discarded, so
5130 it should be safe. */
5131 return gen_rtx_CONST (GET_MODE (new), new);
5140 for (i
= XVECLEN (x
, 3) - 1; i
>= 0; i
--)
5141 validate_change (insn
, &XVECEXP (x
, 3, i
),
5142 fold_rtx (XVECEXP (x
, 3, i
), insn
), 0);
5152 mode_arg0
= VOIDmode
;
5154 /* Try folding our operands.
5155 Then see which ones have constant values known. */
5157 fmt
= GET_RTX_FORMAT (code
);
5158 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5161 rtx arg
= XEXP (x
, i
);
5162 rtx folded_arg
= arg
, const_arg
= 0;
5163 enum machine_mode mode_arg
= GET_MODE (arg
);
5164 rtx cheap_arg
, expensive_arg
;
5165 rtx replacements
[2];
5168 /* Most arguments are cheap, so handle them specially. */
5169 switch (GET_CODE (arg
))
5172 /* This is the same as calling equiv_constant; it is duplicated
5174 if (REGNO_QTY_VALID_P (REGNO (arg
))
5175 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5176 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5177 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5179 = gen_lowpart_if_possible (GET_MODE (arg
),
5180 qty_const
[reg_qty
[REGNO (arg
)]]);
5193 folded_arg
= prev_insn_cc0
;
5194 mode_arg
= prev_insn_cc0_mode
;
5195 const_arg
= equiv_constant (folded_arg
);
5200 folded_arg
= fold_rtx (arg
, insn
);
5201 const_arg
= equiv_constant (folded_arg
);
5204 /* For the first three operands, see if the operand
5205 is constant or equivalent to a constant. */
5209 folded_arg0
= folded_arg
;
5210 const_arg0
= const_arg
;
5211 mode_arg0
= mode_arg
;
5214 folded_arg1
= folded_arg
;
5215 const_arg1
= const_arg
;
5218 const_arg2
= const_arg
;
5222 /* Pick the least expensive of the folded argument and an
5223 equivalent constant argument. */
5224 if (const_arg
== 0 || const_arg
== folded_arg
5225 || COST (const_arg
) > COST (folded_arg
))
5226 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5228 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5230 /* Try to replace the operand with the cheapest of the two
5231 possibilities. If it doesn't work and this is either of the first
5232 two operands of a commutative operation, try swapping them.
5233 If THAT fails, try the more expensive, provided it is cheaper
5234 than what is already there. */
5236 if (cheap_arg
== XEXP (x
, i
))
5239 if (insn
== 0 && ! copied
)
5245 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5247 j
< 2 && replacements
[j
]
5248 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5251 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5254 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5256 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5257 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5259 if (apply_change_group ())
5261 /* Swap them back to be invalid so that this loop can
5262 continue and flag them to be swapped back later. */
5265 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5277 /* Don't try to fold inside of a vector of expressions.
5278 Doing nothing is harmless. */
5282 /* If a commutative operation, place a constant integer as the second
5283 operand unless the first operand is also a constant integer. Otherwise,
5284 place any constant second unless the first operand is also a constant. */
5286 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5288 if (must_swap
|| (const_arg0
5290 || (GET_CODE (const_arg0
) == CONST_INT
5291 && GET_CODE (const_arg1
) != CONST_INT
))))
5293 register rtx tem
= XEXP (x
, 0);
5295 if (insn
== 0 && ! copied
)
5301 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5302 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5303 if (apply_change_group ())
5305 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5306 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5311 /* If X is an arithmetic operation, see if we can simplify it. */
5313 switch (GET_RTX_CLASS (code
))
5319 /* We can't simplify extension ops unless we know the
5321 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5322 && mode_arg0
== VOIDmode
)
5325 /* If we had a CONST, strip it off and put it back later if we
5327 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5328 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5330 new = simplify_unary_operation (code
, mode
,
5331 const_arg0
? const_arg0
: folded_arg0
,
5333 if (new != 0 && is_const
)
5334 new = gen_rtx_CONST (mode
, new);
5339 /* See what items are actually being compared and set FOLDED_ARG[01]
5340 to those values and CODE to the actual comparison code. If any are
5341 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5342 do anything if both operands are already known to be constant. */
5344 if (const_arg0
== 0 || const_arg1
== 0)
5346 struct table_elt
*p0
, *p1
;
5347 rtx
true = const_true_rtx
, false = const0_rtx
;
5348 enum machine_mode mode_arg1
;
5350 #ifdef FLOAT_STORE_FLAG_VALUE
5351 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5353 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5355 false = CONST0_RTX (mode
);
5359 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5360 &mode_arg0
, &mode_arg1
);
5361 const_arg0
= equiv_constant (folded_arg0
);
5362 const_arg1
= equiv_constant (folded_arg1
);
5364 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5365 what kinds of things are being compared, so we can't do
5366 anything with this comparison. */
5368 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5371 /* If we do not now have two constants being compared, see
5372 if we can nevertheless deduce some things about the
5374 if (const_arg0
== 0 || const_arg1
== 0)
5376 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5377 non-explicit constant? These aren't zero, but we
5378 don't know their sign. */
5379 if (const_arg1
== const0_rtx
5380 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5381 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5383 || GET_CODE (folded_arg0
) == SYMBOL_REF
5385 || GET_CODE (folded_arg0
) == LABEL_REF
5386 || GET_CODE (folded_arg0
) == CONST
))
5390 else if (code
== NE
)
5394 /* See if the two operands are the same. We don't do this
5395 for IEEE floating-point since we can't assume x == x
5396 since x might be a NaN. */
5398 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5399 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5400 && (folded_arg0
== folded_arg1
5401 || (GET_CODE (folded_arg0
) == REG
5402 && GET_CODE (folded_arg1
) == REG
5403 && (reg_qty
[REGNO (folded_arg0
)]
5404 == reg_qty
[REGNO (folded_arg1
)]))
5405 || ((p0
= lookup (folded_arg0
,
5406 (safe_hash (folded_arg0
, mode_arg0
)
5407 % NBUCKETS
), mode_arg0
))
5408 && (p1
= lookup (folded_arg1
,
5409 (safe_hash (folded_arg1
, mode_arg0
)
5410 % NBUCKETS
), mode_arg0
))
5411 && p0
->first_same_value
== p1
->first_same_value
)))
5412 return ((code
== EQ
|| code
== LE
|| code
== GE
5413 || code
== LEU
|| code
== GEU
)
5416 /* If FOLDED_ARG0 is a register, see if the comparison we are
5417 doing now is either the same as we did before or the reverse
5418 (we only check the reverse if not floating-point). */
5419 else if (GET_CODE (folded_arg0
) == REG
)
5421 int qty
= reg_qty
[REGNO (folded_arg0
)];
5423 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5424 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5425 || (comparison_dominates_p (qty_comparison_code
[qty
],
5426 reverse_condition (code
))
5427 && ! FLOAT_MODE_P (mode_arg0
)))
5428 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5430 && rtx_equal_p (qty_comparison_const
[qty
],
5432 || (GET_CODE (folded_arg1
) == REG
5433 && (reg_qty
[REGNO (folded_arg1
)]
5434 == qty_comparison_qty
[qty
]))))
5435 return (comparison_dominates_p (qty_comparison_code
[qty
],
5442 /* If we are comparing against zero, see if the first operand is
5443 equivalent to an IOR with a constant. If so, we may be able to
5444 determine the result of this comparison. */
5446 if (const_arg1
== const0_rtx
)
5448 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5452 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5453 && GET_CODE (inner_const
) == CONST_INT
5454 && INTVAL (inner_const
) != 0)
5456 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5457 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5458 && (INTVAL (inner_const
)
5459 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5460 rtx
true = const_true_rtx
, false = const0_rtx
;
5462 #ifdef FLOAT_STORE_FLAG_VALUE
5463 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5465 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5467 false = CONST0_RTX (mode
);
5491 new = simplify_relational_operation (code
, mode_arg0
,
5492 const_arg0
? const_arg0
: folded_arg0
,
5493 const_arg1
? const_arg1
: folded_arg1
);
5494 #ifdef FLOAT_STORE_FLAG_VALUE
5495 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5496 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5497 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5506 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5507 with that LABEL_REF as its second operand. If so, the result is
5508 the first operand of that MINUS. This handles switches with an
5509 ADDR_DIFF_VEC table. */
5510 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5513 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5514 : lookup_as_function (folded_arg0
, MINUS
);
5516 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5517 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5520 /* Now try for a CONST of a MINUS like the above. */
5521 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5522 : lookup_as_function (folded_arg0
, CONST
))) != 0
5523 && GET_CODE (XEXP (y
, 0)) == MINUS
5524 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5525 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5526 return XEXP (XEXP (y
, 0), 0);
5529 /* Likewise if the operands are in the other order. */
5530 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5533 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5534 : lookup_as_function (folded_arg1
, MINUS
);
5536 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5537 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5540 /* Now try for a CONST of a MINUS like the above. */
5541 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5542 : lookup_as_function (folded_arg1
, CONST
))) != 0
5543 && GET_CODE (XEXP (y
, 0)) == MINUS
5544 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5545 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5546 return XEXP (XEXP (y
, 0), 0);
5549 /* If second operand is a register equivalent to a negative
5550 CONST_INT, see if we can find a register equivalent to the
5551 positive constant. Make a MINUS if so. Don't do this for
5552 a non-negative constant since we might then alternate between
5553 chosing positive and negative constants. Having the positive
5554 constant previously-used is the more common case. Be sure
5555 the resulting constant is non-negative; if const_arg1 were
5556 the smallest negative number this would overflow: depending
5557 on the mode, this would either just be the same value (and
5558 hence not save anything) or be incorrect. */
5559 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
5560 && INTVAL (const_arg1
) < 0
5561 && - INTVAL (const_arg1
) >= 0
5562 && GET_CODE (folded_arg1
) == REG
)
5564 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5566 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5570 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5571 if (GET_CODE (p
->exp
) == REG
)
5572 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5573 canon_reg (p
->exp
, NULL_RTX
));
5578 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5579 If so, produce (PLUS Z C2-C). */
5580 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5582 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5583 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5584 return fold_rtx (plus_constant (copy_rtx (y
),
5585 -INTVAL (const_arg1
)),
5589 /* ... fall through ... */
5592 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5593 case IOR
: case AND
: case XOR
:
5594 case MULT
: case DIV
: case UDIV
:
5595 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5596 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5597 is known to be of similar form, we may be able to replace the
5598 operation with a combined operation. This may eliminate the
5599 intermediate operation if every use is simplified in this way.
5600 Note that the similar optimization done by combine.c only works
5601 if the intermediate operation's result has only one reference. */
5603 if (GET_CODE (folded_arg0
) == REG
5604 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5607 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5608 rtx y
= lookup_as_function (folded_arg0
, code
);
5610 enum rtx_code associate_code
;
5614 || 0 == (inner_const
5615 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5616 || GET_CODE (inner_const
) != CONST_INT
5617 /* If we have compiled a statement like
5618 "if (x == (x & mask1))", and now are looking at
5619 "x & mask2", we will have a case where the first operand
5620 of Y is the same as our first operand. Unless we detect
5621 this case, an infinite loop will result. */
5622 || XEXP (y
, 0) == folded_arg0
)
5625 /* Don't associate these operations if they are a PLUS with the
5626 same constant and it is a power of two. These might be doable
5627 with a pre- or post-increment. Similarly for two subtracts of
5628 identical powers of two with post decrement. */
5630 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5632 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5633 || exact_log2 (INTVAL (const_arg1
)) >= 0
5635 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5636 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5641 /* Compute the code used to compose the constants. For example,
5642 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5645 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5646 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5648 new_const
= simplify_binary_operation (associate_code
, mode
,
5649 const_arg1
, inner_const
);
5654 /* If we are associating shift operations, don't let this
5655 produce a shift of the size of the object or larger.
5656 This could occur when we follow a sign-extend by a right
5657 shift on a machine that does a sign-extend as a pair
5660 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5661 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5663 /* As an exception, we can turn an ASHIFTRT of this
5664 form into a shift of the number of bits - 1. */
5665 if (code
== ASHIFTRT
)
5666 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5671 y
= copy_rtx (XEXP (y
, 0));
5673 /* If Y contains our first operand (the most common way this
5674 can happen is if Y is a MEM), we would do into an infinite
5675 loop if we tried to fold it. So don't in that case. */
5677 if (! reg_mentioned_p (folded_arg0
, y
))
5678 y
= fold_rtx (y
, insn
);
5680 return cse_gen_binary (code
, mode
, y
, new_const
);
5688 new = simplify_binary_operation (code
, mode
,
5689 const_arg0
? const_arg0
: folded_arg0
,
5690 const_arg1
? const_arg1
: folded_arg1
);
5694 /* (lo_sum (high X) X) is simply X. */
5695 if (code
== LO_SUM
&& const_arg0
!= 0
5696 && GET_CODE (const_arg0
) == HIGH
5697 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5703 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5704 const_arg0
? const_arg0
: folded_arg0
,
5705 const_arg1
? const_arg1
: folded_arg1
,
5706 const_arg2
? const_arg2
: XEXP (x
, 2));
5710 return new ? new : x
;
5713 /* Return a constant value currently equivalent to X.
5714 Return 0 if we don't know one. */
5720 if (GET_CODE (x
) == REG
5721 && REGNO_QTY_VALID_P (REGNO (x
))
5722 && qty_const
[reg_qty
[REGNO (x
)]])
5723 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5725 if (x
!= 0 && CONSTANT_P (x
))
5728 /* If X is a MEM, try to fold it outside the context of any insn to see if
5729 it might be equivalent to a constant. That handles the case where it
5730 is a constant-pool reference. Then try to look it up in the hash table
5731 in case it is something whose value we have seen before. */
5733 if (GET_CODE (x
) == MEM
)
5735 struct table_elt
*elt
;
5737 x
= fold_rtx (x
, NULL_RTX
);
5741 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5745 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5746 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5753 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5754 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5755 least-significant part of X.
5756 MODE specifies how big a part of X to return.
5758 If the requested operation cannot be done, 0 is returned.
5760 This is similar to gen_lowpart in emit-rtl.c. */
5763 gen_lowpart_if_possible (mode
, x
)
5764 enum machine_mode mode
;
5767 rtx result
= gen_lowpart_common (mode
, x
);
5771 else if (GET_CODE (x
) == MEM
)
5773 /* This is the only other case we handle. */
5774 register int offset
= 0;
5777 if (WORDS_BIG_ENDIAN
)
5778 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5779 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5780 if (BYTES_BIG_ENDIAN
)
5781 /* Adjust the address so that the address-after-the-data is
5783 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5784 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5785 new = gen_rtx_MEM (mode
, plus_constant (XEXP (x
, 0), offset
));
5786 if (! memory_address_p (mode
, XEXP (new, 0)))
5788 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5789 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5790 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5797 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5798 branch. It will be zero if not.
5800 In certain cases, this can cause us to add an equivalence. For example,
5801 if we are following the taken case of
5803 we can add the fact that `i' and '2' are now equivalent.
5805 In any case, we can record that this comparison was passed. If the same
5806 comparison is seen later, we will know its value. */
5809 record_jump_equiv (insn
, taken
)
5813 int cond_known_true
;
5815 enum machine_mode mode
, mode0
, mode1
;
5816 int reversed_nonequality
= 0;
5819 /* Ensure this is the right kind of insn. */
5820 if (! condjump_p (insn
) || simplejump_p (insn
))
5823 /* See if this jump condition is known true or false. */
5825 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5827 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5829 /* Get the type of comparison being done and the operands being compared.
5830 If we had to reverse a non-equality condition, record that fact so we
5831 know that it isn't valid for floating-point. */
5832 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5833 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5834 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5836 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5837 if (! cond_known_true
)
5839 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5840 code
= reverse_condition (code
);
5843 /* The mode is the mode of the non-constant. */
5845 if (mode1
!= VOIDmode
)
5848 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5851 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5852 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5853 Make any useful entries we can with that information. Called from
5854 above function and called recursively. */
5857 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5859 enum machine_mode mode
;
5861 int reversed_nonequality
;
5863 unsigned op0_hash
, op1_hash
;
5864 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5865 struct table_elt
*op0_elt
, *op1_elt
;
5867 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5868 we know that they are also equal in the smaller mode (this is also
5869 true for all smaller modes whether or not there is a SUBREG, but
5870 is not worth testing for with no SUBREG. */
5872 /* Note that GET_MODE (op0) may not equal MODE. */
5873 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5874 && (GET_MODE_SIZE (GET_MODE (op0
))
5875 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5877 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5878 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5880 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5881 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
5882 reversed_nonequality
);
5885 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5886 && (GET_MODE_SIZE (GET_MODE (op1
))
5887 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5889 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5890 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5892 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5893 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
5894 reversed_nonequality
);
5897 /* Similarly, if this is an NE comparison, and either is a SUBREG
5898 making a smaller mode, we know the whole thing is also NE. */
5900 /* Note that GET_MODE (op0) may not equal MODE;
5901 if we test MODE instead, we can get an infinite recursion
5902 alternating between two modes each wider than MODE. */
5904 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5905 && subreg_lowpart_p (op0
)
5906 && (GET_MODE_SIZE (GET_MODE (op0
))
5907 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5909 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5910 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5912 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5913 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
5914 reversed_nonequality
);
5917 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5918 && subreg_lowpart_p (op1
)
5919 && (GET_MODE_SIZE (GET_MODE (op1
))
5920 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5922 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5923 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5925 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5926 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
5927 reversed_nonequality
);
5930 /* Hash both operands. */
5933 hash_arg_in_memory
= 0;
5934 hash_arg_in_struct
= 0;
5935 op0_hash
= HASH (op0
, mode
);
5936 op0_in_memory
= hash_arg_in_memory
;
5937 op0_in_struct
= hash_arg_in_struct
;
5943 hash_arg_in_memory
= 0;
5944 hash_arg_in_struct
= 0;
5945 op1_hash
= HASH (op1
, mode
);
5946 op1_in_memory
= hash_arg_in_memory
;
5947 op1_in_struct
= hash_arg_in_struct
;
5952 /* Look up both operands. */
5953 op0_elt
= lookup (op0
, op0_hash
, mode
);
5954 op1_elt
= lookup (op1
, op1_hash
, mode
);
5956 /* If both operands are already equivalent or if they are not in the
5957 table but are identical, do nothing. */
5958 if ((op0_elt
!= 0 && op1_elt
!= 0
5959 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
5960 || op0
== op1
|| rtx_equal_p (op0
, op1
))
5963 /* If we aren't setting two things equal all we can do is save this
5964 comparison. Similarly if this is floating-point. In the latter
5965 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5966 If we record the equality, we might inadvertently delete code
5967 whose intent was to change -0 to +0. */
5969 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5971 /* If we reversed a floating-point comparison, if OP0 is not a
5972 register, or if OP1 is neither a register or constant, we can't
5975 if (GET_CODE (op1
) != REG
)
5976 op1
= equiv_constant (op1
);
5978 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5979 || GET_CODE (op0
) != REG
|| op1
== 0)
5982 /* Put OP0 in the hash table if it isn't already. This gives it a
5983 new quantity number. */
5986 if (insert_regs (op0
, NULL_PTR
, 0))
5988 rehash_using_reg (op0
);
5989 op0_hash
= HASH (op0
, mode
);
5991 /* If OP0 is contained in OP1, this changes its hash code
5992 as well. Faster to rehash than to check, except
5993 for the simple case of a constant. */
5994 if (! CONSTANT_P (op1
))
5995 op1_hash
= HASH (op1
,mode
);
5998 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5999 op0_elt
->in_memory
= op0_in_memory
;
6000 op0_elt
->in_struct
= op0_in_struct
;
6003 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
6004 if (GET_CODE (op1
) == REG
)
6006 /* Look it up again--in case op0 and op1 are the same. */
6007 op1_elt
= lookup (op1
, op1_hash
, mode
);
6009 /* Put OP1 in the hash table so it gets a new quantity number. */
6012 if (insert_regs (op1
, NULL_PTR
, 0))
6014 rehash_using_reg (op1
);
6015 op1_hash
= HASH (op1
, mode
);
6018 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6019 op1_elt
->in_memory
= op1_in_memory
;
6020 op1_elt
->in_struct
= op1_in_struct
;
6023 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
6024 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
6028 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
6029 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
6035 /* If either side is still missing an equivalence, make it now,
6036 then merge the equivalences. */
6040 if (insert_regs (op0
, NULL_PTR
, 0))
6042 rehash_using_reg (op0
);
6043 op0_hash
= HASH (op0
, mode
);
6046 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6047 op0_elt
->in_memory
= op0_in_memory
;
6048 op0_elt
->in_struct
= op0_in_struct
;
6053 if (insert_regs (op1
, NULL_PTR
, 0))
6055 rehash_using_reg (op1
);
6056 op1_hash
= HASH (op1
, mode
);
6059 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6060 op1_elt
->in_memory
= op1_in_memory
;
6061 op1_elt
->in_struct
= op1_in_struct
;
6064 merge_equiv_classes (op0_elt
, op1_elt
);
6065 last_jump_equiv_class
= op0_elt
;
6068 /* CSE processing for one instruction.
6069 First simplify sources and addresses of all assignments
6070 in the instruction, using previously-computed equivalents values.
6071 Then install the new sources and destinations in the table
6072 of available values.
6074 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6077 /* Data on one SET contained in the instruction. */
6081 /* The SET rtx itself. */
6083 /* The SET_SRC of the rtx (the original value, if it is changing). */
6085 /* The hash-table element for the SET_SRC of the SET. */
6086 struct table_elt
*src_elt
;
6087 /* Hash value for the SET_SRC. */
6089 /* Hash value for the SET_DEST. */
6091 /* The SET_DEST, with SUBREG, etc., stripped. */
6093 /* Place where the pointer to the INNER_DEST was found. */
6094 rtx
*inner_dest_loc
;
6095 /* Nonzero if the SET_SRC is in memory. */
6097 /* Nonzero if the SET_SRC is in a structure. */
6099 /* Nonzero if the SET_SRC contains something
6100 whose value cannot be predicted and understood. */
6102 /* Original machine mode, in case it becomes a CONST_INT. */
6103 enum machine_mode mode
;
6104 /* A constant equivalent for SET_SRC, if any. */
6106 /* Hash value of constant equivalent for SET_SRC. */
6107 unsigned src_const_hash
;
6108 /* Table entry for constant equivalent for SET_SRC, if any. */
6109 struct table_elt
*src_const_elt
;
6113 cse_insn (insn
, in_libcall_block
)
6115 int in_libcall_block
;
6117 register rtx x
= PATTERN (insn
);
6120 register int n_sets
= 0;
6123 /* Records what this insn does to set CC0. */
6124 rtx this_insn_cc0
= 0;
6125 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
6129 struct table_elt
*src_eqv_elt
= 0;
6130 int src_eqv_volatile
;
6131 int src_eqv_in_memory
;
6132 int src_eqv_in_struct
;
6133 unsigned src_eqv_hash
;
6139 /* Find all the SETs and CLOBBERs in this instruction.
6140 Record all the SETs in the array `set' and count them.
6141 Also determine whether there is a CLOBBER that invalidates
6142 all memory references, or all references at varying addresses. */
6144 if (GET_CODE (insn
) == CALL_INSN
)
6146 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6147 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6148 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6151 if (GET_CODE (x
) == SET
)
6153 sets
= (struct set
*) alloca (sizeof (struct set
));
6156 /* Ignore SETs that are unconditional jumps.
6157 They never need cse processing, so this does not hurt.
6158 The reason is not efficiency but rather
6159 so that we can test at the end for instructions
6160 that have been simplified to unconditional jumps
6161 and not be misled by unchanged instructions
6162 that were unconditional jumps to begin with. */
6163 if (SET_DEST (x
) == pc_rtx
6164 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6167 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6168 The hard function value register is used only once, to copy to
6169 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6170 Ensure we invalidate the destination register. On the 80386 no
6171 other code would invalidate it since it is a fixed_reg.
6172 We need not check the return of apply_change_group; see canon_reg. */
6174 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6176 canon_reg (SET_SRC (x
), insn
);
6177 apply_change_group ();
6178 fold_rtx (SET_SRC (x
), insn
);
6179 invalidate (SET_DEST (x
), VOIDmode
);
6184 else if (GET_CODE (x
) == PARALLEL
)
6186 register int lim
= XVECLEN (x
, 0);
6188 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6190 /* Find all regs explicitly clobbered in this insn,
6191 and ensure they are not replaced with any other regs
6192 elsewhere in this insn.
6193 When a reg that is clobbered is also used for input,
6194 we should presume that that is for a reason,
6195 and we should not substitute some other register
6196 which is not supposed to be clobbered.
6197 Therefore, this loop cannot be merged into the one below
6198 because a CALL may precede a CLOBBER and refer to the
6199 value clobbered. We must not let a canonicalization do
6200 anything in that case. */
6201 for (i
= 0; i
< lim
; i
++)
6203 register rtx y
= XVECEXP (x
, 0, i
);
6204 if (GET_CODE (y
) == CLOBBER
)
6206 rtx clobbered
= XEXP (y
, 0);
6208 if (GET_CODE (clobbered
) == REG
6209 || GET_CODE (clobbered
) == SUBREG
)
6210 invalidate (clobbered
, VOIDmode
);
6211 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6212 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6213 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6217 for (i
= 0; i
< lim
; i
++)
6219 register rtx y
= XVECEXP (x
, 0, i
);
6220 if (GET_CODE (y
) == SET
)
6222 /* As above, we ignore unconditional jumps and call-insns and
6223 ignore the result of apply_change_group. */
6224 if (GET_CODE (SET_SRC (y
)) == CALL
)
6226 canon_reg (SET_SRC (y
), insn
);
6227 apply_change_group ();
6228 fold_rtx (SET_SRC (y
), insn
);
6229 invalidate (SET_DEST (y
), VOIDmode
);
6231 else if (SET_DEST (y
) == pc_rtx
6232 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6235 sets
[n_sets
++].rtl
= y
;
6237 else if (GET_CODE (y
) == CLOBBER
)
6239 /* If we clobber memory, canon the address.
6240 This does nothing when a register is clobbered
6241 because we have already invalidated the reg. */
6242 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6243 canon_reg (XEXP (y
, 0), NULL_RTX
);
6245 else if (GET_CODE (y
) == USE
6246 && ! (GET_CODE (XEXP (y
, 0)) == REG
6247 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6248 canon_reg (y
, NULL_RTX
);
6249 else if (GET_CODE (y
) == CALL
)
6251 /* The result of apply_change_group can be ignored; see
6253 canon_reg (y
, insn
);
6254 apply_change_group ();
6259 else if (GET_CODE (x
) == CLOBBER
)
6261 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6262 canon_reg (XEXP (x
, 0), NULL_RTX
);
6265 /* Canonicalize a USE of a pseudo register or memory location. */
6266 else if (GET_CODE (x
) == USE
6267 && ! (GET_CODE (XEXP (x
, 0)) == REG
6268 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6269 canon_reg (XEXP (x
, 0), NULL_RTX
);
6270 else if (GET_CODE (x
) == CALL
)
6272 /* The result of apply_change_group can be ignored; see canon_reg. */
6273 canon_reg (x
, insn
);
6274 apply_change_group ();
6278 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6279 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6280 is handled specially for this case, and if it isn't set, then there will
6281 be no equivalence for the destination. */
6282 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6283 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6284 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6285 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6286 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6288 /* Canonicalize sources and addresses of destinations.
6289 We do this in a separate pass to avoid problems when a MATCH_DUP is
6290 present in the insn pattern. In that case, we want to ensure that
6291 we don't break the duplicate nature of the pattern. So we will replace
6292 both operands at the same time. Otherwise, we would fail to find an
6293 equivalent substitution in the loop calling validate_change below.
6295 We used to suppress canonicalization of DEST if it appears in SRC,
6296 but we don't do this any more. */
6298 for (i
= 0; i
< n_sets
; i
++)
6300 rtx dest
= SET_DEST (sets
[i
].rtl
);
6301 rtx src
= SET_SRC (sets
[i
].rtl
);
6302 rtx
new = canon_reg (src
, insn
);
6305 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6306 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6307 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6308 || (insn_code
= recog_memoized (insn
)) < 0
6309 || insn_n_dups
[insn_code
] > 0)
6310 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6312 SET_SRC (sets
[i
].rtl
) = new;
6314 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6316 validate_change (insn
, &XEXP (dest
, 1),
6317 canon_reg (XEXP (dest
, 1), insn
), 1);
6318 validate_change (insn
, &XEXP (dest
, 2),
6319 canon_reg (XEXP (dest
, 2), insn
), 1);
6322 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6323 || GET_CODE (dest
) == ZERO_EXTRACT
6324 || GET_CODE (dest
) == SIGN_EXTRACT
)
6325 dest
= XEXP (dest
, 0);
6327 if (GET_CODE (dest
) == MEM
)
6328 canon_reg (dest
, insn
);
6331 /* Now that we have done all the replacements, we can apply the change
6332 group and see if they all work. Note that this will cause some
6333 canonicalizations that would have worked individually not to be applied
6334 because some other canonicalization didn't work, but this should not
6337 The result of apply_change_group can be ignored; see canon_reg. */
6339 apply_change_group ();
6341 /* Set sets[i].src_elt to the class each source belongs to.
6342 Detect assignments from or to volatile things
6343 and set set[i] to zero so they will be ignored
6344 in the rest of this function.
6346 Nothing in this loop changes the hash table or the register chains. */
6348 for (i
= 0; i
< n_sets
; i
++)
6350 register rtx src
, dest
;
6351 register rtx src_folded
;
6352 register struct table_elt
*elt
= 0, *p
;
6353 enum machine_mode mode
;
6356 rtx src_related
= 0;
6357 struct table_elt
*src_const_elt
= 0;
6358 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6359 int src_related_cost
= 10000, src_elt_cost
= 10000;
6360 /* Set non-zero if we need to call force_const_mem on with the
6361 contents of src_folded before using it. */
6362 int src_folded_force_flag
= 0;
6364 dest
= SET_DEST (sets
[i
].rtl
);
6365 src
= SET_SRC (sets
[i
].rtl
);
6367 /* If SRC is a constant that has no machine mode,
6368 hash it with the destination's machine mode.
6369 This way we can keep different modes separate. */
6371 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6372 sets
[i
].mode
= mode
;
6376 enum machine_mode eqvmode
= mode
;
6377 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6378 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6380 hash_arg_in_memory
= 0;
6381 hash_arg_in_struct
= 0;
6382 src_eqv
= fold_rtx (src_eqv
, insn
);
6383 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6385 /* Find the equivalence class for the equivalent expression. */
6388 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6390 src_eqv_volatile
= do_not_record
;
6391 src_eqv_in_memory
= hash_arg_in_memory
;
6392 src_eqv_in_struct
= hash_arg_in_struct
;
6395 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6396 value of the INNER register, not the destination. So it is not
6397 a valid substitution for the source. But save it for later. */
6398 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6401 src_eqv_here
= src_eqv
;
6403 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6404 simplified result, which may not necessarily be valid. */
6405 src_folded
= fold_rtx (src
, insn
);
6408 /* ??? This caused bad code to be generated for the m68k port with -O2.
6409 Suppose src is (CONST_INT -1), and that after truncation src_folded
6410 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6411 At the end we will add src and src_const to the same equivalence
6412 class. We now have 3 and -1 on the same equivalence class. This
6413 causes later instructions to be mis-optimized. */
6414 /* If storing a constant in a bitfield, pre-truncate the constant
6415 so we will be able to record it later. */
6416 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6417 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6419 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6421 if (GET_CODE (src
) == CONST_INT
6422 && GET_CODE (width
) == CONST_INT
6423 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6424 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6426 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6427 << INTVAL (width
)) - 1));
6431 /* Compute SRC's hash code, and also notice if it
6432 should not be recorded at all. In that case,
6433 prevent any further processing of this assignment. */
6435 hash_arg_in_memory
= 0;
6436 hash_arg_in_struct
= 0;
6439 sets
[i
].src_hash
= HASH (src
, mode
);
6440 sets
[i
].src_volatile
= do_not_record
;
6441 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6442 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6444 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6445 a pseudo that is set more than once, do not record SRC. Using
6446 SRC as a replacement for anything else will be incorrect in that
6447 situation. Note that this usually occurs only for stack slots,
6448 in which case all the RTL would be referring to SRC, so we don't
6449 lose any optimization opportunities by not having SRC in the
6452 if (GET_CODE (src
) == MEM
6453 && find_reg_note (insn
, REG_EQUIV
, src
) != 0
6454 && GET_CODE (dest
) == REG
6455 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
6456 && REG_N_SETS (REGNO (dest
)) != 1)
6457 sets
[i
].src_volatile
= 1;
6460 /* It is no longer clear why we used to do this, but it doesn't
6461 appear to still be needed. So let's try without it since this
6462 code hurts cse'ing widened ops. */
6463 /* If source is a perverse subreg (such as QI treated as an SI),
6464 treat it as volatile. It may do the work of an SI in one context
6465 where the extra bits are not being used, but cannot replace an SI
6467 if (GET_CODE (src
) == SUBREG
6468 && (GET_MODE_SIZE (GET_MODE (src
))
6469 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6470 sets
[i
].src_volatile
= 1;
6473 /* Locate all possible equivalent forms for SRC. Try to replace
6474 SRC in the insn with each cheaper equivalent.
6476 We have the following types of equivalents: SRC itself, a folded
6477 version, a value given in a REG_EQUAL note, or a value related
6480 Each of these equivalents may be part of an additional class
6481 of equivalents (if more than one is in the table, they must be in
6482 the same class; we check for this).
6484 If the source is volatile, we don't do any table lookups.
6486 We note any constant equivalent for possible later use in a
6489 if (!sets
[i
].src_volatile
)
6490 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6492 sets
[i
].src_elt
= elt
;
6494 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6496 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6498 /* The REG_EQUAL is indicating that two formerly distinct
6499 classes are now equivalent. So merge them. */
6500 merge_equiv_classes (elt
, src_eqv_elt
);
6501 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6502 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6508 else if (src_eqv_elt
)
6511 /* Try to find a constant somewhere and record it in `src_const'.
6512 Record its table element, if any, in `src_const_elt'. Look in
6513 any known equivalences first. (If the constant is not in the
6514 table, also set `sets[i].src_const_hash'). */
6516 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6520 src_const_elt
= elt
;
6525 && (CONSTANT_P (src_folded
)
6526 /* Consider (minus (label_ref L1) (label_ref L2)) as
6527 "constant" here so we will record it. This allows us
6528 to fold switch statements when an ADDR_DIFF_VEC is used. */
6529 || (GET_CODE (src_folded
) == MINUS
6530 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6531 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6532 src_const
= src_folded
, src_const_elt
= elt
;
6533 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6534 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6536 /* If we don't know if the constant is in the table, get its
6537 hash code and look it up. */
6538 if (src_const
&& src_const_elt
== 0)
6540 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6541 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6544 sets
[i
].src_const
= src_const
;
6545 sets
[i
].src_const_elt
= src_const_elt
;
6547 /* If the constant and our source are both in the table, mark them as
6548 equivalent. Otherwise, if a constant is in the table but the source
6549 isn't, set ELT to it. */
6550 if (src_const_elt
&& elt
6551 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6552 merge_equiv_classes (elt
, src_const_elt
);
6553 else if (src_const_elt
&& elt
== 0)
6554 elt
= src_const_elt
;
6556 /* See if there is a register linearly related to a constant
6557 equivalent of SRC. */
6559 && (GET_CODE (src_const
) == CONST
6560 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6562 src_related
= use_related_value (src_const
, src_const_elt
);
6565 struct table_elt
*src_related_elt
6566 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6567 if (src_related_elt
&& elt
)
6569 if (elt
->first_same_value
6570 != src_related_elt
->first_same_value
)
6571 /* This can occur when we previously saw a CONST
6572 involving a SYMBOL_REF and then see the SYMBOL_REF
6573 twice. Merge the involved classes. */
6574 merge_equiv_classes (elt
, src_related_elt
);
6577 src_related_elt
= 0;
6579 else if (src_related_elt
&& elt
== 0)
6580 elt
= src_related_elt
;
6584 /* See if we have a CONST_INT that is already in a register in a
6587 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6588 && GET_MODE_CLASS (mode
) == MODE_INT
6589 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6591 enum machine_mode wider_mode
;
6593 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6594 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6595 && src_related
== 0;
6596 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6598 struct table_elt
*const_elt
6599 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6604 for (const_elt
= const_elt
->first_same_value
;
6605 const_elt
; const_elt
= const_elt
->next_same_value
)
6606 if (GET_CODE (const_elt
->exp
) == REG
)
6608 src_related
= gen_lowpart_if_possible (mode
,
6615 /* Another possibility is that we have an AND with a constant in
6616 a mode narrower than a word. If so, it might have been generated
6617 as part of an "if" which would narrow the AND. If we already
6618 have done the AND in a wider mode, we can use a SUBREG of that
6621 if (flag_expensive_optimizations
&& ! src_related
6622 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6623 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6625 enum machine_mode tmode
;
6626 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6628 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6629 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6630 tmode
= GET_MODE_WIDER_MODE (tmode
))
6632 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6633 struct table_elt
*larger_elt
;
6637 PUT_MODE (new_and
, tmode
);
6638 XEXP (new_and
, 0) = inner
;
6639 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6640 if (larger_elt
== 0)
6643 for (larger_elt
= larger_elt
->first_same_value
;
6644 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6645 if (GET_CODE (larger_elt
->exp
) == REG
)
6648 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6658 #ifdef LOAD_EXTEND_OP
6659 /* See if a MEM has already been loaded with a widening operation;
6660 if it has, we can use a subreg of that. Many CISC machines
6661 also have such operations, but this is only likely to be
6662 beneficial these machines. */
6664 if (flag_expensive_optimizations
&& src_related
== 0
6665 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6666 && GET_MODE_CLASS (mode
) == MODE_INT
6667 && GET_CODE (src
) == MEM
&& ! do_not_record
6668 && LOAD_EXTEND_OP (mode
) != NIL
)
6670 enum machine_mode tmode
;
6672 /* Set what we are trying to extend and the operation it might
6673 have been extended with. */
6674 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6675 XEXP (memory_extend_rtx
, 0) = src
;
6677 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6678 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6679 tmode
= GET_MODE_WIDER_MODE (tmode
))
6681 struct table_elt
*larger_elt
;
6683 PUT_MODE (memory_extend_rtx
, tmode
);
6684 larger_elt
= lookup (memory_extend_rtx
,
6685 HASH (memory_extend_rtx
, tmode
), tmode
);
6686 if (larger_elt
== 0)
6689 for (larger_elt
= larger_elt
->first_same_value
;
6690 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6691 if (GET_CODE (larger_elt
->exp
) == REG
)
6693 src_related
= gen_lowpart_if_possible (mode
,
6702 #endif /* LOAD_EXTEND_OP */
6704 if (src
== src_folded
)
6707 /* At this point, ELT, if non-zero, points to a class of expressions
6708 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6709 and SRC_RELATED, if non-zero, each contain additional equivalent
6710 expressions. Prune these latter expressions by deleting expressions
6711 already in the equivalence class.
6713 Check for an equivalent identical to the destination. If found,
6714 this is the preferred equivalent since it will likely lead to
6715 elimination of the insn. Indicate this by placing it in
6718 if (elt
) elt
= elt
->first_same_value
;
6719 for (p
= elt
; p
; p
= p
->next_same_value
)
6721 enum rtx_code code
= GET_CODE (p
->exp
);
6723 /* If the expression is not valid, ignore it. Then we do not
6724 have to check for validity below. In most cases, we can use
6725 `rtx_equal_p', since canonicalization has already been done. */
6726 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6729 /* Also skip paradoxical subregs, unless that's what we're
6732 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
6733 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
6735 && GET_CODE (src
) == SUBREG
6736 && GET_MODE (src
) == GET_MODE (p
->exp
)
6737 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6738 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
6741 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6743 else if (src_folded
&& GET_CODE (src_folded
) == code
6744 && rtx_equal_p (src_folded
, p
->exp
))
6746 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6747 && rtx_equal_p (src_eqv_here
, p
->exp
))
6749 else if (src_related
&& GET_CODE (src_related
) == code
6750 && rtx_equal_p (src_related
, p
->exp
))
6753 /* This is the same as the destination of the insns, we want
6754 to prefer it. Copy it to src_related. The code below will
6755 then give it a negative cost. */
6756 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6761 /* Find the cheapest valid equivalent, trying all the available
6762 possibilities. Prefer items not in the hash table to ones
6763 that are when they are equal cost. Note that we can never
6764 worsen an insn as the current contents will also succeed.
6765 If we find an equivalent identical to the destination, use it as best,
6766 since this insn will probably be eliminated in that case. */
6769 if (rtx_equal_p (src
, dest
))
6772 src_cost
= COST (src
);
6777 if (rtx_equal_p (src_eqv_here
, dest
))
6780 src_eqv_cost
= COST (src_eqv_here
);
6785 if (rtx_equal_p (src_folded
, dest
))
6786 src_folded_cost
= -1;
6788 src_folded_cost
= COST (src_folded
);
6793 if (rtx_equal_p (src_related
, dest
))
6794 src_related_cost
= -1;
6796 src_related_cost
= COST (src_related
);
6799 /* If this was an indirect jump insn, a known label will really be
6800 cheaper even though it looks more expensive. */
6801 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6802 src_folded
= src_const
, src_folded_cost
= -1;
6804 /* Terminate loop when replacement made. This must terminate since
6805 the current contents will be tested and will always be valid. */
6810 /* Skip invalid entries. */
6811 while (elt
&& GET_CODE (elt
->exp
) != REG
6812 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6813 elt
= elt
->next_same_value
;
6815 /* A paradoxical subreg would be bad here: it'll be the right
6816 size, but later may be adjusted so that the upper bits aren't
6817 what we want. So reject it. */
6819 && GET_CODE (elt
->exp
) == SUBREG
6820 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
6821 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
6822 /* It is okay, though, if the rtx we're trying to match
6823 will ignore any of the bits we can't predict. */
6825 && GET_CODE (src
) == SUBREG
6826 && GET_MODE (src
) == GET_MODE (elt
->exp
)
6827 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6828 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
6830 elt
= elt
->next_same_value
;
6834 if (elt
) src_elt_cost
= elt
->cost
;
6836 /* Find cheapest and skip it for the next time. For items
6837 of equal cost, use this order:
6838 src_folded, src, src_eqv, src_related and hash table entry. */
6839 if (src_folded_cost
<= src_cost
6840 && src_folded_cost
<= src_eqv_cost
6841 && src_folded_cost
<= src_related_cost
6842 && src_folded_cost
<= src_elt_cost
)
6844 trial
= src_folded
, src_folded_cost
= 10000;
6845 if (src_folded_force_flag
)
6846 trial
= force_const_mem (mode
, trial
);
6848 else if (src_cost
<= src_eqv_cost
6849 && src_cost
<= src_related_cost
6850 && src_cost
<= src_elt_cost
)
6851 trial
= src
, src_cost
= 10000;
6852 else if (src_eqv_cost
<= src_related_cost
6853 && src_eqv_cost
<= src_elt_cost
)
6854 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6855 else if (src_related_cost
<= src_elt_cost
)
6856 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6859 trial
= copy_rtx (elt
->exp
);
6860 elt
= elt
->next_same_value
;
6861 src_elt_cost
= 10000;
6864 /* We don't normally have an insn matching (set (pc) (pc)), so
6865 check for this separately here. We will delete such an
6868 Tablejump insns contain a USE of the table, so simply replacing
6869 the operand with the constant won't match. This is simply an
6870 unconditional branch, however, and is therefore valid. Just
6871 insert the substitution here and we will delete and re-emit
6874 if (n_sets
== 1 && dest
== pc_rtx
6876 || (GET_CODE (trial
) == LABEL_REF
6877 && ! condjump_p (insn
))))
6879 /* If TRIAL is a label in front of a jump table, we are
6880 really falling through the switch (this is how casesi
6881 insns work), so we must branch around the table. */
6882 if (GET_CODE (trial
) == CODE_LABEL
6883 && NEXT_INSN (trial
) != 0
6884 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6885 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6886 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6888 trial
= gen_rtx_LABEL_REF (Pmode
, get_label_after (trial
));
6890 SET_SRC (sets
[i
].rtl
) = trial
;
6891 cse_jumps_altered
= 1;
6895 /* Look for a substitution that makes a valid insn. */
6896 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6898 /* The result of apply_change_group can be ignored; see
6901 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6902 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6904 apply_change_group ();
6908 /* If we previously found constant pool entries for
6909 constants and this is a constant, try making a
6910 pool entry. Put it in src_folded unless we already have done
6911 this since that is where it likely came from. */
6913 else if (constant_pool_entries_cost
6914 && CONSTANT_P (trial
)
6915 && ! (GET_CODE (trial
) == CONST
6916 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
6918 || (GET_CODE (src_folded
) != MEM
6919 && ! src_folded_force_flag
))
6920 && GET_MODE_CLASS (mode
) != MODE_CC
6921 && mode
!= VOIDmode
)
6923 src_folded_force_flag
= 1;
6925 src_folded_cost
= constant_pool_entries_cost
;
6929 src
= SET_SRC (sets
[i
].rtl
);
6931 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6932 However, there is an important exception: If both are registers
6933 that are not the head of their equivalence class, replace SET_SRC
6934 with the head of the class. If we do not do this, we will have
6935 both registers live over a portion of the basic block. This way,
6936 their lifetimes will likely abut instead of overlapping. */
6937 if (GET_CODE (dest
) == REG
6938 && REGNO_QTY_VALID_P (REGNO (dest
))
6939 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6940 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6941 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6942 /* Don't do this if the original insn had a hard reg as
6944 && (GET_CODE (sets
[i
].src
) != REG
6945 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6946 /* We can't call canon_reg here because it won't do anything if
6947 SRC is a hard register. */
6949 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6951 src
= SET_SRC (sets
[i
].rtl
)
6952 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6953 : gen_rtx_REG (GET_MODE (src
), first
);
6955 /* If we had a constant that is cheaper than what we are now
6956 setting SRC to, use that constant. We ignored it when we
6957 thought we could make this into a no-op. */
6958 if (src_const
&& COST (src_const
) < COST (src
)
6959 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6963 /* If we made a change, recompute SRC values. */
6964 if (src
!= sets
[i
].src
)
6967 hash_arg_in_memory
= 0;
6968 hash_arg_in_struct
= 0;
6970 sets
[i
].src_hash
= HASH (src
, mode
);
6971 sets
[i
].src_volatile
= do_not_record
;
6972 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6973 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6974 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6977 /* If this is a single SET, we are setting a register, and we have an
6978 equivalent constant, we want to add a REG_NOTE. We don't want
6979 to write a REG_EQUAL note for a constant pseudo since verifying that
6980 that pseudo hasn't been eliminated is a pain. Such a note also
6981 won't help anything. */
6982 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6983 && GET_CODE (src_const
) != REG
)
6985 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6987 /* Record the actual constant value in a REG_EQUAL note, making
6988 a new one if one does not already exist. */
6990 XEXP (tem
, 0) = src_const
;
6992 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EQUAL
,
6993 src_const
, REG_NOTES (insn
));
6995 /* If storing a constant value in a register that
6996 previously held the constant value 0,
6997 record this fact with a REG_WAS_0 note on this insn.
6999 Note that the *register* is required to have previously held 0,
7000 not just any register in the quantity and we must point to the
7001 insn that set that register to zero.
7003 Rather than track each register individually, we just see if
7004 the last set for this quantity was for this register. */
7006 if (REGNO_QTY_VALID_P (REGNO (dest
))
7007 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
7009 /* See if we previously had a REG_WAS_0 note. */
7010 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7011 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
7013 if ((tem
= single_set (const_insn
)) != 0
7014 && rtx_equal_p (SET_DEST (tem
), dest
))
7017 XEXP (note
, 0) = const_insn
;
7019 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_WAS_0
,
7026 /* Now deal with the destination. */
7028 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
7030 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7031 to the MEM or REG within it. */
7032 while (GET_CODE (dest
) == SIGN_EXTRACT
7033 || GET_CODE (dest
) == ZERO_EXTRACT
7034 || GET_CODE (dest
) == SUBREG
7035 || GET_CODE (dest
) == STRICT_LOW_PART
)
7037 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
7038 dest
= XEXP (dest
, 0);
7041 sets
[i
].inner_dest
= dest
;
7043 if (GET_CODE (dest
) == MEM
)
7045 #ifdef PUSH_ROUNDING
7046 /* Stack pushes invalidate the stack pointer. */
7047 rtx addr
= XEXP (dest
, 0);
7048 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7049 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7050 && XEXP (addr
, 0) == stack_pointer_rtx
)
7051 invalidate (stack_pointer_rtx
, Pmode
);
7053 dest
= fold_rtx (dest
, insn
);
7056 /* Compute the hash code of the destination now,
7057 before the effects of this instruction are recorded,
7058 since the register values used in the address computation
7059 are those before this instruction. */
7060 sets
[i
].dest_hash
= HASH (dest
, mode
);
7062 /* Don't enter a bit-field in the hash table
7063 because the value in it after the store
7064 may not equal what was stored, due to truncation. */
7066 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
7067 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
7069 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
7071 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7072 && GET_CODE (width
) == CONST_INT
7073 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7074 && ! (INTVAL (src_const
)
7075 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7076 /* Exception: if the value is constant,
7077 and it won't be truncated, record it. */
7081 /* This is chosen so that the destination will be invalidated
7082 but no new value will be recorded.
7083 We must invalidate because sometimes constant
7084 values can be recorded for bitfields. */
7085 sets
[i
].src_elt
= 0;
7086 sets
[i
].src_volatile
= 1;
7092 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7094 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7096 PUT_CODE (insn
, NOTE
);
7097 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7098 NOTE_SOURCE_FILE (insn
) = 0;
7099 cse_jumps_altered
= 1;
7100 /* One less use of the label this insn used to jump to. */
7101 if (JUMP_LABEL (insn
) != 0)
7102 --LABEL_NUSES (JUMP_LABEL (insn
));
7103 /* No more processing for this set. */
7107 /* If this SET is now setting PC to a label, we know it used to
7108 be a conditional or computed branch. So we see if we can follow
7109 it. If it was a computed branch, delete it and re-emit. */
7110 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7114 /* If this is not in the format for a simple branch and
7115 we are the only SET in it, re-emit it. */
7116 if (! simplejump_p (insn
) && n_sets
== 1)
7118 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7119 JUMP_LABEL (new) = XEXP (src
, 0);
7120 LABEL_NUSES (XEXP (src
, 0))++;
7125 /* Otherwise, force rerecognition, since it probably had
7126 a different pattern before.
7127 This shouldn't really be necessary, since whatever
7128 changed the source value above should have done this.
7129 Until the right place is found, might as well do this here. */
7130 INSN_CODE (insn
) = -1;
7132 /* Now that we've converted this jump to an unconditional jump,
7133 there is dead code after it. Delete the dead code until we
7134 reach a BARRIER, the end of the function, or a label. Do
7135 not delete NOTEs except for NOTE_INSN_DELETED since later
7136 phases assume these notes are retained. */
7140 while (NEXT_INSN (p
) != 0
7141 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7142 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7144 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7145 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7146 delete_insn (NEXT_INSN (p
));
7151 /* If we don't have a BARRIER immediately after INSN, put one there.
7152 Much code assumes that there are no NOTEs between a JUMP_INSN and
7155 if (NEXT_INSN (insn
) == 0
7156 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7157 emit_barrier_before (NEXT_INSN (insn
));
7159 /* We might have two BARRIERs separated by notes. Delete the second
7162 if (p
!= insn
&& NEXT_INSN (p
) != 0
7163 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7164 delete_insn (NEXT_INSN (p
));
7166 cse_jumps_altered
= 1;
7170 /* If destination is volatile, invalidate it and then do no further
7171 processing for this assignment. */
7173 else if (do_not_record
)
7175 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7176 || GET_CODE (dest
) == MEM
)
7177 invalidate (dest
, VOIDmode
);
7178 else if (GET_CODE (dest
) == STRICT_LOW_PART
7179 || GET_CODE (dest
) == ZERO_EXTRACT
)
7180 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7184 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7185 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7188 /* If setting CC0, record what it was set to, or a constant, if it
7189 is equivalent to a constant. If it is being set to a floating-point
7190 value, make a COMPARE with the appropriate constant of 0. If we
7191 don't do this, later code can interpret this as a test against
7192 const0_rtx, which can cause problems if we try to put it into an
7193 insn as a floating-point operand. */
7194 if (dest
== cc0_rtx
)
7196 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7197 this_insn_cc0_mode
= mode
;
7198 if (FLOAT_MODE_P (mode
))
7199 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
7205 /* Now enter all non-volatile source expressions in the hash table
7206 if they are not already present.
7207 Record their equivalence classes in src_elt.
7208 This way we can insert the corresponding destinations into
7209 the same classes even if the actual sources are no longer in them
7210 (having been invalidated). */
7212 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7213 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7215 register struct table_elt
*elt
;
7216 register struct table_elt
*classp
= sets
[0].src_elt
;
7217 rtx dest
= SET_DEST (sets
[0].rtl
);
7218 enum machine_mode eqvmode
= GET_MODE (dest
);
7220 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7222 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7225 if (insert_regs (src_eqv
, classp
, 0))
7227 rehash_using_reg (src_eqv
);
7228 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7230 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7231 elt
->in_memory
= src_eqv_in_memory
;
7232 elt
->in_struct
= src_eqv_in_struct
;
7235 /* Check to see if src_eqv_elt is the same as a set source which
7236 does not yet have an elt, and if so set the elt of the set source
7238 for (i
= 0; i
< n_sets
; i
++)
7239 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7240 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7241 sets
[i
].src_elt
= src_eqv_elt
;
7244 for (i
= 0; i
< n_sets
; i
++)
7245 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7246 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7248 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7250 /* REG_EQUAL in setting a STRICT_LOW_PART
7251 gives an equivalent for the entire destination register,
7252 not just for the subreg being stored in now.
7253 This is a more interesting equivalence, so we arrange later
7254 to treat the entire reg as the destination. */
7255 sets
[i
].src_elt
= src_eqv_elt
;
7256 sets
[i
].src_hash
= src_eqv_hash
;
7260 /* Insert source and constant equivalent into hash table, if not
7262 register struct table_elt
*classp
= src_eqv_elt
;
7263 register rtx src
= sets
[i
].src
;
7264 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7265 enum machine_mode mode
7266 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7268 if (sets
[i
].src_elt
== 0)
7270 register struct table_elt
*elt
;
7272 /* Note that these insert_regs calls cannot remove
7273 any of the src_elt's, because they would have failed to
7274 match if not still valid. */
7275 if (insert_regs (src
, classp
, 0))
7277 rehash_using_reg (src
);
7278 sets
[i
].src_hash
= HASH (src
, mode
);
7280 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7281 elt
->in_memory
= sets
[i
].src_in_memory
;
7282 elt
->in_struct
= sets
[i
].src_in_struct
;
7283 sets
[i
].src_elt
= classp
= elt
;
7286 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7287 && src
!= sets
[i
].src_const
7288 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7289 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7290 sets
[i
].src_const_hash
, mode
);
7293 else if (sets
[i
].src_elt
== 0)
7294 /* If we did not insert the source into the hash table (e.g., it was
7295 volatile), note the equivalence class for the REG_EQUAL value, if any,
7296 so that the destination goes into that class. */
7297 sets
[i
].src_elt
= src_eqv_elt
;
7299 invalidate_from_clobbers (x
);
7301 /* Some registers are invalidated by subroutine calls. Memory is
7302 invalidated by non-constant calls. */
7304 if (GET_CODE (insn
) == CALL_INSN
)
7306 if (! CONST_CALL_P (insn
))
7307 invalidate_memory ();
7308 invalidate_for_call ();
7311 /* Now invalidate everything set by this instruction.
7312 If a SUBREG or other funny destination is being set,
7313 sets[i].rtl is still nonzero, so here we invalidate the reg
7314 a part of which is being set. */
7316 for (i
= 0; i
< n_sets
; i
++)
7319 /* We can't use the inner dest, because the mode associated with
7320 a ZERO_EXTRACT is significant. */
7321 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7323 /* Needed for registers to remove the register from its
7324 previous quantity's chain.
7325 Needed for memory if this is a nonvarying address, unless
7326 we have just done an invalidate_memory that covers even those. */
7327 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7328 || GET_CODE (dest
) == MEM
)
7329 invalidate (dest
, VOIDmode
);
7330 else if (GET_CODE (dest
) == STRICT_LOW_PART
7331 || GET_CODE (dest
) == ZERO_EXTRACT
)
7332 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7335 /* Make sure registers mentioned in destinations
7336 are safe for use in an expression to be inserted.
7337 This removes from the hash table
7338 any invalid entry that refers to one of these registers.
7340 We don't care about the return value from mention_regs because
7341 we are going to hash the SET_DEST values unconditionally. */
7343 for (i
= 0; i
< n_sets
; i
++)
7344 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7345 mention_regs (SET_DEST (sets
[i
].rtl
));
7347 /* We may have just removed some of the src_elt's from the hash table.
7348 So replace each one with the current head of the same class. */
7350 for (i
= 0; i
< n_sets
; i
++)
7353 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7354 /* If elt was removed, find current head of same class,
7355 or 0 if nothing remains of that class. */
7357 register struct table_elt
*elt
= sets
[i
].src_elt
;
7359 while (elt
&& elt
->prev_same_value
)
7360 elt
= elt
->prev_same_value
;
7362 while (elt
&& elt
->first_same_value
== 0)
7363 elt
= elt
->next_same_value
;
7364 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7368 /* Now insert the destinations into their equivalence classes. */
7370 for (i
= 0; i
< n_sets
; i
++)
7373 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7374 register struct table_elt
*elt
;
7376 /* Don't record value if we are not supposed to risk allocating
7377 floating-point values in registers that might be wider than
7379 if ((flag_float_store
7380 && GET_CODE (dest
) == MEM
7381 && FLOAT_MODE_P (GET_MODE (dest
)))
7382 /* Don't record BLKmode values, because we don't know the
7383 size of it, and can't be sure that other BLKmode values
7384 have the same or smaller size. */
7385 || GET_MODE (dest
) == BLKmode
7386 /* Don't record values of destinations set inside a libcall block
7387 since we might delete the libcall. Things should have been set
7388 up so we won't want to reuse such a value, but we play it safe
7391 /* If we didn't put a REG_EQUAL value or a source into the hash
7392 table, there is no point is recording DEST. */
7393 || sets
[i
].src_elt
== 0
7394 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7395 or SIGN_EXTEND, don't record DEST since it can cause
7396 some tracking to be wrong.
7398 ??? Think about this more later. */
7399 || (GET_CODE (dest
) == SUBREG
7400 && (GET_MODE_SIZE (GET_MODE (dest
))
7401 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7402 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7403 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7406 /* STRICT_LOW_PART isn't part of the value BEING set,
7407 and neither is the SUBREG inside it.
7408 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7409 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7410 dest
= SUBREG_REG (XEXP (dest
, 0));
7412 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7413 /* Registers must also be inserted into chains for quantities. */
7414 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7416 /* If `insert_regs' changes something, the hash code must be
7418 rehash_using_reg (dest
);
7419 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7422 elt
= insert (dest
, sets
[i
].src_elt
,
7423 sets
[i
].dest_hash
, GET_MODE (dest
));
7424 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7425 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
7426 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
7431 /* This implicitly assumes a whole struct
7432 need not have MEM_IN_STRUCT_P.
7433 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7434 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7435 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7438 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7439 narrower than M2, and both M1 and M2 are the same number of words,
7440 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7441 make that equivalence as well.
7443 However, BAR may have equivalences for which gen_lowpart_if_possible
7444 will produce a simpler value than gen_lowpart_if_possible applied to
7445 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7446 BAR's equivalences. If we don't get a simplified form, make
7447 the SUBREG. It will not be used in an equivalence, but will
7448 cause two similar assignments to be detected.
7450 Note the loop below will find SUBREG_REG (DEST) since we have
7451 already entered SRC and DEST of the SET in the table. */
7453 if (GET_CODE (dest
) == SUBREG
7454 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7456 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7457 && (GET_MODE_SIZE (GET_MODE (dest
))
7458 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7459 && sets
[i
].src_elt
!= 0)
7461 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7462 struct table_elt
*elt
, *classp
= 0;
7464 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7465 elt
= elt
->next_same_value
)
7469 struct table_elt
*src_elt
;
7471 /* Ignore invalid entries. */
7472 if (GET_CODE (elt
->exp
) != REG
7473 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7476 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7478 new_src
= gen_rtx_SUBREG (new_mode
, elt
->exp
, 0);
7480 src_hash
= HASH (new_src
, new_mode
);
7481 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7483 /* Put the new source in the hash table is if isn't
7487 if (insert_regs (new_src
, classp
, 0))
7489 rehash_using_reg (new_src
);
7490 src_hash
= HASH (new_src
, new_mode
);
7492 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7493 src_elt
->in_memory
= elt
->in_memory
;
7494 src_elt
->in_struct
= elt
->in_struct
;
7496 else if (classp
&& classp
!= src_elt
->first_same_value
)
7497 /* Show that two things that we've seen before are
7498 actually the same. */
7499 merge_equiv_classes (src_elt
, classp
);
7501 classp
= src_elt
->first_same_value
;
7502 /* Ignore invalid entries. */
7504 && GET_CODE (classp
->exp
) != REG
7505 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, 0))
7506 classp
= classp
->next_same_value
;
7511 /* Special handling for (set REG0 REG1)
7512 where REG0 is the "cheapest", cheaper than REG1.
7513 After cse, REG1 will probably not be used in the sequel,
7514 so (if easily done) change this insn to (set REG1 REG0) and
7515 replace REG1 with REG0 in the previous insn that computed their value.
7516 Then REG1 will become a dead store and won't cloud the situation
7517 for later optimizations.
7519 Do not make this change if REG1 is a hard register, because it will
7520 then be used in the sequel and we may be changing a two-operand insn
7521 into a three-operand insn.
7523 Also do not do this if we are operating on a copy of INSN. */
7525 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7526 && NEXT_INSN (PREV_INSN (insn
)) == insn
7527 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7528 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7529 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7530 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7531 == REGNO (SET_DEST (sets
[0].rtl
))))
7533 rtx prev
= PREV_INSN (insn
);
7534 while (prev
&& GET_CODE (prev
) == NOTE
)
7535 prev
= PREV_INSN (prev
);
7537 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7538 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7540 rtx dest
= SET_DEST (sets
[0].rtl
);
7541 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7543 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7544 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7545 SET_SRC (sets
[0].rtl
), 1);
7546 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7547 apply_change_group ();
7549 /* If REG1 was equivalent to a constant, REG0 is not. */
7551 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7553 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7554 any REG_WAS_0 note on INSN to PREV. */
7555 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7557 remove_note (prev
, note
);
7559 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7562 remove_note (insn
, note
);
7563 XEXP (note
, 1) = REG_NOTES (prev
);
7564 REG_NOTES (prev
) = note
;
7567 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7568 then we must delete it, because the value in REG0 has changed. */
7569 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7570 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7571 remove_note (insn
, note
);
7575 /* If this is a conditional jump insn, record any known equivalences due to
7576 the condition being tested. */
7578 last_jump_equiv_class
= 0;
7579 if (GET_CODE (insn
) == JUMP_INSN
7580 && n_sets
== 1 && GET_CODE (x
) == SET
7581 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7582 record_jump_equiv (insn
, 0);
7585 /* If the previous insn set CC0 and this insn no longer references CC0,
7586 delete the previous insn. Here we use the fact that nothing expects CC0
7587 to be valid over an insn, which is true until the final pass. */
7588 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7589 && (tem
= single_set (prev_insn
)) != 0
7590 && SET_DEST (tem
) == cc0_rtx
7591 && ! reg_mentioned_p (cc0_rtx
, x
))
7593 PUT_CODE (prev_insn
, NOTE
);
7594 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7595 NOTE_SOURCE_FILE (prev_insn
) = 0;
7598 prev_insn_cc0
= this_insn_cc0
;
7599 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7605 /* Remove from the ahsh table all expressions that reference memory. */
7607 invalidate_memory ()
7610 register struct table_elt
*p
, *next
;
7612 for (i
= 0; i
< NBUCKETS
; i
++)
7613 for (p
= table
[i
]; p
; p
= next
)
7615 next
= p
->next_same_hash
;
7617 remove_from_table (p
, i
);
7621 /* XXX ??? The name of this function bears little resemblance to
7622 what this function actually does. FIXME. */
7624 note_mem_written (addr
)
7627 /* Pushing or popping the stack invalidates just the stack pointer. */
7628 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7629 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7630 && GET_CODE (XEXP (addr
, 0)) == REG
7631 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7633 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7634 reg_tick
[STACK_POINTER_REGNUM
]++;
7636 /* This should be *very* rare. */
7637 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7638 invalidate (stack_pointer_rtx
, VOIDmode
);
7644 /* Perform invalidation on the basis of everything about an insn
7645 except for invalidating the actual places that are SET in it.
7646 This includes the places CLOBBERed, and anything that might
7647 alias with something that is SET or CLOBBERed.
7649 X is the pattern of the insn. */
7652 invalidate_from_clobbers (x
)
7655 if (GET_CODE (x
) == CLOBBER
)
7657 rtx ref
= XEXP (x
, 0);
7660 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7661 || GET_CODE (ref
) == MEM
)
7662 invalidate (ref
, VOIDmode
);
7663 else if (GET_CODE (ref
) == STRICT_LOW_PART
7664 || GET_CODE (ref
) == ZERO_EXTRACT
)
7665 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7668 else if (GET_CODE (x
) == PARALLEL
)
7671 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7673 register rtx y
= XVECEXP (x
, 0, i
);
7674 if (GET_CODE (y
) == CLOBBER
)
7676 rtx ref
= XEXP (y
, 0);
7677 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7678 || GET_CODE (ref
) == MEM
)
7679 invalidate (ref
, VOIDmode
);
7680 else if (GET_CODE (ref
) == STRICT_LOW_PART
7681 || GET_CODE (ref
) == ZERO_EXTRACT
)
7682 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7688 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7689 and replace any registers in them with either an equivalent constant
7690 or the canonical form of the register. If we are inside an address,
7691 only do this if the address remains valid.
7693 OBJECT is 0 except when within a MEM in which case it is the MEM.
7695 Return the replacement for X. */
7698 cse_process_notes (x
, object
)
7702 enum rtx_code code
= GET_CODE (x
);
7703 char *fmt
= GET_RTX_FORMAT (code
);
7719 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7724 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7725 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7727 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7734 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7735 /* We don't substitute VOIDmode constants into these rtx,
7736 since they would impede folding. */
7737 if (GET_MODE (new) != VOIDmode
)
7738 validate_change (object
, &XEXP (x
, 0), new, 0);
7743 i
= reg_qty
[REGNO (x
)];
7745 /* Return a constant or a constant register. */
7746 if (REGNO_QTY_VALID_P (REGNO (x
))
7747 && qty_const
[i
] != 0
7748 && (CONSTANT_P (qty_const
[i
])
7749 || GET_CODE (qty_const
[i
]) == REG
))
7751 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7756 /* Otherwise, canonicalize this register. */
7757 return canon_reg (x
, NULL_RTX
);
7763 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7765 validate_change (object
, &XEXP (x
, i
),
7766 cse_process_notes (XEXP (x
, i
), object
), 0);
7771 /* Find common subexpressions between the end test of a loop and the beginning
7772 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7774 Often we have a loop where an expression in the exit test is used
7775 in the body of the loop. For example "while (*p) *q++ = *p++;".
7776 Because of the way we duplicate the loop exit test in front of the loop,
7777 however, we don't detect that common subexpression. This will be caught
7778 when global cse is implemented, but this is a quite common case.
7780 This function handles the most common cases of these common expressions.
7781 It is called after we have processed the basic block ending with the
7782 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7783 jumps to a label used only once. */
7786 cse_around_loop (loop_start
)
7791 struct table_elt
*p
;
7793 /* If the jump at the end of the loop doesn't go to the start, we don't
7795 for (insn
= PREV_INSN (loop_start
);
7796 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7797 insn
= PREV_INSN (insn
))
7801 || GET_CODE (insn
) != NOTE
7802 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7805 /* If the last insn of the loop (the end test) was an NE comparison,
7806 we will interpret it as an EQ comparison, since we fell through
7807 the loop. Any equivalences resulting from that comparison are
7808 therefore not valid and must be invalidated. */
7809 if (last_jump_equiv_class
)
7810 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7811 p
= p
->next_same_value
)
7813 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7814 || (GET_CODE (p
->exp
) == SUBREG
7815 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
7816 invalidate (p
->exp
, VOIDmode
);
7817 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7818 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7819 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
7822 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7823 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7825 The only thing we do with SET_DEST is invalidate entries, so we
7826 can safely process each SET in order. It is slightly less efficient
7827 to do so, but we only want to handle the most common cases.
7829 The gen_move_insn call in cse_set_around_loop may create new pseudos.
7830 These pseudos won't have valid entries in any of the tables indexed
7831 by register number, such as reg_qty. We avoid out-of-range array
7832 accesses by not processing any instructions created after cse started. */
7834 for (insn
= NEXT_INSN (loop_start
);
7835 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7836 && INSN_UID (insn
) < max_insn_uid
7837 && ! (GET_CODE (insn
) == NOTE
7838 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7839 insn
= NEXT_INSN (insn
))
7841 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7842 && (GET_CODE (PATTERN (insn
)) == SET
7843 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7844 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7845 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7846 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7847 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7848 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7849 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7850 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7855 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7856 since they are done elsewhere. This function is called via note_stores. */
7859 invalidate_skipped_set (dest
, set
)
7863 enum rtx_code code
= GET_CODE (dest
);
7866 && ! note_mem_written (dest
) /* If this is not a stack push ... */
7867 /* There are times when an address can appear varying and be a PLUS
7868 during this scan when it would be a fixed address were we to know
7869 the proper equivalences. So invalidate all memory if there is
7870 a BLKmode or nonscalar memory reference or a reference to a
7871 variable address. */
7872 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
7873 || cse_rtx_varies_p (XEXP (dest
, 0))))
7875 invalidate_memory ();
7879 if (GET_CODE (set
) == CLOBBER
7886 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
7887 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7888 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
7889 invalidate (dest
, VOIDmode
);
7892 /* Invalidate all insns from START up to the end of the function or the
7893 next label. This called when we wish to CSE around a block that is
7894 conditionally executed. */
7897 invalidate_skipped_block (start
)
7902 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7903 insn
= NEXT_INSN (insn
))
7905 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7908 if (GET_CODE (insn
) == CALL_INSN
)
7910 if (! CONST_CALL_P (insn
))
7911 invalidate_memory ();
7912 invalidate_for_call ();
7915 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7919 /* Used for communication between the following two routines; contains a
7920 value to be checked for modification. */
7922 static rtx cse_check_loop_start_value
;
7924 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7925 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7928 cse_check_loop_start (x
, set
)
7932 if (cse_check_loop_start_value
== 0
7933 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7936 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7937 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7938 cse_check_loop_start_value
= 0;
7941 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7942 a loop that starts with the label at LOOP_START.
7944 If X is a SET, we see if its SET_SRC is currently in our hash table.
7945 If so, we see if it has a value equal to some register used only in the
7946 loop exit code (as marked by jump.c).
7948 If those two conditions are true, we search backwards from the start of
7949 the loop to see if that same value was loaded into a register that still
7950 retains its value at the start of the loop.
7952 If so, we insert an insn after the load to copy the destination of that
7953 load into the equivalent register and (try to) replace our SET_SRC with that
7956 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7959 cse_set_around_loop (x
, insn
, loop_start
)
7964 struct table_elt
*src_elt
;
7966 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7967 are setting PC or CC0 or whose SET_SRC is already a register. */
7968 if (GET_CODE (x
) == SET
7969 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7970 && GET_CODE (SET_SRC (x
)) != REG
)
7972 src_elt
= lookup (SET_SRC (x
),
7973 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7974 GET_MODE (SET_DEST (x
)));
7977 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7978 src_elt
= src_elt
->next_same_value
)
7979 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7980 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7984 /* Look for an insn in front of LOOP_START that sets
7985 something in the desired mode to SET_SRC (x) before we hit
7986 a label or CALL_INSN. */
7988 for (p
= prev_nonnote_insn (loop_start
);
7989 p
&& GET_CODE (p
) != CALL_INSN
7990 && GET_CODE (p
) != CODE_LABEL
;
7991 p
= prev_nonnote_insn (p
))
7992 if ((set
= single_set (p
)) != 0
7993 && GET_CODE (SET_DEST (set
)) == REG
7994 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7995 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7997 /* We now have to ensure that nothing between P
7998 and LOOP_START modified anything referenced in
7999 SET_SRC (x). We know that nothing within the loop
8000 can modify it, or we would have invalidated it in
8004 cse_check_loop_start_value
= SET_SRC (x
);
8005 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
8006 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
8007 note_stores (PATTERN (q
), cse_check_loop_start
);
8009 /* If nothing was changed and we can replace our
8010 SET_SRC, add an insn after P to copy its destination
8011 to what we will be replacing SET_SRC with. */
8012 if (cse_check_loop_start_value
8013 && validate_change (insn
, &SET_SRC (x
),
8015 emit_insn_after (gen_move_insn (src_elt
->exp
,
8023 /* Now invalidate anything modified by X. */
8024 note_mem_written (SET_DEST (x
));
8026 /* See comment on similar code in cse_insn for explanation of these tests. */
8027 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
8028 || GET_CODE (SET_DEST (x
)) == MEM
)
8029 invalidate (SET_DEST (x
), VOIDmode
);
8030 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
8031 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
8032 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
8035 /* Find the end of INSN's basic block and return its range,
8036 the total number of SETs in all the insns of the block, the last insn of the
8037 block, and the branch path.
8039 The branch path indicates which branches should be followed. If a non-zero
8040 path size is specified, the block should be rescanned and a different set
8041 of branches will be taken. The branch path is only used if
8042 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8044 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8045 used to describe the block. It is filled in with the information about
8046 the current block. The incoming structure's branch path, if any, is used
8047 to construct the output branch path. */
8050 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8052 struct cse_basic_block_data
*data
;
8059 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8060 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8061 int path_size
= data
->path_size
;
8065 /* Update the previous branch path, if any. If the last branch was
8066 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8067 shorten the path by one and look at the previous branch. We know that
8068 at least one branch must have been taken if PATH_SIZE is non-zero. */
8069 while (path_size
> 0)
8071 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8073 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8080 /* Scan to end of this basic block. */
8081 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8083 /* Don't cse out the end of a loop. This makes a difference
8084 only for the unusual loops that always execute at least once;
8085 all other loops have labels there so we will stop in any case.
8086 Cse'ing out the end of the loop is dangerous because it
8087 might cause an invariant expression inside the loop
8088 to be reused after the end of the loop. This would make it
8089 hard to move the expression out of the loop in loop.c,
8090 especially if it is one of several equivalent expressions
8091 and loop.c would like to eliminate it.
8093 If we are running after loop.c has finished, we can ignore
8094 the NOTE_INSN_LOOP_END. */
8096 if (! after_loop
&& GET_CODE (p
) == NOTE
8097 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8100 /* Don't cse over a call to setjmp; on some machines (eg vax)
8101 the regs restored by the longjmp come from
8102 a later time than the setjmp. */
8103 if (GET_CODE (p
) == NOTE
8104 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8107 /* A PARALLEL can have lots of SETs in it,
8108 especially if it is really an ASM_OPERANDS. */
8109 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8110 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8111 nsets
+= XVECLEN (PATTERN (p
), 0);
8112 else if (GET_CODE (p
) != NOTE
)
8115 /* Ignore insns made by CSE; they cannot affect the boundaries of
8118 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8119 high_cuid
= INSN_CUID (p
);
8120 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8121 low_cuid
= INSN_CUID (p
);
8123 /* See if this insn is in our branch path. If it is and we are to
8125 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8127 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8130 /* Point to next entry in path, if any. */
8134 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8135 was specified, we haven't reached our maximum path length, there are
8136 insns following the target of the jump, this is the only use of the
8137 jump label, and the target label is preceded by a BARRIER.
8139 Alternatively, we can follow the jump if it branches around a
8140 block of code and there are no other branches into the block.
8141 In this case invalidate_skipped_block will be called to invalidate any
8142 registers set in the block when following the jump. */
8144 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8145 && GET_CODE (p
) == JUMP_INSN
8146 && GET_CODE (PATTERN (p
)) == SET
8147 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8148 && JUMP_LABEL (p
) != 0
8149 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8150 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8152 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8153 if ((GET_CODE (q
) != NOTE
8154 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8155 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8156 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8159 /* If we ran into a BARRIER, this code is an extension of the
8160 basic block when the branch is taken. */
8161 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8163 /* Don't allow ourself to keep walking around an
8164 always-executed loop. */
8165 if (next_real_insn (q
) == next
)
8171 /* Similarly, don't put a branch in our path more than once. */
8172 for (i
= 0; i
< path_entry
; i
++)
8173 if (data
->path
[i
].branch
== p
)
8176 if (i
!= path_entry
)
8179 data
->path
[path_entry
].branch
= p
;
8180 data
->path
[path_entry
++].status
= TAKEN
;
8182 /* This branch now ends our path. It was possible that we
8183 didn't see this branch the last time around (when the
8184 insn in front of the target was a JUMP_INSN that was
8185 turned into a no-op). */
8186 path_size
= path_entry
;
8189 /* Mark block so we won't scan it again later. */
8190 PUT_MODE (NEXT_INSN (p
), QImode
);
8192 /* Detect a branch around a block of code. */
8193 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8197 if (next_real_insn (q
) == next
)
8203 for (i
= 0; i
< path_entry
; i
++)
8204 if (data
->path
[i
].branch
== p
)
8207 if (i
!= path_entry
)
8210 /* This is no_labels_between_p (p, q) with an added check for
8211 reaching the end of a function (in case Q precedes P). */
8212 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8213 if (GET_CODE (tmp
) == CODE_LABEL
)
8218 data
->path
[path_entry
].branch
= p
;
8219 data
->path
[path_entry
++].status
= AROUND
;
8221 path_size
= path_entry
;
8224 /* Mark block so we won't scan it again later. */
8225 PUT_MODE (NEXT_INSN (p
), QImode
);
8232 data
->low_cuid
= low_cuid
;
8233 data
->high_cuid
= high_cuid
;
8234 data
->nsets
= nsets
;
8237 /* If all jumps in the path are not taken, set our path length to zero
8238 so a rescan won't be done. */
8239 for (i
= path_size
- 1; i
>= 0; i
--)
8240 if (data
->path
[i
].status
!= NOT_TAKEN
)
8244 data
->path_size
= 0;
8246 data
->path_size
= path_size
;
8248 /* End the current branch path. */
8249 data
->path
[path_size
].branch
= 0;
8252 /* Perform cse on the instructions of a function.
8253 F is the first instruction.
8254 NREGS is one plus the highest pseudo-reg number used in the instruction.
8256 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8257 (only if -frerun-cse-after-loop).
8259 Returns 1 if jump_optimize should be redone due to simplifications
8260 in conditional jump instructions. */
8263 cse_main (f
, nregs
, after_loop
, file
)
8269 struct cse_basic_block_data val
;
8270 register rtx insn
= f
;
8273 cse_jumps_altered
= 0;
8274 recorded_label_ref
= 0;
8275 constant_pool_entries_cost
= 0;
8279 init_alias_analysis ();
8283 max_insn_uid
= get_max_uid ();
8285 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8286 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8288 for (i
= 0; i
< nregs
; i
++)
8290 all_minus_one
[i
] = -1;
8294 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8295 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8296 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8297 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8298 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8300 #ifdef LOAD_EXTEND_OP
8302 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8303 and change the code and mode as appropriate. */
8304 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
8307 /* Discard all the free elements of the previous function
8308 since they are allocated in the temporarily obstack. */
8309 bzero ((char *) table
, sizeof table
);
8310 free_element_chain
= 0;
8311 n_elements_made
= 0;
8313 /* Find the largest uid. */
8315 max_uid
= get_max_uid ();
8316 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8317 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8319 /* Compute the mapping from uids to cuids.
8320 CUIDs are numbers assigned to insns, like uids,
8321 except that cuids increase monotonically through the code.
8322 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8323 between two insns is not affected by -g. */
8325 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8327 if (GET_CODE (insn
) != NOTE
8328 || NOTE_LINE_NUMBER (insn
) < 0)
8329 INSN_CUID (insn
) = ++i
;
8331 /* Give a line number note the same cuid as preceding insn. */
8332 INSN_CUID (insn
) = i
;
8335 /* Initialize which registers are clobbered by calls. */
8337 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8339 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8340 if ((call_used_regs
[i
]
8341 /* Used to check !fixed_regs[i] here, but that isn't safe;
8342 fixed regs are still call-clobbered, and sched can get
8343 confused if they can "live across calls".
8345 The frame pointer is always preserved across calls. The arg
8346 pointer is if it is fixed. The stack pointer usually is, unless
8347 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8348 will be present. If we are generating PIC code, the PIC offset
8349 table register is preserved across calls. */
8351 && i
!= STACK_POINTER_REGNUM
8352 && i
!= FRAME_POINTER_REGNUM
8353 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8354 && i
!= HARD_FRAME_POINTER_REGNUM
8356 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8357 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8359 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8360 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8364 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8366 /* Loop over basic blocks.
8367 Compute the maximum number of qty's needed for each basic block
8368 (which is 2 for each SET). */
8372 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8373 flag_cse_skip_blocks
);
8375 /* If this basic block was already processed or has no sets, skip it. */
8376 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8378 PUT_MODE (insn
, VOIDmode
);
8379 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8384 cse_basic_block_start
= val
.low_cuid
;
8385 cse_basic_block_end
= val
.high_cuid
;
8386 max_qty
= val
.nsets
* 2;
8389 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8390 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8393 /* Make MAX_QTY bigger to give us room to optimize
8394 past the end of this basic block, if that should prove useful. */
8400 /* If this basic block is being extended by following certain jumps,
8401 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8402 Otherwise, we start after this basic block. */
8403 if (val
.path_size
> 0)
8404 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8407 int old_cse_jumps_altered
= cse_jumps_altered
;
8410 /* When cse changes a conditional jump to an unconditional
8411 jump, we want to reprocess the block, since it will give
8412 us a new branch path to investigate. */
8413 cse_jumps_altered
= 0;
8414 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8415 if (cse_jumps_altered
== 0
8416 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8419 cse_jumps_altered
|= old_cse_jumps_altered
;
8427 /* Tell refers_to_mem_p that qty_const info is not available. */
8430 if (max_elements_made
< n_elements_made
)
8431 max_elements_made
= n_elements_made
;
8433 return cse_jumps_altered
|| recorded_label_ref
;
8436 /* Process a single basic block. FROM and TO and the limits of the basic
8437 block. NEXT_BRANCH points to the branch path when following jumps or
8438 a null path when not following jumps.
8440 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8441 loop. This is true when we are being called for the last time on a
8442 block and this CSE pass is before loop.c. */
8445 cse_basic_block (from
, to
, next_branch
, around_loop
)
8446 register rtx from
, to
;
8447 struct branch_path
*next_branch
;
8452 int in_libcall_block
= 0;
8455 /* Each of these arrays is undefined before max_reg, so only allocate
8456 the space actually needed and adjust the start below. */
8458 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8459 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8460 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8461 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8462 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8464 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8465 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8466 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8468 qty_first_reg
-= max_reg
;
8469 qty_last_reg
-= max_reg
;
8470 qty_mode
-= max_reg
;
8471 qty_const
-= max_reg
;
8472 qty_const_insn
-= max_reg
;
8473 qty_comparison_code
-= max_reg
;
8474 qty_comparison_qty
-= max_reg
;
8475 qty_comparison_const
-= max_reg
;
8479 /* TO might be a label. If so, protect it from being deleted. */
8480 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8483 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8485 register enum rtx_code code
;
8487 struct table_elt
*p
, *next
;
8489 /* If we have processed 1,000 insns, flush the hash table to avoid
8490 extreme quadratic behavior.
8492 ??? This is a real kludge and needs to be done some other way.
8494 if (num_insns
++ > 1000)
8496 for (i
= 0; i
< NBUCKETS
; i
++)
8497 for (p
= table
[i
]; p
; p
= next
)
8499 next
= p
->next_same_hash
;
8501 if (GET_CODE (p
->exp
) == REG
)
8502 invalidate (p
->exp
, p
->mode
);
8504 remove_from_table (p
, i
);
8510 /* See if this is a branch that is part of the path. If so, and it is
8511 to be taken, do so. */
8512 if (next_branch
->branch
== insn
)
8514 enum taken status
= next_branch
++->status
;
8515 if (status
!= NOT_TAKEN
)
8517 if (status
== TAKEN
)
8518 record_jump_equiv (insn
, 1);
8520 invalidate_skipped_block (NEXT_INSN (insn
));
8522 /* Set the last insn as the jump insn; it doesn't affect cc0.
8523 Then follow this branch. */
8528 insn
= JUMP_LABEL (insn
);
8533 code
= GET_CODE (insn
);
8534 if (GET_MODE (insn
) == QImode
)
8535 PUT_MODE (insn
, VOIDmode
);
8537 if (GET_RTX_CLASS (code
) == 'i')
8539 /* Process notes first so we have all notes in canonical forms when
8540 looking for duplicate operations. */
8542 if (REG_NOTES (insn
))
8543 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8545 /* Track when we are inside in LIBCALL block. Inside such a block,
8546 we do not want to record destinations. The last insn of a
8547 LIBCALL block is not considered to be part of the block, since
8548 its destination is the result of the block and hence should be
8551 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8552 in_libcall_block
= 1;
8553 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8554 in_libcall_block
= 0;
8556 cse_insn (insn
, in_libcall_block
);
8559 /* If INSN is now an unconditional jump, skip to the end of our
8560 basic block by pretending that we just did the last insn in the
8561 basic block. If we are jumping to the end of our block, show
8562 that we can have one usage of TO. */
8564 if (simplejump_p (insn
))
8569 if (JUMP_LABEL (insn
) == to
)
8572 /* Maybe TO was deleted because the jump is unconditional.
8573 If so, there is nothing left in this basic block. */
8574 /* ??? Perhaps it would be smarter to set TO
8575 to whatever follows this insn,
8576 and pretend the basic block had always ended here. */
8577 if (INSN_DELETED_P (to
))
8580 insn
= PREV_INSN (to
);
8583 /* See if it is ok to keep on going past the label
8584 which used to end our basic block. Remember that we incremented
8585 the count of that label, so we decrement it here. If we made
8586 a jump unconditional, TO_USAGE will be one; in that case, we don't
8587 want to count the use in that jump. */
8589 if (to
!= 0 && NEXT_INSN (insn
) == to
8590 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8592 struct cse_basic_block_data val
;
8595 insn
= NEXT_INSN (to
);
8597 if (LABEL_NUSES (to
) == 0)
8598 insn
= delete_insn (to
);
8600 /* If TO was the last insn in the function, we are done. */
8604 /* If TO was preceded by a BARRIER we are done with this block
8605 because it has no continuation. */
8606 prev
= prev_nonnote_insn (to
);
8607 if (prev
&& GET_CODE (prev
) == BARRIER
)
8610 /* Find the end of the following block. Note that we won't be
8611 following branches in this case. */
8614 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8616 /* If the tables we allocated have enough space left
8617 to handle all the SETs in the next basic block,
8618 continue through it. Otherwise, return,
8619 and that block will be scanned individually. */
8620 if (val
.nsets
* 2 + next_qty
> max_qty
)
8623 cse_basic_block_start
= val
.low_cuid
;
8624 cse_basic_block_end
= val
.high_cuid
;
8627 /* Prevent TO from being deleted if it is a label. */
8628 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8631 /* Back up so we process the first insn in the extension. */
8632 insn
= PREV_INSN (insn
);
8636 if (next_qty
> max_qty
)
8639 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8640 the previous insn is the only insn that branches to the head of a loop,
8641 we can cse into the loop. Don't do this if we changed the jump
8642 structure of a loop unless we aren't going to be following jumps. */
8644 if ((cse_jumps_altered
== 0
8645 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8646 && around_loop
&& to
!= 0
8647 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8648 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8649 && JUMP_LABEL (PREV_INSN (to
)) != 0
8650 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8651 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8653 return to
? NEXT_INSN (to
) : 0;
8656 /* Count the number of times registers are used (not set) in X.
8657 COUNTS is an array in which we accumulate the count, INCR is how much
8658 we count each register usage.
8660 Don't count a usage of DEST, which is the SET_DEST of a SET which
8661 contains X in its SET_SRC. This is because such a SET does not
8662 modify the liveness of DEST. */
8665 count_reg_usage (x
, counts
, dest
, incr
)
8678 switch (code
= GET_CODE (x
))
8682 counts
[REGNO (x
)] += incr
;
8696 /* Unless we are setting a REG, count everything in SET_DEST. */
8697 if (GET_CODE (SET_DEST (x
)) != REG
)
8698 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8700 /* If SRC has side-effects, then we can't delete this insn, so the
8701 usage of SET_DEST inside SRC counts.
8703 ??? Strictly-speaking, we might be preserving this insn
8704 because some other SET has side-effects, but that's hard
8705 to do and can't happen now. */
8706 count_reg_usage (SET_SRC (x
), counts
,
8707 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8712 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8714 /* ... falls through ... */
8717 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8719 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8722 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8727 if (REG_NOTE_KIND (x
) == REG_EQUAL
8728 || GET_CODE (XEXP (x
,0)) == USE
)
8729 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8730 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8737 fmt
= GET_RTX_FORMAT (code
);
8738 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8741 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8742 else if (fmt
[i
] == 'E')
8743 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8744 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8748 /* Scan all the insns and delete any that are dead; i.e., they store a register
8749 that is never used or they copy a register to itself.
8751 This is used to remove insns made obviously dead by cse. It improves the
8752 heuristics in loop since it won't try to move dead invariants out of loops
8753 or make givs for dead quantities. The remaining passes of the compilation
8754 are also sped up. */
8757 delete_dead_from_cse (insns
, nreg
)
8761 int *counts
= (int *) alloca (nreg
* sizeof (int));
8767 int in_libcall
= 0, dead_libcall
= 0;
8769 /* First count the number of times each register is used. */
8770 bzero ((char *) counts
, sizeof (int) * nreg
);
8771 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8772 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8774 /* Go from the last insn to the first and delete insns that only set unused
8775 registers or copy a register to itself. As we delete an insn, remove
8776 usage counts for registers it uses. */
8777 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8782 prev
= prev_real_insn (insn
);
8784 /* Don't delete any insns that are part of a libcall block unless
8785 we can delete the whole libcall block.
8787 Flow or loop might get confused if we did that. Remember
8788 that we are scanning backwards. */
8789 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8795 /* See if there's a REG_EQUAL note on this insn and try to
8796 replace the source with the REG_EQUAL expression.
8798 We assume that insns with REG_RETVALs can only be reg->reg
8799 copies at this point. */
8800 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
8803 rtx set
= single_set (insn
);
8805 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
8808 find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
8813 else if (in_libcall
)
8814 live_insn
= ! dead_libcall
;
8815 else if (GET_CODE (PATTERN (insn
)) == SET
)
8817 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8818 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8822 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8823 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8824 && ((tem
= next_nonnote_insn (insn
)) == 0
8825 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8826 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8829 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8830 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8831 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8832 || side_effects_p (SET_SRC (PATTERN (insn
))))
8835 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8836 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8838 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8840 if (GET_CODE (elt
) == SET
)
8842 if (GET_CODE (SET_DEST (elt
)) == REG
8843 && SET_DEST (elt
) == SET_SRC (elt
))
8847 else if (GET_CODE (SET_DEST (elt
)) == CC0
8848 && ! side_effects_p (SET_SRC (elt
))
8849 && ((tem
= next_nonnote_insn (insn
)) == 0
8850 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8851 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8854 else if (GET_CODE (SET_DEST (elt
)) != REG
8855 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8856 || counts
[REGNO (SET_DEST (elt
))] != 0
8857 || side_effects_p (SET_SRC (elt
)))
8860 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8866 /* If this is a dead insn, delete it and show registers in it aren't
8871 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8875 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))