tree.h (PHI_CHAIN): New.
[gcc.git] / gcc / cse.c
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
45 #include "params.h"
46 #include "rtlhooks-def.h"
47
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
52
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
57 global CSE.
58
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
62
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
66
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
75
76 Registers and "quantity numbers":
77
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
85 of as containing.
86
87 All real quantity numbers are greater than or equal to `max_reg'.
88 If register N has not been assigned a quantity, reg_qty[N] will equal N.
89
90 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
91 entries should be referenced with an index below `max_reg'.
92
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
96
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
100
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
104
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
109
110 Constants and quantity numbers
111
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
115
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
119
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
122 `const_rtx'.
123
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
129
130 Other expressions:
131
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
136 hash codes.
137
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
140
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
145
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
149
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
154
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
162
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
165 must be removed.
166
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
174
175 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
176 reg_tick[i] is incremented whenever a value is stored in register i.
177 reg_in_table[i] holds -1 if no references to register i have been
178 entered in the table; otherwise, it contains the value reg_tick[i] had
179 when the references were entered. If we want to enter a reference
180 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
181 Until we want to enter a new entry, the mere fact that the two vectors
182 don't match makes the entries be ignored if anyone tries to match them.
183
184 Registers themselves are entered in the hash table as well as in
185 the equivalent-register chains. However, the vectors `reg_tick'
186 and `reg_in_table' do not apply to expressions which are simple
187 register references. These expressions are removed from the table
188 immediately when they become invalid, and this can be done even if
189 we do not immediately search for all the expressions that refer to
190 the register.
191
192 A CLOBBER rtx in an instruction invalidates its operand for further
193 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
194 invalidates everything that resides in memory.
195
196 Related expressions:
197
198 Constant expressions that differ only by an additive integer
199 are called related. When a constant expression is put in
200 the table, the related expression with no constant term
201 is also entered. These are made to point at each other
202 so that it is possible to find out if there exists any
203 register equivalent to an expression related to a given expression. */
204
205 /* One plus largest register number used in this function. */
206
207 static int max_reg;
208
209 /* One plus largest instruction UID used in this function at time of
210 cse_main call. */
211
212 static int max_insn_uid;
213
214 /* Length of qty_table vector. We know in advance we will not need
215 a quantity number this big. */
216
217 static int max_qty;
218
219 /* Next quantity number to be allocated.
220 This is 1 + the largest number needed so far. */
221
222 static int next_qty;
223
224 /* Per-qty information tracking.
225
226 `first_reg' and `last_reg' track the head and tail of the
227 chain of registers which currently contain this quantity.
228
229 `mode' contains the machine mode of this quantity.
230
231 `const_rtx' holds the rtx of the constant value of this
232 quantity, if known. A summations of the frame/arg pointer
233 and a constant can also be entered here. When this holds
234 a known value, `const_insn' is the insn which stored the
235 constant value.
236
237 `comparison_{code,const,qty}' are used to track when a
238 comparison between a quantity and some constant or register has
239 been passed. In such a case, we know the results of the comparison
240 in case we see it again. These members record a comparison that
241 is known to be true. `comparison_code' holds the rtx code of such
242 a comparison, else it is set to UNKNOWN and the other two
243 comparison members are undefined. `comparison_const' holds
244 the constant being compared against, or zero if the comparison
245 is not against a constant. `comparison_qty' holds the quantity
246 being compared against when the result is known. If the comparison
247 is not with a register, `comparison_qty' is -1. */
248
249 struct qty_table_elem
250 {
251 rtx const_rtx;
252 rtx const_insn;
253 rtx comparison_const;
254 int comparison_qty;
255 unsigned int first_reg, last_reg;
256 /* The sizes of these fields should match the sizes of the
257 code and mode fields of struct rtx_def (see rtl.h). */
258 ENUM_BITFIELD(rtx_code) comparison_code : 16;
259 ENUM_BITFIELD(machine_mode) mode : 8;
260 };
261
262 /* The table of all qtys, indexed by qty number. */
263 static struct qty_table_elem *qty_table;
264
265 #ifdef HAVE_cc0
266 /* For machines that have a CC0, we do not record its value in the hash
267 table since its use is guaranteed to be the insn immediately following
268 its definition and any other insn is presumed to invalidate it.
269
270 Instead, we store below the value last assigned to CC0. If it should
271 happen to be a constant, it is stored in preference to the actual
272 assigned value. In case it is a constant, we store the mode in which
273 the constant should be interpreted. */
274
275 static rtx prev_insn_cc0;
276 static enum machine_mode prev_insn_cc0_mode;
277
278 /* Previous actual insn. 0 if at first insn of basic block. */
279
280 static rtx prev_insn;
281 #endif
282
283 /* Insn being scanned. */
284
285 static rtx this_insn;
286
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
289 value.
290
291 Or -1 if this register is at the end of the chain.
292
293 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
294
295 /* Per-register equivalence chain. */
296 struct reg_eqv_elem
297 {
298 int next, prev;
299 };
300
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
303
304 struct cse_reg_info
305 {
306 /* Next in hash chain. */
307 struct cse_reg_info *hash_next;
308
309 /* The next cse_reg_info structure in the free or used list. */
310 struct cse_reg_info *next;
311
312 /* Search key */
313 unsigned int regno;
314
315 /* The quantity number of the register's current contents. */
316 int reg_qty;
317
318 /* The number of times the register has been altered in the current
319 basic block. */
320 int reg_tick;
321
322 /* The REG_TICK value at which rtx's containing this register are
323 valid in the hash table. If this does not equal the current
324 reg_tick value, such expressions existing in the hash table are
325 invalid. */
326 int reg_in_table;
327
328 /* The SUBREG that was set when REG_TICK was last incremented. Set
329 to -1 if the last store was to the whole register, not a subreg. */
330 unsigned int subreg_ticked;
331 };
332
333 /* A free list of cse_reg_info entries. */
334 static struct cse_reg_info *cse_reg_info_free_list;
335
336 /* A used list of cse_reg_info entries. */
337 static struct cse_reg_info *cse_reg_info_used_list;
338 static struct cse_reg_info *cse_reg_info_used_list_end;
339
340 /* A mapping from registers to cse_reg_info data structures. */
341 #define REGHASH_SHIFT 7
342 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
343 #define REGHASH_MASK (REGHASH_SIZE - 1)
344 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
345
346 #define REGHASH_FN(REGNO) \
347 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
348
349 /* The last lookup we did into the cse_reg_info_tree. This allows us
350 to cache repeated lookups. */
351 static unsigned int cached_regno;
352 static struct cse_reg_info *cached_cse_reg_info;
353
354 /* A HARD_REG_SET containing all the hard registers for which there is
355 currently a REG expression in the hash table. Note the difference
356 from the above variables, which indicate if the REG is mentioned in some
357 expression in the table. */
358
359 static HARD_REG_SET hard_regs_in_table;
360
361 /* CUID of insn that starts the basic block currently being cse-processed. */
362
363 static int cse_basic_block_start;
364
365 /* CUID of insn that ends the basic block currently being cse-processed. */
366
367 static int cse_basic_block_end;
368
369 /* Vector mapping INSN_UIDs to cuids.
370 The cuids are like uids but increase monotonically always.
371 We use them to see whether a reg is used outside a given basic block. */
372
373 static int *uid_cuid;
374
375 /* Highest UID in UID_CUID. */
376 static int max_uid;
377
378 /* Get the cuid of an insn. */
379
380 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
381
382 /* Nonzero if this pass has made changes, and therefore it's
383 worthwhile to run the garbage collector. */
384
385 static int cse_altered;
386
387 /* Nonzero if cse has altered conditional jump insns
388 in such a way that jump optimization should be redone. */
389
390 static int cse_jumps_altered;
391
392 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
393 REG_LABEL, we have to rerun jump after CSE to put in the note. */
394 static int recorded_label_ref;
395
396 /* canon_hash stores 1 in do_not_record
397 if it notices a reference to CC0, PC, or some other volatile
398 subexpression. */
399
400 static int do_not_record;
401
402 #ifdef LOAD_EXTEND_OP
403
404 /* Scratch rtl used when looking for load-extended copy of a MEM. */
405 static rtx memory_extend_rtx;
406 #endif
407
408 /* canon_hash stores 1 in hash_arg_in_memory
409 if it notices a reference to memory within the expression being hashed. */
410
411 static int hash_arg_in_memory;
412
413 /* The hash table contains buckets which are chains of `struct table_elt's,
414 each recording one expression's information.
415 That expression is in the `exp' field.
416
417 The canon_exp field contains a canonical (from the point of view of
418 alias analysis) version of the `exp' field.
419
420 Those elements with the same hash code are chained in both directions
421 through the `next_same_hash' and `prev_same_hash' fields.
422
423 Each set of expressions with equivalent values
424 are on a two-way chain through the `next_same_value'
425 and `prev_same_value' fields, and all point with
426 the `first_same_value' field at the first element in
427 that chain. The chain is in order of increasing cost.
428 Each element's cost value is in its `cost' field.
429
430 The `in_memory' field is nonzero for elements that
431 involve any reference to memory. These elements are removed
432 whenever a write is done to an unidentified location in memory.
433 To be safe, we assume that a memory address is unidentified unless
434 the address is either a symbol constant or a constant plus
435 the frame pointer or argument pointer.
436
437 The `related_value' field is used to connect related expressions
438 (that differ by adding an integer).
439 The related expressions are chained in a circular fashion.
440 `related_value' is zero for expressions for which this
441 chain is not useful.
442
443 The `cost' field stores the cost of this element's expression.
444 The `regcost' field stores the value returned by approx_reg_cost for
445 this element's expression.
446
447 The `is_const' flag is set if the element is a constant (including
448 a fixed address).
449
450 The `flag' field is used as a temporary during some search routines.
451
452 The `mode' field is usually the same as GET_MODE (`exp'), but
453 if `exp' is a CONST_INT and has no machine mode then the `mode'
454 field is the mode it was being used as. Each constant is
455 recorded separately for each mode it is used with. */
456
457 struct table_elt
458 {
459 rtx exp;
460 rtx canon_exp;
461 struct table_elt *next_same_hash;
462 struct table_elt *prev_same_hash;
463 struct table_elt *next_same_value;
464 struct table_elt *prev_same_value;
465 struct table_elt *first_same_value;
466 struct table_elt *related_value;
467 int cost;
468 int regcost;
469 /* The size of this field should match the size
470 of the mode field of struct rtx_def (see rtl.h). */
471 ENUM_BITFIELD(machine_mode) mode : 8;
472 char in_memory;
473 char is_const;
474 char flag;
475 };
476
477 /* We don't want a lot of buckets, because we rarely have very many
478 things stored in the hash table, and a lot of buckets slows
479 down a lot of loops that happen frequently. */
480 #define HASH_SHIFT 5
481 #define HASH_SIZE (1 << HASH_SHIFT)
482 #define HASH_MASK (HASH_SIZE - 1)
483
484 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
485 register (hard registers may require `do_not_record' to be set). */
486
487 #define HASH(X, M) \
488 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
489 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
490 : canon_hash (X, M)) & HASH_MASK)
491
492 /* Determine whether register number N is considered a fixed register for the
493 purpose of approximating register costs.
494 It is desirable to replace other regs with fixed regs, to reduce need for
495 non-fixed hard regs.
496 A reg wins if it is either the frame pointer or designated as fixed. */
497 #define FIXED_REGNO_P(N) \
498 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
499 || fixed_regs[N] || global_regs[N])
500
501 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
502 hard registers and pointers into the frame are the cheapest with a cost
503 of 0. Next come pseudos with a cost of one and other hard registers with
504 a cost of 2. Aside from these special cases, call `rtx_cost'. */
505
506 #define CHEAP_REGNO(N) \
507 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
508 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
509 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
510 || ((N) < FIRST_PSEUDO_REGISTER \
511 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
512
513 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
514 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
515
516 /* Get the info associated with register N. */
517
518 #define GET_CSE_REG_INFO(N) \
519 (((N) == cached_regno && cached_cse_reg_info) \
520 ? cached_cse_reg_info : get_cse_reg_info ((N)))
521
522 /* Get the number of times this register has been updated in this
523 basic block. */
524
525 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
526
527 /* Get the point at which REG was recorded in the table. */
528
529 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
530
531 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
532 SUBREG). */
533
534 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
535
536 /* Get the quantity number for REG. */
537
538 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
539
540 /* Determine if the quantity number for register X represents a valid index
541 into the qty_table. */
542
543 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
544
545 static struct table_elt *table[HASH_SIZE];
546
547 /* Chain of `struct table_elt's made so far for this function
548 but currently removed from the table. */
549
550 static struct table_elt *free_element_chain;
551
552 /* Number of `struct table_elt' structures made so far for this function. */
553
554 static int n_elements_made;
555
556 /* Maximum value `n_elements_made' has had so far in this compilation
557 for functions previously processed. */
558
559 static int max_elements_made;
560
561 /* Surviving equivalence class when two equivalence classes are merged
562 by recording the effects of a jump in the last insn. Zero if the
563 last insn was not a conditional jump. */
564
565 static struct table_elt *last_jump_equiv_class;
566
567 /* Set to the cost of a constant pool reference if one was found for a
568 symbolic constant. If this was found, it means we should try to
569 convert constants into constant pool entries if they don't fit in
570 the insn. */
571
572 static int constant_pool_entries_cost;
573 static int constant_pool_entries_regcost;
574
575 /* This data describes a block that will be processed by cse_basic_block. */
576
577 struct cse_basic_block_data
578 {
579 /* Lowest CUID value of insns in block. */
580 int low_cuid;
581 /* Highest CUID value of insns in block. */
582 int high_cuid;
583 /* Total number of SETs in block. */
584 int nsets;
585 /* Last insn in the block. */
586 rtx last;
587 /* Size of current branch path, if any. */
588 int path_size;
589 /* Current branch path, indicating which branches will be taken. */
590 struct branch_path
591 {
592 /* The branch insn. */
593 rtx branch;
594 /* Whether it should be taken or not. AROUND is the same as taken
595 except that it is used when the destination label is not preceded
596 by a BARRIER. */
597 enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status;
598 } *path;
599 };
600
601 static bool fixed_base_plus_p (rtx x);
602 static int notreg_cost (rtx, enum rtx_code);
603 static int approx_reg_cost_1 (rtx *, void *);
604 static int approx_reg_cost (rtx);
605 static int preferable (int, int, int, int);
606 static void new_basic_block (void);
607 static void make_new_qty (unsigned int, enum machine_mode);
608 static void make_regs_eqv (unsigned int, unsigned int);
609 static void delete_reg_equiv (unsigned int);
610 static int mention_regs (rtx);
611 static int insert_regs (rtx, struct table_elt *, int);
612 static void remove_from_table (struct table_elt *, unsigned);
613 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
614 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
615 static rtx lookup_as_function (rtx, enum rtx_code);
616 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
617 enum machine_mode);
618 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
619 static void invalidate (rtx, enum machine_mode);
620 static int cse_rtx_varies_p (rtx, int);
621 static void remove_invalid_refs (unsigned int);
622 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
623 enum machine_mode);
624 static void rehash_using_reg (rtx);
625 static void invalidate_memory (void);
626 static void invalidate_for_call (void);
627 static rtx use_related_value (rtx, struct table_elt *);
628 static unsigned canon_hash (rtx, enum machine_mode);
629 static unsigned canon_hash_string (const char *);
630 static unsigned safe_hash (rtx, enum machine_mode);
631 static int exp_equiv_p (rtx, rtx, int, int);
632 static rtx canon_reg (rtx, rtx);
633 static void find_best_addr (rtx, rtx *, enum machine_mode);
634 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
635 enum machine_mode *,
636 enum machine_mode *);
637 static rtx fold_rtx (rtx, rtx);
638 static rtx equiv_constant (rtx);
639 static void record_jump_equiv (rtx, int);
640 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
641 int);
642 static void cse_insn (rtx, rtx);
643 static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
644 int, int, int);
645 static int addr_affects_sp_p (rtx);
646 static void invalidate_from_clobbers (rtx);
647 static rtx cse_process_notes (rtx, rtx);
648 static void cse_around_loop (rtx);
649 static void invalidate_skipped_set (rtx, rtx, void *);
650 static void invalidate_skipped_block (rtx);
651 static void cse_check_loop_start (rtx, rtx, void *);
652 static void cse_set_around_loop (rtx, rtx, rtx);
653 static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
654 static void count_reg_usage (rtx, int *, int);
655 static int check_for_label_ref (rtx *, void *);
656 extern void dump_class (struct table_elt*);
657 static struct cse_reg_info * get_cse_reg_info (unsigned int);
658 static int check_dependence (rtx *, void *);
659
660 static void flush_hash_table (void);
661 static bool insn_live_p (rtx, int *);
662 static bool set_live_p (rtx, rtx, int *);
663 static bool dead_libcall_p (rtx, int *);
664 static int cse_change_cc_mode (rtx *, void *);
665 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
666 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
667 \f
668
669 #undef RTL_HOOKS_GEN_LOWPART
670 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
671
672 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
673 \f
674 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
675 virtual regs here because the simplify_*_operation routines are called
676 by integrate.c, which is called before virtual register instantiation. */
677
678 static bool
679 fixed_base_plus_p (rtx x)
680 {
681 switch (GET_CODE (x))
682 {
683 case REG:
684 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
685 return true;
686 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
687 return true;
688 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
689 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
690 return true;
691 return false;
692
693 case PLUS:
694 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
695 return false;
696 return fixed_base_plus_p (XEXP (x, 0));
697
698 case ADDRESSOF:
699 return true;
700
701 default:
702 return false;
703 }
704 }
705
706 /* Dump the expressions in the equivalence class indicated by CLASSP.
707 This function is used only for debugging. */
708 void
709 dump_class (struct table_elt *classp)
710 {
711 struct table_elt *elt;
712
713 fprintf (stderr, "Equivalence chain for ");
714 print_rtl (stderr, classp->exp);
715 fprintf (stderr, ": \n");
716
717 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
718 {
719 print_rtl (stderr, elt->exp);
720 fprintf (stderr, "\n");
721 }
722 }
723
724 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
725
726 static int
727 approx_reg_cost_1 (rtx *xp, void *data)
728 {
729 rtx x = *xp;
730 int *cost_p = data;
731
732 if (x && REG_P (x))
733 {
734 unsigned int regno = REGNO (x);
735
736 if (! CHEAP_REGNO (regno))
737 {
738 if (regno < FIRST_PSEUDO_REGISTER)
739 {
740 if (SMALL_REGISTER_CLASSES)
741 return 1;
742 *cost_p += 2;
743 }
744 else
745 *cost_p += 1;
746 }
747 }
748
749 return 0;
750 }
751
752 /* Return an estimate of the cost of the registers used in an rtx.
753 This is mostly the number of different REG expressions in the rtx;
754 however for some exceptions like fixed registers we use a cost of
755 0. If any other hard register reference occurs, return MAX_COST. */
756
757 static int
758 approx_reg_cost (rtx x)
759 {
760 int cost = 0;
761
762 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
763 return MAX_COST;
764
765 return cost;
766 }
767
768 /* Return a negative value if an rtx A, whose costs are given by COST_A
769 and REGCOST_A, is more desirable than an rtx B.
770 Return a positive value if A is less desirable, or 0 if the two are
771 equally good. */
772 static int
773 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
774 {
775 /* First, get rid of cases involving expressions that are entirely
776 unwanted. */
777 if (cost_a != cost_b)
778 {
779 if (cost_a == MAX_COST)
780 return 1;
781 if (cost_b == MAX_COST)
782 return -1;
783 }
784
785 /* Avoid extending lifetimes of hardregs. */
786 if (regcost_a != regcost_b)
787 {
788 if (regcost_a == MAX_COST)
789 return 1;
790 if (regcost_b == MAX_COST)
791 return -1;
792 }
793
794 /* Normal operation costs take precedence. */
795 if (cost_a != cost_b)
796 return cost_a - cost_b;
797 /* Only if these are identical consider effects on register pressure. */
798 if (regcost_a != regcost_b)
799 return regcost_a - regcost_b;
800 return 0;
801 }
802
803 /* Internal function, to compute cost when X is not a register; called
804 from COST macro to keep it simple. */
805
806 static int
807 notreg_cost (rtx x, enum rtx_code outer)
808 {
809 return ((GET_CODE (x) == SUBREG
810 && REG_P (SUBREG_REG (x))
811 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
812 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
813 && (GET_MODE_SIZE (GET_MODE (x))
814 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
815 && subreg_lowpart_p (x)
816 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
817 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
818 ? 0
819 : rtx_cost (x, outer) * 2);
820 }
821
822 \f
823 static struct cse_reg_info *
824 get_cse_reg_info (unsigned int regno)
825 {
826 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
827 struct cse_reg_info *p;
828
829 for (p = *hash_head; p != NULL; p = p->hash_next)
830 if (p->regno == regno)
831 break;
832
833 if (p == NULL)
834 {
835 /* Get a new cse_reg_info structure. */
836 if (cse_reg_info_free_list)
837 {
838 p = cse_reg_info_free_list;
839 cse_reg_info_free_list = p->next;
840 }
841 else
842 p = xmalloc (sizeof (struct cse_reg_info));
843
844 /* Insert into hash table. */
845 p->hash_next = *hash_head;
846 *hash_head = p;
847
848 /* Initialize it. */
849 p->reg_tick = 1;
850 p->reg_in_table = -1;
851 p->subreg_ticked = -1;
852 p->reg_qty = regno;
853 p->regno = regno;
854 p->next = cse_reg_info_used_list;
855 cse_reg_info_used_list = p;
856 if (!cse_reg_info_used_list_end)
857 cse_reg_info_used_list_end = p;
858 }
859
860 /* Cache this lookup; we tend to be looking up information about the
861 same register several times in a row. */
862 cached_regno = regno;
863 cached_cse_reg_info = p;
864
865 return p;
866 }
867
868 /* Clear the hash table and initialize each register with its own quantity,
869 for a new basic block. */
870
871 static void
872 new_basic_block (void)
873 {
874 int i;
875
876 next_qty = max_reg;
877
878 /* Clear out hash table state for this pass. */
879
880 memset (reg_hash, 0, sizeof reg_hash);
881
882 if (cse_reg_info_used_list)
883 {
884 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
885 cse_reg_info_free_list = cse_reg_info_used_list;
886 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
887 }
888 cached_cse_reg_info = 0;
889
890 CLEAR_HARD_REG_SET (hard_regs_in_table);
891
892 /* The per-quantity values used to be initialized here, but it is
893 much faster to initialize each as it is made in `make_new_qty'. */
894
895 for (i = 0; i < HASH_SIZE; i++)
896 {
897 struct table_elt *first;
898
899 first = table[i];
900 if (first != NULL)
901 {
902 struct table_elt *last = first;
903
904 table[i] = NULL;
905
906 while (last->next_same_hash != NULL)
907 last = last->next_same_hash;
908
909 /* Now relink this hash entire chain into
910 the free element list. */
911
912 last->next_same_hash = free_element_chain;
913 free_element_chain = first;
914 }
915 }
916
917 #ifdef HAVE_cc0
918 prev_insn = 0;
919 prev_insn_cc0 = 0;
920 #endif
921 }
922
923 /* Say that register REG contains a quantity in mode MODE not in any
924 register before and initialize that quantity. */
925
926 static void
927 make_new_qty (unsigned int reg, enum machine_mode mode)
928 {
929 int q;
930 struct qty_table_elem *ent;
931 struct reg_eqv_elem *eqv;
932
933 if (next_qty >= max_qty)
934 abort ();
935
936 q = REG_QTY (reg) = next_qty++;
937 ent = &qty_table[q];
938 ent->first_reg = reg;
939 ent->last_reg = reg;
940 ent->mode = mode;
941 ent->const_rtx = ent->const_insn = NULL_RTX;
942 ent->comparison_code = UNKNOWN;
943
944 eqv = &reg_eqv_table[reg];
945 eqv->next = eqv->prev = -1;
946 }
947
948 /* Make reg NEW equivalent to reg OLD.
949 OLD is not changing; NEW is. */
950
951 static void
952 make_regs_eqv (unsigned int new, unsigned int old)
953 {
954 unsigned int lastr, firstr;
955 int q = REG_QTY (old);
956 struct qty_table_elem *ent;
957
958 ent = &qty_table[q];
959
960 /* Nothing should become eqv until it has a "non-invalid" qty number. */
961 if (! REGNO_QTY_VALID_P (old))
962 abort ();
963
964 REG_QTY (new) = q;
965 firstr = ent->first_reg;
966 lastr = ent->last_reg;
967
968 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
969 hard regs. Among pseudos, if NEW will live longer than any other reg
970 of the same qty, and that is beyond the current basic block,
971 make it the new canonical replacement for this qty. */
972 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
973 /* Certain fixed registers might be of the class NO_REGS. This means
974 that not only can they not be allocated by the compiler, but
975 they cannot be used in substitutions or canonicalizations
976 either. */
977 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
978 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
979 || (new >= FIRST_PSEUDO_REGISTER
980 && (firstr < FIRST_PSEUDO_REGISTER
981 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
982 || (uid_cuid[REGNO_FIRST_UID (new)]
983 < cse_basic_block_start))
984 && (uid_cuid[REGNO_LAST_UID (new)]
985 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
986 {
987 reg_eqv_table[firstr].prev = new;
988 reg_eqv_table[new].next = firstr;
989 reg_eqv_table[new].prev = -1;
990 ent->first_reg = new;
991 }
992 else
993 {
994 /* If NEW is a hard reg (known to be non-fixed), insert at end.
995 Otherwise, insert before any non-fixed hard regs that are at the
996 end. Registers of class NO_REGS cannot be used as an
997 equivalent for anything. */
998 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
999 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1000 && new >= FIRST_PSEUDO_REGISTER)
1001 lastr = reg_eqv_table[lastr].prev;
1002 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1003 if (reg_eqv_table[lastr].next >= 0)
1004 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1005 else
1006 qty_table[q].last_reg = new;
1007 reg_eqv_table[lastr].next = new;
1008 reg_eqv_table[new].prev = lastr;
1009 }
1010 }
1011
1012 /* Remove REG from its equivalence class. */
1013
1014 static void
1015 delete_reg_equiv (unsigned int reg)
1016 {
1017 struct qty_table_elem *ent;
1018 int q = REG_QTY (reg);
1019 int p, n;
1020
1021 /* If invalid, do nothing. */
1022 if (q == (int) reg)
1023 return;
1024
1025 ent = &qty_table[q];
1026
1027 p = reg_eqv_table[reg].prev;
1028 n = reg_eqv_table[reg].next;
1029
1030 if (n != -1)
1031 reg_eqv_table[n].prev = p;
1032 else
1033 ent->last_reg = p;
1034 if (p != -1)
1035 reg_eqv_table[p].next = n;
1036 else
1037 ent->first_reg = n;
1038
1039 REG_QTY (reg) = reg;
1040 }
1041
1042 /* Remove any invalid expressions from the hash table
1043 that refer to any of the registers contained in expression X.
1044
1045 Make sure that newly inserted references to those registers
1046 as subexpressions will be considered valid.
1047
1048 mention_regs is not called when a register itself
1049 is being stored in the table.
1050
1051 Return 1 if we have done something that may have changed the hash code
1052 of X. */
1053
1054 static int
1055 mention_regs (rtx x)
1056 {
1057 enum rtx_code code;
1058 int i, j;
1059 const char *fmt;
1060 int changed = 0;
1061
1062 if (x == 0)
1063 return 0;
1064
1065 code = GET_CODE (x);
1066 if (code == REG)
1067 {
1068 unsigned int regno = REGNO (x);
1069 unsigned int endregno
1070 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1071 : hard_regno_nregs[regno][GET_MODE (x)]);
1072 unsigned int i;
1073
1074 for (i = regno; i < endregno; i++)
1075 {
1076 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1077 remove_invalid_refs (i);
1078
1079 REG_IN_TABLE (i) = REG_TICK (i);
1080 SUBREG_TICKED (i) = -1;
1081 }
1082
1083 return 0;
1084 }
1085
1086 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1087 pseudo if they don't use overlapping words. We handle only pseudos
1088 here for simplicity. */
1089 if (code == SUBREG && REG_P (SUBREG_REG (x))
1090 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1091 {
1092 unsigned int i = REGNO (SUBREG_REG (x));
1093
1094 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1095 {
1096 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1097 the last store to this register really stored into this
1098 subreg, then remove the memory of this subreg.
1099 Otherwise, remove any memory of the entire register and
1100 all its subregs from the table. */
1101 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1102 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1103 remove_invalid_refs (i);
1104 else
1105 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1106 }
1107
1108 REG_IN_TABLE (i) = REG_TICK (i);
1109 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1110 return 0;
1111 }
1112
1113 /* If X is a comparison or a COMPARE and either operand is a register
1114 that does not have a quantity, give it one. This is so that a later
1115 call to record_jump_equiv won't cause X to be assigned a different
1116 hash code and not found in the table after that call.
1117
1118 It is not necessary to do this here, since rehash_using_reg can
1119 fix up the table later, but doing this here eliminates the need to
1120 call that expensive function in the most common case where the only
1121 use of the register is in the comparison. */
1122
1123 if (code == COMPARE || COMPARISON_P (x))
1124 {
1125 if (REG_P (XEXP (x, 0))
1126 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1127 if (insert_regs (XEXP (x, 0), NULL, 0))
1128 {
1129 rehash_using_reg (XEXP (x, 0));
1130 changed = 1;
1131 }
1132
1133 if (REG_P (XEXP (x, 1))
1134 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1135 if (insert_regs (XEXP (x, 1), NULL, 0))
1136 {
1137 rehash_using_reg (XEXP (x, 1));
1138 changed = 1;
1139 }
1140 }
1141
1142 fmt = GET_RTX_FORMAT (code);
1143 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1144 if (fmt[i] == 'e')
1145 changed |= mention_regs (XEXP (x, i));
1146 else if (fmt[i] == 'E')
1147 for (j = 0; j < XVECLEN (x, i); j++)
1148 changed |= mention_regs (XVECEXP (x, i, j));
1149
1150 return changed;
1151 }
1152
1153 /* Update the register quantities for inserting X into the hash table
1154 with a value equivalent to CLASSP.
1155 (If the class does not contain a REG, it is irrelevant.)
1156 If MODIFIED is nonzero, X is a destination; it is being modified.
1157 Note that delete_reg_equiv should be called on a register
1158 before insert_regs is done on that register with MODIFIED != 0.
1159
1160 Nonzero value means that elements of reg_qty have changed
1161 so X's hash code may be different. */
1162
1163 static int
1164 insert_regs (rtx x, struct table_elt *classp, int modified)
1165 {
1166 if (REG_P (x))
1167 {
1168 unsigned int regno = REGNO (x);
1169 int qty_valid;
1170
1171 /* If REGNO is in the equivalence table already but is of the
1172 wrong mode for that equivalence, don't do anything here. */
1173
1174 qty_valid = REGNO_QTY_VALID_P (regno);
1175 if (qty_valid)
1176 {
1177 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1178
1179 if (ent->mode != GET_MODE (x))
1180 return 0;
1181 }
1182
1183 if (modified || ! qty_valid)
1184 {
1185 if (classp)
1186 for (classp = classp->first_same_value;
1187 classp != 0;
1188 classp = classp->next_same_value)
1189 if (REG_P (classp->exp)
1190 && GET_MODE (classp->exp) == GET_MODE (x))
1191 {
1192 make_regs_eqv (regno, REGNO (classp->exp));
1193 return 1;
1194 }
1195
1196 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1197 than REG_IN_TABLE to find out if there was only a single preceding
1198 invalidation - for the SUBREG - or another one, which would be
1199 for the full register. However, if we find here that REG_TICK
1200 indicates that the register is invalid, it means that it has
1201 been invalidated in a separate operation. The SUBREG might be used
1202 now (then this is a recursive call), or we might use the full REG
1203 now and a SUBREG of it later. So bump up REG_TICK so that
1204 mention_regs will do the right thing. */
1205 if (! modified
1206 && REG_IN_TABLE (regno) >= 0
1207 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1208 REG_TICK (regno)++;
1209 make_new_qty (regno, GET_MODE (x));
1210 return 1;
1211 }
1212
1213 return 0;
1214 }
1215
1216 /* If X is a SUBREG, we will likely be inserting the inner register in the
1217 table. If that register doesn't have an assigned quantity number at
1218 this point but does later, the insertion that we will be doing now will
1219 not be accessible because its hash code will have changed. So assign
1220 a quantity number now. */
1221
1222 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1223 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1224 {
1225 insert_regs (SUBREG_REG (x), NULL, 0);
1226 mention_regs (x);
1227 return 1;
1228 }
1229 else
1230 return mention_regs (x);
1231 }
1232 \f
1233 /* Look in or update the hash table. */
1234
1235 /* Remove table element ELT from use in the table.
1236 HASH is its hash code, made using the HASH macro.
1237 It's an argument because often that is known in advance
1238 and we save much time not recomputing it. */
1239
1240 static void
1241 remove_from_table (struct table_elt *elt, unsigned int hash)
1242 {
1243 if (elt == 0)
1244 return;
1245
1246 /* Mark this element as removed. See cse_insn. */
1247 elt->first_same_value = 0;
1248
1249 /* Remove the table element from its equivalence class. */
1250
1251 {
1252 struct table_elt *prev = elt->prev_same_value;
1253 struct table_elt *next = elt->next_same_value;
1254
1255 if (next)
1256 next->prev_same_value = prev;
1257
1258 if (prev)
1259 prev->next_same_value = next;
1260 else
1261 {
1262 struct table_elt *newfirst = next;
1263 while (next)
1264 {
1265 next->first_same_value = newfirst;
1266 next = next->next_same_value;
1267 }
1268 }
1269 }
1270
1271 /* Remove the table element from its hash bucket. */
1272
1273 {
1274 struct table_elt *prev = elt->prev_same_hash;
1275 struct table_elt *next = elt->next_same_hash;
1276
1277 if (next)
1278 next->prev_same_hash = prev;
1279
1280 if (prev)
1281 prev->next_same_hash = next;
1282 else if (table[hash] == elt)
1283 table[hash] = next;
1284 else
1285 {
1286 /* This entry is not in the proper hash bucket. This can happen
1287 when two classes were merged by `merge_equiv_classes'. Search
1288 for the hash bucket that it heads. This happens only very
1289 rarely, so the cost is acceptable. */
1290 for (hash = 0; hash < HASH_SIZE; hash++)
1291 if (table[hash] == elt)
1292 table[hash] = next;
1293 }
1294 }
1295
1296 /* Remove the table element from its related-value circular chain. */
1297
1298 if (elt->related_value != 0 && elt->related_value != elt)
1299 {
1300 struct table_elt *p = elt->related_value;
1301
1302 while (p->related_value != elt)
1303 p = p->related_value;
1304 p->related_value = elt->related_value;
1305 if (p->related_value == p)
1306 p->related_value = 0;
1307 }
1308
1309 /* Now add it to the free element chain. */
1310 elt->next_same_hash = free_element_chain;
1311 free_element_chain = elt;
1312 }
1313
1314 /* Look up X in the hash table and return its table element,
1315 or 0 if X is not in the table.
1316
1317 MODE is the machine-mode of X, or if X is an integer constant
1318 with VOIDmode then MODE is the mode with which X will be used.
1319
1320 Here we are satisfied to find an expression whose tree structure
1321 looks like X. */
1322
1323 static struct table_elt *
1324 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1325 {
1326 struct table_elt *p;
1327
1328 for (p = table[hash]; p; p = p->next_same_hash)
1329 if (mode == p->mode && ((x == p->exp && REG_P (x))
1330 || exp_equiv_p (x, p->exp, !REG_P (x), 0)))
1331 return p;
1332
1333 return 0;
1334 }
1335
1336 /* Like `lookup' but don't care whether the table element uses invalid regs.
1337 Also ignore discrepancies in the machine mode of a register. */
1338
1339 static struct table_elt *
1340 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1341 {
1342 struct table_elt *p;
1343
1344 if (REG_P (x))
1345 {
1346 unsigned int regno = REGNO (x);
1347
1348 /* Don't check the machine mode when comparing registers;
1349 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1350 for (p = table[hash]; p; p = p->next_same_hash)
1351 if (REG_P (p->exp)
1352 && REGNO (p->exp) == regno)
1353 return p;
1354 }
1355 else
1356 {
1357 for (p = table[hash]; p; p = p->next_same_hash)
1358 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1359 return p;
1360 }
1361
1362 return 0;
1363 }
1364
1365 /* Look for an expression equivalent to X and with code CODE.
1366 If one is found, return that expression. */
1367
1368 static rtx
1369 lookup_as_function (rtx x, enum rtx_code code)
1370 {
1371 struct table_elt *p
1372 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1373
1374 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1375 long as we are narrowing. So if we looked in vain for a mode narrower
1376 than word_mode before, look for word_mode now. */
1377 if (p == 0 && code == CONST_INT
1378 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1379 {
1380 x = copy_rtx (x);
1381 PUT_MODE (x, word_mode);
1382 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1383 }
1384
1385 if (p == 0)
1386 return 0;
1387
1388 for (p = p->first_same_value; p; p = p->next_same_value)
1389 if (GET_CODE (p->exp) == code
1390 /* Make sure this is a valid entry in the table. */
1391 && exp_equiv_p (p->exp, p->exp, 1, 0))
1392 return p->exp;
1393
1394 return 0;
1395 }
1396
1397 /* Insert X in the hash table, assuming HASH is its hash code
1398 and CLASSP is an element of the class it should go in
1399 (or 0 if a new class should be made).
1400 It is inserted at the proper position to keep the class in
1401 the order cheapest first.
1402
1403 MODE is the machine-mode of X, or if X is an integer constant
1404 with VOIDmode then MODE is the mode with which X will be used.
1405
1406 For elements of equal cheapness, the most recent one
1407 goes in front, except that the first element in the list
1408 remains first unless a cheaper element is added. The order of
1409 pseudo-registers does not matter, as canon_reg will be called to
1410 find the cheapest when a register is retrieved from the table.
1411
1412 The in_memory field in the hash table element is set to 0.
1413 The caller must set it nonzero if appropriate.
1414
1415 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1416 and if insert_regs returns a nonzero value
1417 you must then recompute its hash code before calling here.
1418
1419 If necessary, update table showing constant values of quantities. */
1420
1421 #define CHEAPER(X, Y) \
1422 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1423
1424 static struct table_elt *
1425 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1426 {
1427 struct table_elt *elt;
1428
1429 /* If X is a register and we haven't made a quantity for it,
1430 something is wrong. */
1431 if (REG_P (x) && ! REGNO_QTY_VALID_P (REGNO (x)))
1432 abort ();
1433
1434 /* If X is a hard register, show it is being put in the table. */
1435 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1436 {
1437 unsigned int regno = REGNO (x);
1438 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
1439 unsigned int i;
1440
1441 for (i = regno; i < endregno; i++)
1442 SET_HARD_REG_BIT (hard_regs_in_table, i);
1443 }
1444
1445 /* Put an element for X into the right hash bucket. */
1446
1447 elt = free_element_chain;
1448 if (elt)
1449 free_element_chain = elt->next_same_hash;
1450 else
1451 {
1452 n_elements_made++;
1453 elt = xmalloc (sizeof (struct table_elt));
1454 }
1455
1456 elt->exp = x;
1457 elt->canon_exp = NULL_RTX;
1458 elt->cost = COST (x);
1459 elt->regcost = approx_reg_cost (x);
1460 elt->next_same_value = 0;
1461 elt->prev_same_value = 0;
1462 elt->next_same_hash = table[hash];
1463 elt->prev_same_hash = 0;
1464 elt->related_value = 0;
1465 elt->in_memory = 0;
1466 elt->mode = mode;
1467 elt->is_const = (CONSTANT_P (x)
1468 /* GNU C++ takes advantage of this for `this'
1469 (and other const values). */
1470 || (REG_P (x)
1471 && RTX_UNCHANGING_P (x)
1472 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1473 || fixed_base_plus_p (x));
1474
1475 if (table[hash])
1476 table[hash]->prev_same_hash = elt;
1477 table[hash] = elt;
1478
1479 /* Put it into the proper value-class. */
1480 if (classp)
1481 {
1482 classp = classp->first_same_value;
1483 if (CHEAPER (elt, classp))
1484 /* Insert at the head of the class. */
1485 {
1486 struct table_elt *p;
1487 elt->next_same_value = classp;
1488 classp->prev_same_value = elt;
1489 elt->first_same_value = elt;
1490
1491 for (p = classp; p; p = p->next_same_value)
1492 p->first_same_value = elt;
1493 }
1494 else
1495 {
1496 /* Insert not at head of the class. */
1497 /* Put it after the last element cheaper than X. */
1498 struct table_elt *p, *next;
1499
1500 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1501 p = next);
1502
1503 /* Put it after P and before NEXT. */
1504 elt->next_same_value = next;
1505 if (next)
1506 next->prev_same_value = elt;
1507
1508 elt->prev_same_value = p;
1509 p->next_same_value = elt;
1510 elt->first_same_value = classp;
1511 }
1512 }
1513 else
1514 elt->first_same_value = elt;
1515
1516 /* If this is a constant being set equivalent to a register or a register
1517 being set equivalent to a constant, note the constant equivalence.
1518
1519 If this is a constant, it cannot be equivalent to a different constant,
1520 and a constant is the only thing that can be cheaper than a register. So
1521 we know the register is the head of the class (before the constant was
1522 inserted).
1523
1524 If this is a register that is not already known equivalent to a
1525 constant, we must check the entire class.
1526
1527 If this is a register that is already known equivalent to an insn,
1528 update the qtys `const_insn' to show that `this_insn' is the latest
1529 insn making that quantity equivalent to the constant. */
1530
1531 if (elt->is_const && classp && REG_P (classp->exp)
1532 && !REG_P (x))
1533 {
1534 int exp_q = REG_QTY (REGNO (classp->exp));
1535 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1536
1537 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1538 exp_ent->const_insn = this_insn;
1539 }
1540
1541 else if (REG_P (x)
1542 && classp
1543 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1544 && ! elt->is_const)
1545 {
1546 struct table_elt *p;
1547
1548 for (p = classp; p != 0; p = p->next_same_value)
1549 {
1550 if (p->is_const && !REG_P (p->exp))
1551 {
1552 int x_q = REG_QTY (REGNO (x));
1553 struct qty_table_elem *x_ent = &qty_table[x_q];
1554
1555 x_ent->const_rtx
1556 = gen_lowpart (GET_MODE (x), p->exp);
1557 x_ent->const_insn = this_insn;
1558 break;
1559 }
1560 }
1561 }
1562
1563 else if (REG_P (x)
1564 && qty_table[REG_QTY (REGNO (x))].const_rtx
1565 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1566 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1567
1568 /* If this is a constant with symbolic value,
1569 and it has a term with an explicit integer value,
1570 link it up with related expressions. */
1571 if (GET_CODE (x) == CONST)
1572 {
1573 rtx subexp = get_related_value (x);
1574 unsigned subhash;
1575 struct table_elt *subelt, *subelt_prev;
1576
1577 if (subexp != 0)
1578 {
1579 /* Get the integer-free subexpression in the hash table. */
1580 subhash = safe_hash (subexp, mode) & HASH_MASK;
1581 subelt = lookup (subexp, subhash, mode);
1582 if (subelt == 0)
1583 subelt = insert (subexp, NULL, subhash, mode);
1584 /* Initialize SUBELT's circular chain if it has none. */
1585 if (subelt->related_value == 0)
1586 subelt->related_value = subelt;
1587 /* Find the element in the circular chain that precedes SUBELT. */
1588 subelt_prev = subelt;
1589 while (subelt_prev->related_value != subelt)
1590 subelt_prev = subelt_prev->related_value;
1591 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1592 This way the element that follows SUBELT is the oldest one. */
1593 elt->related_value = subelt_prev->related_value;
1594 subelt_prev->related_value = elt;
1595 }
1596 }
1597
1598 return elt;
1599 }
1600 \f
1601 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1602 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1603 the two classes equivalent.
1604
1605 CLASS1 will be the surviving class; CLASS2 should not be used after this
1606 call.
1607
1608 Any invalid entries in CLASS2 will not be copied. */
1609
1610 static void
1611 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1612 {
1613 struct table_elt *elt, *next, *new;
1614
1615 /* Ensure we start with the head of the classes. */
1616 class1 = class1->first_same_value;
1617 class2 = class2->first_same_value;
1618
1619 /* If they were already equal, forget it. */
1620 if (class1 == class2)
1621 return;
1622
1623 for (elt = class2; elt; elt = next)
1624 {
1625 unsigned int hash;
1626 rtx exp = elt->exp;
1627 enum machine_mode mode = elt->mode;
1628
1629 next = elt->next_same_value;
1630
1631 /* Remove old entry, make a new one in CLASS1's class.
1632 Don't do this for invalid entries as we cannot find their
1633 hash code (it also isn't necessary). */
1634 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, 0))
1635 {
1636 hash_arg_in_memory = 0;
1637 hash = HASH (exp, mode);
1638
1639 if (REG_P (exp))
1640 delete_reg_equiv (REGNO (exp));
1641
1642 remove_from_table (elt, hash);
1643
1644 if (insert_regs (exp, class1, 0))
1645 {
1646 rehash_using_reg (exp);
1647 hash = HASH (exp, mode);
1648 }
1649 new = insert (exp, class1, hash, mode);
1650 new->in_memory = hash_arg_in_memory;
1651 }
1652 }
1653 }
1654 \f
1655 /* Flush the entire hash table. */
1656
1657 static void
1658 flush_hash_table (void)
1659 {
1660 int i;
1661 struct table_elt *p;
1662
1663 for (i = 0; i < HASH_SIZE; i++)
1664 for (p = table[i]; p; p = table[i])
1665 {
1666 /* Note that invalidate can remove elements
1667 after P in the current hash chain. */
1668 if (REG_P (p->exp))
1669 invalidate (p->exp, p->mode);
1670 else
1671 remove_from_table (p, i);
1672 }
1673 }
1674 \f
1675 /* Function called for each rtx to check whether true dependence exist. */
1676 struct check_dependence_data
1677 {
1678 enum machine_mode mode;
1679 rtx exp;
1680 rtx addr;
1681 };
1682
1683 static int
1684 check_dependence (rtx *x, void *data)
1685 {
1686 struct check_dependence_data *d = (struct check_dependence_data *) data;
1687 if (*x && GET_CODE (*x) == MEM)
1688 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1689 cse_rtx_varies_p);
1690 else
1691 return 0;
1692 }
1693 \f
1694 /* Remove from the hash table, or mark as invalid, all expressions whose
1695 values could be altered by storing in X. X is a register, a subreg, or
1696 a memory reference with nonvarying address (because, when a memory
1697 reference with a varying address is stored in, all memory references are
1698 removed by invalidate_memory so specific invalidation is superfluous).
1699 FULL_MODE, if not VOIDmode, indicates that this much should be
1700 invalidated instead of just the amount indicated by the mode of X. This
1701 is only used for bitfield stores into memory.
1702
1703 A nonvarying address may be just a register or just a symbol reference,
1704 or it may be either of those plus a numeric offset. */
1705
1706 static void
1707 invalidate (rtx x, enum machine_mode full_mode)
1708 {
1709 int i;
1710 struct table_elt *p;
1711 rtx addr;
1712
1713 switch (GET_CODE (x))
1714 {
1715 case REG:
1716 {
1717 /* If X is a register, dependencies on its contents are recorded
1718 through the qty number mechanism. Just change the qty number of
1719 the register, mark it as invalid for expressions that refer to it,
1720 and remove it itself. */
1721 unsigned int regno = REGNO (x);
1722 unsigned int hash = HASH (x, GET_MODE (x));
1723
1724 /* Remove REGNO from any quantity list it might be on and indicate
1725 that its value might have changed. If it is a pseudo, remove its
1726 entry from the hash table.
1727
1728 For a hard register, we do the first two actions above for any
1729 additional hard registers corresponding to X. Then, if any of these
1730 registers are in the table, we must remove any REG entries that
1731 overlap these registers. */
1732
1733 delete_reg_equiv (regno);
1734 REG_TICK (regno)++;
1735 SUBREG_TICKED (regno) = -1;
1736
1737 if (regno >= FIRST_PSEUDO_REGISTER)
1738 {
1739 /* Because a register can be referenced in more than one mode,
1740 we might have to remove more than one table entry. */
1741 struct table_elt *elt;
1742
1743 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1744 remove_from_table (elt, hash);
1745 }
1746 else
1747 {
1748 HOST_WIDE_INT in_table
1749 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1750 unsigned int endregno
1751 = regno + hard_regno_nregs[regno][GET_MODE (x)];
1752 unsigned int tregno, tendregno, rn;
1753 struct table_elt *p, *next;
1754
1755 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1756
1757 for (rn = regno + 1; rn < endregno; rn++)
1758 {
1759 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1760 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1761 delete_reg_equiv (rn);
1762 REG_TICK (rn)++;
1763 SUBREG_TICKED (rn) = -1;
1764 }
1765
1766 if (in_table)
1767 for (hash = 0; hash < HASH_SIZE; hash++)
1768 for (p = table[hash]; p; p = next)
1769 {
1770 next = p->next_same_hash;
1771
1772 if (!REG_P (p->exp)
1773 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1774 continue;
1775
1776 tregno = REGNO (p->exp);
1777 tendregno
1778 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
1779 if (tendregno > regno && tregno < endregno)
1780 remove_from_table (p, hash);
1781 }
1782 }
1783 }
1784 return;
1785
1786 case SUBREG:
1787 invalidate (SUBREG_REG (x), VOIDmode);
1788 return;
1789
1790 case PARALLEL:
1791 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1792 invalidate (XVECEXP (x, 0, i), VOIDmode);
1793 return;
1794
1795 case EXPR_LIST:
1796 /* This is part of a disjoint return value; extract the location in
1797 question ignoring the offset. */
1798 invalidate (XEXP (x, 0), VOIDmode);
1799 return;
1800
1801 case MEM:
1802 addr = canon_rtx (get_addr (XEXP (x, 0)));
1803 /* Calculate the canonical version of X here so that
1804 true_dependence doesn't generate new RTL for X on each call. */
1805 x = canon_rtx (x);
1806
1807 /* Remove all hash table elements that refer to overlapping pieces of
1808 memory. */
1809 if (full_mode == VOIDmode)
1810 full_mode = GET_MODE (x);
1811
1812 for (i = 0; i < HASH_SIZE; i++)
1813 {
1814 struct table_elt *next;
1815
1816 for (p = table[i]; p; p = next)
1817 {
1818 next = p->next_same_hash;
1819 if (p->in_memory)
1820 {
1821 struct check_dependence_data d;
1822
1823 /* Just canonicalize the expression once;
1824 otherwise each time we call invalidate
1825 true_dependence will canonicalize the
1826 expression again. */
1827 if (!p->canon_exp)
1828 p->canon_exp = canon_rtx (p->exp);
1829 d.exp = x;
1830 d.addr = addr;
1831 d.mode = full_mode;
1832 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1833 remove_from_table (p, i);
1834 }
1835 }
1836 }
1837 return;
1838
1839 default:
1840 abort ();
1841 }
1842 }
1843 \f
1844 /* Remove all expressions that refer to register REGNO,
1845 since they are already invalid, and we are about to
1846 mark that register valid again and don't want the old
1847 expressions to reappear as valid. */
1848
1849 static void
1850 remove_invalid_refs (unsigned int regno)
1851 {
1852 unsigned int i;
1853 struct table_elt *p, *next;
1854
1855 for (i = 0; i < HASH_SIZE; i++)
1856 for (p = table[i]; p; p = next)
1857 {
1858 next = p->next_same_hash;
1859 if (!REG_P (p->exp)
1860 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1861 remove_from_table (p, i);
1862 }
1863 }
1864
1865 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1866 and mode MODE. */
1867 static void
1868 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1869 enum machine_mode mode)
1870 {
1871 unsigned int i;
1872 struct table_elt *p, *next;
1873 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1874
1875 for (i = 0; i < HASH_SIZE; i++)
1876 for (p = table[i]; p; p = next)
1877 {
1878 rtx exp = p->exp;
1879 next = p->next_same_hash;
1880
1881 if (!REG_P (exp)
1882 && (GET_CODE (exp) != SUBREG
1883 || !REG_P (SUBREG_REG (exp))
1884 || REGNO (SUBREG_REG (exp)) != regno
1885 || (((SUBREG_BYTE (exp)
1886 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1887 && SUBREG_BYTE (exp) <= end))
1888 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1889 remove_from_table (p, i);
1890 }
1891 }
1892 \f
1893 /* Recompute the hash codes of any valid entries in the hash table that
1894 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1895
1896 This is called when we make a jump equivalence. */
1897
1898 static void
1899 rehash_using_reg (rtx x)
1900 {
1901 unsigned int i;
1902 struct table_elt *p, *next;
1903 unsigned hash;
1904
1905 if (GET_CODE (x) == SUBREG)
1906 x = SUBREG_REG (x);
1907
1908 /* If X is not a register or if the register is known not to be in any
1909 valid entries in the table, we have no work to do. */
1910
1911 if (!REG_P (x)
1912 || REG_IN_TABLE (REGNO (x)) < 0
1913 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1914 return;
1915
1916 /* Scan all hash chains looking for valid entries that mention X.
1917 If we find one and it is in the wrong hash chain, move it. We can skip
1918 objects that are registers, since they are handled specially. */
1919
1920 for (i = 0; i < HASH_SIZE; i++)
1921 for (p = table[i]; p; p = next)
1922 {
1923 next = p->next_same_hash;
1924 if (!REG_P (p->exp) && reg_mentioned_p (x, p->exp)
1925 && exp_equiv_p (p->exp, p->exp, 1, 0)
1926 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1927 {
1928 if (p->next_same_hash)
1929 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1930
1931 if (p->prev_same_hash)
1932 p->prev_same_hash->next_same_hash = p->next_same_hash;
1933 else
1934 table[i] = p->next_same_hash;
1935
1936 p->next_same_hash = table[hash];
1937 p->prev_same_hash = 0;
1938 if (table[hash])
1939 table[hash]->prev_same_hash = p;
1940 table[hash] = p;
1941 }
1942 }
1943 }
1944 \f
1945 /* Remove from the hash table any expression that is a call-clobbered
1946 register. Also update their TICK values. */
1947
1948 static void
1949 invalidate_for_call (void)
1950 {
1951 unsigned int regno, endregno;
1952 unsigned int i;
1953 unsigned hash;
1954 struct table_elt *p, *next;
1955 int in_table = 0;
1956
1957 /* Go through all the hard registers. For each that is clobbered in
1958 a CALL_INSN, remove the register from quantity chains and update
1959 reg_tick if defined. Also see if any of these registers is currently
1960 in the table. */
1961
1962 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1963 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1964 {
1965 delete_reg_equiv (regno);
1966 if (REG_TICK (regno) >= 0)
1967 {
1968 REG_TICK (regno)++;
1969 SUBREG_TICKED (regno) = -1;
1970 }
1971
1972 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1973 }
1974
1975 /* In the case where we have no call-clobbered hard registers in the
1976 table, we are done. Otherwise, scan the table and remove any
1977 entry that overlaps a call-clobbered register. */
1978
1979 if (in_table)
1980 for (hash = 0; hash < HASH_SIZE; hash++)
1981 for (p = table[hash]; p; p = next)
1982 {
1983 next = p->next_same_hash;
1984
1985 if (!REG_P (p->exp)
1986 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1987 continue;
1988
1989 regno = REGNO (p->exp);
1990 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
1991
1992 for (i = regno; i < endregno; i++)
1993 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1994 {
1995 remove_from_table (p, hash);
1996 break;
1997 }
1998 }
1999 }
2000 \f
2001 /* Given an expression X of type CONST,
2002 and ELT which is its table entry (or 0 if it
2003 is not in the hash table),
2004 return an alternate expression for X as a register plus integer.
2005 If none can be found, return 0. */
2006
2007 static rtx
2008 use_related_value (rtx x, struct table_elt *elt)
2009 {
2010 struct table_elt *relt = 0;
2011 struct table_elt *p, *q;
2012 HOST_WIDE_INT offset;
2013
2014 /* First, is there anything related known?
2015 If we have a table element, we can tell from that.
2016 Otherwise, must look it up. */
2017
2018 if (elt != 0 && elt->related_value != 0)
2019 relt = elt;
2020 else if (elt == 0 && GET_CODE (x) == CONST)
2021 {
2022 rtx subexp = get_related_value (x);
2023 if (subexp != 0)
2024 relt = lookup (subexp,
2025 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2026 GET_MODE (subexp));
2027 }
2028
2029 if (relt == 0)
2030 return 0;
2031
2032 /* Search all related table entries for one that has an
2033 equivalent register. */
2034
2035 p = relt;
2036 while (1)
2037 {
2038 /* This loop is strange in that it is executed in two different cases.
2039 The first is when X is already in the table. Then it is searching
2040 the RELATED_VALUE list of X's class (RELT). The second case is when
2041 X is not in the table. Then RELT points to a class for the related
2042 value.
2043
2044 Ensure that, whatever case we are in, that we ignore classes that have
2045 the same value as X. */
2046
2047 if (rtx_equal_p (x, p->exp))
2048 q = 0;
2049 else
2050 for (q = p->first_same_value; q; q = q->next_same_value)
2051 if (REG_P (q->exp))
2052 break;
2053
2054 if (q)
2055 break;
2056
2057 p = p->related_value;
2058
2059 /* We went all the way around, so there is nothing to be found.
2060 Alternatively, perhaps RELT was in the table for some other reason
2061 and it has no related values recorded. */
2062 if (p == relt || p == 0)
2063 break;
2064 }
2065
2066 if (q == 0)
2067 return 0;
2068
2069 offset = (get_integer_term (x) - get_integer_term (p->exp));
2070 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2071 return plus_constant (q->exp, offset);
2072 }
2073 \f
2074 /* Hash a string. Just add its bytes up. */
2075 static inline unsigned
2076 canon_hash_string (const char *ps)
2077 {
2078 unsigned hash = 0;
2079 const unsigned char *p = (const unsigned char *) ps;
2080
2081 if (p)
2082 while (*p)
2083 hash += *p++;
2084
2085 return hash;
2086 }
2087
2088 /* Hash an rtx. We are careful to make sure the value is never negative.
2089 Equivalent registers hash identically.
2090 MODE is used in hashing for CONST_INTs only;
2091 otherwise the mode of X is used.
2092
2093 Store 1 in do_not_record if any subexpression is volatile.
2094
2095 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2096 which does not have the RTX_UNCHANGING_P bit set.
2097
2098 Note that cse_insn knows that the hash code of a MEM expression
2099 is just (int) MEM plus the hash code of the address. */
2100
2101 static unsigned
2102 canon_hash (rtx x, enum machine_mode mode)
2103 {
2104 int i, j;
2105 unsigned hash = 0;
2106 enum rtx_code code;
2107 const char *fmt;
2108
2109 /* repeat is used to turn tail-recursion into iteration. */
2110 repeat:
2111 if (x == 0)
2112 return hash;
2113
2114 code = GET_CODE (x);
2115 switch (code)
2116 {
2117 case REG:
2118 {
2119 unsigned int regno = REGNO (x);
2120 bool record;
2121
2122 /* On some machines, we can't record any non-fixed hard register,
2123 because extending its life will cause reload problems. We
2124 consider ap, fp, sp, gp to be fixed for this purpose.
2125
2126 We also consider CCmode registers to be fixed for this purpose;
2127 failure to do so leads to failure to simplify 0<100 type of
2128 conditionals.
2129
2130 On all machines, we can't record any global registers.
2131 Nor should we record any register that is in a small
2132 class, as defined by CLASS_LIKELY_SPILLED_P. */
2133
2134 if (regno >= FIRST_PSEUDO_REGISTER)
2135 record = true;
2136 else if (x == frame_pointer_rtx
2137 || x == hard_frame_pointer_rtx
2138 || x == arg_pointer_rtx
2139 || x == stack_pointer_rtx
2140 || x == pic_offset_table_rtx)
2141 record = true;
2142 else if (global_regs[regno])
2143 record = false;
2144 else if (fixed_regs[regno])
2145 record = true;
2146 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2147 record = true;
2148 else if (SMALL_REGISTER_CLASSES)
2149 record = false;
2150 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2151 record = false;
2152 else
2153 record = true;
2154
2155 if (!record)
2156 {
2157 do_not_record = 1;
2158 return 0;
2159 }
2160
2161 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2162 return hash;
2163 }
2164
2165 /* We handle SUBREG of a REG specially because the underlying
2166 reg changes its hash value with every value change; we don't
2167 want to have to forget unrelated subregs when one subreg changes. */
2168 case SUBREG:
2169 {
2170 if (REG_P (SUBREG_REG (x)))
2171 {
2172 hash += (((unsigned) SUBREG << 7)
2173 + REGNO (SUBREG_REG (x))
2174 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2175 return hash;
2176 }
2177 break;
2178 }
2179
2180 case CONST_INT:
2181 {
2182 unsigned HOST_WIDE_INT tem = INTVAL (x);
2183 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2184 return hash;
2185 }
2186
2187 case CONST_DOUBLE:
2188 /* This is like the general case, except that it only counts
2189 the integers representing the constant. */
2190 hash += (unsigned) code + (unsigned) GET_MODE (x);
2191 if (GET_MODE (x) != VOIDmode)
2192 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2193 else
2194 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2195 + (unsigned) CONST_DOUBLE_HIGH (x));
2196 return hash;
2197
2198 case CONST_VECTOR:
2199 {
2200 int units;
2201 rtx elt;
2202
2203 units = CONST_VECTOR_NUNITS (x);
2204
2205 for (i = 0; i < units; ++i)
2206 {
2207 elt = CONST_VECTOR_ELT (x, i);
2208 hash += canon_hash (elt, GET_MODE (elt));
2209 }
2210
2211 return hash;
2212 }
2213
2214 /* Assume there is only one rtx object for any given label. */
2215 case LABEL_REF:
2216 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2217 return hash;
2218
2219 case SYMBOL_REF:
2220 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2221 return hash;
2222
2223 case MEM:
2224 /* We don't record if marked volatile or if BLKmode since we don't
2225 know the size of the move. */
2226 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2227 {
2228 do_not_record = 1;
2229 return 0;
2230 }
2231 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2232 hash_arg_in_memory = 1;
2233
2234 /* Now that we have already found this special case,
2235 might as well speed it up as much as possible. */
2236 hash += (unsigned) MEM;
2237 x = XEXP (x, 0);
2238 goto repeat;
2239
2240 case USE:
2241 /* A USE that mentions non-volatile memory needs special
2242 handling since the MEM may be BLKmode which normally
2243 prevents an entry from being made. Pure calls are
2244 marked by a USE which mentions BLKmode memory. */
2245 if (GET_CODE (XEXP (x, 0)) == MEM
2246 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2247 {
2248 hash += (unsigned) USE;
2249 x = XEXP (x, 0);
2250
2251 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2252 hash_arg_in_memory = 1;
2253
2254 /* Now that we have already found this special case,
2255 might as well speed it up as much as possible. */
2256 hash += (unsigned) MEM;
2257 x = XEXP (x, 0);
2258 goto repeat;
2259 }
2260 break;
2261
2262 case PRE_DEC:
2263 case PRE_INC:
2264 case POST_DEC:
2265 case POST_INC:
2266 case PRE_MODIFY:
2267 case POST_MODIFY:
2268 case PC:
2269 case CC0:
2270 case CALL:
2271 case UNSPEC_VOLATILE:
2272 do_not_record = 1;
2273 return 0;
2274
2275 case ASM_OPERANDS:
2276 if (MEM_VOLATILE_P (x))
2277 {
2278 do_not_record = 1;
2279 return 0;
2280 }
2281 else
2282 {
2283 /* We don't want to take the filename and line into account. */
2284 hash += (unsigned) code + (unsigned) GET_MODE (x)
2285 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2286 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2287 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2288
2289 if (ASM_OPERANDS_INPUT_LENGTH (x))
2290 {
2291 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2292 {
2293 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2294 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2295 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2296 (x, i)));
2297 }
2298
2299 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2300 x = ASM_OPERANDS_INPUT (x, 0);
2301 mode = GET_MODE (x);
2302 goto repeat;
2303 }
2304
2305 return hash;
2306 }
2307 break;
2308
2309 default:
2310 break;
2311 }
2312
2313 i = GET_RTX_LENGTH (code) - 1;
2314 hash += (unsigned) code + (unsigned) GET_MODE (x);
2315 fmt = GET_RTX_FORMAT (code);
2316 for (; i >= 0; i--)
2317 {
2318 if (fmt[i] == 'e')
2319 {
2320 rtx tem = XEXP (x, i);
2321
2322 /* If we are about to do the last recursive call
2323 needed at this level, change it into iteration.
2324 This function is called enough to be worth it. */
2325 if (i == 0)
2326 {
2327 x = tem;
2328 goto repeat;
2329 }
2330 hash += canon_hash (tem, 0);
2331 }
2332 else if (fmt[i] == 'E')
2333 for (j = 0; j < XVECLEN (x, i); j++)
2334 hash += canon_hash (XVECEXP (x, i, j), 0);
2335 else if (fmt[i] == 's')
2336 hash += canon_hash_string (XSTR (x, i));
2337 else if (fmt[i] == 'i')
2338 {
2339 unsigned tem = XINT (x, i);
2340 hash += tem;
2341 }
2342 else if (fmt[i] == '0' || fmt[i] == 't')
2343 /* Unused. */
2344 ;
2345 else
2346 abort ();
2347 }
2348 return hash;
2349 }
2350
2351 /* Like canon_hash but with no side effects. */
2352
2353 static unsigned
2354 safe_hash (rtx x, enum machine_mode mode)
2355 {
2356 int save_do_not_record = do_not_record;
2357 int save_hash_arg_in_memory = hash_arg_in_memory;
2358 unsigned hash = canon_hash (x, mode);
2359 hash_arg_in_memory = save_hash_arg_in_memory;
2360 do_not_record = save_do_not_record;
2361 return hash;
2362 }
2363 \f
2364 /* Return 1 iff X and Y would canonicalize into the same thing,
2365 without actually constructing the canonicalization of either one.
2366 If VALIDATE is nonzero,
2367 we assume X is an expression being processed from the rtl
2368 and Y was found in the hash table. We check register refs
2369 in Y for being marked as valid.
2370
2371 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2372 that is known to be in the register. Ordinarily, we don't allow them
2373 to match, because letting them match would cause unpredictable results
2374 in all the places that search a hash table chain for an equivalent
2375 for a given value. A possible equivalent that has different structure
2376 has its hash code computed from different data. Whether the hash code
2377 is the same as that of the given value is pure luck. */
2378
2379 static int
2380 exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
2381 {
2382 int i, j;
2383 enum rtx_code code;
2384 const char *fmt;
2385
2386 /* Note: it is incorrect to assume an expression is equivalent to itself
2387 if VALIDATE is nonzero. */
2388 if (x == y && !validate)
2389 return 1;
2390 if (x == 0 || y == 0)
2391 return x == y;
2392
2393 code = GET_CODE (x);
2394 if (code != GET_CODE (y))
2395 {
2396 if (!equal_values)
2397 return 0;
2398
2399 /* If X is a constant and Y is a register or vice versa, they may be
2400 equivalent. We only have to validate if Y is a register. */
2401 if (CONSTANT_P (x) && REG_P (y)
2402 && REGNO_QTY_VALID_P (REGNO (y)))
2403 {
2404 int y_q = REG_QTY (REGNO (y));
2405 struct qty_table_elem *y_ent = &qty_table[y_q];
2406
2407 if (GET_MODE (y) == y_ent->mode
2408 && rtx_equal_p (x, y_ent->const_rtx)
2409 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2410 return 1;
2411 }
2412
2413 if (CONSTANT_P (y) && code == REG
2414 && REGNO_QTY_VALID_P (REGNO (x)))
2415 {
2416 int x_q = REG_QTY (REGNO (x));
2417 struct qty_table_elem *x_ent = &qty_table[x_q];
2418
2419 if (GET_MODE (x) == x_ent->mode
2420 && rtx_equal_p (y, x_ent->const_rtx))
2421 return 1;
2422 }
2423
2424 return 0;
2425 }
2426
2427 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2428 if (GET_MODE (x) != GET_MODE (y))
2429 return 0;
2430
2431 switch (code)
2432 {
2433 case PC:
2434 case CC0:
2435 case CONST_INT:
2436 return x == y;
2437
2438 case LABEL_REF:
2439 return XEXP (x, 0) == XEXP (y, 0);
2440
2441 case SYMBOL_REF:
2442 return XSTR (x, 0) == XSTR (y, 0);
2443
2444 case REG:
2445 {
2446 unsigned int regno = REGNO (y);
2447 unsigned int endregno
2448 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2449 : hard_regno_nregs[regno][GET_MODE (y)]);
2450 unsigned int i;
2451
2452 /* If the quantities are not the same, the expressions are not
2453 equivalent. If there are and we are not to validate, they
2454 are equivalent. Otherwise, ensure all regs are up-to-date. */
2455
2456 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2457 return 0;
2458
2459 if (! validate)
2460 return 1;
2461
2462 for (i = regno; i < endregno; i++)
2463 if (REG_IN_TABLE (i) != REG_TICK (i))
2464 return 0;
2465
2466 return 1;
2467 }
2468
2469 /* For commutative operations, check both orders. */
2470 case PLUS:
2471 case MULT:
2472 case AND:
2473 case IOR:
2474 case XOR:
2475 case NE:
2476 case EQ:
2477 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2478 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2479 validate, equal_values))
2480 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2481 validate, equal_values)
2482 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2483 validate, equal_values)));
2484
2485 case ASM_OPERANDS:
2486 /* We don't use the generic code below because we want to
2487 disregard filename and line numbers. */
2488
2489 /* A volatile asm isn't equivalent to any other. */
2490 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2491 return 0;
2492
2493 if (GET_MODE (x) != GET_MODE (y)
2494 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2495 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2496 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2497 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2498 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2499 return 0;
2500
2501 if (ASM_OPERANDS_INPUT_LENGTH (x))
2502 {
2503 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2504 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2505 ASM_OPERANDS_INPUT (y, i),
2506 validate, equal_values)
2507 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2508 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2509 return 0;
2510 }
2511
2512 return 1;
2513
2514 default:
2515 break;
2516 }
2517
2518 /* Compare the elements. If any pair of corresponding elements
2519 fail to match, return 0 for the whole things. */
2520
2521 fmt = GET_RTX_FORMAT (code);
2522 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2523 {
2524 switch (fmt[i])
2525 {
2526 case 'e':
2527 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2528 return 0;
2529 break;
2530
2531 case 'E':
2532 if (XVECLEN (x, i) != XVECLEN (y, i))
2533 return 0;
2534 for (j = 0; j < XVECLEN (x, i); j++)
2535 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2536 validate, equal_values))
2537 return 0;
2538 break;
2539
2540 case 's':
2541 if (strcmp (XSTR (x, i), XSTR (y, i)))
2542 return 0;
2543 break;
2544
2545 case 'i':
2546 if (XINT (x, i) != XINT (y, i))
2547 return 0;
2548 break;
2549
2550 case 'w':
2551 if (XWINT (x, i) != XWINT (y, i))
2552 return 0;
2553 break;
2554
2555 case '0':
2556 case 't':
2557 break;
2558
2559 default:
2560 abort ();
2561 }
2562 }
2563
2564 return 1;
2565 }
2566 \f
2567 /* Return 1 if X has a value that can vary even between two
2568 executions of the program. 0 means X can be compared reliably
2569 against certain constants or near-constants. */
2570
2571 static int
2572 cse_rtx_varies_p (rtx x, int from_alias)
2573 {
2574 /* We need not check for X and the equivalence class being of the same
2575 mode because if X is equivalent to a constant in some mode, it
2576 doesn't vary in any mode. */
2577
2578 if (REG_P (x)
2579 && REGNO_QTY_VALID_P (REGNO (x)))
2580 {
2581 int x_q = REG_QTY (REGNO (x));
2582 struct qty_table_elem *x_ent = &qty_table[x_q];
2583
2584 if (GET_MODE (x) == x_ent->mode
2585 && x_ent->const_rtx != NULL_RTX)
2586 return 0;
2587 }
2588
2589 if (GET_CODE (x) == PLUS
2590 && GET_CODE (XEXP (x, 1)) == CONST_INT
2591 && REG_P (XEXP (x, 0))
2592 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2593 {
2594 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2595 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2596
2597 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2598 && x0_ent->const_rtx != NULL_RTX)
2599 return 0;
2600 }
2601
2602 /* This can happen as the result of virtual register instantiation, if
2603 the initial constant is too large to be a valid address. This gives
2604 us a three instruction sequence, load large offset into a register,
2605 load fp minus a constant into a register, then a MEM which is the
2606 sum of the two `constant' registers. */
2607 if (GET_CODE (x) == PLUS
2608 && REG_P (XEXP (x, 0))
2609 && REG_P (XEXP (x, 1))
2610 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2611 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2612 {
2613 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2614 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2615 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2616 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2617
2618 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2619 && x0_ent->const_rtx != NULL_RTX
2620 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2621 && x1_ent->const_rtx != NULL_RTX)
2622 return 0;
2623 }
2624
2625 return rtx_varies_p (x, from_alias);
2626 }
2627 \f
2628 /* Canonicalize an expression:
2629 replace each register reference inside it
2630 with the "oldest" equivalent register.
2631
2632 If INSN is nonzero and we are replacing a pseudo with a hard register
2633 or vice versa, validate_change is used to ensure that INSN remains valid
2634 after we make our substitution. The calls are made with IN_GROUP nonzero
2635 so apply_change_group must be called upon the outermost return from this
2636 function (unless INSN is zero). The result of apply_change_group can
2637 generally be discarded since the changes we are making are optional. */
2638
2639 static rtx
2640 canon_reg (rtx x, rtx insn)
2641 {
2642 int i;
2643 enum rtx_code code;
2644 const char *fmt;
2645
2646 if (x == 0)
2647 return x;
2648
2649 code = GET_CODE (x);
2650 switch (code)
2651 {
2652 case PC:
2653 case CC0:
2654 case CONST:
2655 case CONST_INT:
2656 case CONST_DOUBLE:
2657 case CONST_VECTOR:
2658 case SYMBOL_REF:
2659 case LABEL_REF:
2660 case ADDR_VEC:
2661 case ADDR_DIFF_VEC:
2662 return x;
2663
2664 case REG:
2665 {
2666 int first;
2667 int q;
2668 struct qty_table_elem *ent;
2669
2670 /* Never replace a hard reg, because hard regs can appear
2671 in more than one machine mode, and we must preserve the mode
2672 of each occurrence. Also, some hard regs appear in
2673 MEMs that are shared and mustn't be altered. Don't try to
2674 replace any reg that maps to a reg of class NO_REGS. */
2675 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2676 || ! REGNO_QTY_VALID_P (REGNO (x)))
2677 return x;
2678
2679 q = REG_QTY (REGNO (x));
2680 ent = &qty_table[q];
2681 first = ent->first_reg;
2682 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2683 : REGNO_REG_CLASS (first) == NO_REGS ? x
2684 : gen_rtx_REG (ent->mode, first));
2685 }
2686
2687 default:
2688 break;
2689 }
2690
2691 fmt = GET_RTX_FORMAT (code);
2692 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2693 {
2694 int j;
2695
2696 if (fmt[i] == 'e')
2697 {
2698 rtx new = canon_reg (XEXP (x, i), insn);
2699 int insn_code;
2700
2701 /* If replacing pseudo with hard reg or vice versa, ensure the
2702 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2703 if (insn != 0 && new != 0
2704 && REG_P (new) && REG_P (XEXP (x, i))
2705 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2706 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2707 || (insn_code = recog_memoized (insn)) < 0
2708 || insn_data[insn_code].n_dups > 0))
2709 validate_change (insn, &XEXP (x, i), new, 1);
2710 else
2711 XEXP (x, i) = new;
2712 }
2713 else if (fmt[i] == 'E')
2714 for (j = 0; j < XVECLEN (x, i); j++)
2715 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2716 }
2717
2718 return x;
2719 }
2720 \f
2721 /* LOC is a location within INSN that is an operand address (the contents of
2722 a MEM). Find the best equivalent address to use that is valid for this
2723 insn.
2724
2725 On most CISC machines, complicated address modes are costly, and rtx_cost
2726 is a good approximation for that cost. However, most RISC machines have
2727 only a few (usually only one) memory reference formats. If an address is
2728 valid at all, it is often just as cheap as any other address. Hence, for
2729 RISC machines, we use `address_cost' to compare the costs of various
2730 addresses. For two addresses of equal cost, choose the one with the
2731 highest `rtx_cost' value as that has the potential of eliminating the
2732 most insns. For equal costs, we choose the first in the equivalence
2733 class. Note that we ignore the fact that pseudo registers are cheaper than
2734 hard registers here because we would also prefer the pseudo registers. */
2735
2736 static void
2737 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2738 {
2739 struct table_elt *elt;
2740 rtx addr = *loc;
2741 struct table_elt *p;
2742 int found_better = 1;
2743 int save_do_not_record = do_not_record;
2744 int save_hash_arg_in_memory = hash_arg_in_memory;
2745 int addr_volatile;
2746 int regno;
2747 unsigned hash;
2748
2749 /* Do not try to replace constant addresses or addresses of local and
2750 argument slots. These MEM expressions are made only once and inserted
2751 in many instructions, as well as being used to control symbol table
2752 output. It is not safe to clobber them.
2753
2754 There are some uncommon cases where the address is already in a register
2755 for some reason, but we cannot take advantage of that because we have
2756 no easy way to unshare the MEM. In addition, looking up all stack
2757 addresses is costly. */
2758 if ((GET_CODE (addr) == PLUS
2759 && REG_P (XEXP (addr, 0))
2760 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2761 && (regno = REGNO (XEXP (addr, 0)),
2762 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2763 || regno == ARG_POINTER_REGNUM))
2764 || (REG_P (addr)
2765 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2766 || regno == HARD_FRAME_POINTER_REGNUM
2767 || regno == ARG_POINTER_REGNUM))
2768 || GET_CODE (addr) == ADDRESSOF
2769 || CONSTANT_ADDRESS_P (addr))
2770 return;
2771
2772 /* If this address is not simply a register, try to fold it. This will
2773 sometimes simplify the expression. Many simplifications
2774 will not be valid, but some, usually applying the associative rule, will
2775 be valid and produce better code. */
2776 if (!REG_P (addr))
2777 {
2778 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2779 int addr_folded_cost = address_cost (folded, mode);
2780 int addr_cost = address_cost (addr, mode);
2781
2782 if ((addr_folded_cost < addr_cost
2783 || (addr_folded_cost == addr_cost
2784 /* ??? The rtx_cost comparison is left over from an older
2785 version of this code. It is probably no longer helpful. */
2786 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2787 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2788 && validate_change (insn, loc, folded, 0))
2789 addr = folded;
2790 }
2791
2792 /* If this address is not in the hash table, we can't look for equivalences
2793 of the whole address. Also, ignore if volatile. */
2794
2795 do_not_record = 0;
2796 hash = HASH (addr, Pmode);
2797 addr_volatile = do_not_record;
2798 do_not_record = save_do_not_record;
2799 hash_arg_in_memory = save_hash_arg_in_memory;
2800
2801 if (addr_volatile)
2802 return;
2803
2804 elt = lookup (addr, hash, Pmode);
2805
2806 if (elt)
2807 {
2808 /* We need to find the best (under the criteria documented above) entry
2809 in the class that is valid. We use the `flag' field to indicate
2810 choices that were invalid and iterate until we can't find a better
2811 one that hasn't already been tried. */
2812
2813 for (p = elt->first_same_value; p; p = p->next_same_value)
2814 p->flag = 0;
2815
2816 while (found_better)
2817 {
2818 int best_addr_cost = address_cost (*loc, mode);
2819 int best_rtx_cost = (elt->cost + 1) >> 1;
2820 int exp_cost;
2821 struct table_elt *best_elt = elt;
2822
2823 found_better = 0;
2824 for (p = elt->first_same_value; p; p = p->next_same_value)
2825 if (! p->flag)
2826 {
2827 if ((REG_P (p->exp)
2828 || exp_equiv_p (p->exp, p->exp, 1, 0))
2829 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2830 || (exp_cost == best_addr_cost
2831 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2832 {
2833 found_better = 1;
2834 best_addr_cost = exp_cost;
2835 best_rtx_cost = (p->cost + 1) >> 1;
2836 best_elt = p;
2837 }
2838 }
2839
2840 if (found_better)
2841 {
2842 if (validate_change (insn, loc,
2843 canon_reg (copy_rtx (best_elt->exp),
2844 NULL_RTX), 0))
2845 return;
2846 else
2847 best_elt->flag = 1;
2848 }
2849 }
2850 }
2851
2852 /* If the address is a binary operation with the first operand a register
2853 and the second a constant, do the same as above, but looking for
2854 equivalences of the register. Then try to simplify before checking for
2855 the best address to use. This catches a few cases: First is when we
2856 have REG+const and the register is another REG+const. We can often merge
2857 the constants and eliminate one insn and one register. It may also be
2858 that a machine has a cheap REG+REG+const. Finally, this improves the
2859 code on the Alpha for unaligned byte stores. */
2860
2861 if (flag_expensive_optimizations
2862 && ARITHMETIC_P (*loc)
2863 && REG_P (XEXP (*loc, 0)))
2864 {
2865 rtx op1 = XEXP (*loc, 1);
2866
2867 do_not_record = 0;
2868 hash = HASH (XEXP (*loc, 0), Pmode);
2869 do_not_record = save_do_not_record;
2870 hash_arg_in_memory = save_hash_arg_in_memory;
2871
2872 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2873 if (elt == 0)
2874 return;
2875
2876 /* We need to find the best (under the criteria documented above) entry
2877 in the class that is valid. We use the `flag' field to indicate
2878 choices that were invalid and iterate until we can't find a better
2879 one that hasn't already been tried. */
2880
2881 for (p = elt->first_same_value; p; p = p->next_same_value)
2882 p->flag = 0;
2883
2884 while (found_better)
2885 {
2886 int best_addr_cost = address_cost (*loc, mode);
2887 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2888 struct table_elt *best_elt = elt;
2889 rtx best_rtx = *loc;
2890 int count;
2891
2892 /* This is at worst case an O(n^2) algorithm, so limit our search
2893 to the first 32 elements on the list. This avoids trouble
2894 compiling code with very long basic blocks that can easily
2895 call simplify_gen_binary so many times that we run out of
2896 memory. */
2897
2898 found_better = 0;
2899 for (p = elt->first_same_value, count = 0;
2900 p && count < 32;
2901 p = p->next_same_value, count++)
2902 if (! p->flag
2903 && (REG_P (p->exp)
2904 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2905 {
2906 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2907 p->exp, op1);
2908 int new_cost;
2909 new_cost = address_cost (new, mode);
2910
2911 if (new_cost < best_addr_cost
2912 || (new_cost == best_addr_cost
2913 && (COST (new) + 1) >> 1 > best_rtx_cost))
2914 {
2915 found_better = 1;
2916 best_addr_cost = new_cost;
2917 best_rtx_cost = (COST (new) + 1) >> 1;
2918 best_elt = p;
2919 best_rtx = new;
2920 }
2921 }
2922
2923 if (found_better)
2924 {
2925 if (validate_change (insn, loc,
2926 canon_reg (copy_rtx (best_rtx),
2927 NULL_RTX), 0))
2928 return;
2929 else
2930 best_elt->flag = 1;
2931 }
2932 }
2933 }
2934 }
2935 \f
2936 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2937 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2938 what values are being compared.
2939
2940 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2941 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2942 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2943 compared to produce cc0.
2944
2945 The return value is the comparison operator and is either the code of
2946 A or the code corresponding to the inverse of the comparison. */
2947
2948 static enum rtx_code
2949 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2950 enum machine_mode *pmode1, enum machine_mode *pmode2)
2951 {
2952 rtx arg1, arg2;
2953
2954 arg1 = *parg1, arg2 = *parg2;
2955
2956 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2957
2958 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2959 {
2960 /* Set nonzero when we find something of interest. */
2961 rtx x = 0;
2962 int reverse_code = 0;
2963 struct table_elt *p = 0;
2964
2965 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2966 On machines with CC0, this is the only case that can occur, since
2967 fold_rtx will return the COMPARE or item being compared with zero
2968 when given CC0. */
2969
2970 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2971 x = arg1;
2972
2973 /* If ARG1 is a comparison operator and CODE is testing for
2974 STORE_FLAG_VALUE, get the inner arguments. */
2975
2976 else if (COMPARISON_P (arg1))
2977 {
2978 #ifdef FLOAT_STORE_FLAG_VALUE
2979 REAL_VALUE_TYPE fsfv;
2980 #endif
2981
2982 if (code == NE
2983 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2984 && code == LT && STORE_FLAG_VALUE == -1)
2985 #ifdef FLOAT_STORE_FLAG_VALUE
2986 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2987 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2988 REAL_VALUE_NEGATIVE (fsfv)))
2989 #endif
2990 )
2991 x = arg1;
2992 else if (code == EQ
2993 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2994 && code == GE && STORE_FLAG_VALUE == -1)
2995 #ifdef FLOAT_STORE_FLAG_VALUE
2996 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2997 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2998 REAL_VALUE_NEGATIVE (fsfv)))
2999 #endif
3000 )
3001 x = arg1, reverse_code = 1;
3002 }
3003
3004 /* ??? We could also check for
3005
3006 (ne (and (eq (...) (const_int 1))) (const_int 0))
3007
3008 and related forms, but let's wait until we see them occurring. */
3009
3010 if (x == 0)
3011 /* Look up ARG1 in the hash table and see if it has an equivalence
3012 that lets us see what is being compared. */
3013 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3014 GET_MODE (arg1));
3015 if (p)
3016 {
3017 p = p->first_same_value;
3018
3019 /* If what we compare is already known to be constant, that is as
3020 good as it gets.
3021 We need to break the loop in this case, because otherwise we
3022 can have an infinite loop when looking at a reg that is known
3023 to be a constant which is the same as a comparison of a reg
3024 against zero which appears later in the insn stream, which in
3025 turn is constant and the same as the comparison of the first reg
3026 against zero... */
3027 if (p->is_const)
3028 break;
3029 }
3030
3031 for (; p; p = p->next_same_value)
3032 {
3033 enum machine_mode inner_mode = GET_MODE (p->exp);
3034 #ifdef FLOAT_STORE_FLAG_VALUE
3035 REAL_VALUE_TYPE fsfv;
3036 #endif
3037
3038 /* If the entry isn't valid, skip it. */
3039 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3040 continue;
3041
3042 if (GET_CODE (p->exp) == COMPARE
3043 /* Another possibility is that this machine has a compare insn
3044 that includes the comparison code. In that case, ARG1 would
3045 be equivalent to a comparison operation that would set ARG1 to
3046 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3047 ORIG_CODE is the actual comparison being done; if it is an EQ,
3048 we must reverse ORIG_CODE. On machine with a negative value
3049 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3050 || ((code == NE
3051 || (code == LT
3052 && GET_MODE_CLASS (inner_mode) == MODE_INT
3053 && (GET_MODE_BITSIZE (inner_mode)
3054 <= HOST_BITS_PER_WIDE_INT)
3055 && (STORE_FLAG_VALUE
3056 & ((HOST_WIDE_INT) 1
3057 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3058 #ifdef FLOAT_STORE_FLAG_VALUE
3059 || (code == LT
3060 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3061 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3062 REAL_VALUE_NEGATIVE (fsfv)))
3063 #endif
3064 )
3065 && COMPARISON_P (p->exp)))
3066 {
3067 x = p->exp;
3068 break;
3069 }
3070 else if ((code == EQ
3071 || (code == GE
3072 && GET_MODE_CLASS (inner_mode) == MODE_INT
3073 && (GET_MODE_BITSIZE (inner_mode)
3074 <= HOST_BITS_PER_WIDE_INT)
3075 && (STORE_FLAG_VALUE
3076 & ((HOST_WIDE_INT) 1
3077 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3078 #ifdef FLOAT_STORE_FLAG_VALUE
3079 || (code == GE
3080 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3081 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3082 REAL_VALUE_NEGATIVE (fsfv)))
3083 #endif
3084 )
3085 && COMPARISON_P (p->exp))
3086 {
3087 reverse_code = 1;
3088 x = p->exp;
3089 break;
3090 }
3091
3092 /* If this non-trapping address, e.g. fp + constant, the
3093 equivalent is a better operand since it may let us predict
3094 the value of the comparison. */
3095 else if (!rtx_addr_can_trap_p (p->exp))
3096 {
3097 arg1 = p->exp;
3098 continue;
3099 }
3100 }
3101
3102 /* If we didn't find a useful equivalence for ARG1, we are done.
3103 Otherwise, set up for the next iteration. */
3104 if (x == 0)
3105 break;
3106
3107 /* If we need to reverse the comparison, make sure that that is
3108 possible -- we can't necessarily infer the value of GE from LT
3109 with floating-point operands. */
3110 if (reverse_code)
3111 {
3112 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3113 if (reversed == UNKNOWN)
3114 break;
3115 else
3116 code = reversed;
3117 }
3118 else if (COMPARISON_P (x))
3119 code = GET_CODE (x);
3120 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3121 }
3122
3123 /* Return our results. Return the modes from before fold_rtx
3124 because fold_rtx might produce const_int, and then it's too late. */
3125 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3126 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3127
3128 return code;
3129 }
3130 \f
3131 /* If X is a nontrivial arithmetic operation on an argument
3132 for which a constant value can be determined, return
3133 the result of operating on that value, as a constant.
3134 Otherwise, return X, possibly with one or more operands
3135 modified by recursive calls to this function.
3136
3137 If X is a register whose contents are known, we do NOT
3138 return those contents here. equiv_constant is called to
3139 perform that task.
3140
3141 INSN is the insn that we may be modifying. If it is 0, make a copy
3142 of X before modifying it. */
3143
3144 static rtx
3145 fold_rtx (rtx x, rtx insn)
3146 {
3147 enum rtx_code code;
3148 enum machine_mode mode;
3149 const char *fmt;
3150 int i;
3151 rtx new = 0;
3152 int copied = 0;
3153 int must_swap = 0;
3154
3155 /* Folded equivalents of first two operands of X. */
3156 rtx folded_arg0;
3157 rtx folded_arg1;
3158
3159 /* Constant equivalents of first three operands of X;
3160 0 when no such equivalent is known. */
3161 rtx const_arg0;
3162 rtx const_arg1;
3163 rtx const_arg2;
3164
3165 /* The mode of the first operand of X. We need this for sign and zero
3166 extends. */
3167 enum machine_mode mode_arg0;
3168
3169 if (x == 0)
3170 return x;
3171
3172 mode = GET_MODE (x);
3173 code = GET_CODE (x);
3174 switch (code)
3175 {
3176 case CONST:
3177 case CONST_INT:
3178 case CONST_DOUBLE:
3179 case CONST_VECTOR:
3180 case SYMBOL_REF:
3181 case LABEL_REF:
3182 case REG:
3183 /* No use simplifying an EXPR_LIST
3184 since they are used only for lists of args
3185 in a function call's REG_EQUAL note. */
3186 case EXPR_LIST:
3187 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3188 want to (e.g.,) make (addressof (const_int 0)) just because
3189 the location is known to be zero. */
3190 case ADDRESSOF:
3191 return x;
3192
3193 #ifdef HAVE_cc0
3194 case CC0:
3195 return prev_insn_cc0;
3196 #endif
3197
3198 case PC:
3199 /* If the next insn is a CODE_LABEL followed by a jump table,
3200 PC's value is a LABEL_REF pointing to that label. That
3201 lets us fold switch statements on the VAX. */
3202 {
3203 rtx next;
3204 if (insn && tablejump_p (insn, &next, NULL))
3205 return gen_rtx_LABEL_REF (Pmode, next);
3206 }
3207 break;
3208
3209 case SUBREG:
3210 /* See if we previously assigned a constant value to this SUBREG. */
3211 if ((new = lookup_as_function (x, CONST_INT)) != 0
3212 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3213 return new;
3214
3215 /* If this is a paradoxical SUBREG, we have no idea what value the
3216 extra bits would have. However, if the operand is equivalent
3217 to a SUBREG whose operand is the same as our mode, and all the
3218 modes are within a word, we can just use the inner operand
3219 because these SUBREGs just say how to treat the register.
3220
3221 Similarly if we find an integer constant. */
3222
3223 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3224 {
3225 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3226 struct table_elt *elt;
3227
3228 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3229 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3230 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3231 imode)) != 0)
3232 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3233 {
3234 if (CONSTANT_P (elt->exp)
3235 && GET_MODE (elt->exp) == VOIDmode)
3236 return elt->exp;
3237
3238 if (GET_CODE (elt->exp) == SUBREG
3239 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3240 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3241 return copy_rtx (SUBREG_REG (elt->exp));
3242 }
3243
3244 return x;
3245 }
3246
3247 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3248 We might be able to if the SUBREG is extracting a single word in an
3249 integral mode or extracting the low part. */
3250
3251 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3252 const_arg0 = equiv_constant (folded_arg0);
3253 if (const_arg0)
3254 folded_arg0 = const_arg0;
3255
3256 if (folded_arg0 != SUBREG_REG (x))
3257 {
3258 new = simplify_subreg (mode, folded_arg0,
3259 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3260 if (new)
3261 return new;
3262 }
3263
3264 if (REG_P (folded_arg0)
3265 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
3266 {
3267 struct table_elt *elt;
3268
3269 /* We can use HASH here since we know that canon_hash won't be
3270 called. */
3271 elt = lookup (folded_arg0,
3272 HASH (folded_arg0, GET_MODE (folded_arg0)),
3273 GET_MODE (folded_arg0));
3274
3275 if (elt)
3276 elt = elt->first_same_value;
3277
3278 if (subreg_lowpart_p (x))
3279 /* If this is a narrowing SUBREG and our operand is a REG, see
3280 if we can find an equivalence for REG that is an arithmetic
3281 operation in a wider mode where both operands are paradoxical
3282 SUBREGs from objects of our result mode. In that case, we
3283 couldn-t report an equivalent value for that operation, since we
3284 don't know what the extra bits will be. But we can find an
3285 equivalence for this SUBREG by folding that operation in the
3286 narrow mode. This allows us to fold arithmetic in narrow modes
3287 when the machine only supports word-sized arithmetic.
3288
3289 Also look for a case where we have a SUBREG whose operand
3290 is the same as our result. If both modes are smaller
3291 than a word, we are simply interpreting a register in
3292 different modes and we can use the inner value. */
3293
3294 for (; elt; elt = elt->next_same_value)
3295 {
3296 enum rtx_code eltcode = GET_CODE (elt->exp);
3297
3298 /* Just check for unary and binary operations. */
3299 if (UNARY_P (elt->exp)
3300 && eltcode != SIGN_EXTEND
3301 && eltcode != ZERO_EXTEND
3302 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3303 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3304 && (GET_MODE_CLASS (mode)
3305 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3306 {
3307 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3308
3309 if (!REG_P (op0) && ! CONSTANT_P (op0))
3310 op0 = fold_rtx (op0, NULL_RTX);
3311
3312 op0 = equiv_constant (op0);
3313 if (op0)
3314 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3315 op0, mode);
3316 }
3317 else if (ARITHMETIC_P (elt->exp)
3318 && eltcode != DIV && eltcode != MOD
3319 && eltcode != UDIV && eltcode != UMOD
3320 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3321 && eltcode != ROTATE && eltcode != ROTATERT
3322 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3323 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3324 == mode))
3325 || CONSTANT_P (XEXP (elt->exp, 0)))
3326 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3327 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3328 == mode))
3329 || CONSTANT_P (XEXP (elt->exp, 1))))
3330 {
3331 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3332 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3333
3334 if (op0 && !REG_P (op0) && ! CONSTANT_P (op0))
3335 op0 = fold_rtx (op0, NULL_RTX);
3336
3337 if (op0)
3338 op0 = equiv_constant (op0);
3339
3340 if (op1 && !REG_P (op1) && ! CONSTANT_P (op1))
3341 op1 = fold_rtx (op1, NULL_RTX);
3342
3343 if (op1)
3344 op1 = equiv_constant (op1);
3345
3346 /* If we are looking for the low SImode part of
3347 (ashift:DI c (const_int 32)), it doesn't work
3348 to compute that in SImode, because a 32-bit shift
3349 in SImode is unpredictable. We know the value is 0. */
3350 if (op0 && op1
3351 && GET_CODE (elt->exp) == ASHIFT
3352 && GET_CODE (op1) == CONST_INT
3353 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3354 {
3355 if (INTVAL (op1)
3356 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3357 /* If the count fits in the inner mode's width,
3358 but exceeds the outer mode's width,
3359 the value will get truncated to 0
3360 by the subreg. */
3361 new = CONST0_RTX (mode);
3362 else
3363 /* If the count exceeds even the inner mode's width,
3364 don't fold this expression. */
3365 new = 0;
3366 }
3367 else if (op0 && op1)
3368 new = simplify_binary_operation (GET_CODE (elt->exp), mode, op0, op1);
3369 }
3370
3371 else if (GET_CODE (elt->exp) == SUBREG
3372 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3373 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3374 <= UNITS_PER_WORD)
3375 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3376 new = copy_rtx (SUBREG_REG (elt->exp));
3377
3378 if (new)
3379 return new;
3380 }
3381 else
3382 /* A SUBREG resulting from a zero extension may fold to zero if
3383 it extracts higher bits than the ZERO_EXTEND's source bits.
3384 FIXME: if combine tried to, er, combine these instructions,
3385 this transformation may be moved to simplify_subreg. */
3386 for (; elt; elt = elt->next_same_value)
3387 {
3388 if (GET_CODE (elt->exp) == ZERO_EXTEND
3389 && subreg_lsb (x)
3390 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3391 return CONST0_RTX (mode);
3392 }
3393 }
3394
3395 return x;
3396
3397 case NOT:
3398 case NEG:
3399 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3400 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3401 new = lookup_as_function (XEXP (x, 0), code);
3402 if (new)
3403 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3404 break;
3405
3406 case MEM:
3407 /* If we are not actually processing an insn, don't try to find the
3408 best address. Not only don't we care, but we could modify the
3409 MEM in an invalid way since we have no insn to validate against. */
3410 if (insn != 0)
3411 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3412
3413 {
3414 /* Even if we don't fold in the insn itself,
3415 we can safely do so here, in hopes of getting a constant. */
3416 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3417 rtx base = 0;
3418 HOST_WIDE_INT offset = 0;
3419
3420 if (REG_P (addr)
3421 && REGNO_QTY_VALID_P (REGNO (addr)))
3422 {
3423 int addr_q = REG_QTY (REGNO (addr));
3424 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3425
3426 if (GET_MODE (addr) == addr_ent->mode
3427 && addr_ent->const_rtx != NULL_RTX)
3428 addr = addr_ent->const_rtx;
3429 }
3430
3431 /* If address is constant, split it into a base and integer offset. */
3432 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3433 base = addr;
3434 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3435 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3436 {
3437 base = XEXP (XEXP (addr, 0), 0);
3438 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3439 }
3440 else if (GET_CODE (addr) == LO_SUM
3441 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3442 base = XEXP (addr, 1);
3443 else if (GET_CODE (addr) == ADDRESSOF)
3444 return change_address (x, VOIDmode, addr);
3445
3446 /* If this is a constant pool reference, we can fold it into its
3447 constant to allow better value tracking. */
3448 if (base && GET_CODE (base) == SYMBOL_REF
3449 && CONSTANT_POOL_ADDRESS_P (base))
3450 {
3451 rtx constant = get_pool_constant (base);
3452 enum machine_mode const_mode = get_pool_mode (base);
3453 rtx new;
3454
3455 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3456 {
3457 constant_pool_entries_cost = COST (constant);
3458 constant_pool_entries_regcost = approx_reg_cost (constant);
3459 }
3460
3461 /* If we are loading the full constant, we have an equivalence. */
3462 if (offset == 0 && mode == const_mode)
3463 return constant;
3464
3465 /* If this actually isn't a constant (weird!), we can't do
3466 anything. Otherwise, handle the two most common cases:
3467 extracting a word from a multi-word constant, and extracting
3468 the low-order bits. Other cases don't seem common enough to
3469 worry about. */
3470 if (! CONSTANT_P (constant))
3471 return x;
3472
3473 if (GET_MODE_CLASS (mode) == MODE_INT
3474 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3475 && offset % UNITS_PER_WORD == 0
3476 && (new = operand_subword (constant,
3477 offset / UNITS_PER_WORD,
3478 0, const_mode)) != 0)
3479 return new;
3480
3481 if (((BYTES_BIG_ENDIAN
3482 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3483 || (! BYTES_BIG_ENDIAN && offset == 0))
3484 && (new = gen_lowpart (mode, constant)) != 0)
3485 return new;
3486 }
3487
3488 /* If this is a reference to a label at a known position in a jump
3489 table, we also know its value. */
3490 if (base && GET_CODE (base) == LABEL_REF)
3491 {
3492 rtx label = XEXP (base, 0);
3493 rtx table_insn = NEXT_INSN (label);
3494
3495 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3496 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3497 {
3498 rtx table = PATTERN (table_insn);
3499
3500 if (offset >= 0
3501 && (offset / GET_MODE_SIZE (GET_MODE (table))
3502 < XVECLEN (table, 0)))
3503 return XVECEXP (table, 0,
3504 offset / GET_MODE_SIZE (GET_MODE (table)));
3505 }
3506 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3507 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3508 {
3509 rtx table = PATTERN (table_insn);
3510
3511 if (offset >= 0
3512 && (offset / GET_MODE_SIZE (GET_MODE (table))
3513 < XVECLEN (table, 1)))
3514 {
3515 offset /= GET_MODE_SIZE (GET_MODE (table));
3516 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3517 XEXP (table, 0));
3518
3519 if (GET_MODE (table) != Pmode)
3520 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3521
3522 /* Indicate this is a constant. This isn't a
3523 valid form of CONST, but it will only be used
3524 to fold the next insns and then discarded, so
3525 it should be safe.
3526
3527 Note this expression must be explicitly discarded,
3528 by cse_insn, else it may end up in a REG_EQUAL note
3529 and "escape" to cause problems elsewhere. */
3530 return gen_rtx_CONST (GET_MODE (new), new);
3531 }
3532 }
3533 }
3534
3535 return x;
3536 }
3537
3538 #ifdef NO_FUNCTION_CSE
3539 case CALL:
3540 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3541 return x;
3542 break;
3543 #endif
3544
3545 case ASM_OPERANDS:
3546 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3547 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3548 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3549 break;
3550
3551 default:
3552 break;
3553 }
3554
3555 const_arg0 = 0;
3556 const_arg1 = 0;
3557 const_arg2 = 0;
3558 mode_arg0 = VOIDmode;
3559
3560 /* Try folding our operands.
3561 Then see which ones have constant values known. */
3562
3563 fmt = GET_RTX_FORMAT (code);
3564 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3565 if (fmt[i] == 'e')
3566 {
3567 rtx arg = XEXP (x, i);
3568 rtx folded_arg = arg, const_arg = 0;
3569 enum machine_mode mode_arg = GET_MODE (arg);
3570 rtx cheap_arg, expensive_arg;
3571 rtx replacements[2];
3572 int j;
3573 int old_cost = COST_IN (XEXP (x, i), code);
3574
3575 /* Most arguments are cheap, so handle them specially. */
3576 switch (GET_CODE (arg))
3577 {
3578 case REG:
3579 /* This is the same as calling equiv_constant; it is duplicated
3580 here for speed. */
3581 if (REGNO_QTY_VALID_P (REGNO (arg)))
3582 {
3583 int arg_q = REG_QTY (REGNO (arg));
3584 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3585
3586 if (arg_ent->const_rtx != NULL_RTX
3587 && !REG_P (arg_ent->const_rtx)
3588 && GET_CODE (arg_ent->const_rtx) != PLUS)
3589 const_arg
3590 = gen_lowpart (GET_MODE (arg),
3591 arg_ent->const_rtx);
3592 }
3593 break;
3594
3595 case CONST:
3596 case CONST_INT:
3597 case SYMBOL_REF:
3598 case LABEL_REF:
3599 case CONST_DOUBLE:
3600 case CONST_VECTOR:
3601 const_arg = arg;
3602 break;
3603
3604 #ifdef HAVE_cc0
3605 case CC0:
3606 folded_arg = prev_insn_cc0;
3607 mode_arg = prev_insn_cc0_mode;
3608 const_arg = equiv_constant (folded_arg);
3609 break;
3610 #endif
3611
3612 default:
3613 folded_arg = fold_rtx (arg, insn);
3614 const_arg = equiv_constant (folded_arg);
3615 }
3616
3617 /* For the first three operands, see if the operand
3618 is constant or equivalent to a constant. */
3619 switch (i)
3620 {
3621 case 0:
3622 folded_arg0 = folded_arg;
3623 const_arg0 = const_arg;
3624 mode_arg0 = mode_arg;
3625 break;
3626 case 1:
3627 folded_arg1 = folded_arg;
3628 const_arg1 = const_arg;
3629 break;
3630 case 2:
3631 const_arg2 = const_arg;
3632 break;
3633 }
3634
3635 /* Pick the least expensive of the folded argument and an
3636 equivalent constant argument. */
3637 if (const_arg == 0 || const_arg == folded_arg
3638 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3639 cheap_arg = folded_arg, expensive_arg = const_arg;
3640 else
3641 cheap_arg = const_arg, expensive_arg = folded_arg;
3642
3643 /* Try to replace the operand with the cheapest of the two
3644 possibilities. If it doesn't work and this is either of the first
3645 two operands of a commutative operation, try swapping them.
3646 If THAT fails, try the more expensive, provided it is cheaper
3647 than what is already there. */
3648
3649 if (cheap_arg == XEXP (x, i))
3650 continue;
3651
3652 if (insn == 0 && ! copied)
3653 {
3654 x = copy_rtx (x);
3655 copied = 1;
3656 }
3657
3658 /* Order the replacements from cheapest to most expensive. */
3659 replacements[0] = cheap_arg;
3660 replacements[1] = expensive_arg;
3661
3662 for (j = 0; j < 2 && replacements[j]; j++)
3663 {
3664 int new_cost = COST_IN (replacements[j], code);
3665
3666 /* Stop if what existed before was cheaper. Prefer constants
3667 in the case of a tie. */
3668 if (new_cost > old_cost
3669 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3670 break;
3671
3672 /* It's not safe to substitute the operand of a conversion
3673 operator with a constant, as the conversion's identity
3674 depends upon the mode of it's operand. This optimization
3675 is handled by the call to simplify_unary_operation. */
3676 if (GET_RTX_CLASS (code) == RTX_UNARY
3677 && GET_MODE (replacements[j]) != mode_arg0
3678 && (code == ZERO_EXTEND
3679 || code == SIGN_EXTEND
3680 || code == TRUNCATE
3681 || code == FLOAT_TRUNCATE
3682 || code == FLOAT_EXTEND
3683 || code == FLOAT
3684 || code == FIX
3685 || code == UNSIGNED_FLOAT
3686 || code == UNSIGNED_FIX))
3687 continue;
3688
3689 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3690 break;
3691
3692 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3693 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
3694 {
3695 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3696 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3697
3698 if (apply_change_group ())
3699 {
3700 /* Swap them back to be invalid so that this loop can
3701 continue and flag them to be swapped back later. */
3702 rtx tem;
3703
3704 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3705 XEXP (x, 1) = tem;
3706 must_swap = 1;
3707 break;
3708 }
3709 }
3710 }
3711 }
3712
3713 else
3714 {
3715 if (fmt[i] == 'E')
3716 /* Don't try to fold inside of a vector of expressions.
3717 Doing nothing is harmless. */
3718 {;}
3719 }
3720
3721 /* If a commutative operation, place a constant integer as the second
3722 operand unless the first operand is also a constant integer. Otherwise,
3723 place any constant second unless the first operand is also a constant. */
3724
3725 if (COMMUTATIVE_P (x))
3726 {
3727 if (must_swap
3728 || swap_commutative_operands_p (const_arg0 ? const_arg0
3729 : XEXP (x, 0),
3730 const_arg1 ? const_arg1
3731 : XEXP (x, 1)))
3732 {
3733 rtx tem = XEXP (x, 0);
3734
3735 if (insn == 0 && ! copied)
3736 {
3737 x = copy_rtx (x);
3738 copied = 1;
3739 }
3740
3741 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3742 validate_change (insn, &XEXP (x, 1), tem, 1);
3743 if (apply_change_group ())
3744 {
3745 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3746 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3747 }
3748 }
3749 }
3750
3751 /* If X is an arithmetic operation, see if we can simplify it. */
3752
3753 switch (GET_RTX_CLASS (code))
3754 {
3755 case RTX_UNARY:
3756 {
3757 int is_const = 0;
3758
3759 /* We can't simplify extension ops unless we know the
3760 original mode. */
3761 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3762 && mode_arg0 == VOIDmode)
3763 break;
3764
3765 /* If we had a CONST, strip it off and put it back later if we
3766 fold. */
3767 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3768 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3769
3770 new = simplify_unary_operation (code, mode,
3771 const_arg0 ? const_arg0 : folded_arg0,
3772 mode_arg0);
3773 if (new != 0 && is_const)
3774 new = gen_rtx_CONST (mode, new);
3775 }
3776 break;
3777
3778 case RTX_COMPARE:
3779 case RTX_COMM_COMPARE:
3780 /* See what items are actually being compared and set FOLDED_ARG[01]
3781 to those values and CODE to the actual comparison code. If any are
3782 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3783 do anything if both operands are already known to be constant. */
3784
3785 if (const_arg0 == 0 || const_arg1 == 0)
3786 {
3787 struct table_elt *p0, *p1;
3788 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3789 enum machine_mode mode_arg1;
3790
3791 #ifdef FLOAT_STORE_FLAG_VALUE
3792 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3793 {
3794 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3795 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3796 false_rtx = CONST0_RTX (mode);
3797 }
3798 #endif
3799
3800 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3801 &mode_arg0, &mode_arg1);
3802 const_arg0 = equiv_constant (folded_arg0);
3803 const_arg1 = equiv_constant (folded_arg1);
3804
3805 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3806 what kinds of things are being compared, so we can't do
3807 anything with this comparison. */
3808
3809 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3810 break;
3811
3812 /* If we do not now have two constants being compared, see
3813 if we can nevertheless deduce some things about the
3814 comparison. */
3815 if (const_arg0 == 0 || const_arg1 == 0)
3816 {
3817 /* Some addresses are known to be nonzero. We don't know
3818 their sign, but equality comparisons are known. */
3819 if (const_arg1 == const0_rtx
3820 && nonzero_address_p (folded_arg0))
3821 {
3822 if (code == EQ)
3823 return false_rtx;
3824 else if (code == NE)
3825 return true_rtx;
3826 }
3827
3828 /* See if the two operands are the same. */
3829
3830 if (folded_arg0 == folded_arg1
3831 || (REG_P (folded_arg0)
3832 && REG_P (folded_arg1)
3833 && (REG_QTY (REGNO (folded_arg0))
3834 == REG_QTY (REGNO (folded_arg1))))
3835 || ((p0 = lookup (folded_arg0,
3836 (safe_hash (folded_arg0, mode_arg0)
3837 & HASH_MASK), mode_arg0))
3838 && (p1 = lookup (folded_arg1,
3839 (safe_hash (folded_arg1, mode_arg0)
3840 & HASH_MASK), mode_arg0))
3841 && p0->first_same_value == p1->first_same_value))
3842 {
3843 /* Sadly two equal NaNs are not equivalent. */
3844 if (!HONOR_NANS (mode_arg0))
3845 return ((code == EQ || code == LE || code == GE
3846 || code == LEU || code == GEU || code == UNEQ
3847 || code == UNLE || code == UNGE
3848 || code == ORDERED)
3849 ? true_rtx : false_rtx);
3850 /* Take care for the FP compares we can resolve. */
3851 if (code == UNEQ || code == UNLE || code == UNGE)
3852 return true_rtx;
3853 if (code == LTGT || code == LT || code == GT)
3854 return false_rtx;
3855 }
3856
3857 /* If FOLDED_ARG0 is a register, see if the comparison we are
3858 doing now is either the same as we did before or the reverse
3859 (we only check the reverse if not floating-point). */
3860 else if (REG_P (folded_arg0))
3861 {
3862 int qty = REG_QTY (REGNO (folded_arg0));
3863
3864 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3865 {
3866 struct qty_table_elem *ent = &qty_table[qty];
3867
3868 if ((comparison_dominates_p (ent->comparison_code, code)
3869 || (! FLOAT_MODE_P (mode_arg0)
3870 && comparison_dominates_p (ent->comparison_code,
3871 reverse_condition (code))))
3872 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3873 || (const_arg1
3874 && rtx_equal_p (ent->comparison_const,
3875 const_arg1))
3876 || (REG_P (folded_arg1)
3877 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3878 return (comparison_dominates_p (ent->comparison_code, code)
3879 ? true_rtx : false_rtx);
3880 }
3881 }
3882 }
3883 }
3884
3885 /* If we are comparing against zero, see if the first operand is
3886 equivalent to an IOR with a constant. If so, we may be able to
3887 determine the result of this comparison. */
3888
3889 if (const_arg1 == const0_rtx)
3890 {
3891 rtx y = lookup_as_function (folded_arg0, IOR);
3892 rtx inner_const;
3893
3894 if (y != 0
3895 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3896 && GET_CODE (inner_const) == CONST_INT
3897 && INTVAL (inner_const) != 0)
3898 {
3899 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3900 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3901 && (INTVAL (inner_const)
3902 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3903 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3904
3905 #ifdef FLOAT_STORE_FLAG_VALUE
3906 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3907 {
3908 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3909 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3910 false_rtx = CONST0_RTX (mode);
3911 }
3912 #endif
3913
3914 switch (code)
3915 {
3916 case EQ:
3917 return false_rtx;
3918 case NE:
3919 return true_rtx;
3920 case LT: case LE:
3921 if (has_sign)
3922 return true_rtx;
3923 break;
3924 case GT: case GE:
3925 if (has_sign)
3926 return false_rtx;
3927 break;
3928 default:
3929 break;
3930 }
3931 }
3932 }
3933
3934 {
3935 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3936 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3937 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3938 }
3939 break;
3940
3941 case RTX_BIN_ARITH:
3942 case RTX_COMM_ARITH:
3943 switch (code)
3944 {
3945 case PLUS:
3946 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3947 with that LABEL_REF as its second operand. If so, the result is
3948 the first operand of that MINUS. This handles switches with an
3949 ADDR_DIFF_VEC table. */
3950 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3951 {
3952 rtx y
3953 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3954 : lookup_as_function (folded_arg0, MINUS);
3955
3956 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3957 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3958 return XEXP (y, 0);
3959
3960 /* Now try for a CONST of a MINUS like the above. */
3961 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3962 : lookup_as_function (folded_arg0, CONST))) != 0
3963 && GET_CODE (XEXP (y, 0)) == MINUS
3964 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3965 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3966 return XEXP (XEXP (y, 0), 0);
3967 }
3968
3969 /* Likewise if the operands are in the other order. */
3970 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3971 {
3972 rtx y
3973 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3974 : lookup_as_function (folded_arg1, MINUS);
3975
3976 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3977 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3978 return XEXP (y, 0);
3979
3980 /* Now try for a CONST of a MINUS like the above. */
3981 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3982 : lookup_as_function (folded_arg1, CONST))) != 0
3983 && GET_CODE (XEXP (y, 0)) == MINUS
3984 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3985 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3986 return XEXP (XEXP (y, 0), 0);
3987 }
3988
3989 /* If second operand is a register equivalent to a negative
3990 CONST_INT, see if we can find a register equivalent to the
3991 positive constant. Make a MINUS if so. Don't do this for
3992 a non-negative constant since we might then alternate between
3993 choosing positive and negative constants. Having the positive
3994 constant previously-used is the more common case. Be sure
3995 the resulting constant is non-negative; if const_arg1 were
3996 the smallest negative number this would overflow: depending
3997 on the mode, this would either just be the same value (and
3998 hence not save anything) or be incorrect. */
3999 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4000 && INTVAL (const_arg1) < 0
4001 /* This used to test
4002
4003 -INTVAL (const_arg1) >= 0
4004
4005 But The Sun V5.0 compilers mis-compiled that test. So
4006 instead we test for the problematic value in a more direct
4007 manner and hope the Sun compilers get it correct. */
4008 && INTVAL (const_arg1) !=
4009 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4010 && REG_P (folded_arg1))
4011 {
4012 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4013 struct table_elt *p
4014 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4015 mode);
4016
4017 if (p)
4018 for (p = p->first_same_value; p; p = p->next_same_value)
4019 if (REG_P (p->exp))
4020 return simplify_gen_binary (MINUS, mode, folded_arg0,
4021 canon_reg (p->exp, NULL_RTX));
4022 }
4023 goto from_plus;
4024
4025 case MINUS:
4026 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4027 If so, produce (PLUS Z C2-C). */
4028 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4029 {
4030 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4031 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4032 return fold_rtx (plus_constant (copy_rtx (y),
4033 -INTVAL (const_arg1)),
4034 NULL_RTX);
4035 }
4036
4037 /* Fall through. */
4038
4039 from_plus:
4040 case SMIN: case SMAX: case UMIN: case UMAX:
4041 case IOR: case AND: case XOR:
4042 case MULT:
4043 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4044 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4045 is known to be of similar form, we may be able to replace the
4046 operation with a combined operation. This may eliminate the
4047 intermediate operation if every use is simplified in this way.
4048 Note that the similar optimization done by combine.c only works
4049 if the intermediate operation's result has only one reference. */
4050
4051 if (REG_P (folded_arg0)
4052 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4053 {
4054 int is_shift
4055 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4056 rtx y = lookup_as_function (folded_arg0, code);
4057 rtx inner_const;
4058 enum rtx_code associate_code;
4059 rtx new_const;
4060
4061 if (y == 0
4062 || 0 == (inner_const
4063 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4064 || GET_CODE (inner_const) != CONST_INT
4065 /* If we have compiled a statement like
4066 "if (x == (x & mask1))", and now are looking at
4067 "x & mask2", we will have a case where the first operand
4068 of Y is the same as our first operand. Unless we detect
4069 this case, an infinite loop will result. */
4070 || XEXP (y, 0) == folded_arg0)
4071 break;
4072
4073 /* Don't associate these operations if they are a PLUS with the
4074 same constant and it is a power of two. These might be doable
4075 with a pre- or post-increment. Similarly for two subtracts of
4076 identical powers of two with post decrement. */
4077
4078 if (code == PLUS && const_arg1 == inner_const
4079 && ((HAVE_PRE_INCREMENT
4080 && exact_log2 (INTVAL (const_arg1)) >= 0)
4081 || (HAVE_POST_INCREMENT
4082 && exact_log2 (INTVAL (const_arg1)) >= 0)
4083 || (HAVE_PRE_DECREMENT
4084 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4085 || (HAVE_POST_DECREMENT
4086 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4087 break;
4088
4089 /* Compute the code used to compose the constants. For example,
4090 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4091
4092 associate_code = (is_shift || code == MINUS ? PLUS : code);
4093
4094 new_const = simplify_binary_operation (associate_code, mode,
4095 const_arg1, inner_const);
4096
4097 if (new_const == 0)
4098 break;
4099
4100 /* If we are associating shift operations, don't let this
4101 produce a shift of the size of the object or larger.
4102 This could occur when we follow a sign-extend by a right
4103 shift on a machine that does a sign-extend as a pair
4104 of shifts. */
4105
4106 if (is_shift && GET_CODE (new_const) == CONST_INT
4107 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4108 {
4109 /* As an exception, we can turn an ASHIFTRT of this
4110 form into a shift of the number of bits - 1. */
4111 if (code == ASHIFTRT)
4112 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4113 else
4114 break;
4115 }
4116
4117 y = copy_rtx (XEXP (y, 0));
4118
4119 /* If Y contains our first operand (the most common way this
4120 can happen is if Y is a MEM), we would do into an infinite
4121 loop if we tried to fold it. So don't in that case. */
4122
4123 if (! reg_mentioned_p (folded_arg0, y))
4124 y = fold_rtx (y, insn);
4125
4126 return simplify_gen_binary (code, mode, y, new_const);
4127 }
4128 break;
4129
4130 case DIV: case UDIV:
4131 /* ??? The associative optimization performed immediately above is
4132 also possible for DIV and UDIV using associate_code of MULT.
4133 However, we would need extra code to verify that the
4134 multiplication does not overflow, that is, there is no overflow
4135 in the calculation of new_const. */
4136 break;
4137
4138 default:
4139 break;
4140 }
4141
4142 new = simplify_binary_operation (code, mode,
4143 const_arg0 ? const_arg0 : folded_arg0,
4144 const_arg1 ? const_arg1 : folded_arg1);
4145 break;
4146
4147 case RTX_OBJ:
4148 /* (lo_sum (high X) X) is simply X. */
4149 if (code == LO_SUM && const_arg0 != 0
4150 && GET_CODE (const_arg0) == HIGH
4151 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4152 return const_arg1;
4153 break;
4154
4155 case RTX_TERNARY:
4156 case RTX_BITFIELD_OPS:
4157 new = simplify_ternary_operation (code, mode, mode_arg0,
4158 const_arg0 ? const_arg0 : folded_arg0,
4159 const_arg1 ? const_arg1 : folded_arg1,
4160 const_arg2 ? const_arg2 : XEXP (x, 2));
4161 break;
4162
4163 default:
4164 break;
4165 }
4166
4167 return new ? new : x;
4168 }
4169 \f
4170 /* Return a constant value currently equivalent to X.
4171 Return 0 if we don't know one. */
4172
4173 static rtx
4174 equiv_constant (rtx x)
4175 {
4176 if (REG_P (x)
4177 && REGNO_QTY_VALID_P (REGNO (x)))
4178 {
4179 int x_q = REG_QTY (REGNO (x));
4180 struct qty_table_elem *x_ent = &qty_table[x_q];
4181
4182 if (x_ent->const_rtx)
4183 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
4184 }
4185
4186 if (x == 0 || CONSTANT_P (x))
4187 return x;
4188
4189 /* If X is a MEM, try to fold it outside the context of any insn to see if
4190 it might be equivalent to a constant. That handles the case where it
4191 is a constant-pool reference. Then try to look it up in the hash table
4192 in case it is something whose value we have seen before. */
4193
4194 if (GET_CODE (x) == MEM)
4195 {
4196 struct table_elt *elt;
4197
4198 x = fold_rtx (x, NULL_RTX);
4199 if (CONSTANT_P (x))
4200 return x;
4201
4202 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4203 if (elt == 0)
4204 return 0;
4205
4206 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4207 if (elt->is_const && CONSTANT_P (elt->exp))
4208 return elt->exp;
4209 }
4210
4211 return 0;
4212 }
4213 \f
4214 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4215 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4216 least-significant part of X.
4217 MODE specifies how big a part of X to return.
4218
4219 If the requested operation cannot be done, 0 is returned.
4220
4221 This is similar to gen_lowpart_general in emit-rtl.c. */
4222
4223 rtx
4224 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4225 {
4226 rtx result = gen_lowpart_common (mode, x);
4227
4228 if (result)
4229 return result;
4230 else if (GET_CODE (x) == MEM)
4231 {
4232 /* This is the only other case we handle. */
4233 int offset = 0;
4234 rtx new;
4235
4236 if (WORDS_BIG_ENDIAN)
4237 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4238 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4239 if (BYTES_BIG_ENDIAN)
4240 /* Adjust the address so that the address-after-the-data is
4241 unchanged. */
4242 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4243 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4244
4245 new = adjust_address_nv (x, mode, offset);
4246 if (! memory_address_p (mode, XEXP (new, 0)))
4247 return 0;
4248
4249 return new;
4250 }
4251 else
4252 return 0;
4253 }
4254 \f
4255 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4256 branch. It will be zero if not.
4257
4258 In certain cases, this can cause us to add an equivalence. For example,
4259 if we are following the taken case of
4260 if (i == 2)
4261 we can add the fact that `i' and '2' are now equivalent.
4262
4263 In any case, we can record that this comparison was passed. If the same
4264 comparison is seen later, we will know its value. */
4265
4266 static void
4267 record_jump_equiv (rtx insn, int taken)
4268 {
4269 int cond_known_true;
4270 rtx op0, op1;
4271 rtx set;
4272 enum machine_mode mode, mode0, mode1;
4273 int reversed_nonequality = 0;
4274 enum rtx_code code;
4275
4276 /* Ensure this is the right kind of insn. */
4277 if (! any_condjump_p (insn))
4278 return;
4279 set = pc_set (insn);
4280
4281 /* See if this jump condition is known true or false. */
4282 if (taken)
4283 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4284 else
4285 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4286
4287 /* Get the type of comparison being done and the operands being compared.
4288 If we had to reverse a non-equality condition, record that fact so we
4289 know that it isn't valid for floating-point. */
4290 code = GET_CODE (XEXP (SET_SRC (set), 0));
4291 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4292 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4293
4294 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4295 if (! cond_known_true)
4296 {
4297 code = reversed_comparison_code_parts (code, op0, op1, insn);
4298
4299 /* Don't remember if we can't find the inverse. */
4300 if (code == UNKNOWN)
4301 return;
4302 }
4303
4304 /* The mode is the mode of the non-constant. */
4305 mode = mode0;
4306 if (mode1 != VOIDmode)
4307 mode = mode1;
4308
4309 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4310 }
4311
4312 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4313 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4314 Make any useful entries we can with that information. Called from
4315 above function and called recursively. */
4316
4317 static void
4318 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4319 rtx op1, int reversed_nonequality)
4320 {
4321 unsigned op0_hash, op1_hash;
4322 int op0_in_memory, op1_in_memory;
4323 struct table_elt *op0_elt, *op1_elt;
4324
4325 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4326 we know that they are also equal in the smaller mode (this is also
4327 true for all smaller modes whether or not there is a SUBREG, but
4328 is not worth testing for with no SUBREG). */
4329
4330 /* Note that GET_MODE (op0) may not equal MODE. */
4331 if (code == EQ && GET_CODE (op0) == SUBREG
4332 && (GET_MODE_SIZE (GET_MODE (op0))
4333 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4334 {
4335 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4336 rtx tem = gen_lowpart (inner_mode, op1);
4337
4338 record_jump_cond (code, mode, SUBREG_REG (op0),
4339 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4340 reversed_nonequality);
4341 }
4342
4343 if (code == EQ && GET_CODE (op1) == SUBREG
4344 && (GET_MODE_SIZE (GET_MODE (op1))
4345 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4346 {
4347 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4348 rtx tem = gen_lowpart (inner_mode, op0);
4349
4350 record_jump_cond (code, mode, SUBREG_REG (op1),
4351 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4352 reversed_nonequality);
4353 }
4354
4355 /* Similarly, if this is an NE comparison, and either is a SUBREG
4356 making a smaller mode, we know the whole thing is also NE. */
4357
4358 /* Note that GET_MODE (op0) may not equal MODE;
4359 if we test MODE instead, we can get an infinite recursion
4360 alternating between two modes each wider than MODE. */
4361
4362 if (code == NE && GET_CODE (op0) == SUBREG
4363 && subreg_lowpart_p (op0)
4364 && (GET_MODE_SIZE (GET_MODE (op0))
4365 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4366 {
4367 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4368 rtx tem = gen_lowpart (inner_mode, op1);
4369
4370 record_jump_cond (code, mode, SUBREG_REG (op0),
4371 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4372 reversed_nonequality);
4373 }
4374
4375 if (code == NE && GET_CODE (op1) == SUBREG
4376 && subreg_lowpart_p (op1)
4377 && (GET_MODE_SIZE (GET_MODE (op1))
4378 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4379 {
4380 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4381 rtx tem = gen_lowpart (inner_mode, op0);
4382
4383 record_jump_cond (code, mode, SUBREG_REG (op1),
4384 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4385 reversed_nonequality);
4386 }
4387
4388 /* Hash both operands. */
4389
4390 do_not_record = 0;
4391 hash_arg_in_memory = 0;
4392 op0_hash = HASH (op0, mode);
4393 op0_in_memory = hash_arg_in_memory;
4394
4395 if (do_not_record)
4396 return;
4397
4398 do_not_record = 0;
4399 hash_arg_in_memory = 0;
4400 op1_hash = HASH (op1, mode);
4401 op1_in_memory = hash_arg_in_memory;
4402
4403 if (do_not_record)
4404 return;
4405
4406 /* Look up both operands. */
4407 op0_elt = lookup (op0, op0_hash, mode);
4408 op1_elt = lookup (op1, op1_hash, mode);
4409
4410 /* If both operands are already equivalent or if they are not in the
4411 table but are identical, do nothing. */
4412 if ((op0_elt != 0 && op1_elt != 0
4413 && op0_elt->first_same_value == op1_elt->first_same_value)
4414 || op0 == op1 || rtx_equal_p (op0, op1))
4415 return;
4416
4417 /* If we aren't setting two things equal all we can do is save this
4418 comparison. Similarly if this is floating-point. In the latter
4419 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4420 If we record the equality, we might inadvertently delete code
4421 whose intent was to change -0 to +0. */
4422
4423 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4424 {
4425 struct qty_table_elem *ent;
4426 int qty;
4427
4428 /* If we reversed a floating-point comparison, if OP0 is not a
4429 register, or if OP1 is neither a register or constant, we can't
4430 do anything. */
4431
4432 if (!REG_P (op1))
4433 op1 = equiv_constant (op1);
4434
4435 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4436 || !REG_P (op0) || op1 == 0)
4437 return;
4438
4439 /* Put OP0 in the hash table if it isn't already. This gives it a
4440 new quantity number. */
4441 if (op0_elt == 0)
4442 {
4443 if (insert_regs (op0, NULL, 0))
4444 {
4445 rehash_using_reg (op0);
4446 op0_hash = HASH (op0, mode);
4447
4448 /* If OP0 is contained in OP1, this changes its hash code
4449 as well. Faster to rehash than to check, except
4450 for the simple case of a constant. */
4451 if (! CONSTANT_P (op1))
4452 op1_hash = HASH (op1,mode);
4453 }
4454
4455 op0_elt = insert (op0, NULL, op0_hash, mode);
4456 op0_elt->in_memory = op0_in_memory;
4457 }
4458
4459 qty = REG_QTY (REGNO (op0));
4460 ent = &qty_table[qty];
4461
4462 ent->comparison_code = code;
4463 if (REG_P (op1))
4464 {
4465 /* Look it up again--in case op0 and op1 are the same. */
4466 op1_elt = lookup (op1, op1_hash, mode);
4467
4468 /* Put OP1 in the hash table so it gets a new quantity number. */
4469 if (op1_elt == 0)
4470 {
4471 if (insert_regs (op1, NULL, 0))
4472 {
4473 rehash_using_reg (op1);
4474 op1_hash = HASH (op1, mode);
4475 }
4476
4477 op1_elt = insert (op1, NULL, op1_hash, mode);
4478 op1_elt->in_memory = op1_in_memory;
4479 }
4480
4481 ent->comparison_const = NULL_RTX;
4482 ent->comparison_qty = REG_QTY (REGNO (op1));
4483 }
4484 else
4485 {
4486 ent->comparison_const = op1;
4487 ent->comparison_qty = -1;
4488 }
4489
4490 return;
4491 }
4492
4493 /* If either side is still missing an equivalence, make it now,
4494 then merge the equivalences. */
4495
4496 if (op0_elt == 0)
4497 {
4498 if (insert_regs (op0, NULL, 0))
4499 {
4500 rehash_using_reg (op0);
4501 op0_hash = HASH (op0, mode);
4502 }
4503
4504 op0_elt = insert (op0, NULL, op0_hash, mode);
4505 op0_elt->in_memory = op0_in_memory;
4506 }
4507
4508 if (op1_elt == 0)
4509 {
4510 if (insert_regs (op1, NULL, 0))
4511 {
4512 rehash_using_reg (op1);
4513 op1_hash = HASH (op1, mode);
4514 }
4515
4516 op1_elt = insert (op1, NULL, op1_hash, mode);
4517 op1_elt->in_memory = op1_in_memory;
4518 }
4519
4520 merge_equiv_classes (op0_elt, op1_elt);
4521 last_jump_equiv_class = op0_elt;
4522 }
4523 \f
4524 /* CSE processing for one instruction.
4525 First simplify sources and addresses of all assignments
4526 in the instruction, using previously-computed equivalents values.
4527 Then install the new sources and destinations in the table
4528 of available values.
4529
4530 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4531 the insn. It means that INSN is inside libcall block. In this
4532 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4533
4534 /* Data on one SET contained in the instruction. */
4535
4536 struct set
4537 {
4538 /* The SET rtx itself. */
4539 rtx rtl;
4540 /* The SET_SRC of the rtx (the original value, if it is changing). */
4541 rtx src;
4542 /* The hash-table element for the SET_SRC of the SET. */
4543 struct table_elt *src_elt;
4544 /* Hash value for the SET_SRC. */
4545 unsigned src_hash;
4546 /* Hash value for the SET_DEST. */
4547 unsigned dest_hash;
4548 /* The SET_DEST, with SUBREG, etc., stripped. */
4549 rtx inner_dest;
4550 /* Nonzero if the SET_SRC is in memory. */
4551 char src_in_memory;
4552 /* Nonzero if the SET_SRC contains something
4553 whose value cannot be predicted and understood. */
4554 char src_volatile;
4555 /* Original machine mode, in case it becomes a CONST_INT.
4556 The size of this field should match the size of the mode
4557 field of struct rtx_def (see rtl.h). */
4558 ENUM_BITFIELD(machine_mode) mode : 8;
4559 /* A constant equivalent for SET_SRC, if any. */
4560 rtx src_const;
4561 /* Original SET_SRC value used for libcall notes. */
4562 rtx orig_src;
4563 /* Hash value of constant equivalent for SET_SRC. */
4564 unsigned src_const_hash;
4565 /* Table entry for constant equivalent for SET_SRC, if any. */
4566 struct table_elt *src_const_elt;
4567 };
4568
4569 static void
4570 cse_insn (rtx insn, rtx libcall_insn)
4571 {
4572 rtx x = PATTERN (insn);
4573 int i;
4574 rtx tem;
4575 int n_sets = 0;
4576
4577 #ifdef HAVE_cc0
4578 /* Records what this insn does to set CC0. */
4579 rtx this_insn_cc0 = 0;
4580 enum machine_mode this_insn_cc0_mode = VOIDmode;
4581 #endif
4582
4583 rtx src_eqv = 0;
4584 struct table_elt *src_eqv_elt = 0;
4585 int src_eqv_volatile = 0;
4586 int src_eqv_in_memory = 0;
4587 unsigned src_eqv_hash = 0;
4588
4589 struct set *sets = (struct set *) 0;
4590
4591 this_insn = insn;
4592
4593 /* Find all the SETs and CLOBBERs in this instruction.
4594 Record all the SETs in the array `set' and count them.
4595 Also determine whether there is a CLOBBER that invalidates
4596 all memory references, or all references at varying addresses. */
4597
4598 if (GET_CODE (insn) == CALL_INSN)
4599 {
4600 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4601 {
4602 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4603 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4604 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4605 }
4606 }
4607
4608 if (GET_CODE (x) == SET)
4609 {
4610 sets = alloca (sizeof (struct set));
4611 sets[0].rtl = x;
4612
4613 /* Ignore SETs that are unconditional jumps.
4614 They never need cse processing, so this does not hurt.
4615 The reason is not efficiency but rather
4616 so that we can test at the end for instructions
4617 that have been simplified to unconditional jumps
4618 and not be misled by unchanged instructions
4619 that were unconditional jumps to begin with. */
4620 if (SET_DEST (x) == pc_rtx
4621 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4622 ;
4623
4624 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4625 The hard function value register is used only once, to copy to
4626 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4627 Ensure we invalidate the destination register. On the 80386 no
4628 other code would invalidate it since it is a fixed_reg.
4629 We need not check the return of apply_change_group; see canon_reg. */
4630
4631 else if (GET_CODE (SET_SRC (x)) == CALL)
4632 {
4633 canon_reg (SET_SRC (x), insn);
4634 apply_change_group ();
4635 fold_rtx (SET_SRC (x), insn);
4636 invalidate (SET_DEST (x), VOIDmode);
4637 }
4638 else
4639 n_sets = 1;
4640 }
4641 else if (GET_CODE (x) == PARALLEL)
4642 {
4643 int lim = XVECLEN (x, 0);
4644
4645 sets = alloca (lim * sizeof (struct set));
4646
4647 /* Find all regs explicitly clobbered in this insn,
4648 and ensure they are not replaced with any other regs
4649 elsewhere in this insn.
4650 When a reg that is clobbered is also used for input,
4651 we should presume that that is for a reason,
4652 and we should not substitute some other register
4653 which is not supposed to be clobbered.
4654 Therefore, this loop cannot be merged into the one below
4655 because a CALL may precede a CLOBBER and refer to the
4656 value clobbered. We must not let a canonicalization do
4657 anything in that case. */
4658 for (i = 0; i < lim; i++)
4659 {
4660 rtx y = XVECEXP (x, 0, i);
4661 if (GET_CODE (y) == CLOBBER)
4662 {
4663 rtx clobbered = XEXP (y, 0);
4664
4665 if (REG_P (clobbered)
4666 || GET_CODE (clobbered) == SUBREG)
4667 invalidate (clobbered, VOIDmode);
4668 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4669 || GET_CODE (clobbered) == ZERO_EXTRACT)
4670 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4671 }
4672 }
4673
4674 for (i = 0; i < lim; i++)
4675 {
4676 rtx y = XVECEXP (x, 0, i);
4677 if (GET_CODE (y) == SET)
4678 {
4679 /* As above, we ignore unconditional jumps and call-insns and
4680 ignore the result of apply_change_group. */
4681 if (GET_CODE (SET_SRC (y)) == CALL)
4682 {
4683 canon_reg (SET_SRC (y), insn);
4684 apply_change_group ();
4685 fold_rtx (SET_SRC (y), insn);
4686 invalidate (SET_DEST (y), VOIDmode);
4687 }
4688 else if (SET_DEST (y) == pc_rtx
4689 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4690 ;
4691 else
4692 sets[n_sets++].rtl = y;
4693 }
4694 else if (GET_CODE (y) == CLOBBER)
4695 {
4696 /* If we clobber memory, canon the address.
4697 This does nothing when a register is clobbered
4698 because we have already invalidated the reg. */
4699 if (GET_CODE (XEXP (y, 0)) == MEM)
4700 canon_reg (XEXP (y, 0), NULL_RTX);
4701 }
4702 else if (GET_CODE (y) == USE
4703 && ! (REG_P (XEXP (y, 0))
4704 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4705 canon_reg (y, NULL_RTX);
4706 else if (GET_CODE (y) == CALL)
4707 {
4708 /* The result of apply_change_group can be ignored; see
4709 canon_reg. */
4710 canon_reg (y, insn);
4711 apply_change_group ();
4712 fold_rtx (y, insn);
4713 }
4714 }
4715 }
4716 else if (GET_CODE (x) == CLOBBER)
4717 {
4718 if (GET_CODE (XEXP (x, 0)) == MEM)
4719 canon_reg (XEXP (x, 0), NULL_RTX);
4720 }
4721
4722 /* Canonicalize a USE of a pseudo register or memory location. */
4723 else if (GET_CODE (x) == USE
4724 && ! (REG_P (XEXP (x, 0))
4725 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4726 canon_reg (XEXP (x, 0), NULL_RTX);
4727 else if (GET_CODE (x) == CALL)
4728 {
4729 /* The result of apply_change_group can be ignored; see canon_reg. */
4730 canon_reg (x, insn);
4731 apply_change_group ();
4732 fold_rtx (x, insn);
4733 }
4734
4735 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4736 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4737 is handled specially for this case, and if it isn't set, then there will
4738 be no equivalence for the destination. */
4739 if (n_sets == 1 && REG_NOTES (insn) != 0
4740 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4741 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4742 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4743 {
4744 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4745 XEXP (tem, 0) = src_eqv;
4746 }
4747
4748 /* Canonicalize sources and addresses of destinations.
4749 We do this in a separate pass to avoid problems when a MATCH_DUP is
4750 present in the insn pattern. In that case, we want to ensure that
4751 we don't break the duplicate nature of the pattern. So we will replace
4752 both operands at the same time. Otherwise, we would fail to find an
4753 equivalent substitution in the loop calling validate_change below.
4754
4755 We used to suppress canonicalization of DEST if it appears in SRC,
4756 but we don't do this any more. */
4757
4758 for (i = 0; i < n_sets; i++)
4759 {
4760 rtx dest = SET_DEST (sets[i].rtl);
4761 rtx src = SET_SRC (sets[i].rtl);
4762 rtx new = canon_reg (src, insn);
4763 int insn_code;
4764
4765 sets[i].orig_src = src;
4766 if ((REG_P (new) && REG_P (src)
4767 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4768 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4769 || (insn_code = recog_memoized (insn)) < 0
4770 || insn_data[insn_code].n_dups > 0)
4771 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4772 else
4773 SET_SRC (sets[i].rtl) = new;
4774
4775 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4776 {
4777 validate_change (insn, &XEXP (dest, 1),
4778 canon_reg (XEXP (dest, 1), insn), 1);
4779 validate_change (insn, &XEXP (dest, 2),
4780 canon_reg (XEXP (dest, 2), insn), 1);
4781 }
4782
4783 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4784 || GET_CODE (dest) == ZERO_EXTRACT
4785 || GET_CODE (dest) == SIGN_EXTRACT)
4786 dest = XEXP (dest, 0);
4787
4788 if (GET_CODE (dest) == MEM)
4789 canon_reg (dest, insn);
4790 }
4791
4792 /* Now that we have done all the replacements, we can apply the change
4793 group and see if they all work. Note that this will cause some
4794 canonicalizations that would have worked individually not to be applied
4795 because some other canonicalization didn't work, but this should not
4796 occur often.
4797
4798 The result of apply_change_group can be ignored; see canon_reg. */
4799
4800 apply_change_group ();
4801
4802 /* Set sets[i].src_elt to the class each source belongs to.
4803 Detect assignments from or to volatile things
4804 and set set[i] to zero so they will be ignored
4805 in the rest of this function.
4806
4807 Nothing in this loop changes the hash table or the register chains. */
4808
4809 for (i = 0; i < n_sets; i++)
4810 {
4811 rtx src, dest;
4812 rtx src_folded;
4813 struct table_elt *elt = 0, *p;
4814 enum machine_mode mode;
4815 rtx src_eqv_here;
4816 rtx src_const = 0;
4817 rtx src_related = 0;
4818 struct table_elt *src_const_elt = 0;
4819 int src_cost = MAX_COST;
4820 int src_eqv_cost = MAX_COST;
4821 int src_folded_cost = MAX_COST;
4822 int src_related_cost = MAX_COST;
4823 int src_elt_cost = MAX_COST;
4824 int src_regcost = MAX_COST;
4825 int src_eqv_regcost = MAX_COST;
4826 int src_folded_regcost = MAX_COST;
4827 int src_related_regcost = MAX_COST;
4828 int src_elt_regcost = MAX_COST;
4829 /* Set nonzero if we need to call force_const_mem on with the
4830 contents of src_folded before using it. */
4831 int src_folded_force_flag = 0;
4832
4833 dest = SET_DEST (sets[i].rtl);
4834 src = SET_SRC (sets[i].rtl);
4835
4836 /* If SRC is a constant that has no machine mode,
4837 hash it with the destination's machine mode.
4838 This way we can keep different modes separate. */
4839
4840 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4841 sets[i].mode = mode;
4842
4843 if (src_eqv)
4844 {
4845 enum machine_mode eqvmode = mode;
4846 if (GET_CODE (dest) == STRICT_LOW_PART)
4847 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4848 do_not_record = 0;
4849 hash_arg_in_memory = 0;
4850 src_eqv_hash = HASH (src_eqv, eqvmode);
4851
4852 /* Find the equivalence class for the equivalent expression. */
4853
4854 if (!do_not_record)
4855 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4856
4857 src_eqv_volatile = do_not_record;
4858 src_eqv_in_memory = hash_arg_in_memory;
4859 }
4860
4861 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4862 value of the INNER register, not the destination. So it is not
4863 a valid substitution for the source. But save it for later. */
4864 if (GET_CODE (dest) == STRICT_LOW_PART)
4865 src_eqv_here = 0;
4866 else
4867 src_eqv_here = src_eqv;
4868
4869 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4870 simplified result, which may not necessarily be valid. */
4871 src_folded = fold_rtx (src, insn);
4872
4873 #if 0
4874 /* ??? This caused bad code to be generated for the m68k port with -O2.
4875 Suppose src is (CONST_INT -1), and that after truncation src_folded
4876 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4877 At the end we will add src and src_const to the same equivalence
4878 class. We now have 3 and -1 on the same equivalence class. This
4879 causes later instructions to be mis-optimized. */
4880 /* If storing a constant in a bitfield, pre-truncate the constant
4881 so we will be able to record it later. */
4882 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4883 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4884 {
4885 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4886
4887 if (GET_CODE (src) == CONST_INT
4888 && GET_CODE (width) == CONST_INT
4889 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4890 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4891 src_folded
4892 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4893 << INTVAL (width)) - 1));
4894 }
4895 #endif
4896
4897 /* Compute SRC's hash code, and also notice if it
4898 should not be recorded at all. In that case,
4899 prevent any further processing of this assignment. */
4900 do_not_record = 0;
4901 hash_arg_in_memory = 0;
4902
4903 sets[i].src = src;
4904 sets[i].src_hash = HASH (src, mode);
4905 sets[i].src_volatile = do_not_record;
4906 sets[i].src_in_memory = hash_arg_in_memory;
4907
4908 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4909 a pseudo, do not record SRC. Using SRC as a replacement for
4910 anything else will be incorrect in that situation. Note that
4911 this usually occurs only for stack slots, in which case all the
4912 RTL would be referring to SRC, so we don't lose any optimization
4913 opportunities by not having SRC in the hash table. */
4914
4915 if (GET_CODE (src) == MEM
4916 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4917 && REG_P (dest)
4918 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4919 sets[i].src_volatile = 1;
4920
4921 #if 0
4922 /* It is no longer clear why we used to do this, but it doesn't
4923 appear to still be needed. So let's try without it since this
4924 code hurts cse'ing widened ops. */
4925 /* If source is a paradoxical subreg (such as QI treated as an SI),
4926 treat it as volatile. It may do the work of an SI in one context
4927 where the extra bits are not being used, but cannot replace an SI
4928 in general. */
4929 if (GET_CODE (src) == SUBREG
4930 && (GET_MODE_SIZE (GET_MODE (src))
4931 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4932 sets[i].src_volatile = 1;
4933 #endif
4934
4935 /* Locate all possible equivalent forms for SRC. Try to replace
4936 SRC in the insn with each cheaper equivalent.
4937
4938 We have the following types of equivalents: SRC itself, a folded
4939 version, a value given in a REG_EQUAL note, or a value related
4940 to a constant.
4941
4942 Each of these equivalents may be part of an additional class
4943 of equivalents (if more than one is in the table, they must be in
4944 the same class; we check for this).
4945
4946 If the source is volatile, we don't do any table lookups.
4947
4948 We note any constant equivalent for possible later use in a
4949 REG_NOTE. */
4950
4951 if (!sets[i].src_volatile)
4952 elt = lookup (src, sets[i].src_hash, mode);
4953
4954 sets[i].src_elt = elt;
4955
4956 if (elt && src_eqv_here && src_eqv_elt)
4957 {
4958 if (elt->first_same_value != src_eqv_elt->first_same_value)
4959 {
4960 /* The REG_EQUAL is indicating that two formerly distinct
4961 classes are now equivalent. So merge them. */
4962 merge_equiv_classes (elt, src_eqv_elt);
4963 src_eqv_hash = HASH (src_eqv, elt->mode);
4964 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4965 }
4966
4967 src_eqv_here = 0;
4968 }
4969
4970 else if (src_eqv_elt)
4971 elt = src_eqv_elt;
4972
4973 /* Try to find a constant somewhere and record it in `src_const'.
4974 Record its table element, if any, in `src_const_elt'. Look in
4975 any known equivalences first. (If the constant is not in the
4976 table, also set `sets[i].src_const_hash'). */
4977 if (elt)
4978 for (p = elt->first_same_value; p; p = p->next_same_value)
4979 if (p->is_const)
4980 {
4981 src_const = p->exp;
4982 src_const_elt = elt;
4983 break;
4984 }
4985
4986 if (src_const == 0
4987 && (CONSTANT_P (src_folded)
4988 /* Consider (minus (label_ref L1) (label_ref L2)) as
4989 "constant" here so we will record it. This allows us
4990 to fold switch statements when an ADDR_DIFF_VEC is used. */
4991 || (GET_CODE (src_folded) == MINUS
4992 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4993 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4994 src_const = src_folded, src_const_elt = elt;
4995 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4996 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4997
4998 /* If we don't know if the constant is in the table, get its
4999 hash code and look it up. */
5000 if (src_const && src_const_elt == 0)
5001 {
5002 sets[i].src_const_hash = HASH (src_const, mode);
5003 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5004 }
5005
5006 sets[i].src_const = src_const;
5007 sets[i].src_const_elt = src_const_elt;
5008
5009 /* If the constant and our source are both in the table, mark them as
5010 equivalent. Otherwise, if a constant is in the table but the source
5011 isn't, set ELT to it. */
5012 if (src_const_elt && elt
5013 && src_const_elt->first_same_value != elt->first_same_value)
5014 merge_equiv_classes (elt, src_const_elt);
5015 else if (src_const_elt && elt == 0)
5016 elt = src_const_elt;
5017
5018 /* See if there is a register linearly related to a constant
5019 equivalent of SRC. */
5020 if (src_const
5021 && (GET_CODE (src_const) == CONST
5022 || (src_const_elt && src_const_elt->related_value != 0)))
5023 {
5024 src_related = use_related_value (src_const, src_const_elt);
5025 if (src_related)
5026 {
5027 struct table_elt *src_related_elt
5028 = lookup (src_related, HASH (src_related, mode), mode);
5029 if (src_related_elt && elt)
5030 {
5031 if (elt->first_same_value
5032 != src_related_elt->first_same_value)
5033 /* This can occur when we previously saw a CONST
5034 involving a SYMBOL_REF and then see the SYMBOL_REF
5035 twice. Merge the involved classes. */
5036 merge_equiv_classes (elt, src_related_elt);
5037
5038 src_related = 0;
5039 src_related_elt = 0;
5040 }
5041 else if (src_related_elt && elt == 0)
5042 elt = src_related_elt;
5043 }
5044 }
5045
5046 /* See if we have a CONST_INT that is already in a register in a
5047 wider mode. */
5048
5049 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5050 && GET_MODE_CLASS (mode) == MODE_INT
5051 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5052 {
5053 enum machine_mode wider_mode;
5054
5055 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5056 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5057 && src_related == 0;
5058 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5059 {
5060 struct table_elt *const_elt
5061 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5062
5063 if (const_elt == 0)
5064 continue;
5065
5066 for (const_elt = const_elt->first_same_value;
5067 const_elt; const_elt = const_elt->next_same_value)
5068 if (REG_P (const_elt->exp))
5069 {
5070 src_related = gen_lowpart (mode,
5071 const_elt->exp);
5072 break;
5073 }
5074 }
5075 }
5076
5077 /* Another possibility is that we have an AND with a constant in
5078 a mode narrower than a word. If so, it might have been generated
5079 as part of an "if" which would narrow the AND. If we already
5080 have done the AND in a wider mode, we can use a SUBREG of that
5081 value. */
5082
5083 if (flag_expensive_optimizations && ! src_related
5084 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5085 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5086 {
5087 enum machine_mode tmode;
5088 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5089
5090 for (tmode = GET_MODE_WIDER_MODE (mode);
5091 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5092 tmode = GET_MODE_WIDER_MODE (tmode))
5093 {
5094 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
5095 struct table_elt *larger_elt;
5096
5097 if (inner)
5098 {
5099 PUT_MODE (new_and, tmode);
5100 XEXP (new_and, 0) = inner;
5101 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5102 if (larger_elt == 0)
5103 continue;
5104
5105 for (larger_elt = larger_elt->first_same_value;
5106 larger_elt; larger_elt = larger_elt->next_same_value)
5107 if (REG_P (larger_elt->exp))
5108 {
5109 src_related
5110 = gen_lowpart (mode, larger_elt->exp);
5111 break;
5112 }
5113
5114 if (src_related)
5115 break;
5116 }
5117 }
5118 }
5119
5120 #ifdef LOAD_EXTEND_OP
5121 /* See if a MEM has already been loaded with a widening operation;
5122 if it has, we can use a subreg of that. Many CISC machines
5123 also have such operations, but this is only likely to be
5124 beneficial on these machines. */
5125
5126 if (flag_expensive_optimizations && src_related == 0
5127 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5128 && GET_MODE_CLASS (mode) == MODE_INT
5129 && GET_CODE (src) == MEM && ! do_not_record
5130 && LOAD_EXTEND_OP (mode) != NIL)
5131 {
5132 enum machine_mode tmode;
5133
5134 /* Set what we are trying to extend and the operation it might
5135 have been extended with. */
5136 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5137 XEXP (memory_extend_rtx, 0) = src;
5138
5139 for (tmode = GET_MODE_WIDER_MODE (mode);
5140 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5141 tmode = GET_MODE_WIDER_MODE (tmode))
5142 {
5143 struct table_elt *larger_elt;
5144
5145 PUT_MODE (memory_extend_rtx, tmode);
5146 larger_elt = lookup (memory_extend_rtx,
5147 HASH (memory_extend_rtx, tmode), tmode);
5148 if (larger_elt == 0)
5149 continue;
5150
5151 for (larger_elt = larger_elt->first_same_value;
5152 larger_elt; larger_elt = larger_elt->next_same_value)
5153 if (REG_P (larger_elt->exp))
5154 {
5155 src_related = gen_lowpart (mode,
5156 larger_elt->exp);
5157 break;
5158 }
5159
5160 if (src_related)
5161 break;
5162 }
5163 }
5164 #endif /* LOAD_EXTEND_OP */
5165
5166 if (src == src_folded)
5167 src_folded = 0;
5168
5169 /* At this point, ELT, if nonzero, points to a class of expressions
5170 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5171 and SRC_RELATED, if nonzero, each contain additional equivalent
5172 expressions. Prune these latter expressions by deleting expressions
5173 already in the equivalence class.
5174
5175 Check for an equivalent identical to the destination. If found,
5176 this is the preferred equivalent since it will likely lead to
5177 elimination of the insn. Indicate this by placing it in
5178 `src_related'. */
5179
5180 if (elt)
5181 elt = elt->first_same_value;
5182 for (p = elt; p; p = p->next_same_value)
5183 {
5184 enum rtx_code code = GET_CODE (p->exp);
5185
5186 /* If the expression is not valid, ignore it. Then we do not
5187 have to check for validity below. In most cases, we can use
5188 `rtx_equal_p', since canonicalization has already been done. */
5189 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5190 continue;
5191
5192 /* Also skip paradoxical subregs, unless that's what we're
5193 looking for. */
5194 if (code == SUBREG
5195 && (GET_MODE_SIZE (GET_MODE (p->exp))
5196 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5197 && ! (src != 0
5198 && GET_CODE (src) == SUBREG
5199 && GET_MODE (src) == GET_MODE (p->exp)
5200 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5201 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5202 continue;
5203
5204 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5205 src = 0;
5206 else if (src_folded && GET_CODE (src_folded) == code
5207 && rtx_equal_p (src_folded, p->exp))
5208 src_folded = 0;
5209 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5210 && rtx_equal_p (src_eqv_here, p->exp))
5211 src_eqv_here = 0;
5212 else if (src_related && GET_CODE (src_related) == code
5213 && rtx_equal_p (src_related, p->exp))
5214 src_related = 0;
5215
5216 /* This is the same as the destination of the insns, we want
5217 to prefer it. Copy it to src_related. The code below will
5218 then give it a negative cost. */
5219 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5220 src_related = dest;
5221 }
5222
5223 /* Find the cheapest valid equivalent, trying all the available
5224 possibilities. Prefer items not in the hash table to ones
5225 that are when they are equal cost. Note that we can never
5226 worsen an insn as the current contents will also succeed.
5227 If we find an equivalent identical to the destination, use it as best,
5228 since this insn will probably be eliminated in that case. */
5229 if (src)
5230 {
5231 if (rtx_equal_p (src, dest))
5232 src_cost = src_regcost = -1;
5233 else
5234 {
5235 src_cost = COST (src);
5236 src_regcost = approx_reg_cost (src);
5237 }
5238 }
5239
5240 if (src_eqv_here)
5241 {
5242 if (rtx_equal_p (src_eqv_here, dest))
5243 src_eqv_cost = src_eqv_regcost = -1;
5244 else
5245 {
5246 src_eqv_cost = COST (src_eqv_here);
5247 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5248 }
5249 }
5250
5251 if (src_folded)
5252 {
5253 if (rtx_equal_p (src_folded, dest))
5254 src_folded_cost = src_folded_regcost = -1;
5255 else
5256 {
5257 src_folded_cost = COST (src_folded);
5258 src_folded_regcost = approx_reg_cost (src_folded);
5259 }
5260 }
5261
5262 if (src_related)
5263 {
5264 if (rtx_equal_p (src_related, dest))
5265 src_related_cost = src_related_regcost = -1;
5266 else
5267 {
5268 src_related_cost = COST (src_related);
5269 src_related_regcost = approx_reg_cost (src_related);
5270 }
5271 }
5272
5273 /* If this was an indirect jump insn, a known label will really be
5274 cheaper even though it looks more expensive. */
5275 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5276 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5277
5278 /* Terminate loop when replacement made. This must terminate since
5279 the current contents will be tested and will always be valid. */
5280 while (1)
5281 {
5282 rtx trial;
5283
5284 /* Skip invalid entries. */
5285 while (elt && !REG_P (elt->exp)
5286 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5287 elt = elt->next_same_value;
5288
5289 /* A paradoxical subreg would be bad here: it'll be the right
5290 size, but later may be adjusted so that the upper bits aren't
5291 what we want. So reject it. */
5292 if (elt != 0
5293 && GET_CODE (elt->exp) == SUBREG
5294 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5295 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5296 /* It is okay, though, if the rtx we're trying to match
5297 will ignore any of the bits we can't predict. */
5298 && ! (src != 0
5299 && GET_CODE (src) == SUBREG
5300 && GET_MODE (src) == GET_MODE (elt->exp)
5301 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5302 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5303 {
5304 elt = elt->next_same_value;
5305 continue;
5306 }
5307
5308 if (elt)
5309 {
5310 src_elt_cost = elt->cost;
5311 src_elt_regcost = elt->regcost;
5312 }
5313
5314 /* Find cheapest and skip it for the next time. For items
5315 of equal cost, use this order:
5316 src_folded, src, src_eqv, src_related and hash table entry. */
5317 if (src_folded
5318 && preferable (src_folded_cost, src_folded_regcost,
5319 src_cost, src_regcost) <= 0
5320 && preferable (src_folded_cost, src_folded_regcost,
5321 src_eqv_cost, src_eqv_regcost) <= 0
5322 && preferable (src_folded_cost, src_folded_regcost,
5323 src_related_cost, src_related_regcost) <= 0
5324 && preferable (src_folded_cost, src_folded_regcost,
5325 src_elt_cost, src_elt_regcost) <= 0)
5326 {
5327 trial = src_folded, src_folded_cost = MAX_COST;
5328 if (src_folded_force_flag)
5329 {
5330 rtx forced = force_const_mem (mode, trial);
5331 if (forced)
5332 trial = forced;
5333 }
5334 }
5335 else if (src
5336 && preferable (src_cost, src_regcost,
5337 src_eqv_cost, src_eqv_regcost) <= 0
5338 && preferable (src_cost, src_regcost,
5339 src_related_cost, src_related_regcost) <= 0
5340 && preferable (src_cost, src_regcost,
5341 src_elt_cost, src_elt_regcost) <= 0)
5342 trial = src, src_cost = MAX_COST;
5343 else if (src_eqv_here
5344 && preferable (src_eqv_cost, src_eqv_regcost,
5345 src_related_cost, src_related_regcost) <= 0
5346 && preferable (src_eqv_cost, src_eqv_regcost,
5347 src_elt_cost, src_elt_regcost) <= 0)
5348 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5349 else if (src_related
5350 && preferable (src_related_cost, src_related_regcost,
5351 src_elt_cost, src_elt_regcost) <= 0)
5352 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5353 else
5354 {
5355 trial = copy_rtx (elt->exp);
5356 elt = elt->next_same_value;
5357 src_elt_cost = MAX_COST;
5358 }
5359
5360 /* We don't normally have an insn matching (set (pc) (pc)), so
5361 check for this separately here. We will delete such an
5362 insn below.
5363
5364 For other cases such as a table jump or conditional jump
5365 where we know the ultimate target, go ahead and replace the
5366 operand. While that may not make a valid insn, we will
5367 reemit the jump below (and also insert any necessary
5368 barriers). */
5369 if (n_sets == 1 && dest == pc_rtx
5370 && (trial == pc_rtx
5371 || (GET_CODE (trial) == LABEL_REF
5372 && ! condjump_p (insn))))
5373 {
5374 SET_SRC (sets[i].rtl) = trial;
5375 cse_jumps_altered = 1;
5376 break;
5377 }
5378
5379 /* Look for a substitution that makes a valid insn. */
5380 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5381 {
5382 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5383
5384 /* If we just made a substitution inside a libcall, then we
5385 need to make the same substitution in any notes attached
5386 to the RETVAL insn. */
5387 if (libcall_insn
5388 && (REG_P (sets[i].orig_src)
5389 || GET_CODE (sets[i].orig_src) == SUBREG
5390 || GET_CODE (sets[i].orig_src) == MEM))
5391 {
5392 rtx note = find_reg_equal_equiv_note (libcall_insn);
5393 if (note != 0)
5394 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
5395 sets[i].orig_src,
5396 copy_rtx (new));
5397 }
5398
5399 /* The result of apply_change_group can be ignored; see
5400 canon_reg. */
5401
5402 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5403 apply_change_group ();
5404 break;
5405 }
5406
5407 /* If we previously found constant pool entries for
5408 constants and this is a constant, try making a
5409 pool entry. Put it in src_folded unless we already have done
5410 this since that is where it likely came from. */
5411
5412 else if (constant_pool_entries_cost
5413 && CONSTANT_P (trial)
5414 /* Reject cases that will abort in decode_rtx_const.
5415 On the alpha when simplifying a switch, we get
5416 (const (truncate (minus (label_ref) (label_ref)))). */
5417 && ! (GET_CODE (trial) == CONST
5418 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5419 /* Likewise on IA-64, except without the truncate. */
5420 && ! (GET_CODE (trial) == CONST
5421 && GET_CODE (XEXP (trial, 0)) == MINUS
5422 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5423 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5424 && (src_folded == 0
5425 || (GET_CODE (src_folded) != MEM
5426 && ! src_folded_force_flag))
5427 && GET_MODE_CLASS (mode) != MODE_CC
5428 && mode != VOIDmode)
5429 {
5430 src_folded_force_flag = 1;
5431 src_folded = trial;
5432 src_folded_cost = constant_pool_entries_cost;
5433 src_folded_regcost = constant_pool_entries_regcost;
5434 }
5435 }
5436
5437 src = SET_SRC (sets[i].rtl);
5438
5439 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5440 However, there is an important exception: If both are registers
5441 that are not the head of their equivalence class, replace SET_SRC
5442 with the head of the class. If we do not do this, we will have
5443 both registers live over a portion of the basic block. This way,
5444 their lifetimes will likely abut instead of overlapping. */
5445 if (REG_P (dest)
5446 && REGNO_QTY_VALID_P (REGNO (dest)))
5447 {
5448 int dest_q = REG_QTY (REGNO (dest));
5449 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5450
5451 if (dest_ent->mode == GET_MODE (dest)
5452 && dest_ent->first_reg != REGNO (dest)
5453 && REG_P (src) && REGNO (src) == REGNO (dest)
5454 /* Don't do this if the original insn had a hard reg as
5455 SET_SRC or SET_DEST. */
5456 && (!REG_P (sets[i].src)
5457 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5458 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5459 /* We can't call canon_reg here because it won't do anything if
5460 SRC is a hard register. */
5461 {
5462 int src_q = REG_QTY (REGNO (src));
5463 struct qty_table_elem *src_ent = &qty_table[src_q];
5464 int first = src_ent->first_reg;
5465 rtx new_src
5466 = (first >= FIRST_PSEUDO_REGISTER
5467 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5468
5469 /* We must use validate-change even for this, because this
5470 might be a special no-op instruction, suitable only to
5471 tag notes onto. */
5472 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5473 {
5474 src = new_src;
5475 /* If we had a constant that is cheaper than what we are now
5476 setting SRC to, use that constant. We ignored it when we
5477 thought we could make this into a no-op. */
5478 if (src_const && COST (src_const) < COST (src)
5479 && validate_change (insn, &SET_SRC (sets[i].rtl),
5480 src_const, 0))
5481 src = src_const;
5482 }
5483 }
5484 }
5485
5486 /* If we made a change, recompute SRC values. */
5487 if (src != sets[i].src)
5488 {
5489 cse_altered = 1;
5490 do_not_record = 0;
5491 hash_arg_in_memory = 0;
5492 sets[i].src = src;
5493 sets[i].src_hash = HASH (src, mode);
5494 sets[i].src_volatile = do_not_record;
5495 sets[i].src_in_memory = hash_arg_in_memory;
5496 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5497 }
5498
5499 /* If this is a single SET, we are setting a register, and we have an
5500 equivalent constant, we want to add a REG_NOTE. We don't want
5501 to write a REG_EQUAL note for a constant pseudo since verifying that
5502 that pseudo hasn't been eliminated is a pain. Such a note also
5503 won't help anything.
5504
5505 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5506 which can be created for a reference to a compile time computable
5507 entry in a jump table. */
5508
5509 if (n_sets == 1 && src_const && REG_P (dest)
5510 && !REG_P (src_const)
5511 && ! (GET_CODE (src_const) == CONST
5512 && GET_CODE (XEXP (src_const, 0)) == MINUS
5513 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5514 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5515 {
5516 /* We only want a REG_EQUAL note if src_const != src. */
5517 if (! rtx_equal_p (src, src_const))
5518 {
5519 /* Make sure that the rtx is not shared. */
5520 src_const = copy_rtx (src_const);
5521
5522 /* Record the actual constant value in a REG_EQUAL note,
5523 making a new one if one does not already exist. */
5524 set_unique_reg_note (insn, REG_EQUAL, src_const);
5525 }
5526 }
5527
5528 /* Now deal with the destination. */
5529 do_not_record = 0;
5530
5531 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5532 to the MEM or REG within it. */
5533 while (GET_CODE (dest) == SIGN_EXTRACT
5534 || GET_CODE (dest) == ZERO_EXTRACT
5535 || GET_CODE (dest) == SUBREG
5536 || GET_CODE (dest) == STRICT_LOW_PART)
5537 dest = XEXP (dest, 0);
5538
5539 sets[i].inner_dest = dest;
5540
5541 if (GET_CODE (dest) == MEM)
5542 {
5543 #ifdef PUSH_ROUNDING
5544 /* Stack pushes invalidate the stack pointer. */
5545 rtx addr = XEXP (dest, 0);
5546 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5547 && XEXP (addr, 0) == stack_pointer_rtx)
5548 invalidate (stack_pointer_rtx, Pmode);
5549 #endif
5550 dest = fold_rtx (dest, insn);
5551 }
5552
5553 /* Compute the hash code of the destination now,
5554 before the effects of this instruction are recorded,
5555 since the register values used in the address computation
5556 are those before this instruction. */
5557 sets[i].dest_hash = HASH (dest, mode);
5558
5559 /* Don't enter a bit-field in the hash table
5560 because the value in it after the store
5561 may not equal what was stored, due to truncation. */
5562
5563 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5564 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5565 {
5566 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5567
5568 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5569 && GET_CODE (width) == CONST_INT
5570 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5571 && ! (INTVAL (src_const)
5572 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5573 /* Exception: if the value is constant,
5574 and it won't be truncated, record it. */
5575 ;
5576 else
5577 {
5578 /* This is chosen so that the destination will be invalidated
5579 but no new value will be recorded.
5580 We must invalidate because sometimes constant
5581 values can be recorded for bitfields. */
5582 sets[i].src_elt = 0;
5583 sets[i].src_volatile = 1;
5584 src_eqv = 0;
5585 src_eqv_elt = 0;
5586 }
5587 }
5588
5589 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5590 the insn. */
5591 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5592 {
5593 /* One less use of the label this insn used to jump to. */
5594 delete_insn (insn);
5595 cse_jumps_altered = 1;
5596 /* No more processing for this set. */
5597 sets[i].rtl = 0;
5598 }
5599
5600 /* If this SET is now setting PC to a label, we know it used to
5601 be a conditional or computed branch. */
5602 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5603 {
5604 /* Now emit a BARRIER after the unconditional jump. */
5605 if (NEXT_INSN (insn) == 0
5606 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5607 emit_barrier_after (insn);
5608
5609 /* We reemit the jump in as many cases as possible just in
5610 case the form of an unconditional jump is significantly
5611 different than a computed jump or conditional jump.
5612
5613 If this insn has multiple sets, then reemitting the
5614 jump is nontrivial. So instead we just force rerecognition
5615 and hope for the best. */
5616 if (n_sets == 1)
5617 {
5618 rtx new, note;
5619
5620 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5621 JUMP_LABEL (new) = XEXP (src, 0);
5622 LABEL_NUSES (XEXP (src, 0))++;
5623
5624 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5625 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5626 if (note)
5627 {
5628 XEXP (note, 1) = NULL_RTX;
5629 REG_NOTES (new) = note;
5630 }
5631
5632 delete_insn (insn);
5633 insn = new;
5634
5635 /* Now emit a BARRIER after the unconditional jump. */
5636 if (NEXT_INSN (insn) == 0
5637 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5638 emit_barrier_after (insn);
5639 }
5640 else
5641 INSN_CODE (insn) = -1;
5642
5643 /* Do not bother deleting any unreachable code,
5644 let jump/flow do that. */
5645
5646 cse_jumps_altered = 1;
5647 sets[i].rtl = 0;
5648 }
5649
5650 /* If destination is volatile, invalidate it and then do no further
5651 processing for this assignment. */
5652
5653 else if (do_not_record)
5654 {
5655 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5656 invalidate (dest, VOIDmode);
5657 else if (GET_CODE (dest) == MEM)
5658 {
5659 /* Outgoing arguments for a libcall don't
5660 affect any recorded expressions. */
5661 if (! libcall_insn || insn == libcall_insn)
5662 invalidate (dest, VOIDmode);
5663 }
5664 else if (GET_CODE (dest) == STRICT_LOW_PART
5665 || GET_CODE (dest) == ZERO_EXTRACT)
5666 invalidate (XEXP (dest, 0), GET_MODE (dest));
5667 sets[i].rtl = 0;
5668 }
5669
5670 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5671 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5672
5673 #ifdef HAVE_cc0
5674 /* If setting CC0, record what it was set to, or a constant, if it
5675 is equivalent to a constant. If it is being set to a floating-point
5676 value, make a COMPARE with the appropriate constant of 0. If we
5677 don't do this, later code can interpret this as a test against
5678 const0_rtx, which can cause problems if we try to put it into an
5679 insn as a floating-point operand. */
5680 if (dest == cc0_rtx)
5681 {
5682 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5683 this_insn_cc0_mode = mode;
5684 if (FLOAT_MODE_P (mode))
5685 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5686 CONST0_RTX (mode));
5687 }
5688 #endif
5689 }
5690
5691 /* Now enter all non-volatile source expressions in the hash table
5692 if they are not already present.
5693 Record their equivalence classes in src_elt.
5694 This way we can insert the corresponding destinations into
5695 the same classes even if the actual sources are no longer in them
5696 (having been invalidated). */
5697
5698 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5699 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5700 {
5701 struct table_elt *elt;
5702 struct table_elt *classp = sets[0].src_elt;
5703 rtx dest = SET_DEST (sets[0].rtl);
5704 enum machine_mode eqvmode = GET_MODE (dest);
5705
5706 if (GET_CODE (dest) == STRICT_LOW_PART)
5707 {
5708 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5709 classp = 0;
5710 }
5711 if (insert_regs (src_eqv, classp, 0))
5712 {
5713 rehash_using_reg (src_eqv);
5714 src_eqv_hash = HASH (src_eqv, eqvmode);
5715 }
5716 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5717 elt->in_memory = src_eqv_in_memory;
5718 src_eqv_elt = elt;
5719
5720 /* Check to see if src_eqv_elt is the same as a set source which
5721 does not yet have an elt, and if so set the elt of the set source
5722 to src_eqv_elt. */
5723 for (i = 0; i < n_sets; i++)
5724 if (sets[i].rtl && sets[i].src_elt == 0
5725 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5726 sets[i].src_elt = src_eqv_elt;
5727 }
5728
5729 for (i = 0; i < n_sets; i++)
5730 if (sets[i].rtl && ! sets[i].src_volatile
5731 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5732 {
5733 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5734 {
5735 /* REG_EQUAL in setting a STRICT_LOW_PART
5736 gives an equivalent for the entire destination register,
5737 not just for the subreg being stored in now.
5738 This is a more interesting equivalence, so we arrange later
5739 to treat the entire reg as the destination. */
5740 sets[i].src_elt = src_eqv_elt;
5741 sets[i].src_hash = src_eqv_hash;
5742 }
5743 else
5744 {
5745 /* Insert source and constant equivalent into hash table, if not
5746 already present. */
5747 struct table_elt *classp = src_eqv_elt;
5748 rtx src = sets[i].src;
5749 rtx dest = SET_DEST (sets[i].rtl);
5750 enum machine_mode mode
5751 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5752
5753 /* It's possible that we have a source value known to be
5754 constant but don't have a REG_EQUAL note on the insn.
5755 Lack of a note will mean src_eqv_elt will be NULL. This
5756 can happen where we've generated a SUBREG to access a
5757 CONST_INT that is already in a register in a wider mode.
5758 Ensure that the source expression is put in the proper
5759 constant class. */
5760 if (!classp)
5761 classp = sets[i].src_const_elt;
5762
5763 if (sets[i].src_elt == 0)
5764 {
5765 /* Don't put a hard register source into the table if this is
5766 the last insn of a libcall. In this case, we only need
5767 to put src_eqv_elt in src_elt. */
5768 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5769 {
5770 struct table_elt *elt;
5771
5772 /* Note that these insert_regs calls cannot remove
5773 any of the src_elt's, because they would have failed to
5774 match if not still valid. */
5775 if (insert_regs (src, classp, 0))
5776 {
5777 rehash_using_reg (src);
5778 sets[i].src_hash = HASH (src, mode);
5779 }
5780 elt = insert (src, classp, sets[i].src_hash, mode);
5781 elt->in_memory = sets[i].src_in_memory;
5782 sets[i].src_elt = classp = elt;
5783 }
5784 else
5785 sets[i].src_elt = classp;
5786 }
5787 if (sets[i].src_const && sets[i].src_const_elt == 0
5788 && src != sets[i].src_const
5789 && ! rtx_equal_p (sets[i].src_const, src))
5790 sets[i].src_elt = insert (sets[i].src_const, classp,
5791 sets[i].src_const_hash, mode);
5792 }
5793 }
5794 else if (sets[i].src_elt == 0)
5795 /* If we did not insert the source into the hash table (e.g., it was
5796 volatile), note the equivalence class for the REG_EQUAL value, if any,
5797 so that the destination goes into that class. */
5798 sets[i].src_elt = src_eqv_elt;
5799
5800 invalidate_from_clobbers (x);
5801
5802 /* Some registers are invalidated by subroutine calls. Memory is
5803 invalidated by non-constant calls. */
5804
5805 if (GET_CODE (insn) == CALL_INSN)
5806 {
5807 if (! CONST_OR_PURE_CALL_P (insn))
5808 invalidate_memory ();
5809 invalidate_for_call ();
5810 }
5811
5812 /* Now invalidate everything set by this instruction.
5813 If a SUBREG or other funny destination is being set,
5814 sets[i].rtl is still nonzero, so here we invalidate the reg
5815 a part of which is being set. */
5816
5817 for (i = 0; i < n_sets; i++)
5818 if (sets[i].rtl)
5819 {
5820 /* We can't use the inner dest, because the mode associated with
5821 a ZERO_EXTRACT is significant. */
5822 rtx dest = SET_DEST (sets[i].rtl);
5823
5824 /* Needed for registers to remove the register from its
5825 previous quantity's chain.
5826 Needed for memory if this is a nonvarying address, unless
5827 we have just done an invalidate_memory that covers even those. */
5828 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5829 invalidate (dest, VOIDmode);
5830 else if (GET_CODE (dest) == MEM)
5831 {
5832 /* Outgoing arguments for a libcall don't
5833 affect any recorded expressions. */
5834 if (! libcall_insn || insn == libcall_insn)
5835 invalidate (dest, VOIDmode);
5836 }
5837 else if (GET_CODE (dest) == STRICT_LOW_PART
5838 || GET_CODE (dest) == ZERO_EXTRACT)
5839 invalidate (XEXP (dest, 0), GET_MODE (dest));
5840 }
5841
5842 /* A volatile ASM invalidates everything. */
5843 if (GET_CODE (insn) == INSN
5844 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5845 && MEM_VOLATILE_P (PATTERN (insn)))
5846 flush_hash_table ();
5847
5848 /* Make sure registers mentioned in destinations
5849 are safe for use in an expression to be inserted.
5850 This removes from the hash table
5851 any invalid entry that refers to one of these registers.
5852
5853 We don't care about the return value from mention_regs because
5854 we are going to hash the SET_DEST values unconditionally. */
5855
5856 for (i = 0; i < n_sets; i++)
5857 {
5858 if (sets[i].rtl)
5859 {
5860 rtx x = SET_DEST (sets[i].rtl);
5861
5862 if (!REG_P (x))
5863 mention_regs (x);
5864 else
5865 {
5866 /* We used to rely on all references to a register becoming
5867 inaccessible when a register changes to a new quantity,
5868 since that changes the hash code. However, that is not
5869 safe, since after HASH_SIZE new quantities we get a
5870 hash 'collision' of a register with its own invalid
5871 entries. And since SUBREGs have been changed not to
5872 change their hash code with the hash code of the register,
5873 it wouldn't work any longer at all. So we have to check
5874 for any invalid references lying around now.
5875 This code is similar to the REG case in mention_regs,
5876 but it knows that reg_tick has been incremented, and
5877 it leaves reg_in_table as -1 . */
5878 unsigned int regno = REGNO (x);
5879 unsigned int endregno
5880 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5881 : hard_regno_nregs[regno][GET_MODE (x)]);
5882 unsigned int i;
5883
5884 for (i = regno; i < endregno; i++)
5885 {
5886 if (REG_IN_TABLE (i) >= 0)
5887 {
5888 remove_invalid_refs (i);
5889 REG_IN_TABLE (i) = -1;
5890 }
5891 }
5892 }
5893 }
5894 }
5895
5896 /* We may have just removed some of the src_elt's from the hash table.
5897 So replace each one with the current head of the same class. */
5898
5899 for (i = 0; i < n_sets; i++)
5900 if (sets[i].rtl)
5901 {
5902 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5903 /* If elt was removed, find current head of same class,
5904 or 0 if nothing remains of that class. */
5905 {
5906 struct table_elt *elt = sets[i].src_elt;
5907
5908 while (elt && elt->prev_same_value)
5909 elt = elt->prev_same_value;
5910
5911 while (elt && elt->first_same_value == 0)
5912 elt = elt->next_same_value;
5913 sets[i].src_elt = elt ? elt->first_same_value : 0;
5914 }
5915 }
5916
5917 /* Now insert the destinations into their equivalence classes. */
5918
5919 for (i = 0; i < n_sets; i++)
5920 if (sets[i].rtl)
5921 {
5922 rtx dest = SET_DEST (sets[i].rtl);
5923 rtx inner_dest = sets[i].inner_dest;
5924 struct table_elt *elt;
5925
5926 /* Don't record value if we are not supposed to risk allocating
5927 floating-point values in registers that might be wider than
5928 memory. */
5929 if ((flag_float_store
5930 && GET_CODE (dest) == MEM
5931 && FLOAT_MODE_P (GET_MODE (dest)))
5932 /* Don't record BLKmode values, because we don't know the
5933 size of it, and can't be sure that other BLKmode values
5934 have the same or smaller size. */
5935 || GET_MODE (dest) == BLKmode
5936 /* Don't record values of destinations set inside a libcall block
5937 since we might delete the libcall. Things should have been set
5938 up so we won't want to reuse such a value, but we play it safe
5939 here. */
5940 || libcall_insn
5941 /* If we didn't put a REG_EQUAL value or a source into the hash
5942 table, there is no point is recording DEST. */
5943 || sets[i].src_elt == 0
5944 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5945 or SIGN_EXTEND, don't record DEST since it can cause
5946 some tracking to be wrong.
5947
5948 ??? Think about this more later. */
5949 || (GET_CODE (dest) == SUBREG
5950 && (GET_MODE_SIZE (GET_MODE (dest))
5951 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5952 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5953 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5954 continue;
5955
5956 /* STRICT_LOW_PART isn't part of the value BEING set,
5957 and neither is the SUBREG inside it.
5958 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5959 if (GET_CODE (dest) == STRICT_LOW_PART)
5960 dest = SUBREG_REG (XEXP (dest, 0));
5961
5962 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5963 /* Registers must also be inserted into chains for quantities. */
5964 if (insert_regs (dest, sets[i].src_elt, 1))
5965 {
5966 /* If `insert_regs' changes something, the hash code must be
5967 recalculated. */
5968 rehash_using_reg (dest);
5969 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5970 }
5971
5972 if (GET_CODE (inner_dest) == MEM
5973 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5974 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5975 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5976 Consider the case in which the address of the MEM is
5977 passed to a function, which alters the MEM. Then, if we
5978 later use Y instead of the MEM we'll miss the update. */
5979 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5980 else
5981 elt = insert (dest, sets[i].src_elt,
5982 sets[i].dest_hash, GET_MODE (dest));
5983
5984 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5985 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5986 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
5987 0))));
5988
5989 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5990 narrower than M2, and both M1 and M2 are the same number of words,
5991 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5992 make that equivalence as well.
5993
5994 However, BAR may have equivalences for which gen_lowpart
5995 will produce a simpler value than gen_lowpart applied to
5996 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5997 BAR's equivalences. If we don't get a simplified form, make
5998 the SUBREG. It will not be used in an equivalence, but will
5999 cause two similar assignments to be detected.
6000
6001 Note the loop below will find SUBREG_REG (DEST) since we have
6002 already entered SRC and DEST of the SET in the table. */
6003
6004 if (GET_CODE (dest) == SUBREG
6005 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6006 / UNITS_PER_WORD)
6007 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6008 && (GET_MODE_SIZE (GET_MODE (dest))
6009 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6010 && sets[i].src_elt != 0)
6011 {
6012 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6013 struct table_elt *elt, *classp = 0;
6014
6015 for (elt = sets[i].src_elt->first_same_value; elt;
6016 elt = elt->next_same_value)
6017 {
6018 rtx new_src = 0;
6019 unsigned src_hash;
6020 struct table_elt *src_elt;
6021 int byte = 0;
6022
6023 /* Ignore invalid entries. */
6024 if (!REG_P (elt->exp)
6025 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6026 continue;
6027
6028 /* We may have already been playing subreg games. If the
6029 mode is already correct for the destination, use it. */
6030 if (GET_MODE (elt->exp) == new_mode)
6031 new_src = elt->exp;
6032 else
6033 {
6034 /* Calculate big endian correction for the SUBREG_BYTE.
6035 We have already checked that M1 (GET_MODE (dest))
6036 is not narrower than M2 (new_mode). */
6037 if (BYTES_BIG_ENDIAN)
6038 byte = (GET_MODE_SIZE (GET_MODE (dest))
6039 - GET_MODE_SIZE (new_mode));
6040
6041 new_src = simplify_gen_subreg (new_mode, elt->exp,
6042 GET_MODE (dest), byte);
6043 }
6044
6045 /* The call to simplify_gen_subreg fails if the value
6046 is VOIDmode, yet we can't do any simplification, e.g.
6047 for EXPR_LISTs denoting function call results.
6048 It is invalid to construct a SUBREG with a VOIDmode
6049 SUBREG_REG, hence a zero new_src means we can't do
6050 this substitution. */
6051 if (! new_src)
6052 continue;
6053
6054 src_hash = HASH (new_src, new_mode);
6055 src_elt = lookup (new_src, src_hash, new_mode);
6056
6057 /* Put the new source in the hash table is if isn't
6058 already. */
6059 if (src_elt == 0)
6060 {
6061 if (insert_regs (new_src, classp, 0))
6062 {
6063 rehash_using_reg (new_src);
6064 src_hash = HASH (new_src, new_mode);
6065 }
6066 src_elt = insert (new_src, classp, src_hash, new_mode);
6067 src_elt->in_memory = elt->in_memory;
6068 }
6069 else if (classp && classp != src_elt->first_same_value)
6070 /* Show that two things that we've seen before are
6071 actually the same. */
6072 merge_equiv_classes (src_elt, classp);
6073
6074 classp = src_elt->first_same_value;
6075 /* Ignore invalid entries. */
6076 while (classp
6077 && !REG_P (classp->exp)
6078 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6079 classp = classp->next_same_value;
6080 }
6081 }
6082 }
6083
6084 /* Special handling for (set REG0 REG1) where REG0 is the
6085 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6086 be used in the sequel, so (if easily done) change this insn to
6087 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6088 that computed their value. Then REG1 will become a dead store
6089 and won't cloud the situation for later optimizations.
6090
6091 Do not make this change if REG1 is a hard register, because it will
6092 then be used in the sequel and we may be changing a two-operand insn
6093 into a three-operand insn.
6094
6095 Also do not do this if we are operating on a copy of INSN.
6096
6097 Also don't do this if INSN ends a libcall; this would cause an unrelated
6098 register to be set in the middle of a libcall, and we then get bad code
6099 if the libcall is deleted. */
6100
6101 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
6102 && NEXT_INSN (PREV_INSN (insn)) == insn
6103 && REG_P (SET_SRC (sets[0].rtl))
6104 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6105 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6106 {
6107 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6108 struct qty_table_elem *src_ent = &qty_table[src_q];
6109
6110 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6111 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6112 {
6113 rtx prev = insn;
6114 /* Scan for the previous nonnote insn, but stop at a basic
6115 block boundary. */
6116 do
6117 {
6118 prev = PREV_INSN (prev);
6119 }
6120 while (prev && GET_CODE (prev) == NOTE
6121 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6122
6123 /* Do not swap the registers around if the previous instruction
6124 attaches a REG_EQUIV note to REG1.
6125
6126 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6127 from the pseudo that originally shadowed an incoming argument
6128 to another register. Some uses of REG_EQUIV might rely on it
6129 being attached to REG1 rather than REG2.
6130
6131 This section previously turned the REG_EQUIV into a REG_EQUAL
6132 note. We cannot do that because REG_EQUIV may provide an
6133 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6134
6135 if (prev != 0 && GET_CODE (prev) == INSN
6136 && GET_CODE (PATTERN (prev)) == SET
6137 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6138 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6139 {
6140 rtx dest = SET_DEST (sets[0].rtl);
6141 rtx src = SET_SRC (sets[0].rtl);
6142 rtx note;
6143
6144 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6145 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6146 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6147 apply_change_group ();
6148
6149 /* If INSN has a REG_EQUAL note, and this note mentions
6150 REG0, then we must delete it, because the value in
6151 REG0 has changed. If the note's value is REG1, we must
6152 also delete it because that is now this insn's dest. */
6153 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6154 if (note != 0
6155 && (reg_mentioned_p (dest, XEXP (note, 0))
6156 || rtx_equal_p (src, XEXP (note, 0))))
6157 remove_note (insn, note);
6158 }
6159 }
6160 }
6161
6162 /* If this is a conditional jump insn, record any known equivalences due to
6163 the condition being tested. */
6164
6165 last_jump_equiv_class = 0;
6166 if (GET_CODE (insn) == JUMP_INSN
6167 && n_sets == 1 && GET_CODE (x) == SET
6168 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6169 record_jump_equiv (insn, 0);
6170
6171 #ifdef HAVE_cc0
6172 /* If the previous insn set CC0 and this insn no longer references CC0,
6173 delete the previous insn. Here we use the fact that nothing expects CC0
6174 to be valid over an insn, which is true until the final pass. */
6175 if (prev_insn && GET_CODE (prev_insn) == INSN
6176 && (tem = single_set (prev_insn)) != 0
6177 && SET_DEST (tem) == cc0_rtx
6178 && ! reg_mentioned_p (cc0_rtx, x))
6179 delete_insn (prev_insn);
6180
6181 prev_insn_cc0 = this_insn_cc0;
6182 prev_insn_cc0_mode = this_insn_cc0_mode;
6183 prev_insn = insn;
6184 #endif
6185 }
6186 \f
6187 /* Remove from the hash table all expressions that reference memory. */
6188
6189 static void
6190 invalidate_memory (void)
6191 {
6192 int i;
6193 struct table_elt *p, *next;
6194
6195 for (i = 0; i < HASH_SIZE; i++)
6196 for (p = table[i]; p; p = next)
6197 {
6198 next = p->next_same_hash;
6199 if (p->in_memory)
6200 remove_from_table (p, i);
6201 }
6202 }
6203
6204 /* If ADDR is an address that implicitly affects the stack pointer, return
6205 1 and update the register tables to show the effect. Else, return 0. */
6206
6207 static int
6208 addr_affects_sp_p (rtx addr)
6209 {
6210 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
6211 && REG_P (XEXP (addr, 0))
6212 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6213 {
6214 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6215 {
6216 REG_TICK (STACK_POINTER_REGNUM)++;
6217 /* Is it possible to use a subreg of SP? */
6218 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6219 }
6220
6221 /* This should be *very* rare. */
6222 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6223 invalidate (stack_pointer_rtx, VOIDmode);
6224
6225 return 1;
6226 }
6227
6228 return 0;
6229 }
6230
6231 /* Perform invalidation on the basis of everything about an insn
6232 except for invalidating the actual places that are SET in it.
6233 This includes the places CLOBBERed, and anything that might
6234 alias with something that is SET or CLOBBERed.
6235
6236 X is the pattern of the insn. */
6237
6238 static void
6239 invalidate_from_clobbers (rtx x)
6240 {
6241 if (GET_CODE (x) == CLOBBER)
6242 {
6243 rtx ref = XEXP (x, 0);
6244 if (ref)
6245 {
6246 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6247 || GET_CODE (ref) == MEM)
6248 invalidate (ref, VOIDmode);
6249 else if (GET_CODE (ref) == STRICT_LOW_PART
6250 || GET_CODE (ref) == ZERO_EXTRACT)
6251 invalidate (XEXP (ref, 0), GET_MODE (ref));
6252 }
6253 }
6254 else if (GET_CODE (x) == PARALLEL)
6255 {
6256 int i;
6257 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6258 {
6259 rtx y = XVECEXP (x, 0, i);
6260 if (GET_CODE (y) == CLOBBER)
6261 {
6262 rtx ref = XEXP (y, 0);
6263 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6264 || GET_CODE (ref) == MEM)
6265 invalidate (ref, VOIDmode);
6266 else if (GET_CODE (ref) == STRICT_LOW_PART
6267 || GET_CODE (ref) == ZERO_EXTRACT)
6268 invalidate (XEXP (ref, 0), GET_MODE (ref));
6269 }
6270 }
6271 }
6272 }
6273 \f
6274 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6275 and replace any registers in them with either an equivalent constant
6276 or the canonical form of the register. If we are inside an address,
6277 only do this if the address remains valid.
6278
6279 OBJECT is 0 except when within a MEM in which case it is the MEM.
6280
6281 Return the replacement for X. */
6282
6283 static rtx
6284 cse_process_notes (rtx x, rtx object)
6285 {
6286 enum rtx_code code = GET_CODE (x);
6287 const char *fmt = GET_RTX_FORMAT (code);
6288 int i;
6289
6290 switch (code)
6291 {
6292 case CONST_INT:
6293 case CONST:
6294 case SYMBOL_REF:
6295 case LABEL_REF:
6296 case CONST_DOUBLE:
6297 case CONST_VECTOR:
6298 case PC:
6299 case CC0:
6300 case LO_SUM:
6301 return x;
6302
6303 case MEM:
6304 validate_change (x, &XEXP (x, 0),
6305 cse_process_notes (XEXP (x, 0), x), 0);
6306 return x;
6307
6308 case EXPR_LIST:
6309 case INSN_LIST:
6310 if (REG_NOTE_KIND (x) == REG_EQUAL)
6311 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6312 if (XEXP (x, 1))
6313 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6314 return x;
6315
6316 case SIGN_EXTEND:
6317 case ZERO_EXTEND:
6318 case SUBREG:
6319 {
6320 rtx new = cse_process_notes (XEXP (x, 0), object);
6321 /* We don't substitute VOIDmode constants into these rtx,
6322 since they would impede folding. */
6323 if (GET_MODE (new) != VOIDmode)
6324 validate_change (object, &XEXP (x, 0), new, 0);
6325 return x;
6326 }
6327
6328 case REG:
6329 i = REG_QTY (REGNO (x));
6330
6331 /* Return a constant or a constant register. */
6332 if (REGNO_QTY_VALID_P (REGNO (x)))
6333 {
6334 struct qty_table_elem *ent = &qty_table[i];
6335
6336 if (ent->const_rtx != NULL_RTX
6337 && (CONSTANT_P (ent->const_rtx)
6338 || REG_P (ent->const_rtx)))
6339 {
6340 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
6341 if (new)
6342 return new;
6343 }
6344 }
6345
6346 /* Otherwise, canonicalize this register. */
6347 return canon_reg (x, NULL_RTX);
6348
6349 default:
6350 break;
6351 }
6352
6353 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6354 if (fmt[i] == 'e')
6355 validate_change (object, &XEXP (x, i),
6356 cse_process_notes (XEXP (x, i), object), 0);
6357
6358 return x;
6359 }
6360 \f
6361 /* Find common subexpressions between the end test of a loop and the beginning
6362 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6363
6364 Often we have a loop where an expression in the exit test is used
6365 in the body of the loop. For example "while (*p) *q++ = *p++;".
6366 Because of the way we duplicate the loop exit test in front of the loop,
6367 however, we don't detect that common subexpression. This will be caught
6368 when global cse is implemented, but this is a quite common case.
6369
6370 This function handles the most common cases of these common expressions.
6371 It is called after we have processed the basic block ending with the
6372 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6373 jumps to a label used only once. */
6374
6375 static void
6376 cse_around_loop (rtx loop_start)
6377 {
6378 rtx insn;
6379 int i;
6380 struct table_elt *p;
6381
6382 /* If the jump at the end of the loop doesn't go to the start, we don't
6383 do anything. */
6384 for (insn = PREV_INSN (loop_start);
6385 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6386 insn = PREV_INSN (insn))
6387 ;
6388
6389 if (insn == 0
6390 || GET_CODE (insn) != NOTE
6391 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6392 return;
6393
6394 /* If the last insn of the loop (the end test) was an NE comparison,
6395 we will interpret it as an EQ comparison, since we fell through
6396 the loop. Any equivalences resulting from that comparison are
6397 therefore not valid and must be invalidated. */
6398 if (last_jump_equiv_class)
6399 for (p = last_jump_equiv_class->first_same_value; p;
6400 p = p->next_same_value)
6401 {
6402 if (MEM_P (p->exp) || REG_P (p->exp)
6403 || (GET_CODE (p->exp) == SUBREG
6404 && REG_P (SUBREG_REG (p->exp))))
6405 invalidate (p->exp, VOIDmode);
6406 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6407 || GET_CODE (p->exp) == ZERO_EXTRACT)
6408 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6409 }
6410
6411 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6412 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6413
6414 The only thing we do with SET_DEST is invalidate entries, so we
6415 can safely process each SET in order. It is slightly less efficient
6416 to do so, but we only want to handle the most common cases.
6417
6418 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6419 These pseudos won't have valid entries in any of the tables indexed
6420 by register number, such as reg_qty. We avoid out-of-range array
6421 accesses by not processing any instructions created after cse started. */
6422
6423 for (insn = NEXT_INSN (loop_start);
6424 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6425 && INSN_UID (insn) < max_insn_uid
6426 && ! (GET_CODE (insn) == NOTE
6427 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6428 insn = NEXT_INSN (insn))
6429 {
6430 if (INSN_P (insn)
6431 && (GET_CODE (PATTERN (insn)) == SET
6432 || GET_CODE (PATTERN (insn)) == CLOBBER))
6433 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6434 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6435 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6436 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6437 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6438 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6439 loop_start);
6440 }
6441 }
6442 \f
6443 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6444 since they are done elsewhere. This function is called via note_stores. */
6445
6446 static void
6447 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6448 {
6449 enum rtx_code code = GET_CODE (dest);
6450
6451 if (code == MEM
6452 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6453 /* There are times when an address can appear varying and be a PLUS
6454 during this scan when it would be a fixed address were we to know
6455 the proper equivalences. So invalidate all memory if there is
6456 a BLKmode or nonscalar memory reference or a reference to a
6457 variable address. */
6458 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6459 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6460 {
6461 invalidate_memory ();
6462 return;
6463 }
6464
6465 if (GET_CODE (set) == CLOBBER
6466 || CC0_P (dest)
6467 || dest == pc_rtx)
6468 return;
6469
6470 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6471 invalidate (XEXP (dest, 0), GET_MODE (dest));
6472 else if (code == REG || code == SUBREG || code == MEM)
6473 invalidate (dest, VOIDmode);
6474 }
6475
6476 /* Invalidate all insns from START up to the end of the function or the
6477 next label. This called when we wish to CSE around a block that is
6478 conditionally executed. */
6479
6480 static void
6481 invalidate_skipped_block (rtx start)
6482 {
6483 rtx insn;
6484
6485 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6486 insn = NEXT_INSN (insn))
6487 {
6488 if (! INSN_P (insn))
6489 continue;
6490
6491 if (GET_CODE (insn) == CALL_INSN)
6492 {
6493 if (! CONST_OR_PURE_CALL_P (insn))
6494 invalidate_memory ();
6495 invalidate_for_call ();
6496 }
6497
6498 invalidate_from_clobbers (PATTERN (insn));
6499 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6500 }
6501 }
6502 \f
6503 /* If modifying X will modify the value in *DATA (which is really an
6504 `rtx *'), indicate that fact by setting the pointed to value to
6505 NULL_RTX. */
6506
6507 static void
6508 cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
6509 {
6510 rtx *cse_check_loop_start_value = (rtx *) data;
6511
6512 if (*cse_check_loop_start_value == NULL_RTX
6513 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6514 return;
6515
6516 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6517 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6518 *cse_check_loop_start_value = NULL_RTX;
6519 }
6520
6521 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6522 a loop that starts with the label at LOOP_START.
6523
6524 If X is a SET, we see if its SET_SRC is currently in our hash table.
6525 If so, we see if it has a value equal to some register used only in the
6526 loop exit code (as marked by jump.c).
6527
6528 If those two conditions are true, we search backwards from the start of
6529 the loop to see if that same value was loaded into a register that still
6530 retains its value at the start of the loop.
6531
6532 If so, we insert an insn after the load to copy the destination of that
6533 load into the equivalent register and (try to) replace our SET_SRC with that
6534 register.
6535
6536 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6537
6538 static void
6539 cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
6540 {
6541 struct table_elt *src_elt;
6542
6543 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6544 are setting PC or CC0 or whose SET_SRC is already a register. */
6545 if (GET_CODE (x) == SET
6546 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6547 && !REG_P (SET_SRC (x)))
6548 {
6549 src_elt = lookup (SET_SRC (x),
6550 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6551 GET_MODE (SET_DEST (x)));
6552
6553 if (src_elt)
6554 for (src_elt = src_elt->first_same_value; src_elt;
6555 src_elt = src_elt->next_same_value)
6556 if (REG_P (src_elt->exp) && REG_LOOP_TEST_P (src_elt->exp)
6557 && COST (src_elt->exp) < COST (SET_SRC (x)))
6558 {
6559 rtx p, set;
6560
6561 /* Look for an insn in front of LOOP_START that sets
6562 something in the desired mode to SET_SRC (x) before we hit
6563 a label or CALL_INSN. */
6564
6565 for (p = prev_nonnote_insn (loop_start);
6566 p && GET_CODE (p) != CALL_INSN
6567 && GET_CODE (p) != CODE_LABEL;
6568 p = prev_nonnote_insn (p))
6569 if ((set = single_set (p)) != 0
6570 && REG_P (SET_DEST (set))
6571 && GET_MODE (SET_DEST (set)) == src_elt->mode
6572 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6573 {
6574 /* We now have to ensure that nothing between P
6575 and LOOP_START modified anything referenced in
6576 SET_SRC (x). We know that nothing within the loop
6577 can modify it, or we would have invalidated it in
6578 the hash table. */
6579 rtx q;
6580 rtx cse_check_loop_start_value = SET_SRC (x);
6581 for (q = p; q != loop_start; q = NEXT_INSN (q))
6582 if (INSN_P (q))
6583 note_stores (PATTERN (q),
6584 cse_check_loop_start,
6585 &cse_check_loop_start_value);
6586
6587 /* If nothing was changed and we can replace our
6588 SET_SRC, add an insn after P to copy its destination
6589 to what we will be replacing SET_SRC with. */
6590 if (cse_check_loop_start_value
6591 && single_set (p)
6592 && !can_throw_internal (insn)
6593 && validate_change (insn, &SET_SRC (x),
6594 src_elt->exp, 0))
6595 {
6596 /* If this creates new pseudos, this is unsafe,
6597 because the regno of new pseudo is unsuitable
6598 to index into reg_qty when cse_insn processes
6599 the new insn. Therefore, if a new pseudo was
6600 created, discard this optimization. */
6601 int nregs = max_reg_num ();
6602 rtx move
6603 = gen_move_insn (src_elt->exp, SET_DEST (set));
6604 if (nregs != max_reg_num ())
6605 {
6606 if (! validate_change (insn, &SET_SRC (x),
6607 SET_SRC (set), 0))
6608 abort ();
6609 }
6610 else
6611 {
6612 if (CONSTANT_P (SET_SRC (set))
6613 && ! find_reg_equal_equiv_note (insn))
6614 set_unique_reg_note (insn, REG_EQUAL,
6615 SET_SRC (set));
6616 if (control_flow_insn_p (p))
6617 /* p can cause a control flow transfer so it
6618 is the last insn of a basic block. We can't
6619 therefore use emit_insn_after. */
6620 emit_insn_before (move, next_nonnote_insn (p));
6621 else
6622 emit_insn_after (move, p);
6623 }
6624 }
6625 break;
6626 }
6627 }
6628 }
6629
6630 /* Deal with the destination of X affecting the stack pointer. */
6631 addr_affects_sp_p (SET_DEST (x));
6632
6633 /* See comment on similar code in cse_insn for explanation of these
6634 tests. */
6635 if (REG_P (SET_DEST (x)) || GET_CODE (SET_DEST (x)) == SUBREG
6636 || GET_CODE (SET_DEST (x)) == MEM)
6637 invalidate (SET_DEST (x), VOIDmode);
6638 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6639 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6640 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6641 }
6642 \f
6643 /* Find the end of INSN's basic block and return its range,
6644 the total number of SETs in all the insns of the block, the last insn of the
6645 block, and the branch path.
6646
6647 The branch path indicates which branches should be followed. If a nonzero
6648 path size is specified, the block should be rescanned and a different set
6649 of branches will be taken. The branch path is only used if
6650 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6651
6652 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6653 used to describe the block. It is filled in with the information about
6654 the current block. The incoming structure's branch path, if any, is used
6655 to construct the output branch path. */
6656
6657 static void
6658 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6659 int follow_jumps, int after_loop, int skip_blocks)
6660 {
6661 rtx p = insn, q;
6662 int nsets = 0;
6663 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6664 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6665 int path_size = data->path_size;
6666 int path_entry = 0;
6667 int i;
6668
6669 /* Update the previous branch path, if any. If the last branch was
6670 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6671 If it was previously PATH_NOT_TAKEN,
6672 shorten the path by one and look at the previous branch. We know that
6673 at least one branch must have been taken if PATH_SIZE is nonzero. */
6674 while (path_size > 0)
6675 {
6676 if (data->path[path_size - 1].status != PATH_NOT_TAKEN)
6677 {
6678 data->path[path_size - 1].status = PATH_NOT_TAKEN;
6679 break;
6680 }
6681 else
6682 path_size--;
6683 }
6684
6685 /* If the first instruction is marked with QImode, that means we've
6686 already processed this block. Our caller will look at DATA->LAST
6687 to figure out where to go next. We want to return the next block
6688 in the instruction stream, not some branched-to block somewhere
6689 else. We accomplish this by pretending our called forbid us to
6690 follow jumps, or skip blocks. */
6691 if (GET_MODE (insn) == QImode)
6692 follow_jumps = skip_blocks = 0;
6693
6694 /* Scan to end of this basic block. */
6695 while (p && GET_CODE (p) != CODE_LABEL)
6696 {
6697 /* Don't cse out the end of a loop. This makes a difference
6698 only for the unusual loops that always execute at least once;
6699 all other loops have labels there so we will stop in any case.
6700 Cse'ing out the end of the loop is dangerous because it
6701 might cause an invariant expression inside the loop
6702 to be reused after the end of the loop. This would make it
6703 hard to move the expression out of the loop in loop.c,
6704 especially if it is one of several equivalent expressions
6705 and loop.c would like to eliminate it.
6706
6707 If we are running after loop.c has finished, we can ignore
6708 the NOTE_INSN_LOOP_END. */
6709
6710 if (! after_loop && GET_CODE (p) == NOTE
6711 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6712 break;
6713
6714 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6715 the regs restored by the longjmp come from
6716 a later time than the setjmp. */
6717 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6718 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6719 break;
6720
6721 /* A PARALLEL can have lots of SETs in it,
6722 especially if it is really an ASM_OPERANDS. */
6723 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6724 nsets += XVECLEN (PATTERN (p), 0);
6725 else if (GET_CODE (p) != NOTE)
6726 nsets += 1;
6727
6728 /* Ignore insns made by CSE; they cannot affect the boundaries of
6729 the basic block. */
6730
6731 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6732 high_cuid = INSN_CUID (p);
6733 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6734 low_cuid = INSN_CUID (p);
6735
6736 /* See if this insn is in our branch path. If it is and we are to
6737 take it, do so. */
6738 if (path_entry < path_size && data->path[path_entry].branch == p)
6739 {
6740 if (data->path[path_entry].status != PATH_NOT_TAKEN)
6741 p = JUMP_LABEL (p);
6742
6743 /* Point to next entry in path, if any. */
6744 path_entry++;
6745 }
6746
6747 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6748 was specified, we haven't reached our maximum path length, there are
6749 insns following the target of the jump, this is the only use of the
6750 jump label, and the target label is preceded by a BARRIER.
6751
6752 Alternatively, we can follow the jump if it branches around a
6753 block of code and there are no other branches into the block.
6754 In this case invalidate_skipped_block will be called to invalidate any
6755 registers set in the block when following the jump. */
6756
6757 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6758 && GET_CODE (p) == JUMP_INSN
6759 && GET_CODE (PATTERN (p)) == SET
6760 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6761 && JUMP_LABEL (p) != 0
6762 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6763 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6764 {
6765 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6766 if ((GET_CODE (q) != NOTE
6767 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6768 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6769 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6770 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6771 break;
6772
6773 /* If we ran into a BARRIER, this code is an extension of the
6774 basic block when the branch is taken. */
6775 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6776 {
6777 /* Don't allow ourself to keep walking around an
6778 always-executed loop. */
6779 if (next_real_insn (q) == next)
6780 {
6781 p = NEXT_INSN (p);
6782 continue;
6783 }
6784
6785 /* Similarly, don't put a branch in our path more than once. */
6786 for (i = 0; i < path_entry; i++)
6787 if (data->path[i].branch == p)
6788 break;
6789
6790 if (i != path_entry)
6791 break;
6792
6793 data->path[path_entry].branch = p;
6794 data->path[path_entry++].status = PATH_TAKEN;
6795
6796 /* This branch now ends our path. It was possible that we
6797 didn't see this branch the last time around (when the
6798 insn in front of the target was a JUMP_INSN that was
6799 turned into a no-op). */
6800 path_size = path_entry;
6801
6802 p = JUMP_LABEL (p);
6803 /* Mark block so we won't scan it again later. */
6804 PUT_MODE (NEXT_INSN (p), QImode);
6805 }
6806 /* Detect a branch around a block of code. */
6807 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6808 {
6809 rtx tmp;
6810
6811 if (next_real_insn (q) == next)
6812 {
6813 p = NEXT_INSN (p);
6814 continue;
6815 }
6816
6817 for (i = 0; i < path_entry; i++)
6818 if (data->path[i].branch == p)
6819 break;
6820
6821 if (i != path_entry)
6822 break;
6823
6824 /* This is no_labels_between_p (p, q) with an added check for
6825 reaching the end of a function (in case Q precedes P). */
6826 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6827 if (GET_CODE (tmp) == CODE_LABEL)
6828 break;
6829
6830 if (tmp == q)
6831 {
6832 data->path[path_entry].branch = p;
6833 data->path[path_entry++].status = PATH_AROUND;
6834
6835 path_size = path_entry;
6836
6837 p = JUMP_LABEL (p);
6838 /* Mark block so we won't scan it again later. */
6839 PUT_MODE (NEXT_INSN (p), QImode);
6840 }
6841 }
6842 }
6843 p = NEXT_INSN (p);
6844 }
6845
6846 data->low_cuid = low_cuid;
6847 data->high_cuid = high_cuid;
6848 data->nsets = nsets;
6849 data->last = p;
6850
6851 /* If all jumps in the path are not taken, set our path length to zero
6852 so a rescan won't be done. */
6853 for (i = path_size - 1; i >= 0; i--)
6854 if (data->path[i].status != PATH_NOT_TAKEN)
6855 break;
6856
6857 if (i == -1)
6858 data->path_size = 0;
6859 else
6860 data->path_size = path_size;
6861
6862 /* End the current branch path. */
6863 data->path[path_size].branch = 0;
6864 }
6865 \f
6866 /* Perform cse on the instructions of a function.
6867 F is the first instruction.
6868 NREGS is one plus the highest pseudo-reg number used in the instruction.
6869
6870 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6871 (only if -frerun-cse-after-loop).
6872
6873 Returns 1 if jump_optimize should be redone due to simplifications
6874 in conditional jump instructions. */
6875
6876 int
6877 cse_main (rtx f, int nregs, int after_loop, FILE *file)
6878 {
6879 struct cse_basic_block_data val;
6880 rtx insn = f;
6881 int i;
6882
6883 val.path = xmalloc (sizeof (struct branch_path)
6884 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6885
6886 cse_jumps_altered = 0;
6887 recorded_label_ref = 0;
6888 constant_pool_entries_cost = 0;
6889 constant_pool_entries_regcost = 0;
6890 val.path_size = 0;
6891 rtl_hooks = cse_rtl_hooks;
6892
6893 init_recog ();
6894 init_alias_analysis ();
6895
6896 max_reg = nregs;
6897
6898 max_insn_uid = get_max_uid ();
6899
6900 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6901
6902 #ifdef LOAD_EXTEND_OP
6903
6904 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6905 and change the code and mode as appropriate. */
6906 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6907 #endif
6908
6909 /* Reset the counter indicating how many elements have been made
6910 thus far. */
6911 n_elements_made = 0;
6912
6913 /* Find the largest uid. */
6914
6915 max_uid = get_max_uid ();
6916 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6917
6918 /* Compute the mapping from uids to cuids.
6919 CUIDs are numbers assigned to insns, like uids,
6920 except that cuids increase monotonically through the code.
6921 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6922 between two insns is not affected by -g. */
6923
6924 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6925 {
6926 if (GET_CODE (insn) != NOTE
6927 || NOTE_LINE_NUMBER (insn) < 0)
6928 INSN_CUID (insn) = ++i;
6929 else
6930 /* Give a line number note the same cuid as preceding insn. */
6931 INSN_CUID (insn) = i;
6932 }
6933
6934 ggc_push_context ();
6935
6936 /* Loop over basic blocks.
6937 Compute the maximum number of qty's needed for each basic block
6938 (which is 2 for each SET). */
6939 insn = f;
6940 while (insn)
6941 {
6942 cse_altered = 0;
6943 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6944 flag_cse_skip_blocks);
6945
6946 /* If this basic block was already processed or has no sets, skip it. */
6947 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6948 {
6949 PUT_MODE (insn, VOIDmode);
6950 insn = (val.last ? NEXT_INSN (val.last) : 0);
6951 val.path_size = 0;
6952 continue;
6953 }
6954
6955 cse_basic_block_start = val.low_cuid;
6956 cse_basic_block_end = val.high_cuid;
6957 max_qty = val.nsets * 2;
6958
6959 if (file)
6960 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6961 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6962 val.nsets);
6963
6964 /* Make MAX_QTY bigger to give us room to optimize
6965 past the end of this basic block, if that should prove useful. */
6966 if (max_qty < 500)
6967 max_qty = 500;
6968
6969 max_qty += max_reg;
6970
6971 /* If this basic block is being extended by following certain jumps,
6972 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6973 Otherwise, we start after this basic block. */
6974 if (val.path_size > 0)
6975 cse_basic_block (insn, val.last, val.path, 0);
6976 else
6977 {
6978 int old_cse_jumps_altered = cse_jumps_altered;
6979 rtx temp;
6980
6981 /* When cse changes a conditional jump to an unconditional
6982 jump, we want to reprocess the block, since it will give
6983 us a new branch path to investigate. */
6984 cse_jumps_altered = 0;
6985 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6986 if (cse_jumps_altered == 0
6987 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6988 insn = temp;
6989
6990 cse_jumps_altered |= old_cse_jumps_altered;
6991 }
6992
6993 if (cse_altered)
6994 ggc_collect ();
6995
6996 #ifdef USE_C_ALLOCA
6997 alloca (0);
6998 #endif
6999 }
7000
7001 ggc_pop_context ();
7002
7003 if (max_elements_made < n_elements_made)
7004 max_elements_made = n_elements_made;
7005
7006 /* Clean up. */
7007 end_alias_analysis ();
7008 free (uid_cuid);
7009 free (reg_eqv_table);
7010 free (val.path);
7011 rtl_hooks = general_rtl_hooks;
7012
7013 return cse_jumps_altered || recorded_label_ref;
7014 }
7015
7016 /* Process a single basic block. FROM and TO and the limits of the basic
7017 block. NEXT_BRANCH points to the branch path when following jumps or
7018 a null path when not following jumps.
7019
7020 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7021 loop. This is true when we are being called for the last time on a
7022 block and this CSE pass is before loop.c. */
7023
7024 static rtx
7025 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7026 int around_loop)
7027 {
7028 rtx insn;
7029 int to_usage = 0;
7030 rtx libcall_insn = NULL_RTX;
7031 int num_insns = 0;
7032 int no_conflict = 0;
7033
7034 /* This array is undefined before max_reg, so only allocate
7035 the space actually needed and adjust the start. */
7036
7037 qty_table = xmalloc ((max_qty - max_reg) * sizeof (struct qty_table_elem));
7038 qty_table -= max_reg;
7039
7040 new_basic_block ();
7041
7042 /* TO might be a label. If so, protect it from being deleted. */
7043 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7044 ++LABEL_NUSES (to);
7045
7046 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7047 {
7048 enum rtx_code code = GET_CODE (insn);
7049
7050 /* If we have processed 1,000 insns, flush the hash table to
7051 avoid extreme quadratic behavior. We must not include NOTEs
7052 in the count since there may be more of them when generating
7053 debugging information. If we clear the table at different
7054 times, code generated with -g -O might be different than code
7055 generated with -O but not -g.
7056
7057 ??? This is a real kludge and needs to be done some other way.
7058 Perhaps for 2.9. */
7059 if (code != NOTE && num_insns++ > 1000)
7060 {
7061 flush_hash_table ();
7062 num_insns = 0;
7063 }
7064
7065 /* See if this is a branch that is part of the path. If so, and it is
7066 to be taken, do so. */
7067 if (next_branch->branch == insn)
7068 {
7069 enum taken status = next_branch++->status;
7070 if (status != PATH_NOT_TAKEN)
7071 {
7072 if (status == PATH_TAKEN)
7073 record_jump_equiv (insn, 1);
7074 else
7075 invalidate_skipped_block (NEXT_INSN (insn));
7076
7077 /* Set the last insn as the jump insn; it doesn't affect cc0.
7078 Then follow this branch. */
7079 #ifdef HAVE_cc0
7080 prev_insn_cc0 = 0;
7081 prev_insn = insn;
7082 #endif
7083 insn = JUMP_LABEL (insn);
7084 continue;
7085 }
7086 }
7087
7088 if (GET_MODE (insn) == QImode)
7089 PUT_MODE (insn, VOIDmode);
7090
7091 if (GET_RTX_CLASS (code) == RTX_INSN)
7092 {
7093 rtx p;
7094
7095 /* Process notes first so we have all notes in canonical forms when
7096 looking for duplicate operations. */
7097
7098 if (REG_NOTES (insn))
7099 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7100
7101 /* Track when we are inside in LIBCALL block. Inside such a block,
7102 we do not want to record destinations. The last insn of a
7103 LIBCALL block is not considered to be part of the block, since
7104 its destination is the result of the block and hence should be
7105 recorded. */
7106
7107 if (REG_NOTES (insn) != 0)
7108 {
7109 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7110 libcall_insn = XEXP (p, 0);
7111 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7112 {
7113 /* Keep libcall_insn for the last SET insn of a no-conflict
7114 block to prevent changing the destination. */
7115 if (! no_conflict)
7116 libcall_insn = 0;
7117 else
7118 no_conflict = -1;
7119 }
7120 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
7121 no_conflict = 1;
7122 }
7123
7124 cse_insn (insn, libcall_insn);
7125
7126 if (no_conflict == -1)
7127 {
7128 libcall_insn = 0;
7129 no_conflict = 0;
7130 }
7131
7132 /* If we haven't already found an insn where we added a LABEL_REF,
7133 check this one. */
7134 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7135 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7136 (void *) insn))
7137 recorded_label_ref = 1;
7138 }
7139
7140 /* If INSN is now an unconditional jump, skip to the end of our
7141 basic block by pretending that we just did the last insn in the
7142 basic block. If we are jumping to the end of our block, show
7143 that we can have one usage of TO. */
7144
7145 if (any_uncondjump_p (insn))
7146 {
7147 if (to == 0)
7148 {
7149 free (qty_table + max_reg);
7150 return 0;
7151 }
7152
7153 if (JUMP_LABEL (insn) == to)
7154 to_usage = 1;
7155
7156 /* Maybe TO was deleted because the jump is unconditional.
7157 If so, there is nothing left in this basic block. */
7158 /* ??? Perhaps it would be smarter to set TO
7159 to whatever follows this insn,
7160 and pretend the basic block had always ended here. */
7161 if (INSN_DELETED_P (to))
7162 break;
7163
7164 insn = PREV_INSN (to);
7165 }
7166
7167 /* See if it is ok to keep on going past the label
7168 which used to end our basic block. Remember that we incremented
7169 the count of that label, so we decrement it here. If we made
7170 a jump unconditional, TO_USAGE will be one; in that case, we don't
7171 want to count the use in that jump. */
7172
7173 if (to != 0 && NEXT_INSN (insn) == to
7174 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7175 {
7176 struct cse_basic_block_data val;
7177 rtx prev;
7178
7179 insn = NEXT_INSN (to);
7180
7181 /* If TO was the last insn in the function, we are done. */
7182 if (insn == 0)
7183 {
7184 free (qty_table + max_reg);
7185 return 0;
7186 }
7187
7188 /* If TO was preceded by a BARRIER we are done with this block
7189 because it has no continuation. */
7190 prev = prev_nonnote_insn (to);
7191 if (prev && GET_CODE (prev) == BARRIER)
7192 {
7193 free (qty_table + max_reg);
7194 return insn;
7195 }
7196
7197 /* Find the end of the following block. Note that we won't be
7198 following branches in this case. */
7199 to_usage = 0;
7200 val.path_size = 0;
7201 val.path = xmalloc (sizeof (struct branch_path)
7202 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7203 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7204 free (val.path);
7205
7206 /* If the tables we allocated have enough space left
7207 to handle all the SETs in the next basic block,
7208 continue through it. Otherwise, return,
7209 and that block will be scanned individually. */
7210 if (val.nsets * 2 + next_qty > max_qty)
7211 break;
7212
7213 cse_basic_block_start = val.low_cuid;
7214 cse_basic_block_end = val.high_cuid;
7215 to = val.last;
7216
7217 /* Prevent TO from being deleted if it is a label. */
7218 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7219 ++LABEL_NUSES (to);
7220
7221 /* Back up so we process the first insn in the extension. */
7222 insn = PREV_INSN (insn);
7223 }
7224 }
7225
7226 if (next_qty > max_qty)
7227 abort ();
7228
7229 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7230 the previous insn is the only insn that branches to the head of a loop,
7231 we can cse into the loop. Don't do this if we changed the jump
7232 structure of a loop unless we aren't going to be following jumps. */
7233
7234 insn = prev_nonnote_insn (to);
7235 if ((cse_jumps_altered == 0
7236 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7237 && around_loop && to != 0
7238 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7239 && GET_CODE (insn) == JUMP_INSN
7240 && JUMP_LABEL (insn) != 0
7241 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7242 cse_around_loop (JUMP_LABEL (insn));
7243
7244 free (qty_table + max_reg);
7245
7246 return to ? NEXT_INSN (to) : 0;
7247 }
7248 \f
7249 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7250 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7251
7252 static int
7253 check_for_label_ref (rtx *rtl, void *data)
7254 {
7255 rtx insn = (rtx) data;
7256
7257 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7258 we must rerun jump since it needs to place the note. If this is a
7259 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7260 since no REG_LABEL will be added. */
7261 return (GET_CODE (*rtl) == LABEL_REF
7262 && ! LABEL_REF_NONLOCAL_P (*rtl)
7263 && LABEL_P (XEXP (*rtl, 0))
7264 && INSN_UID (XEXP (*rtl, 0)) != 0
7265 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7266 }
7267 \f
7268 /* Count the number of times registers are used (not set) in X.
7269 COUNTS is an array in which we accumulate the count, INCR is how much
7270 we count each register usage. */
7271
7272 static void
7273 count_reg_usage (rtx x, int *counts, int incr)
7274 {
7275 enum rtx_code code;
7276 rtx note;
7277 const char *fmt;
7278 int i, j;
7279
7280 if (x == 0)
7281 return;
7282
7283 switch (code = GET_CODE (x))
7284 {
7285 case REG:
7286 counts[REGNO (x)] += incr;
7287 return;
7288
7289 case PC:
7290 case CC0:
7291 case CONST:
7292 case CONST_INT:
7293 case CONST_DOUBLE:
7294 case CONST_VECTOR:
7295 case SYMBOL_REF:
7296 case LABEL_REF:
7297 return;
7298
7299 case CLOBBER:
7300 /* If we are clobbering a MEM, mark any registers inside the address
7301 as being used. */
7302 if (GET_CODE (XEXP (x, 0)) == MEM)
7303 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7304 return;
7305
7306 case SET:
7307 /* Unless we are setting a REG, count everything in SET_DEST. */
7308 if (!REG_P (SET_DEST (x)))
7309 count_reg_usage (SET_DEST (x), counts, incr);
7310 count_reg_usage (SET_SRC (x), counts, incr);
7311 return;
7312
7313 case CALL_INSN:
7314 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7315 /* Fall through. */
7316
7317 case INSN:
7318 case JUMP_INSN:
7319 count_reg_usage (PATTERN (x), counts, incr);
7320
7321 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7322 use them. */
7323
7324 note = find_reg_equal_equiv_note (x);
7325 if (note)
7326 {
7327 rtx eqv = XEXP (note, 0);
7328
7329 if (GET_CODE (eqv) == EXPR_LIST)
7330 /* This REG_EQUAL note describes the result of a function call.
7331 Process all the arguments. */
7332 do
7333 {
7334 count_reg_usage (XEXP (eqv, 0), counts, incr);
7335 eqv = XEXP (eqv, 1);
7336 }
7337 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7338 else
7339 count_reg_usage (eqv, counts, incr);
7340 }
7341 return;
7342
7343 case EXPR_LIST:
7344 if (REG_NOTE_KIND (x) == REG_EQUAL
7345 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7346 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7347 involving registers in the address. */
7348 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7349 count_reg_usage (XEXP (x, 0), counts, incr);
7350
7351 count_reg_usage (XEXP (x, 1), counts, incr);
7352 return;
7353
7354 case ASM_OPERANDS:
7355 /* Iterate over just the inputs, not the constraints as well. */
7356 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7357 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7358 return;
7359
7360 case INSN_LIST:
7361 abort ();
7362
7363 default:
7364 break;
7365 }
7366
7367 fmt = GET_RTX_FORMAT (code);
7368 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7369 {
7370 if (fmt[i] == 'e')
7371 count_reg_usage (XEXP (x, i), counts, incr);
7372 else if (fmt[i] == 'E')
7373 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7374 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7375 }
7376 }
7377 \f
7378 /* Return true if set is live. */
7379 static bool
7380 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7381 int *counts)
7382 {
7383 #ifdef HAVE_cc0
7384 rtx tem;
7385 #endif
7386
7387 if (set_noop_p (set))
7388 ;
7389
7390 #ifdef HAVE_cc0
7391 else if (GET_CODE (SET_DEST (set)) == CC0
7392 && !side_effects_p (SET_SRC (set))
7393 && ((tem = next_nonnote_insn (insn)) == 0
7394 || !INSN_P (tem)
7395 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7396 return false;
7397 #endif
7398 else if (!REG_P (SET_DEST (set))
7399 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7400 || counts[REGNO (SET_DEST (set))] != 0
7401 || side_effects_p (SET_SRC (set))
7402 /* An ADDRESSOF expression can turn into a use of the
7403 internal arg pointer, so always consider the
7404 internal arg pointer live. If it is truly dead,
7405 flow will delete the initializing insn. */
7406 || (SET_DEST (set) == current_function_internal_arg_pointer))
7407 return true;
7408 return false;
7409 }
7410
7411 /* Return true if insn is live. */
7412
7413 static bool
7414 insn_live_p (rtx insn, int *counts)
7415 {
7416 int i;
7417 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7418 return true;
7419 else if (GET_CODE (PATTERN (insn)) == SET)
7420 return set_live_p (PATTERN (insn), insn, counts);
7421 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7422 {
7423 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7424 {
7425 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7426
7427 if (GET_CODE (elt) == SET)
7428 {
7429 if (set_live_p (elt, insn, counts))
7430 return true;
7431 }
7432 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7433 return true;
7434 }
7435 return false;
7436 }
7437 else
7438 return true;
7439 }
7440
7441 /* Return true if libcall is dead as a whole. */
7442
7443 static bool
7444 dead_libcall_p (rtx insn, int *counts)
7445 {
7446 rtx note, set, new;
7447
7448 /* See if there's a REG_EQUAL note on this insn and try to
7449 replace the source with the REG_EQUAL expression.
7450
7451 We assume that insns with REG_RETVALs can only be reg->reg
7452 copies at this point. */
7453 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7454 if (!note)
7455 return false;
7456
7457 set = single_set (insn);
7458 if (!set)
7459 return false;
7460
7461 new = simplify_rtx (XEXP (note, 0));
7462 if (!new)
7463 new = XEXP (note, 0);
7464
7465 /* While changing insn, we must update the counts accordingly. */
7466 count_reg_usage (insn, counts, -1);
7467
7468 if (validate_change (insn, &SET_SRC (set), new, 0))
7469 {
7470 count_reg_usage (insn, counts, 1);
7471 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7472 remove_note (insn, note);
7473 return true;
7474 }
7475
7476 if (CONSTANT_P (new))
7477 {
7478 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7479 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7480 {
7481 count_reg_usage (insn, counts, 1);
7482 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7483 remove_note (insn, note);
7484 return true;
7485 }
7486 }
7487
7488 count_reg_usage (insn, counts, 1);
7489 return false;
7490 }
7491
7492 /* Scan all the insns and delete any that are dead; i.e., they store a register
7493 that is never used or they copy a register to itself.
7494
7495 This is used to remove insns made obviously dead by cse, loop or other
7496 optimizations. It improves the heuristics in loop since it won't try to
7497 move dead invariants out of loops or make givs for dead quantities. The
7498 remaining passes of the compilation are also sped up. */
7499
7500 int
7501 delete_trivially_dead_insns (rtx insns, int nreg)
7502 {
7503 int *counts;
7504 rtx insn, prev;
7505 int in_libcall = 0, dead_libcall = 0;
7506 int ndead = 0, nlastdead, niterations = 0;
7507
7508 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7509 /* First count the number of times each register is used. */
7510 counts = xcalloc (nreg, sizeof (int));
7511 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7512 count_reg_usage (insn, counts, 1);
7513
7514 do
7515 {
7516 nlastdead = ndead;
7517 niterations++;
7518 /* Go from the last insn to the first and delete insns that only set unused
7519 registers or copy a register to itself. As we delete an insn, remove
7520 usage counts for registers it uses.
7521
7522 The first jump optimization pass may leave a real insn as the last
7523 insn in the function. We must not skip that insn or we may end
7524 up deleting code that is not really dead. */
7525 insn = get_last_insn ();
7526 if (! INSN_P (insn))
7527 insn = prev_real_insn (insn);
7528
7529 for (; insn; insn = prev)
7530 {
7531 int live_insn = 0;
7532
7533 prev = prev_real_insn (insn);
7534
7535 /* Don't delete any insns that are part of a libcall block unless
7536 we can delete the whole libcall block.
7537
7538 Flow or loop might get confused if we did that. Remember
7539 that we are scanning backwards. */
7540 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7541 {
7542 in_libcall = 1;
7543 live_insn = 1;
7544 dead_libcall = dead_libcall_p (insn, counts);
7545 }
7546 else if (in_libcall)
7547 live_insn = ! dead_libcall;
7548 else
7549 live_insn = insn_live_p (insn, counts);
7550
7551 /* If this is a dead insn, delete it and show registers in it aren't
7552 being used. */
7553
7554 if (! live_insn)
7555 {
7556 count_reg_usage (insn, counts, -1);
7557 delete_insn_and_edges (insn);
7558 ndead++;
7559 }
7560
7561 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7562 {
7563 in_libcall = 0;
7564 dead_libcall = 0;
7565 }
7566 }
7567 }
7568 while (ndead != nlastdead);
7569
7570 if (dump_file && ndead)
7571 fprintf (dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7572 ndead, niterations);
7573 /* Clean up. */
7574 free (counts);
7575 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7576 return ndead;
7577 }
7578
7579 /* This function is called via for_each_rtx. The argument, NEWREG, is
7580 a condition code register with the desired mode. If we are looking
7581 at the same register in a different mode, replace it with
7582 NEWREG. */
7583
7584 static int
7585 cse_change_cc_mode (rtx *loc, void *data)
7586 {
7587 rtx newreg = (rtx) data;
7588
7589 if (*loc
7590 && REG_P (*loc)
7591 && REGNO (*loc) == REGNO (newreg)
7592 && GET_MODE (*loc) != GET_MODE (newreg))
7593 {
7594 *loc = newreg;
7595 return -1;
7596 }
7597 return 0;
7598 }
7599
7600 /* Change the mode of any reference to the register REGNO (NEWREG) to
7601 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7602 any instruction which modifies NEWREG. */
7603
7604 static void
7605 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7606 {
7607 rtx insn;
7608
7609 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7610 {
7611 if (! INSN_P (insn))
7612 continue;
7613
7614 if (reg_set_p (newreg, insn))
7615 return;
7616
7617 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, newreg);
7618 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, newreg);
7619 }
7620 }
7621
7622 /* BB is a basic block which finishes with CC_REG as a condition code
7623 register which is set to CC_SRC. Look through the successors of BB
7624 to find blocks which have a single predecessor (i.e., this one),
7625 and look through those blocks for an assignment to CC_REG which is
7626 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7627 permitted to change the mode of CC_SRC to a compatible mode. This
7628 returns VOIDmode if no equivalent assignments were found.
7629 Otherwise it returns the mode which CC_SRC should wind up with.
7630
7631 The main complexity in this function is handling the mode issues.
7632 We may have more than one duplicate which we can eliminate, and we
7633 try to find a mode which will work for multiple duplicates. */
7634
7635 static enum machine_mode
7636 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7637 {
7638 bool found_equiv;
7639 enum machine_mode mode;
7640 unsigned int insn_count;
7641 edge e;
7642 rtx insns[2];
7643 enum machine_mode modes[2];
7644 rtx last_insns[2];
7645 unsigned int i;
7646 rtx newreg;
7647
7648 /* We expect to have two successors. Look at both before picking
7649 the final mode for the comparison. If we have more successors
7650 (i.e., some sort of table jump, although that seems unlikely),
7651 then we require all beyond the first two to use the same
7652 mode. */
7653
7654 found_equiv = false;
7655 mode = GET_MODE (cc_src);
7656 insn_count = 0;
7657 for (e = bb->succ; e; e = e->succ_next)
7658 {
7659 rtx insn;
7660 rtx end;
7661
7662 if (e->flags & EDGE_COMPLEX)
7663 continue;
7664
7665 if (! e->dest->pred
7666 || e->dest->pred->pred_next
7667 || e->dest == EXIT_BLOCK_PTR)
7668 continue;
7669
7670 end = NEXT_INSN (BB_END (e->dest));
7671 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7672 {
7673 rtx set;
7674
7675 if (! INSN_P (insn))
7676 continue;
7677
7678 /* If CC_SRC is modified, we have to stop looking for
7679 something which uses it. */
7680 if (modified_in_p (cc_src, insn))
7681 break;
7682
7683 /* Check whether INSN sets CC_REG to CC_SRC. */
7684 set = single_set (insn);
7685 if (set
7686 && REG_P (SET_DEST (set))
7687 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7688 {
7689 bool found;
7690 enum machine_mode set_mode;
7691 enum machine_mode comp_mode;
7692
7693 found = false;
7694 set_mode = GET_MODE (SET_SRC (set));
7695 comp_mode = set_mode;
7696 if (rtx_equal_p (cc_src, SET_SRC (set)))
7697 found = true;
7698 else if (GET_CODE (cc_src) == COMPARE
7699 && GET_CODE (SET_SRC (set)) == COMPARE
7700 && mode != set_mode
7701 && rtx_equal_p (XEXP (cc_src, 0),
7702 XEXP (SET_SRC (set), 0))
7703 && rtx_equal_p (XEXP (cc_src, 1),
7704 XEXP (SET_SRC (set), 1)))
7705
7706 {
7707 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7708 if (comp_mode != VOIDmode
7709 && (can_change_mode || comp_mode == mode))
7710 found = true;
7711 }
7712
7713 if (found)
7714 {
7715 found_equiv = true;
7716 if (insn_count < ARRAY_SIZE (insns))
7717 {
7718 insns[insn_count] = insn;
7719 modes[insn_count] = set_mode;
7720 last_insns[insn_count] = end;
7721 ++insn_count;
7722
7723 if (mode != comp_mode)
7724 {
7725 if (! can_change_mode)
7726 abort ();
7727 mode = comp_mode;
7728 PUT_MODE (cc_src, mode);
7729 }
7730 }
7731 else
7732 {
7733 if (set_mode != mode)
7734 {
7735 /* We found a matching expression in the
7736 wrong mode, but we don't have room to
7737 store it in the array. Punt. This case
7738 should be rare. */
7739 break;
7740 }
7741 /* INSN sets CC_REG to a value equal to CC_SRC
7742 with the right mode. We can simply delete
7743 it. */
7744 delete_insn (insn);
7745 }
7746
7747 /* We found an instruction to delete. Keep looking,
7748 in the hopes of finding a three-way jump. */
7749 continue;
7750 }
7751
7752 /* We found an instruction which sets the condition
7753 code, so don't look any farther. */
7754 break;
7755 }
7756
7757 /* If INSN sets CC_REG in some other way, don't look any
7758 farther. */
7759 if (reg_set_p (cc_reg, insn))
7760 break;
7761 }
7762
7763 /* If we fell off the bottom of the block, we can keep looking
7764 through successors. We pass CAN_CHANGE_MODE as false because
7765 we aren't prepared to handle compatibility between the
7766 further blocks and this block. */
7767 if (insn == end)
7768 {
7769 enum machine_mode submode;
7770
7771 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7772 if (submode != VOIDmode)
7773 {
7774 if (submode != mode)
7775 abort ();
7776 found_equiv = true;
7777 can_change_mode = false;
7778 }
7779 }
7780 }
7781
7782 if (! found_equiv)
7783 return VOIDmode;
7784
7785 /* Now INSN_COUNT is the number of instructions we found which set
7786 CC_REG to a value equivalent to CC_SRC. The instructions are in
7787 INSNS. The modes used by those instructions are in MODES. */
7788
7789 newreg = NULL_RTX;
7790 for (i = 0; i < insn_count; ++i)
7791 {
7792 if (modes[i] != mode)
7793 {
7794 /* We need to change the mode of CC_REG in INSNS[i] and
7795 subsequent instructions. */
7796 if (! newreg)
7797 {
7798 if (GET_MODE (cc_reg) == mode)
7799 newreg = cc_reg;
7800 else
7801 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7802 }
7803 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7804 newreg);
7805 }
7806
7807 delete_insn (insns[i]);
7808 }
7809
7810 return mode;
7811 }
7812
7813 /* If we have a fixed condition code register (or two), walk through
7814 the instructions and try to eliminate duplicate assignments. */
7815
7816 void
7817 cse_condition_code_reg (void)
7818 {
7819 unsigned int cc_regno_1;
7820 unsigned int cc_regno_2;
7821 rtx cc_reg_1;
7822 rtx cc_reg_2;
7823 basic_block bb;
7824
7825 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7826 return;
7827
7828 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7829 if (cc_regno_2 != INVALID_REGNUM)
7830 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7831 else
7832 cc_reg_2 = NULL_RTX;
7833
7834 FOR_EACH_BB (bb)
7835 {
7836 rtx last_insn;
7837 rtx cc_reg;
7838 rtx insn;
7839 rtx cc_src_insn;
7840 rtx cc_src;
7841 enum machine_mode mode;
7842 enum machine_mode orig_mode;
7843
7844 /* Look for blocks which end with a conditional jump based on a
7845 condition code register. Then look for the instruction which
7846 sets the condition code register. Then look through the
7847 successor blocks for instructions which set the condition
7848 code register to the same value. There are other possible
7849 uses of the condition code register, but these are by far the
7850 most common and the ones which we are most likely to be able
7851 to optimize. */
7852
7853 last_insn = BB_END (bb);
7854 if (GET_CODE (last_insn) != JUMP_INSN)
7855 continue;
7856
7857 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7858 cc_reg = cc_reg_1;
7859 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7860 cc_reg = cc_reg_2;
7861 else
7862 continue;
7863
7864 cc_src_insn = NULL_RTX;
7865 cc_src = NULL_RTX;
7866 for (insn = PREV_INSN (last_insn);
7867 insn && insn != PREV_INSN (BB_HEAD (bb));
7868 insn = PREV_INSN (insn))
7869 {
7870 rtx set;
7871
7872 if (! INSN_P (insn))
7873 continue;
7874 set = single_set (insn);
7875 if (set
7876 && REG_P (SET_DEST (set))
7877 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7878 {
7879 cc_src_insn = insn;
7880 cc_src = SET_SRC (set);
7881 break;
7882 }
7883 else if (reg_set_p (cc_reg, insn))
7884 break;
7885 }
7886
7887 if (! cc_src_insn)
7888 continue;
7889
7890 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7891 continue;
7892
7893 /* Now CC_REG is a condition code register used for a
7894 conditional jump at the end of the block, and CC_SRC, in
7895 CC_SRC_INSN, is the value to which that condition code
7896 register is set, and CC_SRC is still meaningful at the end of
7897 the basic block. */
7898
7899 orig_mode = GET_MODE (cc_src);
7900 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
7901 if (mode != VOIDmode)
7902 {
7903 if (mode != GET_MODE (cc_src))
7904 abort ();
7905 if (mode != orig_mode)
7906 {
7907 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7908
7909 /* Change the mode of CC_REG in CC_SRC_INSN to
7910 GET_MODE (NEWREG). */
7911 for_each_rtx (&PATTERN (cc_src_insn), cse_change_cc_mode,
7912 newreg);
7913 for_each_rtx (&REG_NOTES (cc_src_insn), cse_change_cc_mode,
7914 newreg);
7915
7916 /* Do the same in the following insns that use the
7917 current value of CC_REG within BB. */
7918 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7919 NEXT_INSN (last_insn),
7920 newreg);
7921 }
7922 }
7923 }
7924 }