re PR c++/13635 (ICE in register_specialization for specific order of template specia...
[gcc.git] / gcc / cse.c
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
45 #include "params.h"
46
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
51
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
56 global CSE.
57
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
61
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
65
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
74
75 Registers and "quantity numbers":
76
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `reg_qty' records what quantity a register is currently thought
84 of as containing.
85
86 All real quantity numbers are greater than or equal to `max_reg'.
87 If register N has not been assigned a quantity, reg_qty[N] will equal N.
88
89 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
90 entries should be referenced with an index below `max_reg'.
91
92 We also maintain a bidirectional chain of registers for each
93 quantity number. The `qty_table` members `first_reg' and `last_reg',
94 and `reg_eqv_table' members `next' and `prev' hold these chains.
95
96 The first register in a chain is the one whose lifespan is least local.
97 Among equals, it is the one that was seen first.
98 We replace any equivalent register with that one.
99
100 If two registers have the same quantity number, it must be true that
101 REG expressions with qty_table `mode' must be in the hash table for both
102 registers and must be in the same class.
103
104 The converse is not true. Since hard registers may be referenced in
105 any mode, two REG expressions might be equivalent in the hash table
106 but not have the same quantity number if the quantity number of one
107 of the registers is not the same mode as those expressions.
108
109 Constants and quantity numbers
110
111 When a quantity has a known constant value, that value is stored
112 in the appropriate qty_table `const_rtx'. This is in addition to
113 putting the constant in the hash table as is usual for non-regs.
114
115 Whether a reg or a constant is preferred is determined by the configuration
116 macro CONST_COSTS and will often depend on the constant value. In any
117 event, expressions containing constants can be simplified, by fold_rtx.
118
119 When a quantity has a known nearly constant value (such as an address
120 of a stack slot), that value is stored in the appropriate qty_table
121 `const_rtx'.
122
123 Integer constants don't have a machine mode. However, cse
124 determines the intended machine mode from the destination
125 of the instruction that moves the constant. The machine mode
126 is recorded in the hash table along with the actual RTL
127 constant expression so that different modes are kept separate.
128
129 Other expressions:
130
131 To record known equivalences among expressions in general
132 we use a hash table called `table'. It has a fixed number of buckets
133 that contain chains of `struct table_elt' elements for expressions.
134 These chains connect the elements whose expressions have the same
135 hash codes.
136
137 Other chains through the same elements connect the elements which
138 currently have equivalent values.
139
140 Register references in an expression are canonicalized before hashing
141 the expression. This is done using `reg_qty' and qty_table `first_reg'.
142 The hash code of a register reference is computed using the quantity
143 number, not the register number.
144
145 When the value of an expression changes, it is necessary to remove from the
146 hash table not just that expression but all expressions whose values
147 could be different as a result.
148
149 1. If the value changing is in memory, except in special cases
150 ANYTHING referring to memory could be changed. That is because
151 nobody knows where a pointer does not point.
152 The function `invalidate_memory' removes what is necessary.
153
154 The special cases are when the address is constant or is
155 a constant plus a fixed register such as the frame pointer
156 or a static chain pointer. When such addresses are stored in,
157 we can tell exactly which other such addresses must be invalidated
158 due to overlap. `invalidate' does this.
159 All expressions that refer to non-constant
160 memory addresses are also invalidated. `invalidate_memory' does this.
161
162 2. If the value changing is a register, all expressions
163 containing references to that register, and only those,
164 must be removed.
165
166 Because searching the entire hash table for expressions that contain
167 a register is very slow, we try to figure out when it isn't necessary.
168 Precisely, this is necessary only when expressions have been
169 entered in the hash table using this register, and then the value has
170 changed, and then another expression wants to be added to refer to
171 the register's new value. This sequence of circumstances is rare
172 within any one basic block.
173
174 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
175 reg_tick[i] is incremented whenever a value is stored in register i.
176 reg_in_table[i] holds -1 if no references to register i have been
177 entered in the table; otherwise, it contains the value reg_tick[i] had
178 when the references were entered. If we want to enter a reference
179 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
180 Until we want to enter a new entry, the mere fact that the two vectors
181 don't match makes the entries be ignored if anyone tries to match them.
182
183 Registers themselves are entered in the hash table as well as in
184 the equivalent-register chains. However, the vectors `reg_tick'
185 and `reg_in_table' do not apply to expressions which are simple
186 register references. These expressions are removed from the table
187 immediately when they become invalid, and this can be done even if
188 we do not immediately search for all the expressions that refer to
189 the register.
190
191 A CLOBBER rtx in an instruction invalidates its operand for further
192 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
193 invalidates everything that resides in memory.
194
195 Related expressions:
196
197 Constant expressions that differ only by an additive integer
198 are called related. When a constant expression is put in
199 the table, the related expression with no constant term
200 is also entered. These are made to point at each other
201 so that it is possible to find out if there exists any
202 register equivalent to an expression related to a given expression. */
203
204 /* One plus largest register number used in this function. */
205
206 static int max_reg;
207
208 /* One plus largest instruction UID used in this function at time of
209 cse_main call. */
210
211 static int max_insn_uid;
212
213 /* Length of qty_table vector. We know in advance we will not need
214 a quantity number this big. */
215
216 static int max_qty;
217
218 /* Next quantity number to be allocated.
219 This is 1 + the largest number needed so far. */
220
221 static int next_qty;
222
223 /* Per-qty information tracking.
224
225 `first_reg' and `last_reg' track the head and tail of the
226 chain of registers which currently contain this quantity.
227
228 `mode' contains the machine mode of this quantity.
229
230 `const_rtx' holds the rtx of the constant value of this
231 quantity, if known. A summations of the frame/arg pointer
232 and a constant can also be entered here. When this holds
233 a known value, `const_insn' is the insn which stored the
234 constant value.
235
236 `comparison_{code,const,qty}' are used to track when a
237 comparison between a quantity and some constant or register has
238 been passed. In such a case, we know the results of the comparison
239 in case we see it again. These members record a comparison that
240 is known to be true. `comparison_code' holds the rtx code of such
241 a comparison, else it is set to UNKNOWN and the other two
242 comparison members are undefined. `comparison_const' holds
243 the constant being compared against, or zero if the comparison
244 is not against a constant. `comparison_qty' holds the quantity
245 being compared against when the result is known. If the comparison
246 is not with a register, `comparison_qty' is -1. */
247
248 struct qty_table_elem
249 {
250 rtx const_rtx;
251 rtx const_insn;
252 rtx comparison_const;
253 int comparison_qty;
254 unsigned int first_reg, last_reg;
255 /* The sizes of these fields should match the sizes of the
256 code and mode fields of struct rtx_def (see rtl.h). */
257 ENUM_BITFIELD(rtx_code) comparison_code : 16;
258 ENUM_BITFIELD(machine_mode) mode : 8;
259 };
260
261 /* The table of all qtys, indexed by qty number. */
262 static struct qty_table_elem *qty_table;
263
264 #ifdef HAVE_cc0
265 /* For machines that have a CC0, we do not record its value in the hash
266 table since its use is guaranteed to be the insn immediately following
267 its definition and any other insn is presumed to invalidate it.
268
269 Instead, we store below the value last assigned to CC0. If it should
270 happen to be a constant, it is stored in preference to the actual
271 assigned value. In case it is a constant, we store the mode in which
272 the constant should be interpreted. */
273
274 static rtx prev_insn_cc0;
275 static enum machine_mode prev_insn_cc0_mode;
276
277 /* Previous actual insn. 0 if at first insn of basic block. */
278
279 static rtx prev_insn;
280 #endif
281
282 /* Insn being scanned. */
283
284 static rtx this_insn;
285
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
288 value.
289
290 Or -1 if this register is at the end of the chain.
291
292 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
293
294 /* Per-register equivalence chain. */
295 struct reg_eqv_elem
296 {
297 int next, prev;
298 };
299
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem *reg_eqv_table;
302
303 struct cse_reg_info
304 {
305 /* Next in hash chain. */
306 struct cse_reg_info *hash_next;
307
308 /* The next cse_reg_info structure in the free or used list. */
309 struct cse_reg_info *next;
310
311 /* Search key */
312 unsigned int regno;
313
314 /* The quantity number of the register's current contents. */
315 int reg_qty;
316
317 /* The number of times the register has been altered in the current
318 basic block. */
319 int reg_tick;
320
321 /* The REG_TICK value at which rtx's containing this register are
322 valid in the hash table. If this does not equal the current
323 reg_tick value, such expressions existing in the hash table are
324 invalid. */
325 int reg_in_table;
326
327 /* The SUBREG that was set when REG_TICK was last incremented. Set
328 to -1 if the last store was to the whole register, not a subreg. */
329 unsigned int subreg_ticked;
330 };
331
332 /* A free list of cse_reg_info entries. */
333 static struct cse_reg_info *cse_reg_info_free_list;
334
335 /* A used list of cse_reg_info entries. */
336 static struct cse_reg_info *cse_reg_info_used_list;
337 static struct cse_reg_info *cse_reg_info_used_list_end;
338
339 /* A mapping from registers to cse_reg_info data structures. */
340 #define REGHASH_SHIFT 7
341 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
342 #define REGHASH_MASK (REGHASH_SIZE - 1)
343 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
344
345 #define REGHASH_FN(REGNO) \
346 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
347
348 /* The last lookup we did into the cse_reg_info_tree. This allows us
349 to cache repeated lookups. */
350 static unsigned int cached_regno;
351 static struct cse_reg_info *cached_cse_reg_info;
352
353 /* A HARD_REG_SET containing all the hard registers for which there is
354 currently a REG expression in the hash table. Note the difference
355 from the above variables, which indicate if the REG is mentioned in some
356 expression in the table. */
357
358 static HARD_REG_SET hard_regs_in_table;
359
360 /* CUID of insn that starts the basic block currently being cse-processed. */
361
362 static int cse_basic_block_start;
363
364 /* CUID of insn that ends the basic block currently being cse-processed. */
365
366 static int cse_basic_block_end;
367
368 /* Vector mapping INSN_UIDs to cuids.
369 The cuids are like uids but increase monotonically always.
370 We use them to see whether a reg is used outside a given basic block. */
371
372 static int *uid_cuid;
373
374 /* Highest UID in UID_CUID. */
375 static int max_uid;
376
377 /* Get the cuid of an insn. */
378
379 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
380
381 /* Nonzero if this pass has made changes, and therefore it's
382 worthwhile to run the garbage collector. */
383
384 static int cse_altered;
385
386 /* Nonzero if cse has altered conditional jump insns
387 in such a way that jump optimization should be redone. */
388
389 static int cse_jumps_altered;
390
391 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
392 REG_LABEL, we have to rerun jump after CSE to put in the note. */
393 static int recorded_label_ref;
394
395 /* canon_hash stores 1 in do_not_record
396 if it notices a reference to CC0, PC, or some other volatile
397 subexpression. */
398
399 static int do_not_record;
400
401 #ifdef LOAD_EXTEND_OP
402
403 /* Scratch rtl used when looking for load-extended copy of a MEM. */
404 static rtx memory_extend_rtx;
405 #endif
406
407 /* canon_hash stores 1 in hash_arg_in_memory
408 if it notices a reference to memory within the expression being hashed. */
409
410 static int hash_arg_in_memory;
411
412 /* The hash table contains buckets which are chains of `struct table_elt's,
413 each recording one expression's information.
414 That expression is in the `exp' field.
415
416 The canon_exp field contains a canonical (from the point of view of
417 alias analysis) version of the `exp' field.
418
419 Those elements with the same hash code are chained in both directions
420 through the `next_same_hash' and `prev_same_hash' fields.
421
422 Each set of expressions with equivalent values
423 are on a two-way chain through the `next_same_value'
424 and `prev_same_value' fields, and all point with
425 the `first_same_value' field at the first element in
426 that chain. The chain is in order of increasing cost.
427 Each element's cost value is in its `cost' field.
428
429 The `in_memory' field is nonzero for elements that
430 involve any reference to memory. These elements are removed
431 whenever a write is done to an unidentified location in memory.
432 To be safe, we assume that a memory address is unidentified unless
433 the address is either a symbol constant or a constant plus
434 the frame pointer or argument pointer.
435
436 The `related_value' field is used to connect related expressions
437 (that differ by adding an integer).
438 The related expressions are chained in a circular fashion.
439 `related_value' is zero for expressions for which this
440 chain is not useful.
441
442 The `cost' field stores the cost of this element's expression.
443 The `regcost' field stores the value returned by approx_reg_cost for
444 this element's expression.
445
446 The `is_const' flag is set if the element is a constant (including
447 a fixed address).
448
449 The `flag' field is used as a temporary during some search routines.
450
451 The `mode' field is usually the same as GET_MODE (`exp'), but
452 if `exp' is a CONST_INT and has no machine mode then the `mode'
453 field is the mode it was being used as. Each constant is
454 recorded separately for each mode it is used with. */
455
456 struct table_elt
457 {
458 rtx exp;
459 rtx canon_exp;
460 struct table_elt *next_same_hash;
461 struct table_elt *prev_same_hash;
462 struct table_elt *next_same_value;
463 struct table_elt *prev_same_value;
464 struct table_elt *first_same_value;
465 struct table_elt *related_value;
466 int cost;
467 int regcost;
468 /* The size of this field should match the size
469 of the mode field of struct rtx_def (see rtl.h). */
470 ENUM_BITFIELD(machine_mode) mode : 8;
471 char in_memory;
472 char is_const;
473 char flag;
474 };
475
476 /* We don't want a lot of buckets, because we rarely have very many
477 things stored in the hash table, and a lot of buckets slows
478 down a lot of loops that happen frequently. */
479 #define HASH_SHIFT 5
480 #define HASH_SIZE (1 << HASH_SHIFT)
481 #define HASH_MASK (HASH_SIZE - 1)
482
483 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
484 register (hard registers may require `do_not_record' to be set). */
485
486 #define HASH(X, M) \
487 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
488 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
489 : canon_hash (X, M)) & HASH_MASK)
490
491 /* Determine whether register number N is considered a fixed register for the
492 purpose of approximating register costs.
493 It is desirable to replace other regs with fixed regs, to reduce need for
494 non-fixed hard regs.
495 A reg wins if it is either the frame pointer or designated as fixed. */
496 #define FIXED_REGNO_P(N) \
497 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
498 || fixed_regs[N] || global_regs[N])
499
500 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
501 hard registers and pointers into the frame are the cheapest with a cost
502 of 0. Next come pseudos with a cost of one and other hard registers with
503 a cost of 2. Aside from these special cases, call `rtx_cost'. */
504
505 #define CHEAP_REGNO(N) \
506 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
507 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
508 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
509 || ((N) < FIRST_PSEUDO_REGISTER \
510 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
511
512 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
513 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
514
515 /* Get the info associated with register N. */
516
517 #define GET_CSE_REG_INFO(N) \
518 (((N) == cached_regno && cached_cse_reg_info) \
519 ? cached_cse_reg_info : get_cse_reg_info ((N)))
520
521 /* Get the number of times this register has been updated in this
522 basic block. */
523
524 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
525
526 /* Get the point at which REG was recorded in the table. */
527
528 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
529
530 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
531 SUBREG). */
532
533 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
534
535 /* Get the quantity number for REG. */
536
537 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
538
539 /* Determine if the quantity number for register X represents a valid index
540 into the qty_table. */
541
542 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
543
544 static struct table_elt *table[HASH_SIZE];
545
546 /* Chain of `struct table_elt's made so far for this function
547 but currently removed from the table. */
548
549 static struct table_elt *free_element_chain;
550
551 /* Number of `struct table_elt' structures made so far for this function. */
552
553 static int n_elements_made;
554
555 /* Maximum value `n_elements_made' has had so far in this compilation
556 for functions previously processed. */
557
558 static int max_elements_made;
559
560 /* Surviving equivalence class when two equivalence classes are merged
561 by recording the effects of a jump in the last insn. Zero if the
562 last insn was not a conditional jump. */
563
564 static struct table_elt *last_jump_equiv_class;
565
566 /* Set to the cost of a constant pool reference if one was found for a
567 symbolic constant. If this was found, it means we should try to
568 convert constants into constant pool entries if they don't fit in
569 the insn. */
570
571 static int constant_pool_entries_cost;
572 static int constant_pool_entries_regcost;
573
574 /* This data describes a block that will be processed by cse_basic_block. */
575
576 struct cse_basic_block_data
577 {
578 /* Lowest CUID value of insns in block. */
579 int low_cuid;
580 /* Highest CUID value of insns in block. */
581 int high_cuid;
582 /* Total number of SETs in block. */
583 int nsets;
584 /* Last insn in the block. */
585 rtx last;
586 /* Size of current branch path, if any. */
587 int path_size;
588 /* Current branch path, indicating which branches will be taken. */
589 struct branch_path
590 {
591 /* The branch insn. */
592 rtx branch;
593 /* Whether it should be taken or not. AROUND is the same as taken
594 except that it is used when the destination label is not preceded
595 by a BARRIER. */
596 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
597 } *path;
598 };
599
600 static bool fixed_base_plus_p (rtx x);
601 static int notreg_cost (rtx, enum rtx_code);
602 static int approx_reg_cost_1 (rtx *, void *);
603 static int approx_reg_cost (rtx);
604 static int preferrable (int, int, int, int);
605 static void new_basic_block (void);
606 static void make_new_qty (unsigned int, enum machine_mode);
607 static void make_regs_eqv (unsigned int, unsigned int);
608 static void delete_reg_equiv (unsigned int);
609 static int mention_regs (rtx);
610 static int insert_regs (rtx, struct table_elt *, int);
611 static void remove_from_table (struct table_elt *, unsigned);
612 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
613 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
614 static rtx lookup_as_function (rtx, enum rtx_code);
615 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
616 enum machine_mode);
617 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
618 static void invalidate (rtx, enum machine_mode);
619 static int cse_rtx_varies_p (rtx, int);
620 static void remove_invalid_refs (unsigned int);
621 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
622 enum machine_mode);
623 static void rehash_using_reg (rtx);
624 static void invalidate_memory (void);
625 static void invalidate_for_call (void);
626 static rtx use_related_value (rtx, struct table_elt *);
627 static unsigned canon_hash (rtx, enum machine_mode);
628 static unsigned canon_hash_string (const char *);
629 static unsigned safe_hash (rtx, enum machine_mode);
630 static int exp_equiv_p (rtx, rtx, int, int);
631 static rtx canon_reg (rtx, rtx);
632 static void find_best_addr (rtx, rtx *, enum machine_mode);
633 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
634 enum machine_mode *,
635 enum machine_mode *);
636 static rtx fold_rtx (rtx, rtx);
637 static rtx equiv_constant (rtx);
638 static void record_jump_equiv (rtx, int);
639 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
640 int);
641 static void cse_insn (rtx, rtx);
642 static int addr_affects_sp_p (rtx);
643 static void invalidate_from_clobbers (rtx);
644 static rtx cse_process_notes (rtx, rtx);
645 static void cse_around_loop (rtx);
646 static void invalidate_skipped_set (rtx, rtx, void *);
647 static void invalidate_skipped_block (rtx);
648 static void cse_check_loop_start (rtx, rtx, void *);
649 static void cse_set_around_loop (rtx, rtx, rtx);
650 static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
651 static void count_reg_usage (rtx, int *, int);
652 static int check_for_label_ref (rtx *, void *);
653 extern void dump_class (struct table_elt*);
654 static struct cse_reg_info * get_cse_reg_info (unsigned int);
655 static int check_dependence (rtx *, void *);
656
657 static void flush_hash_table (void);
658 static bool insn_live_p (rtx, int *);
659 static bool set_live_p (rtx, rtx, int *);
660 static bool dead_libcall_p (rtx, int *);
661 \f
662 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
663 virtual regs here because the simplify_*_operation routines are called
664 by integrate.c, which is called before virtual register instantiation. */
665
666 static bool
667 fixed_base_plus_p (rtx x)
668 {
669 switch (GET_CODE (x))
670 {
671 case REG:
672 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
673 return true;
674 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
675 return true;
676 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
677 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
678 return true;
679 return false;
680
681 case PLUS:
682 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
683 return false;
684 return fixed_base_plus_p (XEXP (x, 0));
685
686 case ADDRESSOF:
687 return true;
688
689 default:
690 return false;
691 }
692 }
693
694 /* Dump the expressions in the equivalence class indicated by CLASSP.
695 This function is used only for debugging. */
696 void
697 dump_class (struct table_elt *classp)
698 {
699 struct table_elt *elt;
700
701 fprintf (stderr, "Equivalence chain for ");
702 print_rtl (stderr, classp->exp);
703 fprintf (stderr, ": \n");
704
705 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
706 {
707 print_rtl (stderr, elt->exp);
708 fprintf (stderr, "\n");
709 }
710 }
711
712 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
713
714 static int
715 approx_reg_cost_1 (rtx *xp, void *data)
716 {
717 rtx x = *xp;
718 int *cost_p = data;
719
720 if (x && GET_CODE (x) == REG)
721 {
722 unsigned int regno = REGNO (x);
723
724 if (! CHEAP_REGNO (regno))
725 {
726 if (regno < FIRST_PSEUDO_REGISTER)
727 {
728 if (SMALL_REGISTER_CLASSES)
729 return 1;
730 *cost_p += 2;
731 }
732 else
733 *cost_p += 1;
734 }
735 }
736
737 return 0;
738 }
739
740 /* Return an estimate of the cost of the registers used in an rtx.
741 This is mostly the number of different REG expressions in the rtx;
742 however for some exceptions like fixed registers we use a cost of
743 0. If any other hard register reference occurs, return MAX_COST. */
744
745 static int
746 approx_reg_cost (rtx x)
747 {
748 int cost = 0;
749
750 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
751 return MAX_COST;
752
753 return cost;
754 }
755
756 /* Return a negative value if an rtx A, whose costs are given by COST_A
757 and REGCOST_A, is more desirable than an rtx B.
758 Return a positive value if A is less desirable, or 0 if the two are
759 equally good. */
760 static int
761 preferrable (int cost_a, int regcost_a, int cost_b, int regcost_b)
762 {
763 /* First, get rid of cases involving expressions that are entirely
764 unwanted. */
765 if (cost_a != cost_b)
766 {
767 if (cost_a == MAX_COST)
768 return 1;
769 if (cost_b == MAX_COST)
770 return -1;
771 }
772
773 /* Avoid extending lifetimes of hardregs. */
774 if (regcost_a != regcost_b)
775 {
776 if (regcost_a == MAX_COST)
777 return 1;
778 if (regcost_b == MAX_COST)
779 return -1;
780 }
781
782 /* Normal operation costs take precedence. */
783 if (cost_a != cost_b)
784 return cost_a - cost_b;
785 /* Only if these are identical consider effects on register pressure. */
786 if (regcost_a != regcost_b)
787 return regcost_a - regcost_b;
788 return 0;
789 }
790
791 /* Internal function, to compute cost when X is not a register; called
792 from COST macro to keep it simple. */
793
794 static int
795 notreg_cost (rtx x, enum rtx_code outer)
796 {
797 return ((GET_CODE (x) == SUBREG
798 && GET_CODE (SUBREG_REG (x)) == REG
799 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
800 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
801 && (GET_MODE_SIZE (GET_MODE (x))
802 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
803 && subreg_lowpart_p (x)
804 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
805 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
806 ? 0
807 : rtx_cost (x, outer) * 2);
808 }
809
810 /* Return an estimate of the cost of computing rtx X.
811 One use is in cse, to decide which expression to keep in the hash table.
812 Another is in rtl generation, to pick the cheapest way to multiply.
813 Other uses like the latter are expected in the future. */
814
815 int
816 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED)
817 {
818 int i, j;
819 enum rtx_code code;
820 const char *fmt;
821 int total;
822
823 if (x == 0)
824 return 0;
825
826 /* Compute the default costs of certain things.
827 Note that targetm.rtx_costs can override the defaults. */
828
829 code = GET_CODE (x);
830 switch (code)
831 {
832 case MULT:
833 total = COSTS_N_INSNS (5);
834 break;
835 case DIV:
836 case UDIV:
837 case MOD:
838 case UMOD:
839 total = COSTS_N_INSNS (7);
840 break;
841 case USE:
842 /* Used in loop.c and combine.c as a marker. */
843 total = 0;
844 break;
845 default:
846 total = COSTS_N_INSNS (1);
847 }
848
849 switch (code)
850 {
851 case REG:
852 return 0;
853
854 case SUBREG:
855 /* If we can't tie these modes, make this expensive. The larger
856 the mode, the more expensive it is. */
857 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
858 return COSTS_N_INSNS (2
859 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
860 break;
861
862 default:
863 if ((*targetm.rtx_costs) (x, code, outer_code, &total))
864 return total;
865 break;
866 }
867
868 /* Sum the costs of the sub-rtx's, plus cost of this operation,
869 which is already in total. */
870
871 fmt = GET_RTX_FORMAT (code);
872 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
873 if (fmt[i] == 'e')
874 total += rtx_cost (XEXP (x, i), code);
875 else if (fmt[i] == 'E')
876 for (j = 0; j < XVECLEN (x, i); j++)
877 total += rtx_cost (XVECEXP (x, i, j), code);
878
879 return total;
880 }
881 \f
882 /* Return cost of address expression X.
883 Expect that X is properly formed address reference. */
884
885 int
886 address_cost (rtx x, enum machine_mode mode)
887 {
888 /* The address_cost target hook does not deal with ADDRESSOF nodes. But,
889 during CSE, such nodes are present. Using an ADDRESSOF node which
890 refers to the address of a REG is a good thing because we can then
891 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
892
893 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
894 return -1;
895
896 /* We may be asked for cost of various unusual addresses, such as operands
897 of push instruction. It is not worthwhile to complicate writing
898 of the target hook by such cases. */
899
900 if (!memory_address_p (mode, x))
901 return 1000;
902
903 return (*targetm.address_cost) (x);
904 }
905
906 /* If the target doesn't override, compute the cost as with arithmetic. */
907
908 int
909 default_address_cost (rtx x)
910 {
911 return rtx_cost (x, MEM);
912 }
913 \f
914 static struct cse_reg_info *
915 get_cse_reg_info (unsigned int regno)
916 {
917 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
918 struct cse_reg_info *p;
919
920 for (p = *hash_head; p != NULL; p = p->hash_next)
921 if (p->regno == regno)
922 break;
923
924 if (p == NULL)
925 {
926 /* Get a new cse_reg_info structure. */
927 if (cse_reg_info_free_list)
928 {
929 p = cse_reg_info_free_list;
930 cse_reg_info_free_list = p->next;
931 }
932 else
933 p = xmalloc (sizeof (struct cse_reg_info));
934
935 /* Insert into hash table. */
936 p->hash_next = *hash_head;
937 *hash_head = p;
938
939 /* Initialize it. */
940 p->reg_tick = 1;
941 p->reg_in_table = -1;
942 p->subreg_ticked = -1;
943 p->reg_qty = regno;
944 p->regno = regno;
945 p->next = cse_reg_info_used_list;
946 cse_reg_info_used_list = p;
947 if (!cse_reg_info_used_list_end)
948 cse_reg_info_used_list_end = p;
949 }
950
951 /* Cache this lookup; we tend to be looking up information about the
952 same register several times in a row. */
953 cached_regno = regno;
954 cached_cse_reg_info = p;
955
956 return p;
957 }
958
959 /* Clear the hash table and initialize each register with its own quantity,
960 for a new basic block. */
961
962 static void
963 new_basic_block (void)
964 {
965 int i;
966
967 next_qty = max_reg;
968
969 /* Clear out hash table state for this pass. */
970
971 memset (reg_hash, 0, sizeof reg_hash);
972
973 if (cse_reg_info_used_list)
974 {
975 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
976 cse_reg_info_free_list = cse_reg_info_used_list;
977 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
978 }
979 cached_cse_reg_info = 0;
980
981 CLEAR_HARD_REG_SET (hard_regs_in_table);
982
983 /* The per-quantity values used to be initialized here, but it is
984 much faster to initialize each as it is made in `make_new_qty'. */
985
986 for (i = 0; i < HASH_SIZE; i++)
987 {
988 struct table_elt *first;
989
990 first = table[i];
991 if (first != NULL)
992 {
993 struct table_elt *last = first;
994
995 table[i] = NULL;
996
997 while (last->next_same_hash != NULL)
998 last = last->next_same_hash;
999
1000 /* Now relink this hash entire chain into
1001 the free element list. */
1002
1003 last->next_same_hash = free_element_chain;
1004 free_element_chain = first;
1005 }
1006 }
1007
1008 #ifdef HAVE_cc0
1009 prev_insn = 0;
1010 prev_insn_cc0 = 0;
1011 #endif
1012 }
1013
1014 /* Say that register REG contains a quantity in mode MODE not in any
1015 register before and initialize that quantity. */
1016
1017 static void
1018 make_new_qty (unsigned int reg, enum machine_mode mode)
1019 {
1020 int q;
1021 struct qty_table_elem *ent;
1022 struct reg_eqv_elem *eqv;
1023
1024 if (next_qty >= max_qty)
1025 abort ();
1026
1027 q = REG_QTY (reg) = next_qty++;
1028 ent = &qty_table[q];
1029 ent->first_reg = reg;
1030 ent->last_reg = reg;
1031 ent->mode = mode;
1032 ent->const_rtx = ent->const_insn = NULL_RTX;
1033 ent->comparison_code = UNKNOWN;
1034
1035 eqv = &reg_eqv_table[reg];
1036 eqv->next = eqv->prev = -1;
1037 }
1038
1039 /* Make reg NEW equivalent to reg OLD.
1040 OLD is not changing; NEW is. */
1041
1042 static void
1043 make_regs_eqv (unsigned int new, unsigned int old)
1044 {
1045 unsigned int lastr, firstr;
1046 int q = REG_QTY (old);
1047 struct qty_table_elem *ent;
1048
1049 ent = &qty_table[q];
1050
1051 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1052 if (! REGNO_QTY_VALID_P (old))
1053 abort ();
1054
1055 REG_QTY (new) = q;
1056 firstr = ent->first_reg;
1057 lastr = ent->last_reg;
1058
1059 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1060 hard regs. Among pseudos, if NEW will live longer than any other reg
1061 of the same qty, and that is beyond the current basic block,
1062 make it the new canonical replacement for this qty. */
1063 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1064 /* Certain fixed registers might be of the class NO_REGS. This means
1065 that not only can they not be allocated by the compiler, but
1066 they cannot be used in substitutions or canonicalizations
1067 either. */
1068 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1069 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1070 || (new >= FIRST_PSEUDO_REGISTER
1071 && (firstr < FIRST_PSEUDO_REGISTER
1072 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1073 || (uid_cuid[REGNO_FIRST_UID (new)]
1074 < cse_basic_block_start))
1075 && (uid_cuid[REGNO_LAST_UID (new)]
1076 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1077 {
1078 reg_eqv_table[firstr].prev = new;
1079 reg_eqv_table[new].next = firstr;
1080 reg_eqv_table[new].prev = -1;
1081 ent->first_reg = new;
1082 }
1083 else
1084 {
1085 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1086 Otherwise, insert before any non-fixed hard regs that are at the
1087 end. Registers of class NO_REGS cannot be used as an
1088 equivalent for anything. */
1089 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1090 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1091 && new >= FIRST_PSEUDO_REGISTER)
1092 lastr = reg_eqv_table[lastr].prev;
1093 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1094 if (reg_eqv_table[lastr].next >= 0)
1095 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1096 else
1097 qty_table[q].last_reg = new;
1098 reg_eqv_table[lastr].next = new;
1099 reg_eqv_table[new].prev = lastr;
1100 }
1101 }
1102
1103 /* Remove REG from its equivalence class. */
1104
1105 static void
1106 delete_reg_equiv (unsigned int reg)
1107 {
1108 struct qty_table_elem *ent;
1109 int q = REG_QTY (reg);
1110 int p, n;
1111
1112 /* If invalid, do nothing. */
1113 if (q == (int) reg)
1114 return;
1115
1116 ent = &qty_table[q];
1117
1118 p = reg_eqv_table[reg].prev;
1119 n = reg_eqv_table[reg].next;
1120
1121 if (n != -1)
1122 reg_eqv_table[n].prev = p;
1123 else
1124 ent->last_reg = p;
1125 if (p != -1)
1126 reg_eqv_table[p].next = n;
1127 else
1128 ent->first_reg = n;
1129
1130 REG_QTY (reg) = reg;
1131 }
1132
1133 /* Remove any invalid expressions from the hash table
1134 that refer to any of the registers contained in expression X.
1135
1136 Make sure that newly inserted references to those registers
1137 as subexpressions will be considered valid.
1138
1139 mention_regs is not called when a register itself
1140 is being stored in the table.
1141
1142 Return 1 if we have done something that may have changed the hash code
1143 of X. */
1144
1145 static int
1146 mention_regs (rtx x)
1147 {
1148 enum rtx_code code;
1149 int i, j;
1150 const char *fmt;
1151 int changed = 0;
1152
1153 if (x == 0)
1154 return 0;
1155
1156 code = GET_CODE (x);
1157 if (code == REG)
1158 {
1159 unsigned int regno = REGNO (x);
1160 unsigned int endregno
1161 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1162 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1163 unsigned int i;
1164
1165 for (i = regno; i < endregno; i++)
1166 {
1167 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1168 remove_invalid_refs (i);
1169
1170 REG_IN_TABLE (i) = REG_TICK (i);
1171 SUBREG_TICKED (i) = -1;
1172 }
1173
1174 return 0;
1175 }
1176
1177 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1178 pseudo if they don't use overlapping words. We handle only pseudos
1179 here for simplicity. */
1180 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1181 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1182 {
1183 unsigned int i = REGNO (SUBREG_REG (x));
1184
1185 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1186 {
1187 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1188 the last store to this register really stored into this
1189 subreg, then remove the memory of this subreg.
1190 Otherwise, remove any memory of the entire register and
1191 all its subregs from the table. */
1192 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1193 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1194 remove_invalid_refs (i);
1195 else
1196 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1197 }
1198
1199 REG_IN_TABLE (i) = REG_TICK (i);
1200 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1201 return 0;
1202 }
1203
1204 /* If X is a comparison or a COMPARE and either operand is a register
1205 that does not have a quantity, give it one. This is so that a later
1206 call to record_jump_equiv won't cause X to be assigned a different
1207 hash code and not found in the table after that call.
1208
1209 It is not necessary to do this here, since rehash_using_reg can
1210 fix up the table later, but doing this here eliminates the need to
1211 call that expensive function in the most common case where the only
1212 use of the register is in the comparison. */
1213
1214 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1215 {
1216 if (GET_CODE (XEXP (x, 0)) == REG
1217 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1218 if (insert_regs (XEXP (x, 0), NULL, 0))
1219 {
1220 rehash_using_reg (XEXP (x, 0));
1221 changed = 1;
1222 }
1223
1224 if (GET_CODE (XEXP (x, 1)) == REG
1225 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1226 if (insert_regs (XEXP (x, 1), NULL, 0))
1227 {
1228 rehash_using_reg (XEXP (x, 1));
1229 changed = 1;
1230 }
1231 }
1232
1233 fmt = GET_RTX_FORMAT (code);
1234 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1235 if (fmt[i] == 'e')
1236 changed |= mention_regs (XEXP (x, i));
1237 else if (fmt[i] == 'E')
1238 for (j = 0; j < XVECLEN (x, i); j++)
1239 changed |= mention_regs (XVECEXP (x, i, j));
1240
1241 return changed;
1242 }
1243
1244 /* Update the register quantities for inserting X into the hash table
1245 with a value equivalent to CLASSP.
1246 (If the class does not contain a REG, it is irrelevant.)
1247 If MODIFIED is nonzero, X is a destination; it is being modified.
1248 Note that delete_reg_equiv should be called on a register
1249 before insert_regs is done on that register with MODIFIED != 0.
1250
1251 Nonzero value means that elements of reg_qty have changed
1252 so X's hash code may be different. */
1253
1254 static int
1255 insert_regs (rtx x, struct table_elt *classp, int modified)
1256 {
1257 if (GET_CODE (x) == REG)
1258 {
1259 unsigned int regno = REGNO (x);
1260 int qty_valid;
1261
1262 /* If REGNO is in the equivalence table already but is of the
1263 wrong mode for that equivalence, don't do anything here. */
1264
1265 qty_valid = REGNO_QTY_VALID_P (regno);
1266 if (qty_valid)
1267 {
1268 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1269
1270 if (ent->mode != GET_MODE (x))
1271 return 0;
1272 }
1273
1274 if (modified || ! qty_valid)
1275 {
1276 if (classp)
1277 for (classp = classp->first_same_value;
1278 classp != 0;
1279 classp = classp->next_same_value)
1280 if (GET_CODE (classp->exp) == REG
1281 && GET_MODE (classp->exp) == GET_MODE (x))
1282 {
1283 make_regs_eqv (regno, REGNO (classp->exp));
1284 return 1;
1285 }
1286
1287 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1288 than REG_IN_TABLE to find out if there was only a single preceding
1289 invalidation - for the SUBREG - or another one, which would be
1290 for the full register. However, if we find here that REG_TICK
1291 indicates that the register is invalid, it means that it has
1292 been invalidated in a separate operation. The SUBREG might be used
1293 now (then this is a recursive call), or we might use the full REG
1294 now and a SUBREG of it later. So bump up REG_TICK so that
1295 mention_regs will do the right thing. */
1296 if (! modified
1297 && REG_IN_TABLE (regno) >= 0
1298 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1299 REG_TICK (regno)++;
1300 make_new_qty (regno, GET_MODE (x));
1301 return 1;
1302 }
1303
1304 return 0;
1305 }
1306
1307 /* If X is a SUBREG, we will likely be inserting the inner register in the
1308 table. If that register doesn't have an assigned quantity number at
1309 this point but does later, the insertion that we will be doing now will
1310 not be accessible because its hash code will have changed. So assign
1311 a quantity number now. */
1312
1313 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1314 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1315 {
1316 insert_regs (SUBREG_REG (x), NULL, 0);
1317 mention_regs (x);
1318 return 1;
1319 }
1320 else
1321 return mention_regs (x);
1322 }
1323 \f
1324 /* Look in or update the hash table. */
1325
1326 /* Remove table element ELT from use in the table.
1327 HASH is its hash code, made using the HASH macro.
1328 It's an argument because often that is known in advance
1329 and we save much time not recomputing it. */
1330
1331 static void
1332 remove_from_table (struct table_elt *elt, unsigned int hash)
1333 {
1334 if (elt == 0)
1335 return;
1336
1337 /* Mark this element as removed. See cse_insn. */
1338 elt->first_same_value = 0;
1339
1340 /* Remove the table element from its equivalence class. */
1341
1342 {
1343 struct table_elt *prev = elt->prev_same_value;
1344 struct table_elt *next = elt->next_same_value;
1345
1346 if (next)
1347 next->prev_same_value = prev;
1348
1349 if (prev)
1350 prev->next_same_value = next;
1351 else
1352 {
1353 struct table_elt *newfirst = next;
1354 while (next)
1355 {
1356 next->first_same_value = newfirst;
1357 next = next->next_same_value;
1358 }
1359 }
1360 }
1361
1362 /* Remove the table element from its hash bucket. */
1363
1364 {
1365 struct table_elt *prev = elt->prev_same_hash;
1366 struct table_elt *next = elt->next_same_hash;
1367
1368 if (next)
1369 next->prev_same_hash = prev;
1370
1371 if (prev)
1372 prev->next_same_hash = next;
1373 else if (table[hash] == elt)
1374 table[hash] = next;
1375 else
1376 {
1377 /* This entry is not in the proper hash bucket. This can happen
1378 when two classes were merged by `merge_equiv_classes'. Search
1379 for the hash bucket that it heads. This happens only very
1380 rarely, so the cost is acceptable. */
1381 for (hash = 0; hash < HASH_SIZE; hash++)
1382 if (table[hash] == elt)
1383 table[hash] = next;
1384 }
1385 }
1386
1387 /* Remove the table element from its related-value circular chain. */
1388
1389 if (elt->related_value != 0 && elt->related_value != elt)
1390 {
1391 struct table_elt *p = elt->related_value;
1392
1393 while (p->related_value != elt)
1394 p = p->related_value;
1395 p->related_value = elt->related_value;
1396 if (p->related_value == p)
1397 p->related_value = 0;
1398 }
1399
1400 /* Now add it to the free element chain. */
1401 elt->next_same_hash = free_element_chain;
1402 free_element_chain = elt;
1403 }
1404
1405 /* Look up X in the hash table and return its table element,
1406 or 0 if X is not in the table.
1407
1408 MODE is the machine-mode of X, or if X is an integer constant
1409 with VOIDmode then MODE is the mode with which X will be used.
1410
1411 Here we are satisfied to find an expression whose tree structure
1412 looks like X. */
1413
1414 static struct table_elt *
1415 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1416 {
1417 struct table_elt *p;
1418
1419 for (p = table[hash]; p; p = p->next_same_hash)
1420 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1421 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1422 return p;
1423
1424 return 0;
1425 }
1426
1427 /* Like `lookup' but don't care whether the table element uses invalid regs.
1428 Also ignore discrepancies in the machine mode of a register. */
1429
1430 static struct table_elt *
1431 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1432 {
1433 struct table_elt *p;
1434
1435 if (GET_CODE (x) == REG)
1436 {
1437 unsigned int regno = REGNO (x);
1438
1439 /* Don't check the machine mode when comparing registers;
1440 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1441 for (p = table[hash]; p; p = p->next_same_hash)
1442 if (GET_CODE (p->exp) == REG
1443 && REGNO (p->exp) == regno)
1444 return p;
1445 }
1446 else
1447 {
1448 for (p = table[hash]; p; p = p->next_same_hash)
1449 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1450 return p;
1451 }
1452
1453 return 0;
1454 }
1455
1456 /* Look for an expression equivalent to X and with code CODE.
1457 If one is found, return that expression. */
1458
1459 static rtx
1460 lookup_as_function (rtx x, enum rtx_code code)
1461 {
1462 struct table_elt *p
1463 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1464
1465 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1466 long as we are narrowing. So if we looked in vain for a mode narrower
1467 than word_mode before, look for word_mode now. */
1468 if (p == 0 && code == CONST_INT
1469 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1470 {
1471 x = copy_rtx (x);
1472 PUT_MODE (x, word_mode);
1473 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1474 }
1475
1476 if (p == 0)
1477 return 0;
1478
1479 for (p = p->first_same_value; p; p = p->next_same_value)
1480 if (GET_CODE (p->exp) == code
1481 /* Make sure this is a valid entry in the table. */
1482 && exp_equiv_p (p->exp, p->exp, 1, 0))
1483 return p->exp;
1484
1485 return 0;
1486 }
1487
1488 /* Insert X in the hash table, assuming HASH is its hash code
1489 and CLASSP is an element of the class it should go in
1490 (or 0 if a new class should be made).
1491 It is inserted at the proper position to keep the class in
1492 the order cheapest first.
1493
1494 MODE is the machine-mode of X, or if X is an integer constant
1495 with VOIDmode then MODE is the mode with which X will be used.
1496
1497 For elements of equal cheapness, the most recent one
1498 goes in front, except that the first element in the list
1499 remains first unless a cheaper element is added. The order of
1500 pseudo-registers does not matter, as canon_reg will be called to
1501 find the cheapest when a register is retrieved from the table.
1502
1503 The in_memory field in the hash table element is set to 0.
1504 The caller must set it nonzero if appropriate.
1505
1506 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1507 and if insert_regs returns a nonzero value
1508 you must then recompute its hash code before calling here.
1509
1510 If necessary, update table showing constant values of quantities. */
1511
1512 #define CHEAPER(X, Y) \
1513 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1514
1515 static struct table_elt *
1516 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1517 {
1518 struct table_elt *elt;
1519
1520 /* If X is a register and we haven't made a quantity for it,
1521 something is wrong. */
1522 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1523 abort ();
1524
1525 /* If X is a hard register, show it is being put in the table. */
1526 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1527 {
1528 unsigned int regno = REGNO (x);
1529 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1530 unsigned int i;
1531
1532 for (i = regno; i < endregno; i++)
1533 SET_HARD_REG_BIT (hard_regs_in_table, i);
1534 }
1535
1536 /* Put an element for X into the right hash bucket. */
1537
1538 elt = free_element_chain;
1539 if (elt)
1540 free_element_chain = elt->next_same_hash;
1541 else
1542 {
1543 n_elements_made++;
1544 elt = xmalloc (sizeof (struct table_elt));
1545 }
1546
1547 elt->exp = x;
1548 elt->canon_exp = NULL_RTX;
1549 elt->cost = COST (x);
1550 elt->regcost = approx_reg_cost (x);
1551 elt->next_same_value = 0;
1552 elt->prev_same_value = 0;
1553 elt->next_same_hash = table[hash];
1554 elt->prev_same_hash = 0;
1555 elt->related_value = 0;
1556 elt->in_memory = 0;
1557 elt->mode = mode;
1558 elt->is_const = (CONSTANT_P (x)
1559 /* GNU C++ takes advantage of this for `this'
1560 (and other const values). */
1561 || (GET_CODE (x) == REG
1562 && RTX_UNCHANGING_P (x)
1563 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1564 || fixed_base_plus_p (x));
1565
1566 if (table[hash])
1567 table[hash]->prev_same_hash = elt;
1568 table[hash] = elt;
1569
1570 /* Put it into the proper value-class. */
1571 if (classp)
1572 {
1573 classp = classp->first_same_value;
1574 if (CHEAPER (elt, classp))
1575 /* Insert at the head of the class. */
1576 {
1577 struct table_elt *p;
1578 elt->next_same_value = classp;
1579 classp->prev_same_value = elt;
1580 elt->first_same_value = elt;
1581
1582 for (p = classp; p; p = p->next_same_value)
1583 p->first_same_value = elt;
1584 }
1585 else
1586 {
1587 /* Insert not at head of the class. */
1588 /* Put it after the last element cheaper than X. */
1589 struct table_elt *p, *next;
1590
1591 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1592 p = next);
1593
1594 /* Put it after P and before NEXT. */
1595 elt->next_same_value = next;
1596 if (next)
1597 next->prev_same_value = elt;
1598
1599 elt->prev_same_value = p;
1600 p->next_same_value = elt;
1601 elt->first_same_value = classp;
1602 }
1603 }
1604 else
1605 elt->first_same_value = elt;
1606
1607 /* If this is a constant being set equivalent to a register or a register
1608 being set equivalent to a constant, note the constant equivalence.
1609
1610 If this is a constant, it cannot be equivalent to a different constant,
1611 and a constant is the only thing that can be cheaper than a register. So
1612 we know the register is the head of the class (before the constant was
1613 inserted).
1614
1615 If this is a register that is not already known equivalent to a
1616 constant, we must check the entire class.
1617
1618 If this is a register that is already known equivalent to an insn,
1619 update the qtys `const_insn' to show that `this_insn' is the latest
1620 insn making that quantity equivalent to the constant. */
1621
1622 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1623 && GET_CODE (x) != REG)
1624 {
1625 int exp_q = REG_QTY (REGNO (classp->exp));
1626 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1627
1628 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1629 exp_ent->const_insn = this_insn;
1630 }
1631
1632 else if (GET_CODE (x) == REG
1633 && classp
1634 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1635 && ! elt->is_const)
1636 {
1637 struct table_elt *p;
1638
1639 for (p = classp; p != 0; p = p->next_same_value)
1640 {
1641 if (p->is_const && GET_CODE (p->exp) != REG)
1642 {
1643 int x_q = REG_QTY (REGNO (x));
1644 struct qty_table_elem *x_ent = &qty_table[x_q];
1645
1646 x_ent->const_rtx
1647 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1648 x_ent->const_insn = this_insn;
1649 break;
1650 }
1651 }
1652 }
1653
1654 else if (GET_CODE (x) == REG
1655 && qty_table[REG_QTY (REGNO (x))].const_rtx
1656 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1657 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1658
1659 /* If this is a constant with symbolic value,
1660 and it has a term with an explicit integer value,
1661 link it up with related expressions. */
1662 if (GET_CODE (x) == CONST)
1663 {
1664 rtx subexp = get_related_value (x);
1665 unsigned subhash;
1666 struct table_elt *subelt, *subelt_prev;
1667
1668 if (subexp != 0)
1669 {
1670 /* Get the integer-free subexpression in the hash table. */
1671 subhash = safe_hash (subexp, mode) & HASH_MASK;
1672 subelt = lookup (subexp, subhash, mode);
1673 if (subelt == 0)
1674 subelt = insert (subexp, NULL, subhash, mode);
1675 /* Initialize SUBELT's circular chain if it has none. */
1676 if (subelt->related_value == 0)
1677 subelt->related_value = subelt;
1678 /* Find the element in the circular chain that precedes SUBELT. */
1679 subelt_prev = subelt;
1680 while (subelt_prev->related_value != subelt)
1681 subelt_prev = subelt_prev->related_value;
1682 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1683 This way the element that follows SUBELT is the oldest one. */
1684 elt->related_value = subelt_prev->related_value;
1685 subelt_prev->related_value = elt;
1686 }
1687 }
1688
1689 return elt;
1690 }
1691 \f
1692 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1693 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1694 the two classes equivalent.
1695
1696 CLASS1 will be the surviving class; CLASS2 should not be used after this
1697 call.
1698
1699 Any invalid entries in CLASS2 will not be copied. */
1700
1701 static void
1702 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1703 {
1704 struct table_elt *elt, *next, *new;
1705
1706 /* Ensure we start with the head of the classes. */
1707 class1 = class1->first_same_value;
1708 class2 = class2->first_same_value;
1709
1710 /* If they were already equal, forget it. */
1711 if (class1 == class2)
1712 return;
1713
1714 for (elt = class2; elt; elt = next)
1715 {
1716 unsigned int hash;
1717 rtx exp = elt->exp;
1718 enum machine_mode mode = elt->mode;
1719
1720 next = elt->next_same_value;
1721
1722 /* Remove old entry, make a new one in CLASS1's class.
1723 Don't do this for invalid entries as we cannot find their
1724 hash code (it also isn't necessary). */
1725 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1726 {
1727 hash_arg_in_memory = 0;
1728 hash = HASH (exp, mode);
1729
1730 if (GET_CODE (exp) == REG)
1731 delete_reg_equiv (REGNO (exp));
1732
1733 remove_from_table (elt, hash);
1734
1735 if (insert_regs (exp, class1, 0))
1736 {
1737 rehash_using_reg (exp);
1738 hash = HASH (exp, mode);
1739 }
1740 new = insert (exp, class1, hash, mode);
1741 new->in_memory = hash_arg_in_memory;
1742 }
1743 }
1744 }
1745 \f
1746 /* Flush the entire hash table. */
1747
1748 static void
1749 flush_hash_table (void)
1750 {
1751 int i;
1752 struct table_elt *p;
1753
1754 for (i = 0; i < HASH_SIZE; i++)
1755 for (p = table[i]; p; p = table[i])
1756 {
1757 /* Note that invalidate can remove elements
1758 after P in the current hash chain. */
1759 if (GET_CODE (p->exp) == REG)
1760 invalidate (p->exp, p->mode);
1761 else
1762 remove_from_table (p, i);
1763 }
1764 }
1765 \f
1766 /* Function called for each rtx to check whether true dependence exist. */
1767 struct check_dependence_data
1768 {
1769 enum machine_mode mode;
1770 rtx exp;
1771 rtx addr;
1772 };
1773
1774 static int
1775 check_dependence (rtx *x, void *data)
1776 {
1777 struct check_dependence_data *d = (struct check_dependence_data *) data;
1778 if (*x && GET_CODE (*x) == MEM)
1779 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1780 cse_rtx_varies_p);
1781 else
1782 return 0;
1783 }
1784 \f
1785 /* Remove from the hash table, or mark as invalid, all expressions whose
1786 values could be altered by storing in X. X is a register, a subreg, or
1787 a memory reference with nonvarying address (because, when a memory
1788 reference with a varying address is stored in, all memory references are
1789 removed by invalidate_memory so specific invalidation is superfluous).
1790 FULL_MODE, if not VOIDmode, indicates that this much should be
1791 invalidated instead of just the amount indicated by the mode of X. This
1792 is only used for bitfield stores into memory.
1793
1794 A nonvarying address may be just a register or just a symbol reference,
1795 or it may be either of those plus a numeric offset. */
1796
1797 static void
1798 invalidate (rtx x, enum machine_mode full_mode)
1799 {
1800 int i;
1801 struct table_elt *p;
1802 rtx addr;
1803
1804 switch (GET_CODE (x))
1805 {
1806 case REG:
1807 {
1808 /* If X is a register, dependencies on its contents are recorded
1809 through the qty number mechanism. Just change the qty number of
1810 the register, mark it as invalid for expressions that refer to it,
1811 and remove it itself. */
1812 unsigned int regno = REGNO (x);
1813 unsigned int hash = HASH (x, GET_MODE (x));
1814
1815 /* Remove REGNO from any quantity list it might be on and indicate
1816 that its value might have changed. If it is a pseudo, remove its
1817 entry from the hash table.
1818
1819 For a hard register, we do the first two actions above for any
1820 additional hard registers corresponding to X. Then, if any of these
1821 registers are in the table, we must remove any REG entries that
1822 overlap these registers. */
1823
1824 delete_reg_equiv (regno);
1825 REG_TICK (regno)++;
1826 SUBREG_TICKED (regno) = -1;
1827
1828 if (regno >= FIRST_PSEUDO_REGISTER)
1829 {
1830 /* Because a register can be referenced in more than one mode,
1831 we might have to remove more than one table entry. */
1832 struct table_elt *elt;
1833
1834 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1835 remove_from_table (elt, hash);
1836 }
1837 else
1838 {
1839 HOST_WIDE_INT in_table
1840 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1841 unsigned int endregno
1842 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1843 unsigned int tregno, tendregno, rn;
1844 struct table_elt *p, *next;
1845
1846 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1847
1848 for (rn = regno + 1; rn < endregno; rn++)
1849 {
1850 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1851 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1852 delete_reg_equiv (rn);
1853 REG_TICK (rn)++;
1854 SUBREG_TICKED (rn) = -1;
1855 }
1856
1857 if (in_table)
1858 for (hash = 0; hash < HASH_SIZE; hash++)
1859 for (p = table[hash]; p; p = next)
1860 {
1861 next = p->next_same_hash;
1862
1863 if (GET_CODE (p->exp) != REG
1864 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1865 continue;
1866
1867 tregno = REGNO (p->exp);
1868 tendregno
1869 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1870 if (tendregno > regno && tregno < endregno)
1871 remove_from_table (p, hash);
1872 }
1873 }
1874 }
1875 return;
1876
1877 case SUBREG:
1878 invalidate (SUBREG_REG (x), VOIDmode);
1879 return;
1880
1881 case PARALLEL:
1882 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1883 invalidate (XVECEXP (x, 0, i), VOIDmode);
1884 return;
1885
1886 case EXPR_LIST:
1887 /* This is part of a disjoint return value; extract the location in
1888 question ignoring the offset. */
1889 invalidate (XEXP (x, 0), VOIDmode);
1890 return;
1891
1892 case MEM:
1893 addr = canon_rtx (get_addr (XEXP (x, 0)));
1894 /* Calculate the canonical version of X here so that
1895 true_dependence doesn't generate new RTL for X on each call. */
1896 x = canon_rtx (x);
1897
1898 /* Remove all hash table elements that refer to overlapping pieces of
1899 memory. */
1900 if (full_mode == VOIDmode)
1901 full_mode = GET_MODE (x);
1902
1903 for (i = 0; i < HASH_SIZE; i++)
1904 {
1905 struct table_elt *next;
1906
1907 for (p = table[i]; p; p = next)
1908 {
1909 next = p->next_same_hash;
1910 if (p->in_memory)
1911 {
1912 struct check_dependence_data d;
1913
1914 /* Just canonicalize the expression once;
1915 otherwise each time we call invalidate
1916 true_dependence will canonicalize the
1917 expression again. */
1918 if (!p->canon_exp)
1919 p->canon_exp = canon_rtx (p->exp);
1920 d.exp = x;
1921 d.addr = addr;
1922 d.mode = full_mode;
1923 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1924 remove_from_table (p, i);
1925 }
1926 }
1927 }
1928 return;
1929
1930 default:
1931 abort ();
1932 }
1933 }
1934 \f
1935 /* Remove all expressions that refer to register REGNO,
1936 since they are already invalid, and we are about to
1937 mark that register valid again and don't want the old
1938 expressions to reappear as valid. */
1939
1940 static void
1941 remove_invalid_refs (unsigned int regno)
1942 {
1943 unsigned int i;
1944 struct table_elt *p, *next;
1945
1946 for (i = 0; i < HASH_SIZE; i++)
1947 for (p = table[i]; p; p = next)
1948 {
1949 next = p->next_same_hash;
1950 if (GET_CODE (p->exp) != REG
1951 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1952 remove_from_table (p, i);
1953 }
1954 }
1955
1956 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1957 and mode MODE. */
1958 static void
1959 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1960 enum machine_mode mode)
1961 {
1962 unsigned int i;
1963 struct table_elt *p, *next;
1964 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1965
1966 for (i = 0; i < HASH_SIZE; i++)
1967 for (p = table[i]; p; p = next)
1968 {
1969 rtx exp = p->exp;
1970 next = p->next_same_hash;
1971
1972 if (GET_CODE (exp) != REG
1973 && (GET_CODE (exp) != SUBREG
1974 || GET_CODE (SUBREG_REG (exp)) != REG
1975 || REGNO (SUBREG_REG (exp)) != regno
1976 || (((SUBREG_BYTE (exp)
1977 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1978 && SUBREG_BYTE (exp) <= end))
1979 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1980 remove_from_table (p, i);
1981 }
1982 }
1983 \f
1984 /* Recompute the hash codes of any valid entries in the hash table that
1985 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1986
1987 This is called when we make a jump equivalence. */
1988
1989 static void
1990 rehash_using_reg (rtx x)
1991 {
1992 unsigned int i;
1993 struct table_elt *p, *next;
1994 unsigned hash;
1995
1996 if (GET_CODE (x) == SUBREG)
1997 x = SUBREG_REG (x);
1998
1999 /* If X is not a register or if the register is known not to be in any
2000 valid entries in the table, we have no work to do. */
2001
2002 if (GET_CODE (x) != REG
2003 || REG_IN_TABLE (REGNO (x)) < 0
2004 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2005 return;
2006
2007 /* Scan all hash chains looking for valid entries that mention X.
2008 If we find one and it is in the wrong hash chain, move it. We can skip
2009 objects that are registers, since they are handled specially. */
2010
2011 for (i = 0; i < HASH_SIZE; i++)
2012 for (p = table[i]; p; p = next)
2013 {
2014 next = p->next_same_hash;
2015 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2016 && exp_equiv_p (p->exp, p->exp, 1, 0)
2017 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2018 {
2019 if (p->next_same_hash)
2020 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2021
2022 if (p->prev_same_hash)
2023 p->prev_same_hash->next_same_hash = p->next_same_hash;
2024 else
2025 table[i] = p->next_same_hash;
2026
2027 p->next_same_hash = table[hash];
2028 p->prev_same_hash = 0;
2029 if (table[hash])
2030 table[hash]->prev_same_hash = p;
2031 table[hash] = p;
2032 }
2033 }
2034 }
2035 \f
2036 /* Remove from the hash table any expression that is a call-clobbered
2037 register. Also update their TICK values. */
2038
2039 static void
2040 invalidate_for_call (void)
2041 {
2042 unsigned int regno, endregno;
2043 unsigned int i;
2044 unsigned hash;
2045 struct table_elt *p, *next;
2046 int in_table = 0;
2047
2048 /* Go through all the hard registers. For each that is clobbered in
2049 a CALL_INSN, remove the register from quantity chains and update
2050 reg_tick if defined. Also see if any of these registers is currently
2051 in the table. */
2052
2053 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2054 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2055 {
2056 delete_reg_equiv (regno);
2057 if (REG_TICK (regno) >= 0)
2058 {
2059 REG_TICK (regno)++;
2060 SUBREG_TICKED (regno) = -1;
2061 }
2062
2063 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2064 }
2065
2066 /* In the case where we have no call-clobbered hard registers in the
2067 table, we are done. Otherwise, scan the table and remove any
2068 entry that overlaps a call-clobbered register. */
2069
2070 if (in_table)
2071 for (hash = 0; hash < HASH_SIZE; hash++)
2072 for (p = table[hash]; p; p = next)
2073 {
2074 next = p->next_same_hash;
2075
2076 if (GET_CODE (p->exp) != REG
2077 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2078 continue;
2079
2080 regno = REGNO (p->exp);
2081 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2082
2083 for (i = regno; i < endregno; i++)
2084 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2085 {
2086 remove_from_table (p, hash);
2087 break;
2088 }
2089 }
2090 }
2091 \f
2092 /* Given an expression X of type CONST,
2093 and ELT which is its table entry (or 0 if it
2094 is not in the hash table),
2095 return an alternate expression for X as a register plus integer.
2096 If none can be found, return 0. */
2097
2098 static rtx
2099 use_related_value (rtx x, struct table_elt *elt)
2100 {
2101 struct table_elt *relt = 0;
2102 struct table_elt *p, *q;
2103 HOST_WIDE_INT offset;
2104
2105 /* First, is there anything related known?
2106 If we have a table element, we can tell from that.
2107 Otherwise, must look it up. */
2108
2109 if (elt != 0 && elt->related_value != 0)
2110 relt = elt;
2111 else if (elt == 0 && GET_CODE (x) == CONST)
2112 {
2113 rtx subexp = get_related_value (x);
2114 if (subexp != 0)
2115 relt = lookup (subexp,
2116 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2117 GET_MODE (subexp));
2118 }
2119
2120 if (relt == 0)
2121 return 0;
2122
2123 /* Search all related table entries for one that has an
2124 equivalent register. */
2125
2126 p = relt;
2127 while (1)
2128 {
2129 /* This loop is strange in that it is executed in two different cases.
2130 The first is when X is already in the table. Then it is searching
2131 the RELATED_VALUE list of X's class (RELT). The second case is when
2132 X is not in the table. Then RELT points to a class for the related
2133 value.
2134
2135 Ensure that, whatever case we are in, that we ignore classes that have
2136 the same value as X. */
2137
2138 if (rtx_equal_p (x, p->exp))
2139 q = 0;
2140 else
2141 for (q = p->first_same_value; q; q = q->next_same_value)
2142 if (GET_CODE (q->exp) == REG)
2143 break;
2144
2145 if (q)
2146 break;
2147
2148 p = p->related_value;
2149
2150 /* We went all the way around, so there is nothing to be found.
2151 Alternatively, perhaps RELT was in the table for some other reason
2152 and it has no related values recorded. */
2153 if (p == relt || p == 0)
2154 break;
2155 }
2156
2157 if (q == 0)
2158 return 0;
2159
2160 offset = (get_integer_term (x) - get_integer_term (p->exp));
2161 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2162 return plus_constant (q->exp, offset);
2163 }
2164 \f
2165 /* Hash a string. Just add its bytes up. */
2166 static inline unsigned
2167 canon_hash_string (const char *ps)
2168 {
2169 unsigned hash = 0;
2170 const unsigned char *p = (const unsigned char *) ps;
2171
2172 if (p)
2173 while (*p)
2174 hash += *p++;
2175
2176 return hash;
2177 }
2178
2179 /* Hash an rtx. We are careful to make sure the value is never negative.
2180 Equivalent registers hash identically.
2181 MODE is used in hashing for CONST_INTs only;
2182 otherwise the mode of X is used.
2183
2184 Store 1 in do_not_record if any subexpression is volatile.
2185
2186 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2187 which does not have the RTX_UNCHANGING_P bit set.
2188
2189 Note that cse_insn knows that the hash code of a MEM expression
2190 is just (int) MEM plus the hash code of the address. */
2191
2192 static unsigned
2193 canon_hash (rtx x, enum machine_mode mode)
2194 {
2195 int i, j;
2196 unsigned hash = 0;
2197 enum rtx_code code;
2198 const char *fmt;
2199
2200 /* repeat is used to turn tail-recursion into iteration. */
2201 repeat:
2202 if (x == 0)
2203 return hash;
2204
2205 code = GET_CODE (x);
2206 switch (code)
2207 {
2208 case REG:
2209 {
2210 unsigned int regno = REGNO (x);
2211 bool record;
2212
2213 /* On some machines, we can't record any non-fixed hard register,
2214 because extending its life will cause reload problems. We
2215 consider ap, fp, sp, gp to be fixed for this purpose.
2216
2217 We also consider CCmode registers to be fixed for this purpose;
2218 failure to do so leads to failure to simplify 0<100 type of
2219 conditionals.
2220
2221 On all machines, we can't record any global registers.
2222 Nor should we record any register that is in a small
2223 class, as defined by CLASS_LIKELY_SPILLED_P. */
2224
2225 if (regno >= FIRST_PSEUDO_REGISTER)
2226 record = true;
2227 else if (x == frame_pointer_rtx
2228 || x == hard_frame_pointer_rtx
2229 || x == arg_pointer_rtx
2230 || x == stack_pointer_rtx
2231 || x == pic_offset_table_rtx)
2232 record = true;
2233 else if (global_regs[regno])
2234 record = false;
2235 else if (fixed_regs[regno])
2236 record = true;
2237 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2238 record = true;
2239 else if (SMALL_REGISTER_CLASSES)
2240 record = false;
2241 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2242 record = false;
2243 else
2244 record = true;
2245
2246 if (!record)
2247 {
2248 do_not_record = 1;
2249 return 0;
2250 }
2251
2252 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2253 return hash;
2254 }
2255
2256 /* We handle SUBREG of a REG specially because the underlying
2257 reg changes its hash value with every value change; we don't
2258 want to have to forget unrelated subregs when one subreg changes. */
2259 case SUBREG:
2260 {
2261 if (GET_CODE (SUBREG_REG (x)) == REG)
2262 {
2263 hash += (((unsigned) SUBREG << 7)
2264 + REGNO (SUBREG_REG (x))
2265 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2266 return hash;
2267 }
2268 break;
2269 }
2270
2271 case CONST_INT:
2272 {
2273 unsigned HOST_WIDE_INT tem = INTVAL (x);
2274 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2275 return hash;
2276 }
2277
2278 case CONST_DOUBLE:
2279 /* This is like the general case, except that it only counts
2280 the integers representing the constant. */
2281 hash += (unsigned) code + (unsigned) GET_MODE (x);
2282 if (GET_MODE (x) != VOIDmode)
2283 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2284 else
2285 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2286 + (unsigned) CONST_DOUBLE_HIGH (x));
2287 return hash;
2288
2289 case CONST_VECTOR:
2290 {
2291 int units;
2292 rtx elt;
2293
2294 units = CONST_VECTOR_NUNITS (x);
2295
2296 for (i = 0; i < units; ++i)
2297 {
2298 elt = CONST_VECTOR_ELT (x, i);
2299 hash += canon_hash (elt, GET_MODE (elt));
2300 }
2301
2302 return hash;
2303 }
2304
2305 /* Assume there is only one rtx object for any given label. */
2306 case LABEL_REF:
2307 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2308 return hash;
2309
2310 case SYMBOL_REF:
2311 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2312 return hash;
2313
2314 case MEM:
2315 /* We don't record if marked volatile or if BLKmode since we don't
2316 know the size of the move. */
2317 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2318 {
2319 do_not_record = 1;
2320 return 0;
2321 }
2322 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2323 hash_arg_in_memory = 1;
2324
2325 /* Now that we have already found this special case,
2326 might as well speed it up as much as possible. */
2327 hash += (unsigned) MEM;
2328 x = XEXP (x, 0);
2329 goto repeat;
2330
2331 case USE:
2332 /* A USE that mentions non-volatile memory needs special
2333 handling since the MEM may be BLKmode which normally
2334 prevents an entry from being made. Pure calls are
2335 marked by a USE which mentions BLKmode memory. */
2336 if (GET_CODE (XEXP (x, 0)) == MEM
2337 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2338 {
2339 hash += (unsigned) USE;
2340 x = XEXP (x, 0);
2341
2342 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2343 hash_arg_in_memory = 1;
2344
2345 /* Now that we have already found this special case,
2346 might as well speed it up as much as possible. */
2347 hash += (unsigned) MEM;
2348 x = XEXP (x, 0);
2349 goto repeat;
2350 }
2351 break;
2352
2353 case PRE_DEC:
2354 case PRE_INC:
2355 case POST_DEC:
2356 case POST_INC:
2357 case PRE_MODIFY:
2358 case POST_MODIFY:
2359 case PC:
2360 case CC0:
2361 case CALL:
2362 case UNSPEC_VOLATILE:
2363 do_not_record = 1;
2364 return 0;
2365
2366 case ASM_OPERANDS:
2367 if (MEM_VOLATILE_P (x))
2368 {
2369 do_not_record = 1;
2370 return 0;
2371 }
2372 else
2373 {
2374 /* We don't want to take the filename and line into account. */
2375 hash += (unsigned) code + (unsigned) GET_MODE (x)
2376 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2377 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2378 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2379
2380 if (ASM_OPERANDS_INPUT_LENGTH (x))
2381 {
2382 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2383 {
2384 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2385 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2386 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2387 (x, i)));
2388 }
2389
2390 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2391 x = ASM_OPERANDS_INPUT (x, 0);
2392 mode = GET_MODE (x);
2393 goto repeat;
2394 }
2395
2396 return hash;
2397 }
2398 break;
2399
2400 default:
2401 break;
2402 }
2403
2404 i = GET_RTX_LENGTH (code) - 1;
2405 hash += (unsigned) code + (unsigned) GET_MODE (x);
2406 fmt = GET_RTX_FORMAT (code);
2407 for (; i >= 0; i--)
2408 {
2409 if (fmt[i] == 'e')
2410 {
2411 rtx tem = XEXP (x, i);
2412
2413 /* If we are about to do the last recursive call
2414 needed at this level, change it into iteration.
2415 This function is called enough to be worth it. */
2416 if (i == 0)
2417 {
2418 x = tem;
2419 goto repeat;
2420 }
2421 hash += canon_hash (tem, 0);
2422 }
2423 else if (fmt[i] == 'E')
2424 for (j = 0; j < XVECLEN (x, i); j++)
2425 hash += canon_hash (XVECEXP (x, i, j), 0);
2426 else if (fmt[i] == 's')
2427 hash += canon_hash_string (XSTR (x, i));
2428 else if (fmt[i] == 'i')
2429 {
2430 unsigned tem = XINT (x, i);
2431 hash += tem;
2432 }
2433 else if (fmt[i] == '0' || fmt[i] == 't')
2434 /* Unused. */
2435 ;
2436 else
2437 abort ();
2438 }
2439 return hash;
2440 }
2441
2442 /* Like canon_hash but with no side effects. */
2443
2444 static unsigned
2445 safe_hash (rtx x, enum machine_mode mode)
2446 {
2447 int save_do_not_record = do_not_record;
2448 int save_hash_arg_in_memory = hash_arg_in_memory;
2449 unsigned hash = canon_hash (x, mode);
2450 hash_arg_in_memory = save_hash_arg_in_memory;
2451 do_not_record = save_do_not_record;
2452 return hash;
2453 }
2454 \f
2455 /* Return 1 iff X and Y would canonicalize into the same thing,
2456 without actually constructing the canonicalization of either one.
2457 If VALIDATE is nonzero,
2458 we assume X is an expression being processed from the rtl
2459 and Y was found in the hash table. We check register refs
2460 in Y for being marked as valid.
2461
2462 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2463 that is known to be in the register. Ordinarily, we don't allow them
2464 to match, because letting them match would cause unpredictable results
2465 in all the places that search a hash table chain for an equivalent
2466 for a given value. A possible equivalent that has different structure
2467 has its hash code computed from different data. Whether the hash code
2468 is the same as that of the given value is pure luck. */
2469
2470 static int
2471 exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
2472 {
2473 int i, j;
2474 enum rtx_code code;
2475 const char *fmt;
2476
2477 /* Note: it is incorrect to assume an expression is equivalent to itself
2478 if VALIDATE is nonzero. */
2479 if (x == y && !validate)
2480 return 1;
2481 if (x == 0 || y == 0)
2482 return x == y;
2483
2484 code = GET_CODE (x);
2485 if (code != GET_CODE (y))
2486 {
2487 if (!equal_values)
2488 return 0;
2489
2490 /* If X is a constant and Y is a register or vice versa, they may be
2491 equivalent. We only have to validate if Y is a register. */
2492 if (CONSTANT_P (x) && GET_CODE (y) == REG
2493 && REGNO_QTY_VALID_P (REGNO (y)))
2494 {
2495 int y_q = REG_QTY (REGNO (y));
2496 struct qty_table_elem *y_ent = &qty_table[y_q];
2497
2498 if (GET_MODE (y) == y_ent->mode
2499 && rtx_equal_p (x, y_ent->const_rtx)
2500 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2501 return 1;
2502 }
2503
2504 if (CONSTANT_P (y) && code == REG
2505 && REGNO_QTY_VALID_P (REGNO (x)))
2506 {
2507 int x_q = REG_QTY (REGNO (x));
2508 struct qty_table_elem *x_ent = &qty_table[x_q];
2509
2510 if (GET_MODE (x) == x_ent->mode
2511 && rtx_equal_p (y, x_ent->const_rtx))
2512 return 1;
2513 }
2514
2515 return 0;
2516 }
2517
2518 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2519 if (GET_MODE (x) != GET_MODE (y))
2520 return 0;
2521
2522 switch (code)
2523 {
2524 case PC:
2525 case CC0:
2526 case CONST_INT:
2527 return x == y;
2528
2529 case LABEL_REF:
2530 return XEXP (x, 0) == XEXP (y, 0);
2531
2532 case SYMBOL_REF:
2533 return XSTR (x, 0) == XSTR (y, 0);
2534
2535 case REG:
2536 {
2537 unsigned int regno = REGNO (y);
2538 unsigned int endregno
2539 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2540 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2541 unsigned int i;
2542
2543 /* If the quantities are not the same, the expressions are not
2544 equivalent. If there are and we are not to validate, they
2545 are equivalent. Otherwise, ensure all regs are up-to-date. */
2546
2547 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2548 return 0;
2549
2550 if (! validate)
2551 return 1;
2552
2553 for (i = regno; i < endregno; i++)
2554 if (REG_IN_TABLE (i) != REG_TICK (i))
2555 return 0;
2556
2557 return 1;
2558 }
2559
2560 /* For commutative operations, check both orders. */
2561 case PLUS:
2562 case MULT:
2563 case AND:
2564 case IOR:
2565 case XOR:
2566 case NE:
2567 case EQ:
2568 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2569 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2570 validate, equal_values))
2571 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2572 validate, equal_values)
2573 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2574 validate, equal_values)));
2575
2576 case ASM_OPERANDS:
2577 /* We don't use the generic code below because we want to
2578 disregard filename and line numbers. */
2579
2580 /* A volatile asm isn't equivalent to any other. */
2581 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2582 return 0;
2583
2584 if (GET_MODE (x) != GET_MODE (y)
2585 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2586 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2587 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2588 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2589 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2590 return 0;
2591
2592 if (ASM_OPERANDS_INPUT_LENGTH (x))
2593 {
2594 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2595 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2596 ASM_OPERANDS_INPUT (y, i),
2597 validate, equal_values)
2598 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2599 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2600 return 0;
2601 }
2602
2603 return 1;
2604
2605 default:
2606 break;
2607 }
2608
2609 /* Compare the elements. If any pair of corresponding elements
2610 fail to match, return 0 for the whole things. */
2611
2612 fmt = GET_RTX_FORMAT (code);
2613 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2614 {
2615 switch (fmt[i])
2616 {
2617 case 'e':
2618 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2619 return 0;
2620 break;
2621
2622 case 'E':
2623 if (XVECLEN (x, i) != XVECLEN (y, i))
2624 return 0;
2625 for (j = 0; j < XVECLEN (x, i); j++)
2626 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2627 validate, equal_values))
2628 return 0;
2629 break;
2630
2631 case 's':
2632 if (strcmp (XSTR (x, i), XSTR (y, i)))
2633 return 0;
2634 break;
2635
2636 case 'i':
2637 if (XINT (x, i) != XINT (y, i))
2638 return 0;
2639 break;
2640
2641 case 'w':
2642 if (XWINT (x, i) != XWINT (y, i))
2643 return 0;
2644 break;
2645
2646 case '0':
2647 case 't':
2648 break;
2649
2650 default:
2651 abort ();
2652 }
2653 }
2654
2655 return 1;
2656 }
2657 \f
2658 /* Return 1 if X has a value that can vary even between two
2659 executions of the program. 0 means X can be compared reliably
2660 against certain constants or near-constants. */
2661
2662 static int
2663 cse_rtx_varies_p (rtx x, int from_alias)
2664 {
2665 /* We need not check for X and the equivalence class being of the same
2666 mode because if X is equivalent to a constant in some mode, it
2667 doesn't vary in any mode. */
2668
2669 if (GET_CODE (x) == REG
2670 && REGNO_QTY_VALID_P (REGNO (x)))
2671 {
2672 int x_q = REG_QTY (REGNO (x));
2673 struct qty_table_elem *x_ent = &qty_table[x_q];
2674
2675 if (GET_MODE (x) == x_ent->mode
2676 && x_ent->const_rtx != NULL_RTX)
2677 return 0;
2678 }
2679
2680 if (GET_CODE (x) == PLUS
2681 && GET_CODE (XEXP (x, 1)) == CONST_INT
2682 && GET_CODE (XEXP (x, 0)) == REG
2683 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2684 {
2685 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2686 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2687
2688 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2689 && x0_ent->const_rtx != NULL_RTX)
2690 return 0;
2691 }
2692
2693 /* This can happen as the result of virtual register instantiation, if
2694 the initial constant is too large to be a valid address. This gives
2695 us a three instruction sequence, load large offset into a register,
2696 load fp minus a constant into a register, then a MEM which is the
2697 sum of the two `constant' registers. */
2698 if (GET_CODE (x) == PLUS
2699 && GET_CODE (XEXP (x, 0)) == REG
2700 && GET_CODE (XEXP (x, 1)) == REG
2701 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2702 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2703 {
2704 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2705 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2706 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2707 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2708
2709 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2710 && x0_ent->const_rtx != NULL_RTX
2711 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2712 && x1_ent->const_rtx != NULL_RTX)
2713 return 0;
2714 }
2715
2716 return rtx_varies_p (x, from_alias);
2717 }
2718 \f
2719 /* Canonicalize an expression:
2720 replace each register reference inside it
2721 with the "oldest" equivalent register.
2722
2723 If INSN is nonzero and we are replacing a pseudo with a hard register
2724 or vice versa, validate_change is used to ensure that INSN remains valid
2725 after we make our substitution. The calls are made with IN_GROUP nonzero
2726 so apply_change_group must be called upon the outermost return from this
2727 function (unless INSN is zero). The result of apply_change_group can
2728 generally be discarded since the changes we are making are optional. */
2729
2730 static rtx
2731 canon_reg (rtx x, rtx insn)
2732 {
2733 int i;
2734 enum rtx_code code;
2735 const char *fmt;
2736
2737 if (x == 0)
2738 return x;
2739
2740 code = GET_CODE (x);
2741 switch (code)
2742 {
2743 case PC:
2744 case CC0:
2745 case CONST:
2746 case CONST_INT:
2747 case CONST_DOUBLE:
2748 case CONST_VECTOR:
2749 case SYMBOL_REF:
2750 case LABEL_REF:
2751 case ADDR_VEC:
2752 case ADDR_DIFF_VEC:
2753 return x;
2754
2755 case REG:
2756 {
2757 int first;
2758 int q;
2759 struct qty_table_elem *ent;
2760
2761 /* Never replace a hard reg, because hard regs can appear
2762 in more than one machine mode, and we must preserve the mode
2763 of each occurrence. Also, some hard regs appear in
2764 MEMs that are shared and mustn't be altered. Don't try to
2765 replace any reg that maps to a reg of class NO_REGS. */
2766 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2767 || ! REGNO_QTY_VALID_P (REGNO (x)))
2768 return x;
2769
2770 q = REG_QTY (REGNO (x));
2771 ent = &qty_table[q];
2772 first = ent->first_reg;
2773 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2774 : REGNO_REG_CLASS (first) == NO_REGS ? x
2775 : gen_rtx_REG (ent->mode, first));
2776 }
2777
2778 default:
2779 break;
2780 }
2781
2782 fmt = GET_RTX_FORMAT (code);
2783 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2784 {
2785 int j;
2786
2787 if (fmt[i] == 'e')
2788 {
2789 rtx new = canon_reg (XEXP (x, i), insn);
2790 int insn_code;
2791
2792 /* If replacing pseudo with hard reg or vice versa, ensure the
2793 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2794 if (insn != 0 && new != 0
2795 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2796 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2797 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2798 || (insn_code = recog_memoized (insn)) < 0
2799 || insn_data[insn_code].n_dups > 0))
2800 validate_change (insn, &XEXP (x, i), new, 1);
2801 else
2802 XEXP (x, i) = new;
2803 }
2804 else if (fmt[i] == 'E')
2805 for (j = 0; j < XVECLEN (x, i); j++)
2806 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2807 }
2808
2809 return x;
2810 }
2811 \f
2812 /* LOC is a location within INSN that is an operand address (the contents of
2813 a MEM). Find the best equivalent address to use that is valid for this
2814 insn.
2815
2816 On most CISC machines, complicated address modes are costly, and rtx_cost
2817 is a good approximation for that cost. However, most RISC machines have
2818 only a few (usually only one) memory reference formats. If an address is
2819 valid at all, it is often just as cheap as any other address. Hence, for
2820 RISC machines, we use `address_cost' to compare the costs of various
2821 addresses. For two addresses of equal cost, choose the one with the
2822 highest `rtx_cost' value as that has the potential of eliminating the
2823 most insns. For equal costs, we choose the first in the equivalence
2824 class. Note that we ignore the fact that pseudo registers are cheaper than
2825 hard registers here because we would also prefer the pseudo registers. */
2826
2827 static void
2828 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2829 {
2830 struct table_elt *elt;
2831 rtx addr = *loc;
2832 struct table_elt *p;
2833 int found_better = 1;
2834 int save_do_not_record = do_not_record;
2835 int save_hash_arg_in_memory = hash_arg_in_memory;
2836 int addr_volatile;
2837 int regno;
2838 unsigned hash;
2839
2840 /* Do not try to replace constant addresses or addresses of local and
2841 argument slots. These MEM expressions are made only once and inserted
2842 in many instructions, as well as being used to control symbol table
2843 output. It is not safe to clobber them.
2844
2845 There are some uncommon cases where the address is already in a register
2846 for some reason, but we cannot take advantage of that because we have
2847 no easy way to unshare the MEM. In addition, looking up all stack
2848 addresses is costly. */
2849 if ((GET_CODE (addr) == PLUS
2850 && GET_CODE (XEXP (addr, 0)) == REG
2851 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2852 && (regno = REGNO (XEXP (addr, 0)),
2853 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2854 || regno == ARG_POINTER_REGNUM))
2855 || (GET_CODE (addr) == REG
2856 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2857 || regno == HARD_FRAME_POINTER_REGNUM
2858 || regno == ARG_POINTER_REGNUM))
2859 || GET_CODE (addr) == ADDRESSOF
2860 || CONSTANT_ADDRESS_P (addr))
2861 return;
2862
2863 /* If this address is not simply a register, try to fold it. This will
2864 sometimes simplify the expression. Many simplifications
2865 will not be valid, but some, usually applying the associative rule, will
2866 be valid and produce better code. */
2867 if (GET_CODE (addr) != REG)
2868 {
2869 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2870 int addr_folded_cost = address_cost (folded, mode);
2871 int addr_cost = address_cost (addr, mode);
2872
2873 if ((addr_folded_cost < addr_cost
2874 || (addr_folded_cost == addr_cost
2875 /* ??? The rtx_cost comparison is left over from an older
2876 version of this code. It is probably no longer helpful. */
2877 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2878 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2879 && validate_change (insn, loc, folded, 0))
2880 addr = folded;
2881 }
2882
2883 /* If this address is not in the hash table, we can't look for equivalences
2884 of the whole address. Also, ignore if volatile. */
2885
2886 do_not_record = 0;
2887 hash = HASH (addr, Pmode);
2888 addr_volatile = do_not_record;
2889 do_not_record = save_do_not_record;
2890 hash_arg_in_memory = save_hash_arg_in_memory;
2891
2892 if (addr_volatile)
2893 return;
2894
2895 elt = lookup (addr, hash, Pmode);
2896
2897 if (elt)
2898 {
2899 /* We need to find the best (under the criteria documented above) entry
2900 in the class that is valid. We use the `flag' field to indicate
2901 choices that were invalid and iterate until we can't find a better
2902 one that hasn't already been tried. */
2903
2904 for (p = elt->first_same_value; p; p = p->next_same_value)
2905 p->flag = 0;
2906
2907 while (found_better)
2908 {
2909 int best_addr_cost = address_cost (*loc, mode);
2910 int best_rtx_cost = (elt->cost + 1) >> 1;
2911 int exp_cost;
2912 struct table_elt *best_elt = elt;
2913
2914 found_better = 0;
2915 for (p = elt->first_same_value; p; p = p->next_same_value)
2916 if (! p->flag)
2917 {
2918 if ((GET_CODE (p->exp) == REG
2919 || exp_equiv_p (p->exp, p->exp, 1, 0))
2920 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2921 || (exp_cost == best_addr_cost
2922 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2923 {
2924 found_better = 1;
2925 best_addr_cost = exp_cost;
2926 best_rtx_cost = (p->cost + 1) >> 1;
2927 best_elt = p;
2928 }
2929 }
2930
2931 if (found_better)
2932 {
2933 if (validate_change (insn, loc,
2934 canon_reg (copy_rtx (best_elt->exp),
2935 NULL_RTX), 0))
2936 return;
2937 else
2938 best_elt->flag = 1;
2939 }
2940 }
2941 }
2942
2943 /* If the address is a binary operation with the first operand a register
2944 and the second a constant, do the same as above, but looking for
2945 equivalences of the register. Then try to simplify before checking for
2946 the best address to use. This catches a few cases: First is when we
2947 have REG+const and the register is another REG+const. We can often merge
2948 the constants and eliminate one insn and one register. It may also be
2949 that a machine has a cheap REG+REG+const. Finally, this improves the
2950 code on the Alpha for unaligned byte stores. */
2951
2952 if (flag_expensive_optimizations
2953 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2954 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2955 && GET_CODE (XEXP (*loc, 0)) == REG)
2956 {
2957 rtx op1 = XEXP (*loc, 1);
2958
2959 do_not_record = 0;
2960 hash = HASH (XEXP (*loc, 0), Pmode);
2961 do_not_record = save_do_not_record;
2962 hash_arg_in_memory = save_hash_arg_in_memory;
2963
2964 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2965 if (elt == 0)
2966 return;
2967
2968 /* We need to find the best (under the criteria documented above) entry
2969 in the class that is valid. We use the `flag' field to indicate
2970 choices that were invalid and iterate until we can't find a better
2971 one that hasn't already been tried. */
2972
2973 for (p = elt->first_same_value; p; p = p->next_same_value)
2974 p->flag = 0;
2975
2976 while (found_better)
2977 {
2978 int best_addr_cost = address_cost (*loc, mode);
2979 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2980 struct table_elt *best_elt = elt;
2981 rtx best_rtx = *loc;
2982 int count;
2983
2984 /* This is at worst case an O(n^2) algorithm, so limit our search
2985 to the first 32 elements on the list. This avoids trouble
2986 compiling code with very long basic blocks that can easily
2987 call simplify_gen_binary so many times that we run out of
2988 memory. */
2989
2990 found_better = 0;
2991 for (p = elt->first_same_value, count = 0;
2992 p && count < 32;
2993 p = p->next_same_value, count++)
2994 if (! p->flag
2995 && (GET_CODE (p->exp) == REG
2996 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2997 {
2998 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2999 p->exp, op1);
3000 int new_cost;
3001 new_cost = address_cost (new, mode);
3002
3003 if (new_cost < best_addr_cost
3004 || (new_cost == best_addr_cost
3005 && (COST (new) + 1) >> 1 > best_rtx_cost))
3006 {
3007 found_better = 1;
3008 best_addr_cost = new_cost;
3009 best_rtx_cost = (COST (new) + 1) >> 1;
3010 best_elt = p;
3011 best_rtx = new;
3012 }
3013 }
3014
3015 if (found_better)
3016 {
3017 if (validate_change (insn, loc,
3018 canon_reg (copy_rtx (best_rtx),
3019 NULL_RTX), 0))
3020 return;
3021 else
3022 best_elt->flag = 1;
3023 }
3024 }
3025 }
3026 }
3027 \f
3028 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3029 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3030 what values are being compared.
3031
3032 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3033 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3034 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3035 compared to produce cc0.
3036
3037 The return value is the comparison operator and is either the code of
3038 A or the code corresponding to the inverse of the comparison. */
3039
3040 static enum rtx_code
3041 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
3042 enum machine_mode *pmode1, enum machine_mode *pmode2)
3043 {
3044 rtx arg1, arg2;
3045
3046 arg1 = *parg1, arg2 = *parg2;
3047
3048 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3049
3050 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3051 {
3052 /* Set nonzero when we find something of interest. */
3053 rtx x = 0;
3054 int reverse_code = 0;
3055 struct table_elt *p = 0;
3056
3057 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3058 On machines with CC0, this is the only case that can occur, since
3059 fold_rtx will return the COMPARE or item being compared with zero
3060 when given CC0. */
3061
3062 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3063 x = arg1;
3064
3065 /* If ARG1 is a comparison operator and CODE is testing for
3066 STORE_FLAG_VALUE, get the inner arguments. */
3067
3068 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3069 {
3070 #ifdef FLOAT_STORE_FLAG_VALUE
3071 REAL_VALUE_TYPE fsfv;
3072 #endif
3073
3074 if (code == NE
3075 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3076 && code == LT && STORE_FLAG_VALUE == -1)
3077 #ifdef FLOAT_STORE_FLAG_VALUE
3078 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3079 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3080 REAL_VALUE_NEGATIVE (fsfv)))
3081 #endif
3082 )
3083 x = arg1;
3084 else if (code == EQ
3085 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3086 && code == GE && STORE_FLAG_VALUE == -1)
3087 #ifdef FLOAT_STORE_FLAG_VALUE
3088 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3089 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3090 REAL_VALUE_NEGATIVE (fsfv)))
3091 #endif
3092 )
3093 x = arg1, reverse_code = 1;
3094 }
3095
3096 /* ??? We could also check for
3097
3098 (ne (and (eq (...) (const_int 1))) (const_int 0))
3099
3100 and related forms, but let's wait until we see them occurring. */
3101
3102 if (x == 0)
3103 /* Look up ARG1 in the hash table and see if it has an equivalence
3104 that lets us see what is being compared. */
3105 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3106 GET_MODE (arg1));
3107 if (p)
3108 {
3109 p = p->first_same_value;
3110
3111 /* If what we compare is already known to be constant, that is as
3112 good as it gets.
3113 We need to break the loop in this case, because otherwise we
3114 can have an infinite loop when looking at a reg that is known
3115 to be a constant which is the same as a comparison of a reg
3116 against zero which appears later in the insn stream, which in
3117 turn is constant and the same as the comparison of the first reg
3118 against zero... */
3119 if (p->is_const)
3120 break;
3121 }
3122
3123 for (; p; p = p->next_same_value)
3124 {
3125 enum machine_mode inner_mode = GET_MODE (p->exp);
3126 #ifdef FLOAT_STORE_FLAG_VALUE
3127 REAL_VALUE_TYPE fsfv;
3128 #endif
3129
3130 /* If the entry isn't valid, skip it. */
3131 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3132 continue;
3133
3134 if (GET_CODE (p->exp) == COMPARE
3135 /* Another possibility is that this machine has a compare insn
3136 that includes the comparison code. In that case, ARG1 would
3137 be equivalent to a comparison operation that would set ARG1 to
3138 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3139 ORIG_CODE is the actual comparison being done; if it is an EQ,
3140 we must reverse ORIG_CODE. On machine with a negative value
3141 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3142 || ((code == NE
3143 || (code == LT
3144 && GET_MODE_CLASS (inner_mode) == MODE_INT
3145 && (GET_MODE_BITSIZE (inner_mode)
3146 <= HOST_BITS_PER_WIDE_INT)
3147 && (STORE_FLAG_VALUE
3148 & ((HOST_WIDE_INT) 1
3149 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3150 #ifdef FLOAT_STORE_FLAG_VALUE
3151 || (code == LT
3152 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3153 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3154 REAL_VALUE_NEGATIVE (fsfv)))
3155 #endif
3156 )
3157 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3158 {
3159 x = p->exp;
3160 break;
3161 }
3162 else if ((code == EQ
3163 || (code == GE
3164 && GET_MODE_CLASS (inner_mode) == MODE_INT
3165 && (GET_MODE_BITSIZE (inner_mode)
3166 <= HOST_BITS_PER_WIDE_INT)
3167 && (STORE_FLAG_VALUE
3168 & ((HOST_WIDE_INT) 1
3169 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3170 #ifdef FLOAT_STORE_FLAG_VALUE
3171 || (code == GE
3172 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3173 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3174 REAL_VALUE_NEGATIVE (fsfv)))
3175 #endif
3176 )
3177 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3178 {
3179 reverse_code = 1;
3180 x = p->exp;
3181 break;
3182 }
3183
3184 /* If this non-trapping address, e.g. fp + constant, the
3185 equivalent is a better operand since it may let us predict
3186 the value of the comparison. */
3187 else if (!rtx_addr_can_trap_p (p->exp))
3188 {
3189 arg1 = p->exp;
3190 continue;
3191 }
3192 }
3193
3194 /* If we didn't find a useful equivalence for ARG1, we are done.
3195 Otherwise, set up for the next iteration. */
3196 if (x == 0)
3197 break;
3198
3199 /* If we need to reverse the comparison, make sure that that is
3200 possible -- we can't necessarily infer the value of GE from LT
3201 with floating-point operands. */
3202 if (reverse_code)
3203 {
3204 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3205 if (reversed == UNKNOWN)
3206 break;
3207 else
3208 code = reversed;
3209 }
3210 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3211 code = GET_CODE (x);
3212 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3213 }
3214
3215 /* Return our results. Return the modes from before fold_rtx
3216 because fold_rtx might produce const_int, and then it's too late. */
3217 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3218 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3219
3220 return code;
3221 }
3222 \f
3223 /* If X is a nontrivial arithmetic operation on an argument
3224 for which a constant value can be determined, return
3225 the result of operating on that value, as a constant.
3226 Otherwise, return X, possibly with one or more operands
3227 modified by recursive calls to this function.
3228
3229 If X is a register whose contents are known, we do NOT
3230 return those contents here. equiv_constant is called to
3231 perform that task.
3232
3233 INSN is the insn that we may be modifying. If it is 0, make a copy
3234 of X before modifying it. */
3235
3236 static rtx
3237 fold_rtx (rtx x, rtx insn)
3238 {
3239 enum rtx_code code;
3240 enum machine_mode mode;
3241 const char *fmt;
3242 int i;
3243 rtx new = 0;
3244 int copied = 0;
3245 int must_swap = 0;
3246
3247 /* Folded equivalents of first two operands of X. */
3248 rtx folded_arg0;
3249 rtx folded_arg1;
3250
3251 /* Constant equivalents of first three operands of X;
3252 0 when no such equivalent is known. */
3253 rtx const_arg0;
3254 rtx const_arg1;
3255 rtx const_arg2;
3256
3257 /* The mode of the first operand of X. We need this for sign and zero
3258 extends. */
3259 enum machine_mode mode_arg0;
3260
3261 if (x == 0)
3262 return x;
3263
3264 mode = GET_MODE (x);
3265 code = GET_CODE (x);
3266 switch (code)
3267 {
3268 case CONST:
3269 case CONST_INT:
3270 case CONST_DOUBLE:
3271 case CONST_VECTOR:
3272 case SYMBOL_REF:
3273 case LABEL_REF:
3274 case REG:
3275 /* No use simplifying an EXPR_LIST
3276 since they are used only for lists of args
3277 in a function call's REG_EQUAL note. */
3278 case EXPR_LIST:
3279 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3280 want to (e.g.,) make (addressof (const_int 0)) just because
3281 the location is known to be zero. */
3282 case ADDRESSOF:
3283 return x;
3284
3285 #ifdef HAVE_cc0
3286 case CC0:
3287 return prev_insn_cc0;
3288 #endif
3289
3290 case PC:
3291 /* If the next insn is a CODE_LABEL followed by a jump table,
3292 PC's value is a LABEL_REF pointing to that label. That
3293 lets us fold switch statements on the VAX. */
3294 {
3295 rtx next;
3296 if (insn && tablejump_p (insn, &next, NULL))
3297 return gen_rtx_LABEL_REF (Pmode, next);
3298 }
3299 break;
3300
3301 case SUBREG:
3302 /* See if we previously assigned a constant value to this SUBREG. */
3303 if ((new = lookup_as_function (x, CONST_INT)) != 0
3304 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3305 return new;
3306
3307 /* If this is a paradoxical SUBREG, we have no idea what value the
3308 extra bits would have. However, if the operand is equivalent
3309 to a SUBREG whose operand is the same as our mode, and all the
3310 modes are within a word, we can just use the inner operand
3311 because these SUBREGs just say how to treat the register.
3312
3313 Similarly if we find an integer constant. */
3314
3315 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3316 {
3317 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3318 struct table_elt *elt;
3319
3320 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3321 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3322 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3323 imode)) != 0)
3324 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3325 {
3326 if (CONSTANT_P (elt->exp)
3327 && GET_MODE (elt->exp) == VOIDmode)
3328 return elt->exp;
3329
3330 if (GET_CODE (elt->exp) == SUBREG
3331 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3332 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3333 return copy_rtx (SUBREG_REG (elt->exp));
3334 }
3335
3336 return x;
3337 }
3338
3339 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3340 We might be able to if the SUBREG is extracting a single word in an
3341 integral mode or extracting the low part. */
3342
3343 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3344 const_arg0 = equiv_constant (folded_arg0);
3345 if (const_arg0)
3346 folded_arg0 = const_arg0;
3347
3348 if (folded_arg0 != SUBREG_REG (x))
3349 {
3350 new = simplify_subreg (mode, folded_arg0,
3351 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3352 if (new)
3353 return new;
3354 }
3355
3356 /* If this is a narrowing SUBREG and our operand is a REG, see if
3357 we can find an equivalence for REG that is an arithmetic operation
3358 in a wider mode where both operands are paradoxical SUBREGs
3359 from objects of our result mode. In that case, we couldn't report
3360 an equivalent value for that operation, since we don't know what the
3361 extra bits will be. But we can find an equivalence for this SUBREG
3362 by folding that operation is the narrow mode. This allows us to
3363 fold arithmetic in narrow modes when the machine only supports
3364 word-sized arithmetic.
3365
3366 Also look for a case where we have a SUBREG whose operand is the
3367 same as our result. If both modes are smaller than a word, we
3368 are simply interpreting a register in different modes and we
3369 can use the inner value. */
3370
3371 if (GET_CODE (folded_arg0) == REG
3372 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3373 && subreg_lowpart_p (x))
3374 {
3375 struct table_elt *elt;
3376
3377 /* We can use HASH here since we know that canon_hash won't be
3378 called. */
3379 elt = lookup (folded_arg0,
3380 HASH (folded_arg0, GET_MODE (folded_arg0)),
3381 GET_MODE (folded_arg0));
3382
3383 if (elt)
3384 elt = elt->first_same_value;
3385
3386 for (; elt; elt = elt->next_same_value)
3387 {
3388 enum rtx_code eltcode = GET_CODE (elt->exp);
3389
3390 /* Just check for unary and binary operations. */
3391 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3392 && GET_CODE (elt->exp) != SIGN_EXTEND
3393 && GET_CODE (elt->exp) != ZERO_EXTEND
3394 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3395 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3396 && (GET_MODE_CLASS (mode)
3397 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3398 {
3399 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3400
3401 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3402 op0 = fold_rtx (op0, NULL_RTX);
3403
3404 op0 = equiv_constant (op0);
3405 if (op0)
3406 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3407 op0, mode);
3408 }
3409 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3410 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3411 && eltcode != DIV && eltcode != MOD
3412 && eltcode != UDIV && eltcode != UMOD
3413 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3414 && eltcode != ROTATE && eltcode != ROTATERT
3415 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3416 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3417 == mode))
3418 || CONSTANT_P (XEXP (elt->exp, 0)))
3419 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3420 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3421 == mode))
3422 || CONSTANT_P (XEXP (elt->exp, 1))))
3423 {
3424 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3425 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3426
3427 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3428 op0 = fold_rtx (op0, NULL_RTX);
3429
3430 if (op0)
3431 op0 = equiv_constant (op0);
3432
3433 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3434 op1 = fold_rtx (op1, NULL_RTX);
3435
3436 if (op1)
3437 op1 = equiv_constant (op1);
3438
3439 /* If we are looking for the low SImode part of
3440 (ashift:DI c (const_int 32)), it doesn't work
3441 to compute that in SImode, because a 32-bit shift
3442 in SImode is unpredictable. We know the value is 0. */
3443 if (op0 && op1
3444 && GET_CODE (elt->exp) == ASHIFT
3445 && GET_CODE (op1) == CONST_INT
3446 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3447 {
3448 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3449
3450 /* If the count fits in the inner mode's width,
3451 but exceeds the outer mode's width,
3452 the value will get truncated to 0
3453 by the subreg. */
3454 new = const0_rtx;
3455 else
3456 /* If the count exceeds even the inner mode's width,
3457 don't fold this expression. */
3458 new = 0;
3459 }
3460 else if (op0 && op1)
3461 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3462 op0, op1);
3463 }
3464
3465 else if (GET_CODE (elt->exp) == SUBREG
3466 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3467 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3468 <= UNITS_PER_WORD)
3469 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3470 new = copy_rtx (SUBREG_REG (elt->exp));
3471
3472 if (new)
3473 return new;
3474 }
3475 }
3476
3477 return x;
3478
3479 case NOT:
3480 case NEG:
3481 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3482 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3483 new = lookup_as_function (XEXP (x, 0), code);
3484 if (new)
3485 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3486 break;
3487
3488 case MEM:
3489 /* If we are not actually processing an insn, don't try to find the
3490 best address. Not only don't we care, but we could modify the
3491 MEM in an invalid way since we have no insn to validate against. */
3492 if (insn != 0)
3493 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3494
3495 {
3496 /* Even if we don't fold in the insn itself,
3497 we can safely do so here, in hopes of getting a constant. */
3498 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3499 rtx base = 0;
3500 HOST_WIDE_INT offset = 0;
3501
3502 if (GET_CODE (addr) == REG
3503 && REGNO_QTY_VALID_P (REGNO (addr)))
3504 {
3505 int addr_q = REG_QTY (REGNO (addr));
3506 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3507
3508 if (GET_MODE (addr) == addr_ent->mode
3509 && addr_ent->const_rtx != NULL_RTX)
3510 addr = addr_ent->const_rtx;
3511 }
3512
3513 /* If address is constant, split it into a base and integer offset. */
3514 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3515 base = addr;
3516 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3517 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3518 {
3519 base = XEXP (XEXP (addr, 0), 0);
3520 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3521 }
3522 else if (GET_CODE (addr) == LO_SUM
3523 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3524 base = XEXP (addr, 1);
3525 else if (GET_CODE (addr) == ADDRESSOF)
3526 return change_address (x, VOIDmode, addr);
3527
3528 /* If this is a constant pool reference, we can fold it into its
3529 constant to allow better value tracking. */
3530 if (base && GET_CODE (base) == SYMBOL_REF
3531 && CONSTANT_POOL_ADDRESS_P (base))
3532 {
3533 rtx constant = get_pool_constant (base);
3534 enum machine_mode const_mode = get_pool_mode (base);
3535 rtx new;
3536
3537 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3538 {
3539 constant_pool_entries_cost = COST (constant);
3540 constant_pool_entries_regcost = approx_reg_cost (constant);
3541 }
3542
3543 /* If we are loading the full constant, we have an equivalence. */
3544 if (offset == 0 && mode == const_mode)
3545 return constant;
3546
3547 /* If this actually isn't a constant (weird!), we can't do
3548 anything. Otherwise, handle the two most common cases:
3549 extracting a word from a multi-word constant, and extracting
3550 the low-order bits. Other cases don't seem common enough to
3551 worry about. */
3552 if (! CONSTANT_P (constant))
3553 return x;
3554
3555 if (GET_MODE_CLASS (mode) == MODE_INT
3556 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3557 && offset % UNITS_PER_WORD == 0
3558 && (new = operand_subword (constant,
3559 offset / UNITS_PER_WORD,
3560 0, const_mode)) != 0)
3561 return new;
3562
3563 if (((BYTES_BIG_ENDIAN
3564 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3565 || (! BYTES_BIG_ENDIAN && offset == 0))
3566 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3567 return new;
3568 }
3569
3570 /* If this is a reference to a label at a known position in a jump
3571 table, we also know its value. */
3572 if (base && GET_CODE (base) == LABEL_REF)
3573 {
3574 rtx label = XEXP (base, 0);
3575 rtx table_insn = NEXT_INSN (label);
3576
3577 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3578 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3579 {
3580 rtx table = PATTERN (table_insn);
3581
3582 if (offset >= 0
3583 && (offset / GET_MODE_SIZE (GET_MODE (table))
3584 < XVECLEN (table, 0)))
3585 return XVECEXP (table, 0,
3586 offset / GET_MODE_SIZE (GET_MODE (table)));
3587 }
3588 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3589 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3590 {
3591 rtx table = PATTERN (table_insn);
3592
3593 if (offset >= 0
3594 && (offset / GET_MODE_SIZE (GET_MODE (table))
3595 < XVECLEN (table, 1)))
3596 {
3597 offset /= GET_MODE_SIZE (GET_MODE (table));
3598 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3599 XEXP (table, 0));
3600
3601 if (GET_MODE (table) != Pmode)
3602 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3603
3604 /* Indicate this is a constant. This isn't a
3605 valid form of CONST, but it will only be used
3606 to fold the next insns and then discarded, so
3607 it should be safe.
3608
3609 Note this expression must be explicitly discarded,
3610 by cse_insn, else it may end up in a REG_EQUAL note
3611 and "escape" to cause problems elsewhere. */
3612 return gen_rtx_CONST (GET_MODE (new), new);
3613 }
3614 }
3615 }
3616
3617 return x;
3618 }
3619
3620 #ifdef NO_FUNCTION_CSE
3621 case CALL:
3622 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3623 return x;
3624 break;
3625 #endif
3626
3627 case ASM_OPERANDS:
3628 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3629 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3630 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3631 break;
3632
3633 default:
3634 break;
3635 }
3636
3637 const_arg0 = 0;
3638 const_arg1 = 0;
3639 const_arg2 = 0;
3640 mode_arg0 = VOIDmode;
3641
3642 /* Try folding our operands.
3643 Then see which ones have constant values known. */
3644
3645 fmt = GET_RTX_FORMAT (code);
3646 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3647 if (fmt[i] == 'e')
3648 {
3649 rtx arg = XEXP (x, i);
3650 rtx folded_arg = arg, const_arg = 0;
3651 enum machine_mode mode_arg = GET_MODE (arg);
3652 rtx cheap_arg, expensive_arg;
3653 rtx replacements[2];
3654 int j;
3655 int old_cost = COST_IN (XEXP (x, i), code);
3656
3657 /* Most arguments are cheap, so handle them specially. */
3658 switch (GET_CODE (arg))
3659 {
3660 case REG:
3661 /* This is the same as calling equiv_constant; it is duplicated
3662 here for speed. */
3663 if (REGNO_QTY_VALID_P (REGNO (arg)))
3664 {
3665 int arg_q = REG_QTY (REGNO (arg));
3666 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3667
3668 if (arg_ent->const_rtx != NULL_RTX
3669 && GET_CODE (arg_ent->const_rtx) != REG
3670 && GET_CODE (arg_ent->const_rtx) != PLUS)
3671 const_arg
3672 = gen_lowpart_if_possible (GET_MODE (arg),
3673 arg_ent->const_rtx);
3674 }
3675 break;
3676
3677 case CONST:
3678 case CONST_INT:
3679 case SYMBOL_REF:
3680 case LABEL_REF:
3681 case CONST_DOUBLE:
3682 case CONST_VECTOR:
3683 const_arg = arg;
3684 break;
3685
3686 #ifdef HAVE_cc0
3687 case CC0:
3688 folded_arg = prev_insn_cc0;
3689 mode_arg = prev_insn_cc0_mode;
3690 const_arg = equiv_constant (folded_arg);
3691 break;
3692 #endif
3693
3694 default:
3695 folded_arg = fold_rtx (arg, insn);
3696 const_arg = equiv_constant (folded_arg);
3697 }
3698
3699 /* For the first three operands, see if the operand
3700 is constant or equivalent to a constant. */
3701 switch (i)
3702 {
3703 case 0:
3704 folded_arg0 = folded_arg;
3705 const_arg0 = const_arg;
3706 mode_arg0 = mode_arg;
3707 break;
3708 case 1:
3709 folded_arg1 = folded_arg;
3710 const_arg1 = const_arg;
3711 break;
3712 case 2:
3713 const_arg2 = const_arg;
3714 break;
3715 }
3716
3717 /* Pick the least expensive of the folded argument and an
3718 equivalent constant argument. */
3719 if (const_arg == 0 || const_arg == folded_arg
3720 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3721 cheap_arg = folded_arg, expensive_arg = const_arg;
3722 else
3723 cheap_arg = const_arg, expensive_arg = folded_arg;
3724
3725 /* Try to replace the operand with the cheapest of the two
3726 possibilities. If it doesn't work and this is either of the first
3727 two operands of a commutative operation, try swapping them.
3728 If THAT fails, try the more expensive, provided it is cheaper
3729 than what is already there. */
3730
3731 if (cheap_arg == XEXP (x, i))
3732 continue;
3733
3734 if (insn == 0 && ! copied)
3735 {
3736 x = copy_rtx (x);
3737 copied = 1;
3738 }
3739
3740 /* Order the replacements from cheapest to most expensive. */
3741 replacements[0] = cheap_arg;
3742 replacements[1] = expensive_arg;
3743
3744 for (j = 0; j < 2 && replacements[j]; j++)
3745 {
3746 int new_cost = COST_IN (replacements[j], code);
3747
3748 /* Stop if what existed before was cheaper. Prefer constants
3749 in the case of a tie. */
3750 if (new_cost > old_cost
3751 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3752 break;
3753
3754 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3755 break;
3756
3757 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3758 || code == LTGT || code == UNEQ || code == ORDERED
3759 || code == UNORDERED)
3760 {
3761 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3762 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3763
3764 if (apply_change_group ())
3765 {
3766 /* Swap them back to be invalid so that this loop can
3767 continue and flag them to be swapped back later. */
3768 rtx tem;
3769
3770 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3771 XEXP (x, 1) = tem;
3772 must_swap = 1;
3773 break;
3774 }
3775 }
3776 }
3777 }
3778
3779 else
3780 {
3781 if (fmt[i] == 'E')
3782 /* Don't try to fold inside of a vector of expressions.
3783 Doing nothing is harmless. */
3784 {;}
3785 }
3786
3787 /* If a commutative operation, place a constant integer as the second
3788 operand unless the first operand is also a constant integer. Otherwise,
3789 place any constant second unless the first operand is also a constant. */
3790
3791 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3792 || code == LTGT || code == UNEQ || code == ORDERED
3793 || code == UNORDERED)
3794 {
3795 if (must_swap
3796 || swap_commutative_operands_p (const_arg0 ? const_arg0
3797 : XEXP (x, 0),
3798 const_arg1 ? const_arg1
3799 : XEXP (x, 1)))
3800 {
3801 rtx tem = XEXP (x, 0);
3802
3803 if (insn == 0 && ! copied)
3804 {
3805 x = copy_rtx (x);
3806 copied = 1;
3807 }
3808
3809 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3810 validate_change (insn, &XEXP (x, 1), tem, 1);
3811 if (apply_change_group ())
3812 {
3813 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3814 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3815 }
3816 }
3817 }
3818
3819 /* If X is an arithmetic operation, see if we can simplify it. */
3820
3821 switch (GET_RTX_CLASS (code))
3822 {
3823 case '1':
3824 {
3825 int is_const = 0;
3826
3827 /* We can't simplify extension ops unless we know the
3828 original mode. */
3829 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3830 && mode_arg0 == VOIDmode)
3831 break;
3832
3833 /* If we had a CONST, strip it off and put it back later if we
3834 fold. */
3835 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3836 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3837
3838 new = simplify_unary_operation (code, mode,
3839 const_arg0 ? const_arg0 : folded_arg0,
3840 mode_arg0);
3841 if (new != 0 && is_const)
3842 new = gen_rtx_CONST (mode, new);
3843 }
3844 break;
3845
3846 case '<':
3847 /* See what items are actually being compared and set FOLDED_ARG[01]
3848 to those values and CODE to the actual comparison code. If any are
3849 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3850 do anything if both operands are already known to be constant. */
3851
3852 if (const_arg0 == 0 || const_arg1 == 0)
3853 {
3854 struct table_elt *p0, *p1;
3855 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3856 enum machine_mode mode_arg1;
3857
3858 #ifdef FLOAT_STORE_FLAG_VALUE
3859 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3860 {
3861 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3862 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3863 false_rtx = CONST0_RTX (mode);
3864 }
3865 #endif
3866
3867 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3868 &mode_arg0, &mode_arg1);
3869 const_arg0 = equiv_constant (folded_arg0);
3870 const_arg1 = equiv_constant (folded_arg1);
3871
3872 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3873 what kinds of things are being compared, so we can't do
3874 anything with this comparison. */
3875
3876 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3877 break;
3878
3879 /* If we do not now have two constants being compared, see
3880 if we can nevertheless deduce some things about the
3881 comparison. */
3882 if (const_arg0 == 0 || const_arg1 == 0)
3883 {
3884 /* Some addresses are known to be nonzero. We don't know
3885 their sign, but equality comparisons are known. */
3886 if (const_arg1 == const0_rtx
3887 && nonzero_address_p (folded_arg0))
3888 {
3889 if (code == EQ)
3890 return false_rtx;
3891 else if (code == NE)
3892 return true_rtx;
3893 }
3894
3895 /* See if the two operands are the same. */
3896
3897 if (folded_arg0 == folded_arg1
3898 || (GET_CODE (folded_arg0) == REG
3899 && GET_CODE (folded_arg1) == REG
3900 && (REG_QTY (REGNO (folded_arg0))
3901 == REG_QTY (REGNO (folded_arg1))))
3902 || ((p0 = lookup (folded_arg0,
3903 (safe_hash (folded_arg0, mode_arg0)
3904 & HASH_MASK), mode_arg0))
3905 && (p1 = lookup (folded_arg1,
3906 (safe_hash (folded_arg1, mode_arg0)
3907 & HASH_MASK), mode_arg0))
3908 && p0->first_same_value == p1->first_same_value))
3909 {
3910 /* Sadly two equal NaNs are not equivalent. */
3911 if (!HONOR_NANS (mode_arg0))
3912 return ((code == EQ || code == LE || code == GE
3913 || code == LEU || code == GEU || code == UNEQ
3914 || code == UNLE || code == UNGE
3915 || code == ORDERED)
3916 ? true_rtx : false_rtx);
3917 /* Take care for the FP compares we can resolve. */
3918 if (code == UNEQ || code == UNLE || code == UNGE)
3919 return true_rtx;
3920 if (code == LTGT || code == LT || code == GT)
3921 return false_rtx;
3922 }
3923
3924 /* If FOLDED_ARG0 is a register, see if the comparison we are
3925 doing now is either the same as we did before or the reverse
3926 (we only check the reverse if not floating-point). */
3927 else if (GET_CODE (folded_arg0) == REG)
3928 {
3929 int qty = REG_QTY (REGNO (folded_arg0));
3930
3931 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3932 {
3933 struct qty_table_elem *ent = &qty_table[qty];
3934
3935 if ((comparison_dominates_p (ent->comparison_code, code)
3936 || (! FLOAT_MODE_P (mode_arg0)
3937 && comparison_dominates_p (ent->comparison_code,
3938 reverse_condition (code))))
3939 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3940 || (const_arg1
3941 && rtx_equal_p (ent->comparison_const,
3942 const_arg1))
3943 || (GET_CODE (folded_arg1) == REG
3944 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3945 return (comparison_dominates_p (ent->comparison_code, code)
3946 ? true_rtx : false_rtx);
3947 }
3948 }
3949 }
3950 }
3951
3952 /* If we are comparing against zero, see if the first operand is
3953 equivalent to an IOR with a constant. If so, we may be able to
3954 determine the result of this comparison. */
3955
3956 if (const_arg1 == const0_rtx)
3957 {
3958 rtx y = lookup_as_function (folded_arg0, IOR);
3959 rtx inner_const;
3960
3961 if (y != 0
3962 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3963 && GET_CODE (inner_const) == CONST_INT
3964 && INTVAL (inner_const) != 0)
3965 {
3966 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3967 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3968 && (INTVAL (inner_const)
3969 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3970 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3971
3972 #ifdef FLOAT_STORE_FLAG_VALUE
3973 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3974 {
3975 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3976 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3977 false_rtx = CONST0_RTX (mode);
3978 }
3979 #endif
3980
3981 switch (code)
3982 {
3983 case EQ:
3984 return false_rtx;
3985 case NE:
3986 return true_rtx;
3987 case LT: case LE:
3988 if (has_sign)
3989 return true_rtx;
3990 break;
3991 case GT: case GE:
3992 if (has_sign)
3993 return false_rtx;
3994 break;
3995 default:
3996 break;
3997 }
3998 }
3999 }
4000
4001 new = simplify_relational_operation (code,
4002 (mode_arg0 != VOIDmode
4003 ? mode_arg0
4004 : (GET_MODE (const_arg0
4005 ? const_arg0
4006 : folded_arg0)
4007 != VOIDmode)
4008 ? GET_MODE (const_arg0
4009 ? const_arg0
4010 : folded_arg0)
4011 : GET_MODE (const_arg1
4012 ? const_arg1
4013 : folded_arg1)),
4014 const_arg0 ? const_arg0 : folded_arg0,
4015 const_arg1 ? const_arg1 : folded_arg1);
4016 #ifdef FLOAT_STORE_FLAG_VALUE
4017 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4018 {
4019 if (new == const0_rtx)
4020 new = CONST0_RTX (mode);
4021 else
4022 new = (CONST_DOUBLE_FROM_REAL_VALUE
4023 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4024 }
4025 #endif
4026 break;
4027
4028 case '2':
4029 case 'c':
4030 switch (code)
4031 {
4032 case PLUS:
4033 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4034 with that LABEL_REF as its second operand. If so, the result is
4035 the first operand of that MINUS. This handles switches with an
4036 ADDR_DIFF_VEC table. */
4037 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4038 {
4039 rtx y
4040 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4041 : lookup_as_function (folded_arg0, MINUS);
4042
4043 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4044 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4045 return XEXP (y, 0);
4046
4047 /* Now try for a CONST of a MINUS like the above. */
4048 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4049 : lookup_as_function (folded_arg0, CONST))) != 0
4050 && GET_CODE (XEXP (y, 0)) == MINUS
4051 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4052 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4053 return XEXP (XEXP (y, 0), 0);
4054 }
4055
4056 /* Likewise if the operands are in the other order. */
4057 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4058 {
4059 rtx y
4060 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4061 : lookup_as_function (folded_arg1, MINUS);
4062
4063 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4064 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4065 return XEXP (y, 0);
4066
4067 /* Now try for a CONST of a MINUS like the above. */
4068 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4069 : lookup_as_function (folded_arg1, CONST))) != 0
4070 && GET_CODE (XEXP (y, 0)) == MINUS
4071 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4072 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4073 return XEXP (XEXP (y, 0), 0);
4074 }
4075
4076 /* If second operand is a register equivalent to a negative
4077 CONST_INT, see if we can find a register equivalent to the
4078 positive constant. Make a MINUS if so. Don't do this for
4079 a non-negative constant since we might then alternate between
4080 choosing positive and negative constants. Having the positive
4081 constant previously-used is the more common case. Be sure
4082 the resulting constant is non-negative; if const_arg1 were
4083 the smallest negative number this would overflow: depending
4084 on the mode, this would either just be the same value (and
4085 hence not save anything) or be incorrect. */
4086 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4087 && INTVAL (const_arg1) < 0
4088 /* This used to test
4089
4090 -INTVAL (const_arg1) >= 0
4091
4092 But The Sun V5.0 compilers mis-compiled that test. So
4093 instead we test for the problematic value in a more direct
4094 manner and hope the Sun compilers get it correct. */
4095 && INTVAL (const_arg1) !=
4096 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4097 && GET_CODE (folded_arg1) == REG)
4098 {
4099 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4100 struct table_elt *p
4101 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4102 mode);
4103
4104 if (p)
4105 for (p = p->first_same_value; p; p = p->next_same_value)
4106 if (GET_CODE (p->exp) == REG)
4107 return simplify_gen_binary (MINUS, mode, folded_arg0,
4108 canon_reg (p->exp, NULL_RTX));
4109 }
4110 goto from_plus;
4111
4112 case MINUS:
4113 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4114 If so, produce (PLUS Z C2-C). */
4115 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4116 {
4117 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4118 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4119 return fold_rtx (plus_constant (copy_rtx (y),
4120 -INTVAL (const_arg1)),
4121 NULL_RTX);
4122 }
4123
4124 /* Fall through. */
4125
4126 from_plus:
4127 case SMIN: case SMAX: case UMIN: case UMAX:
4128 case IOR: case AND: case XOR:
4129 case MULT:
4130 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4131 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4132 is known to be of similar form, we may be able to replace the
4133 operation with a combined operation. This may eliminate the
4134 intermediate operation if every use is simplified in this way.
4135 Note that the similar optimization done by combine.c only works
4136 if the intermediate operation's result has only one reference. */
4137
4138 if (GET_CODE (folded_arg0) == REG
4139 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4140 {
4141 int is_shift
4142 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4143 rtx y = lookup_as_function (folded_arg0, code);
4144 rtx inner_const;
4145 enum rtx_code associate_code;
4146 rtx new_const;
4147
4148 if (y == 0
4149 || 0 == (inner_const
4150 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4151 || GET_CODE (inner_const) != CONST_INT
4152 /* If we have compiled a statement like
4153 "if (x == (x & mask1))", and now are looking at
4154 "x & mask2", we will have a case where the first operand
4155 of Y is the same as our first operand. Unless we detect
4156 this case, an infinite loop will result. */
4157 || XEXP (y, 0) == folded_arg0)
4158 break;
4159
4160 /* Don't associate these operations if they are a PLUS with the
4161 same constant and it is a power of two. These might be doable
4162 with a pre- or post-increment. Similarly for two subtracts of
4163 identical powers of two with post decrement. */
4164
4165 if (code == PLUS && const_arg1 == inner_const
4166 && ((HAVE_PRE_INCREMENT
4167 && exact_log2 (INTVAL (const_arg1)) >= 0)
4168 || (HAVE_POST_INCREMENT
4169 && exact_log2 (INTVAL (const_arg1)) >= 0)
4170 || (HAVE_PRE_DECREMENT
4171 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4172 || (HAVE_POST_DECREMENT
4173 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4174 break;
4175
4176 /* Compute the code used to compose the constants. For example,
4177 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4178
4179 associate_code = (is_shift || code == MINUS ? PLUS : code);
4180
4181 new_const = simplify_binary_operation (associate_code, mode,
4182 const_arg1, inner_const);
4183
4184 if (new_const == 0)
4185 break;
4186
4187 /* If we are associating shift operations, don't let this
4188 produce a shift of the size of the object or larger.
4189 This could occur when we follow a sign-extend by a right
4190 shift on a machine that does a sign-extend as a pair
4191 of shifts. */
4192
4193 if (is_shift && GET_CODE (new_const) == CONST_INT
4194 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4195 {
4196 /* As an exception, we can turn an ASHIFTRT of this
4197 form into a shift of the number of bits - 1. */
4198 if (code == ASHIFTRT)
4199 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4200 else
4201 break;
4202 }
4203
4204 y = copy_rtx (XEXP (y, 0));
4205
4206 /* If Y contains our first operand (the most common way this
4207 can happen is if Y is a MEM), we would do into an infinite
4208 loop if we tried to fold it. So don't in that case. */
4209
4210 if (! reg_mentioned_p (folded_arg0, y))
4211 y = fold_rtx (y, insn);
4212
4213 return simplify_gen_binary (code, mode, y, new_const);
4214 }
4215 break;
4216
4217 case DIV: case UDIV:
4218 /* ??? The associative optimization performed immediately above is
4219 also possible for DIV and UDIV using associate_code of MULT.
4220 However, we would need extra code to verify that the
4221 multiplication does not overflow, that is, there is no overflow
4222 in the calculation of new_const. */
4223 break;
4224
4225 default:
4226 break;
4227 }
4228
4229 new = simplify_binary_operation (code, mode,
4230 const_arg0 ? const_arg0 : folded_arg0,
4231 const_arg1 ? const_arg1 : folded_arg1);
4232 break;
4233
4234 case 'o':
4235 /* (lo_sum (high X) X) is simply X. */
4236 if (code == LO_SUM && const_arg0 != 0
4237 && GET_CODE (const_arg0) == HIGH
4238 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4239 return const_arg1;
4240 break;
4241
4242 case '3':
4243 case 'b':
4244 new = simplify_ternary_operation (code, mode, mode_arg0,
4245 const_arg0 ? const_arg0 : folded_arg0,
4246 const_arg1 ? const_arg1 : folded_arg1,
4247 const_arg2 ? const_arg2 : XEXP (x, 2));
4248 break;
4249
4250 case 'x':
4251 /* Eliminate CONSTANT_P_RTX if its constant. */
4252 if (code == CONSTANT_P_RTX)
4253 {
4254 if (const_arg0)
4255 return const1_rtx;
4256 if (optimize == 0 || !flag_gcse)
4257 return const0_rtx;
4258 }
4259 break;
4260 }
4261
4262 return new ? new : x;
4263 }
4264 \f
4265 /* Return a constant value currently equivalent to X.
4266 Return 0 if we don't know one. */
4267
4268 static rtx
4269 equiv_constant (rtx x)
4270 {
4271 if (GET_CODE (x) == REG
4272 && REGNO_QTY_VALID_P (REGNO (x)))
4273 {
4274 int x_q = REG_QTY (REGNO (x));
4275 struct qty_table_elem *x_ent = &qty_table[x_q];
4276
4277 if (x_ent->const_rtx)
4278 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4279 }
4280
4281 if (x == 0 || CONSTANT_P (x))
4282 return x;
4283
4284 /* If X is a MEM, try to fold it outside the context of any insn to see if
4285 it might be equivalent to a constant. That handles the case where it
4286 is a constant-pool reference. Then try to look it up in the hash table
4287 in case it is something whose value we have seen before. */
4288
4289 if (GET_CODE (x) == MEM)
4290 {
4291 struct table_elt *elt;
4292
4293 x = fold_rtx (x, NULL_RTX);
4294 if (CONSTANT_P (x))
4295 return x;
4296
4297 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4298 if (elt == 0)
4299 return 0;
4300
4301 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4302 if (elt->is_const && CONSTANT_P (elt->exp))
4303 return elt->exp;
4304 }
4305
4306 return 0;
4307 }
4308 \f
4309 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4310 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4311 least-significant part of X.
4312 MODE specifies how big a part of X to return.
4313
4314 If the requested operation cannot be done, 0 is returned.
4315
4316 This is similar to gen_lowpart in emit-rtl.c. */
4317
4318 rtx
4319 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4320 {
4321 rtx result = gen_lowpart_common (mode, x);
4322
4323 if (result)
4324 return result;
4325 else if (GET_CODE (x) == MEM)
4326 {
4327 /* This is the only other case we handle. */
4328 int offset = 0;
4329 rtx new;
4330
4331 if (WORDS_BIG_ENDIAN)
4332 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4333 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4334 if (BYTES_BIG_ENDIAN)
4335 /* Adjust the address so that the address-after-the-data is
4336 unchanged. */
4337 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4338 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4339
4340 new = adjust_address_nv (x, mode, offset);
4341 if (! memory_address_p (mode, XEXP (new, 0)))
4342 return 0;
4343
4344 return new;
4345 }
4346 else
4347 return 0;
4348 }
4349 \f
4350 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4351 branch. It will be zero if not.
4352
4353 In certain cases, this can cause us to add an equivalence. For example,
4354 if we are following the taken case of
4355 if (i == 2)
4356 we can add the fact that `i' and '2' are now equivalent.
4357
4358 In any case, we can record that this comparison was passed. If the same
4359 comparison is seen later, we will know its value. */
4360
4361 static void
4362 record_jump_equiv (rtx insn, int taken)
4363 {
4364 int cond_known_true;
4365 rtx op0, op1;
4366 rtx set;
4367 enum machine_mode mode, mode0, mode1;
4368 int reversed_nonequality = 0;
4369 enum rtx_code code;
4370
4371 /* Ensure this is the right kind of insn. */
4372 if (! any_condjump_p (insn))
4373 return;
4374 set = pc_set (insn);
4375
4376 /* See if this jump condition is known true or false. */
4377 if (taken)
4378 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4379 else
4380 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4381
4382 /* Get the type of comparison being done and the operands being compared.
4383 If we had to reverse a non-equality condition, record that fact so we
4384 know that it isn't valid for floating-point. */
4385 code = GET_CODE (XEXP (SET_SRC (set), 0));
4386 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4387 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4388
4389 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4390 if (! cond_known_true)
4391 {
4392 code = reversed_comparison_code_parts (code, op0, op1, insn);
4393
4394 /* Don't remember if we can't find the inverse. */
4395 if (code == UNKNOWN)
4396 return;
4397 }
4398
4399 /* The mode is the mode of the non-constant. */
4400 mode = mode0;
4401 if (mode1 != VOIDmode)
4402 mode = mode1;
4403
4404 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4405 }
4406
4407 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4408 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4409 Make any useful entries we can with that information. Called from
4410 above function and called recursively. */
4411
4412 static void
4413 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4414 rtx op1, int reversed_nonequality)
4415 {
4416 unsigned op0_hash, op1_hash;
4417 int op0_in_memory, op1_in_memory;
4418 struct table_elt *op0_elt, *op1_elt;
4419
4420 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4421 we know that they are also equal in the smaller mode (this is also
4422 true for all smaller modes whether or not there is a SUBREG, but
4423 is not worth testing for with no SUBREG). */
4424
4425 /* Note that GET_MODE (op0) may not equal MODE. */
4426 if (code == EQ && GET_CODE (op0) == SUBREG
4427 && (GET_MODE_SIZE (GET_MODE (op0))
4428 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4429 {
4430 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4431 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4432
4433 record_jump_cond (code, mode, SUBREG_REG (op0),
4434 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4435 reversed_nonequality);
4436 }
4437
4438 if (code == EQ && GET_CODE (op1) == SUBREG
4439 && (GET_MODE_SIZE (GET_MODE (op1))
4440 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4441 {
4442 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4443 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4444
4445 record_jump_cond (code, mode, SUBREG_REG (op1),
4446 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4447 reversed_nonequality);
4448 }
4449
4450 /* Similarly, if this is an NE comparison, and either is a SUBREG
4451 making a smaller mode, we know the whole thing is also NE. */
4452
4453 /* Note that GET_MODE (op0) may not equal MODE;
4454 if we test MODE instead, we can get an infinite recursion
4455 alternating between two modes each wider than MODE. */
4456
4457 if (code == NE && GET_CODE (op0) == SUBREG
4458 && subreg_lowpart_p (op0)
4459 && (GET_MODE_SIZE (GET_MODE (op0))
4460 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4461 {
4462 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4463 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4464
4465 record_jump_cond (code, mode, SUBREG_REG (op0),
4466 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4467 reversed_nonequality);
4468 }
4469
4470 if (code == NE && GET_CODE (op1) == SUBREG
4471 && subreg_lowpart_p (op1)
4472 && (GET_MODE_SIZE (GET_MODE (op1))
4473 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4474 {
4475 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4476 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4477
4478 record_jump_cond (code, mode, SUBREG_REG (op1),
4479 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4480 reversed_nonequality);
4481 }
4482
4483 /* Hash both operands. */
4484
4485 do_not_record = 0;
4486 hash_arg_in_memory = 0;
4487 op0_hash = HASH (op0, mode);
4488 op0_in_memory = hash_arg_in_memory;
4489
4490 if (do_not_record)
4491 return;
4492
4493 do_not_record = 0;
4494 hash_arg_in_memory = 0;
4495 op1_hash = HASH (op1, mode);
4496 op1_in_memory = hash_arg_in_memory;
4497
4498 if (do_not_record)
4499 return;
4500
4501 /* Look up both operands. */
4502 op0_elt = lookup (op0, op0_hash, mode);
4503 op1_elt = lookup (op1, op1_hash, mode);
4504
4505 /* If both operands are already equivalent or if they are not in the
4506 table but are identical, do nothing. */
4507 if ((op0_elt != 0 && op1_elt != 0
4508 && op0_elt->first_same_value == op1_elt->first_same_value)
4509 || op0 == op1 || rtx_equal_p (op0, op1))
4510 return;
4511
4512 /* If we aren't setting two things equal all we can do is save this
4513 comparison. Similarly if this is floating-point. In the latter
4514 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4515 If we record the equality, we might inadvertently delete code
4516 whose intent was to change -0 to +0. */
4517
4518 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4519 {
4520 struct qty_table_elem *ent;
4521 int qty;
4522
4523 /* If we reversed a floating-point comparison, if OP0 is not a
4524 register, or if OP1 is neither a register or constant, we can't
4525 do anything. */
4526
4527 if (GET_CODE (op1) != REG)
4528 op1 = equiv_constant (op1);
4529
4530 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4531 || GET_CODE (op0) != REG || op1 == 0)
4532 return;
4533
4534 /* Put OP0 in the hash table if it isn't already. This gives it a
4535 new quantity number. */
4536 if (op0_elt == 0)
4537 {
4538 if (insert_regs (op0, NULL, 0))
4539 {
4540 rehash_using_reg (op0);
4541 op0_hash = HASH (op0, mode);
4542
4543 /* If OP0 is contained in OP1, this changes its hash code
4544 as well. Faster to rehash than to check, except
4545 for the simple case of a constant. */
4546 if (! CONSTANT_P (op1))
4547 op1_hash = HASH (op1,mode);
4548 }
4549
4550 op0_elt = insert (op0, NULL, op0_hash, mode);
4551 op0_elt->in_memory = op0_in_memory;
4552 }
4553
4554 qty = REG_QTY (REGNO (op0));
4555 ent = &qty_table[qty];
4556
4557 ent->comparison_code = code;
4558 if (GET_CODE (op1) == REG)
4559 {
4560 /* Look it up again--in case op0 and op1 are the same. */
4561 op1_elt = lookup (op1, op1_hash, mode);
4562
4563 /* Put OP1 in the hash table so it gets a new quantity number. */
4564 if (op1_elt == 0)
4565 {
4566 if (insert_regs (op1, NULL, 0))
4567 {
4568 rehash_using_reg (op1);
4569 op1_hash = HASH (op1, mode);
4570 }
4571
4572 op1_elt = insert (op1, NULL, op1_hash, mode);
4573 op1_elt->in_memory = op1_in_memory;
4574 }
4575
4576 ent->comparison_const = NULL_RTX;
4577 ent->comparison_qty = REG_QTY (REGNO (op1));
4578 }
4579 else
4580 {
4581 ent->comparison_const = op1;
4582 ent->comparison_qty = -1;
4583 }
4584
4585 return;
4586 }
4587
4588 /* If either side is still missing an equivalence, make it now,
4589 then merge the equivalences. */
4590
4591 if (op0_elt == 0)
4592 {
4593 if (insert_regs (op0, NULL, 0))
4594 {
4595 rehash_using_reg (op0);
4596 op0_hash = HASH (op0, mode);
4597 }
4598
4599 op0_elt = insert (op0, NULL, op0_hash, mode);
4600 op0_elt->in_memory = op0_in_memory;
4601 }
4602
4603 if (op1_elt == 0)
4604 {
4605 if (insert_regs (op1, NULL, 0))
4606 {
4607 rehash_using_reg (op1);
4608 op1_hash = HASH (op1, mode);
4609 }
4610
4611 op1_elt = insert (op1, NULL, op1_hash, mode);
4612 op1_elt->in_memory = op1_in_memory;
4613 }
4614
4615 merge_equiv_classes (op0_elt, op1_elt);
4616 last_jump_equiv_class = op0_elt;
4617 }
4618 \f
4619 /* CSE processing for one instruction.
4620 First simplify sources and addresses of all assignments
4621 in the instruction, using previously-computed equivalents values.
4622 Then install the new sources and destinations in the table
4623 of available values.
4624
4625 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4626 the insn. It means that INSN is inside libcall block. In this
4627 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4628
4629 /* Data on one SET contained in the instruction. */
4630
4631 struct set
4632 {
4633 /* The SET rtx itself. */
4634 rtx rtl;
4635 /* The SET_SRC of the rtx (the original value, if it is changing). */
4636 rtx src;
4637 /* The hash-table element for the SET_SRC of the SET. */
4638 struct table_elt *src_elt;
4639 /* Hash value for the SET_SRC. */
4640 unsigned src_hash;
4641 /* Hash value for the SET_DEST. */
4642 unsigned dest_hash;
4643 /* The SET_DEST, with SUBREG, etc., stripped. */
4644 rtx inner_dest;
4645 /* Nonzero if the SET_SRC is in memory. */
4646 char src_in_memory;
4647 /* Nonzero if the SET_SRC contains something
4648 whose value cannot be predicted and understood. */
4649 char src_volatile;
4650 /* Original machine mode, in case it becomes a CONST_INT.
4651 The size of this field should match the size of the mode
4652 field of struct rtx_def (see rtl.h). */
4653 ENUM_BITFIELD(machine_mode) mode : 8;
4654 /* A constant equivalent for SET_SRC, if any. */
4655 rtx src_const;
4656 /* Original SET_SRC value used for libcall notes. */
4657 rtx orig_src;
4658 /* Hash value of constant equivalent for SET_SRC. */
4659 unsigned src_const_hash;
4660 /* Table entry for constant equivalent for SET_SRC, if any. */
4661 struct table_elt *src_const_elt;
4662 };
4663
4664 static void
4665 cse_insn (rtx insn, rtx libcall_insn)
4666 {
4667 rtx x = PATTERN (insn);
4668 int i;
4669 rtx tem;
4670 int n_sets = 0;
4671
4672 #ifdef HAVE_cc0
4673 /* Records what this insn does to set CC0. */
4674 rtx this_insn_cc0 = 0;
4675 enum machine_mode this_insn_cc0_mode = VOIDmode;
4676 #endif
4677
4678 rtx src_eqv = 0;
4679 struct table_elt *src_eqv_elt = 0;
4680 int src_eqv_volatile = 0;
4681 int src_eqv_in_memory = 0;
4682 unsigned src_eqv_hash = 0;
4683
4684 struct set *sets = (struct set *) 0;
4685
4686 this_insn = insn;
4687
4688 /* Find all the SETs and CLOBBERs in this instruction.
4689 Record all the SETs in the array `set' and count them.
4690 Also determine whether there is a CLOBBER that invalidates
4691 all memory references, or all references at varying addresses. */
4692
4693 if (GET_CODE (insn) == CALL_INSN)
4694 {
4695 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4696 {
4697 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4698 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4699 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4700 }
4701 }
4702
4703 if (GET_CODE (x) == SET)
4704 {
4705 sets = alloca (sizeof (struct set));
4706 sets[0].rtl = x;
4707
4708 /* Ignore SETs that are unconditional jumps.
4709 They never need cse processing, so this does not hurt.
4710 The reason is not efficiency but rather
4711 so that we can test at the end for instructions
4712 that have been simplified to unconditional jumps
4713 and not be misled by unchanged instructions
4714 that were unconditional jumps to begin with. */
4715 if (SET_DEST (x) == pc_rtx
4716 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4717 ;
4718
4719 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4720 The hard function value register is used only once, to copy to
4721 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4722 Ensure we invalidate the destination register. On the 80386 no
4723 other code would invalidate it since it is a fixed_reg.
4724 We need not check the return of apply_change_group; see canon_reg. */
4725
4726 else if (GET_CODE (SET_SRC (x)) == CALL)
4727 {
4728 canon_reg (SET_SRC (x), insn);
4729 apply_change_group ();
4730 fold_rtx (SET_SRC (x), insn);
4731 invalidate (SET_DEST (x), VOIDmode);
4732 }
4733 else
4734 n_sets = 1;
4735 }
4736 else if (GET_CODE (x) == PARALLEL)
4737 {
4738 int lim = XVECLEN (x, 0);
4739
4740 sets = alloca (lim * sizeof (struct set));
4741
4742 /* Find all regs explicitly clobbered in this insn,
4743 and ensure they are not replaced with any other regs
4744 elsewhere in this insn.
4745 When a reg that is clobbered is also used for input,
4746 we should presume that that is for a reason,
4747 and we should not substitute some other register
4748 which is not supposed to be clobbered.
4749 Therefore, this loop cannot be merged into the one below
4750 because a CALL may precede a CLOBBER and refer to the
4751 value clobbered. We must not let a canonicalization do
4752 anything in that case. */
4753 for (i = 0; i < lim; i++)
4754 {
4755 rtx y = XVECEXP (x, 0, i);
4756 if (GET_CODE (y) == CLOBBER)
4757 {
4758 rtx clobbered = XEXP (y, 0);
4759
4760 if (GET_CODE (clobbered) == REG
4761 || GET_CODE (clobbered) == SUBREG)
4762 invalidate (clobbered, VOIDmode);
4763 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4764 || GET_CODE (clobbered) == ZERO_EXTRACT)
4765 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4766 }
4767 }
4768
4769 for (i = 0; i < lim; i++)
4770 {
4771 rtx y = XVECEXP (x, 0, i);
4772 if (GET_CODE (y) == SET)
4773 {
4774 /* As above, we ignore unconditional jumps and call-insns and
4775 ignore the result of apply_change_group. */
4776 if (GET_CODE (SET_SRC (y)) == CALL)
4777 {
4778 canon_reg (SET_SRC (y), insn);
4779 apply_change_group ();
4780 fold_rtx (SET_SRC (y), insn);
4781 invalidate (SET_DEST (y), VOIDmode);
4782 }
4783 else if (SET_DEST (y) == pc_rtx
4784 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4785 ;
4786 else
4787 sets[n_sets++].rtl = y;
4788 }
4789 else if (GET_CODE (y) == CLOBBER)
4790 {
4791 /* If we clobber memory, canon the address.
4792 This does nothing when a register is clobbered
4793 because we have already invalidated the reg. */
4794 if (GET_CODE (XEXP (y, 0)) == MEM)
4795 canon_reg (XEXP (y, 0), NULL_RTX);
4796 }
4797 else if (GET_CODE (y) == USE
4798 && ! (GET_CODE (XEXP (y, 0)) == REG
4799 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4800 canon_reg (y, NULL_RTX);
4801 else if (GET_CODE (y) == CALL)
4802 {
4803 /* The result of apply_change_group can be ignored; see
4804 canon_reg. */
4805 canon_reg (y, insn);
4806 apply_change_group ();
4807 fold_rtx (y, insn);
4808 }
4809 }
4810 }
4811 else if (GET_CODE (x) == CLOBBER)
4812 {
4813 if (GET_CODE (XEXP (x, 0)) == MEM)
4814 canon_reg (XEXP (x, 0), NULL_RTX);
4815 }
4816
4817 /* Canonicalize a USE of a pseudo register or memory location. */
4818 else if (GET_CODE (x) == USE
4819 && ! (GET_CODE (XEXP (x, 0)) == REG
4820 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4821 canon_reg (XEXP (x, 0), NULL_RTX);
4822 else if (GET_CODE (x) == CALL)
4823 {
4824 /* The result of apply_change_group can be ignored; see canon_reg. */
4825 canon_reg (x, insn);
4826 apply_change_group ();
4827 fold_rtx (x, insn);
4828 }
4829
4830 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4831 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4832 is handled specially for this case, and if it isn't set, then there will
4833 be no equivalence for the destination. */
4834 if (n_sets == 1 && REG_NOTES (insn) != 0
4835 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4836 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4837 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4838 {
4839 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4840 XEXP (tem, 0) = src_eqv;
4841 }
4842
4843 /* Canonicalize sources and addresses of destinations.
4844 We do this in a separate pass to avoid problems when a MATCH_DUP is
4845 present in the insn pattern. In that case, we want to ensure that
4846 we don't break the duplicate nature of the pattern. So we will replace
4847 both operands at the same time. Otherwise, we would fail to find an
4848 equivalent substitution in the loop calling validate_change below.
4849
4850 We used to suppress canonicalization of DEST if it appears in SRC,
4851 but we don't do this any more. */
4852
4853 for (i = 0; i < n_sets; i++)
4854 {
4855 rtx dest = SET_DEST (sets[i].rtl);
4856 rtx src = SET_SRC (sets[i].rtl);
4857 rtx new = canon_reg (src, insn);
4858 int insn_code;
4859
4860 sets[i].orig_src = src;
4861 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4862 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4863 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4864 || (insn_code = recog_memoized (insn)) < 0
4865 || insn_data[insn_code].n_dups > 0)
4866 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4867 else
4868 SET_SRC (sets[i].rtl) = new;
4869
4870 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4871 {
4872 validate_change (insn, &XEXP (dest, 1),
4873 canon_reg (XEXP (dest, 1), insn), 1);
4874 validate_change (insn, &XEXP (dest, 2),
4875 canon_reg (XEXP (dest, 2), insn), 1);
4876 }
4877
4878 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4879 || GET_CODE (dest) == ZERO_EXTRACT
4880 || GET_CODE (dest) == SIGN_EXTRACT)
4881 dest = XEXP (dest, 0);
4882
4883 if (GET_CODE (dest) == MEM)
4884 canon_reg (dest, insn);
4885 }
4886
4887 /* Now that we have done all the replacements, we can apply the change
4888 group and see if they all work. Note that this will cause some
4889 canonicalizations that would have worked individually not to be applied
4890 because some other canonicalization didn't work, but this should not
4891 occur often.
4892
4893 The result of apply_change_group can be ignored; see canon_reg. */
4894
4895 apply_change_group ();
4896
4897 /* Set sets[i].src_elt to the class each source belongs to.
4898 Detect assignments from or to volatile things
4899 and set set[i] to zero so they will be ignored
4900 in the rest of this function.
4901
4902 Nothing in this loop changes the hash table or the register chains. */
4903
4904 for (i = 0; i < n_sets; i++)
4905 {
4906 rtx src, dest;
4907 rtx src_folded;
4908 struct table_elt *elt = 0, *p;
4909 enum machine_mode mode;
4910 rtx src_eqv_here;
4911 rtx src_const = 0;
4912 rtx src_related = 0;
4913 struct table_elt *src_const_elt = 0;
4914 int src_cost = MAX_COST;
4915 int src_eqv_cost = MAX_COST;
4916 int src_folded_cost = MAX_COST;
4917 int src_related_cost = MAX_COST;
4918 int src_elt_cost = MAX_COST;
4919 int src_regcost = MAX_COST;
4920 int src_eqv_regcost = MAX_COST;
4921 int src_folded_regcost = MAX_COST;
4922 int src_related_regcost = MAX_COST;
4923 int src_elt_regcost = MAX_COST;
4924 /* Set nonzero if we need to call force_const_mem on with the
4925 contents of src_folded before using it. */
4926 int src_folded_force_flag = 0;
4927
4928 dest = SET_DEST (sets[i].rtl);
4929 src = SET_SRC (sets[i].rtl);
4930
4931 /* If SRC is a constant that has no machine mode,
4932 hash it with the destination's machine mode.
4933 This way we can keep different modes separate. */
4934
4935 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4936 sets[i].mode = mode;
4937
4938 if (src_eqv)
4939 {
4940 enum machine_mode eqvmode = mode;
4941 if (GET_CODE (dest) == STRICT_LOW_PART)
4942 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4943 do_not_record = 0;
4944 hash_arg_in_memory = 0;
4945 src_eqv_hash = HASH (src_eqv, eqvmode);
4946
4947 /* Find the equivalence class for the equivalent expression. */
4948
4949 if (!do_not_record)
4950 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4951
4952 src_eqv_volatile = do_not_record;
4953 src_eqv_in_memory = hash_arg_in_memory;
4954 }
4955
4956 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4957 value of the INNER register, not the destination. So it is not
4958 a valid substitution for the source. But save it for later. */
4959 if (GET_CODE (dest) == STRICT_LOW_PART)
4960 src_eqv_here = 0;
4961 else
4962 src_eqv_here = src_eqv;
4963
4964 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4965 simplified result, which may not necessarily be valid. */
4966 src_folded = fold_rtx (src, insn);
4967
4968 #if 0
4969 /* ??? This caused bad code to be generated for the m68k port with -O2.
4970 Suppose src is (CONST_INT -1), and that after truncation src_folded
4971 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4972 At the end we will add src and src_const to the same equivalence
4973 class. We now have 3 and -1 on the same equivalence class. This
4974 causes later instructions to be mis-optimized. */
4975 /* If storing a constant in a bitfield, pre-truncate the constant
4976 so we will be able to record it later. */
4977 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4978 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4979 {
4980 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4981
4982 if (GET_CODE (src) == CONST_INT
4983 && GET_CODE (width) == CONST_INT
4984 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4985 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4986 src_folded
4987 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4988 << INTVAL (width)) - 1));
4989 }
4990 #endif
4991
4992 /* Compute SRC's hash code, and also notice if it
4993 should not be recorded at all. In that case,
4994 prevent any further processing of this assignment. */
4995 do_not_record = 0;
4996 hash_arg_in_memory = 0;
4997
4998 sets[i].src = src;
4999 sets[i].src_hash = HASH (src, mode);
5000 sets[i].src_volatile = do_not_record;
5001 sets[i].src_in_memory = hash_arg_in_memory;
5002
5003 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5004 a pseudo, do not record SRC. Using SRC as a replacement for
5005 anything else will be incorrect in that situation. Note that
5006 this usually occurs only for stack slots, in which case all the
5007 RTL would be referring to SRC, so we don't lose any optimization
5008 opportunities by not having SRC in the hash table. */
5009
5010 if (GET_CODE (src) == MEM
5011 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5012 && GET_CODE (dest) == REG
5013 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5014 sets[i].src_volatile = 1;
5015
5016 #if 0
5017 /* It is no longer clear why we used to do this, but it doesn't
5018 appear to still be needed. So let's try without it since this
5019 code hurts cse'ing widened ops. */
5020 /* If source is a perverse subreg (such as QI treated as an SI),
5021 treat it as volatile. It may do the work of an SI in one context
5022 where the extra bits are not being used, but cannot replace an SI
5023 in general. */
5024 if (GET_CODE (src) == SUBREG
5025 && (GET_MODE_SIZE (GET_MODE (src))
5026 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5027 sets[i].src_volatile = 1;
5028 #endif
5029
5030 /* Locate all possible equivalent forms for SRC. Try to replace
5031 SRC in the insn with each cheaper equivalent.
5032
5033 We have the following types of equivalents: SRC itself, a folded
5034 version, a value given in a REG_EQUAL note, or a value related
5035 to a constant.
5036
5037 Each of these equivalents may be part of an additional class
5038 of equivalents (if more than one is in the table, they must be in
5039 the same class; we check for this).
5040
5041 If the source is volatile, we don't do any table lookups.
5042
5043 We note any constant equivalent for possible later use in a
5044 REG_NOTE. */
5045
5046 if (!sets[i].src_volatile)
5047 elt = lookup (src, sets[i].src_hash, mode);
5048
5049 sets[i].src_elt = elt;
5050
5051 if (elt && src_eqv_here && src_eqv_elt)
5052 {
5053 if (elt->first_same_value != src_eqv_elt->first_same_value)
5054 {
5055 /* The REG_EQUAL is indicating that two formerly distinct
5056 classes are now equivalent. So merge them. */
5057 merge_equiv_classes (elt, src_eqv_elt);
5058 src_eqv_hash = HASH (src_eqv, elt->mode);
5059 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5060 }
5061
5062 src_eqv_here = 0;
5063 }
5064
5065 else if (src_eqv_elt)
5066 elt = src_eqv_elt;
5067
5068 /* Try to find a constant somewhere and record it in `src_const'.
5069 Record its table element, if any, in `src_const_elt'. Look in
5070 any known equivalences first. (If the constant is not in the
5071 table, also set `sets[i].src_const_hash'). */
5072 if (elt)
5073 for (p = elt->first_same_value; p; p = p->next_same_value)
5074 if (p->is_const)
5075 {
5076 src_const = p->exp;
5077 src_const_elt = elt;
5078 break;
5079 }
5080
5081 if (src_const == 0
5082 && (CONSTANT_P (src_folded)
5083 /* Consider (minus (label_ref L1) (label_ref L2)) as
5084 "constant" here so we will record it. This allows us
5085 to fold switch statements when an ADDR_DIFF_VEC is used. */
5086 || (GET_CODE (src_folded) == MINUS
5087 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5088 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5089 src_const = src_folded, src_const_elt = elt;
5090 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5091 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5092
5093 /* If we don't know if the constant is in the table, get its
5094 hash code and look it up. */
5095 if (src_const && src_const_elt == 0)
5096 {
5097 sets[i].src_const_hash = HASH (src_const, mode);
5098 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5099 }
5100
5101 sets[i].src_const = src_const;
5102 sets[i].src_const_elt = src_const_elt;
5103
5104 /* If the constant and our source are both in the table, mark them as
5105 equivalent. Otherwise, if a constant is in the table but the source
5106 isn't, set ELT to it. */
5107 if (src_const_elt && elt
5108 && src_const_elt->first_same_value != elt->first_same_value)
5109 merge_equiv_classes (elt, src_const_elt);
5110 else if (src_const_elt && elt == 0)
5111 elt = src_const_elt;
5112
5113 /* See if there is a register linearly related to a constant
5114 equivalent of SRC. */
5115 if (src_const
5116 && (GET_CODE (src_const) == CONST
5117 || (src_const_elt && src_const_elt->related_value != 0)))
5118 {
5119 src_related = use_related_value (src_const, src_const_elt);
5120 if (src_related)
5121 {
5122 struct table_elt *src_related_elt
5123 = lookup (src_related, HASH (src_related, mode), mode);
5124 if (src_related_elt && elt)
5125 {
5126 if (elt->first_same_value
5127 != src_related_elt->first_same_value)
5128 /* This can occur when we previously saw a CONST
5129 involving a SYMBOL_REF and then see the SYMBOL_REF
5130 twice. Merge the involved classes. */
5131 merge_equiv_classes (elt, src_related_elt);
5132
5133 src_related = 0;
5134 src_related_elt = 0;
5135 }
5136 else if (src_related_elt && elt == 0)
5137 elt = src_related_elt;
5138 }
5139 }
5140
5141 /* See if we have a CONST_INT that is already in a register in a
5142 wider mode. */
5143
5144 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5145 && GET_MODE_CLASS (mode) == MODE_INT
5146 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5147 {
5148 enum machine_mode wider_mode;
5149
5150 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5151 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5152 && src_related == 0;
5153 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5154 {
5155 struct table_elt *const_elt
5156 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5157
5158 if (const_elt == 0)
5159 continue;
5160
5161 for (const_elt = const_elt->first_same_value;
5162 const_elt; const_elt = const_elt->next_same_value)
5163 if (GET_CODE (const_elt->exp) == REG)
5164 {
5165 src_related = gen_lowpart_if_possible (mode,
5166 const_elt->exp);
5167 break;
5168 }
5169 }
5170 }
5171
5172 /* Another possibility is that we have an AND with a constant in
5173 a mode narrower than a word. If so, it might have been generated
5174 as part of an "if" which would narrow the AND. If we already
5175 have done the AND in a wider mode, we can use a SUBREG of that
5176 value. */
5177
5178 if (flag_expensive_optimizations && ! src_related
5179 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5180 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5181 {
5182 enum machine_mode tmode;
5183 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5184
5185 for (tmode = GET_MODE_WIDER_MODE (mode);
5186 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5187 tmode = GET_MODE_WIDER_MODE (tmode))
5188 {
5189 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5190 struct table_elt *larger_elt;
5191
5192 if (inner)
5193 {
5194 PUT_MODE (new_and, tmode);
5195 XEXP (new_and, 0) = inner;
5196 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5197 if (larger_elt == 0)
5198 continue;
5199
5200 for (larger_elt = larger_elt->first_same_value;
5201 larger_elt; larger_elt = larger_elt->next_same_value)
5202 if (GET_CODE (larger_elt->exp) == REG)
5203 {
5204 src_related
5205 = gen_lowpart_if_possible (mode, larger_elt->exp);
5206 break;
5207 }
5208
5209 if (src_related)
5210 break;
5211 }
5212 }
5213 }
5214
5215 #ifdef LOAD_EXTEND_OP
5216 /* See if a MEM has already been loaded with a widening operation;
5217 if it has, we can use a subreg of that. Many CISC machines
5218 also have such operations, but this is only likely to be
5219 beneficial these machines. */
5220
5221 if (flag_expensive_optimizations && src_related == 0
5222 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5223 && GET_MODE_CLASS (mode) == MODE_INT
5224 && GET_CODE (src) == MEM && ! do_not_record
5225 && LOAD_EXTEND_OP (mode) != NIL)
5226 {
5227 enum machine_mode tmode;
5228
5229 /* Set what we are trying to extend and the operation it might
5230 have been extended with. */
5231 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5232 XEXP (memory_extend_rtx, 0) = src;
5233
5234 for (tmode = GET_MODE_WIDER_MODE (mode);
5235 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5236 tmode = GET_MODE_WIDER_MODE (tmode))
5237 {
5238 struct table_elt *larger_elt;
5239
5240 PUT_MODE (memory_extend_rtx, tmode);
5241 larger_elt = lookup (memory_extend_rtx,
5242 HASH (memory_extend_rtx, tmode), tmode);
5243 if (larger_elt == 0)
5244 continue;
5245
5246 for (larger_elt = larger_elt->first_same_value;
5247 larger_elt; larger_elt = larger_elt->next_same_value)
5248 if (GET_CODE (larger_elt->exp) == REG)
5249 {
5250 src_related = gen_lowpart_if_possible (mode,
5251 larger_elt->exp);
5252 break;
5253 }
5254
5255 if (src_related)
5256 break;
5257 }
5258 }
5259 #endif /* LOAD_EXTEND_OP */
5260
5261 if (src == src_folded)
5262 src_folded = 0;
5263
5264 /* At this point, ELT, if nonzero, points to a class of expressions
5265 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5266 and SRC_RELATED, if nonzero, each contain additional equivalent
5267 expressions. Prune these latter expressions by deleting expressions
5268 already in the equivalence class.
5269
5270 Check for an equivalent identical to the destination. If found,
5271 this is the preferred equivalent since it will likely lead to
5272 elimination of the insn. Indicate this by placing it in
5273 `src_related'. */
5274
5275 if (elt)
5276 elt = elt->first_same_value;
5277 for (p = elt; p; p = p->next_same_value)
5278 {
5279 enum rtx_code code = GET_CODE (p->exp);
5280
5281 /* If the expression is not valid, ignore it. Then we do not
5282 have to check for validity below. In most cases, we can use
5283 `rtx_equal_p', since canonicalization has already been done. */
5284 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5285 continue;
5286
5287 /* Also skip paradoxical subregs, unless that's what we're
5288 looking for. */
5289 if (code == SUBREG
5290 && (GET_MODE_SIZE (GET_MODE (p->exp))
5291 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5292 && ! (src != 0
5293 && GET_CODE (src) == SUBREG
5294 && GET_MODE (src) == GET_MODE (p->exp)
5295 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5296 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5297 continue;
5298
5299 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5300 src = 0;
5301 else if (src_folded && GET_CODE (src_folded) == code
5302 && rtx_equal_p (src_folded, p->exp))
5303 src_folded = 0;
5304 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5305 && rtx_equal_p (src_eqv_here, p->exp))
5306 src_eqv_here = 0;
5307 else if (src_related && GET_CODE (src_related) == code
5308 && rtx_equal_p (src_related, p->exp))
5309 src_related = 0;
5310
5311 /* This is the same as the destination of the insns, we want
5312 to prefer it. Copy it to src_related. The code below will
5313 then give it a negative cost. */
5314 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5315 src_related = dest;
5316 }
5317
5318 /* Find the cheapest valid equivalent, trying all the available
5319 possibilities. Prefer items not in the hash table to ones
5320 that are when they are equal cost. Note that we can never
5321 worsen an insn as the current contents will also succeed.
5322 If we find an equivalent identical to the destination, use it as best,
5323 since this insn will probably be eliminated in that case. */
5324 if (src)
5325 {
5326 if (rtx_equal_p (src, dest))
5327 src_cost = src_regcost = -1;
5328 else
5329 {
5330 src_cost = COST (src);
5331 src_regcost = approx_reg_cost (src);
5332 }
5333 }
5334
5335 if (src_eqv_here)
5336 {
5337 if (rtx_equal_p (src_eqv_here, dest))
5338 src_eqv_cost = src_eqv_regcost = -1;
5339 else
5340 {
5341 src_eqv_cost = COST (src_eqv_here);
5342 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5343 }
5344 }
5345
5346 if (src_folded)
5347 {
5348 if (rtx_equal_p (src_folded, dest))
5349 src_folded_cost = src_folded_regcost = -1;
5350 else
5351 {
5352 src_folded_cost = COST (src_folded);
5353 src_folded_regcost = approx_reg_cost (src_folded);
5354 }
5355 }
5356
5357 if (src_related)
5358 {
5359 if (rtx_equal_p (src_related, dest))
5360 src_related_cost = src_related_regcost = -1;
5361 else
5362 {
5363 src_related_cost = COST (src_related);
5364 src_related_regcost = approx_reg_cost (src_related);
5365 }
5366 }
5367
5368 /* If this was an indirect jump insn, a known label will really be
5369 cheaper even though it looks more expensive. */
5370 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5371 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5372
5373 /* Terminate loop when replacement made. This must terminate since
5374 the current contents will be tested and will always be valid. */
5375 while (1)
5376 {
5377 rtx trial;
5378
5379 /* Skip invalid entries. */
5380 while (elt && GET_CODE (elt->exp) != REG
5381 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5382 elt = elt->next_same_value;
5383
5384 /* A paradoxical subreg would be bad here: it'll be the right
5385 size, but later may be adjusted so that the upper bits aren't
5386 what we want. So reject it. */
5387 if (elt != 0
5388 && GET_CODE (elt->exp) == SUBREG
5389 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5390 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5391 /* It is okay, though, if the rtx we're trying to match
5392 will ignore any of the bits we can't predict. */
5393 && ! (src != 0
5394 && GET_CODE (src) == SUBREG
5395 && GET_MODE (src) == GET_MODE (elt->exp)
5396 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5397 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5398 {
5399 elt = elt->next_same_value;
5400 continue;
5401 }
5402
5403 if (elt)
5404 {
5405 src_elt_cost = elt->cost;
5406 src_elt_regcost = elt->regcost;
5407 }
5408
5409 /* Find cheapest and skip it for the next time. For items
5410 of equal cost, use this order:
5411 src_folded, src, src_eqv, src_related and hash table entry. */
5412 if (src_folded
5413 && preferrable (src_folded_cost, src_folded_regcost,
5414 src_cost, src_regcost) <= 0
5415 && preferrable (src_folded_cost, src_folded_regcost,
5416 src_eqv_cost, src_eqv_regcost) <= 0
5417 && preferrable (src_folded_cost, src_folded_regcost,
5418 src_related_cost, src_related_regcost) <= 0
5419 && preferrable (src_folded_cost, src_folded_regcost,
5420 src_elt_cost, src_elt_regcost) <= 0)
5421 {
5422 trial = src_folded, src_folded_cost = MAX_COST;
5423 if (src_folded_force_flag)
5424 {
5425 rtx forced = force_const_mem (mode, trial);
5426 if (forced)
5427 trial = forced;
5428 }
5429 }
5430 else if (src
5431 && preferrable (src_cost, src_regcost,
5432 src_eqv_cost, src_eqv_regcost) <= 0
5433 && preferrable (src_cost, src_regcost,
5434 src_related_cost, src_related_regcost) <= 0
5435 && preferrable (src_cost, src_regcost,
5436 src_elt_cost, src_elt_regcost) <= 0)
5437 trial = src, src_cost = MAX_COST;
5438 else if (src_eqv_here
5439 && preferrable (src_eqv_cost, src_eqv_regcost,
5440 src_related_cost, src_related_regcost) <= 0
5441 && preferrable (src_eqv_cost, src_eqv_regcost,
5442 src_elt_cost, src_elt_regcost) <= 0)
5443 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5444 else if (src_related
5445 && preferrable (src_related_cost, src_related_regcost,
5446 src_elt_cost, src_elt_regcost) <= 0)
5447 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5448 else
5449 {
5450 trial = copy_rtx (elt->exp);
5451 elt = elt->next_same_value;
5452 src_elt_cost = MAX_COST;
5453 }
5454
5455 /* We don't normally have an insn matching (set (pc) (pc)), so
5456 check for this separately here. We will delete such an
5457 insn below.
5458
5459 For other cases such as a table jump or conditional jump
5460 where we know the ultimate target, go ahead and replace the
5461 operand. While that may not make a valid insn, we will
5462 reemit the jump below (and also insert any necessary
5463 barriers). */
5464 if (n_sets == 1 && dest == pc_rtx
5465 && (trial == pc_rtx
5466 || (GET_CODE (trial) == LABEL_REF
5467 && ! condjump_p (insn))))
5468 {
5469 SET_SRC (sets[i].rtl) = trial;
5470 cse_jumps_altered = 1;
5471 break;
5472 }
5473
5474 /* Look for a substitution that makes a valid insn. */
5475 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5476 {
5477 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5478
5479 /* If we just made a substitution inside a libcall, then we
5480 need to make the same substitution in any notes attached
5481 to the RETVAL insn. */
5482 if (libcall_insn
5483 && (GET_CODE (sets[i].orig_src) == REG
5484 || GET_CODE (sets[i].orig_src) == SUBREG
5485 || GET_CODE (sets[i].orig_src) == MEM))
5486 simplify_replace_rtx (REG_NOTES (libcall_insn),
5487 sets[i].orig_src, copy_rtx (new));
5488
5489 /* The result of apply_change_group can be ignored; see
5490 canon_reg. */
5491
5492 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5493 apply_change_group ();
5494 break;
5495 }
5496
5497 /* If we previously found constant pool entries for
5498 constants and this is a constant, try making a
5499 pool entry. Put it in src_folded unless we already have done
5500 this since that is where it likely came from. */
5501
5502 else if (constant_pool_entries_cost
5503 && CONSTANT_P (trial)
5504 /* Reject cases that will abort in decode_rtx_const.
5505 On the alpha when simplifying a switch, we get
5506 (const (truncate (minus (label_ref) (label_ref)))). */
5507 && ! (GET_CODE (trial) == CONST
5508 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5509 /* Likewise on IA-64, except without the truncate. */
5510 && ! (GET_CODE (trial) == CONST
5511 && GET_CODE (XEXP (trial, 0)) == MINUS
5512 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5513 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5514 && (src_folded == 0
5515 || (GET_CODE (src_folded) != MEM
5516 && ! src_folded_force_flag))
5517 && GET_MODE_CLASS (mode) != MODE_CC
5518 && mode != VOIDmode)
5519 {
5520 src_folded_force_flag = 1;
5521 src_folded = trial;
5522 src_folded_cost = constant_pool_entries_cost;
5523 src_folded_regcost = constant_pool_entries_regcost;
5524 }
5525 }
5526
5527 src = SET_SRC (sets[i].rtl);
5528
5529 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5530 However, there is an important exception: If both are registers
5531 that are not the head of their equivalence class, replace SET_SRC
5532 with the head of the class. If we do not do this, we will have
5533 both registers live over a portion of the basic block. This way,
5534 their lifetimes will likely abut instead of overlapping. */
5535 if (GET_CODE (dest) == REG
5536 && REGNO_QTY_VALID_P (REGNO (dest)))
5537 {
5538 int dest_q = REG_QTY (REGNO (dest));
5539 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5540
5541 if (dest_ent->mode == GET_MODE (dest)
5542 && dest_ent->first_reg != REGNO (dest)
5543 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5544 /* Don't do this if the original insn had a hard reg as
5545 SET_SRC or SET_DEST. */
5546 && (GET_CODE (sets[i].src) != REG
5547 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5548 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5549 /* We can't call canon_reg here because it won't do anything if
5550 SRC is a hard register. */
5551 {
5552 int src_q = REG_QTY (REGNO (src));
5553 struct qty_table_elem *src_ent = &qty_table[src_q];
5554 int first = src_ent->first_reg;
5555 rtx new_src
5556 = (first >= FIRST_PSEUDO_REGISTER
5557 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5558
5559 /* We must use validate-change even for this, because this
5560 might be a special no-op instruction, suitable only to
5561 tag notes onto. */
5562 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5563 {
5564 src = new_src;
5565 /* If we had a constant that is cheaper than what we are now
5566 setting SRC to, use that constant. We ignored it when we
5567 thought we could make this into a no-op. */
5568 if (src_const && COST (src_const) < COST (src)
5569 && validate_change (insn, &SET_SRC (sets[i].rtl),
5570 src_const, 0))
5571 src = src_const;
5572 }
5573 }
5574 }
5575
5576 /* If we made a change, recompute SRC values. */
5577 if (src != sets[i].src)
5578 {
5579 cse_altered = 1;
5580 do_not_record = 0;
5581 hash_arg_in_memory = 0;
5582 sets[i].src = src;
5583 sets[i].src_hash = HASH (src, mode);
5584 sets[i].src_volatile = do_not_record;
5585 sets[i].src_in_memory = hash_arg_in_memory;
5586 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5587 }
5588
5589 /* If this is a single SET, we are setting a register, and we have an
5590 equivalent constant, we want to add a REG_NOTE. We don't want
5591 to write a REG_EQUAL note for a constant pseudo since verifying that
5592 that pseudo hasn't been eliminated is a pain. Such a note also
5593 won't help anything.
5594
5595 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5596 which can be created for a reference to a compile time computable
5597 entry in a jump table. */
5598
5599 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5600 && GET_CODE (src_const) != REG
5601 && ! (GET_CODE (src_const) == CONST
5602 && GET_CODE (XEXP (src_const, 0)) == MINUS
5603 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5604 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5605 {
5606 /* We only want a REG_EQUAL note if src_const != src. */
5607 if (! rtx_equal_p (src, src_const))
5608 {
5609 /* Make sure that the rtx is not shared. */
5610 src_const = copy_rtx (src_const);
5611
5612 /* Record the actual constant value in a REG_EQUAL note,
5613 making a new one if one does not already exist. */
5614 set_unique_reg_note (insn, REG_EQUAL, src_const);
5615 }
5616 }
5617
5618 /* Now deal with the destination. */
5619 do_not_record = 0;
5620
5621 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5622 to the MEM or REG within it. */
5623 while (GET_CODE (dest) == SIGN_EXTRACT
5624 || GET_CODE (dest) == ZERO_EXTRACT
5625 || GET_CODE (dest) == SUBREG
5626 || GET_CODE (dest) == STRICT_LOW_PART)
5627 dest = XEXP (dest, 0);
5628
5629 sets[i].inner_dest = dest;
5630
5631 if (GET_CODE (dest) == MEM)
5632 {
5633 #ifdef PUSH_ROUNDING
5634 /* Stack pushes invalidate the stack pointer. */
5635 rtx addr = XEXP (dest, 0);
5636 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5637 && XEXP (addr, 0) == stack_pointer_rtx)
5638 invalidate (stack_pointer_rtx, Pmode);
5639 #endif
5640 dest = fold_rtx (dest, insn);
5641 }
5642
5643 /* Compute the hash code of the destination now,
5644 before the effects of this instruction are recorded,
5645 since the register values used in the address computation
5646 are those before this instruction. */
5647 sets[i].dest_hash = HASH (dest, mode);
5648
5649 /* Don't enter a bit-field in the hash table
5650 because the value in it after the store
5651 may not equal what was stored, due to truncation. */
5652
5653 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5654 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5655 {
5656 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5657
5658 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5659 && GET_CODE (width) == CONST_INT
5660 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5661 && ! (INTVAL (src_const)
5662 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5663 /* Exception: if the value is constant,
5664 and it won't be truncated, record it. */
5665 ;
5666 else
5667 {
5668 /* This is chosen so that the destination will be invalidated
5669 but no new value will be recorded.
5670 We must invalidate because sometimes constant
5671 values can be recorded for bitfields. */
5672 sets[i].src_elt = 0;
5673 sets[i].src_volatile = 1;
5674 src_eqv = 0;
5675 src_eqv_elt = 0;
5676 }
5677 }
5678
5679 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5680 the insn. */
5681 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5682 {
5683 /* One less use of the label this insn used to jump to. */
5684 delete_insn (insn);
5685 cse_jumps_altered = 1;
5686 /* No more processing for this set. */
5687 sets[i].rtl = 0;
5688 }
5689
5690 /* If this SET is now setting PC to a label, we know it used to
5691 be a conditional or computed branch. */
5692 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5693 {
5694 /* Now emit a BARRIER after the unconditional jump. */
5695 if (NEXT_INSN (insn) == 0
5696 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5697 emit_barrier_after (insn);
5698
5699 /* We reemit the jump in as many cases as possible just in
5700 case the form of an unconditional jump is significantly
5701 different than a computed jump or conditional jump.
5702
5703 If this insn has multiple sets, then reemitting the
5704 jump is nontrivial. So instead we just force rerecognition
5705 and hope for the best. */
5706 if (n_sets == 1)
5707 {
5708 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5709
5710 JUMP_LABEL (new) = XEXP (src, 0);
5711 LABEL_NUSES (XEXP (src, 0))++;
5712 delete_insn (insn);
5713 insn = new;
5714
5715 /* Now emit a BARRIER after the unconditional jump. */
5716 if (NEXT_INSN (insn) == 0
5717 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5718 emit_barrier_after (insn);
5719 }
5720 else
5721 INSN_CODE (insn) = -1;
5722
5723 never_reached_warning (insn, NULL);
5724
5725 /* Do not bother deleting any unreachable code,
5726 let jump/flow do that. */
5727
5728 cse_jumps_altered = 1;
5729 sets[i].rtl = 0;
5730 }
5731
5732 /* If destination is volatile, invalidate it and then do no further
5733 processing for this assignment. */
5734
5735 else if (do_not_record)
5736 {
5737 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5738 invalidate (dest, VOIDmode);
5739 else if (GET_CODE (dest) == MEM)
5740 {
5741 /* Outgoing arguments for a libcall don't
5742 affect any recorded expressions. */
5743 if (! libcall_insn || insn == libcall_insn)
5744 invalidate (dest, VOIDmode);
5745 }
5746 else if (GET_CODE (dest) == STRICT_LOW_PART
5747 || GET_CODE (dest) == ZERO_EXTRACT)
5748 invalidate (XEXP (dest, 0), GET_MODE (dest));
5749 sets[i].rtl = 0;
5750 }
5751
5752 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5753 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5754
5755 #ifdef HAVE_cc0
5756 /* If setting CC0, record what it was set to, or a constant, if it
5757 is equivalent to a constant. If it is being set to a floating-point
5758 value, make a COMPARE with the appropriate constant of 0. If we
5759 don't do this, later code can interpret this as a test against
5760 const0_rtx, which can cause problems if we try to put it into an
5761 insn as a floating-point operand. */
5762 if (dest == cc0_rtx)
5763 {
5764 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5765 this_insn_cc0_mode = mode;
5766 if (FLOAT_MODE_P (mode))
5767 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5768 CONST0_RTX (mode));
5769 }
5770 #endif
5771 }
5772
5773 /* Now enter all non-volatile source expressions in the hash table
5774 if they are not already present.
5775 Record their equivalence classes in src_elt.
5776 This way we can insert the corresponding destinations into
5777 the same classes even if the actual sources are no longer in them
5778 (having been invalidated). */
5779
5780 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5781 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5782 {
5783 struct table_elt *elt;
5784 struct table_elt *classp = sets[0].src_elt;
5785 rtx dest = SET_DEST (sets[0].rtl);
5786 enum machine_mode eqvmode = GET_MODE (dest);
5787
5788 if (GET_CODE (dest) == STRICT_LOW_PART)
5789 {
5790 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5791 classp = 0;
5792 }
5793 if (insert_regs (src_eqv, classp, 0))
5794 {
5795 rehash_using_reg (src_eqv);
5796 src_eqv_hash = HASH (src_eqv, eqvmode);
5797 }
5798 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5799 elt->in_memory = src_eqv_in_memory;
5800 src_eqv_elt = elt;
5801
5802 /* Check to see if src_eqv_elt is the same as a set source which
5803 does not yet have an elt, and if so set the elt of the set source
5804 to src_eqv_elt. */
5805 for (i = 0; i < n_sets; i++)
5806 if (sets[i].rtl && sets[i].src_elt == 0
5807 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5808 sets[i].src_elt = src_eqv_elt;
5809 }
5810
5811 for (i = 0; i < n_sets; i++)
5812 if (sets[i].rtl && ! sets[i].src_volatile
5813 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5814 {
5815 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5816 {
5817 /* REG_EQUAL in setting a STRICT_LOW_PART
5818 gives an equivalent for the entire destination register,
5819 not just for the subreg being stored in now.
5820 This is a more interesting equivalence, so we arrange later
5821 to treat the entire reg as the destination. */
5822 sets[i].src_elt = src_eqv_elt;
5823 sets[i].src_hash = src_eqv_hash;
5824 }
5825 else
5826 {
5827 /* Insert source and constant equivalent into hash table, if not
5828 already present. */
5829 struct table_elt *classp = src_eqv_elt;
5830 rtx src = sets[i].src;
5831 rtx dest = SET_DEST (sets[i].rtl);
5832 enum machine_mode mode
5833 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5834
5835 /* It's possible that we have a source value known to be
5836 constant but don't have a REG_EQUAL note on the insn.
5837 Lack of a note will mean src_eqv_elt will be NULL. This
5838 can happen where we've generated a SUBREG to access a
5839 CONST_INT that is already in a register in a wider mode.
5840 Ensure that the source expression is put in the proper
5841 constant class. */
5842 if (!classp)
5843 classp = sets[i].src_const_elt;
5844
5845 if (sets[i].src_elt == 0)
5846 {
5847 /* Don't put a hard register source into the table if this is
5848 the last insn of a libcall. In this case, we only need
5849 to put src_eqv_elt in src_elt. */
5850 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5851 {
5852 struct table_elt *elt;
5853
5854 /* Note that these insert_regs calls cannot remove
5855 any of the src_elt's, because they would have failed to
5856 match if not still valid. */
5857 if (insert_regs (src, classp, 0))
5858 {
5859 rehash_using_reg (src);
5860 sets[i].src_hash = HASH (src, mode);
5861 }
5862 elt = insert (src, classp, sets[i].src_hash, mode);
5863 elt->in_memory = sets[i].src_in_memory;
5864 sets[i].src_elt = classp = elt;
5865 }
5866 else
5867 sets[i].src_elt = classp;
5868 }
5869 if (sets[i].src_const && sets[i].src_const_elt == 0
5870 && src != sets[i].src_const
5871 && ! rtx_equal_p (sets[i].src_const, src))
5872 sets[i].src_elt = insert (sets[i].src_const, classp,
5873 sets[i].src_const_hash, mode);
5874 }
5875 }
5876 else if (sets[i].src_elt == 0)
5877 /* If we did not insert the source into the hash table (e.g., it was
5878 volatile), note the equivalence class for the REG_EQUAL value, if any,
5879 so that the destination goes into that class. */
5880 sets[i].src_elt = src_eqv_elt;
5881
5882 invalidate_from_clobbers (x);
5883
5884 /* Some registers are invalidated by subroutine calls. Memory is
5885 invalidated by non-constant calls. */
5886
5887 if (GET_CODE (insn) == CALL_INSN)
5888 {
5889 if (! CONST_OR_PURE_CALL_P (insn))
5890 invalidate_memory ();
5891 invalidate_for_call ();
5892 }
5893
5894 /* Now invalidate everything set by this instruction.
5895 If a SUBREG or other funny destination is being set,
5896 sets[i].rtl is still nonzero, so here we invalidate the reg
5897 a part of which is being set. */
5898
5899 for (i = 0; i < n_sets; i++)
5900 if (sets[i].rtl)
5901 {
5902 /* We can't use the inner dest, because the mode associated with
5903 a ZERO_EXTRACT is significant. */
5904 rtx dest = SET_DEST (sets[i].rtl);
5905
5906 /* Needed for registers to remove the register from its
5907 previous quantity's chain.
5908 Needed for memory if this is a nonvarying address, unless
5909 we have just done an invalidate_memory that covers even those. */
5910 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5911 invalidate (dest, VOIDmode);
5912 else if (GET_CODE (dest) == MEM)
5913 {
5914 /* Outgoing arguments for a libcall don't
5915 affect any recorded expressions. */
5916 if (! libcall_insn || insn == libcall_insn)
5917 invalidate (dest, VOIDmode);
5918 }
5919 else if (GET_CODE (dest) == STRICT_LOW_PART
5920 || GET_CODE (dest) == ZERO_EXTRACT)
5921 invalidate (XEXP (dest, 0), GET_MODE (dest));
5922 }
5923
5924 /* A volatile ASM invalidates everything. */
5925 if (GET_CODE (insn) == INSN
5926 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5927 && MEM_VOLATILE_P (PATTERN (insn)))
5928 flush_hash_table ();
5929
5930 /* Make sure registers mentioned in destinations
5931 are safe for use in an expression to be inserted.
5932 This removes from the hash table
5933 any invalid entry that refers to one of these registers.
5934
5935 We don't care about the return value from mention_regs because
5936 we are going to hash the SET_DEST values unconditionally. */
5937
5938 for (i = 0; i < n_sets; i++)
5939 {
5940 if (sets[i].rtl)
5941 {
5942 rtx x = SET_DEST (sets[i].rtl);
5943
5944 if (GET_CODE (x) != REG)
5945 mention_regs (x);
5946 else
5947 {
5948 /* We used to rely on all references to a register becoming
5949 inaccessible when a register changes to a new quantity,
5950 since that changes the hash code. However, that is not
5951 safe, since after HASH_SIZE new quantities we get a
5952 hash 'collision' of a register with its own invalid
5953 entries. And since SUBREGs have been changed not to
5954 change their hash code with the hash code of the register,
5955 it wouldn't work any longer at all. So we have to check
5956 for any invalid references lying around now.
5957 This code is similar to the REG case in mention_regs,
5958 but it knows that reg_tick has been incremented, and
5959 it leaves reg_in_table as -1 . */
5960 unsigned int regno = REGNO (x);
5961 unsigned int endregno
5962 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5963 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5964 unsigned int i;
5965
5966 for (i = regno; i < endregno; i++)
5967 {
5968 if (REG_IN_TABLE (i) >= 0)
5969 {
5970 remove_invalid_refs (i);
5971 REG_IN_TABLE (i) = -1;
5972 }
5973 }
5974 }
5975 }
5976 }
5977
5978 /* We may have just removed some of the src_elt's from the hash table.
5979 So replace each one with the current head of the same class. */
5980
5981 for (i = 0; i < n_sets; i++)
5982 if (sets[i].rtl)
5983 {
5984 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5985 /* If elt was removed, find current head of same class,
5986 or 0 if nothing remains of that class. */
5987 {
5988 struct table_elt *elt = sets[i].src_elt;
5989
5990 while (elt && elt->prev_same_value)
5991 elt = elt->prev_same_value;
5992
5993 while (elt && elt->first_same_value == 0)
5994 elt = elt->next_same_value;
5995 sets[i].src_elt = elt ? elt->first_same_value : 0;
5996 }
5997 }
5998
5999 /* Now insert the destinations into their equivalence classes. */
6000
6001 for (i = 0; i < n_sets; i++)
6002 if (sets[i].rtl)
6003 {
6004 rtx dest = SET_DEST (sets[i].rtl);
6005 rtx inner_dest = sets[i].inner_dest;
6006 struct table_elt *elt;
6007
6008 /* Don't record value if we are not supposed to risk allocating
6009 floating-point values in registers that might be wider than
6010 memory. */
6011 if ((flag_float_store
6012 && GET_CODE (dest) == MEM
6013 && FLOAT_MODE_P (GET_MODE (dest)))
6014 /* Don't record BLKmode values, because we don't know the
6015 size of it, and can't be sure that other BLKmode values
6016 have the same or smaller size. */
6017 || GET_MODE (dest) == BLKmode
6018 /* Don't record values of destinations set inside a libcall block
6019 since we might delete the libcall. Things should have been set
6020 up so we won't want to reuse such a value, but we play it safe
6021 here. */
6022 || libcall_insn
6023 /* If we didn't put a REG_EQUAL value or a source into the hash
6024 table, there is no point is recording DEST. */
6025 || sets[i].src_elt == 0
6026 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6027 or SIGN_EXTEND, don't record DEST since it can cause
6028 some tracking to be wrong.
6029
6030 ??? Think about this more later. */
6031 || (GET_CODE (dest) == SUBREG
6032 && (GET_MODE_SIZE (GET_MODE (dest))
6033 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6034 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6035 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6036 continue;
6037
6038 /* STRICT_LOW_PART isn't part of the value BEING set,
6039 and neither is the SUBREG inside it.
6040 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6041 if (GET_CODE (dest) == STRICT_LOW_PART)
6042 dest = SUBREG_REG (XEXP (dest, 0));
6043
6044 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6045 /* Registers must also be inserted into chains for quantities. */
6046 if (insert_regs (dest, sets[i].src_elt, 1))
6047 {
6048 /* If `insert_regs' changes something, the hash code must be
6049 recalculated. */
6050 rehash_using_reg (dest);
6051 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6052 }
6053
6054 if (GET_CODE (inner_dest) == MEM
6055 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6056 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6057 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6058 Consider the case in which the address of the MEM is
6059 passed to a function, which alters the MEM. Then, if we
6060 later use Y instead of the MEM we'll miss the update. */
6061 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6062 else
6063 elt = insert (dest, sets[i].src_elt,
6064 sets[i].dest_hash, GET_MODE (dest));
6065
6066 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6067 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6068 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
6069 0))));
6070
6071 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6072 narrower than M2, and both M1 and M2 are the same number of words,
6073 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6074 make that equivalence as well.
6075
6076 However, BAR may have equivalences for which gen_lowpart_if_possible
6077 will produce a simpler value than gen_lowpart_if_possible applied to
6078 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6079 BAR's equivalences. If we don't get a simplified form, make
6080 the SUBREG. It will not be used in an equivalence, but will
6081 cause two similar assignments to be detected.
6082
6083 Note the loop below will find SUBREG_REG (DEST) since we have
6084 already entered SRC and DEST of the SET in the table. */
6085
6086 if (GET_CODE (dest) == SUBREG
6087 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6088 / UNITS_PER_WORD)
6089 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6090 && (GET_MODE_SIZE (GET_MODE (dest))
6091 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6092 && sets[i].src_elt != 0)
6093 {
6094 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6095 struct table_elt *elt, *classp = 0;
6096
6097 for (elt = sets[i].src_elt->first_same_value; elt;
6098 elt = elt->next_same_value)
6099 {
6100 rtx new_src = 0;
6101 unsigned src_hash;
6102 struct table_elt *src_elt;
6103 int byte = 0;
6104
6105 /* Ignore invalid entries. */
6106 if (GET_CODE (elt->exp) != REG
6107 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6108 continue;
6109
6110 /* We may have already been playing subreg games. If the
6111 mode is already correct for the destination, use it. */
6112 if (GET_MODE (elt->exp) == new_mode)
6113 new_src = elt->exp;
6114 else
6115 {
6116 /* Calculate big endian correction for the SUBREG_BYTE.
6117 We have already checked that M1 (GET_MODE (dest))
6118 is not narrower than M2 (new_mode). */
6119 if (BYTES_BIG_ENDIAN)
6120 byte = (GET_MODE_SIZE (GET_MODE (dest))
6121 - GET_MODE_SIZE (new_mode));
6122
6123 new_src = simplify_gen_subreg (new_mode, elt->exp,
6124 GET_MODE (dest), byte);
6125 }
6126
6127 /* The call to simplify_gen_subreg fails if the value
6128 is VOIDmode, yet we can't do any simplification, e.g.
6129 for EXPR_LISTs denoting function call results.
6130 It is invalid to construct a SUBREG with a VOIDmode
6131 SUBREG_REG, hence a zero new_src means we can't do
6132 this substitution. */
6133 if (! new_src)
6134 continue;
6135
6136 src_hash = HASH (new_src, new_mode);
6137 src_elt = lookup (new_src, src_hash, new_mode);
6138
6139 /* Put the new source in the hash table is if isn't
6140 already. */
6141 if (src_elt == 0)
6142 {
6143 if (insert_regs (new_src, classp, 0))
6144 {
6145 rehash_using_reg (new_src);
6146 src_hash = HASH (new_src, new_mode);
6147 }
6148 src_elt = insert (new_src, classp, src_hash, new_mode);
6149 src_elt->in_memory = elt->in_memory;
6150 }
6151 else if (classp && classp != src_elt->first_same_value)
6152 /* Show that two things that we've seen before are
6153 actually the same. */
6154 merge_equiv_classes (src_elt, classp);
6155
6156 classp = src_elt->first_same_value;
6157 /* Ignore invalid entries. */
6158 while (classp
6159 && GET_CODE (classp->exp) != REG
6160 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6161 classp = classp->next_same_value;
6162 }
6163 }
6164 }
6165
6166 /* Special handling for (set REG0 REG1) where REG0 is the
6167 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6168 be used in the sequel, so (if easily done) change this insn to
6169 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6170 that computed their value. Then REG1 will become a dead store
6171 and won't cloud the situation for later optimizations.
6172
6173 Do not make this change if REG1 is a hard register, because it will
6174 then be used in the sequel and we may be changing a two-operand insn
6175 into a three-operand insn.
6176
6177 Also do not do this if we are operating on a copy of INSN.
6178
6179 Also don't do this if INSN ends a libcall; this would cause an unrelated
6180 register to be set in the middle of a libcall, and we then get bad code
6181 if the libcall is deleted. */
6182
6183 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6184 && NEXT_INSN (PREV_INSN (insn)) == insn
6185 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6186 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6187 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6188 {
6189 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6190 struct qty_table_elem *src_ent = &qty_table[src_q];
6191
6192 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6193 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6194 {
6195 rtx prev = insn;
6196 /* Scan for the previous nonnote insn, but stop at a basic
6197 block boundary. */
6198 do
6199 {
6200 prev = PREV_INSN (prev);
6201 }
6202 while (prev && GET_CODE (prev) == NOTE
6203 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6204
6205 /* Do not swap the registers around if the previous instruction
6206 attaches a REG_EQUIV note to REG1.
6207
6208 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6209 from the pseudo that originally shadowed an incoming argument
6210 to another register. Some uses of REG_EQUIV might rely on it
6211 being attached to REG1 rather than REG2.
6212
6213 This section previously turned the REG_EQUIV into a REG_EQUAL
6214 note. We cannot do that because REG_EQUIV may provide an
6215 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6216
6217 if (prev != 0 && GET_CODE (prev) == INSN
6218 && GET_CODE (PATTERN (prev)) == SET
6219 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6220 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6221 {
6222 rtx dest = SET_DEST (sets[0].rtl);
6223 rtx src = SET_SRC (sets[0].rtl);
6224 rtx note;
6225
6226 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6227 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6228 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6229 apply_change_group ();
6230
6231 /* If INSN has a REG_EQUAL note, and this note mentions
6232 REG0, then we must delete it, because the value in
6233 REG0 has changed. If the note's value is REG1, we must
6234 also delete it because that is now this insn's dest. */
6235 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6236 if (note != 0
6237 && (reg_mentioned_p (dest, XEXP (note, 0))
6238 || rtx_equal_p (src, XEXP (note, 0))))
6239 remove_note (insn, note);
6240 }
6241 }
6242 }
6243
6244 /* If this is a conditional jump insn, record any known equivalences due to
6245 the condition being tested. */
6246
6247 last_jump_equiv_class = 0;
6248 if (GET_CODE (insn) == JUMP_INSN
6249 && n_sets == 1 && GET_CODE (x) == SET
6250 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6251 record_jump_equiv (insn, 0);
6252
6253 #ifdef HAVE_cc0
6254 /* If the previous insn set CC0 and this insn no longer references CC0,
6255 delete the previous insn. Here we use the fact that nothing expects CC0
6256 to be valid over an insn, which is true until the final pass. */
6257 if (prev_insn && GET_CODE (prev_insn) == INSN
6258 && (tem = single_set (prev_insn)) != 0
6259 && SET_DEST (tem) == cc0_rtx
6260 && ! reg_mentioned_p (cc0_rtx, x))
6261 delete_insn (prev_insn);
6262
6263 prev_insn_cc0 = this_insn_cc0;
6264 prev_insn_cc0_mode = this_insn_cc0_mode;
6265 prev_insn = insn;
6266 #endif
6267 }
6268 \f
6269 /* Remove from the hash table all expressions that reference memory. */
6270
6271 static void
6272 invalidate_memory (void)
6273 {
6274 int i;
6275 struct table_elt *p, *next;
6276
6277 for (i = 0; i < HASH_SIZE; i++)
6278 for (p = table[i]; p; p = next)
6279 {
6280 next = p->next_same_hash;
6281 if (p->in_memory)
6282 remove_from_table (p, i);
6283 }
6284 }
6285
6286 /* If ADDR is an address that implicitly affects the stack pointer, return
6287 1 and update the register tables to show the effect. Else, return 0. */
6288
6289 static int
6290 addr_affects_sp_p (rtx addr)
6291 {
6292 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6293 && GET_CODE (XEXP (addr, 0)) == REG
6294 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6295 {
6296 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6297 {
6298 REG_TICK (STACK_POINTER_REGNUM)++;
6299 /* Is it possible to use a subreg of SP? */
6300 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6301 }
6302
6303 /* This should be *very* rare. */
6304 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6305 invalidate (stack_pointer_rtx, VOIDmode);
6306
6307 return 1;
6308 }
6309
6310 return 0;
6311 }
6312
6313 /* Perform invalidation on the basis of everything about an insn
6314 except for invalidating the actual places that are SET in it.
6315 This includes the places CLOBBERed, and anything that might
6316 alias with something that is SET or CLOBBERed.
6317
6318 X is the pattern of the insn. */
6319
6320 static void
6321 invalidate_from_clobbers (rtx x)
6322 {
6323 if (GET_CODE (x) == CLOBBER)
6324 {
6325 rtx ref = XEXP (x, 0);
6326 if (ref)
6327 {
6328 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6329 || GET_CODE (ref) == MEM)
6330 invalidate (ref, VOIDmode);
6331 else if (GET_CODE (ref) == STRICT_LOW_PART
6332 || GET_CODE (ref) == ZERO_EXTRACT)
6333 invalidate (XEXP (ref, 0), GET_MODE (ref));
6334 }
6335 }
6336 else if (GET_CODE (x) == PARALLEL)
6337 {
6338 int i;
6339 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6340 {
6341 rtx y = XVECEXP (x, 0, i);
6342 if (GET_CODE (y) == CLOBBER)
6343 {
6344 rtx ref = XEXP (y, 0);
6345 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6346 || GET_CODE (ref) == MEM)
6347 invalidate (ref, VOIDmode);
6348 else if (GET_CODE (ref) == STRICT_LOW_PART
6349 || GET_CODE (ref) == ZERO_EXTRACT)
6350 invalidate (XEXP (ref, 0), GET_MODE (ref));
6351 }
6352 }
6353 }
6354 }
6355 \f
6356 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6357 and replace any registers in them with either an equivalent constant
6358 or the canonical form of the register. If we are inside an address,
6359 only do this if the address remains valid.
6360
6361 OBJECT is 0 except when within a MEM in which case it is the MEM.
6362
6363 Return the replacement for X. */
6364
6365 static rtx
6366 cse_process_notes (rtx x, rtx object)
6367 {
6368 enum rtx_code code = GET_CODE (x);
6369 const char *fmt = GET_RTX_FORMAT (code);
6370 int i;
6371
6372 switch (code)
6373 {
6374 case CONST_INT:
6375 case CONST:
6376 case SYMBOL_REF:
6377 case LABEL_REF:
6378 case CONST_DOUBLE:
6379 case CONST_VECTOR:
6380 case PC:
6381 case CC0:
6382 case LO_SUM:
6383 return x;
6384
6385 case MEM:
6386 validate_change (x, &XEXP (x, 0),
6387 cse_process_notes (XEXP (x, 0), x), 0);
6388 return x;
6389
6390 case EXPR_LIST:
6391 case INSN_LIST:
6392 if (REG_NOTE_KIND (x) == REG_EQUAL)
6393 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6394 if (XEXP (x, 1))
6395 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6396 return x;
6397
6398 case SIGN_EXTEND:
6399 case ZERO_EXTEND:
6400 case SUBREG:
6401 {
6402 rtx new = cse_process_notes (XEXP (x, 0), object);
6403 /* We don't substitute VOIDmode constants into these rtx,
6404 since they would impede folding. */
6405 if (GET_MODE (new) != VOIDmode)
6406 validate_change (object, &XEXP (x, 0), new, 0);
6407 return x;
6408 }
6409
6410 case REG:
6411 i = REG_QTY (REGNO (x));
6412
6413 /* Return a constant or a constant register. */
6414 if (REGNO_QTY_VALID_P (REGNO (x)))
6415 {
6416 struct qty_table_elem *ent = &qty_table[i];
6417
6418 if (ent->const_rtx != NULL_RTX
6419 && (CONSTANT_P (ent->const_rtx)
6420 || GET_CODE (ent->const_rtx) == REG))
6421 {
6422 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6423 if (new)
6424 return new;
6425 }
6426 }
6427
6428 /* Otherwise, canonicalize this register. */
6429 return canon_reg (x, NULL_RTX);
6430
6431 default:
6432 break;
6433 }
6434
6435 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6436 if (fmt[i] == 'e')
6437 validate_change (object, &XEXP (x, i),
6438 cse_process_notes (XEXP (x, i), object), 0);
6439
6440 return x;
6441 }
6442 \f
6443 /* Find common subexpressions between the end test of a loop and the beginning
6444 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6445
6446 Often we have a loop where an expression in the exit test is used
6447 in the body of the loop. For example "while (*p) *q++ = *p++;".
6448 Because of the way we duplicate the loop exit test in front of the loop,
6449 however, we don't detect that common subexpression. This will be caught
6450 when global cse is implemented, but this is a quite common case.
6451
6452 This function handles the most common cases of these common expressions.
6453 It is called after we have processed the basic block ending with the
6454 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6455 jumps to a label used only once. */
6456
6457 static void
6458 cse_around_loop (rtx loop_start)
6459 {
6460 rtx insn;
6461 int i;
6462 struct table_elt *p;
6463
6464 /* If the jump at the end of the loop doesn't go to the start, we don't
6465 do anything. */
6466 for (insn = PREV_INSN (loop_start);
6467 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6468 insn = PREV_INSN (insn))
6469 ;
6470
6471 if (insn == 0
6472 || GET_CODE (insn) != NOTE
6473 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6474 return;
6475
6476 /* If the last insn of the loop (the end test) was an NE comparison,
6477 we will interpret it as an EQ comparison, since we fell through
6478 the loop. Any equivalences resulting from that comparison are
6479 therefore not valid and must be invalidated. */
6480 if (last_jump_equiv_class)
6481 for (p = last_jump_equiv_class->first_same_value; p;
6482 p = p->next_same_value)
6483 {
6484 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6485 || (GET_CODE (p->exp) == SUBREG
6486 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6487 invalidate (p->exp, VOIDmode);
6488 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6489 || GET_CODE (p->exp) == ZERO_EXTRACT)
6490 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6491 }
6492
6493 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6494 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6495
6496 The only thing we do with SET_DEST is invalidate entries, so we
6497 can safely process each SET in order. It is slightly less efficient
6498 to do so, but we only want to handle the most common cases.
6499
6500 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6501 These pseudos won't have valid entries in any of the tables indexed
6502 by register number, such as reg_qty. We avoid out-of-range array
6503 accesses by not processing any instructions created after cse started. */
6504
6505 for (insn = NEXT_INSN (loop_start);
6506 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6507 && INSN_UID (insn) < max_insn_uid
6508 && ! (GET_CODE (insn) == NOTE
6509 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6510 insn = NEXT_INSN (insn))
6511 {
6512 if (INSN_P (insn)
6513 && (GET_CODE (PATTERN (insn)) == SET
6514 || GET_CODE (PATTERN (insn)) == CLOBBER))
6515 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6516 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6517 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6518 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6519 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6520 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6521 loop_start);
6522 }
6523 }
6524 \f
6525 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6526 since they are done elsewhere. This function is called via note_stores. */
6527
6528 static void
6529 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6530 {
6531 enum rtx_code code = GET_CODE (dest);
6532
6533 if (code == MEM
6534 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6535 /* There are times when an address can appear varying and be a PLUS
6536 during this scan when it would be a fixed address were we to know
6537 the proper equivalences. So invalidate all memory if there is
6538 a BLKmode or nonscalar memory reference or a reference to a
6539 variable address. */
6540 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6541 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6542 {
6543 invalidate_memory ();
6544 return;
6545 }
6546
6547 if (GET_CODE (set) == CLOBBER
6548 || CC0_P (dest)
6549 || dest == pc_rtx)
6550 return;
6551
6552 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6553 invalidate (XEXP (dest, 0), GET_MODE (dest));
6554 else if (code == REG || code == SUBREG || code == MEM)
6555 invalidate (dest, VOIDmode);
6556 }
6557
6558 /* Invalidate all insns from START up to the end of the function or the
6559 next label. This called when we wish to CSE around a block that is
6560 conditionally executed. */
6561
6562 static void
6563 invalidate_skipped_block (rtx start)
6564 {
6565 rtx insn;
6566
6567 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6568 insn = NEXT_INSN (insn))
6569 {
6570 if (! INSN_P (insn))
6571 continue;
6572
6573 if (GET_CODE (insn) == CALL_INSN)
6574 {
6575 if (! CONST_OR_PURE_CALL_P (insn))
6576 invalidate_memory ();
6577 invalidate_for_call ();
6578 }
6579
6580 invalidate_from_clobbers (PATTERN (insn));
6581 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6582 }
6583 }
6584 \f
6585 /* If modifying X will modify the value in *DATA (which is really an
6586 `rtx *'), indicate that fact by setting the pointed to value to
6587 NULL_RTX. */
6588
6589 static void
6590 cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
6591 {
6592 rtx *cse_check_loop_start_value = (rtx *) data;
6593
6594 if (*cse_check_loop_start_value == NULL_RTX
6595 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6596 return;
6597
6598 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6599 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6600 *cse_check_loop_start_value = NULL_RTX;
6601 }
6602
6603 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6604 a loop that starts with the label at LOOP_START.
6605
6606 If X is a SET, we see if its SET_SRC is currently in our hash table.
6607 If so, we see if it has a value equal to some register used only in the
6608 loop exit code (as marked by jump.c).
6609
6610 If those two conditions are true, we search backwards from the start of
6611 the loop to see if that same value was loaded into a register that still
6612 retains its value at the start of the loop.
6613
6614 If so, we insert an insn after the load to copy the destination of that
6615 load into the equivalent register and (try to) replace our SET_SRC with that
6616 register.
6617
6618 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6619
6620 static void
6621 cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
6622 {
6623 struct table_elt *src_elt;
6624
6625 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6626 are setting PC or CC0 or whose SET_SRC is already a register. */
6627 if (GET_CODE (x) == SET
6628 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6629 && GET_CODE (SET_SRC (x)) != REG)
6630 {
6631 src_elt = lookup (SET_SRC (x),
6632 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6633 GET_MODE (SET_DEST (x)));
6634
6635 if (src_elt)
6636 for (src_elt = src_elt->first_same_value; src_elt;
6637 src_elt = src_elt->next_same_value)
6638 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6639 && COST (src_elt->exp) < COST (SET_SRC (x)))
6640 {
6641 rtx p, set;
6642
6643 /* Look for an insn in front of LOOP_START that sets
6644 something in the desired mode to SET_SRC (x) before we hit
6645 a label or CALL_INSN. */
6646
6647 for (p = prev_nonnote_insn (loop_start);
6648 p && GET_CODE (p) != CALL_INSN
6649 && GET_CODE (p) != CODE_LABEL;
6650 p = prev_nonnote_insn (p))
6651 if ((set = single_set (p)) != 0
6652 && GET_CODE (SET_DEST (set)) == REG
6653 && GET_MODE (SET_DEST (set)) == src_elt->mode
6654 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6655 {
6656 /* We now have to ensure that nothing between P
6657 and LOOP_START modified anything referenced in
6658 SET_SRC (x). We know that nothing within the loop
6659 can modify it, or we would have invalidated it in
6660 the hash table. */
6661 rtx q;
6662 rtx cse_check_loop_start_value = SET_SRC (x);
6663 for (q = p; q != loop_start; q = NEXT_INSN (q))
6664 if (INSN_P (q))
6665 note_stores (PATTERN (q),
6666 cse_check_loop_start,
6667 &cse_check_loop_start_value);
6668
6669 /* If nothing was changed and we can replace our
6670 SET_SRC, add an insn after P to copy its destination
6671 to what we will be replacing SET_SRC with. */
6672 if (cse_check_loop_start_value
6673 && single_set (p)
6674 && !can_throw_internal (insn)
6675 && validate_change (insn, &SET_SRC (x),
6676 src_elt->exp, 0))
6677 {
6678 /* If this creates new pseudos, this is unsafe,
6679 because the regno of new pseudo is unsuitable
6680 to index into reg_qty when cse_insn processes
6681 the new insn. Therefore, if a new pseudo was
6682 created, discard this optimization. */
6683 int nregs = max_reg_num ();
6684 rtx move
6685 = gen_move_insn (src_elt->exp, SET_DEST (set));
6686 if (nregs != max_reg_num ())
6687 {
6688 if (! validate_change (insn, &SET_SRC (x),
6689 SET_SRC (set), 0))
6690 abort ();
6691 }
6692 else
6693 {
6694 if (CONSTANT_P (SET_SRC (set))
6695 && ! find_reg_equal_equiv_note (insn))
6696 set_unique_reg_note (insn, REG_EQUAL,
6697 SET_SRC (set));
6698 if (control_flow_insn_p (p))
6699 /* p can cause a control flow transfer so it
6700 is the last insn of a basic block. We can't
6701 therefore use emit_insn_after. */
6702 emit_insn_before (move, next_nonnote_insn (p));
6703 else
6704 emit_insn_after (move, p);
6705 }
6706 }
6707 break;
6708 }
6709 }
6710 }
6711
6712 /* Deal with the destination of X affecting the stack pointer. */
6713 addr_affects_sp_p (SET_DEST (x));
6714
6715 /* See comment on similar code in cse_insn for explanation of these
6716 tests. */
6717 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6718 || GET_CODE (SET_DEST (x)) == MEM)
6719 invalidate (SET_DEST (x), VOIDmode);
6720 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6721 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6722 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6723 }
6724 \f
6725 /* Find the end of INSN's basic block and return its range,
6726 the total number of SETs in all the insns of the block, the last insn of the
6727 block, and the branch path.
6728
6729 The branch path indicates which branches should be followed. If a nonzero
6730 path size is specified, the block should be rescanned and a different set
6731 of branches will be taken. The branch path is only used if
6732 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6733
6734 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6735 used to describe the block. It is filled in with the information about
6736 the current block. The incoming structure's branch path, if any, is used
6737 to construct the output branch path. */
6738
6739 void
6740 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6741 int follow_jumps, int after_loop, int skip_blocks)
6742 {
6743 rtx p = insn, q;
6744 int nsets = 0;
6745 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6746 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6747 int path_size = data->path_size;
6748 int path_entry = 0;
6749 int i;
6750
6751 /* Update the previous branch path, if any. If the last branch was
6752 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6753 shorten the path by one and look at the previous branch. We know that
6754 at least one branch must have been taken if PATH_SIZE is nonzero. */
6755 while (path_size > 0)
6756 {
6757 if (data->path[path_size - 1].status != NOT_TAKEN)
6758 {
6759 data->path[path_size - 1].status = NOT_TAKEN;
6760 break;
6761 }
6762 else
6763 path_size--;
6764 }
6765
6766 /* If the first instruction is marked with QImode, that means we've
6767 already processed this block. Our caller will look at DATA->LAST
6768 to figure out where to go next. We want to return the next block
6769 in the instruction stream, not some branched-to block somewhere
6770 else. We accomplish this by pretending our called forbid us to
6771 follow jumps, or skip blocks. */
6772 if (GET_MODE (insn) == QImode)
6773 follow_jumps = skip_blocks = 0;
6774
6775 /* Scan to end of this basic block. */
6776 while (p && GET_CODE (p) != CODE_LABEL)
6777 {
6778 /* Don't cse out the end of a loop. This makes a difference
6779 only for the unusual loops that always execute at least once;
6780 all other loops have labels there so we will stop in any case.
6781 Cse'ing out the end of the loop is dangerous because it
6782 might cause an invariant expression inside the loop
6783 to be reused after the end of the loop. This would make it
6784 hard to move the expression out of the loop in loop.c,
6785 especially if it is one of several equivalent expressions
6786 and loop.c would like to eliminate it.
6787
6788 If we are running after loop.c has finished, we can ignore
6789 the NOTE_INSN_LOOP_END. */
6790
6791 if (! after_loop && GET_CODE (p) == NOTE
6792 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6793 break;
6794
6795 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6796 the regs restored by the longjmp come from
6797 a later time than the setjmp. */
6798 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6799 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6800 break;
6801
6802 /* A PARALLEL can have lots of SETs in it,
6803 especially if it is really an ASM_OPERANDS. */
6804 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6805 nsets += XVECLEN (PATTERN (p), 0);
6806 else if (GET_CODE (p) != NOTE)
6807 nsets += 1;
6808
6809 /* Ignore insns made by CSE; they cannot affect the boundaries of
6810 the basic block. */
6811
6812 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6813 high_cuid = INSN_CUID (p);
6814 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6815 low_cuid = INSN_CUID (p);
6816
6817 /* See if this insn is in our branch path. If it is and we are to
6818 take it, do so. */
6819 if (path_entry < path_size && data->path[path_entry].branch == p)
6820 {
6821 if (data->path[path_entry].status != NOT_TAKEN)
6822 p = JUMP_LABEL (p);
6823
6824 /* Point to next entry in path, if any. */
6825 path_entry++;
6826 }
6827
6828 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6829 was specified, we haven't reached our maximum path length, there are
6830 insns following the target of the jump, this is the only use of the
6831 jump label, and the target label is preceded by a BARRIER.
6832
6833 Alternatively, we can follow the jump if it branches around a
6834 block of code and there are no other branches into the block.
6835 In this case invalidate_skipped_block will be called to invalidate any
6836 registers set in the block when following the jump. */
6837
6838 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6839 && GET_CODE (p) == JUMP_INSN
6840 && GET_CODE (PATTERN (p)) == SET
6841 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6842 && JUMP_LABEL (p) != 0
6843 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6844 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6845 {
6846 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6847 if ((GET_CODE (q) != NOTE
6848 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6849 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6850 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6851 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6852 break;
6853
6854 /* If we ran into a BARRIER, this code is an extension of the
6855 basic block when the branch is taken. */
6856 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6857 {
6858 /* Don't allow ourself to keep walking around an
6859 always-executed loop. */
6860 if (next_real_insn (q) == next)
6861 {
6862 p = NEXT_INSN (p);
6863 continue;
6864 }
6865
6866 /* Similarly, don't put a branch in our path more than once. */
6867 for (i = 0; i < path_entry; i++)
6868 if (data->path[i].branch == p)
6869 break;
6870
6871 if (i != path_entry)
6872 break;
6873
6874 data->path[path_entry].branch = p;
6875 data->path[path_entry++].status = TAKEN;
6876
6877 /* This branch now ends our path. It was possible that we
6878 didn't see this branch the last time around (when the
6879 insn in front of the target was a JUMP_INSN that was
6880 turned into a no-op). */
6881 path_size = path_entry;
6882
6883 p = JUMP_LABEL (p);
6884 /* Mark block so we won't scan it again later. */
6885 PUT_MODE (NEXT_INSN (p), QImode);
6886 }
6887 /* Detect a branch around a block of code. */
6888 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6889 {
6890 rtx tmp;
6891
6892 if (next_real_insn (q) == next)
6893 {
6894 p = NEXT_INSN (p);
6895 continue;
6896 }
6897
6898 for (i = 0; i < path_entry; i++)
6899 if (data->path[i].branch == p)
6900 break;
6901
6902 if (i != path_entry)
6903 break;
6904
6905 /* This is no_labels_between_p (p, q) with an added check for
6906 reaching the end of a function (in case Q precedes P). */
6907 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6908 if (GET_CODE (tmp) == CODE_LABEL)
6909 break;
6910
6911 if (tmp == q)
6912 {
6913 data->path[path_entry].branch = p;
6914 data->path[path_entry++].status = AROUND;
6915
6916 path_size = path_entry;
6917
6918 p = JUMP_LABEL (p);
6919 /* Mark block so we won't scan it again later. */
6920 PUT_MODE (NEXT_INSN (p), QImode);
6921 }
6922 }
6923 }
6924 p = NEXT_INSN (p);
6925 }
6926
6927 data->low_cuid = low_cuid;
6928 data->high_cuid = high_cuid;
6929 data->nsets = nsets;
6930 data->last = p;
6931
6932 /* If all jumps in the path are not taken, set our path length to zero
6933 so a rescan won't be done. */
6934 for (i = path_size - 1; i >= 0; i--)
6935 if (data->path[i].status != NOT_TAKEN)
6936 break;
6937
6938 if (i == -1)
6939 data->path_size = 0;
6940 else
6941 data->path_size = path_size;
6942
6943 /* End the current branch path. */
6944 data->path[path_size].branch = 0;
6945 }
6946 \f
6947 /* Perform cse on the instructions of a function.
6948 F is the first instruction.
6949 NREGS is one plus the highest pseudo-reg number used in the instruction.
6950
6951 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6952 (only if -frerun-cse-after-loop).
6953
6954 Returns 1 if jump_optimize should be redone due to simplifications
6955 in conditional jump instructions. */
6956
6957 int
6958 cse_main (rtx f, int nregs, int after_loop, FILE *file)
6959 {
6960 struct cse_basic_block_data val;
6961 rtx insn = f;
6962 int i;
6963
6964 val.path = xmalloc (sizeof (struct branch_path)
6965 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6966
6967 cse_jumps_altered = 0;
6968 recorded_label_ref = 0;
6969 constant_pool_entries_cost = 0;
6970 constant_pool_entries_regcost = 0;
6971 val.path_size = 0;
6972
6973 init_recog ();
6974 init_alias_analysis ();
6975
6976 max_reg = nregs;
6977
6978 max_insn_uid = get_max_uid ();
6979
6980 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6981
6982 #ifdef LOAD_EXTEND_OP
6983
6984 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6985 and change the code and mode as appropriate. */
6986 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6987 #endif
6988
6989 /* Reset the counter indicating how many elements have been made
6990 thus far. */
6991 n_elements_made = 0;
6992
6993 /* Find the largest uid. */
6994
6995 max_uid = get_max_uid ();
6996 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6997
6998 /* Compute the mapping from uids to cuids.
6999 CUIDs are numbers assigned to insns, like uids,
7000 except that cuids increase monotonically through the code.
7001 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7002 between two insns is not affected by -g. */
7003
7004 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7005 {
7006 if (GET_CODE (insn) != NOTE
7007 || NOTE_LINE_NUMBER (insn) < 0)
7008 INSN_CUID (insn) = ++i;
7009 else
7010 /* Give a line number note the same cuid as preceding insn. */
7011 INSN_CUID (insn) = i;
7012 }
7013
7014 ggc_push_context ();
7015
7016 /* Loop over basic blocks.
7017 Compute the maximum number of qty's needed for each basic block
7018 (which is 2 for each SET). */
7019 insn = f;
7020 while (insn)
7021 {
7022 cse_altered = 0;
7023 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7024 flag_cse_skip_blocks);
7025
7026 /* If this basic block was already processed or has no sets, skip it. */
7027 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7028 {
7029 PUT_MODE (insn, VOIDmode);
7030 insn = (val.last ? NEXT_INSN (val.last) : 0);
7031 val.path_size = 0;
7032 continue;
7033 }
7034
7035 cse_basic_block_start = val.low_cuid;
7036 cse_basic_block_end = val.high_cuid;
7037 max_qty = val.nsets * 2;
7038
7039 if (file)
7040 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7041 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7042 val.nsets);
7043
7044 /* Make MAX_QTY bigger to give us room to optimize
7045 past the end of this basic block, if that should prove useful. */
7046 if (max_qty < 500)
7047 max_qty = 500;
7048
7049 max_qty += max_reg;
7050
7051 /* If this basic block is being extended by following certain jumps,
7052 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7053 Otherwise, we start after this basic block. */
7054 if (val.path_size > 0)
7055 cse_basic_block (insn, val.last, val.path, 0);
7056 else
7057 {
7058 int old_cse_jumps_altered = cse_jumps_altered;
7059 rtx temp;
7060
7061 /* When cse changes a conditional jump to an unconditional
7062 jump, we want to reprocess the block, since it will give
7063 us a new branch path to investigate. */
7064 cse_jumps_altered = 0;
7065 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7066 if (cse_jumps_altered == 0
7067 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7068 insn = temp;
7069
7070 cse_jumps_altered |= old_cse_jumps_altered;
7071 }
7072
7073 if (cse_altered)
7074 ggc_collect ();
7075
7076 #ifdef USE_C_ALLOCA
7077 alloca (0);
7078 #endif
7079 }
7080
7081 ggc_pop_context ();
7082
7083 if (max_elements_made < n_elements_made)
7084 max_elements_made = n_elements_made;
7085
7086 /* Clean up. */
7087 end_alias_analysis ();
7088 free (uid_cuid);
7089 free (reg_eqv_table);
7090 free (val.path);
7091
7092 return cse_jumps_altered || recorded_label_ref;
7093 }
7094
7095 /* Process a single basic block. FROM and TO and the limits of the basic
7096 block. NEXT_BRANCH points to the branch path when following jumps or
7097 a null path when not following jumps.
7098
7099 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7100 loop. This is true when we are being called for the last time on a
7101 block and this CSE pass is before loop.c. */
7102
7103 static rtx
7104 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7105 int around_loop)
7106 {
7107 rtx insn;
7108 int to_usage = 0;
7109 rtx libcall_insn = NULL_RTX;
7110 int num_insns = 0;
7111
7112 /* This array is undefined before max_reg, so only allocate
7113 the space actually needed and adjust the start. */
7114
7115 qty_table = xmalloc ((max_qty - max_reg) * sizeof (struct qty_table_elem));
7116 qty_table -= max_reg;
7117
7118 new_basic_block ();
7119
7120 /* TO might be a label. If so, protect it from being deleted. */
7121 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7122 ++LABEL_NUSES (to);
7123
7124 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7125 {
7126 enum rtx_code code = GET_CODE (insn);
7127
7128 /* If we have processed 1,000 insns, flush the hash table to
7129 avoid extreme quadratic behavior. We must not include NOTEs
7130 in the count since there may be more of them when generating
7131 debugging information. If we clear the table at different
7132 times, code generated with -g -O might be different than code
7133 generated with -O but not -g.
7134
7135 ??? This is a real kludge and needs to be done some other way.
7136 Perhaps for 2.9. */
7137 if (code != NOTE && num_insns++ > 1000)
7138 {
7139 flush_hash_table ();
7140 num_insns = 0;
7141 }
7142
7143 /* See if this is a branch that is part of the path. If so, and it is
7144 to be taken, do so. */
7145 if (next_branch->branch == insn)
7146 {
7147 enum taken status = next_branch++->status;
7148 if (status != NOT_TAKEN)
7149 {
7150 if (status == TAKEN)
7151 record_jump_equiv (insn, 1);
7152 else
7153 invalidate_skipped_block (NEXT_INSN (insn));
7154
7155 /* Set the last insn as the jump insn; it doesn't affect cc0.
7156 Then follow this branch. */
7157 #ifdef HAVE_cc0
7158 prev_insn_cc0 = 0;
7159 prev_insn = insn;
7160 #endif
7161 insn = JUMP_LABEL (insn);
7162 continue;
7163 }
7164 }
7165
7166 if (GET_MODE (insn) == QImode)
7167 PUT_MODE (insn, VOIDmode);
7168
7169 if (GET_RTX_CLASS (code) == 'i')
7170 {
7171 rtx p;
7172
7173 /* Process notes first so we have all notes in canonical forms when
7174 looking for duplicate operations. */
7175
7176 if (REG_NOTES (insn))
7177 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7178
7179 /* Track when we are inside in LIBCALL block. Inside such a block,
7180 we do not want to record destinations. The last insn of a
7181 LIBCALL block is not considered to be part of the block, since
7182 its destination is the result of the block and hence should be
7183 recorded. */
7184
7185 if (REG_NOTES (insn) != 0)
7186 {
7187 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7188 libcall_insn = XEXP (p, 0);
7189 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7190 libcall_insn = 0;
7191 }
7192
7193 cse_insn (insn, libcall_insn);
7194
7195 /* If we haven't already found an insn where we added a LABEL_REF,
7196 check this one. */
7197 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7198 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7199 (void *) insn))
7200 recorded_label_ref = 1;
7201 }
7202
7203 /* If INSN is now an unconditional jump, skip to the end of our
7204 basic block by pretending that we just did the last insn in the
7205 basic block. If we are jumping to the end of our block, show
7206 that we can have one usage of TO. */
7207
7208 if (any_uncondjump_p (insn))
7209 {
7210 if (to == 0)
7211 {
7212 free (qty_table + max_reg);
7213 return 0;
7214 }
7215
7216 if (JUMP_LABEL (insn) == to)
7217 to_usage = 1;
7218
7219 /* Maybe TO was deleted because the jump is unconditional.
7220 If so, there is nothing left in this basic block. */
7221 /* ??? Perhaps it would be smarter to set TO
7222 to whatever follows this insn,
7223 and pretend the basic block had always ended here. */
7224 if (INSN_DELETED_P (to))
7225 break;
7226
7227 insn = PREV_INSN (to);
7228 }
7229
7230 /* See if it is ok to keep on going past the label
7231 which used to end our basic block. Remember that we incremented
7232 the count of that label, so we decrement it here. If we made
7233 a jump unconditional, TO_USAGE will be one; in that case, we don't
7234 want to count the use in that jump. */
7235
7236 if (to != 0 && NEXT_INSN (insn) == to
7237 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7238 {
7239 struct cse_basic_block_data val;
7240 rtx prev;
7241
7242 insn = NEXT_INSN (to);
7243
7244 /* If TO was the last insn in the function, we are done. */
7245 if (insn == 0)
7246 {
7247 free (qty_table + max_reg);
7248 return 0;
7249 }
7250
7251 /* If TO was preceded by a BARRIER we are done with this block
7252 because it has no continuation. */
7253 prev = prev_nonnote_insn (to);
7254 if (prev && GET_CODE (prev) == BARRIER)
7255 {
7256 free (qty_table + max_reg);
7257 return insn;
7258 }
7259
7260 /* Find the end of the following block. Note that we won't be
7261 following branches in this case. */
7262 to_usage = 0;
7263 val.path_size = 0;
7264 val.path = xmalloc (sizeof (struct branch_path)
7265 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7266 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7267 free (val.path);
7268
7269 /* If the tables we allocated have enough space left
7270 to handle all the SETs in the next basic block,
7271 continue through it. Otherwise, return,
7272 and that block will be scanned individually. */
7273 if (val.nsets * 2 + next_qty > max_qty)
7274 break;
7275
7276 cse_basic_block_start = val.low_cuid;
7277 cse_basic_block_end = val.high_cuid;
7278 to = val.last;
7279
7280 /* Prevent TO from being deleted if it is a label. */
7281 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7282 ++LABEL_NUSES (to);
7283
7284 /* Back up so we process the first insn in the extension. */
7285 insn = PREV_INSN (insn);
7286 }
7287 }
7288
7289 if (next_qty > max_qty)
7290 abort ();
7291
7292 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7293 the previous insn is the only insn that branches to the head of a loop,
7294 we can cse into the loop. Don't do this if we changed the jump
7295 structure of a loop unless we aren't going to be following jumps. */
7296
7297 insn = prev_nonnote_insn (to);
7298 if ((cse_jumps_altered == 0
7299 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7300 && around_loop && to != 0
7301 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7302 && GET_CODE (insn) == JUMP_INSN
7303 && JUMP_LABEL (insn) != 0
7304 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7305 cse_around_loop (JUMP_LABEL (insn));
7306
7307 free (qty_table + max_reg);
7308
7309 return to ? NEXT_INSN (to) : 0;
7310 }
7311 \f
7312 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7313 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7314
7315 static int
7316 check_for_label_ref (rtx *rtl, void *data)
7317 {
7318 rtx insn = (rtx) data;
7319
7320 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7321 we must rerun jump since it needs to place the note. If this is a
7322 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7323 since no REG_LABEL will be added. */
7324 return (GET_CODE (*rtl) == LABEL_REF
7325 && ! LABEL_REF_NONLOCAL_P (*rtl)
7326 && LABEL_P (XEXP (*rtl, 0))
7327 && INSN_UID (XEXP (*rtl, 0)) != 0
7328 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7329 }
7330 \f
7331 /* Count the number of times registers are used (not set) in X.
7332 COUNTS is an array in which we accumulate the count, INCR is how much
7333 we count each register usage. */
7334
7335 static void
7336 count_reg_usage (rtx x, int *counts, int incr)
7337 {
7338 enum rtx_code code;
7339 rtx note;
7340 const char *fmt;
7341 int i, j;
7342
7343 if (x == 0)
7344 return;
7345
7346 switch (code = GET_CODE (x))
7347 {
7348 case REG:
7349 counts[REGNO (x)] += incr;
7350 return;
7351
7352 case PC:
7353 case CC0:
7354 case CONST:
7355 case CONST_INT:
7356 case CONST_DOUBLE:
7357 case CONST_VECTOR:
7358 case SYMBOL_REF:
7359 case LABEL_REF:
7360 return;
7361
7362 case CLOBBER:
7363 /* If we are clobbering a MEM, mark any registers inside the address
7364 as being used. */
7365 if (GET_CODE (XEXP (x, 0)) == MEM)
7366 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7367 return;
7368
7369 case SET:
7370 /* Unless we are setting a REG, count everything in SET_DEST. */
7371 if (GET_CODE (SET_DEST (x)) != REG)
7372 count_reg_usage (SET_DEST (x), counts, incr);
7373 count_reg_usage (SET_SRC (x), counts, incr);
7374 return;
7375
7376 case CALL_INSN:
7377 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7378 /* Fall through. */
7379
7380 case INSN:
7381 case JUMP_INSN:
7382 count_reg_usage (PATTERN (x), counts, incr);
7383
7384 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7385 use them. */
7386
7387 note = find_reg_equal_equiv_note (x);
7388 if (note)
7389 {
7390 rtx eqv = XEXP (note, 0);
7391
7392 if (GET_CODE (eqv) == EXPR_LIST)
7393 /* This REG_EQUAL note describes the result of a function call.
7394 Process all the arguments. */
7395 do
7396 {
7397 count_reg_usage (XEXP (eqv, 0), counts, incr);
7398 eqv = XEXP (eqv, 1);
7399 }
7400 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7401 else
7402 count_reg_usage (eqv, counts, incr);
7403 }
7404 return;
7405
7406 case EXPR_LIST:
7407 if (REG_NOTE_KIND (x) == REG_EQUAL
7408 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7409 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7410 involving registers in the address. */
7411 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7412 count_reg_usage (XEXP (x, 0), counts, incr);
7413
7414 count_reg_usage (XEXP (x, 1), counts, incr);
7415 return;
7416
7417 case ASM_OPERANDS:
7418 /* Iterate over just the inputs, not the constraints as well. */
7419 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7420 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7421 return;
7422
7423 case INSN_LIST:
7424 abort ();
7425
7426 default:
7427 break;
7428 }
7429
7430 fmt = GET_RTX_FORMAT (code);
7431 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7432 {
7433 if (fmt[i] == 'e')
7434 count_reg_usage (XEXP (x, i), counts, incr);
7435 else if (fmt[i] == 'E')
7436 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7437 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7438 }
7439 }
7440 \f
7441 /* Return true if set is live. */
7442 static bool
7443 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7444 int *counts)
7445 {
7446 #ifdef HAVE_cc0
7447 rtx tem;
7448 #endif
7449
7450 if (set_noop_p (set))
7451 ;
7452
7453 #ifdef HAVE_cc0
7454 else if (GET_CODE (SET_DEST (set)) == CC0
7455 && !side_effects_p (SET_SRC (set))
7456 && ((tem = next_nonnote_insn (insn)) == 0
7457 || !INSN_P (tem)
7458 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7459 return false;
7460 #endif
7461 else if (GET_CODE (SET_DEST (set)) != REG
7462 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7463 || counts[REGNO (SET_DEST (set))] != 0
7464 || side_effects_p (SET_SRC (set))
7465 /* An ADDRESSOF expression can turn into a use of the
7466 internal arg pointer, so always consider the
7467 internal arg pointer live. If it is truly dead,
7468 flow will delete the initializing insn. */
7469 || (SET_DEST (set) == current_function_internal_arg_pointer))
7470 return true;
7471 return false;
7472 }
7473
7474 /* Return true if insn is live. */
7475
7476 static bool
7477 insn_live_p (rtx insn, int *counts)
7478 {
7479 int i;
7480 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7481 return true;
7482 else if (GET_CODE (PATTERN (insn)) == SET)
7483 return set_live_p (PATTERN (insn), insn, counts);
7484 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7485 {
7486 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7487 {
7488 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7489
7490 if (GET_CODE (elt) == SET)
7491 {
7492 if (set_live_p (elt, insn, counts))
7493 return true;
7494 }
7495 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7496 return true;
7497 }
7498 return false;
7499 }
7500 else
7501 return true;
7502 }
7503
7504 /* Return true if libcall is dead as a whole. */
7505
7506 static bool
7507 dead_libcall_p (rtx insn, int *counts)
7508 {
7509 rtx note, set, new;
7510
7511 /* See if there's a REG_EQUAL note on this insn and try to
7512 replace the source with the REG_EQUAL expression.
7513
7514 We assume that insns with REG_RETVALs can only be reg->reg
7515 copies at this point. */
7516 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7517 if (!note)
7518 return false;
7519
7520 set = single_set (insn);
7521 if (!set)
7522 return false;
7523
7524 new = simplify_rtx (XEXP (note, 0));
7525 if (!new)
7526 new = XEXP (note, 0);
7527
7528 /* While changing insn, we must update the counts accordingly. */
7529 count_reg_usage (insn, counts, -1);
7530
7531 if (validate_change (insn, &SET_SRC (set), new, 0))
7532 {
7533 count_reg_usage (insn, counts, 1);
7534 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7535 remove_note (insn, note);
7536 return true;
7537 }
7538
7539 if (CONSTANT_P (new))
7540 {
7541 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7542 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7543 {
7544 count_reg_usage (insn, counts, 1);
7545 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7546 remove_note (insn, note);
7547 return true;
7548 }
7549 }
7550
7551 count_reg_usage (insn, counts, 1);
7552 return false;
7553 }
7554
7555 /* Scan all the insns and delete any that are dead; i.e., they store a register
7556 that is never used or they copy a register to itself.
7557
7558 This is used to remove insns made obviously dead by cse, loop or other
7559 optimizations. It improves the heuristics in loop since it won't try to
7560 move dead invariants out of loops or make givs for dead quantities. The
7561 remaining passes of the compilation are also sped up. */
7562
7563 int
7564 delete_trivially_dead_insns (rtx insns, int nreg)
7565 {
7566 int *counts;
7567 rtx insn, prev;
7568 int in_libcall = 0, dead_libcall = 0;
7569 int ndead = 0, nlastdead, niterations = 0;
7570
7571 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7572 /* First count the number of times each register is used. */
7573 counts = xcalloc (nreg, sizeof (int));
7574 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7575 count_reg_usage (insn, counts, 1);
7576
7577 do
7578 {
7579 nlastdead = ndead;
7580 niterations++;
7581 /* Go from the last insn to the first and delete insns that only set unused
7582 registers or copy a register to itself. As we delete an insn, remove
7583 usage counts for registers it uses.
7584
7585 The first jump optimization pass may leave a real insn as the last
7586 insn in the function. We must not skip that insn or we may end
7587 up deleting code that is not really dead. */
7588 insn = get_last_insn ();
7589 if (! INSN_P (insn))
7590 insn = prev_real_insn (insn);
7591
7592 for (; insn; insn = prev)
7593 {
7594 int live_insn = 0;
7595
7596 prev = prev_real_insn (insn);
7597
7598 /* Don't delete any insns that are part of a libcall block unless
7599 we can delete the whole libcall block.
7600
7601 Flow or loop might get confused if we did that. Remember
7602 that we are scanning backwards. */
7603 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7604 {
7605 in_libcall = 1;
7606 live_insn = 1;
7607 dead_libcall = dead_libcall_p (insn, counts);
7608 }
7609 else if (in_libcall)
7610 live_insn = ! dead_libcall;
7611 else
7612 live_insn = insn_live_p (insn, counts);
7613
7614 /* If this is a dead insn, delete it and show registers in it aren't
7615 being used. */
7616
7617 if (! live_insn)
7618 {
7619 count_reg_usage (insn, counts, -1);
7620 delete_insn_and_edges (insn);
7621 ndead++;
7622 }
7623
7624 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7625 {
7626 in_libcall = 0;
7627 dead_libcall = 0;
7628 }
7629 }
7630 }
7631 while (ndead != nlastdead);
7632
7633 if (rtl_dump_file && ndead)
7634 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7635 ndead, niterations);
7636 /* Clean up. */
7637 free (counts);
7638 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7639 return ndead;
7640 }