1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Must precede rtl.h for FFS. */
27 #include "hard-reg-set.h"
30 #include "insn-config.h"
35 /* The basic idea of common subexpression elimination is to go
36 through the code, keeping a record of expressions that would
37 have the same value at the current scan point, and replacing
38 expressions encountered with the cheapest equivalent expression.
40 It is too complicated to keep track of the different possibilities
41 when control paths merge; so, at each label, we forget all that is
42 known and start fresh. This can be described as processing each
43 basic block separately. Note, however, that these are not quite
44 the same as the basic blocks found by a later pass and used for
45 data flow analysis and register packing. We do not need to start fresh
46 after a conditional jump instruction if there is no label there.
48 We use two data structures to record the equivalent expressions:
49 a hash table for most expressions, and several vectors together
50 with "quantity numbers" to record equivalent (pseudo) registers.
52 The use of the special data structure for registers is desirable
53 because it is faster. It is possible because registers references
54 contain a fairly small number, the register number, taken from
55 a contiguously allocated series, and two register references are
56 identical if they have the same number. General expressions
57 do not have any such thing, so the only way to retrieve the
58 information recorded on an expression other than a register
59 is to keep it in a hash table.
61 Registers and "quantity numbers":
63 At the start of each basic block, all of the (hardware and pseudo)
64 registers used in the function are given distinct quantity
65 numbers to indicate their contents. During scan, when the code
66 copies one register into another, we copy the quantity number.
67 When a register is loaded in any other way, we allocate a new
68 quantity number to describe the value generated by this operation.
69 `reg_qty' records what quantity a register is currently thought
72 All real quantity numbers are greater than or equal to `max_reg'.
73 If register N has not been assigned a quantity, reg_qty[N] will equal N.
75 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
76 variables should be referenced with an index below `max_reg'.
78 We also maintain a bidirectional chain of registers for each
79 quantity number. `qty_first_reg', `qty_last_reg',
80 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
82 The first register in a chain is the one whose lifespan is least local.
83 Among equals, it is the one that was seen first.
84 We replace any equivalent register with that one.
86 If two registers have the same quantity number, it must be true that
87 REG expressions with `qty_mode' must be in the hash table for both
88 registers and must be in the same class.
90 The converse is not true. Since hard registers may be referenced in
91 any mode, two REG expressions might be equivalent in the hash table
92 but not have the same quantity number if the quantity number of one
93 of the registers is not the same mode as those expressions.
95 Constants and quantity numbers
97 When a quantity has a known constant value, that value is stored
98 in the appropriate element of qty_const. This is in addition to
99 putting the constant in the hash table as is usual for non-regs.
101 Whether a reg or a constant is preferred is determined by the configuration
102 macro CONST_COSTS and will often depend on the constant value. In any
103 event, expressions containing constants can be simplified, by fold_rtx.
105 When a quantity has a known nearly constant value (such as an address
106 of a stack slot), that value is stored in the appropriate element
109 Integer constants don't have a machine mode. However, cse
110 determines the intended machine mode from the destination
111 of the instruction that moves the constant. The machine mode
112 is recorded in the hash table along with the actual RTL
113 constant expression so that different modes are kept separate.
117 To record known equivalences among expressions in general
118 we use a hash table called `table'. It has a fixed number of buckets
119 that contain chains of `struct table_elt' elements for expressions.
120 These chains connect the elements whose expressions have the same
123 Other chains through the same elements connect the elements which
124 currently have equivalent values.
126 Register references in an expression are canonicalized before hashing
127 the expression. This is done using `reg_qty' and `qty_first_reg'.
128 The hash code of a register reference is computed using the quantity
129 number, not the register number.
131 When the value of an expression changes, it is necessary to remove from the
132 hash table not just that expression but all expressions whose values
133 could be different as a result.
135 1. If the value changing is in memory, except in special cases
136 ANYTHING referring to memory could be changed. That is because
137 nobody knows where a pointer does not point.
138 The function `invalidate_memory' removes what is necessary.
140 The special cases are when the address is constant or is
141 a constant plus a fixed register such as the frame pointer
142 or a static chain pointer. When such addresses are stored in,
143 we can tell exactly which other such addresses must be invalidated
144 due to overlap. `invalidate' does this.
145 All expressions that refer to non-constant
146 memory addresses are also invalidated. `invalidate_memory' does this.
148 2. If the value changing is a register, all expressions
149 containing references to that register, and only those,
152 Because searching the entire hash table for expressions that contain
153 a register is very slow, we try to figure out when it isn't necessary.
154 Precisely, this is necessary only when expressions have been
155 entered in the hash table using this register, and then the value has
156 changed, and then another expression wants to be added to refer to
157 the register's new value. This sequence of circumstances is rare
158 within any one basic block.
160 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
161 reg_tick[i] is incremented whenever a value is stored in register i.
162 reg_in_table[i] holds -1 if no references to register i have been
163 entered in the table; otherwise, it contains the value reg_tick[i] had
164 when the references were entered. If we want to enter a reference
165 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
166 Until we want to enter a new entry, the mere fact that the two vectors
167 don't match makes the entries be ignored if anyone tries to match them.
169 Registers themselves are entered in the hash table as well as in
170 the equivalent-register chains. However, the vectors `reg_tick'
171 and `reg_in_table' do not apply to expressions which are simple
172 register references. These expressions are removed from the table
173 immediately when they become invalid, and this can be done even if
174 we do not immediately search for all the expressions that refer to
177 A CLOBBER rtx in an instruction invalidates its operand for further
178 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
179 invalidates everything that resides in memory.
183 Constant expressions that differ only by an additive integer
184 are called related. When a constant expression is put in
185 the table, the related expression with no constant term
186 is also entered. These are made to point at each other
187 so that it is possible to find out if there exists any
188 register equivalent to an expression related to a given expression. */
190 /* One plus largest register number used in this function. */
194 /* Length of vectors indexed by quantity number.
195 We know in advance we will not need a quantity number this big. */
199 /* Next quantity number to be allocated.
200 This is 1 + the largest number needed so far. */
204 /* Indexed by quantity number, gives the first (or last) (pseudo) register
205 in the chain of registers that currently contain this quantity. */
207 static int *qty_first_reg
;
208 static int *qty_last_reg
;
210 /* Index by quantity number, gives the mode of the quantity. */
212 static enum machine_mode
*qty_mode
;
214 /* Indexed by quantity number, gives the rtx of the constant value of the
215 quantity, or zero if it does not have a known value.
216 A sum of the frame pointer (or arg pointer) plus a constant
217 can also be entered here. */
219 static rtx
*qty_const
;
221 /* Indexed by qty number, gives the insn that stored the constant value
222 recorded in `qty_const'. */
224 static rtx
*qty_const_insn
;
226 /* The next three variables are used to track when a comparison between a
227 quantity and some constant or register has been passed. In that case, we
228 know the results of the comparison in case we see it again. These variables
229 record a comparison that is known to be true. */
231 /* Indexed by qty number, gives the rtx code of a comparison with a known
232 result involving this quantity. If none, it is UNKNOWN. */
233 static enum rtx_code
*qty_comparison_code
;
235 /* Indexed by qty number, gives the constant being compared against in a
236 comparison of known result. If no such comparison, it is undefined.
237 If the comparison is not with a constant, it is zero. */
239 static rtx
*qty_comparison_const
;
241 /* Indexed by qty number, gives the quantity being compared against in a
242 comparison of known result. If no such comparison, if it undefined.
243 If the comparison is not with a register, it is -1. */
245 static int *qty_comparison_qty
;
248 /* For machines that have a CC0, we do not record its value in the hash
249 table since its use is guaranteed to be the insn immediately following
250 its definition and any other insn is presumed to invalidate it.
252 Instead, we store below the value last assigned to CC0. If it should
253 happen to be a constant, it is stored in preference to the actual
254 assigned value. In case it is a constant, we store the mode in which
255 the constant should be interpreted. */
257 static rtx prev_insn_cc0
;
258 static enum machine_mode prev_insn_cc0_mode
;
261 /* Previous actual insn. 0 if at first insn of basic block. */
263 static rtx prev_insn
;
265 /* Insn being scanned. */
267 static rtx this_insn
;
269 /* Index by (pseudo) register number, gives the quantity number
270 of the register's current contents. */
274 /* Index by (pseudo) register number, gives the number of the next (or
275 previous) (pseudo) register in the chain of registers sharing the same
278 Or -1 if this register is at the end of the chain.
280 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
282 static int *reg_next_eqv
;
283 static int *reg_prev_eqv
;
285 /* Index by (pseudo) register number, gives the number of times
286 that register has been altered in the current basic block. */
288 static int *reg_tick
;
290 /* Index by (pseudo) register number, gives the reg_tick value at which
291 rtx's containing this register are valid in the hash table.
292 If this does not equal the current reg_tick value, such expressions
293 existing in the hash table are invalid.
294 If this is -1, no expressions containing this register have been
295 entered in the table. */
297 static int *reg_in_table
;
299 /* A HARD_REG_SET containing all the hard registers for which there is
300 currently a REG expression in the hash table. Note the difference
301 from the above variables, which indicate if the REG is mentioned in some
302 expression in the table. */
304 static HARD_REG_SET hard_regs_in_table
;
306 /* A HARD_REG_SET containing all the hard registers that are invalidated
309 static HARD_REG_SET regs_invalidated_by_call
;
311 /* Two vectors of ints:
312 one containing max_reg -1's; the other max_reg + 500 (an approximation
313 for max_qty) elements where element i contains i.
314 These are used to initialize various other vectors fast. */
316 static int *all_minus_one
;
317 static int *consec_ints
;
319 /* CUID of insn that starts the basic block currently being cse-processed. */
321 static int cse_basic_block_start
;
323 /* CUID of insn that ends the basic block currently being cse-processed. */
325 static int cse_basic_block_end
;
327 /* Vector mapping INSN_UIDs to cuids.
328 The cuids are like uids but increase monotonically always.
329 We use them to see whether a reg is used outside a given basic block. */
331 static int *uid_cuid
;
333 /* Highest UID in UID_CUID. */
336 /* Get the cuid of an insn. */
338 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
340 /* Nonzero if cse has altered conditional jump insns
341 in such a way that jump optimization should be redone. */
343 static int cse_jumps_altered
;
345 /* canon_hash stores 1 in do_not_record
346 if it notices a reference to CC0, PC, or some other volatile
349 static int do_not_record
;
351 #ifdef LOAD_EXTEND_OP
353 /* Scratch rtl used when looking for load-extended copy of a MEM. */
354 static rtx memory_extend_rtx
;
357 /* canon_hash stores 1 in hash_arg_in_memory
358 if it notices a reference to memory within the expression being hashed. */
360 static int hash_arg_in_memory
;
362 /* canon_hash stores 1 in hash_arg_in_struct
363 if it notices a reference to memory that's part of a structure. */
365 static int hash_arg_in_struct
;
367 /* The hash table contains buckets which are chains of `struct table_elt's,
368 each recording one expression's information.
369 That expression is in the `exp' field.
371 Those elements with the same hash code are chained in both directions
372 through the `next_same_hash' and `prev_same_hash' fields.
374 Each set of expressions with equivalent values
375 are on a two-way chain through the `next_same_value'
376 and `prev_same_value' fields, and all point with
377 the `first_same_value' field at the first element in
378 that chain. The chain is in order of increasing cost.
379 Each element's cost value is in its `cost' field.
381 The `in_memory' field is nonzero for elements that
382 involve any reference to memory. These elements are removed
383 whenever a write is done to an unidentified location in memory.
384 To be safe, we assume that a memory address is unidentified unless
385 the address is either a symbol constant or a constant plus
386 the frame pointer or argument pointer.
388 The `in_struct' field is nonzero for elements that
389 involve any reference to memory inside a structure or array.
391 The `related_value' field is used to connect related expressions
392 (that differ by adding an integer).
393 The related expressions are chained in a circular fashion.
394 `related_value' is zero for expressions for which this
397 The `cost' field stores the cost of this element's expression.
399 The `is_const' flag is set if the element is a constant (including
402 The `flag' field is used as a temporary during some search routines.
404 The `mode' field is usually the same as GET_MODE (`exp'), but
405 if `exp' is a CONST_INT and has no machine mode then the `mode'
406 field is the mode it was being used as. Each constant is
407 recorded separately for each mode it is used with. */
413 struct table_elt
*next_same_hash
;
414 struct table_elt
*prev_same_hash
;
415 struct table_elt
*next_same_value
;
416 struct table_elt
*prev_same_value
;
417 struct table_elt
*first_same_value
;
418 struct table_elt
*related_value
;
420 enum machine_mode mode
;
427 /* We don't want a lot of buckets, because we rarely have very many
428 things stored in the hash table, and a lot of buckets slows
429 down a lot of loops that happen frequently. */
432 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
433 register (hard registers may require `do_not_record' to be set). */
436 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
437 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
438 : canon_hash (X, M) % NBUCKETS)
440 /* Determine whether register number N is considered a fixed register for CSE.
441 It is desirable to replace other regs with fixed regs, to reduce need for
443 A reg wins if it is either the frame pointer or designated as fixed,
444 but not if it is an overlapping register. */
445 #ifdef OVERLAPPING_REGNO_P
446 #define FIXED_REGNO_P(N) \
447 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
448 || fixed_regs[N] || global_regs[N]) \
449 && ! OVERLAPPING_REGNO_P ((N)))
451 #define FIXED_REGNO_P(N) \
452 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
453 || fixed_regs[N] || global_regs[N])
456 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
457 hard registers and pointers into the frame are the cheapest with a cost
458 of 0. Next come pseudos with a cost of one and other hard registers with
459 a cost of 2. Aside from these special cases, call `rtx_cost'. */
461 #define CHEAP_REGNO(N) \
462 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
463 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
464 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
465 || ((N) < FIRST_PSEUDO_REGISTER \
466 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
468 /* A register is cheap if it is a user variable assigned to the register
469 or if its register number always corresponds to a cheap register. */
471 #define CHEAP_REG(N) \
472 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
473 || CHEAP_REGNO (REGNO (N)))
476 (GET_CODE (X) == REG \
477 ? (CHEAP_REG (X) ? 0 \
478 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
480 : rtx_cost (X, SET) * 2)
482 /* Determine if the quantity number for register X represents a valid index
483 into the `qty_...' variables. */
485 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
487 static struct table_elt
*table
[NBUCKETS
];
489 /* Chain of `struct table_elt's made so far for this function
490 but currently removed from the table. */
492 static struct table_elt
*free_element_chain
;
494 /* Number of `struct table_elt' structures made so far for this function. */
496 static int n_elements_made
;
498 /* Maximum value `n_elements_made' has had so far in this compilation
499 for functions previously processed. */
501 static int max_elements_made
;
503 /* Surviving equivalence class when two equivalence classes are merged
504 by recording the effects of a jump in the last insn. Zero if the
505 last insn was not a conditional jump. */
507 static struct table_elt
*last_jump_equiv_class
;
509 /* Set to the cost of a constant pool reference if one was found for a
510 symbolic constant. If this was found, it means we should try to
511 convert constants into constant pool entries if they don't fit in
514 static int constant_pool_entries_cost
;
516 /* Bits describing what kind of values in memory must be invalidated
517 for a particular instruction. If all three bits are zero,
518 no memory refs need to be invalidated. Each bit is more powerful
519 than the preceding ones, and if a bit is set then the preceding
522 Here is how the bits are set:
523 Pushing onto the stack invalidates only the stack pointer,
524 writing at a fixed address invalidates only variable addresses,
525 writing in a structure element at variable address
526 invalidates all but scalar variables,
527 and writing in anything else at variable address invalidates everything. */
531 int sp
: 1; /* Invalidate stack pointer. */
532 int var
: 1; /* Invalidate variable addresses. */
533 int nonscalar
: 1; /* Invalidate all but scalar variables. */
534 int all
: 1; /* Invalidate all memory refs. */
537 /* Define maximum length of a branch path. */
539 #define PATHLENGTH 10
541 /* This data describes a block that will be processed by cse_basic_block. */
543 struct cse_basic_block_data
{
544 /* Lowest CUID value of insns in block. */
546 /* Highest CUID value of insns in block. */
548 /* Total number of SETs in block. */
550 /* Last insn in the block. */
552 /* Size of current branch path, if any. */
554 /* Current branch path, indicating which branches will be taken. */
556 /* The branch insn. */
558 /* Whether it should be taken or not. AROUND is the same as taken
559 except that it is used when the destination label is not preceded
561 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
565 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
566 virtual regs here because the simplify_*_operation routines are called
567 by integrate.c, which is called before virtual register instantiation. */
569 #define FIXED_BASE_PLUS_P(X) \
570 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
571 || (X) == arg_pointer_rtx \
572 || (X) == virtual_stack_vars_rtx \
573 || (X) == virtual_incoming_args_rtx \
574 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
575 && (XEXP (X, 0) == frame_pointer_rtx \
576 || XEXP (X, 0) == hard_frame_pointer_rtx \
577 || XEXP (X, 0) == arg_pointer_rtx \
578 || XEXP (X, 0) == virtual_stack_vars_rtx \
579 || XEXP (X, 0) == virtual_incoming_args_rtx)))
581 /* Similar, but also allows reference to the stack pointer.
583 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
584 arg_pointer_rtx by itself is nonzero, because on at least one machine,
585 the i960, the arg pointer is zero when it is unused. */
587 #define NONZERO_BASE_PLUS_P(X) \
588 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
589 || (X) == virtual_stack_vars_rtx \
590 || (X) == virtual_incoming_args_rtx \
591 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
592 && (XEXP (X, 0) == frame_pointer_rtx \
593 || XEXP (X, 0) == hard_frame_pointer_rtx \
594 || XEXP (X, 0) == arg_pointer_rtx \
595 || XEXP (X, 0) == virtual_stack_vars_rtx \
596 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
597 || (X) == stack_pointer_rtx \
598 || (X) == virtual_stack_dynamic_rtx \
599 || (X) == virtual_outgoing_args_rtx \
600 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
601 && (XEXP (X, 0) == stack_pointer_rtx \
602 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
603 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
605 static void new_basic_block
PROTO((void));
606 static void make_new_qty
PROTO((int));
607 static void make_regs_eqv
PROTO((int, int));
608 static void delete_reg_equiv
PROTO((int));
609 static int mention_regs
PROTO((rtx
));
610 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
611 static void free_element
PROTO((struct table_elt
*));
612 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
613 static struct table_elt
*get_element
PROTO((void));
614 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
615 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
616 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
617 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
619 static void merge_equiv_classes
PROTO((struct table_elt
*,
620 struct table_elt
*));
621 static void invalidate
PROTO((rtx
));
622 static void remove_invalid_refs
PROTO((int));
623 static void rehash_using_reg
PROTO((rtx
));
624 static void invalidate_memory
PROTO((struct write_data
*));
625 static void invalidate_for_call
PROTO((void));
626 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
627 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
628 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
629 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
630 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
633 static int refers_to_p
PROTO((rtx
, rtx
));
634 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
636 static int cse_rtx_addr_varies_p
PROTO((rtx
));
637 static rtx canon_reg
PROTO((rtx
, rtx
));
638 static void find_best_addr
PROTO((rtx
, rtx
*));
639 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
641 enum machine_mode
*));
642 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
644 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
646 static rtx fold_rtx
PROTO((rtx
, rtx
));
647 static rtx equiv_constant
PROTO((rtx
));
648 static void record_jump_equiv
PROTO((rtx
, int));
649 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
651 static void cse_insn
PROTO((rtx
, int));
652 static void note_mem_written
PROTO((rtx
, struct write_data
*));
653 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
654 static rtx cse_process_notes
PROTO((rtx
, rtx
));
655 static void cse_around_loop
PROTO((rtx
));
656 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
657 static void invalidate_skipped_block
PROTO((rtx
));
658 static void cse_check_loop_start
PROTO((rtx
, rtx
));
659 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
660 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
661 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
663 extern int rtx_equal_function_value_matters
;
665 /* Return an estimate of the cost of computing rtx X.
666 One use is in cse, to decide which expression to keep in the hash table.
667 Another is in rtl generation, to pick the cheapest way to multiply.
668 Other uses like the latter are expected in the future. */
670 /* Return the right cost to give to an operation
671 to make the cost of the corresponding register-to-register instruction
672 N times that of a fast register-to-register instruction. */
674 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
677 rtx_cost (x
, outer_code
)
679 enum rtx_code outer_code
;
682 register enum rtx_code code
;
689 /* Compute the default costs of certain things.
690 Note that RTX_COSTS can override the defaults. */
696 /* Count multiplication by 2**n as a shift,
697 because if we are considering it, we would output it as a shift. */
698 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
699 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
702 total
= COSTS_N_INSNS (5);
708 total
= COSTS_N_INSNS (7);
711 /* Used in loop.c and combine.c as a marker. */
715 /* We don't want these to be used in substitutions because
716 we have no way of validating the resulting insn. So assign
717 anything containing an ASM_OPERANDS a very high cost. */
727 return ! CHEAP_REG (x
);
730 /* If we can't tie these modes, make this expensive. The larger
731 the mode, the more expensive it is. */
732 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
733 return COSTS_N_INSNS (2
734 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
737 RTX_COSTS (x
, code
, outer_code
);
739 CONST_COSTS (x
, code
, outer_code
);
742 /* Sum the costs of the sub-rtx's, plus cost of this operation,
743 which is already in total. */
745 fmt
= GET_RTX_FORMAT (code
);
746 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
748 total
+= rtx_cost (XEXP (x
, i
), code
);
749 else if (fmt
[i
] == 'E')
750 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
751 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
756 /* Clear the hash table and initialize each register with its own quantity,
757 for a new basic block. */
766 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
768 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
769 max_reg
* sizeof (int));
770 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
771 CLEAR_HARD_REG_SET (hard_regs_in_table
);
773 /* The per-quantity values used to be initialized here, but it is
774 much faster to initialize each as it is made in `make_new_qty'. */
776 for (i
= 0; i
< NBUCKETS
; i
++)
778 register struct table_elt
*this, *next
;
779 for (this = table
[i
]; this; this = next
)
781 next
= this->next_same_hash
;
786 bzero ((char *) table
, sizeof table
);
795 /* Say that register REG contains a quantity not in any register before
796 and initialize that quantity. */
804 if (next_qty
>= max_qty
)
807 q
= reg_qty
[reg
] = next_qty
++;
808 qty_first_reg
[q
] = reg
;
809 qty_last_reg
[q
] = reg
;
810 qty_const
[q
] = qty_const_insn
[q
] = 0;
811 qty_comparison_code
[q
] = UNKNOWN
;
813 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
816 /* Make reg NEW equivalent to reg OLD.
817 OLD is not changing; NEW is. */
820 make_regs_eqv (new, old
)
821 register int new, old
;
823 register int lastr
, firstr
;
824 register int q
= reg_qty
[old
];
826 /* Nothing should become eqv until it has a "non-invalid" qty number. */
827 if (! REGNO_QTY_VALID_P (old
))
831 firstr
= qty_first_reg
[q
];
832 lastr
= qty_last_reg
[q
];
834 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
835 hard regs. Among pseudos, if NEW will live longer than any other reg
836 of the same qty, and that is beyond the current basic block,
837 make it the new canonical replacement for this qty. */
838 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
839 /* Certain fixed registers might be of the class NO_REGS. This means
840 that not only can they not be allocated by the compiler, but
841 they cannot be used in substitutions or canonicalizations
843 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
844 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
845 || (new >= FIRST_PSEUDO_REGISTER
846 && (firstr
< FIRST_PSEUDO_REGISTER
847 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
848 || (uid_cuid
[regno_first_uid
[new]]
849 < cse_basic_block_start
))
850 && (uid_cuid
[regno_last_uid
[new]]
851 > uid_cuid
[regno_last_uid
[firstr
]]))))))
853 reg_prev_eqv
[firstr
] = new;
854 reg_next_eqv
[new] = firstr
;
855 reg_prev_eqv
[new] = -1;
856 qty_first_reg
[q
] = new;
860 /* If NEW is a hard reg (known to be non-fixed), insert at end.
861 Otherwise, insert before any non-fixed hard regs that are at the
862 end. Registers of class NO_REGS cannot be used as an
863 equivalent for anything. */
864 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
865 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
866 && new >= FIRST_PSEUDO_REGISTER
)
867 lastr
= reg_prev_eqv
[lastr
];
868 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
869 if (reg_next_eqv
[lastr
] >= 0)
870 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
872 qty_last_reg
[q
] = new;
873 reg_next_eqv
[lastr
] = new;
874 reg_prev_eqv
[new] = lastr
;
878 /* Remove REG from its equivalence class. */
881 delete_reg_equiv (reg
)
884 register int q
= reg_qty
[reg
];
887 /* If invalid, do nothing. */
891 p
= reg_prev_eqv
[reg
];
892 n
= reg_next_eqv
[reg
];
901 qty_first_reg
[q
] = n
;
906 /* Remove any invalid expressions from the hash table
907 that refer to any of the registers contained in expression X.
909 Make sure that newly inserted references to those registers
910 as subexpressions will be considered valid.
912 mention_regs is not called when a register itself
913 is being stored in the table.
915 Return 1 if we have done something that may have changed the hash code
922 register enum rtx_code code
;
925 register int changed
= 0;
933 register int regno
= REGNO (x
);
934 register int endregno
935 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
936 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
939 for (i
= regno
; i
< endregno
; i
++)
941 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
942 remove_invalid_refs (i
);
944 reg_in_table
[i
] = reg_tick
[i
];
950 /* If X is a comparison or a COMPARE and either operand is a register
951 that does not have a quantity, give it one. This is so that a later
952 call to record_jump_equiv won't cause X to be assigned a different
953 hash code and not found in the table after that call.
955 It is not necessary to do this here, since rehash_using_reg can
956 fix up the table later, but doing this here eliminates the need to
957 call that expensive function in the most common case where the only
958 use of the register is in the comparison. */
960 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
962 if (GET_CODE (XEXP (x
, 0)) == REG
963 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
964 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
966 rehash_using_reg (XEXP (x
, 0));
970 if (GET_CODE (XEXP (x
, 1)) == REG
971 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
972 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
974 rehash_using_reg (XEXP (x
, 1));
979 fmt
= GET_RTX_FORMAT (code
);
980 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
982 changed
|= mention_regs (XEXP (x
, i
));
983 else if (fmt
[i
] == 'E')
984 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
985 changed
|= mention_regs (XVECEXP (x
, i
, j
));
990 /* Update the register quantities for inserting X into the hash table
991 with a value equivalent to CLASSP.
992 (If the class does not contain a REG, it is irrelevant.)
993 If MODIFIED is nonzero, X is a destination; it is being modified.
994 Note that delete_reg_equiv should be called on a register
995 before insert_regs is done on that register with MODIFIED != 0.
997 Nonzero value means that elements of reg_qty have changed
998 so X's hash code may be different. */
1001 insert_regs (x
, classp
, modified
)
1003 struct table_elt
*classp
;
1006 if (GET_CODE (x
) == REG
)
1008 register int regno
= REGNO (x
);
1010 /* If REGNO is in the equivalence table already but is of the
1011 wrong mode for that equivalence, don't do anything here. */
1013 if (REGNO_QTY_VALID_P (regno
)
1014 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1017 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1020 for (classp
= classp
->first_same_value
;
1022 classp
= classp
->next_same_value
)
1023 if (GET_CODE (classp
->exp
) == REG
1024 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1026 make_regs_eqv (regno
, REGNO (classp
->exp
));
1030 make_new_qty (regno
);
1031 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1038 /* If X is a SUBREG, we will likely be inserting the inner register in the
1039 table. If that register doesn't have an assigned quantity number at
1040 this point but does later, the insertion that we will be doing now will
1041 not be accessible because its hash code will have changed. So assign
1042 a quantity number now. */
1044 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1045 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1047 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1048 mention_regs (SUBREG_REG (x
));
1052 return mention_regs (x
);
1055 /* Look in or update the hash table. */
1057 /* Put the element ELT on the list of free elements. */
1061 struct table_elt
*elt
;
1063 elt
->next_same_hash
= free_element_chain
;
1064 free_element_chain
= elt
;
1067 /* Return an element that is free for use. */
1069 static struct table_elt
*
1072 struct table_elt
*elt
= free_element_chain
;
1075 free_element_chain
= elt
->next_same_hash
;
1079 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1082 /* Remove table element ELT from use in the table.
1083 HASH is its hash code, made using the HASH macro.
1084 It's an argument because often that is known in advance
1085 and we save much time not recomputing it. */
1088 remove_from_table (elt
, hash
)
1089 register struct table_elt
*elt
;
1095 /* Mark this element as removed. See cse_insn. */
1096 elt
->first_same_value
= 0;
1098 /* Remove the table element from its equivalence class. */
1101 register struct table_elt
*prev
= elt
->prev_same_value
;
1102 register struct table_elt
*next
= elt
->next_same_value
;
1104 if (next
) next
->prev_same_value
= prev
;
1107 prev
->next_same_value
= next
;
1110 register struct table_elt
*newfirst
= next
;
1113 next
->first_same_value
= newfirst
;
1114 next
= next
->next_same_value
;
1119 /* Remove the table element from its hash bucket. */
1122 register struct table_elt
*prev
= elt
->prev_same_hash
;
1123 register struct table_elt
*next
= elt
->next_same_hash
;
1125 if (next
) next
->prev_same_hash
= prev
;
1128 prev
->next_same_hash
= next
;
1129 else if (table
[hash
] == elt
)
1133 /* This entry is not in the proper hash bucket. This can happen
1134 when two classes were merged by `merge_equiv_classes'. Search
1135 for the hash bucket that it heads. This happens only very
1136 rarely, so the cost is acceptable. */
1137 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1138 if (table
[hash
] == elt
)
1143 /* Remove the table element from its related-value circular chain. */
1145 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1147 register struct table_elt
*p
= elt
->related_value
;
1148 while (p
->related_value
!= elt
)
1149 p
= p
->related_value
;
1150 p
->related_value
= elt
->related_value
;
1151 if (p
->related_value
== p
)
1152 p
->related_value
= 0;
1158 /* Look up X in the hash table and return its table element,
1159 or 0 if X is not in the table.
1161 MODE is the machine-mode of X, or if X is an integer constant
1162 with VOIDmode then MODE is the mode with which X will be used.
1164 Here we are satisfied to find an expression whose tree structure
1167 static struct table_elt
*
1168 lookup (x
, hash
, mode
)
1171 enum machine_mode mode
;
1173 register struct table_elt
*p
;
1175 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1176 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1177 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1183 /* Like `lookup' but don't care whether the table element uses invalid regs.
1184 Also ignore discrepancies in the machine mode of a register. */
1186 static struct table_elt
*
1187 lookup_for_remove (x
, hash
, mode
)
1190 enum machine_mode mode
;
1192 register struct table_elt
*p
;
1194 if (GET_CODE (x
) == REG
)
1196 int regno
= REGNO (x
);
1197 /* Don't check the machine mode when comparing registers;
1198 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1199 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1200 if (GET_CODE (p
->exp
) == REG
1201 && REGNO (p
->exp
) == regno
)
1206 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1207 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1214 /* Look for an expression equivalent to X and with code CODE.
1215 If one is found, return that expression. */
1218 lookup_as_function (x
, code
)
1222 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1227 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1229 if (GET_CODE (p
->exp
) == code
1230 /* Make sure this is a valid entry in the table. */
1231 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1238 /* Insert X in the hash table, assuming HASH is its hash code
1239 and CLASSP is an element of the class it should go in
1240 (or 0 if a new class should be made).
1241 It is inserted at the proper position to keep the class in
1242 the order cheapest first.
1244 MODE is the machine-mode of X, or if X is an integer constant
1245 with VOIDmode then MODE is the mode with which X will be used.
1247 For elements of equal cheapness, the most recent one
1248 goes in front, except that the first element in the list
1249 remains first unless a cheaper element is added. The order of
1250 pseudo-registers does not matter, as canon_reg will be called to
1251 find the cheapest when a register is retrieved from the table.
1253 The in_memory field in the hash table element is set to 0.
1254 The caller must set it nonzero if appropriate.
1256 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1257 and if insert_regs returns a nonzero value
1258 you must then recompute its hash code before calling here.
1260 If necessary, update table showing constant values of quantities. */
1262 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1264 static struct table_elt
*
1265 insert (x
, classp
, hash
, mode
)
1267 register struct table_elt
*classp
;
1269 enum machine_mode mode
;
1271 register struct table_elt
*elt
;
1273 /* If X is a register and we haven't made a quantity for it,
1274 something is wrong. */
1275 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1278 /* If X is a hard register, show it is being put in the table. */
1279 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1281 int regno
= REGNO (x
);
1282 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1285 for (i
= regno
; i
< endregno
; i
++)
1286 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1290 /* Put an element for X into the right hash bucket. */
1292 elt
= get_element ();
1294 elt
->cost
= COST (x
);
1295 elt
->next_same_value
= 0;
1296 elt
->prev_same_value
= 0;
1297 elt
->next_same_hash
= table
[hash
];
1298 elt
->prev_same_hash
= 0;
1299 elt
->related_value
= 0;
1302 elt
->is_const
= (CONSTANT_P (x
)
1303 /* GNU C++ takes advantage of this for `this'
1304 (and other const values). */
1305 || (RTX_UNCHANGING_P (x
)
1306 && GET_CODE (x
) == REG
1307 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1308 || FIXED_BASE_PLUS_P (x
));
1311 table
[hash
]->prev_same_hash
= elt
;
1314 /* Put it into the proper value-class. */
1317 classp
= classp
->first_same_value
;
1318 if (CHEAPER (elt
, classp
))
1319 /* Insert at the head of the class */
1321 register struct table_elt
*p
;
1322 elt
->next_same_value
= classp
;
1323 classp
->prev_same_value
= elt
;
1324 elt
->first_same_value
= elt
;
1326 for (p
= classp
; p
; p
= p
->next_same_value
)
1327 p
->first_same_value
= elt
;
1331 /* Insert not at head of the class. */
1332 /* Put it after the last element cheaper than X. */
1333 register struct table_elt
*p
, *next
;
1334 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1336 /* Put it after P and before NEXT. */
1337 elt
->next_same_value
= next
;
1339 next
->prev_same_value
= elt
;
1340 elt
->prev_same_value
= p
;
1341 p
->next_same_value
= elt
;
1342 elt
->first_same_value
= classp
;
1346 elt
->first_same_value
= elt
;
1348 /* If this is a constant being set equivalent to a register or a register
1349 being set equivalent to a constant, note the constant equivalence.
1351 If this is a constant, it cannot be equivalent to a different constant,
1352 and a constant is the only thing that can be cheaper than a register. So
1353 we know the register is the head of the class (before the constant was
1356 If this is a register that is not already known equivalent to a
1357 constant, we must check the entire class.
1359 If this is a register that is already known equivalent to an insn,
1360 update `qty_const_insn' to show that `this_insn' is the latest
1361 insn making that quantity equivalent to the constant. */
1363 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1365 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1366 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1367 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1370 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1372 register struct table_elt
*p
;
1374 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1378 qty_const
[reg_qty
[REGNO (x
)]]
1379 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1380 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1386 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1387 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1388 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1390 /* If this is a constant with symbolic value,
1391 and it has a term with an explicit integer value,
1392 link it up with related expressions. */
1393 if (GET_CODE (x
) == CONST
)
1395 rtx subexp
= get_related_value (x
);
1397 struct table_elt
*subelt
, *subelt_prev
;
1401 /* Get the integer-free subexpression in the hash table. */
1402 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1403 subelt
= lookup (subexp
, subhash
, mode
);
1405 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1406 /* Initialize SUBELT's circular chain if it has none. */
1407 if (subelt
->related_value
== 0)
1408 subelt
->related_value
= subelt
;
1409 /* Find the element in the circular chain that precedes SUBELT. */
1410 subelt_prev
= subelt
;
1411 while (subelt_prev
->related_value
!= subelt
)
1412 subelt_prev
= subelt_prev
->related_value
;
1413 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1414 This way the element that follows SUBELT is the oldest one. */
1415 elt
->related_value
= subelt_prev
->related_value
;
1416 subelt_prev
->related_value
= elt
;
1423 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1424 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1425 the two classes equivalent.
1427 CLASS1 will be the surviving class; CLASS2 should not be used after this
1430 Any invalid entries in CLASS2 will not be copied. */
1433 merge_equiv_classes (class1
, class2
)
1434 struct table_elt
*class1
, *class2
;
1436 struct table_elt
*elt
, *next
, *new;
1438 /* Ensure we start with the head of the classes. */
1439 class1
= class1
->first_same_value
;
1440 class2
= class2
->first_same_value
;
1442 /* If they were already equal, forget it. */
1443 if (class1
== class2
)
1446 for (elt
= class2
; elt
; elt
= next
)
1450 enum machine_mode mode
= elt
->mode
;
1452 next
= elt
->next_same_value
;
1454 /* Remove old entry, make a new one in CLASS1's class.
1455 Don't do this for invalid entries as we cannot find their
1456 hash code (it also isn't necessary). */
1457 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1459 hash_arg_in_memory
= 0;
1460 hash_arg_in_struct
= 0;
1461 hash
= HASH (exp
, mode
);
1463 if (GET_CODE (exp
) == REG
)
1464 delete_reg_equiv (REGNO (exp
));
1466 remove_from_table (elt
, hash
);
1468 if (insert_regs (exp
, class1
, 0))
1469 hash
= HASH (exp
, mode
);
1470 new = insert (exp
, class1
, hash
, mode
);
1471 new->in_memory
= hash_arg_in_memory
;
1472 new->in_struct
= hash_arg_in_struct
;
1477 /* Remove from the hash table, or mark as invalid,
1478 all expressions whose values could be altered by storing in X.
1479 X is a register, a subreg, or a memory reference with nonvarying address
1480 (because, when a memory reference with a varying address is stored in,
1481 all memory references are removed by invalidate_memory
1482 so specific invalidation is superfluous).
1484 A nonvarying address may be just a register or just
1485 a symbol reference, or it may be either of those plus
1486 a numeric offset. */
1493 register struct table_elt
*p
;
1495 HOST_WIDE_INT start
, end
;
1497 /* If X is a register, dependencies on its contents
1498 are recorded through the qty number mechanism.
1499 Just change the qty number of the register,
1500 mark it as invalid for expressions that refer to it,
1501 and remove it itself. */
1503 if (GET_CODE (x
) == REG
)
1505 register int regno
= REGNO (x
);
1506 register unsigned hash
= HASH (x
, GET_MODE (x
));
1508 /* Remove REGNO from any quantity list it might be on and indicate
1509 that it's value might have changed. If it is a pseudo, remove its
1510 entry from the hash table.
1512 For a hard register, we do the first two actions above for any
1513 additional hard registers corresponding to X. Then, if any of these
1514 registers are in the table, we must remove any REG entries that
1515 overlap these registers. */
1517 delete_reg_equiv (regno
);
1520 if (regno
>= FIRST_PSEUDO_REGISTER
)
1521 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1524 HOST_WIDE_INT in_table
1525 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1526 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1527 int tregno
, tendregno
;
1528 register struct table_elt
*p
, *next
;
1530 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1532 for (i
= regno
+ 1; i
< endregno
; i
++)
1534 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1535 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1536 delete_reg_equiv (i
);
1541 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1542 for (p
= table
[hash
]; p
; p
= next
)
1544 next
= p
->next_same_hash
;
1546 if (GET_CODE (p
->exp
) != REG
1547 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1550 tregno
= REGNO (p
->exp
);
1552 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1553 if (tendregno
> regno
&& tregno
< endregno
)
1554 remove_from_table (p
, hash
);
1561 if (GET_CODE (x
) == SUBREG
)
1563 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1565 invalidate (SUBREG_REG (x
));
1569 /* X is not a register; it must be a memory reference with
1570 a nonvarying address. Remove all hash table elements
1571 that refer to overlapping pieces of memory. */
1573 if (GET_CODE (x
) != MEM
)
1576 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (GET_MODE (x
)),
1577 &base
, &start
, &end
);
1579 for (i
= 0; i
< NBUCKETS
; i
++)
1581 register struct table_elt
*next
;
1582 for (p
= table
[i
]; p
; p
= next
)
1584 next
= p
->next_same_hash
;
1585 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1586 remove_from_table (p
, i
);
1591 /* Remove all expressions that refer to register REGNO,
1592 since they are already invalid, and we are about to
1593 mark that register valid again and don't want the old
1594 expressions to reappear as valid. */
1597 remove_invalid_refs (regno
)
1601 register struct table_elt
*p
, *next
;
1603 for (i
= 0; i
< NBUCKETS
; i
++)
1604 for (p
= table
[i
]; p
; p
= next
)
1606 next
= p
->next_same_hash
;
1607 if (GET_CODE (p
->exp
) != REG
1608 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1609 remove_from_table (p
, i
);
1613 /* Recompute the hash codes of any valid entries in the hash table that
1614 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1616 This is called when we make a jump equivalence. */
1619 rehash_using_reg (x
)
1623 struct table_elt
*p
, *next
;
1626 if (GET_CODE (x
) == SUBREG
)
1629 /* If X is not a register or if the register is known not to be in any
1630 valid entries in the table, we have no work to do. */
1632 if (GET_CODE (x
) != REG
1633 || reg_in_table
[REGNO (x
)] < 0
1634 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1637 /* Scan all hash chains looking for valid entries that mention X.
1638 If we find one and it is in the wrong hash chain, move it. We can skip
1639 objects that are registers, since they are handled specially. */
1641 for (i
= 0; i
< NBUCKETS
; i
++)
1642 for (p
= table
[i
]; p
; p
= next
)
1644 next
= p
->next_same_hash
;
1645 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1646 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1647 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1649 if (p
->next_same_hash
)
1650 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1652 if (p
->prev_same_hash
)
1653 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1655 table
[i
] = p
->next_same_hash
;
1657 p
->next_same_hash
= table
[hash
];
1658 p
->prev_same_hash
= 0;
1660 table
[hash
]->prev_same_hash
= p
;
1666 /* Remove from the hash table all expressions that reference memory,
1667 or some of them as specified by *WRITES. */
1670 invalidate_memory (writes
)
1671 struct write_data
*writes
;
1674 register struct table_elt
*p
, *next
;
1675 int all
= writes
->all
;
1676 int nonscalar
= writes
->nonscalar
;
1678 for (i
= 0; i
< NBUCKETS
; i
++)
1679 for (p
= table
[i
]; p
; p
= next
)
1681 next
= p
->next_same_hash
;
1684 || (nonscalar
&& p
->in_struct
)
1685 || cse_rtx_addr_varies_p (p
->exp
)))
1686 remove_from_table (p
, i
);
1690 /* Remove from the hash table any expression that is a call-clobbered
1691 register. Also update their TICK values. */
1694 invalidate_for_call ()
1696 int regno
, endregno
;
1699 struct table_elt
*p
, *next
;
1702 /* Go through all the hard registers. For each that is clobbered in
1703 a CALL_INSN, remove the register from quantity chains and update
1704 reg_tick if defined. Also see if any of these registers is currently
1707 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1708 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1710 delete_reg_equiv (regno
);
1711 if (reg_tick
[regno
] >= 0)
1714 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1717 /* In the case where we have no call-clobbered hard registers in the
1718 table, we are done. Otherwise, scan the table and remove any
1719 entry that overlaps a call-clobbered register. */
1722 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1723 for (p
= table
[hash
]; p
; p
= next
)
1725 next
= p
->next_same_hash
;
1727 if (GET_CODE (p
->exp
) != REG
1728 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1731 regno
= REGNO (p
->exp
);
1732 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1734 for (i
= regno
; i
< endregno
; i
++)
1735 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1737 remove_from_table (p
, hash
);
1743 /* Given an expression X of type CONST,
1744 and ELT which is its table entry (or 0 if it
1745 is not in the hash table),
1746 return an alternate expression for X as a register plus integer.
1747 If none can be found, return 0. */
1750 use_related_value (x
, elt
)
1752 struct table_elt
*elt
;
1754 register struct table_elt
*relt
= 0;
1755 register struct table_elt
*p
, *q
;
1756 HOST_WIDE_INT offset
;
1758 /* First, is there anything related known?
1759 If we have a table element, we can tell from that.
1760 Otherwise, must look it up. */
1762 if (elt
!= 0 && elt
->related_value
!= 0)
1764 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1766 rtx subexp
= get_related_value (x
);
1768 relt
= lookup (subexp
,
1769 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1776 /* Search all related table entries for one that has an
1777 equivalent register. */
1782 /* This loop is strange in that it is executed in two different cases.
1783 The first is when X is already in the table. Then it is searching
1784 the RELATED_VALUE list of X's class (RELT). The second case is when
1785 X is not in the table. Then RELT points to a class for the related
1788 Ensure that, whatever case we are in, that we ignore classes that have
1789 the same value as X. */
1791 if (rtx_equal_p (x
, p
->exp
))
1794 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1795 if (GET_CODE (q
->exp
) == REG
)
1801 p
= p
->related_value
;
1803 /* We went all the way around, so there is nothing to be found.
1804 Alternatively, perhaps RELT was in the table for some other reason
1805 and it has no related values recorded. */
1806 if (p
== relt
|| p
== 0)
1813 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1814 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1815 return plus_constant (q
->exp
, offset
);
1818 /* Hash an rtx. We are careful to make sure the value is never negative.
1819 Equivalent registers hash identically.
1820 MODE is used in hashing for CONST_INTs only;
1821 otherwise the mode of X is used.
1823 Store 1 in do_not_record if any subexpression is volatile.
1825 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1826 which does not have the RTX_UNCHANGING_P bit set.
1827 In this case, also store 1 in hash_arg_in_struct
1828 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1830 Note that cse_insn knows that the hash code of a MEM expression
1831 is just (int) MEM plus the hash code of the address. */
1834 canon_hash (x
, mode
)
1836 enum machine_mode mode
;
1839 register unsigned hash
= 0;
1840 register enum rtx_code code
;
1843 /* repeat is used to turn tail-recursion into iteration. */
1848 code
= GET_CODE (x
);
1853 register int regno
= REGNO (x
);
1855 /* On some machines, we can't record any non-fixed hard register,
1856 because extending its life will cause reload problems. We
1857 consider ap, fp, and sp to be fixed for this purpose.
1858 On all machines, we can't record any global registers. */
1860 if (regno
< FIRST_PSEUDO_REGISTER
1861 && (global_regs
[regno
]
1862 #ifdef SMALL_REGISTER_CLASSES
1863 || (! fixed_regs
[regno
]
1864 && regno
!= FRAME_POINTER_REGNUM
1865 && regno
!= HARD_FRAME_POINTER_REGNUM
1866 && regno
!= ARG_POINTER_REGNUM
1867 && regno
!= STACK_POINTER_REGNUM
)
1874 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1880 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1881 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1886 /* This is like the general case, except that it only counts
1887 the integers representing the constant. */
1888 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1889 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1891 unsigned tem
= XINT (x
, i
);
1896 /* Assume there is only one rtx object for any given label. */
1899 += ((unsigned) LABEL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XEXP (x
, 0);
1904 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XEXP (x
, 0);
1908 if (MEM_VOLATILE_P (x
))
1913 if (! RTX_UNCHANGING_P (x
))
1915 hash_arg_in_memory
= 1;
1916 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1918 /* Now that we have already found this special case,
1919 might as well speed it up as much as possible. */
1920 hash
+= (unsigned) MEM
;
1931 case UNSPEC_VOLATILE
:
1936 if (MEM_VOLATILE_P (x
))
1943 i
= GET_RTX_LENGTH (code
) - 1;
1944 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1945 fmt
= GET_RTX_FORMAT (code
);
1950 rtx tem
= XEXP (x
, i
);
1953 /* If the operand is a REG that is equivalent to a constant, hash
1954 as if we were hashing the constant, since we will be comparing
1956 if (tem
!= 0 && GET_CODE (tem
) == REG
1957 && REGNO_QTY_VALID_P (REGNO (tem
))
1958 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1959 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1960 && CONSTANT_P (tem1
))
1963 /* If we are about to do the last recursive call
1964 needed at this level, change it into iteration.
1965 This function is called enough to be worth it. */
1971 hash
+= canon_hash (tem
, 0);
1973 else if (fmt
[i
] == 'E')
1974 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1975 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1976 else if (fmt
[i
] == 's')
1978 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
1983 else if (fmt
[i
] == 'i')
1985 register unsigned tem
= XINT (x
, i
);
1994 /* Like canon_hash but with no side effects. */
1999 enum machine_mode mode
;
2001 int save_do_not_record
= do_not_record
;
2002 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2003 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2004 unsigned hash
= canon_hash (x
, mode
);
2005 hash_arg_in_memory
= save_hash_arg_in_memory
;
2006 hash_arg_in_struct
= save_hash_arg_in_struct
;
2007 do_not_record
= save_do_not_record
;
2011 /* Return 1 iff X and Y would canonicalize into the same thing,
2012 without actually constructing the canonicalization of either one.
2013 If VALIDATE is nonzero,
2014 we assume X is an expression being processed from the rtl
2015 and Y was found in the hash table. We check register refs
2016 in Y for being marked as valid.
2018 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2019 that is known to be in the register. Ordinarily, we don't allow them
2020 to match, because letting them match would cause unpredictable results
2021 in all the places that search a hash table chain for an equivalent
2022 for a given value. A possible equivalent that has different structure
2023 has its hash code computed from different data. Whether the hash code
2024 is the same as that of the the given value is pure luck. */
2027 exp_equiv_p (x
, y
, validate
, equal_values
)
2033 register enum rtx_code code
;
2036 /* Note: it is incorrect to assume an expression is equivalent to itself
2037 if VALIDATE is nonzero. */
2038 if (x
== y
&& !validate
)
2040 if (x
== 0 || y
== 0)
2043 code
= GET_CODE (x
);
2044 if (code
!= GET_CODE (y
))
2049 /* If X is a constant and Y is a register or vice versa, they may be
2050 equivalent. We only have to validate if Y is a register. */
2051 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2052 && REGNO_QTY_VALID_P (REGNO (y
))
2053 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2054 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2055 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2058 if (CONSTANT_P (y
) && code
== REG
2059 && REGNO_QTY_VALID_P (REGNO (x
))
2060 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2061 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2067 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2068 if (GET_MODE (x
) != GET_MODE (y
))
2078 return INTVAL (x
) == INTVAL (y
);
2082 return XEXP (x
, 0) == XEXP (y
, 0);
2086 int regno
= REGNO (y
);
2088 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2089 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2092 /* If the quantities are not the same, the expressions are not
2093 equivalent. If there are and we are not to validate, they
2094 are equivalent. Otherwise, ensure all regs are up-to-date. */
2096 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2102 for (i
= regno
; i
< endregno
; i
++)
2103 if (reg_in_table
[i
] != reg_tick
[i
])
2109 /* For commutative operations, check both orders. */
2117 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2118 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2119 validate
, equal_values
))
2120 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2121 validate
, equal_values
)
2122 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2123 validate
, equal_values
)));
2126 /* Compare the elements. If any pair of corresponding elements
2127 fail to match, return 0 for the whole things. */
2129 fmt
= GET_RTX_FORMAT (code
);
2130 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2135 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2140 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2142 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2143 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2144 validate
, equal_values
))
2149 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2154 if (XINT (x
, i
) != XINT (y
, i
))
2159 if (XWINT (x
, i
) != XWINT (y
, i
))
2174 /* Return 1 iff any subexpression of X matches Y.
2175 Here we do not require that X or Y be valid (for registers referred to)
2176 for being in the hash table. */
2183 register enum rtx_code code
;
2189 if (x
== 0 || y
== 0)
2192 code
= GET_CODE (x
);
2193 /* If X as a whole has the same code as Y, they may match.
2195 if (code
== GET_CODE (y
))
2197 if (exp_equiv_p (x
, y
, 0, 1))
2201 /* X does not match, so try its subexpressions. */
2203 fmt
= GET_RTX_FORMAT (code
);
2204 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2213 if (refers_to_p (XEXP (x
, i
), y
))
2216 else if (fmt
[i
] == 'E')
2219 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2220 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2227 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2228 set PBASE, PSTART, and PEND which correspond to the base of the address,
2229 the starting offset, and ending offset respectively.
2231 ADDR is known to be a nonvarying address.
2233 cse_address_varies_p returns zero for nonvarying addresses. */
2236 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2240 HOST_WIDE_INT
*pstart
, *pend
;
2243 HOST_WIDE_INT start
, end
;
2249 /* Registers with nonvarying addresses usually have constant equivalents;
2250 but the frame pointer register is also possible. */
2251 if (GET_CODE (base
) == REG
2253 && REGNO_QTY_VALID_P (REGNO (base
))
2254 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2255 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2256 base
= qty_const
[reg_qty
[REGNO (base
)]];
2257 else if (GET_CODE (base
) == PLUS
2258 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2259 && GET_CODE (XEXP (base
, 0)) == REG
2261 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2262 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2263 == GET_MODE (XEXP (base
, 0)))
2264 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2266 start
= INTVAL (XEXP (base
, 1));
2267 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2270 /* Handle everything that we can find inside an address that has been
2271 viewed as constant. */
2275 /* If no part of this switch does a "continue", the code outside
2276 will exit this loop. */
2278 switch (GET_CODE (base
))
2281 /* By definition, operand1 of a LO_SUM is the associated constant
2282 address. Use the associated constant address as the base
2284 base
= XEXP (base
, 1);
2288 /* Strip off CONST. */
2289 base
= XEXP (base
, 0);
2293 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2295 start
+= INTVAL (XEXP (base
, 1));
2296 base
= XEXP (base
, 0);
2302 /* Handle the case of an AND which is the negative of a power of
2303 two. This is used to represent unaligned memory operations. */
2304 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2305 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2307 set_nonvarying_address_components (XEXP (base
, 0), size
,
2308 pbase
, pstart
, pend
);
2310 /* Assume the worst misalignment. START is affected, but not
2311 END, so compensate but adjusting SIZE. Don't lose any
2312 constant we already had. */
2314 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2315 start
+= *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2326 /* Set the return values. */
2332 /* Return 1 iff any subexpression of X refers to memory
2333 at an address of BASE plus some offset
2334 such that any of the bytes' offsets fall between START (inclusive)
2335 and END (exclusive).
2337 The value is undefined if X is a varying address (as determined by
2338 cse_rtx_addr_varies_p). This function is not used in such cases.
2340 When used in the cse pass, `qty_const' is nonzero, and it is used
2341 to treat an address that is a register with a known constant value
2342 as if it were that constant value.
2343 In the loop pass, `qty_const' is zero, so this is not done. */
2346 refers_to_mem_p (x
, base
, start
, end
)
2348 HOST_WIDE_INT start
, end
;
2350 register HOST_WIDE_INT i
;
2351 register enum rtx_code code
;
2354 if (GET_CODE (base
) == CONST_INT
)
2356 start
+= INTVAL (base
);
2357 end
+= INTVAL (base
);
2365 code
= GET_CODE (x
);
2368 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2370 HOST_WIDE_INT mystart
, myend
;
2372 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2373 &mybase
, &mystart
, &myend
);
2376 /* refers_to_mem_p is never called with varying addresses.
2377 If the base addresses are not equal, there is no chance
2378 of the memory addresses conflicting. */
2379 if (! rtx_equal_p (mybase
, base
))
2382 return myend
> start
&& mystart
< end
;
2385 /* X does not match, so try its subexpressions. */
2387 fmt
= GET_RTX_FORMAT (code
);
2388 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2397 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2400 else if (fmt
[i
] == 'E')
2403 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2404 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2411 /* Nonzero if X refers to memory at a varying address;
2412 except that a register which has at the moment a known constant value
2413 isn't considered variable. */
2416 cse_rtx_addr_varies_p (x
)
2419 /* We need not check for X and the equivalence class being of the same
2420 mode because if X is equivalent to a constant in some mode, it
2421 doesn't vary in any mode. */
2423 if (GET_CODE (x
) == MEM
2424 && GET_CODE (XEXP (x
, 0)) == REG
2425 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2426 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2427 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2430 if (GET_CODE (x
) == MEM
2431 && GET_CODE (XEXP (x
, 0)) == PLUS
2432 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2433 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2434 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2435 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2436 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2437 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2440 return rtx_addr_varies_p (x
);
2443 /* Canonicalize an expression:
2444 replace each register reference inside it
2445 with the "oldest" equivalent register.
2447 If INSN is non-zero and we are replacing a pseudo with a hard register
2448 or vice versa, validate_change is used to ensure that INSN remains valid
2449 after we make our substitution. The calls are made with IN_GROUP non-zero
2450 so apply_change_group must be called upon the outermost return from this
2451 function (unless INSN is zero). The result of apply_change_group can
2452 generally be discarded since the changes we are making are optional. */
2460 register enum rtx_code code
;
2466 code
= GET_CODE (x
);
2484 /* Never replace a hard reg, because hard regs can appear
2485 in more than one machine mode, and we must preserve the mode
2486 of each occurrence. Also, some hard regs appear in
2487 MEMs that are shared and mustn't be altered. Don't try to
2488 replace any reg that maps to a reg of class NO_REGS. */
2489 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2490 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2493 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2494 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2495 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2496 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2500 fmt
= GET_RTX_FORMAT (code
);
2501 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2507 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2509 /* If replacing pseudo with hard reg or vice versa, ensure the
2510 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2511 if (insn
!= 0 && new != 0
2512 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2513 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2514 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2515 || insn_n_dups
[recog_memoized (insn
)] > 0))
2516 validate_change (insn
, &XEXP (x
, i
), new, 1);
2520 else if (fmt
[i
] == 'E')
2521 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2522 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2528 /* LOC is a location with INSN that is an operand address (the contents of
2529 a MEM). Find the best equivalent address to use that is valid for this
2532 On most CISC machines, complicated address modes are costly, and rtx_cost
2533 is a good approximation for that cost. However, most RISC machines have
2534 only a few (usually only one) memory reference formats. If an address is
2535 valid at all, it is often just as cheap as any other address. Hence, for
2536 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2537 costs of various addresses. For two addresses of equal cost, choose the one
2538 with the highest `rtx_cost' value as that has the potential of eliminating
2539 the most insns. For equal costs, we choose the first in the equivalence
2540 class. Note that we ignore the fact that pseudo registers are cheaper
2541 than hard registers here because we would also prefer the pseudo registers.
2545 find_best_addr (insn
, loc
)
2549 struct table_elt
*elt
, *p
;
2552 int found_better
= 1;
2553 int save_do_not_record
= do_not_record
;
2554 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2555 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2560 /* Do not try to replace constant addresses or addresses of local and
2561 argument slots. These MEM expressions are made only once and inserted
2562 in many instructions, as well as being used to control symbol table
2563 output. It is not safe to clobber them.
2565 There are some uncommon cases where the address is already in a register
2566 for some reason, but we cannot take advantage of that because we have
2567 no easy way to unshare the MEM. In addition, looking up all stack
2568 addresses is costly. */
2569 if ((GET_CODE (addr
) == PLUS
2570 && GET_CODE (XEXP (addr
, 0)) == REG
2571 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2572 && (regno
= REGNO (XEXP (addr
, 0)),
2573 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2574 || regno
== ARG_POINTER_REGNUM
))
2575 || (GET_CODE (addr
) == REG
2576 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2577 || regno
== HARD_FRAME_POINTER_REGNUM
2578 || regno
== ARG_POINTER_REGNUM
))
2579 || CONSTANT_ADDRESS_P (addr
))
2582 /* If this address is not simply a register, try to fold it. This will
2583 sometimes simplify the expression. Many simplifications
2584 will not be valid, but some, usually applying the associative rule, will
2585 be valid and produce better code. */
2586 if (GET_CODE (addr
) != REG
2587 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2590 /* If this address is not in the hash table, we can't look for equivalences
2591 of the whole address. Also, ignore if volatile. */
2594 hash
= HASH (addr
, Pmode
);
2595 addr_volatile
= do_not_record
;
2596 do_not_record
= save_do_not_record
;
2597 hash_arg_in_memory
= save_hash_arg_in_memory
;
2598 hash_arg_in_struct
= save_hash_arg_in_struct
;
2603 elt
= lookup (addr
, hash
, Pmode
);
2605 #ifndef ADDRESS_COST
2608 our_cost
= elt
->cost
;
2610 /* Find the lowest cost below ours that works. */
2611 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2612 if (elt
->cost
< our_cost
2613 && (GET_CODE (elt
->exp
) == REG
2614 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2615 && validate_change (insn
, loc
,
2616 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2623 /* We need to find the best (under the criteria documented above) entry
2624 in the class that is valid. We use the `flag' field to indicate
2625 choices that were invalid and iterate until we can't find a better
2626 one that hasn't already been tried. */
2628 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2631 while (found_better
)
2633 int best_addr_cost
= ADDRESS_COST (*loc
);
2634 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2635 struct table_elt
*best_elt
= elt
;
2638 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2640 && (GET_CODE (p
->exp
) == REG
2641 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2642 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2643 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2644 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2647 best_addr_cost
= ADDRESS_COST (p
->exp
);
2648 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2654 if (validate_change (insn
, loc
,
2655 canon_reg (copy_rtx (best_elt
->exp
),
2664 /* If the address is a binary operation with the first operand a register
2665 and the second a constant, do the same as above, but looking for
2666 equivalences of the register. Then try to simplify before checking for
2667 the best address to use. This catches a few cases: First is when we
2668 have REG+const and the register is another REG+const. We can often merge
2669 the constants and eliminate one insn and one register. It may also be
2670 that a machine has a cheap REG+REG+const. Finally, this improves the
2671 code on the Alpha for unaligned byte stores. */
2673 if (flag_expensive_optimizations
2674 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2675 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2676 && GET_CODE (XEXP (*loc
, 0)) == REG
2677 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2679 rtx c
= XEXP (*loc
, 1);
2682 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2683 do_not_record
= save_do_not_record
;
2684 hash_arg_in_memory
= save_hash_arg_in_memory
;
2685 hash_arg_in_struct
= save_hash_arg_in_struct
;
2687 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2691 /* We need to find the best (under the criteria documented above) entry
2692 in the class that is valid. We use the `flag' field to indicate
2693 choices that were invalid and iterate until we can't find a better
2694 one that hasn't already been tried. */
2696 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2699 while (found_better
)
2701 int best_addr_cost
= ADDRESS_COST (*loc
);
2702 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2703 struct table_elt
*best_elt
= elt
;
2704 rtx best_rtx
= *loc
;
2707 /* This is at worst case an O(n^2) algorithm, so limit our search
2708 to the first 32 elements on the list. This avoids trouble
2709 compiling code with very long basic blocks that can easily
2710 call cse_gen_binary so many times that we run out of memory. */
2713 for (p
= elt
->first_same_value
, count
= 0;
2715 p
= p
->next_same_value
, count
++)
2717 && (GET_CODE (p
->exp
) == REG
2718 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2720 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2722 if ((ADDRESS_COST (new) < best_addr_cost
2723 || (ADDRESS_COST (new) == best_addr_cost
2724 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2727 best_addr_cost
= ADDRESS_COST (new);
2728 best_rtx_cost
= (COST (new) + 1) >> 1;
2736 if (validate_change (insn
, loc
,
2737 canon_reg (copy_rtx (best_rtx
),
2748 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2749 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2750 what values are being compared.
2752 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2753 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2754 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2755 compared to produce cc0.
2757 The return value is the comparison operator and is either the code of
2758 A or the code corresponding to the inverse of the comparison. */
2760 static enum rtx_code
2761 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2764 enum machine_mode
*pmode1
, *pmode2
;
2768 arg1
= *parg1
, arg2
= *parg2
;
2770 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2772 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2774 /* Set non-zero when we find something of interest. */
2776 int reverse_code
= 0;
2777 struct table_elt
*p
= 0;
2779 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2780 On machines with CC0, this is the only case that can occur, since
2781 fold_rtx will return the COMPARE or item being compared with zero
2784 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2787 /* If ARG1 is a comparison operator and CODE is testing for
2788 STORE_FLAG_VALUE, get the inner arguments. */
2790 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2793 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2794 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2795 #ifdef FLOAT_STORE_FLAG_VALUE
2796 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2797 && FLOAT_STORE_FLAG_VALUE
< 0)
2802 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2803 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2804 #ifdef FLOAT_STORE_FLAG_VALUE
2805 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2806 && FLOAT_STORE_FLAG_VALUE
< 0)
2809 x
= arg1
, reverse_code
= 1;
2812 /* ??? We could also check for
2814 (ne (and (eq (...) (const_int 1))) (const_int 0))
2816 and related forms, but let's wait until we see them occurring. */
2819 /* Look up ARG1 in the hash table and see if it has an equivalence
2820 that lets us see what is being compared. */
2821 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2823 if (p
) p
= p
->first_same_value
;
2825 for (; p
; p
= p
->next_same_value
)
2827 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2829 /* If the entry isn't valid, skip it. */
2830 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2833 if (GET_CODE (p
->exp
) == COMPARE
2834 /* Another possibility is that this machine has a compare insn
2835 that includes the comparison code. In that case, ARG1 would
2836 be equivalent to a comparison operation that would set ARG1 to
2837 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2838 ORIG_CODE is the actual comparison being done; if it is an EQ,
2839 we must reverse ORIG_CODE. On machine with a negative value
2840 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2843 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2844 && (GET_MODE_BITSIZE (inner_mode
)
2845 <= HOST_BITS_PER_WIDE_INT
)
2846 && (STORE_FLAG_VALUE
2847 & ((HOST_WIDE_INT
) 1
2848 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2849 #ifdef FLOAT_STORE_FLAG_VALUE
2851 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2852 && FLOAT_STORE_FLAG_VALUE
< 0)
2855 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2860 else if ((code
== EQ
2862 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2863 && (GET_MODE_BITSIZE (inner_mode
)
2864 <= HOST_BITS_PER_WIDE_INT
)
2865 && (STORE_FLAG_VALUE
2866 & ((HOST_WIDE_INT
) 1
2867 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2868 #ifdef FLOAT_STORE_FLAG_VALUE
2870 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2871 && FLOAT_STORE_FLAG_VALUE
< 0)
2874 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2881 /* If this is fp + constant, the equivalent is a better operand since
2882 it may let us predict the value of the comparison. */
2883 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2890 /* If we didn't find a useful equivalence for ARG1, we are done.
2891 Otherwise, set up for the next iteration. */
2895 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2896 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2897 code
= GET_CODE (x
);
2900 code
= reverse_condition (code
);
2903 /* Return our results. Return the modes from before fold_rtx
2904 because fold_rtx might produce const_int, and then it's too late. */
2905 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2906 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2911 /* Try to simplify a unary operation CODE whose output mode is to be
2912 MODE with input operand OP whose mode was originally OP_MODE.
2913 Return zero if no simplification can be made. */
2916 simplify_unary_operation (code
, mode
, op
, op_mode
)
2918 enum machine_mode mode
;
2920 enum machine_mode op_mode
;
2922 register int width
= GET_MODE_BITSIZE (mode
);
2924 /* The order of these tests is critical so that, for example, we don't
2925 check the wrong mode (input vs. output) for a conversion operation,
2926 such as FIX. At some point, this should be simplified. */
2928 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2930 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
2931 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2933 HOST_WIDE_INT hv
, lv
;
2936 if (GET_CODE (op
) == CONST_INT
)
2937 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2939 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2941 #ifdef REAL_ARITHMETIC
2942 REAL_VALUE_FROM_INT (d
, lv
, hv
);
2946 d
= (double) (~ hv
);
2947 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2948 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2949 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
2955 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2956 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2957 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
2959 #endif /* REAL_ARITHMETIC */
2961 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2963 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
2964 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2966 HOST_WIDE_INT hv
, lv
;
2969 if (GET_CODE (op
) == CONST_INT
)
2970 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2972 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2974 if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
2977 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
2979 #ifdef REAL_ARITHMETIC
2980 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
);
2983 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
2984 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2985 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2986 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
2987 #endif /* REAL_ARITHMETIC */
2989 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2993 if (GET_CODE (op
) == CONST_INT
2994 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
2996 register HOST_WIDE_INT arg0
= INTVAL (op
);
2997 register HOST_WIDE_INT val
;
3010 val
= (arg0
>= 0 ? arg0
: - arg0
);
3014 /* Don't use ffs here. Instead, get low order bit and then its
3015 number. If arg0 is zero, this will return 0, as desired. */
3016 arg0
&= GET_MODE_MASK (mode
);
3017 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3025 if (op_mode
== VOIDmode
)
3027 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3029 /* If we were really extending the mode,
3030 we would have to distinguish between zero-extension
3031 and sign-extension. */
3032 if (width
!= GET_MODE_BITSIZE (op_mode
))
3036 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3037 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3043 if (op_mode
== VOIDmode
)
3045 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3047 /* If we were really extending the mode,
3048 we would have to distinguish between zero-extension
3049 and sign-extension. */
3050 if (width
!= GET_MODE_BITSIZE (op_mode
))
3054 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3057 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3059 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3060 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3073 /* Clear the bits that don't belong in our mode,
3074 unless they and our sign bit are all one.
3075 So we get either a reasonable negative value or a reasonable
3076 unsigned value for this mode. */
3077 if (width
< HOST_BITS_PER_WIDE_INT
3078 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3079 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3080 val
&= (1 << width
) - 1;
3082 return GEN_INT (val
);
3085 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3086 for a DImode operation on a CONST_INT. */
3087 else if (GET_MODE (op
) == VOIDmode
&& width
== HOST_BITS_PER_INT
* 2
3088 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3090 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3092 if (GET_CODE (op
) == CONST_DOUBLE
)
3093 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3095 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3105 neg_double (l1
, h1
, &lv
, &hv
);
3110 neg_double (l1
, h1
, &lv
, &hv
);
3118 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3120 lv
= exact_log2 (l1
& (-l1
)) + 1;
3124 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3125 return GEN_INT (l1
& GET_MODE_MASK (mode
));
3131 if (op_mode
== VOIDmode
3132 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3136 lv
= l1
& GET_MODE_MASK (op_mode
);
3140 if (op_mode
== VOIDmode
3141 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3145 lv
= l1
& GET_MODE_MASK (op_mode
);
3146 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3147 && (lv
& ((HOST_WIDE_INT
) 1
3148 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3149 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3151 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3162 return immed_double_const (lv
, hv
, mode
);
3165 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3166 else if (GET_CODE (op
) == CONST_DOUBLE
3167 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3173 if (setjmp (handler
))
3174 /* There used to be a warning here, but that is inadvisable.
3175 People may want to cause traps, and the natural way
3176 to do it should not get a warning. */
3179 set_float_handler (handler
);
3181 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3186 d
= REAL_VALUE_NEGATE (d
);
3190 if (REAL_VALUE_NEGATIVE (d
))
3191 d
= REAL_VALUE_NEGATE (d
);
3194 case FLOAT_TRUNCATE
:
3195 d
= real_value_truncate (mode
, d
);
3199 /* All this does is change the mode. */
3203 d
= REAL_VALUE_RNDZINT (d
);
3207 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3217 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3218 set_float_handler (NULL_PTR
);
3221 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3222 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3228 if (setjmp (handler
))
3231 set_float_handler (handler
);
3233 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3238 val
= REAL_VALUE_FIX (d
);
3242 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3249 set_float_handler (NULL_PTR
);
3251 /* Clear the bits that don't belong in our mode,
3252 unless they and our sign bit are all one.
3253 So we get either a reasonable negative value or a reasonable
3254 unsigned value for this mode. */
3255 if (width
< HOST_BITS_PER_WIDE_INT
3256 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3257 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3258 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3260 return GEN_INT (val
);
3263 /* This was formerly used only for non-IEEE float.
3264 eggert@twinsun.com says it is safe for IEEE also. */
3267 /* There are some simplifications we can do even if the operands
3273 /* (not (not X)) == X, similarly for NEG. */
3274 if (GET_CODE (op
) == code
)
3275 return XEXP (op
, 0);
3279 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3280 becomes just the MINUS if its mode is MODE. This allows
3281 folding switch statements on machines using casesi (such as
3283 if (GET_CODE (op
) == TRUNCATE
3284 && GET_MODE (XEXP (op
, 0)) == mode
3285 && GET_CODE (XEXP (op
, 0)) == MINUS
3286 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3287 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3288 return XEXP (op
, 0);
3296 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3297 and OP1. Return 0 if no simplification is possible.
3299 Don't use this for relational operations such as EQ or LT.
3300 Use simplify_relational_operation instead. */
3303 simplify_binary_operation (code
, mode
, op0
, op1
)
3305 enum machine_mode mode
;
3308 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3310 int width
= GET_MODE_BITSIZE (mode
);
3313 /* Relational operations don't work here. We must know the mode
3314 of the operands in order to do the comparison correctly.
3315 Assuming a full word can give incorrect results.
3316 Consider comparing 128 with -128 in QImode. */
3318 if (GET_RTX_CLASS (code
) == '<')
3321 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3322 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3323 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3324 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3326 REAL_VALUE_TYPE f0
, f1
, value
;
3329 if (setjmp (handler
))
3332 set_float_handler (handler
);
3334 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3335 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3336 f0
= real_value_truncate (mode
, f0
);
3337 f1
= real_value_truncate (mode
, f1
);
3339 #ifdef REAL_ARITHMETIC
3340 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3354 #ifndef REAL_INFINITY
3361 value
= MIN (f0
, f1
);
3364 value
= MAX (f0
, f1
);
3371 value
= real_value_truncate (mode
, value
);
3372 set_float_handler (NULL_PTR
);
3373 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3375 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3377 /* We can fold some multi-word operations. */
3378 if (GET_MODE_CLASS (mode
) == MODE_INT
3379 && width
== HOST_BITS_PER_WIDE_INT
* 2
3380 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3381 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3383 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3385 if (GET_CODE (op0
) == CONST_DOUBLE
)
3386 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3388 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3390 if (GET_CODE (op1
) == CONST_DOUBLE
)
3391 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3393 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3398 /* A - B == A + (-B). */
3399 neg_double (l2
, h2
, &lv
, &hv
);
3402 /* .. fall through ... */
3405 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3409 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3412 case DIV
: case MOD
: case UDIV
: case UMOD
:
3413 /* We'd need to include tree.h to do this and it doesn't seem worth
3418 lv
= l1
& l2
, hv
= h1
& h2
;
3422 lv
= l1
| l2
, hv
= h1
| h2
;
3426 lv
= l1
^ l2
, hv
= h1
^ h2
;
3432 && ((unsigned HOST_WIDE_INT
) l1
3433 < (unsigned HOST_WIDE_INT
) l2
)))
3442 && ((unsigned HOST_WIDE_INT
) l1
3443 > (unsigned HOST_WIDE_INT
) l2
)))
3450 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3452 && ((unsigned HOST_WIDE_INT
) l1
3453 < (unsigned HOST_WIDE_INT
) l2
)))
3460 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3462 && ((unsigned HOST_WIDE_INT
) l1
3463 > (unsigned HOST_WIDE_INT
) l2
)))
3469 case LSHIFTRT
: case ASHIFTRT
:
3471 case ROTATE
: case ROTATERT
:
3472 #ifdef SHIFT_COUNT_TRUNCATED
3473 if (SHIFT_COUNT_TRUNCATED
)
3474 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3477 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3480 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3481 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3483 else if (code
== ASHIFT
)
3484 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3485 else if (code
== ROTATE
)
3486 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3487 else /* code == ROTATERT */
3488 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3495 return immed_double_const (lv
, hv
, mode
);
3498 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3499 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3501 /* Even if we can't compute a constant result,
3502 there are some cases worth simplifying. */
3507 /* In IEEE floating point, x+0 is not the same as x. Similarly
3508 for the other optimizations below. */
3509 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3510 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3513 if (op1
== CONST0_RTX (mode
))
3516 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3517 if (GET_CODE (op0
) == NEG
)
3518 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3519 else if (GET_CODE (op1
) == NEG
)
3520 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3522 /* Handle both-operands-constant cases. We can only add
3523 CONST_INTs to constants since the sum of relocatable symbols
3524 can't be handled by most assemblers. Don't add CONST_INT
3525 to CONST_INT since overflow won't be computed properly if wider
3526 than HOST_BITS_PER_WIDE_INT. */
3528 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3529 && GET_CODE (op1
) == CONST_INT
)
3530 return plus_constant (op0
, INTVAL (op1
));
3531 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3532 && GET_CODE (op0
) == CONST_INT
)
3533 return plus_constant (op1
, INTVAL (op0
));
3535 /* See if this is something like X * C - X or vice versa or
3536 if the multiplication is written as a shift. If so, we can
3537 distribute and make a new multiply, shift, or maybe just
3538 have X (if C is 2 in the example above). But don't make
3539 real multiply if we didn't have one before. */
3541 if (! FLOAT_MODE_P (mode
))
3543 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3544 rtx lhs
= op0
, rhs
= op1
;
3547 if (GET_CODE (lhs
) == NEG
)
3548 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3549 else if (GET_CODE (lhs
) == MULT
3550 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3552 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3555 else if (GET_CODE (lhs
) == ASHIFT
3556 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3557 && INTVAL (XEXP (lhs
, 1)) >= 0
3558 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3560 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3561 lhs
= XEXP (lhs
, 0);
3564 if (GET_CODE (rhs
) == NEG
)
3565 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3566 else if (GET_CODE (rhs
) == MULT
3567 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3569 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3572 else if (GET_CODE (rhs
) == ASHIFT
3573 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3574 && INTVAL (XEXP (rhs
, 1)) >= 0
3575 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3577 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3578 rhs
= XEXP (rhs
, 0);
3581 if (rtx_equal_p (lhs
, rhs
))
3583 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3584 GEN_INT (coeff0
+ coeff1
));
3585 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3589 /* If one of the operands is a PLUS or a MINUS, see if we can
3590 simplify this by the associative law.
3591 Don't use the associative law for floating point.
3592 The inaccuracy makes it nonassociative,
3593 and subtle programs can break if operations are associated. */
3595 if (INTEGRAL_MODE_P (mode
)
3596 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3597 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3598 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3604 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3605 using cc0, in which case we want to leave it as a COMPARE
3606 so we can distinguish it from a register-register-copy.
3608 In IEEE floating point, x-0 is not the same as x. */
3610 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3611 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3612 && op1
== CONST0_RTX (mode
))
3615 /* Do nothing here. */
3620 /* None of these optimizations can be done for IEEE
3622 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3623 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3626 /* We can't assume x-x is 0 even with non-IEEE floating point,
3627 but since it is zero except in very strange circumstances, we
3628 will treat it as zero with -ffast-math. */
3629 if (rtx_equal_p (op0
, op1
)
3630 && ! side_effects_p (op0
)
3631 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3632 return CONST0_RTX (mode
);
3634 /* Change subtraction from zero into negation. */
3635 if (op0
== CONST0_RTX (mode
))
3636 return gen_rtx (NEG
, mode
, op1
);
3638 /* (-1 - a) is ~a. */
3639 if (op0
== constm1_rtx
)
3640 return gen_rtx (NOT
, mode
, op1
);
3642 /* Subtracting 0 has no effect. */
3643 if (op1
== CONST0_RTX (mode
))
3646 /* See if this is something like X * C - X or vice versa or
3647 if the multiplication is written as a shift. If so, we can
3648 distribute and make a new multiply, shift, or maybe just
3649 have X (if C is 2 in the example above). But don't make
3650 real multiply if we didn't have one before. */
3652 if (! FLOAT_MODE_P (mode
))
3654 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3655 rtx lhs
= op0
, rhs
= op1
;
3658 if (GET_CODE (lhs
) == NEG
)
3659 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3660 else if (GET_CODE (lhs
) == MULT
3661 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3663 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3666 else if (GET_CODE (lhs
) == ASHIFT
3667 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3668 && INTVAL (XEXP (lhs
, 1)) >= 0
3669 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3671 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3672 lhs
= XEXP (lhs
, 0);
3675 if (GET_CODE (rhs
) == NEG
)
3676 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3677 else if (GET_CODE (rhs
) == MULT
3678 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3680 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3683 else if (GET_CODE (rhs
) == ASHIFT
3684 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3685 && INTVAL (XEXP (rhs
, 1)) >= 0
3686 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3688 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3689 rhs
= XEXP (rhs
, 0);
3692 if (rtx_equal_p (lhs
, rhs
))
3694 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3695 GEN_INT (coeff0
- coeff1
));
3696 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3700 /* (a - (-b)) -> (a + b). */
3701 if (GET_CODE (op1
) == NEG
)
3702 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3704 /* If one of the operands is a PLUS or a MINUS, see if we can
3705 simplify this by the associative law.
3706 Don't use the associative law for floating point.
3707 The inaccuracy makes it nonassociative,
3708 and subtle programs can break if operations are associated. */
3710 if (INTEGRAL_MODE_P (mode
)
3711 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3712 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3713 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3716 /* Don't let a relocatable value get a negative coeff. */
3717 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3718 return plus_constant (op0
, - INTVAL (op1
));
3722 if (op1
== constm1_rtx
)
3724 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3726 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3729 /* In IEEE floating point, x*0 is not always 0. */
3730 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3731 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3732 && op1
== CONST0_RTX (mode
)
3733 && ! side_effects_p (op0
))
3736 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3737 However, ANSI says we can drop signals,
3738 so we can do this anyway. */
3739 if (op1
== CONST1_RTX (mode
))
3742 /* Convert multiply by constant power of two into shift unless
3743 we are still generating RTL. This test is a kludge. */
3744 if (GET_CODE (op1
) == CONST_INT
3745 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3746 && ! rtx_equal_function_value_matters
)
3747 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3749 if (GET_CODE (op1
) == CONST_DOUBLE
3750 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3754 int op1is2
, op1ism1
;
3756 if (setjmp (handler
))
3759 set_float_handler (handler
);
3760 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3761 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3762 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3763 set_float_handler (NULL_PTR
);
3765 /* x*2 is x+x and x*(-1) is -x */
3766 if (op1is2
&& GET_MODE (op0
) == mode
)
3767 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3769 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3770 return gen_rtx (NEG
, mode
, op0
);
3775 if (op1
== const0_rtx
)
3777 if (GET_CODE (op1
) == CONST_INT
3778 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3780 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3782 /* A | (~A) -> -1 */
3783 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3784 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3785 && ! side_effects_p (op0
)
3786 && GET_MODE_CLASS (mode
) != MODE_CC
)
3791 if (op1
== const0_rtx
)
3793 if (GET_CODE (op1
) == CONST_INT
3794 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3795 return gen_rtx (NOT
, mode
, op0
);
3796 if (op0
== op1
&& ! side_effects_p (op0
)
3797 && GET_MODE_CLASS (mode
) != MODE_CC
)
3802 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3804 if (GET_CODE (op1
) == CONST_INT
3805 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3807 if (op0
== op1
&& ! side_effects_p (op0
)
3808 && GET_MODE_CLASS (mode
) != MODE_CC
)
3811 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3812 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3813 && ! side_effects_p (op0
)
3814 && GET_MODE_CLASS (mode
) != MODE_CC
)
3819 /* Convert divide by power of two into shift (divide by 1 handled
3821 if (GET_CODE (op1
) == CONST_INT
3822 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3823 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3825 /* ... fall through ... */
3828 if (op1
== CONST1_RTX (mode
))
3831 /* In IEEE floating point, 0/x is not always 0. */
3832 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3833 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3834 && op0
== CONST0_RTX (mode
)
3835 && ! side_effects_p (op1
))
3838 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3839 /* Change division by a constant into multiplication. Only do
3840 this with -ffast-math until an expert says it is safe in
3842 else if (GET_CODE (op1
) == CONST_DOUBLE
3843 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3844 && op1
!= CONST0_RTX (mode
)
3848 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3850 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3852 #if defined (REAL_ARITHMETIC)
3853 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3854 return gen_rtx (MULT
, mode
, op0
,
3855 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3857 return gen_rtx (MULT
, mode
, op0
,
3858 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3866 /* Handle modulus by power of two (mod with 1 handled below). */
3867 if (GET_CODE (op1
) == CONST_INT
3868 && exact_log2 (INTVAL (op1
)) > 0)
3869 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3871 /* ... fall through ... */
3874 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3875 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3881 /* Rotating ~0 always results in ~0. */
3882 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3883 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3884 && ! side_effects_p (op1
))
3887 /* ... fall through ... */
3892 if (op1
== const0_rtx
)
3894 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3899 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3900 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3901 && ! side_effects_p (op0
))
3903 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3908 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3910 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
3911 && ! side_effects_p (op0
))
3913 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3918 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3920 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3925 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3927 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3938 /* Get the integer argument values in two forms:
3939 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3941 arg0
= INTVAL (op0
);
3942 arg1
= INTVAL (op1
);
3944 if (width
< HOST_BITS_PER_WIDE_INT
)
3946 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3947 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3950 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3951 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
3954 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3955 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
3963 /* Compute the value of the arithmetic. */
3968 val
= arg0s
+ arg1s
;
3972 val
= arg0s
- arg1s
;
3976 val
= arg0s
* arg1s
;
3982 val
= arg0s
/ arg1s
;
3988 val
= arg0s
% arg1s
;
3994 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4000 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4016 /* If shift count is undefined, don't fold it; let the machine do
4017 what it wants. But truncate it if the machine will do that. */
4021 #ifdef SHIFT_COUNT_TRUNCATED
4022 if (SHIFT_COUNT_TRUNCATED
)
4026 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4033 #ifdef SHIFT_COUNT_TRUNCATED
4034 if (SHIFT_COUNT_TRUNCATED
)
4038 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4045 #ifdef SHIFT_COUNT_TRUNCATED
4046 if (SHIFT_COUNT_TRUNCATED
)
4050 val
= arg0s
>> arg1
;
4052 /* Bootstrap compiler may not have sign extended the right shift.
4053 Manually extend the sign to insure bootstrap cc matches gcc. */
4054 if (arg0s
< 0 && arg1
> 0)
4055 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4064 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4065 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4073 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4074 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4078 /* Do nothing here. */
4082 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4086 val
= ((unsigned HOST_WIDE_INT
) arg0
4087 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4091 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4095 val
= ((unsigned HOST_WIDE_INT
) arg0
4096 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4103 /* Clear the bits that don't belong in our mode, unless they and our sign
4104 bit are all one. So we get either a reasonable negative value or a
4105 reasonable unsigned value for this mode. */
4106 if (width
< HOST_BITS_PER_WIDE_INT
4107 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4108 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4109 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4111 return GEN_INT (val
);
4114 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4117 Rather than test for specific case, we do this by a brute-force method
4118 and do all possible simplifications until no more changes occur. Then
4119 we rebuild the operation. */
4122 simplify_plus_minus (code
, mode
, op0
, op1
)
4124 enum machine_mode mode
;
4130 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4131 int first
= 1, negate
= 0, changed
;
4134 bzero ((char *) ops
, sizeof ops
);
4136 /* Set up the two operands and then expand them until nothing has been
4137 changed. If we run out of room in our array, give up; this should
4138 almost never happen. */
4140 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4147 for (i
= 0; i
< n_ops
; i
++)
4148 switch (GET_CODE (ops
[i
]))
4155 ops
[n_ops
] = XEXP (ops
[i
], 1);
4156 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4157 ops
[i
] = XEXP (ops
[i
], 0);
4163 ops
[i
] = XEXP (ops
[i
], 0);
4164 negs
[i
] = ! negs
[i
];
4169 ops
[i
] = XEXP (ops
[i
], 0);
4175 /* ~a -> (-a - 1) */
4178 ops
[n_ops
] = constm1_rtx
;
4179 negs
[n_ops
++] = negs
[i
];
4180 ops
[i
] = XEXP (ops
[i
], 0);
4181 negs
[i
] = ! negs
[i
];
4188 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4193 /* If we only have two operands, we can't do anything. */
4197 /* Now simplify each pair of operands until nothing changes. The first
4198 time through just simplify constants against each other. */
4205 for (i
= 0; i
< n_ops
- 1; i
++)
4206 for (j
= i
+ 1; j
< n_ops
; j
++)
4207 if (ops
[i
] != 0 && ops
[j
] != 0
4208 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4210 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4211 enum rtx_code ncode
= PLUS
;
4213 if (negs
[i
] && ! negs
[j
])
4214 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4215 else if (! negs
[i
] && negs
[j
])
4218 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4221 ops
[i
] = tem
, ops
[j
] = 0;
4222 negs
[i
] = negs
[i
] && negs
[j
];
4223 if (GET_CODE (tem
) == NEG
)
4224 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4226 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4227 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4235 /* Pack all the operands to the lower-numbered entries and give up if
4236 we didn't reduce the number of operands we had. Make sure we
4237 count a CONST as two operands. If we have the same number of
4238 operands, but have made more CONSTs than we had, this is also
4239 an improvement, so accept it. */
4241 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4244 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4245 if (GET_CODE (ops
[j
]) == CONST
)
4249 if (i
+ n_consts
> input_ops
4250 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4255 /* If we have a CONST_INT, put it last. */
4256 for (i
= 0; i
< n_ops
- 1; i
++)
4257 if (GET_CODE (ops
[i
]) == CONST_INT
)
4259 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4260 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4263 /* Put a non-negated operand first. If there aren't any, make all
4264 operands positive and negate the whole thing later. */
4265 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4270 for (i
= 0; i
< n_ops
; i
++)
4276 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4277 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4280 /* Now make the result by performing the requested operations. */
4282 for (i
= 1; i
< n_ops
; i
++)
4283 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4285 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4288 /* Make a binary operation by properly ordering the operands and
4289 seeing if the expression folds. */
4292 cse_gen_binary (code
, mode
, op0
, op1
)
4294 enum machine_mode mode
;
4299 /* Put complex operands first and constants second if commutative. */
4300 if (GET_RTX_CLASS (code
) == 'c'
4301 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4302 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4303 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4304 || (GET_CODE (op0
) == SUBREG
4305 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4306 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4307 tem
= op0
, op0
= op1
, op1
= tem
;
4309 /* If this simplifies, do it. */
4310 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4315 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4316 just form the operation. */
4318 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4319 && GET_MODE (op0
) != VOIDmode
)
4320 return plus_constant (op0
, INTVAL (op1
));
4321 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4322 && GET_MODE (op0
) != VOIDmode
)
4323 return plus_constant (op0
, - INTVAL (op1
));
4325 return gen_rtx (code
, mode
, op0
, op1
);
4328 /* Like simplify_binary_operation except used for relational operators.
4329 MODE is the mode of the operands, not that of the result. If MODE
4330 is VOIDmode, both operands must also be VOIDmode and we compare the
4331 operands in "infinite precision".
4333 If no simplification is possible, this function returns zero. Otherwise,
4334 it returns either const_true_rtx or const0_rtx. */
4337 simplify_relational_operation (code
, mode
, op0
, op1
)
4339 enum machine_mode mode
;
4342 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4345 /* If op0 is a compare, extract the comparison arguments from it. */
4346 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4347 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4349 /* We can't simplify MODE_CC values since we don't know what the
4350 actual comparison is. */
4351 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4358 /* For integer comparisons of A and B maybe we can simplify A - B and can
4359 then simplify a comparison of that with zero. If A and B are both either
4360 a register or a CONST_INT, this can't help; testing for these cases will
4361 prevent infinite recursion here and speed things up.
4363 If CODE is an unsigned comparison, we can only do this if A - B is a
4364 constant integer, and then we have to compare that integer with zero as a
4365 signed comparison. Note that this will give the incorrect result from
4366 comparisons that overflow. Since these are undefined, this is probably
4367 OK. If it causes a problem, we can check for A or B being an address
4368 (fp + const or SYMBOL_REF) and only do it in that case. */
4370 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4371 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4372 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4373 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4374 && (GET_CODE (tem
) == CONST_INT
4375 || (code
!= GTU
&& code
!= GEU
&&
4376 code
!= LTU
&& code
!= LEU
)))
4377 return simplify_relational_operation (signed_condition (code
),
4378 mode
, tem
, const0_rtx
);
4380 /* For non-IEEE floating-point, if the two operands are equal, we know the
4382 if (rtx_equal_p (op0
, op1
)
4383 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4384 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4385 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4387 /* If the operands are floating-point constants, see if we can fold
4389 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4390 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4391 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4393 REAL_VALUE_TYPE d0
, d1
;
4396 if (setjmp (handler
))
4399 set_float_handler (handler
);
4400 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4401 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4402 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4403 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4404 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4405 set_float_handler (NULL_PTR
);
4407 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4409 /* Otherwise, see if the operands are both integers. */
4410 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4411 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4412 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4414 int width
= GET_MODE_BITSIZE (mode
);
4415 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4416 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4418 /* Get the two words comprising each integer constant. */
4419 if (GET_CODE (op0
) == CONST_DOUBLE
)
4421 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4422 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4426 l0u
= l0s
= INTVAL (op0
);
4427 h0u
= 0, h0s
= l0s
< 0 ? -1 : 0;
4430 if (GET_CODE (op1
) == CONST_DOUBLE
)
4432 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4433 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4437 l1u
= l1s
= INTVAL (op1
);
4438 h1u
= 0, h1s
= l1s
< 0 ? -1 : 0;
4441 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4442 we have to sign or zero-extend the values. */
4443 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4444 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4446 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4448 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4449 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4451 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4452 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4454 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4455 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4458 equal
= (h0u
== h1u
&& l0u
== l1u
);
4459 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4460 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4461 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4462 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4465 /* Otherwise, there are some code-specific tests we can make. */
4471 /* References to the frame plus a constant or labels cannot
4472 be zero, but a SYMBOL_REF can due to #pragma weak. */
4473 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4474 || GET_CODE (op0
) == LABEL_REF
)
4475 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4476 /* On some machines, the ap reg can be 0 sometimes. */
4477 && op0
!= arg_pointer_rtx
4484 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4485 || GET_CODE (op0
) == LABEL_REF
)
4486 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4487 && op0
!= arg_pointer_rtx
4490 return const_true_rtx
;
4494 /* Unsigned values are never negative. */
4495 if (op1
== const0_rtx
)
4496 return const_true_rtx
;
4500 if (op1
== const0_rtx
)
4505 /* Unsigned values are never greater than the largest
4507 if (GET_CODE (op1
) == CONST_INT
4508 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4509 && INTEGRAL_MODE_P (mode
))
4510 return const_true_rtx
;
4514 if (GET_CODE (op1
) == CONST_INT
4515 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4516 && INTEGRAL_MODE_P (mode
))
4524 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4529 return equal
? const_true_rtx
: const0_rtx
;
4531 return ! equal
? const_true_rtx
: const0_rtx
;
4533 return op0lt
? const_true_rtx
: const0_rtx
;
4535 return op1lt
? const_true_rtx
: const0_rtx
;
4537 return op0ltu
? const_true_rtx
: const0_rtx
;
4539 return op1ltu
? const_true_rtx
: const0_rtx
;
4541 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4543 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4545 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4547 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4553 /* Simplify CODE, an operation with result mode MODE and three operands,
4554 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4555 a constant. Return 0 if no simplifications is possible. */
4558 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4560 enum machine_mode mode
, op0_mode
;
4563 int width
= GET_MODE_BITSIZE (mode
);
4565 /* VOIDmode means "infinite" precision. */
4567 width
= HOST_BITS_PER_WIDE_INT
;
4573 if (GET_CODE (op0
) == CONST_INT
4574 && GET_CODE (op1
) == CONST_INT
4575 && GET_CODE (op2
) == CONST_INT
4576 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4577 && width
<= HOST_BITS_PER_WIDE_INT
)
4579 /* Extracting a bit-field from a constant */
4580 HOST_WIDE_INT val
= INTVAL (op0
);
4583 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4585 val
>>= INTVAL (op2
);
4587 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4589 /* First zero-extend. */
4590 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4591 /* If desired, propagate sign bit. */
4592 if (code
== SIGN_EXTRACT
4593 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4594 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4597 /* Clear the bits that don't belong in our mode,
4598 unless they and our sign bit are all one.
4599 So we get either a reasonable negative value or a reasonable
4600 unsigned value for this mode. */
4601 if (width
< HOST_BITS_PER_WIDE_INT
4602 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4603 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4604 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4606 return GEN_INT (val
);
4611 if (GET_CODE (op0
) == CONST_INT
)
4612 return op0
!= const0_rtx
? op1
: op2
;
4622 /* If X is a nontrivial arithmetic operation on an argument
4623 for which a constant value can be determined, return
4624 the result of operating on that value, as a constant.
4625 Otherwise, return X, possibly with one or more operands
4626 modified by recursive calls to this function.
4628 If X is a register whose contents are known, we do NOT
4629 return those contents here. equiv_constant is called to
4632 INSN is the insn that we may be modifying. If it is 0, make a copy
4633 of X before modifying it. */
4640 register enum rtx_code code
;
4641 register enum machine_mode mode
;
4648 /* Folded equivalents of first two operands of X. */
4652 /* Constant equivalents of first three operands of X;
4653 0 when no such equivalent is known. */
4658 /* The mode of the first operand of X. We need this for sign and zero
4660 enum machine_mode mode_arg0
;
4665 mode
= GET_MODE (x
);
4666 code
= GET_CODE (x
);
4675 /* No use simplifying an EXPR_LIST
4676 since they are used only for lists of args
4677 in a function call's REG_EQUAL note. */
4683 return prev_insn_cc0
;
4687 /* If the next insn is a CODE_LABEL followed by a jump table,
4688 PC's value is a LABEL_REF pointing to that label. That
4689 lets us fold switch statements on the Vax. */
4690 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4692 rtx next
= next_nonnote_insn (insn
);
4694 if (next
&& GET_CODE (next
) == CODE_LABEL
4695 && NEXT_INSN (next
) != 0
4696 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4697 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4698 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4699 return gen_rtx (LABEL_REF
, Pmode
, next
);
4704 /* See if we previously assigned a constant value to this SUBREG. */
4705 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4706 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4709 /* If this is a paradoxical SUBREG, we have no idea what value the
4710 extra bits would have. However, if the operand is equivalent
4711 to a SUBREG whose operand is the same as our mode, and all the
4712 modes are within a word, we can just use the inner operand
4713 because these SUBREGs just say how to treat the register.
4715 Similarly if we find an integer constant. */
4717 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4719 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4720 struct table_elt
*elt
;
4722 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4723 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4724 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4726 for (elt
= elt
->first_same_value
;
4727 elt
; elt
= elt
->next_same_value
)
4729 if (CONSTANT_P (elt
->exp
)
4730 && GET_MODE (elt
->exp
) == VOIDmode
)
4733 if (GET_CODE (elt
->exp
) == SUBREG
4734 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4735 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4736 return copy_rtx (SUBREG_REG (elt
->exp
));
4742 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4743 We might be able to if the SUBREG is extracting a single word in an
4744 integral mode or extracting the low part. */
4746 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4747 const_arg0
= equiv_constant (folded_arg0
);
4749 folded_arg0
= const_arg0
;
4751 if (folded_arg0
!= SUBREG_REG (x
))
4755 if (GET_MODE_CLASS (mode
) == MODE_INT
4756 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4757 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4758 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4759 GET_MODE (SUBREG_REG (x
)));
4760 if (new == 0 && subreg_lowpart_p (x
))
4761 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4766 /* If this is a narrowing SUBREG and our operand is a REG, see if
4767 we can find an equivalence for REG that is an arithmetic operation
4768 in a wider mode where both operands are paradoxical SUBREGs
4769 from objects of our result mode. In that case, we couldn't report
4770 an equivalent value for that operation, since we don't know what the
4771 extra bits will be. But we can find an equivalence for this SUBREG
4772 by folding that operation is the narrow mode. This allows us to
4773 fold arithmetic in narrow modes when the machine only supports
4774 word-sized arithmetic.
4776 Also look for a case where we have a SUBREG whose operand is the
4777 same as our result. If both modes are smaller than a word, we
4778 are simply interpreting a register in different modes and we
4779 can use the inner value. */
4781 if (GET_CODE (folded_arg0
) == REG
4782 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4783 && subreg_lowpart_p (x
))
4785 struct table_elt
*elt
;
4787 /* We can use HASH here since we know that canon_hash won't be
4789 elt
= lookup (folded_arg0
,
4790 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4791 GET_MODE (folded_arg0
));
4794 elt
= elt
->first_same_value
;
4796 for (; elt
; elt
= elt
->next_same_value
)
4798 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4800 /* Just check for unary and binary operations. */
4801 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4802 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4803 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4804 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4805 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4807 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4809 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4810 op0
= fold_rtx (op0
, NULL_RTX
);
4812 op0
= equiv_constant (op0
);
4814 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4817 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4818 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4819 && eltcode
!= DIV
&& eltcode
!= MOD
4820 && eltcode
!= UDIV
&& eltcode
!= UMOD
4821 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4822 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4823 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4824 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4826 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4827 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4828 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4830 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4832 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4833 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4835 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4836 op0
= fold_rtx (op0
, NULL_RTX
);
4839 op0
= equiv_constant (op0
);
4841 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4842 op1
= fold_rtx (op1
, NULL_RTX
);
4845 op1
= equiv_constant (op1
);
4847 /* If we are looking for the low SImode part of
4848 (ashift:DI c (const_int 32)), it doesn't work
4849 to compute that in SImode, because a 32-bit shift
4850 in SImode is unpredictable. We know the value is 0. */
4852 && GET_CODE (elt
->exp
) == ASHIFT
4853 && GET_CODE (op1
) == CONST_INT
4854 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4856 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4858 /* If the count fits in the inner mode's width,
4859 but exceeds the outer mode's width,
4860 the value will get truncated to 0
4864 /* If the count exceeds even the inner mode's width,
4865 don't fold this expression. */
4868 else if (op0
&& op1
)
4869 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4873 else if (GET_CODE (elt
->exp
) == SUBREG
4874 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4875 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4877 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4878 new = copy_rtx (SUBREG_REG (elt
->exp
));
4889 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4890 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4891 new = lookup_as_function (XEXP (x
, 0), code
);
4893 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4897 /* If we are not actually processing an insn, don't try to find the
4898 best address. Not only don't we care, but we could modify the
4899 MEM in an invalid way since we have no insn to validate against. */
4901 find_best_addr (insn
, &XEXP (x
, 0));
4904 /* Even if we don't fold in the insn itself,
4905 we can safely do so here, in hopes of getting a constant. */
4906 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
4908 HOST_WIDE_INT offset
= 0;
4910 if (GET_CODE (addr
) == REG
4911 && REGNO_QTY_VALID_P (REGNO (addr
))
4912 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4913 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4914 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4916 /* If address is constant, split it into a base and integer offset. */
4917 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4919 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4920 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4922 base
= XEXP (XEXP (addr
, 0), 0);
4923 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4925 else if (GET_CODE (addr
) == LO_SUM
4926 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4927 base
= XEXP (addr
, 1);
4929 /* If this is a constant pool reference, we can fold it into its
4930 constant to allow better value tracking. */
4931 if (base
&& GET_CODE (base
) == SYMBOL_REF
4932 && CONSTANT_POOL_ADDRESS_P (base
))
4934 rtx constant
= get_pool_constant (base
);
4935 enum machine_mode const_mode
= get_pool_mode (base
);
4938 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4939 constant_pool_entries_cost
= COST (constant
);
4941 /* If we are loading the full constant, we have an equivalence. */
4942 if (offset
== 0 && mode
== const_mode
)
4945 /* If this actually isn't a constant (wierd!), we can't do
4946 anything. Otherwise, handle the two most common cases:
4947 extracting a word from a multi-word constant, and extracting
4948 the low-order bits. Other cases don't seem common enough to
4950 if (! CONSTANT_P (constant
))
4953 if (GET_MODE_CLASS (mode
) == MODE_INT
4954 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4955 && offset
% UNITS_PER_WORD
== 0
4956 && (new = operand_subword (constant
,
4957 offset
/ UNITS_PER_WORD
,
4958 0, const_mode
)) != 0)
4961 if (((BYTES_BIG_ENDIAN
4962 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4963 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4964 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4968 /* If this is a reference to a label at a known position in a jump
4969 table, we also know its value. */
4970 if (base
&& GET_CODE (base
) == LABEL_REF
)
4972 rtx label
= XEXP (base
, 0);
4973 rtx table_insn
= NEXT_INSN (label
);
4975 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4976 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4978 rtx table
= PATTERN (table_insn
);
4981 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4982 < XVECLEN (table
, 0)))
4983 return XVECEXP (table
, 0,
4984 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4986 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4987 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4989 rtx table
= PATTERN (table_insn
);
4992 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4993 < XVECLEN (table
, 1)))
4995 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4996 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4999 if (GET_MODE (table
) != Pmode
)
5000 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
5014 mode_arg0
= VOIDmode
;
5016 /* Try folding our operands.
5017 Then see which ones have constant values known. */
5019 fmt
= GET_RTX_FORMAT (code
);
5020 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5023 rtx arg
= XEXP (x
, i
);
5024 rtx folded_arg
= arg
, const_arg
= 0;
5025 enum machine_mode mode_arg
= GET_MODE (arg
);
5026 rtx cheap_arg
, expensive_arg
;
5027 rtx replacements
[2];
5030 /* Most arguments are cheap, so handle them specially. */
5031 switch (GET_CODE (arg
))
5034 /* This is the same as calling equiv_constant; it is duplicated
5036 if (REGNO_QTY_VALID_P (REGNO (arg
))
5037 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5038 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5039 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5041 = gen_lowpart_if_possible (GET_MODE (arg
),
5042 qty_const
[reg_qty
[REGNO (arg
)]]);
5055 folded_arg
= prev_insn_cc0
;
5056 mode_arg
= prev_insn_cc0_mode
;
5057 const_arg
= equiv_constant (folded_arg
);
5062 folded_arg
= fold_rtx (arg
, insn
);
5063 const_arg
= equiv_constant (folded_arg
);
5066 /* For the first three operands, see if the operand
5067 is constant or equivalent to a constant. */
5071 folded_arg0
= folded_arg
;
5072 const_arg0
= const_arg
;
5073 mode_arg0
= mode_arg
;
5076 folded_arg1
= folded_arg
;
5077 const_arg1
= const_arg
;
5080 const_arg2
= const_arg
;
5084 /* Pick the least expensive of the folded argument and an
5085 equivalent constant argument. */
5086 if (const_arg
== 0 || const_arg
== folded_arg
5087 || COST (const_arg
) > COST (folded_arg
))
5088 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5090 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5092 /* Try to replace the operand with the cheapest of the two
5093 possibilities. If it doesn't work and this is either of the first
5094 two operands of a commutative operation, try swapping them.
5095 If THAT fails, try the more expensive, provided it is cheaper
5096 than what is already there. */
5098 if (cheap_arg
== XEXP (x
, i
))
5101 if (insn
== 0 && ! copied
)
5107 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5109 j
< 2 && replacements
[j
]
5110 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5113 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5116 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5118 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5119 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5121 if (apply_change_group ())
5123 /* Swap them back to be invalid so that this loop can
5124 continue and flag them to be swapped back later. */
5127 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5136 else if (fmt
[i
] == 'E')
5137 /* Don't try to fold inside of a vector of expressions.
5138 Doing nothing is harmless. */
5141 /* If a commutative operation, place a constant integer as the second
5142 operand unless the first operand is also a constant integer. Otherwise,
5143 place any constant second unless the first operand is also a constant. */
5145 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5147 if (must_swap
|| (const_arg0
5149 || (GET_CODE (const_arg0
) == CONST_INT
5150 && GET_CODE (const_arg1
) != CONST_INT
))))
5152 register rtx tem
= XEXP (x
, 0);
5154 if (insn
== 0 && ! copied
)
5160 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5161 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5162 if (apply_change_group ())
5164 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5165 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5170 /* If X is an arithmetic operation, see if we can simplify it. */
5172 switch (GET_RTX_CLASS (code
))
5175 /* We can't simplify extension ops unless we know the original mode. */
5176 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5177 && mode_arg0
== VOIDmode
)
5179 new = simplify_unary_operation (code
, mode
,
5180 const_arg0
? const_arg0
: folded_arg0
,
5185 /* See what items are actually being compared and set FOLDED_ARG[01]
5186 to those values and CODE to the actual comparison code. If any are
5187 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5188 do anything if both operands are already known to be constant. */
5190 if (const_arg0
== 0 || const_arg1
== 0)
5192 struct table_elt
*p0
, *p1
;
5193 rtx
true = const_true_rtx
, false = const0_rtx
;
5194 enum machine_mode mode_arg1
;
5196 #ifdef FLOAT_STORE_FLAG_VALUE
5197 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5199 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5201 false = CONST0_RTX (mode
);
5205 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5206 &mode_arg0
, &mode_arg1
);
5207 const_arg0
= equiv_constant (folded_arg0
);
5208 const_arg1
= equiv_constant (folded_arg1
);
5210 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5211 what kinds of things are being compared, so we can't do
5212 anything with this comparison. */
5214 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5217 /* If we do not now have two constants being compared, see if we
5218 can nevertheless deduce some things about the comparison. */
5219 if (const_arg0
== 0 || const_arg1
== 0)
5221 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5222 constant? These aren't zero, but we don't know their sign. */
5223 if (const_arg1
== const0_rtx
5224 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5225 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5227 || GET_CODE (folded_arg0
) == SYMBOL_REF
5229 || GET_CODE (folded_arg0
) == LABEL_REF
5230 || GET_CODE (folded_arg0
) == CONST
))
5234 else if (code
== NE
)
5238 /* See if the two operands are the same. We don't do this
5239 for IEEE floating-point since we can't assume x == x
5240 since x might be a NaN. */
5242 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5243 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5244 && (folded_arg0
== folded_arg1
5245 || (GET_CODE (folded_arg0
) == REG
5246 && GET_CODE (folded_arg1
) == REG
5247 && (reg_qty
[REGNO (folded_arg0
)]
5248 == reg_qty
[REGNO (folded_arg1
)]))
5249 || ((p0
= lookup (folded_arg0
,
5250 (safe_hash (folded_arg0
, mode_arg0
)
5251 % NBUCKETS
), mode_arg0
))
5252 && (p1
= lookup (folded_arg1
,
5253 (safe_hash (folded_arg1
, mode_arg0
)
5254 % NBUCKETS
), mode_arg0
))
5255 && p0
->first_same_value
== p1
->first_same_value
)))
5256 return ((code
== EQ
|| code
== LE
|| code
== GE
5257 || code
== LEU
|| code
== GEU
)
5260 /* If FOLDED_ARG0 is a register, see if the comparison we are
5261 doing now is either the same as we did before or the reverse
5262 (we only check the reverse if not floating-point). */
5263 else if (GET_CODE (folded_arg0
) == REG
)
5265 int qty
= reg_qty
[REGNO (folded_arg0
)];
5267 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5268 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5269 || (comparison_dominates_p (qty_comparison_code
[qty
],
5270 reverse_condition (code
))
5271 && ! FLOAT_MODE_P (mode_arg0
)))
5272 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5274 && rtx_equal_p (qty_comparison_const
[qty
],
5276 || (GET_CODE (folded_arg1
) == REG
5277 && (reg_qty
[REGNO (folded_arg1
)]
5278 == qty_comparison_qty
[qty
]))))
5279 return (comparison_dominates_p (qty_comparison_code
[qty
],
5286 /* If we are comparing against zero, see if the first operand is
5287 equivalent to an IOR with a constant. If so, we may be able to
5288 determine the result of this comparison. */
5290 if (const_arg1
== const0_rtx
)
5292 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5296 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5297 && GET_CODE (inner_const
) == CONST_INT
5298 && INTVAL (inner_const
) != 0)
5300 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5301 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5302 && (INTVAL (inner_const
)
5303 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5304 rtx
true = const_true_rtx
, false = const0_rtx
;
5306 #ifdef FLOAT_STORE_FLAG_VALUE
5307 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5309 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5311 false = CONST0_RTX (mode
);
5333 new = simplify_relational_operation (code
, mode_arg0
,
5334 const_arg0
? const_arg0
: folded_arg0
,
5335 const_arg1
? const_arg1
: folded_arg1
);
5336 #ifdef FLOAT_STORE_FLAG_VALUE
5337 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5338 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5339 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5348 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5349 with that LABEL_REF as its second operand. If so, the result is
5350 the first operand of that MINUS. This handles switches with an
5351 ADDR_DIFF_VEC table. */
5352 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5354 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
5356 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5357 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5361 /* If second operand is a register equivalent to a negative
5362 CONST_INT, see if we can find a register equivalent to the
5363 positive constant. Make a MINUS if so. Don't do this for
5364 a negative constant since we might then alternate between
5365 chosing positive and negative constants. Having the positive
5366 constant previously-used is the more common case. */
5367 if (const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
5368 && INTVAL (const_arg1
) < 0 && GET_CODE (folded_arg1
) == REG
)
5370 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5372 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5376 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5377 if (GET_CODE (p
->exp
) == REG
)
5378 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5379 canon_reg (p
->exp
, NULL_RTX
));
5384 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5385 If so, produce (PLUS Z C2-C). */
5386 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5388 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5389 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5390 return fold_rtx (plus_constant (copy_rtx (y
),
5391 -INTVAL (const_arg1
)),
5395 /* ... fall through ... */
5398 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5399 case IOR
: case AND
: case XOR
:
5400 case MULT
: case DIV
: case UDIV
:
5401 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5402 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5403 is known to be of similar form, we may be able to replace the
5404 operation with a combined operation. This may eliminate the
5405 intermediate operation if every use is simplified in this way.
5406 Note that the similar optimization done by combine.c only works
5407 if the intermediate operation's result has only one reference. */
5409 if (GET_CODE (folded_arg0
) == REG
5410 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5413 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5414 rtx y
= lookup_as_function (folded_arg0
, code
);
5416 enum rtx_code associate_code
;
5420 || 0 == (inner_const
5421 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5422 || GET_CODE (inner_const
) != CONST_INT
5423 /* If we have compiled a statement like
5424 "if (x == (x & mask1))", and now are looking at
5425 "x & mask2", we will have a case where the first operand
5426 of Y is the same as our first operand. Unless we detect
5427 this case, an infinite loop will result. */
5428 || XEXP (y
, 0) == folded_arg0
)
5431 /* Don't associate these operations if they are a PLUS with the
5432 same constant and it is a power of two. These might be doable
5433 with a pre- or post-increment. Similarly for two subtracts of
5434 identical powers of two with post decrement. */
5436 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5438 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5439 || exact_log2 (INTVAL (const_arg1
)) >= 0
5441 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5442 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5447 /* Compute the code used to compose the constants. For example,
5448 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5451 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5452 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5454 new_const
= simplify_binary_operation (associate_code
, mode
,
5455 const_arg1
, inner_const
);
5460 /* If we are associating shift operations, don't let this
5461 produce a shift of the size of the object or larger.
5462 This could occur when we follow a sign-extend by a right
5463 shift on a machine that does a sign-extend as a pair
5466 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5467 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5469 /* As an exception, we can turn an ASHIFTRT of this
5470 form into a shift of the number of bits - 1. */
5471 if (code
== ASHIFTRT
)
5472 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5477 y
= copy_rtx (XEXP (y
, 0));
5479 /* If Y contains our first operand (the most common way this
5480 can happen is if Y is a MEM), we would do into an infinite
5481 loop if we tried to fold it. So don't in that case. */
5483 if (! reg_mentioned_p (folded_arg0
, y
))
5484 y
= fold_rtx (y
, insn
);
5486 return cse_gen_binary (code
, mode
, y
, new_const
);
5490 new = simplify_binary_operation (code
, mode
,
5491 const_arg0
? const_arg0
: folded_arg0
,
5492 const_arg1
? const_arg1
: folded_arg1
);
5496 /* (lo_sum (high X) X) is simply X. */
5497 if (code
== LO_SUM
&& const_arg0
!= 0
5498 && GET_CODE (const_arg0
) == HIGH
5499 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5505 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5506 const_arg0
? const_arg0
: folded_arg0
,
5507 const_arg1
? const_arg1
: folded_arg1
,
5508 const_arg2
? const_arg2
: XEXP (x
, 2));
5512 return new ? new : x
;
5515 /* Return a constant value currently equivalent to X.
5516 Return 0 if we don't know one. */
5522 if (GET_CODE (x
) == REG
5523 && REGNO_QTY_VALID_P (REGNO (x
))
5524 && qty_const
[reg_qty
[REGNO (x
)]])
5525 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5527 if (x
!= 0 && CONSTANT_P (x
))
5530 /* If X is a MEM, try to fold it outside the context of any insn to see if
5531 it might be equivalent to a constant. That handles the case where it
5532 is a constant-pool reference. Then try to look it up in the hash table
5533 in case it is something whose value we have seen before. */
5535 if (GET_CODE (x
) == MEM
)
5537 struct table_elt
*elt
;
5539 x
= fold_rtx (x
, NULL_RTX
);
5543 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5547 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5548 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5555 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5556 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5557 least-significant part of X.
5558 MODE specifies how big a part of X to return.
5560 If the requested operation cannot be done, 0 is returned.
5562 This is similar to gen_lowpart in emit-rtl.c. */
5565 gen_lowpart_if_possible (mode
, x
)
5566 enum machine_mode mode
;
5569 rtx result
= gen_lowpart_common (mode
, x
);
5573 else if (GET_CODE (x
) == MEM
)
5575 /* This is the only other case we handle. */
5576 register int offset
= 0;
5579 #if WORDS_BIG_ENDIAN
5580 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5581 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5583 #if BYTES_BIG_ENDIAN
5584 /* Adjust the address so that the address-after-the-data
5586 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5587 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5589 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5590 if (! memory_address_p (mode
, XEXP (new, 0)))
5592 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5593 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5594 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5601 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5602 branch. It will be zero if not.
5604 In certain cases, this can cause us to add an equivalence. For example,
5605 if we are following the taken case of
5607 we can add the fact that `i' and '2' are now equivalent.
5609 In any case, we can record that this comparison was passed. If the same
5610 comparison is seen later, we will know its value. */
5613 record_jump_equiv (insn
, taken
)
5617 int cond_known_true
;
5619 enum machine_mode mode
, mode0
, mode1
;
5620 int reversed_nonequality
= 0;
5623 /* Ensure this is the right kind of insn. */
5624 if (! condjump_p (insn
) || simplejump_p (insn
))
5627 /* See if this jump condition is known true or false. */
5629 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5631 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5633 /* Get the type of comparison being done and the operands being compared.
5634 If we had to reverse a non-equality condition, record that fact so we
5635 know that it isn't valid for floating-point. */
5636 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5637 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5638 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5640 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5641 if (! cond_known_true
)
5643 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5644 code
= reverse_condition (code
);
5647 /* The mode is the mode of the non-constant. */
5649 if (mode1
!= VOIDmode
)
5652 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5655 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5656 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5657 Make any useful entries we can with that information. Called from
5658 above function and called recursively. */
5661 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5663 enum machine_mode mode
;
5665 int reversed_nonequality
;
5667 unsigned op0_hash
, op1_hash
;
5668 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5669 struct table_elt
*op0_elt
, *op1_elt
;
5671 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5672 we know that they are also equal in the smaller mode (this is also
5673 true for all smaller modes whether or not there is a SUBREG, but
5674 is not worth testing for with no SUBREG. */
5676 /* Note that GET_MODE (op0) may not equal MODE. */
5677 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5678 && (GET_MODE_SIZE (GET_MODE (op0
))
5679 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5681 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5682 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5684 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5685 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5686 reversed_nonequality
);
5689 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5690 && (GET_MODE_SIZE (GET_MODE (op1
))
5691 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5693 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5694 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5696 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5697 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5698 reversed_nonequality
);
5701 /* Similarly, if this is an NE comparison, and either is a SUBREG
5702 making a smaller mode, we know the whole thing is also NE. */
5704 /* Note that GET_MODE (op0) may not equal MODE;
5705 if we test MODE instead, we can get an infinite recursion
5706 alternating between two modes each wider than MODE. */
5708 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5709 && subreg_lowpart_p (op0
)
5710 && (GET_MODE_SIZE (GET_MODE (op0
))
5711 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5713 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5714 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5716 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5717 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5718 reversed_nonequality
);
5721 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5722 && subreg_lowpart_p (op1
)
5723 && (GET_MODE_SIZE (GET_MODE (op1
))
5724 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5726 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5727 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5729 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5730 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5731 reversed_nonequality
);
5734 /* Hash both operands. */
5737 hash_arg_in_memory
= 0;
5738 hash_arg_in_struct
= 0;
5739 op0_hash
= HASH (op0
, mode
);
5740 op0_in_memory
= hash_arg_in_memory
;
5741 op0_in_struct
= hash_arg_in_struct
;
5747 hash_arg_in_memory
= 0;
5748 hash_arg_in_struct
= 0;
5749 op1_hash
= HASH (op1
, mode
);
5750 op1_in_memory
= hash_arg_in_memory
;
5751 op1_in_struct
= hash_arg_in_struct
;
5756 /* Look up both operands. */
5757 op0_elt
= lookup (op0
, op0_hash
, mode
);
5758 op1_elt
= lookup (op1
, op1_hash
, mode
);
5760 /* If we aren't setting two things equal all we can do is save this
5761 comparison. Similarly if this is floating-point. In the latter
5762 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5763 If we record the equality, we might inadvertently delete code
5764 whose intent was to change -0 to +0. */
5766 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5768 /* If we reversed a floating-point comparison, if OP0 is not a
5769 register, or if OP1 is neither a register or constant, we can't
5772 if (GET_CODE (op1
) != REG
)
5773 op1
= equiv_constant (op1
);
5775 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5776 || GET_CODE (op0
) != REG
|| op1
== 0)
5779 /* Put OP0 in the hash table if it isn't already. This gives it a
5780 new quantity number. */
5783 if (insert_regs (op0
, NULL_PTR
, 0))
5785 rehash_using_reg (op0
);
5786 op0_hash
= HASH (op0
, mode
);
5788 /* If OP0 is contained in OP1, this changes its hash code
5789 as well. Faster to rehash than to check, except
5790 for the simple case of a constant. */
5791 if (! CONSTANT_P (op1
))
5792 op1_hash
= HASH (op1
,mode
);
5795 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5796 op0_elt
->in_memory
= op0_in_memory
;
5797 op0_elt
->in_struct
= op0_in_struct
;
5800 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5801 if (GET_CODE (op1
) == REG
)
5803 /* Look it up again--in case op0 and op1 are the same. */
5804 op1_elt
= lookup (op1
, op1_hash
, mode
);
5806 /* Put OP1 in the hash table so it gets a new quantity number. */
5809 if (insert_regs (op1
, NULL_PTR
, 0))
5811 rehash_using_reg (op1
);
5812 op1_hash
= HASH (op1
, mode
);
5815 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5816 op1_elt
->in_memory
= op1_in_memory
;
5817 op1_elt
->in_struct
= op1_in_struct
;
5820 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5821 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5825 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5826 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5832 /* If either side is still missing an equivalence, make it now,
5833 then merge the equivalences. */
5837 if (insert_regs (op0
, NULL_PTR
, 0))
5839 rehash_using_reg (op0
);
5840 op0_hash
= HASH (op0
, mode
);
5843 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5844 op0_elt
->in_memory
= op0_in_memory
;
5845 op0_elt
->in_struct
= op0_in_struct
;
5850 if (insert_regs (op1
, NULL_PTR
, 0))
5852 rehash_using_reg (op1
);
5853 op1_hash
= HASH (op1
, mode
);
5856 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5857 op1_elt
->in_memory
= op1_in_memory
;
5858 op1_elt
->in_struct
= op1_in_struct
;
5861 merge_equiv_classes (op0_elt
, op1_elt
);
5862 last_jump_equiv_class
= op0_elt
;
5865 /* CSE processing for one instruction.
5866 First simplify sources and addresses of all assignments
5867 in the instruction, using previously-computed equivalents values.
5868 Then install the new sources and destinations in the table
5869 of available values.
5871 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5874 /* Data on one SET contained in the instruction. */
5878 /* The SET rtx itself. */
5880 /* The SET_SRC of the rtx (the original value, if it is changing). */
5882 /* The hash-table element for the SET_SRC of the SET. */
5883 struct table_elt
*src_elt
;
5884 /* Hash value for the SET_SRC. */
5886 /* Hash value for the SET_DEST. */
5888 /* The SET_DEST, with SUBREG, etc., stripped. */
5890 /* Place where the pointer to the INNER_DEST was found. */
5891 rtx
*inner_dest_loc
;
5892 /* Nonzero if the SET_SRC is in memory. */
5894 /* Nonzero if the SET_SRC is in a structure. */
5896 /* Nonzero if the SET_SRC contains something
5897 whose value cannot be predicted and understood. */
5899 /* Original machine mode, in case it becomes a CONST_INT. */
5900 enum machine_mode mode
;
5901 /* A constant equivalent for SET_SRC, if any. */
5903 /* Hash value of constant equivalent for SET_SRC. */
5904 unsigned src_const_hash
;
5905 /* Table entry for constant equivalent for SET_SRC, if any. */
5906 struct table_elt
*src_const_elt
;
5910 cse_insn (insn
, in_libcall_block
)
5912 int in_libcall_block
;
5914 register rtx x
= PATTERN (insn
);
5917 register int n_sets
= 0;
5919 /* Records what this insn does to set CC0. */
5920 rtx this_insn_cc0
= 0;
5921 enum machine_mode this_insn_cc0_mode
;
5922 struct write_data writes_memory
;
5923 static struct write_data init
= {0, 0, 0, 0};
5926 struct table_elt
*src_eqv_elt
= 0;
5927 int src_eqv_volatile
;
5928 int src_eqv_in_memory
;
5929 int src_eqv_in_struct
;
5930 unsigned src_eqv_hash
;
5935 writes_memory
= init
;
5937 /* Find all the SETs and CLOBBERs in this instruction.
5938 Record all the SETs in the array `set' and count them.
5939 Also determine whether there is a CLOBBER that invalidates
5940 all memory references, or all references at varying addresses. */
5942 if (GET_CODE (insn
) == CALL_INSN
)
5944 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
5945 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
5946 invalidate (SET_DEST (XEXP (tem
, 0)));
5949 if (GET_CODE (x
) == SET
)
5951 sets
= (struct set
*) alloca (sizeof (struct set
));
5954 /* Ignore SETs that are unconditional jumps.
5955 They never need cse processing, so this does not hurt.
5956 The reason is not efficiency but rather
5957 so that we can test at the end for instructions
5958 that have been simplified to unconditional jumps
5959 and not be misled by unchanged instructions
5960 that were unconditional jumps to begin with. */
5961 if (SET_DEST (x
) == pc_rtx
5962 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5965 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5966 The hard function value register is used only once, to copy to
5967 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5968 Ensure we invalidate the destination register. On the 80386 no
5969 other code would invalidate it since it is a fixed_reg.
5970 We need not check the return of apply_change_group; see canon_reg. */
5972 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5974 canon_reg (SET_SRC (x
), insn
);
5975 apply_change_group ();
5976 fold_rtx (SET_SRC (x
), insn
);
5977 invalidate (SET_DEST (x
));
5982 else if (GET_CODE (x
) == PARALLEL
)
5984 register int lim
= XVECLEN (x
, 0);
5986 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5988 /* Find all regs explicitly clobbered in this insn,
5989 and ensure they are not replaced with any other regs
5990 elsewhere in this insn.
5991 When a reg that is clobbered is also used for input,
5992 we should presume that that is for a reason,
5993 and we should not substitute some other register
5994 which is not supposed to be clobbered.
5995 Therefore, this loop cannot be merged into the one below
5996 because a CALL may precede a CLOBBER and refer to the
5997 value clobbered. We must not let a canonicalization do
5998 anything in that case. */
5999 for (i
= 0; i
< lim
; i
++)
6001 register rtx y
= XVECEXP (x
, 0, i
);
6002 if (GET_CODE (y
) == CLOBBER
)
6004 rtx clobbered
= XEXP (y
, 0);
6006 if (GET_CODE (clobbered
) == REG
6007 || GET_CODE (clobbered
) == SUBREG
)
6008 invalidate (clobbered
);
6009 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6010 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6011 invalidate (XEXP (clobbered
, 0));
6015 for (i
= 0; i
< lim
; i
++)
6017 register rtx y
= XVECEXP (x
, 0, i
);
6018 if (GET_CODE (y
) == SET
)
6020 /* As above, we ignore unconditional jumps and call-insns and
6021 ignore the result of apply_change_group. */
6022 if (GET_CODE (SET_SRC (y
)) == CALL
)
6024 canon_reg (SET_SRC (y
), insn
);
6025 apply_change_group ();
6026 fold_rtx (SET_SRC (y
), insn
);
6027 invalidate (SET_DEST (y
));
6029 else if (SET_DEST (y
) == pc_rtx
6030 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6033 sets
[n_sets
++].rtl
= y
;
6035 else if (GET_CODE (y
) == CLOBBER
)
6037 /* If we clobber memory, take note of that,
6038 and canon the address.
6039 This does nothing when a register is clobbered
6040 because we have already invalidated the reg. */
6041 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6043 canon_reg (XEXP (y
, 0), NULL_RTX
);
6044 note_mem_written (XEXP (y
, 0), &writes_memory
);
6047 else if (GET_CODE (y
) == USE
6048 && ! (GET_CODE (XEXP (y
, 0)) == REG
6049 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6050 canon_reg (y
, NULL_RTX
);
6051 else if (GET_CODE (y
) == CALL
)
6053 /* The result of apply_change_group can be ignored; see
6055 canon_reg (y
, insn
);
6056 apply_change_group ();
6061 else if (GET_CODE (x
) == CLOBBER
)
6063 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6065 canon_reg (XEXP (x
, 0), NULL_RTX
);
6066 note_mem_written (XEXP (x
, 0), &writes_memory
);
6070 /* Canonicalize a USE of a pseudo register or memory location. */
6071 else if (GET_CODE (x
) == USE
6072 && ! (GET_CODE (XEXP (x
, 0)) == REG
6073 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6074 canon_reg (XEXP (x
, 0), NULL_RTX
);
6075 else if (GET_CODE (x
) == CALL
)
6077 /* The result of apply_change_group can be ignored; see canon_reg. */
6078 canon_reg (x
, insn
);
6079 apply_change_group ();
6083 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6084 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6085 is handled specially for this case, and if it isn't set, then there will
6086 be no equivalence for the destinatation. */
6087 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6088 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6089 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6090 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6091 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6093 /* Canonicalize sources and addresses of destinations.
6094 We do this in a separate pass to avoid problems when a MATCH_DUP is
6095 present in the insn pattern. In that case, we want to ensure that
6096 we don't break the duplicate nature of the pattern. So we will replace
6097 both operands at the same time. Otherwise, we would fail to find an
6098 equivalent substitution in the loop calling validate_change below.
6100 We used to suppress canonicalization of DEST if it appears in SRC,
6101 but we don't do this any more. */
6103 for (i
= 0; i
< n_sets
; i
++)
6105 rtx dest
= SET_DEST (sets
[i
].rtl
);
6106 rtx src
= SET_SRC (sets
[i
].rtl
);
6107 rtx
new = canon_reg (src
, insn
);
6109 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6110 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6111 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6112 || insn_n_dups
[recog_memoized (insn
)] > 0)
6113 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6115 SET_SRC (sets
[i
].rtl
) = new;
6117 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6119 validate_change (insn
, &XEXP (dest
, 1),
6120 canon_reg (XEXP (dest
, 1), insn
), 1);
6121 validate_change (insn
, &XEXP (dest
, 2),
6122 canon_reg (XEXP (dest
, 2), insn
), 1);
6125 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6126 || GET_CODE (dest
) == ZERO_EXTRACT
6127 || GET_CODE (dest
) == SIGN_EXTRACT
)
6128 dest
= XEXP (dest
, 0);
6130 if (GET_CODE (dest
) == MEM
)
6131 canon_reg (dest
, insn
);
6134 /* Now that we have done all the replacements, we can apply the change
6135 group and see if they all work. Note that this will cause some
6136 canonicalizations that would have worked individually not to be applied
6137 because some other canonicalization didn't work, but this should not
6140 The result of apply_change_group can be ignored; see canon_reg. */
6142 apply_change_group ();
6144 /* Set sets[i].src_elt to the class each source belongs to.
6145 Detect assignments from or to volatile things
6146 and set set[i] to zero so they will be ignored
6147 in the rest of this function.
6149 Nothing in this loop changes the hash table or the register chains. */
6151 for (i
= 0; i
< n_sets
; i
++)
6153 register rtx src
, dest
;
6154 register rtx src_folded
;
6155 register struct table_elt
*elt
= 0, *p
;
6156 enum machine_mode mode
;
6159 rtx src_related
= 0;
6160 struct table_elt
*src_const_elt
= 0;
6161 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6162 int src_related_cost
= 10000, src_elt_cost
= 10000;
6163 /* Set non-zero if we need to call force_const_mem on with the
6164 contents of src_folded before using it. */
6165 int src_folded_force_flag
= 0;
6167 dest
= SET_DEST (sets
[i
].rtl
);
6168 src
= SET_SRC (sets
[i
].rtl
);
6170 /* If SRC is a constant that has no machine mode,
6171 hash it with the destination's machine mode.
6172 This way we can keep different modes separate. */
6174 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6175 sets
[i
].mode
= mode
;
6179 enum machine_mode eqvmode
= mode
;
6180 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6181 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6183 hash_arg_in_memory
= 0;
6184 hash_arg_in_struct
= 0;
6185 src_eqv
= fold_rtx (src_eqv
, insn
);
6186 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6188 /* Find the equivalence class for the equivalent expression. */
6191 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6193 src_eqv_volatile
= do_not_record
;
6194 src_eqv_in_memory
= hash_arg_in_memory
;
6195 src_eqv_in_struct
= hash_arg_in_struct
;
6198 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6199 value of the INNER register, not the destination. So it is not
6200 a legal substitution for the source. But save it for later. */
6201 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6204 src_eqv_here
= src_eqv
;
6206 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6207 simplified result, which may not necessarily be valid. */
6208 src_folded
= fold_rtx (src
, insn
);
6210 /* If storing a constant in a bitfield, pre-truncate the constant
6211 so we will be able to record it later. */
6212 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6213 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6215 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6217 if (GET_CODE (src
) == CONST_INT
6218 && GET_CODE (width
) == CONST_INT
6219 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6220 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6222 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6223 << INTVAL (width
)) - 1));
6226 /* Compute SRC's hash code, and also notice if it
6227 should not be recorded at all. In that case,
6228 prevent any further processing of this assignment. */
6230 hash_arg_in_memory
= 0;
6231 hash_arg_in_struct
= 0;
6234 sets
[i
].src_hash
= HASH (src
, mode
);
6235 sets
[i
].src_volatile
= do_not_record
;
6236 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6237 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6240 /* It is no longer clear why we used to do this, but it doesn't
6241 appear to still be needed. So let's try without it since this
6242 code hurts cse'ing widened ops. */
6243 /* If source is a perverse subreg (such as QI treated as an SI),
6244 treat it as volatile. It may do the work of an SI in one context
6245 where the extra bits are not being used, but cannot replace an SI
6247 if (GET_CODE (src
) == SUBREG
6248 && (GET_MODE_SIZE (GET_MODE (src
))
6249 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6250 sets
[i
].src_volatile
= 1;
6253 /* Locate all possible equivalent forms for SRC. Try to replace
6254 SRC in the insn with each cheaper equivalent.
6256 We have the following types of equivalents: SRC itself, a folded
6257 version, a value given in a REG_EQUAL note, or a value related
6260 Each of these equivalents may be part of an additional class
6261 of equivalents (if more than one is in the table, they must be in
6262 the same class; we check for this).
6264 If the source is volatile, we don't do any table lookups.
6266 We note any constant equivalent for possible later use in a
6269 if (!sets
[i
].src_volatile
)
6270 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6272 sets
[i
].src_elt
= elt
;
6274 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6276 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6278 /* The REG_EQUAL is indicating that two formerly distinct
6279 classes are now equivalent. So merge them. */
6280 merge_equiv_classes (elt
, src_eqv_elt
);
6281 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6282 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6288 else if (src_eqv_elt
)
6291 /* Try to find a constant somewhere and record it in `src_const'.
6292 Record its table element, if any, in `src_const_elt'. Look in
6293 any known equivalences first. (If the constant is not in the
6294 table, also set `sets[i].src_const_hash'). */
6296 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6300 src_const_elt
= elt
;
6305 && (CONSTANT_P (src_folded
)
6306 /* Consider (minus (label_ref L1) (label_ref L2)) as
6307 "constant" here so we will record it. This allows us
6308 to fold switch statements when an ADDR_DIFF_VEC is used. */
6309 || (GET_CODE (src_folded
) == MINUS
6310 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6311 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6312 src_const
= src_folded
, src_const_elt
= elt
;
6313 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6314 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6316 /* If we don't know if the constant is in the table, get its
6317 hash code and look it up. */
6318 if (src_const
&& src_const_elt
== 0)
6320 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6321 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6324 sets
[i
].src_const
= src_const
;
6325 sets
[i
].src_const_elt
= src_const_elt
;
6327 /* If the constant and our source are both in the table, mark them as
6328 equivalent. Otherwise, if a constant is in the table but the source
6329 isn't, set ELT to it. */
6330 if (src_const_elt
&& elt
6331 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6332 merge_equiv_classes (elt
, src_const_elt
);
6333 else if (src_const_elt
&& elt
== 0)
6334 elt
= src_const_elt
;
6336 /* See if there is a register linearly related to a constant
6337 equivalent of SRC. */
6339 && (GET_CODE (src_const
) == CONST
6340 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6342 src_related
= use_related_value (src_const
, src_const_elt
);
6345 struct table_elt
*src_related_elt
6346 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6347 if (src_related_elt
&& elt
)
6349 if (elt
->first_same_value
6350 != src_related_elt
->first_same_value
)
6351 /* This can occur when we previously saw a CONST
6352 involving a SYMBOL_REF and then see the SYMBOL_REF
6353 twice. Merge the involved classes. */
6354 merge_equiv_classes (elt
, src_related_elt
);
6357 src_related_elt
= 0;
6359 else if (src_related_elt
&& elt
== 0)
6360 elt
= src_related_elt
;
6364 /* See if we have a CONST_INT that is already in a register in a
6367 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6368 && GET_MODE_CLASS (mode
) == MODE_INT
6369 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6371 enum machine_mode wider_mode
;
6373 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6374 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6375 && src_related
== 0;
6376 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6378 struct table_elt
*const_elt
6379 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6384 for (const_elt
= const_elt
->first_same_value
;
6385 const_elt
; const_elt
= const_elt
->next_same_value
)
6386 if (GET_CODE (const_elt
->exp
) == REG
)
6388 src_related
= gen_lowpart_if_possible (mode
,
6395 /* Another possibility is that we have an AND with a constant in
6396 a mode narrower than a word. If so, it might have been generated
6397 as part of an "if" which would narrow the AND. If we already
6398 have done the AND in a wider mode, we can use a SUBREG of that
6401 if (flag_expensive_optimizations
&& ! src_related
6402 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6403 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6405 enum machine_mode tmode
;
6406 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6408 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6409 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6410 tmode
= GET_MODE_WIDER_MODE (tmode
))
6412 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6413 struct table_elt
*larger_elt
;
6417 PUT_MODE (new_and
, tmode
);
6418 XEXP (new_and
, 0) = inner
;
6419 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6420 if (larger_elt
== 0)
6423 for (larger_elt
= larger_elt
->first_same_value
;
6424 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6425 if (GET_CODE (larger_elt
->exp
) == REG
)
6428 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6438 #ifdef LOAD_EXTEND_OP
6439 /* See if a MEM has already been loaded with a widening operation;
6440 if it has, we can use a subreg of that. Many CISC machines
6441 also have such operations, but this is only likely to be
6442 beneficial these machines. */
6444 if (flag_expensive_optimizations
&& src_related
== 0
6445 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6446 && GET_MODE_CLASS (mode
) == MODE_INT
6447 && GET_CODE (src
) == MEM
&& ! do_not_record
6448 && LOAD_EXTEND_OP (mode
) != NIL
)
6450 enum machine_mode tmode
;
6452 /* Set what we are trying to extend and the operation it might
6453 have been extended with. */
6454 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6455 XEXP (memory_extend_rtx
, 0) = src
;
6457 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6458 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6459 tmode
= GET_MODE_WIDER_MODE (tmode
))
6461 struct table_elt
*larger_elt
;
6463 PUT_MODE (memory_extend_rtx
, tmode
);
6464 larger_elt
= lookup (memory_extend_rtx
,
6465 HASH (memory_extend_rtx
, tmode
), tmode
);
6466 if (larger_elt
== 0)
6469 for (larger_elt
= larger_elt
->first_same_value
;
6470 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6471 if (GET_CODE (larger_elt
->exp
) == REG
)
6473 src_related
= gen_lowpart_if_possible (mode
,
6482 #endif /* LOAD_EXTEND_OP */
6484 if (src
== src_folded
)
6487 /* At this point, ELT, if non-zero, points to a class of expressions
6488 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6489 and SRC_RELATED, if non-zero, each contain additional equivalent
6490 expressions. Prune these latter expressions by deleting expressions
6491 already in the equivalence class.
6493 Check for an equivalent identical to the destination. If found,
6494 this is the preferred equivalent since it will likely lead to
6495 elimination of the insn. Indicate this by placing it in
6498 if (elt
) elt
= elt
->first_same_value
;
6499 for (p
= elt
; p
; p
= p
->next_same_value
)
6501 enum rtx_code code
= GET_CODE (p
->exp
);
6503 /* If the expression is not valid, ignore it. Then we do not
6504 have to check for validity below. In most cases, we can use
6505 `rtx_equal_p', since canonicalization has already been done. */
6506 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6509 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6511 else if (src_folded
&& GET_CODE (src_folded
) == code
6512 && rtx_equal_p (src_folded
, p
->exp
))
6514 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6515 && rtx_equal_p (src_eqv_here
, p
->exp
))
6517 else if (src_related
&& GET_CODE (src_related
) == code
6518 && rtx_equal_p (src_related
, p
->exp
))
6521 /* This is the same as the destination of the insns, we want
6522 to prefer it. Copy it to src_related. The code below will
6523 then give it a negative cost. */
6524 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6529 /* Find the cheapest valid equivalent, trying all the available
6530 possibilities. Prefer items not in the hash table to ones
6531 that are when they are equal cost. Note that we can never
6532 worsen an insn as the current contents will also succeed.
6533 If we find an equivalent identical to the destination, use it as best,
6534 since this insn will probably be eliminated in that case. */
6537 if (rtx_equal_p (src
, dest
))
6540 src_cost
= COST (src
);
6545 if (rtx_equal_p (src_eqv_here
, dest
))
6548 src_eqv_cost
= COST (src_eqv_here
);
6553 if (rtx_equal_p (src_folded
, dest
))
6554 src_folded_cost
= -1;
6556 src_folded_cost
= COST (src_folded
);
6561 if (rtx_equal_p (src_related
, dest
))
6562 src_related_cost
= -1;
6564 src_related_cost
= COST (src_related
);
6567 /* If this was an indirect jump insn, a known label will really be
6568 cheaper even though it looks more expensive. */
6569 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6570 src_folded
= src_const
, src_folded_cost
= -1;
6572 /* Terminate loop when replacement made. This must terminate since
6573 the current contents will be tested and will always be valid. */
6578 /* Skip invalid entries. */
6579 while (elt
&& GET_CODE (elt
->exp
) != REG
6580 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6581 elt
= elt
->next_same_value
;
6583 if (elt
) src_elt_cost
= elt
->cost
;
6585 /* Find cheapest and skip it for the next time. For items
6586 of equal cost, use this order:
6587 src_folded, src, src_eqv, src_related and hash table entry. */
6588 if (src_folded_cost
<= src_cost
6589 && src_folded_cost
<= src_eqv_cost
6590 && src_folded_cost
<= src_related_cost
6591 && src_folded_cost
<= src_elt_cost
)
6593 trial
= src_folded
, src_folded_cost
= 10000;
6594 if (src_folded_force_flag
)
6595 trial
= force_const_mem (mode
, trial
);
6597 else if (src_cost
<= src_eqv_cost
6598 && src_cost
<= src_related_cost
6599 && src_cost
<= src_elt_cost
)
6600 trial
= src
, src_cost
= 10000;
6601 else if (src_eqv_cost
<= src_related_cost
6602 && src_eqv_cost
<= src_elt_cost
)
6603 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6604 else if (src_related_cost
<= src_elt_cost
)
6605 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6608 trial
= copy_rtx (elt
->exp
);
6609 elt
= elt
->next_same_value
;
6610 src_elt_cost
= 10000;
6613 /* We don't normally have an insn matching (set (pc) (pc)), so
6614 check for this separately here. We will delete such an
6617 Tablejump insns contain a USE of the table, so simply replacing
6618 the operand with the constant won't match. This is simply an
6619 unconditional branch, however, and is therefore valid. Just
6620 insert the substitution here and we will delete and re-emit
6623 if (n_sets
== 1 && dest
== pc_rtx
6625 || (GET_CODE (trial
) == LABEL_REF
6626 && ! condjump_p (insn
))))
6628 /* If TRIAL is a label in front of a jump table, we are
6629 really falling through the switch (this is how casesi
6630 insns work), so we must branch around the table. */
6631 if (GET_CODE (trial
) == CODE_LABEL
6632 && NEXT_INSN (trial
) != 0
6633 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6634 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6635 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6637 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6639 SET_SRC (sets
[i
].rtl
) = trial
;
6640 cse_jumps_altered
= 1;
6644 /* Look for a substitution that makes a valid insn. */
6645 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6647 /* The result of apply_change_group can be ignored; see
6650 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6651 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6653 apply_change_group ();
6657 /* If we previously found constant pool entries for
6658 constants and this is a constant, try making a
6659 pool entry. Put it in src_folded unless we already have done
6660 this since that is where it likely came from. */
6662 else if (constant_pool_entries_cost
6663 && CONSTANT_P (trial
)
6664 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6665 && GET_MODE_CLASS (mode
) != MODE_CC
)
6667 src_folded_force_flag
= 1;
6669 src_folded_cost
= constant_pool_entries_cost
;
6673 src
= SET_SRC (sets
[i
].rtl
);
6675 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6676 However, there is an important exception: If both are registers
6677 that are not the head of their equivalence class, replace SET_SRC
6678 with the head of the class. If we do not do this, we will have
6679 both registers live over a portion of the basic block. This way,
6680 their lifetimes will likely abut instead of overlapping. */
6681 if (GET_CODE (dest
) == REG
6682 && REGNO_QTY_VALID_P (REGNO (dest
))
6683 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6684 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6685 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6686 /* Don't do this if the original insn had a hard reg as
6688 && (GET_CODE (sets
[i
].src
) != REG
6689 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6690 /* We can't call canon_reg here because it won't do anything if
6691 SRC is a hard register. */
6693 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6695 src
= SET_SRC (sets
[i
].rtl
)
6696 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6697 : gen_rtx (REG
, GET_MODE (src
), first
);
6699 /* If we had a constant that is cheaper than what we are now
6700 setting SRC to, use that constant. We ignored it when we
6701 thought we could make this into a no-op. */
6702 if (src_const
&& COST (src_const
) < COST (src
)
6703 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6707 /* If we made a change, recompute SRC values. */
6708 if (src
!= sets
[i
].src
)
6711 hash_arg_in_memory
= 0;
6712 hash_arg_in_struct
= 0;
6714 sets
[i
].src_hash
= HASH (src
, mode
);
6715 sets
[i
].src_volatile
= do_not_record
;
6716 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6717 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6718 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6721 /* If this is a single SET, we are setting a register, and we have an
6722 equivalent constant, we want to add a REG_NOTE. We don't want
6723 to write a REG_EQUAL note for a constant pseudo since verifying that
6724 that pseudo hasn't been eliminated is a pain. Such a note also
6725 won't help anything. */
6726 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6727 && GET_CODE (src_const
) != REG
)
6729 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6731 /* Record the actual constant value in a REG_EQUAL note, making
6732 a new one if one does not already exist. */
6734 XEXP (tem
, 0) = src_const
;
6736 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6737 src_const
, REG_NOTES (insn
));
6739 /* If storing a constant value in a register that
6740 previously held the constant value 0,
6741 record this fact with a REG_WAS_0 note on this insn.
6743 Note that the *register* is required to have previously held 0,
6744 not just any register in the quantity and we must point to the
6745 insn that set that register to zero.
6747 Rather than track each register individually, we just see if
6748 the last set for this quantity was for this register. */
6750 if (REGNO_QTY_VALID_P (REGNO (dest
))
6751 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6753 /* See if we previously had a REG_WAS_0 note. */
6754 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6755 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6757 if ((tem
= single_set (const_insn
)) != 0
6758 && rtx_equal_p (SET_DEST (tem
), dest
))
6761 XEXP (note
, 0) = const_insn
;
6763 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6764 const_insn
, REG_NOTES (insn
));
6769 /* Now deal with the destination. */
6771 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6773 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6774 to the MEM or REG within it. */
6775 while (GET_CODE (dest
) == SIGN_EXTRACT
6776 || GET_CODE (dest
) == ZERO_EXTRACT
6777 || GET_CODE (dest
) == SUBREG
6778 || GET_CODE (dest
) == STRICT_LOW_PART
)
6780 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6781 dest
= XEXP (dest
, 0);
6784 sets
[i
].inner_dest
= dest
;
6786 if (GET_CODE (dest
) == MEM
)
6788 dest
= fold_rtx (dest
, insn
);
6790 /* Decide whether we invalidate everything in memory,
6791 or just things at non-fixed places.
6792 Writing a large aggregate must invalidate everything
6793 because we don't know how long it is. */
6794 note_mem_written (dest
, &writes_memory
);
6797 /* Compute the hash code of the destination now,
6798 before the effects of this instruction are recorded,
6799 since the register values used in the address computation
6800 are those before this instruction. */
6801 sets
[i
].dest_hash
= HASH (dest
, mode
);
6803 /* Don't enter a bit-field in the hash table
6804 because the value in it after the store
6805 may not equal what was stored, due to truncation. */
6807 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6808 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6810 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6812 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6813 && GET_CODE (width
) == CONST_INT
6814 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6815 && ! (INTVAL (src_const
)
6816 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6817 /* Exception: if the value is constant,
6818 and it won't be truncated, record it. */
6822 /* This is chosen so that the destination will be invalidated
6823 but no new value will be recorded.
6824 We must invalidate because sometimes constant
6825 values can be recorded for bitfields. */
6826 sets
[i
].src_elt
= 0;
6827 sets
[i
].src_volatile
= 1;
6833 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6835 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6837 PUT_CODE (insn
, NOTE
);
6838 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6839 NOTE_SOURCE_FILE (insn
) = 0;
6840 cse_jumps_altered
= 1;
6841 /* One less use of the label this insn used to jump to. */
6842 --LABEL_NUSES (JUMP_LABEL (insn
));
6843 /* No more processing for this set. */
6847 /* If this SET is now setting PC to a label, we know it used to
6848 be a conditional or computed branch. So we see if we can follow
6849 it. If it was a computed branch, delete it and re-emit. */
6850 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6854 /* If this is not in the format for a simple branch and
6855 we are the only SET in it, re-emit it. */
6856 if (! simplejump_p (insn
) && n_sets
== 1)
6858 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6859 JUMP_LABEL (new) = XEXP (src
, 0);
6860 LABEL_NUSES (XEXP (src
, 0))++;
6865 /* Otherwise, force rerecognition, since it probably had
6866 a different pattern before.
6867 This shouldn't really be necessary, since whatever
6868 changed the source value above should have done this.
6869 Until the right place is found, might as well do this here. */
6870 INSN_CODE (insn
) = -1;
6872 /* Now that we've converted this jump to an unconditional jump,
6873 there is dead code after it. Delete the dead code until we
6874 reach a BARRIER, the end of the function, or a label. Do
6875 not delete NOTEs except for NOTE_INSN_DELETED since later
6876 phases assume these notes are retained. */
6880 while (NEXT_INSN (p
) != 0
6881 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6882 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6884 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6885 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6886 delete_insn (NEXT_INSN (p
));
6891 /* If we don't have a BARRIER immediately after INSN, put one there.
6892 Much code assumes that there are no NOTEs between a JUMP_INSN and
6895 if (NEXT_INSN (insn
) == 0
6896 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6897 emit_barrier_after (insn
);
6899 /* We might have two BARRIERs separated by notes. Delete the second
6902 if (p
!= insn
&& NEXT_INSN (p
) != 0
6903 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6904 delete_insn (NEXT_INSN (p
));
6906 cse_jumps_altered
= 1;
6910 /* If destination is volatile, invalidate it and then do no further
6911 processing for this assignment. */
6913 else if (do_not_record
)
6915 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6916 || GET_CODE (dest
) == MEM
)
6918 else if (GET_CODE (dest
) == STRICT_LOW_PART
6919 || GET_CODE (dest
) == ZERO_EXTRACT
)
6920 invalidate (XEXP (dest
, 0));
6924 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6925 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6928 /* If setting CC0, record what it was set to, or a constant, if it
6929 is equivalent to a constant. If it is being set to a floating-point
6930 value, make a COMPARE with the appropriate constant of 0. If we
6931 don't do this, later code can interpret this as a test against
6932 const0_rtx, which can cause problems if we try to put it into an
6933 insn as a floating-point operand. */
6934 if (dest
== cc0_rtx
)
6936 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6937 this_insn_cc0_mode
= mode
;
6938 if (FLOAT_MODE_P (mode
))
6939 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6945 /* Now enter all non-volatile source expressions in the hash table
6946 if they are not already present.
6947 Record their equivalence classes in src_elt.
6948 This way we can insert the corresponding destinations into
6949 the same classes even if the actual sources are no longer in them
6950 (having been invalidated). */
6952 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6953 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6955 register struct table_elt
*elt
;
6956 register struct table_elt
*classp
= sets
[0].src_elt
;
6957 rtx dest
= SET_DEST (sets
[0].rtl
);
6958 enum machine_mode eqvmode
= GET_MODE (dest
);
6960 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6962 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6965 if (insert_regs (src_eqv
, classp
, 0))
6966 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6967 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
6968 elt
->in_memory
= src_eqv_in_memory
;
6969 elt
->in_struct
= src_eqv_in_struct
;
6972 /* Check to see if src_eqv_elt is the same as a set source which
6973 does not yet have an elt, and if so set the elt of the set source
6975 for (i
= 0; i
< n_sets
; i
++)
6976 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
6977 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
6978 sets
[i
].src_elt
= src_eqv_elt
;
6981 for (i
= 0; i
< n_sets
; i
++)
6982 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6983 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6985 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6987 /* REG_EQUAL in setting a STRICT_LOW_PART
6988 gives an equivalent for the entire destination register,
6989 not just for the subreg being stored in now.
6990 This is a more interesting equivalence, so we arrange later
6991 to treat the entire reg as the destination. */
6992 sets
[i
].src_elt
= src_eqv_elt
;
6993 sets
[i
].src_hash
= src_eqv_hash
;
6997 /* Insert source and constant equivalent into hash table, if not
6999 register struct table_elt
*classp
= src_eqv_elt
;
7000 register rtx src
= sets
[i
].src
;
7001 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7002 enum machine_mode mode
7003 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7005 if (sets
[i
].src_elt
== 0)
7007 register struct table_elt
*elt
;
7009 /* Note that these insert_regs calls cannot remove
7010 any of the src_elt's, because they would have failed to
7011 match if not still valid. */
7012 if (insert_regs (src
, classp
, 0))
7013 sets
[i
].src_hash
= HASH (src
, mode
);
7014 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7015 elt
->in_memory
= sets
[i
].src_in_memory
;
7016 elt
->in_struct
= sets
[i
].src_in_struct
;
7017 sets
[i
].src_elt
= classp
= elt
;
7020 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7021 && src
!= sets
[i
].src_const
7022 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7023 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7024 sets
[i
].src_const_hash
, mode
);
7027 else if (sets
[i
].src_elt
== 0)
7028 /* If we did not insert the source into the hash table (e.g., it was
7029 volatile), note the equivalence class for the REG_EQUAL value, if any,
7030 so that the destination goes into that class. */
7031 sets
[i
].src_elt
= src_eqv_elt
;
7033 invalidate_from_clobbers (&writes_memory
, x
);
7035 /* Some registers are invalidated by subroutine calls. Memory is
7036 invalidated by non-constant calls. */
7038 if (GET_CODE (insn
) == CALL_INSN
)
7040 static struct write_data everything
= {0, 1, 1, 1};
7042 if (! CONST_CALL_P (insn
))
7043 invalidate_memory (&everything
);
7044 invalidate_for_call ();
7047 /* Now invalidate everything set by this instruction.
7048 If a SUBREG or other funny destination is being set,
7049 sets[i].rtl is still nonzero, so here we invalidate the reg
7050 a part of which is being set. */
7052 for (i
= 0; i
< n_sets
; i
++)
7055 register rtx dest
= sets
[i
].inner_dest
;
7057 /* Needed for registers to remove the register from its
7058 previous quantity's chain.
7059 Needed for memory if this is a nonvarying address, unless
7060 we have just done an invalidate_memory that covers even those. */
7061 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7062 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7064 else if (GET_CODE (dest
) == STRICT_LOW_PART
7065 || GET_CODE (dest
) == ZERO_EXTRACT
)
7066 invalidate (XEXP (dest
, 0));
7069 /* Make sure registers mentioned in destinations
7070 are safe for use in an expression to be inserted.
7071 This removes from the hash table
7072 any invalid entry that refers to one of these registers.
7074 We don't care about the return value from mention_regs because
7075 we are going to hash the SET_DEST values unconditionally. */
7077 for (i
= 0; i
< n_sets
; i
++)
7078 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7079 mention_regs (SET_DEST (sets
[i
].rtl
));
7081 /* We may have just removed some of the src_elt's from the hash table.
7082 So replace each one with the current head of the same class. */
7084 for (i
= 0; i
< n_sets
; i
++)
7087 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7088 /* If elt was removed, find current head of same class,
7089 or 0 if nothing remains of that class. */
7091 register struct table_elt
*elt
= sets
[i
].src_elt
;
7093 while (elt
&& elt
->prev_same_value
)
7094 elt
= elt
->prev_same_value
;
7096 while (elt
&& elt
->first_same_value
== 0)
7097 elt
= elt
->next_same_value
;
7098 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7102 /* Now insert the destinations into their equivalence classes. */
7104 for (i
= 0; i
< n_sets
; i
++)
7107 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7108 register struct table_elt
*elt
;
7110 /* Don't record value if we are not supposed to risk allocating
7111 floating-point values in registers that might be wider than
7113 if ((flag_float_store
7114 && GET_CODE (dest
) == MEM
7115 && FLOAT_MODE_P (GET_MODE (dest
)))
7116 /* Don't record values of destinations set inside a libcall block
7117 since we might delete the libcall. Things should have been set
7118 up so we won't want to reuse such a value, but we play it safe
7121 /* If we didn't put a REG_EQUAL value or a source into the hash
7122 table, there is no point is recording DEST. */
7123 || sets
[i
].src_elt
== 0)
7126 /* STRICT_LOW_PART isn't part of the value BEING set,
7127 and neither is the SUBREG inside it.
7128 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7129 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7130 dest
= SUBREG_REG (XEXP (dest
, 0));
7132 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7133 /* Registers must also be inserted into chains for quantities. */
7134 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7135 /* If `insert_regs' changes something, the hash code must be
7137 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7139 elt
= insert (dest
, sets
[i
].src_elt
,
7140 sets
[i
].dest_hash
, GET_MODE (dest
));
7141 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
7144 /* This implicitly assumes a whole struct
7145 need not have MEM_IN_STRUCT_P.
7146 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7147 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7148 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7151 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7152 narrower than M2, and both M1 and M2 are the same number of words,
7153 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7154 make that equivalence as well.
7156 However, BAR may have equivalences for which gen_lowpart_if_possible
7157 will produce a simpler value than gen_lowpart_if_possible applied to
7158 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7159 BAR's equivalences. If we don't get a simplified form, make
7160 the SUBREG. It will not be used in an equivalence, but will
7161 cause two similar assignments to be detected.
7163 Note the loop below will find SUBREG_REG (DEST) since we have
7164 already entered SRC and DEST of the SET in the table. */
7166 if (GET_CODE (dest
) == SUBREG
7167 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7169 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7170 && (GET_MODE_SIZE (GET_MODE (dest
))
7171 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7172 && sets
[i
].src_elt
!= 0)
7174 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7175 struct table_elt
*elt
, *classp
= 0;
7177 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7178 elt
= elt
->next_same_value
)
7182 struct table_elt
*src_elt
;
7184 /* Ignore invalid entries. */
7185 if (GET_CODE (elt
->exp
) != REG
7186 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7189 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7191 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
7193 src_hash
= HASH (new_src
, new_mode
);
7194 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7196 /* Put the new source in the hash table is if isn't
7200 if (insert_regs (new_src
, classp
, 0))
7201 src_hash
= HASH (new_src
, new_mode
);
7202 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7203 src_elt
->in_memory
= elt
->in_memory
;
7204 src_elt
->in_struct
= elt
->in_struct
;
7206 else if (classp
&& classp
!= src_elt
->first_same_value
)
7207 /* Show that two things that we've seen before are
7208 actually the same. */
7209 merge_equiv_classes (src_elt
, classp
);
7211 classp
= src_elt
->first_same_value
;
7216 /* Special handling for (set REG0 REG1)
7217 where REG0 is the "cheapest", cheaper than REG1.
7218 After cse, REG1 will probably not be used in the sequel,
7219 so (if easily done) change this insn to (set REG1 REG0) and
7220 replace REG1 with REG0 in the previous insn that computed their value.
7221 Then REG1 will become a dead store and won't cloud the situation
7222 for later optimizations.
7224 Do not make this change if REG1 is a hard register, because it will
7225 then be used in the sequel and we may be changing a two-operand insn
7226 into a three-operand insn.
7228 Also do not do this if we are operating on a copy of INSN. */
7230 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7231 && NEXT_INSN (PREV_INSN (insn
)) == insn
7232 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7233 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7234 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7235 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7236 == REGNO (SET_DEST (sets
[0].rtl
))))
7238 rtx prev
= PREV_INSN (insn
);
7239 while (prev
&& GET_CODE (prev
) == NOTE
)
7240 prev
= PREV_INSN (prev
);
7242 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7243 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7245 rtx dest
= SET_DEST (sets
[0].rtl
);
7246 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7248 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7249 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7250 SET_SRC (sets
[0].rtl
), 1);
7251 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7252 apply_change_group ();
7254 /* If REG1 was equivalent to a constant, REG0 is not. */
7256 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7258 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7259 any REG_WAS_0 note on INSN to PREV. */
7260 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7262 remove_note (prev
, note
);
7264 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7267 remove_note (insn
, note
);
7268 XEXP (note
, 1) = REG_NOTES (prev
);
7269 REG_NOTES (prev
) = note
;
7274 /* If this is a conditional jump insn, record any known equivalences due to
7275 the condition being tested. */
7277 last_jump_equiv_class
= 0;
7278 if (GET_CODE (insn
) == JUMP_INSN
7279 && n_sets
== 1 && GET_CODE (x
) == SET
7280 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7281 record_jump_equiv (insn
, 0);
7284 /* If the previous insn set CC0 and this insn no longer references CC0,
7285 delete the previous insn. Here we use the fact that nothing expects CC0
7286 to be valid over an insn, which is true until the final pass. */
7287 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7288 && (tem
= single_set (prev_insn
)) != 0
7289 && SET_DEST (tem
) == cc0_rtx
7290 && ! reg_mentioned_p (cc0_rtx
, x
))
7292 PUT_CODE (prev_insn
, NOTE
);
7293 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7294 NOTE_SOURCE_FILE (prev_insn
) = 0;
7297 prev_insn_cc0
= this_insn_cc0
;
7298 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7304 /* Store 1 in *WRITES_PTR for those categories of memory ref
7305 that must be invalidated when the expression WRITTEN is stored in.
7306 If WRITTEN is null, say everything must be invalidated. */
7309 note_mem_written (written
, writes_ptr
)
7311 struct write_data
*writes_ptr
;
7313 static struct write_data everything
= {0, 1, 1, 1};
7316 *writes_ptr
= everything
;
7317 else if (GET_CODE (written
) == MEM
)
7319 /* Pushing or popping the stack invalidates just the stack pointer. */
7320 rtx addr
= XEXP (written
, 0);
7321 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7322 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7323 && GET_CODE (XEXP (addr
, 0)) == REG
7324 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7329 else if (GET_MODE (written
) == BLKmode
)
7330 *writes_ptr
= everything
;
7331 /* (mem (scratch)) means clobber everything. */
7332 else if (GET_CODE (addr
) == SCRATCH
)
7333 *writes_ptr
= everything
;
7334 else if (cse_rtx_addr_varies_p (written
))
7336 /* A varying address that is a sum indicates an array element,
7337 and that's just as good as a structure element
7338 in implying that we need not invalidate scalar variables.
7339 However, we must allow QImode aliasing of scalars, because the
7340 ANSI C standard allows character pointers to alias anything. */
7341 if (! ((MEM_IN_STRUCT_P (written
)
7342 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7343 && GET_MODE (written
) != QImode
))
7344 writes_ptr
->all
= 1;
7345 writes_ptr
->nonscalar
= 1;
7347 writes_ptr
->var
= 1;
7351 /* Perform invalidation on the basis of everything about an insn
7352 except for invalidating the actual places that are SET in it.
7353 This includes the places CLOBBERed, and anything that might
7354 alias with something that is SET or CLOBBERed.
7356 W points to the writes_memory for this insn, a struct write_data
7357 saying which kinds of memory references must be invalidated.
7358 X is the pattern of the insn. */
7361 invalidate_from_clobbers (w
, x
)
7362 struct write_data
*w
;
7365 /* If W->var is not set, W specifies no action.
7366 If W->all is set, this step gets all memory refs
7367 so they can be ignored in the rest of this function. */
7369 invalidate_memory (w
);
7373 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7374 reg_tick
[STACK_POINTER_REGNUM
]++;
7376 /* This should be *very* rare. */
7377 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7378 invalidate (stack_pointer_rtx
);
7381 if (GET_CODE (x
) == CLOBBER
)
7383 rtx ref
= XEXP (x
, 0);
7386 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7387 || (GET_CODE (ref
) == MEM
&& ! w
->all
))
7389 else if (GET_CODE (ref
) == STRICT_LOW_PART
7390 || GET_CODE (ref
) == ZERO_EXTRACT
)
7391 invalidate (XEXP (ref
, 0));
7394 else if (GET_CODE (x
) == PARALLEL
)
7397 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7399 register rtx y
= XVECEXP (x
, 0, i
);
7400 if (GET_CODE (y
) == CLOBBER
)
7402 rtx ref
= XEXP (y
, 0);
7405 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7406 || (GET_CODE (ref
) == MEM
&& !w
->all
))
7408 else if (GET_CODE (ref
) == STRICT_LOW_PART
7409 || GET_CODE (ref
) == ZERO_EXTRACT
)
7410 invalidate (XEXP (ref
, 0));
7417 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7418 and replace any registers in them with either an equivalent constant
7419 or the canonical form of the register. If we are inside an address,
7420 only do this if the address remains valid.
7422 OBJECT is 0 except when within a MEM in which case it is the MEM.
7424 Return the replacement for X. */
7427 cse_process_notes (x
, object
)
7431 enum rtx_code code
= GET_CODE (x
);
7432 char *fmt
= GET_RTX_FORMAT (code
);
7448 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7453 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7454 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7456 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7462 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7463 /* We don't substitute VOIDmode constants into these rtx,
7464 since they would impede folding. */
7465 if (GET_MODE (new) != VOIDmode
)
7466 validate_change (object
, &XEXP (x
, 0), new, 0);
7471 i
= reg_qty
[REGNO (x
)];
7473 /* Return a constant or a constant register. */
7474 if (REGNO_QTY_VALID_P (REGNO (x
))
7475 && qty_const
[i
] != 0
7476 && (CONSTANT_P (qty_const
[i
])
7477 || GET_CODE (qty_const
[i
]) == REG
))
7479 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7484 /* Otherwise, canonicalize this register. */
7485 return canon_reg (x
, NULL_RTX
);
7488 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7490 validate_change (object
, &XEXP (x
, i
),
7491 cse_process_notes (XEXP (x
, i
), object
), 0);
7496 /* Find common subexpressions between the end test of a loop and the beginning
7497 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7499 Often we have a loop where an expression in the exit test is used
7500 in the body of the loop. For example "while (*p) *q++ = *p++;".
7501 Because of the way we duplicate the loop exit test in front of the loop,
7502 however, we don't detect that common subexpression. This will be caught
7503 when global cse is implemented, but this is a quite common case.
7505 This function handles the most common cases of these common expressions.
7506 It is called after we have processed the basic block ending with the
7507 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7508 jumps to a label used only once. */
7511 cse_around_loop (loop_start
)
7516 struct table_elt
*p
;
7518 /* If the jump at the end of the loop doesn't go to the start, we don't
7520 for (insn
= PREV_INSN (loop_start
);
7521 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7522 insn
= PREV_INSN (insn
))
7526 || GET_CODE (insn
) != NOTE
7527 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7530 /* If the last insn of the loop (the end test) was an NE comparison,
7531 we will interpret it as an EQ comparison, since we fell through
7532 the loop. Any equivalences resulting from that comparison are
7533 therefore not valid and must be invalidated. */
7534 if (last_jump_equiv_class
)
7535 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7536 p
= p
->next_same_value
)
7537 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7538 || GET_CODE (p
->exp
) == SUBREG
)
7539 invalidate (p
->exp
);
7540 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7541 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7542 invalidate (XEXP (p
->exp
, 0));
7544 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7545 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7547 The only thing we do with SET_DEST is invalidate entries, so we
7548 can safely process each SET in order. It is slightly less efficient
7549 to do so, but we only want to handle the most common cases. */
7551 for (insn
= NEXT_INSN (loop_start
);
7552 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7553 && ! (GET_CODE (insn
) == NOTE
7554 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7555 insn
= NEXT_INSN (insn
))
7557 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7558 && (GET_CODE (PATTERN (insn
)) == SET
7559 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7560 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7561 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7562 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7563 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7564 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7565 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7566 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7571 /* Variable used for communications between the next two routines. */
7573 static struct write_data skipped_writes_memory
;
7575 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7576 since they are done elsewhere. This function is called via note_stores. */
7579 invalidate_skipped_set (dest
, set
)
7583 if (GET_CODE (set
) == CLOBBER
7590 if (GET_CODE (dest
) == MEM
)
7591 note_mem_written (dest
, &skipped_writes_memory
);
7593 /* There are times when an address can appear varying and be a PLUS
7594 during this scan when it would be a fixed address were we to know
7595 the proper equivalences. So promote "nonscalar" to be "all". */
7596 if (skipped_writes_memory
.nonscalar
)
7597 skipped_writes_memory
.all
= 1;
7599 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7600 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7602 else if (GET_CODE (dest
) == STRICT_LOW_PART
7603 || GET_CODE (dest
) == ZERO_EXTRACT
)
7604 invalidate (XEXP (dest
, 0));
7607 /* Invalidate all insns from START up to the end of the function or the
7608 next label. This called when we wish to CSE around a block that is
7609 conditionally executed. */
7612 invalidate_skipped_block (start
)
7616 static struct write_data init
= {0, 0, 0, 0};
7617 static struct write_data everything
= {0, 1, 1, 1};
7619 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7620 insn
= NEXT_INSN (insn
))
7622 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7625 skipped_writes_memory
= init
;
7627 if (GET_CODE (insn
) == CALL_INSN
)
7629 invalidate_for_call ();
7630 skipped_writes_memory
= everything
;
7633 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7634 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7638 /* Used for communication between the following two routines; contains a
7639 value to be checked for modification. */
7641 static rtx cse_check_loop_start_value
;
7643 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7644 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7647 cse_check_loop_start (x
, set
)
7651 if (cse_check_loop_start_value
== 0
7652 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7655 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7656 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7657 cse_check_loop_start_value
= 0;
7660 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7661 a loop that starts with the label at LOOP_START.
7663 If X is a SET, we see if its SET_SRC is currently in our hash table.
7664 If so, we see if it has a value equal to some register used only in the
7665 loop exit code (as marked by jump.c).
7667 If those two conditions are true, we search backwards from the start of
7668 the loop to see if that same value was loaded into a register that still
7669 retains its value at the start of the loop.
7671 If so, we insert an insn after the load to copy the destination of that
7672 load into the equivalent register and (try to) replace our SET_SRC with that
7675 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7678 cse_set_around_loop (x
, insn
, loop_start
)
7683 struct table_elt
*src_elt
;
7684 static struct write_data init
= {0, 0, 0, 0};
7685 struct write_data writes_memory
;
7687 writes_memory
= init
;
7689 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7690 are setting PC or CC0 or whose SET_SRC is already a register. */
7691 if (GET_CODE (x
) == SET
7692 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7693 && GET_CODE (SET_SRC (x
)) != REG
)
7695 src_elt
= lookup (SET_SRC (x
),
7696 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7697 GET_MODE (SET_DEST (x
)));
7700 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7701 src_elt
= src_elt
->next_same_value
)
7702 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7703 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7707 /* Look for an insn in front of LOOP_START that sets
7708 something in the desired mode to SET_SRC (x) before we hit
7709 a label or CALL_INSN. */
7711 for (p
= prev_nonnote_insn (loop_start
);
7712 p
&& GET_CODE (p
) != CALL_INSN
7713 && GET_CODE (p
) != CODE_LABEL
;
7714 p
= prev_nonnote_insn (p
))
7715 if ((set
= single_set (p
)) != 0
7716 && GET_CODE (SET_DEST (set
)) == REG
7717 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7718 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7720 /* We now have to ensure that nothing between P
7721 and LOOP_START modified anything referenced in
7722 SET_SRC (x). We know that nothing within the loop
7723 can modify it, or we would have invalidated it in
7727 cse_check_loop_start_value
= SET_SRC (x
);
7728 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7729 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7730 note_stores (PATTERN (q
), cse_check_loop_start
);
7732 /* If nothing was changed and we can replace our
7733 SET_SRC, add an insn after P to copy its destination
7734 to what we will be replacing SET_SRC with. */
7735 if (cse_check_loop_start_value
7736 && validate_change (insn
, &SET_SRC (x
),
7738 emit_insn_after (gen_move_insn (src_elt
->exp
,
7746 /* Now invalidate anything modified by X. */
7747 note_mem_written (SET_DEST (x
), &writes_memory
);
7749 if (writes_memory
.var
)
7750 invalidate_memory (&writes_memory
);
7752 /* See comment on similar code in cse_insn for explanation of these tests. */
7753 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7754 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7755 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7756 invalidate (SET_DEST (x
));
7757 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
7758 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
7759 invalidate (XEXP (SET_DEST (x
), 0));
7762 /* Find the end of INSN's basic block and return its range,
7763 the total number of SETs in all the insns of the block, the last insn of the
7764 block, and the branch path.
7766 The branch path indicates which branches should be followed. If a non-zero
7767 path size is specified, the block should be rescanned and a different set
7768 of branches will be taken. The branch path is only used if
7769 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7771 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7772 used to describe the block. It is filled in with the information about
7773 the current block. The incoming structure's branch path, if any, is used
7774 to construct the output branch path. */
7777 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7779 struct cse_basic_block_data
*data
;
7786 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7787 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7788 int path_size
= data
->path_size
;
7792 /* Update the previous branch path, if any. If the last branch was
7793 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7794 shorten the path by one and look at the previous branch. We know that
7795 at least one branch must have been taken if PATH_SIZE is non-zero. */
7796 while (path_size
> 0)
7798 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7800 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7807 /* Scan to end of this basic block. */
7808 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7810 /* Don't cse out the end of a loop. This makes a difference
7811 only for the unusual loops that always execute at least once;
7812 all other loops have labels there so we will stop in any case.
7813 Cse'ing out the end of the loop is dangerous because it
7814 might cause an invariant expression inside the loop
7815 to be reused after the end of the loop. This would make it
7816 hard to move the expression out of the loop in loop.c,
7817 especially if it is one of several equivalent expressions
7818 and loop.c would like to eliminate it.
7820 If we are running after loop.c has finished, we can ignore
7821 the NOTE_INSN_LOOP_END. */
7823 if (! after_loop
&& GET_CODE (p
) == NOTE
7824 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7827 /* Don't cse over a call to setjmp; on some machines (eg vax)
7828 the regs restored by the longjmp come from
7829 a later time than the setjmp. */
7830 if (GET_CODE (p
) == NOTE
7831 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7834 /* A PARALLEL can have lots of SETs in it,
7835 especially if it is really an ASM_OPERANDS. */
7836 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7837 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7838 nsets
+= XVECLEN (PATTERN (p
), 0);
7839 else if (GET_CODE (p
) != NOTE
)
7842 /* Ignore insns made by CSE; they cannot affect the boundaries of
7845 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
7846 high_cuid
= INSN_CUID (p
);
7847 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
7848 low_cuid
= INSN_CUID (p
);
7850 /* See if this insn is in our branch path. If it is and we are to
7852 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7854 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7857 /* Point to next entry in path, if any. */
7861 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7862 was specified, we haven't reached our maximum path length, there are
7863 insns following the target of the jump, this is the only use of the
7864 jump label, and the target label is preceded by a BARRIER.
7866 Alternatively, we can follow the jump if it branches around a
7867 block of code and there are no other branches into the block.
7868 In this case invalidate_skipped_block will be called to invalidate any
7869 registers set in the block when following the jump. */
7871 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7872 && GET_CODE (p
) == JUMP_INSN
7873 && GET_CODE (PATTERN (p
)) == SET
7874 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7875 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7876 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7878 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7879 if ((GET_CODE (q
) != NOTE
7880 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7881 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7882 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7885 /* If we ran into a BARRIER, this code is an extension of the
7886 basic block when the branch is taken. */
7887 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7889 /* Don't allow ourself to keep walking around an
7890 always-executed loop. */
7891 if (next_real_insn (q
) == next
)
7897 /* Similarly, don't put a branch in our path more than once. */
7898 for (i
= 0; i
< path_entry
; i
++)
7899 if (data
->path
[i
].branch
== p
)
7902 if (i
!= path_entry
)
7905 data
->path
[path_entry
].branch
= p
;
7906 data
->path
[path_entry
++].status
= TAKEN
;
7908 /* This branch now ends our path. It was possible that we
7909 didn't see this branch the last time around (when the
7910 insn in front of the target was a JUMP_INSN that was
7911 turned into a no-op). */
7912 path_size
= path_entry
;
7915 /* Mark block so we won't scan it again later. */
7916 PUT_MODE (NEXT_INSN (p
), QImode
);
7918 /* Detect a branch around a block of code. */
7919 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7923 if (next_real_insn (q
) == next
)
7929 for (i
= 0; i
< path_entry
; i
++)
7930 if (data
->path
[i
].branch
== p
)
7933 if (i
!= path_entry
)
7936 /* This is no_labels_between_p (p, q) with an added check for
7937 reaching the end of a function (in case Q precedes P). */
7938 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7939 if (GET_CODE (tmp
) == CODE_LABEL
)
7944 data
->path
[path_entry
].branch
= p
;
7945 data
->path
[path_entry
++].status
= AROUND
;
7947 path_size
= path_entry
;
7950 /* Mark block so we won't scan it again later. */
7951 PUT_MODE (NEXT_INSN (p
), QImode
);
7958 data
->low_cuid
= low_cuid
;
7959 data
->high_cuid
= high_cuid
;
7960 data
->nsets
= nsets
;
7963 /* If all jumps in the path are not taken, set our path length to zero
7964 so a rescan won't be done. */
7965 for (i
= path_size
- 1; i
>= 0; i
--)
7966 if (data
->path
[i
].status
!= NOT_TAKEN
)
7970 data
->path_size
= 0;
7972 data
->path_size
= path_size
;
7974 /* End the current branch path. */
7975 data
->path
[path_size
].branch
= 0;
7978 /* Perform cse on the instructions of a function.
7979 F is the first instruction.
7980 NREGS is one plus the highest pseudo-reg number used in the instruction.
7982 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7983 (only if -frerun-cse-after-loop).
7985 Returns 1 if jump_optimize should be redone due to simplifications
7986 in conditional jump instructions. */
7989 cse_main (f
, nregs
, after_loop
, file
)
7995 struct cse_basic_block_data val
;
7996 register rtx insn
= f
;
7999 cse_jumps_altered
= 0;
8000 constant_pool_entries_cost
= 0;
8007 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8008 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8010 for (i
= 0; i
< nregs
; i
++)
8012 all_minus_one
[i
] = -1;
8016 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8017 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8018 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8019 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8020 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8022 #ifdef LOAD_EXTEND_OP
8024 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8025 and change the code and mode as appropriate. */
8026 memory_extend_rtx
= gen_rtx (ZERO_EXTEND
, VOIDmode
, 0);
8029 /* Discard all the free elements of the previous function
8030 since they are allocated in the temporarily obstack. */
8031 bzero ((char *) table
, sizeof table
);
8032 free_element_chain
= 0;
8033 n_elements_made
= 0;
8035 /* Find the largest uid. */
8037 max_uid
= get_max_uid ();
8038 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8039 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8041 /* Compute the mapping from uids to cuids.
8042 CUIDs are numbers assigned to insns, like uids,
8043 except that cuids increase monotonically through the code.
8044 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8045 between two insns is not affected by -g. */
8047 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8049 if (GET_CODE (insn
) != NOTE
8050 || NOTE_LINE_NUMBER (insn
) < 0)
8051 INSN_CUID (insn
) = ++i
;
8053 /* Give a line number note the same cuid as preceding insn. */
8054 INSN_CUID (insn
) = i
;
8057 /* Initialize which registers are clobbered by calls. */
8059 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8061 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8062 if ((call_used_regs
[i
]
8063 /* Used to check !fixed_regs[i] here, but that isn't safe;
8064 fixed regs are still call-clobbered, and sched can get
8065 confused if they can "live across calls".
8067 The frame pointer is always preserved across calls. The arg
8068 pointer is if it is fixed. The stack pointer usually is, unless
8069 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8070 will be present. If we are generating PIC code, the PIC offset
8071 table register is preserved across calls. */
8073 && i
!= STACK_POINTER_REGNUM
8074 && i
!= FRAME_POINTER_REGNUM
8075 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8076 && i
!= HARD_FRAME_POINTER_REGNUM
8078 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8079 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8081 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8082 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8086 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8088 /* Loop over basic blocks.
8089 Compute the maximum number of qty's needed for each basic block
8090 (which is 2 for each SET). */
8094 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8095 flag_cse_skip_blocks
);
8097 /* If this basic block was already processed or has no sets, skip it. */
8098 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8100 PUT_MODE (insn
, VOIDmode
);
8101 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8106 cse_basic_block_start
= val
.low_cuid
;
8107 cse_basic_block_end
= val
.high_cuid
;
8108 max_qty
= val
.nsets
* 2;
8111 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8112 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8115 /* Make MAX_QTY bigger to give us room to optimize
8116 past the end of this basic block, if that should prove useful. */
8122 /* If this basic block is being extended by following certain jumps,
8123 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8124 Otherwise, we start after this basic block. */
8125 if (val
.path_size
> 0)
8126 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8129 int old_cse_jumps_altered
= cse_jumps_altered
;
8132 /* When cse changes a conditional jump to an unconditional
8133 jump, we want to reprocess the block, since it will give
8134 us a new branch path to investigate. */
8135 cse_jumps_altered
= 0;
8136 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8137 if (cse_jumps_altered
== 0
8138 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8141 cse_jumps_altered
|= old_cse_jumps_altered
;
8149 /* Tell refers_to_mem_p that qty_const info is not available. */
8152 if (max_elements_made
< n_elements_made
)
8153 max_elements_made
= n_elements_made
;
8155 return cse_jumps_altered
;
8158 /* Process a single basic block. FROM and TO and the limits of the basic
8159 block. NEXT_BRANCH points to the branch path when following jumps or
8160 a null path when not following jumps.
8162 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8163 loop. This is true when we are being called for the last time on a
8164 block and this CSE pass is before loop.c. */
8167 cse_basic_block (from
, to
, next_branch
, around_loop
)
8168 register rtx from
, to
;
8169 struct branch_path
*next_branch
;
8174 int in_libcall_block
= 0;
8176 /* Each of these arrays is undefined before max_reg, so only allocate
8177 the space actually needed and adjust the start below. */
8179 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8180 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8181 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8182 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8183 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8185 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8186 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8187 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8189 qty_first_reg
-= max_reg
;
8190 qty_last_reg
-= max_reg
;
8191 qty_mode
-= max_reg
;
8192 qty_const
-= max_reg
;
8193 qty_const_insn
-= max_reg
;
8194 qty_comparison_code
-= max_reg
;
8195 qty_comparison_qty
-= max_reg
;
8196 qty_comparison_const
-= max_reg
;
8200 /* TO might be a label. If so, protect it from being deleted. */
8201 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8204 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8206 register enum rtx_code code
;
8208 /* See if this is a branch that is part of the path. If so, and it is
8209 to be taken, do so. */
8210 if (next_branch
->branch
== insn
)
8212 enum taken status
= next_branch
++->status
;
8213 if (status
!= NOT_TAKEN
)
8215 if (status
== TAKEN
)
8216 record_jump_equiv (insn
, 1);
8218 invalidate_skipped_block (NEXT_INSN (insn
));
8220 /* Set the last insn as the jump insn; it doesn't affect cc0.
8221 Then follow this branch. */
8226 insn
= JUMP_LABEL (insn
);
8231 code
= GET_CODE (insn
);
8232 if (GET_MODE (insn
) == QImode
)
8233 PUT_MODE (insn
, VOIDmode
);
8235 if (GET_RTX_CLASS (code
) == 'i')
8237 /* Process notes first so we have all notes in canonical forms when
8238 looking for duplicate operations. */
8240 if (REG_NOTES (insn
))
8241 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8243 /* Track when we are inside in LIBCALL block. Inside such a block,
8244 we do not want to record destinations. The last insn of a
8245 LIBCALL block is not considered to be part of the block, since
8246 its destination is the result of the block and hence should be
8249 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8250 in_libcall_block
= 1;
8251 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8252 in_libcall_block
= 0;
8254 cse_insn (insn
, in_libcall_block
);
8257 /* If INSN is now an unconditional jump, skip to the end of our
8258 basic block by pretending that we just did the last insn in the
8259 basic block. If we are jumping to the end of our block, show
8260 that we can have one usage of TO. */
8262 if (simplejump_p (insn
))
8267 if (JUMP_LABEL (insn
) == to
)
8270 /* Maybe TO was deleted because the jump is unconditional.
8271 If so, there is nothing left in this basic block. */
8272 /* ??? Perhaps it would be smarter to set TO
8273 to whatever follows this insn,
8274 and pretend the basic block had always ended here. */
8275 if (INSN_DELETED_P (to
))
8278 insn
= PREV_INSN (to
);
8281 /* See if it is ok to keep on going past the label
8282 which used to end our basic block. Remember that we incremented
8283 the count of that label, so we decrement it here. If we made
8284 a jump unconditional, TO_USAGE will be one; in that case, we don't
8285 want to count the use in that jump. */
8287 if (to
!= 0 && NEXT_INSN (insn
) == to
8288 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8290 struct cse_basic_block_data val
;
8292 insn
= NEXT_INSN (to
);
8294 if (LABEL_NUSES (to
) == 0)
8297 /* Find the end of the following block. Note that we won't be
8298 following branches in this case. If TO was the last insn
8299 in the function, we are done. Similarly, if we deleted the
8300 insn after TO, it must have been because it was preceded by
8301 a BARRIER. In that case, we are done with this block because it
8302 has no continuation. */
8304 if (insn
== 0 || INSN_DELETED_P (insn
))
8309 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8311 /* If the tables we allocated have enough space left
8312 to handle all the SETs in the next basic block,
8313 continue through it. Otherwise, return,
8314 and that block will be scanned individually. */
8315 if (val
.nsets
* 2 + next_qty
> max_qty
)
8318 cse_basic_block_start
= val
.low_cuid
;
8319 cse_basic_block_end
= val
.high_cuid
;
8322 /* Prevent TO from being deleted if it is a label. */
8323 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8326 /* Back up so we process the first insn in the extension. */
8327 insn
= PREV_INSN (insn
);
8331 if (next_qty
> max_qty
)
8334 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8335 the previous insn is the only insn that branches to the head of a loop,
8336 we can cse into the loop. Don't do this if we changed the jump
8337 structure of a loop unless we aren't going to be following jumps. */
8339 if ((cse_jumps_altered
== 0
8340 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8341 && around_loop
&& to
!= 0
8342 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8343 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8344 && JUMP_LABEL (PREV_INSN (to
)) != 0
8345 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8346 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8348 return to
? NEXT_INSN (to
) : 0;
8351 /* Count the number of times registers are used (not set) in X.
8352 COUNTS is an array in which we accumulate the count, INCR is how much
8353 we count each register usage.
8355 Don't count a usage of DEST, which is the SET_DEST of a SET which
8356 contains X in its SET_SRC. This is because such a SET does not
8357 modify the liveness of DEST. */
8360 count_reg_usage (x
, counts
, dest
, incr
)
8373 switch (code
= GET_CODE (x
))
8377 counts
[REGNO (x
)] += incr
;
8391 /* Unless we are setting a REG, count everything in SET_DEST. */
8392 if (GET_CODE (SET_DEST (x
)) != REG
)
8393 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8395 /* If SRC has side-effects, then we can't delete this insn, so the
8396 usage of SET_DEST inside SRC counts.
8398 ??? Strictly-speaking, we might be preserving this insn
8399 because some other SET has side-effects, but that's hard
8400 to do and can't happen now. */
8401 count_reg_usage (SET_SRC (x
), counts
,
8402 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8407 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8409 /* ... falls through ... */
8412 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8414 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8417 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8422 if (REG_NOTE_KIND (x
) == REG_EQUAL
8423 || GET_CODE (XEXP (x
,0)) == USE
)
8424 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8425 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8429 fmt
= GET_RTX_FORMAT (code
);
8430 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8433 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8434 else if (fmt
[i
] == 'E')
8435 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8436 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8440 /* Scan all the insns and delete any that are dead; i.e., they store a register
8441 that is never used or they copy a register to itself.
8443 This is used to remove insns made obviously dead by cse. It improves the
8444 heuristics in loop since it won't try to move dead invariants out of loops
8445 or make givs for dead quantities. The remaining passes of the compilation
8446 are also sped up. */
8449 delete_dead_from_cse (insns
, nreg
)
8453 int *counts
= (int *) alloca (nreg
* sizeof (int));
8459 /* First count the number of times each register is used. */
8460 bzero ((char *) counts
, sizeof (int) * nreg
);
8461 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8462 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8464 /* Go from the last insn to the first and delete insns that only set unused
8465 registers or copy a register to itself. As we delete an insn, remove
8466 usage counts for registers it uses. */
8467 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8471 prev
= prev_real_insn (insn
);
8473 /* Don't delete any insns that are part of a libcall block.
8474 Flow or loop might get confused if we did that. Remember
8475 that we are scanning backwards. */
8476 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8481 else if (GET_CODE (PATTERN (insn
)) == SET
)
8483 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8484 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8488 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8489 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8490 && ((tem
= next_nonnote_insn (insn
)) == 0
8491 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8492 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8495 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8496 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8497 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8498 || side_effects_p (SET_SRC (PATTERN (insn
))))
8501 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8502 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8504 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8506 if (GET_CODE (elt
) == SET
)
8508 if (GET_CODE (SET_DEST (elt
)) == REG
8509 && SET_DEST (elt
) == SET_SRC (elt
))
8513 else if (GET_CODE (SET_DEST (elt
)) == CC0
8514 && ! side_effects_p (SET_SRC (elt
))
8515 && ((tem
= next_nonnote_insn (insn
)) == 0
8516 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8517 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8520 else if (GET_CODE (SET_DEST (elt
)) != REG
8521 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8522 || counts
[REGNO (SET_DEST (elt
))] != 0
8523 || side_effects_p (SET_SRC (elt
)))
8526 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8532 /* If this is a dead insn, delete it and show registers in it aren't
8537 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8541 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))