1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Must precede rtl.h for FFS. */
27 #include "hard-reg-set.h"
30 #include "insn-config.h"
35 /* The basic idea of common subexpression elimination is to go
36 through the code, keeping a record of expressions that would
37 have the same value at the current scan point, and replacing
38 expressions encountered with the cheapest equivalent expression.
40 It is too complicated to keep track of the different possibilities
41 when control paths merge; so, at each label, we forget all that is
42 known and start fresh. This can be described as processing each
43 basic block separately. Note, however, that these are not quite
44 the same as the basic blocks found by a later pass and used for
45 data flow analysis and register packing. We do not need to start fresh
46 after a conditional jump instruction if there is no label there.
48 We use two data structures to record the equivalent expressions:
49 a hash table for most expressions, and several vectors together
50 with "quantity numbers" to record equivalent (pseudo) registers.
52 The use of the special data structure for registers is desirable
53 because it is faster. It is possible because registers references
54 contain a fairly small number, the register number, taken from
55 a contiguously allocated series, and two register references are
56 identical if they have the same number. General expressions
57 do not have any such thing, so the only way to retrieve the
58 information recorded on an expression other than a register
59 is to keep it in a hash table.
61 Registers and "quantity numbers":
63 At the start of each basic block, all of the (hardware and pseudo)
64 registers used in the function are given distinct quantity
65 numbers to indicate their contents. During scan, when the code
66 copies one register into another, we copy the quantity number.
67 When a register is loaded in any other way, we allocate a new
68 quantity number to describe the value generated by this operation.
69 `reg_qty' records what quantity a register is currently thought
72 All real quantity numbers are greater than or equal to `max_reg'.
73 If register N has not been assigned a quantity, reg_qty[N] will equal N.
75 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
76 variables should be referenced with an index below `max_reg'.
78 We also maintain a bidirectional chain of registers for each
79 quantity number. `qty_first_reg', `qty_last_reg',
80 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
82 The first register in a chain is the one whose lifespan is least local.
83 Among equals, it is the one that was seen first.
84 We replace any equivalent register with that one.
86 If two registers have the same quantity number, it must be true that
87 REG expressions with `qty_mode' must be in the hash table for both
88 registers and must be in the same class.
90 The converse is not true. Since hard registers may be referenced in
91 any mode, two REG expressions might be equivalent in the hash table
92 but not have the same quantity number if the quantity number of one
93 of the registers is not the same mode as those expressions.
95 Constants and quantity numbers
97 When a quantity has a known constant value, that value is stored
98 in the appropriate element of qty_const. This is in addition to
99 putting the constant in the hash table as is usual for non-regs.
101 Whether a reg or a constant is preferred is determined by the configuration
102 macro CONST_COSTS and will often depend on the constant value. In any
103 event, expressions containing constants can be simplified, by fold_rtx.
105 When a quantity has a known nearly constant value (such as an address
106 of a stack slot), that value is stored in the appropriate element
109 Integer constants don't have a machine mode. However, cse
110 determines the intended machine mode from the destination
111 of the instruction that moves the constant. The machine mode
112 is recorded in the hash table along with the actual RTL
113 constant expression so that different modes are kept separate.
117 To record known equivalences among expressions in general
118 we use a hash table called `table'. It has a fixed number of buckets
119 that contain chains of `struct table_elt' elements for expressions.
120 These chains connect the elements whose expressions have the same
123 Other chains through the same elements connect the elements which
124 currently have equivalent values.
126 Register references in an expression are canonicalized before hashing
127 the expression. This is done using `reg_qty' and `qty_first_reg'.
128 The hash code of a register reference is computed using the quantity
129 number, not the register number.
131 When the value of an expression changes, it is necessary to remove from the
132 hash table not just that expression but all expressions whose values
133 could be different as a result.
135 1. If the value changing is in memory, except in special cases
136 ANYTHING referring to memory could be changed. That is because
137 nobody knows where a pointer does not point.
138 The function `invalidate_memory' removes what is necessary.
140 The special cases are when the address is constant or is
141 a constant plus a fixed register such as the frame pointer
142 or a static chain pointer. When such addresses are stored in,
143 we can tell exactly which other such addresses must be invalidated
144 due to overlap. `invalidate' does this.
145 All expressions that refer to non-constant
146 memory addresses are also invalidated. `invalidate_memory' does this.
148 2. If the value changing is a register, all expressions
149 containing references to that register, and only those,
152 Because searching the entire hash table for expressions that contain
153 a register is very slow, we try to figure out when it isn't necessary.
154 Precisely, this is necessary only when expressions have been
155 entered in the hash table using this register, and then the value has
156 changed, and then another expression wants to be added to refer to
157 the register's new value. This sequence of circumstances is rare
158 within any one basic block.
160 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
161 reg_tick[i] is incremented whenever a value is stored in register i.
162 reg_in_table[i] holds -1 if no references to register i have been
163 entered in the table; otherwise, it contains the value reg_tick[i] had
164 when the references were entered. If we want to enter a reference
165 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
166 Until we want to enter a new entry, the mere fact that the two vectors
167 don't match makes the entries be ignored if anyone tries to match them.
169 Registers themselves are entered in the hash table as well as in
170 the equivalent-register chains. However, the vectors `reg_tick'
171 and `reg_in_table' do not apply to expressions which are simple
172 register references. These expressions are removed from the table
173 immediately when they become invalid, and this can be done even if
174 we do not immediately search for all the expressions that refer to
177 A CLOBBER rtx in an instruction invalidates its operand for further
178 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
179 invalidates everything that resides in memory.
183 Constant expressions that differ only by an additive integer
184 are called related. When a constant expression is put in
185 the table, the related expression with no constant term
186 is also entered. These are made to point at each other
187 so that it is possible to find out if there exists any
188 register equivalent to an expression related to a given expression. */
190 /* One plus largest register number used in this function. */
194 /* Length of vectors indexed by quantity number.
195 We know in advance we will not need a quantity number this big. */
199 /* Next quantity number to be allocated.
200 This is 1 + the largest number needed so far. */
204 /* Indexed by quantity number, gives the first (or last) (pseudo) register
205 in the chain of registers that currently contain this quantity. */
207 static int *qty_first_reg
;
208 static int *qty_last_reg
;
210 /* Index by quantity number, gives the mode of the quantity. */
212 static enum machine_mode
*qty_mode
;
214 /* Indexed by quantity number, gives the rtx of the constant value of the
215 quantity, or zero if it does not have a known value.
216 A sum of the frame pointer (or arg pointer) plus a constant
217 can also be entered here. */
219 static rtx
*qty_const
;
221 /* Indexed by qty number, gives the insn that stored the constant value
222 recorded in `qty_const'. */
224 static rtx
*qty_const_insn
;
226 /* The next three variables are used to track when a comparison between a
227 quantity and some constant or register has been passed. In that case, we
228 know the results of the comparison in case we see it again. These variables
229 record a comparison that is known to be true. */
231 /* Indexed by qty number, gives the rtx code of a comparison with a known
232 result involving this quantity. If none, it is UNKNOWN. */
233 static enum rtx_code
*qty_comparison_code
;
235 /* Indexed by qty number, gives the constant being compared against in a
236 comparison of known result. If no such comparison, it is undefined.
237 If the comparison is not with a constant, it is zero. */
239 static rtx
*qty_comparison_const
;
241 /* Indexed by qty number, gives the quantity being compared against in a
242 comparison of known result. If no such comparison, if it undefined.
243 If the comparison is not with a register, it is -1. */
245 static int *qty_comparison_qty
;
248 /* For machines that have a CC0, we do not record its value in the hash
249 table since its use is guaranteed to be the insn immediately following
250 its definition and any other insn is presumed to invalidate it.
252 Instead, we store below the value last assigned to CC0. If it should
253 happen to be a constant, it is stored in preference to the actual
254 assigned value. In case it is a constant, we store the mode in which
255 the constant should be interpreted. */
257 static rtx prev_insn_cc0
;
258 static enum machine_mode prev_insn_cc0_mode
;
261 /* Previous actual insn. 0 if at first insn of basic block. */
263 static rtx prev_insn
;
265 /* Insn being scanned. */
267 static rtx this_insn
;
269 /* Index by (pseudo) register number, gives the quantity number
270 of the register's current contents. */
274 /* Index by (pseudo) register number, gives the number of the next (or
275 previous) (pseudo) register in the chain of registers sharing the same
278 Or -1 if this register is at the end of the chain.
280 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
282 static int *reg_next_eqv
;
283 static int *reg_prev_eqv
;
285 /* Index by (pseudo) register number, gives the number of times
286 that register has been altered in the current basic block. */
288 static int *reg_tick
;
290 /* Index by (pseudo) register number, gives the reg_tick value at which
291 rtx's containing this register are valid in the hash table.
292 If this does not equal the current reg_tick value, such expressions
293 existing in the hash table are invalid.
294 If this is -1, no expressions containing this register have been
295 entered in the table. */
297 static int *reg_in_table
;
299 /* A HARD_REG_SET containing all the hard registers for which there is
300 currently a REG expression in the hash table. Note the difference
301 from the above variables, which indicate if the REG is mentioned in some
302 expression in the table. */
304 static HARD_REG_SET hard_regs_in_table
;
306 /* A HARD_REG_SET containing all the hard registers that are invalidated
309 static HARD_REG_SET regs_invalidated_by_call
;
311 /* Two vectors of ints:
312 one containing max_reg -1's; the other max_reg + 500 (an approximation
313 for max_qty) elements where element i contains i.
314 These are used to initialize various other vectors fast. */
316 static int *all_minus_one
;
317 static int *consec_ints
;
319 /* CUID of insn that starts the basic block currently being cse-processed. */
321 static int cse_basic_block_start
;
323 /* CUID of insn that ends the basic block currently being cse-processed. */
325 static int cse_basic_block_end
;
327 /* Vector mapping INSN_UIDs to cuids.
328 The cuids are like uids but increase monotonically always.
329 We use them to see whether a reg is used outside a given basic block. */
331 static int *uid_cuid
;
333 /* Highest UID in UID_CUID. */
336 /* Get the cuid of an insn. */
338 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
340 /* Nonzero if cse has altered conditional jump insns
341 in such a way that jump optimization should be redone. */
343 static int cse_jumps_altered
;
345 /* canon_hash stores 1 in do_not_record
346 if it notices a reference to CC0, PC, or some other volatile
349 static int do_not_record
;
351 #ifdef LOAD_EXTEND_OP
353 /* Scratch rtl used when looking for load-extended copy of a MEM. */
354 static rtx memory_extend_rtx
;
357 /* canon_hash stores 1 in hash_arg_in_memory
358 if it notices a reference to memory within the expression being hashed. */
360 static int hash_arg_in_memory
;
362 /* canon_hash stores 1 in hash_arg_in_struct
363 if it notices a reference to memory that's part of a structure. */
365 static int hash_arg_in_struct
;
367 /* The hash table contains buckets which are chains of `struct table_elt's,
368 each recording one expression's information.
369 That expression is in the `exp' field.
371 Those elements with the same hash code are chained in both directions
372 through the `next_same_hash' and `prev_same_hash' fields.
374 Each set of expressions with equivalent values
375 are on a two-way chain through the `next_same_value'
376 and `prev_same_value' fields, and all point with
377 the `first_same_value' field at the first element in
378 that chain. The chain is in order of increasing cost.
379 Each element's cost value is in its `cost' field.
381 The `in_memory' field is nonzero for elements that
382 involve any reference to memory. These elements are removed
383 whenever a write is done to an unidentified location in memory.
384 To be safe, we assume that a memory address is unidentified unless
385 the address is either a symbol constant or a constant plus
386 the frame pointer or argument pointer.
388 The `in_struct' field is nonzero for elements that
389 involve any reference to memory inside a structure or array.
391 The `related_value' field is used to connect related expressions
392 (that differ by adding an integer).
393 The related expressions are chained in a circular fashion.
394 `related_value' is zero for expressions for which this
397 The `cost' field stores the cost of this element's expression.
399 The `is_const' flag is set if the element is a constant (including
402 The `flag' field is used as a temporary during some search routines.
404 The `mode' field is usually the same as GET_MODE (`exp'), but
405 if `exp' is a CONST_INT and has no machine mode then the `mode'
406 field is the mode it was being used as. Each constant is
407 recorded separately for each mode it is used with. */
413 struct table_elt
*next_same_hash
;
414 struct table_elt
*prev_same_hash
;
415 struct table_elt
*next_same_value
;
416 struct table_elt
*prev_same_value
;
417 struct table_elt
*first_same_value
;
418 struct table_elt
*related_value
;
420 enum machine_mode mode
;
427 /* We don't want a lot of buckets, because we rarely have very many
428 things stored in the hash table, and a lot of buckets slows
429 down a lot of loops that happen frequently. */
432 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
433 register (hard registers may require `do_not_record' to be set). */
436 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
437 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
438 : canon_hash (X, M) % NBUCKETS)
440 /* Determine whether register number N is considered a fixed register for CSE.
441 It is desirable to replace other regs with fixed regs, to reduce need for
443 A reg wins if it is either the frame pointer or designated as fixed,
444 but not if it is an overlapping register. */
445 #ifdef OVERLAPPING_REGNO_P
446 #define FIXED_REGNO_P(N) \
447 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
449 && ! OVERLAPPING_REGNO_P ((N)))
451 #define FIXED_REGNO_P(N) \
452 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
456 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
457 hard registers and pointers into the frame are the cheapest with a cost
458 of 0. Next come pseudos with a cost of one and other hard registers with
459 a cost of 2. Aside from these special cases, call `rtx_cost'. */
461 #define CHEAP_REG(N) \
462 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
463 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
464 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
465 || ((N) < FIRST_PSEUDO_REGISTER \
466 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
469 (GET_CODE (X) == REG \
470 ? (CHEAP_REG (REGNO (X)) ? 0 \
471 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
473 : rtx_cost (X, SET) * 2)
475 /* Determine if the quantity number for register X represents a valid index
476 into the `qty_...' variables. */
478 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
480 static struct table_elt
*table
[NBUCKETS
];
482 /* Chain of `struct table_elt's made so far for this function
483 but currently removed from the table. */
485 static struct table_elt
*free_element_chain
;
487 /* Number of `struct table_elt' structures made so far for this function. */
489 static int n_elements_made
;
491 /* Maximum value `n_elements_made' has had so far in this compilation
492 for functions previously processed. */
494 static int max_elements_made
;
496 /* Surviving equivalence class when two equivalence classes are merged
497 by recording the effects of a jump in the last insn. Zero if the
498 last insn was not a conditional jump. */
500 static struct table_elt
*last_jump_equiv_class
;
502 /* Set to the cost of a constant pool reference if one was found for a
503 symbolic constant. If this was found, it means we should try to
504 convert constants into constant pool entries if they don't fit in
507 static int constant_pool_entries_cost
;
509 /* Bits describing what kind of values in memory must be invalidated
510 for a particular instruction. If all three bits are zero,
511 no memory refs need to be invalidated. Each bit is more powerful
512 than the preceding ones, and if a bit is set then the preceding
515 Here is how the bits are set:
516 Pushing onto the stack invalidates only the stack pointer,
517 writing at a fixed address invalidates only variable addresses,
518 writing in a structure element at variable address
519 invalidates all but scalar variables,
520 and writing in anything else at variable address invalidates everything. */
524 int sp
: 1; /* Invalidate stack pointer. */
525 int var
: 1; /* Invalidate variable addresses. */
526 int nonscalar
: 1; /* Invalidate all but scalar variables. */
527 int all
: 1; /* Invalidate all memory refs. */
530 /* Define maximum length of a branch path. */
532 #define PATHLENGTH 10
534 /* This data describes a block that will be processed by cse_basic_block. */
536 struct cse_basic_block_data
{
537 /* Lowest CUID value of insns in block. */
539 /* Highest CUID value of insns in block. */
541 /* Total number of SETs in block. */
543 /* Last insn in the block. */
545 /* Size of current branch path, if any. */
547 /* Current branch path, indicating which branches will be taken. */
549 /* The branch insn. */
551 /* Whether it should be taken or not. AROUND is the same as taken
552 except that it is used when the destination label is not preceded
554 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
558 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
559 virtual regs here because the simplify_*_operation routines are called
560 by integrate.c, which is called before virtual register instantiation. */
562 #define FIXED_BASE_PLUS_P(X) \
563 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
564 || (X) == arg_pointer_rtx \
565 || (X) == virtual_stack_vars_rtx \
566 || (X) == virtual_incoming_args_rtx \
567 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
568 && (XEXP (X, 0) == frame_pointer_rtx \
569 || XEXP (X, 0) == hard_frame_pointer_rtx \
570 || XEXP (X, 0) == arg_pointer_rtx \
571 || XEXP (X, 0) == virtual_stack_vars_rtx \
572 || XEXP (X, 0) == virtual_incoming_args_rtx)))
574 /* Similar, but also allows reference to the stack pointer.
576 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
577 arg_pointer_rtx by itself is nonzero, because on at least one machine,
578 the i960, the arg pointer is zero when it is unused. */
580 #define NONZERO_BASE_PLUS_P(X) \
581 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
582 || (X) == virtual_stack_vars_rtx \
583 || (X) == virtual_incoming_args_rtx \
584 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
585 && (XEXP (X, 0) == frame_pointer_rtx \
586 || XEXP (X, 0) == hard_frame_pointer_rtx \
587 || XEXP (X, 0) == arg_pointer_rtx \
588 || XEXP (X, 0) == virtual_stack_vars_rtx \
589 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
590 || (X) == stack_pointer_rtx \
591 || (X) == virtual_stack_dynamic_rtx \
592 || (X) == virtual_outgoing_args_rtx \
593 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
594 && (XEXP (X, 0) == stack_pointer_rtx \
595 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
596 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
598 static void new_basic_block
PROTO((void));
599 static void make_new_qty
PROTO((int));
600 static void make_regs_eqv
PROTO((int, int));
601 static void delete_reg_equiv
PROTO((int));
602 static int mention_regs
PROTO((rtx
));
603 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
604 static void free_element
PROTO((struct table_elt
*));
605 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
606 static struct table_elt
*get_element
PROTO((void));
607 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
608 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
609 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
610 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
612 static void merge_equiv_classes
PROTO((struct table_elt
*,
613 struct table_elt
*));
614 static void invalidate
PROTO((rtx
));
615 static void remove_invalid_refs
PROTO((int));
616 static void rehash_using_reg
PROTO((rtx
));
617 static void invalidate_memory
PROTO((struct write_data
*));
618 static void invalidate_for_call
PROTO((void));
619 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
620 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
621 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
622 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
623 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
626 static int refers_to_p
PROTO((rtx
, rtx
));
627 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
629 static int cse_rtx_addr_varies_p
PROTO((rtx
));
630 static rtx canon_reg
PROTO((rtx
, rtx
));
631 static void find_best_addr
PROTO((rtx
, rtx
*));
632 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
634 enum machine_mode
*));
635 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
637 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
639 static rtx fold_rtx
PROTO((rtx
, rtx
));
640 static rtx equiv_constant
PROTO((rtx
));
641 static void record_jump_equiv
PROTO((rtx
, int));
642 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
644 static void cse_insn
PROTO((rtx
, int));
645 static void note_mem_written
PROTO((rtx
, struct write_data
*));
646 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
647 static rtx cse_process_notes
PROTO((rtx
, rtx
));
648 static void cse_around_loop
PROTO((rtx
));
649 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
650 static void invalidate_skipped_block
PROTO((rtx
));
651 static void cse_check_loop_start
PROTO((rtx
, rtx
));
652 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
653 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
654 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
656 extern int rtx_equal_function_value_matters
;
658 /* Return an estimate of the cost of computing rtx X.
659 One use is in cse, to decide which expression to keep in the hash table.
660 Another is in rtl generation, to pick the cheapest way to multiply.
661 Other uses like the latter are expected in the future. */
663 /* Return the right cost to give to an operation
664 to make the cost of the corresponding register-to-register instruction
665 N times that of a fast register-to-register instruction. */
667 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
670 rtx_cost (x
, outer_code
)
672 enum rtx_code outer_code
;
675 register enum rtx_code code
;
682 /* Compute the default costs of certain things.
683 Note that RTX_COSTS can override the defaults. */
689 /* Count multiplication by 2**n as a shift,
690 because if we are considering it, we would output it as a shift. */
691 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
692 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
695 total
= COSTS_N_INSNS (5);
701 total
= COSTS_N_INSNS (7);
704 /* Used in loop.c and combine.c as a marker. */
708 /* We don't want these to be used in substitutions because
709 we have no way of validating the resulting insn. So assign
710 anything containing an ASM_OPERANDS a very high cost. */
720 return ! CHEAP_REG (REGNO (x
));
723 /* If we can't tie these modes, make this expensive. The larger
724 the mode, the more expensive it is. */
725 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
726 return COSTS_N_INSNS (2
727 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
730 RTX_COSTS (x
, code
, outer_code
);
732 CONST_COSTS (x
, code
, outer_code
);
735 /* Sum the costs of the sub-rtx's, plus cost of this operation,
736 which is already in total. */
738 fmt
= GET_RTX_FORMAT (code
);
739 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
741 total
+= rtx_cost (XEXP (x
, i
), code
);
742 else if (fmt
[i
] == 'E')
743 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
744 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
749 /* Clear the hash table and initialize each register with its own quantity,
750 for a new basic block. */
759 bzero (reg_tick
, max_reg
* sizeof (int));
761 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
762 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
763 CLEAR_HARD_REG_SET (hard_regs_in_table
);
765 /* The per-quantity values used to be initialized here, but it is
766 much faster to initialize each as it is made in `make_new_qty'. */
768 for (i
= 0; i
< NBUCKETS
; i
++)
770 register struct table_elt
*this, *next
;
771 for (this = table
[i
]; this; this = next
)
773 next
= this->next_same_hash
;
778 bzero (table
, sizeof table
);
787 /* Say that register REG contains a quantity not in any register before
788 and initialize that quantity. */
796 if (next_qty
>= max_qty
)
799 q
= reg_qty
[reg
] = next_qty
++;
800 qty_first_reg
[q
] = reg
;
801 qty_last_reg
[q
] = reg
;
802 qty_const
[q
] = qty_const_insn
[q
] = 0;
803 qty_comparison_code
[q
] = UNKNOWN
;
805 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
808 /* Make reg NEW equivalent to reg OLD.
809 OLD is not changing; NEW is. */
812 make_regs_eqv (new, old
)
813 register int new, old
;
815 register int lastr
, firstr
;
816 register int q
= reg_qty
[old
];
818 /* Nothing should become eqv until it has a "non-invalid" qty number. */
819 if (! REGNO_QTY_VALID_P (old
))
823 firstr
= qty_first_reg
[q
];
824 lastr
= qty_last_reg
[q
];
826 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
827 hard regs. Among pseudos, if NEW will live longer than any other reg
828 of the same qty, and that is beyond the current basic block,
829 make it the new canonical replacement for this qty. */
830 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
831 /* Certain fixed registers might be of the class NO_REGS. This means
832 that not only can they not be allocated by the compiler, but
833 they cannot be used in substitutions or canonicalizations
835 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
836 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
837 || (new >= FIRST_PSEUDO_REGISTER
838 && (firstr
< FIRST_PSEUDO_REGISTER
839 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
840 || (uid_cuid
[regno_first_uid
[new]]
841 < cse_basic_block_start
))
842 && (uid_cuid
[regno_last_uid
[new]]
843 > uid_cuid
[regno_last_uid
[firstr
]]))))))
845 reg_prev_eqv
[firstr
] = new;
846 reg_next_eqv
[new] = firstr
;
847 reg_prev_eqv
[new] = -1;
848 qty_first_reg
[q
] = new;
852 /* If NEW is a hard reg (known to be non-fixed), insert at end.
853 Otherwise, insert before any non-fixed hard regs that are at the
854 end. Registers of class NO_REGS cannot be used as an
855 equivalent for anything. */
856 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
857 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
858 && new >= FIRST_PSEUDO_REGISTER
)
859 lastr
= reg_prev_eqv
[lastr
];
860 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
861 if (reg_next_eqv
[lastr
] >= 0)
862 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
864 qty_last_reg
[q
] = new;
865 reg_next_eqv
[lastr
] = new;
866 reg_prev_eqv
[new] = lastr
;
870 /* Remove REG from its equivalence class. */
873 delete_reg_equiv (reg
)
876 register int q
= reg_qty
[reg
];
879 /* If invalid, do nothing. */
883 p
= reg_prev_eqv
[reg
];
884 n
= reg_next_eqv
[reg
];
893 qty_first_reg
[q
] = n
;
898 /* Remove any invalid expressions from the hash table
899 that refer to any of the registers contained in expression X.
901 Make sure that newly inserted references to those registers
902 as subexpressions will be considered valid.
904 mention_regs is not called when a register itself
905 is being stored in the table.
907 Return 1 if we have done something that may have changed the hash code
914 register enum rtx_code code
;
917 register int changed
= 0;
925 register int regno
= REGNO (x
);
926 register int endregno
927 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
928 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
931 for (i
= regno
; i
< endregno
; i
++)
933 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
934 remove_invalid_refs (i
);
936 reg_in_table
[i
] = reg_tick
[i
];
942 /* If X is a comparison or a COMPARE and either operand is a register
943 that does not have a quantity, give it one. This is so that a later
944 call to record_jump_equiv won't cause X to be assigned a different
945 hash code and not found in the table after that call.
947 It is not necessary to do this here, since rehash_using_reg can
948 fix up the table later, but doing this here eliminates the need to
949 call that expensive function in the most common case where the only
950 use of the register is in the comparison. */
952 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
954 if (GET_CODE (XEXP (x
, 0)) == REG
955 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
956 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
958 rehash_using_reg (XEXP (x
, 0));
962 if (GET_CODE (XEXP (x
, 1)) == REG
963 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
964 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
966 rehash_using_reg (XEXP (x
, 1));
971 fmt
= GET_RTX_FORMAT (code
);
972 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
974 changed
|= mention_regs (XEXP (x
, i
));
975 else if (fmt
[i
] == 'E')
976 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
977 changed
|= mention_regs (XVECEXP (x
, i
, j
));
982 /* Update the register quantities for inserting X into the hash table
983 with a value equivalent to CLASSP.
984 (If the class does not contain a REG, it is irrelevant.)
985 If MODIFIED is nonzero, X is a destination; it is being modified.
986 Note that delete_reg_equiv should be called on a register
987 before insert_regs is done on that register with MODIFIED != 0.
989 Nonzero value means that elements of reg_qty have changed
990 so X's hash code may be different. */
993 insert_regs (x
, classp
, modified
)
995 struct table_elt
*classp
;
998 if (GET_CODE (x
) == REG
)
1000 register int regno
= REGNO (x
);
1002 /* If REGNO is in the equivalence table already but is of the
1003 wrong mode for that equivalence, don't do anything here. */
1005 if (REGNO_QTY_VALID_P (regno
)
1006 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1009 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1012 for (classp
= classp
->first_same_value
;
1014 classp
= classp
->next_same_value
)
1015 if (GET_CODE (classp
->exp
) == REG
1016 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1018 make_regs_eqv (regno
, REGNO (classp
->exp
));
1022 make_new_qty (regno
);
1023 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1030 /* If X is a SUBREG, we will likely be inserting the inner register in the
1031 table. If that register doesn't have an assigned quantity number at
1032 this point but does later, the insertion that we will be doing now will
1033 not be accessible because its hash code will have changed. So assign
1034 a quantity number now. */
1036 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1037 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1039 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1040 mention_regs (SUBREG_REG (x
));
1044 return mention_regs (x
);
1047 /* Look in or update the hash table. */
1049 /* Put the element ELT on the list of free elements. */
1053 struct table_elt
*elt
;
1055 elt
->next_same_hash
= free_element_chain
;
1056 free_element_chain
= elt
;
1059 /* Return an element that is free for use. */
1061 static struct table_elt
*
1064 struct table_elt
*elt
= free_element_chain
;
1067 free_element_chain
= elt
->next_same_hash
;
1071 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1074 /* Remove table element ELT from use in the table.
1075 HASH is its hash code, made using the HASH macro.
1076 It's an argument because often that is known in advance
1077 and we save much time not recomputing it. */
1080 remove_from_table (elt
, hash
)
1081 register struct table_elt
*elt
;
1087 /* Mark this element as removed. See cse_insn. */
1088 elt
->first_same_value
= 0;
1090 /* Remove the table element from its equivalence class. */
1093 register struct table_elt
*prev
= elt
->prev_same_value
;
1094 register struct table_elt
*next
= elt
->next_same_value
;
1096 if (next
) next
->prev_same_value
= prev
;
1099 prev
->next_same_value
= next
;
1102 register struct table_elt
*newfirst
= next
;
1105 next
->first_same_value
= newfirst
;
1106 next
= next
->next_same_value
;
1111 /* Remove the table element from its hash bucket. */
1114 register struct table_elt
*prev
= elt
->prev_same_hash
;
1115 register struct table_elt
*next
= elt
->next_same_hash
;
1117 if (next
) next
->prev_same_hash
= prev
;
1120 prev
->next_same_hash
= next
;
1121 else if (table
[hash
] == elt
)
1125 /* This entry is not in the proper hash bucket. This can happen
1126 when two classes were merged by `merge_equiv_classes'. Search
1127 for the hash bucket that it heads. This happens only very
1128 rarely, so the cost is acceptable. */
1129 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1130 if (table
[hash
] == elt
)
1135 /* Remove the table element from its related-value circular chain. */
1137 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1139 register struct table_elt
*p
= elt
->related_value
;
1140 while (p
->related_value
!= elt
)
1141 p
= p
->related_value
;
1142 p
->related_value
= elt
->related_value
;
1143 if (p
->related_value
== p
)
1144 p
->related_value
= 0;
1150 /* Look up X in the hash table and return its table element,
1151 or 0 if X is not in the table.
1153 MODE is the machine-mode of X, or if X is an integer constant
1154 with VOIDmode then MODE is the mode with which X will be used.
1156 Here we are satisfied to find an expression whose tree structure
1159 static struct table_elt
*
1160 lookup (x
, hash
, mode
)
1163 enum machine_mode mode
;
1165 register struct table_elt
*p
;
1167 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1168 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1169 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1175 /* Like `lookup' but don't care whether the table element uses invalid regs.
1176 Also ignore discrepancies in the machine mode of a register. */
1178 static struct table_elt
*
1179 lookup_for_remove (x
, hash
, mode
)
1182 enum machine_mode mode
;
1184 register struct table_elt
*p
;
1186 if (GET_CODE (x
) == REG
)
1188 int regno
= REGNO (x
);
1189 /* Don't check the machine mode when comparing registers;
1190 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1191 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1192 if (GET_CODE (p
->exp
) == REG
1193 && REGNO (p
->exp
) == regno
)
1198 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1199 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1206 /* Look for an expression equivalent to X and with code CODE.
1207 If one is found, return that expression. */
1210 lookup_as_function (x
, code
)
1214 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1219 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1221 if (GET_CODE (p
->exp
) == code
1222 /* Make sure this is a valid entry in the table. */
1223 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1230 /* Insert X in the hash table, assuming HASH is its hash code
1231 and CLASSP is an element of the class it should go in
1232 (or 0 if a new class should be made).
1233 It is inserted at the proper position to keep the class in
1234 the order cheapest first.
1236 MODE is the machine-mode of X, or if X is an integer constant
1237 with VOIDmode then MODE is the mode with which X will be used.
1239 For elements of equal cheapness, the most recent one
1240 goes in front, except that the first element in the list
1241 remains first unless a cheaper element is added. The order of
1242 pseudo-registers does not matter, as canon_reg will be called to
1243 find the cheapest when a register is retrieved from the table.
1245 The in_memory field in the hash table element is set to 0.
1246 The caller must set it nonzero if appropriate.
1248 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1249 and if insert_regs returns a nonzero value
1250 you must then recompute its hash code before calling here.
1252 If necessary, update table showing constant values of quantities. */
1254 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1256 static struct table_elt
*
1257 insert (x
, classp
, hash
, mode
)
1259 register struct table_elt
*classp
;
1261 enum machine_mode mode
;
1263 register struct table_elt
*elt
;
1265 /* If X is a register and we haven't made a quantity for it,
1266 something is wrong. */
1267 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1270 /* If X is a hard register, show it is being put in the table. */
1271 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1273 int regno
= REGNO (x
);
1274 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1277 for (i
= regno
; i
< endregno
; i
++)
1278 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1282 /* Put an element for X into the right hash bucket. */
1284 elt
= get_element ();
1286 elt
->cost
= COST (x
);
1287 elt
->next_same_value
= 0;
1288 elt
->prev_same_value
= 0;
1289 elt
->next_same_hash
= table
[hash
];
1290 elt
->prev_same_hash
= 0;
1291 elt
->related_value
= 0;
1294 elt
->is_const
= (CONSTANT_P (x
)
1295 /* GNU C++ takes advantage of this for `this'
1296 (and other const values). */
1297 || (RTX_UNCHANGING_P (x
)
1298 && GET_CODE (x
) == REG
1299 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1300 || FIXED_BASE_PLUS_P (x
));
1303 table
[hash
]->prev_same_hash
= elt
;
1306 /* Put it into the proper value-class. */
1309 classp
= classp
->first_same_value
;
1310 if (CHEAPER (elt
, classp
))
1311 /* Insert at the head of the class */
1313 register struct table_elt
*p
;
1314 elt
->next_same_value
= classp
;
1315 classp
->prev_same_value
= elt
;
1316 elt
->first_same_value
= elt
;
1318 for (p
= classp
; p
; p
= p
->next_same_value
)
1319 p
->first_same_value
= elt
;
1323 /* Insert not at head of the class. */
1324 /* Put it after the last element cheaper than X. */
1325 register struct table_elt
*p
, *next
;
1326 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1328 /* Put it after P and before NEXT. */
1329 elt
->next_same_value
= next
;
1331 next
->prev_same_value
= elt
;
1332 elt
->prev_same_value
= p
;
1333 p
->next_same_value
= elt
;
1334 elt
->first_same_value
= classp
;
1338 elt
->first_same_value
= elt
;
1340 /* If this is a constant being set equivalent to a register or a register
1341 being set equivalent to a constant, note the constant equivalence.
1343 If this is a constant, it cannot be equivalent to a different constant,
1344 and a constant is the only thing that can be cheaper than a register. So
1345 we know the register is the head of the class (before the constant was
1348 If this is a register that is not already known equivalent to a
1349 constant, we must check the entire class.
1351 If this is a register that is already known equivalent to an insn,
1352 update `qty_const_insn' to show that `this_insn' is the latest
1353 insn making that quantity equivalent to the constant. */
1355 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1357 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1358 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1359 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1362 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1364 register struct table_elt
*p
;
1366 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1370 qty_const
[reg_qty
[REGNO (x
)]]
1371 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1372 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1378 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1379 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1380 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1382 /* If this is a constant with symbolic value,
1383 and it has a term with an explicit integer value,
1384 link it up with related expressions. */
1385 if (GET_CODE (x
) == CONST
)
1387 rtx subexp
= get_related_value (x
);
1389 struct table_elt
*subelt
, *subelt_prev
;
1393 /* Get the integer-free subexpression in the hash table. */
1394 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1395 subelt
= lookup (subexp
, subhash
, mode
);
1397 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1398 /* Initialize SUBELT's circular chain if it has none. */
1399 if (subelt
->related_value
== 0)
1400 subelt
->related_value
= subelt
;
1401 /* Find the element in the circular chain that precedes SUBELT. */
1402 subelt_prev
= subelt
;
1403 while (subelt_prev
->related_value
!= subelt
)
1404 subelt_prev
= subelt_prev
->related_value
;
1405 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1406 This way the element that follows SUBELT is the oldest one. */
1407 elt
->related_value
= subelt_prev
->related_value
;
1408 subelt_prev
->related_value
= elt
;
1415 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1416 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1417 the two classes equivalent.
1419 CLASS1 will be the surviving class; CLASS2 should not be used after this
1422 Any invalid entries in CLASS2 will not be copied. */
1425 merge_equiv_classes (class1
, class2
)
1426 struct table_elt
*class1
, *class2
;
1428 struct table_elt
*elt
, *next
, *new;
1430 /* Ensure we start with the head of the classes. */
1431 class1
= class1
->first_same_value
;
1432 class2
= class2
->first_same_value
;
1434 /* If they were already equal, forget it. */
1435 if (class1
== class2
)
1438 for (elt
= class2
; elt
; elt
= next
)
1442 enum machine_mode mode
= elt
->mode
;
1444 next
= elt
->next_same_value
;
1446 /* Remove old entry, make a new one in CLASS1's class.
1447 Don't do this for invalid entries as we cannot find their
1448 hash code (it also isn't necessary). */
1449 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1451 hash_arg_in_memory
= 0;
1452 hash_arg_in_struct
= 0;
1453 hash
= HASH (exp
, mode
);
1455 if (GET_CODE (exp
) == REG
)
1456 delete_reg_equiv (REGNO (exp
));
1458 remove_from_table (elt
, hash
);
1460 if (insert_regs (exp
, class1
, 0))
1461 hash
= HASH (exp
, mode
);
1462 new = insert (exp
, class1
, hash
, mode
);
1463 new->in_memory
= hash_arg_in_memory
;
1464 new->in_struct
= hash_arg_in_struct
;
1469 /* Remove from the hash table, or mark as invalid,
1470 all expressions whose values could be altered by storing in X.
1471 X is a register, a subreg, or a memory reference with nonvarying address
1472 (because, when a memory reference with a varying address is stored in,
1473 all memory references are removed by invalidate_memory
1474 so specific invalidation is superfluous).
1476 A nonvarying address may be just a register or just
1477 a symbol reference, or it may be either of those plus
1478 a numeric offset. */
1485 register struct table_elt
*p
;
1487 HOST_WIDE_INT start
, end
;
1489 /* If X is a register, dependencies on its contents
1490 are recorded through the qty number mechanism.
1491 Just change the qty number of the register,
1492 mark it as invalid for expressions that refer to it,
1493 and remove it itself. */
1495 if (GET_CODE (x
) == REG
)
1497 register int regno
= REGNO (x
);
1498 register unsigned hash
= HASH (x
, GET_MODE (x
));
1500 /* Remove REGNO from any quantity list it might be on and indicate
1501 that it's value might have changed. If it is a pseudo, remove its
1502 entry from the hash table.
1504 For a hard register, we do the first two actions above for any
1505 additional hard registers corresponding to X. Then, if any of these
1506 registers are in the table, we must remove any REG entries that
1507 overlap these registers. */
1509 delete_reg_equiv (regno
);
1512 if (regno
>= FIRST_PSEUDO_REGISTER
)
1513 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1516 HOST_WIDE_INT in_table
1517 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1518 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1519 int tregno
, tendregno
;
1520 register struct table_elt
*p
, *next
;
1522 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1524 for (i
= regno
+ 1; i
< endregno
; i
++)
1526 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1527 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1528 delete_reg_equiv (i
);
1533 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1534 for (p
= table
[hash
]; p
; p
= next
)
1536 next
= p
->next_same_hash
;
1538 if (GET_CODE (p
->exp
) != REG
1539 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1542 tregno
= REGNO (p
->exp
);
1544 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1545 if (tendregno
> regno
&& tregno
< endregno
)
1546 remove_from_table (p
, hash
);
1553 if (GET_CODE (x
) == SUBREG
)
1555 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1557 invalidate (SUBREG_REG (x
));
1561 /* X is not a register; it must be a memory reference with
1562 a nonvarying address. Remove all hash table elements
1563 that refer to overlapping pieces of memory. */
1565 if (GET_CODE (x
) != MEM
)
1568 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (GET_MODE (x
)),
1569 &base
, &start
, &end
);
1571 for (i
= 0; i
< NBUCKETS
; i
++)
1573 register struct table_elt
*next
;
1574 for (p
= table
[i
]; p
; p
= next
)
1576 next
= p
->next_same_hash
;
1577 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1578 remove_from_table (p
, i
);
1583 /* Remove all expressions that refer to register REGNO,
1584 since they are already invalid, and we are about to
1585 mark that register valid again and don't want the old
1586 expressions to reappear as valid. */
1589 remove_invalid_refs (regno
)
1593 register struct table_elt
*p
, *next
;
1595 for (i
= 0; i
< NBUCKETS
; i
++)
1596 for (p
= table
[i
]; p
; p
= next
)
1598 next
= p
->next_same_hash
;
1599 if (GET_CODE (p
->exp
) != REG
1600 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1601 remove_from_table (p
, i
);
1605 /* Recompute the hash codes of any valid entries in the hash table that
1606 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1608 This is called when we make a jump equivalence. */
1611 rehash_using_reg (x
)
1615 struct table_elt
*p
, *next
;
1618 if (GET_CODE (x
) == SUBREG
)
1621 /* If X is not a register or if the register is known not to be in any
1622 valid entries in the table, we have no work to do. */
1624 if (GET_CODE (x
) != REG
1625 || reg_in_table
[REGNO (x
)] < 0
1626 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1629 /* Scan all hash chains looking for valid entries that mention X.
1630 If we find one and it is in the wrong hash chain, move it. We can skip
1631 objects that are registers, since they are handled specially. */
1633 for (i
= 0; i
< NBUCKETS
; i
++)
1634 for (p
= table
[i
]; p
; p
= next
)
1636 next
= p
->next_same_hash
;
1637 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1638 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1639 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1641 if (p
->next_same_hash
)
1642 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1644 if (p
->prev_same_hash
)
1645 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1647 table
[i
] = p
->next_same_hash
;
1649 p
->next_same_hash
= table
[hash
];
1650 p
->prev_same_hash
= 0;
1652 table
[hash
]->prev_same_hash
= p
;
1658 /* Remove from the hash table all expressions that reference memory,
1659 or some of them as specified by *WRITES. */
1662 invalidate_memory (writes
)
1663 struct write_data
*writes
;
1666 register struct table_elt
*p
, *next
;
1667 int all
= writes
->all
;
1668 int nonscalar
= writes
->nonscalar
;
1670 for (i
= 0; i
< NBUCKETS
; i
++)
1671 for (p
= table
[i
]; p
; p
= next
)
1673 next
= p
->next_same_hash
;
1676 || (nonscalar
&& p
->in_struct
)
1677 || cse_rtx_addr_varies_p (p
->exp
)))
1678 remove_from_table (p
, i
);
1682 /* Remove from the hash table any expression that is a call-clobbered
1683 register. Also update their TICK values. */
1686 invalidate_for_call ()
1688 int regno
, endregno
;
1691 struct table_elt
*p
, *next
;
1694 /* Go through all the hard registers. For each that is clobbered in
1695 a CALL_INSN, remove the register from quantity chains and update
1696 reg_tick if defined. Also see if any of these registers is currently
1699 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1700 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1702 delete_reg_equiv (regno
);
1703 if (reg_tick
[regno
] >= 0)
1706 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1709 /* In the case where we have no call-clobbered hard registers in the
1710 table, we are done. Otherwise, scan the table and remove any
1711 entry that overlaps a call-clobbered register. */
1714 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1715 for (p
= table
[hash
]; p
; p
= next
)
1717 next
= p
->next_same_hash
;
1719 if (GET_CODE (p
->exp
) != REG
1720 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1723 regno
= REGNO (p
->exp
);
1724 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1726 for (i
= regno
; i
< endregno
; i
++)
1727 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1729 remove_from_table (p
, hash
);
1735 /* Given an expression X of type CONST,
1736 and ELT which is its table entry (or 0 if it
1737 is not in the hash table),
1738 return an alternate expression for X as a register plus integer.
1739 If none can be found, return 0. */
1742 use_related_value (x
, elt
)
1744 struct table_elt
*elt
;
1746 register struct table_elt
*relt
= 0;
1747 register struct table_elt
*p
, *q
;
1748 HOST_WIDE_INT offset
;
1750 /* First, is there anything related known?
1751 If we have a table element, we can tell from that.
1752 Otherwise, must look it up. */
1754 if (elt
!= 0 && elt
->related_value
!= 0)
1756 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1758 rtx subexp
= get_related_value (x
);
1760 relt
= lookup (subexp
,
1761 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1768 /* Search all related table entries for one that has an
1769 equivalent register. */
1774 /* This loop is strange in that it is executed in two different cases.
1775 The first is when X is already in the table. Then it is searching
1776 the RELATED_VALUE list of X's class (RELT). The second case is when
1777 X is not in the table. Then RELT points to a class for the related
1780 Ensure that, whatever case we are in, that we ignore classes that have
1781 the same value as X. */
1783 if (rtx_equal_p (x
, p
->exp
))
1786 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1787 if (GET_CODE (q
->exp
) == REG
)
1793 p
= p
->related_value
;
1795 /* We went all the way around, so there is nothing to be found.
1796 Alternatively, perhaps RELT was in the table for some other reason
1797 and it has no related values recorded. */
1798 if (p
== relt
|| p
== 0)
1805 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1806 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1807 return plus_constant (q
->exp
, offset
);
1810 /* Hash an rtx. We are careful to make sure the value is never negative.
1811 Equivalent registers hash identically.
1812 MODE is used in hashing for CONST_INTs only;
1813 otherwise the mode of X is used.
1815 Store 1 in do_not_record if any subexpression is volatile.
1817 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1818 which does not have the RTX_UNCHANGING_P bit set.
1819 In this case, also store 1 in hash_arg_in_struct
1820 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1822 Note that cse_insn knows that the hash code of a MEM expression
1823 is just (int) MEM plus the hash code of the address. */
1826 canon_hash (x
, mode
)
1828 enum machine_mode mode
;
1831 register unsigned hash
= 0;
1832 register enum rtx_code code
;
1835 /* repeat is used to turn tail-recursion into iteration. */
1840 code
= GET_CODE (x
);
1845 register int regno
= REGNO (x
);
1847 /* On some machines, we can't record any non-fixed hard register,
1848 because extending its life will cause reload problems. We
1849 consider ap, fp, and sp to be fixed for this purpose.
1850 On all machines, we can't record any global registers. */
1852 if (regno
< FIRST_PSEUDO_REGISTER
1853 && (global_regs
[regno
]
1854 #ifdef SMALL_REGISTER_CLASSES
1855 || (! fixed_regs
[regno
]
1856 && regno
!= FRAME_POINTER_REGNUM
1857 && regno
!= HARD_FRAME_POINTER_REGNUM
1858 && regno
!= ARG_POINTER_REGNUM
1859 && regno
!= STACK_POINTER_REGNUM
)
1866 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1872 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1873 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1878 /* This is like the general case, except that it only counts
1879 the integers representing the constant. */
1880 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1881 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1883 unsigned tem
= XINT (x
, i
);
1888 /* Assume there is only one rtx object for any given label. */
1891 += ((unsigned) LABEL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XEXP (x
, 0);
1896 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XEXP (x
, 0);
1900 if (MEM_VOLATILE_P (x
))
1905 if (! RTX_UNCHANGING_P (x
))
1907 hash_arg_in_memory
= 1;
1908 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1910 /* Now that we have already found this special case,
1911 might as well speed it up as much as possible. */
1912 hash
+= (unsigned) MEM
;
1923 case UNSPEC_VOLATILE
:
1928 if (MEM_VOLATILE_P (x
))
1935 i
= GET_RTX_LENGTH (code
) - 1;
1936 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1937 fmt
= GET_RTX_FORMAT (code
);
1942 rtx tem
= XEXP (x
, i
);
1945 /* If the operand is a REG that is equivalent to a constant, hash
1946 as if we were hashing the constant, since we will be comparing
1948 if (tem
!= 0 && GET_CODE (tem
) == REG
1949 && REGNO_QTY_VALID_P (REGNO (tem
))
1950 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1951 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1952 && CONSTANT_P (tem1
))
1955 /* If we are about to do the last recursive call
1956 needed at this level, change it into iteration.
1957 This function is called enough to be worth it. */
1963 hash
+= canon_hash (tem
, 0);
1965 else if (fmt
[i
] == 'E')
1966 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1967 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1968 else if (fmt
[i
] == 's')
1970 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
1975 else if (fmt
[i
] == 'i')
1977 register unsigned tem
= XINT (x
, i
);
1986 /* Like canon_hash but with no side effects. */
1991 enum machine_mode mode
;
1993 int save_do_not_record
= do_not_record
;
1994 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1995 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1996 unsigned hash
= canon_hash (x
, mode
);
1997 hash_arg_in_memory
= save_hash_arg_in_memory
;
1998 hash_arg_in_struct
= save_hash_arg_in_struct
;
1999 do_not_record
= save_do_not_record
;
2003 /* Return 1 iff X and Y would canonicalize into the same thing,
2004 without actually constructing the canonicalization of either one.
2005 If VALIDATE is nonzero,
2006 we assume X is an expression being processed from the rtl
2007 and Y was found in the hash table. We check register refs
2008 in Y for being marked as valid.
2010 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2011 that is known to be in the register. Ordinarily, we don't allow them
2012 to match, because letting them match would cause unpredictable results
2013 in all the places that search a hash table chain for an equivalent
2014 for a given value. A possible equivalent that has different structure
2015 has its hash code computed from different data. Whether the hash code
2016 is the same as that of the the given value is pure luck. */
2019 exp_equiv_p (x
, y
, validate
, equal_values
)
2025 register enum rtx_code code
;
2028 /* Note: it is incorrect to assume an expression is equivalent to itself
2029 if VALIDATE is nonzero. */
2030 if (x
== y
&& !validate
)
2032 if (x
== 0 || y
== 0)
2035 code
= GET_CODE (x
);
2036 if (code
!= GET_CODE (y
))
2041 /* If X is a constant and Y is a register or vice versa, they may be
2042 equivalent. We only have to validate if Y is a register. */
2043 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2044 && REGNO_QTY_VALID_P (REGNO (y
))
2045 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2046 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2047 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2050 if (CONSTANT_P (y
) && code
== REG
2051 && REGNO_QTY_VALID_P (REGNO (x
))
2052 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2053 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2059 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2060 if (GET_MODE (x
) != GET_MODE (y
))
2070 return INTVAL (x
) == INTVAL (y
);
2074 return XEXP (x
, 0) == XEXP (y
, 0);
2078 int regno
= REGNO (y
);
2080 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2081 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2084 /* If the quantities are not the same, the expressions are not
2085 equivalent. If there are and we are not to validate, they
2086 are equivalent. Otherwise, ensure all regs are up-to-date. */
2088 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2094 for (i
= regno
; i
< endregno
; i
++)
2095 if (reg_in_table
[i
] != reg_tick
[i
])
2101 /* For commutative operations, check both orders. */
2109 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2110 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2111 validate
, equal_values
))
2112 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2113 validate
, equal_values
)
2114 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2115 validate
, equal_values
)));
2118 /* Compare the elements. If any pair of corresponding elements
2119 fail to match, return 0 for the whole things. */
2121 fmt
= GET_RTX_FORMAT (code
);
2122 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2127 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2132 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2134 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2135 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2136 validate
, equal_values
))
2141 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2146 if (XINT (x
, i
) != XINT (y
, i
))
2151 if (XWINT (x
, i
) != XWINT (y
, i
))
2166 /* Return 1 iff any subexpression of X matches Y.
2167 Here we do not require that X or Y be valid (for registers referred to)
2168 for being in the hash table. */
2175 register enum rtx_code code
;
2181 if (x
== 0 || y
== 0)
2184 code
= GET_CODE (x
);
2185 /* If X as a whole has the same code as Y, they may match.
2187 if (code
== GET_CODE (y
))
2189 if (exp_equiv_p (x
, y
, 0, 1))
2193 /* X does not match, so try its subexpressions. */
2195 fmt
= GET_RTX_FORMAT (code
);
2196 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2205 if (refers_to_p (XEXP (x
, i
), y
))
2208 else if (fmt
[i
] == 'E')
2211 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2212 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2219 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2220 set PBASE, PSTART, and PEND which correspond to the base of the address,
2221 the starting offset, and ending offset respectively.
2223 ADDR is known to be a nonvarying address.
2225 cse_address_varies_p returns zero for nonvarying addresses. */
2228 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2232 HOST_WIDE_INT
*pstart
, *pend
;
2241 /* Registers with nonvarying addresses usually have constant equivalents;
2242 but the frame pointer register is also possible. */
2243 if (GET_CODE (base
) == REG
2245 && REGNO_QTY_VALID_P (REGNO (base
))
2246 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2247 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2248 base
= qty_const
[reg_qty
[REGNO (base
)]];
2249 else if (GET_CODE (base
) == PLUS
2250 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2251 && GET_CODE (XEXP (base
, 0)) == REG
2253 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2254 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2255 == GET_MODE (XEXP (base
, 0)))
2256 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2258 start
= INTVAL (XEXP (base
, 1));
2259 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2262 /* By definition, operand1 of a LO_SUM is the associated constant
2263 address. Use the associated constant address as the base instead. */
2264 if (GET_CODE (base
) == LO_SUM
)
2265 base
= XEXP (base
, 1);
2267 /* Strip off CONST. */
2268 if (GET_CODE (base
) == CONST
)
2269 base
= XEXP (base
, 0);
2271 if (GET_CODE (base
) == PLUS
2272 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2274 start
+= INTVAL (XEXP (base
, 1));
2275 base
= XEXP (base
, 0);
2280 /* Set the return values. */
2286 /* Return 1 iff any subexpression of X refers to memory
2287 at an address of BASE plus some offset
2288 such that any of the bytes' offsets fall between START (inclusive)
2289 and END (exclusive).
2291 The value is undefined if X is a varying address (as determined by
2292 cse_rtx_addr_varies_p). This function is not used in such cases.
2294 When used in the cse pass, `qty_const' is nonzero, and it is used
2295 to treat an address that is a register with a known constant value
2296 as if it were that constant value.
2297 In the loop pass, `qty_const' is zero, so this is not done. */
2300 refers_to_mem_p (x
, base
, start
, end
)
2302 HOST_WIDE_INT start
, end
;
2304 register HOST_WIDE_INT i
;
2305 register enum rtx_code code
;
2308 if (GET_CODE (base
) == CONST_INT
)
2310 start
+= INTVAL (base
);
2311 end
+= INTVAL (base
);
2319 code
= GET_CODE (x
);
2322 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2324 HOST_WIDE_INT mystart
, myend
;
2326 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2327 &mybase
, &mystart
, &myend
);
2330 /* refers_to_mem_p is never called with varying addresses.
2331 If the base addresses are not equal, there is no chance
2332 of the memory addresses conflicting. */
2333 if (! rtx_equal_p (mybase
, base
))
2336 return myend
> start
&& mystart
< end
;
2339 /* X does not match, so try its subexpressions. */
2341 fmt
= GET_RTX_FORMAT (code
);
2342 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2351 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2354 else if (fmt
[i
] == 'E')
2357 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2358 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2365 /* Nonzero if X refers to memory at a varying address;
2366 except that a register which has at the moment a known constant value
2367 isn't considered variable. */
2370 cse_rtx_addr_varies_p (x
)
2373 /* We need not check for X and the equivalence class being of the same
2374 mode because if X is equivalent to a constant in some mode, it
2375 doesn't vary in any mode. */
2377 if (GET_CODE (x
) == MEM
2378 && GET_CODE (XEXP (x
, 0)) == REG
2379 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2380 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2381 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2384 if (GET_CODE (x
) == MEM
2385 && GET_CODE (XEXP (x
, 0)) == PLUS
2386 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2387 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2388 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2389 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2390 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2391 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2394 return rtx_addr_varies_p (x
);
2397 /* Canonicalize an expression:
2398 replace each register reference inside it
2399 with the "oldest" equivalent register.
2401 If INSN is non-zero and we are replacing a pseudo with a hard register
2402 or vice versa, validate_change is used to ensure that INSN remains valid
2403 after we make our substitution. The calls are made with IN_GROUP non-zero
2404 so apply_change_group must be called upon the outermost return from this
2405 function (unless INSN is zero). The result of apply_change_group can
2406 generally be discarded since the changes we are making are optional. */
2414 register enum rtx_code code
;
2420 code
= GET_CODE (x
);
2438 /* Never replace a hard reg, because hard regs can appear
2439 in more than one machine mode, and we must preserve the mode
2440 of each occurrence. Also, some hard regs appear in
2441 MEMs that are shared and mustn't be altered. Don't try to
2442 replace any reg that maps to a reg of class NO_REGS. */
2443 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2444 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2447 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2448 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2449 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2450 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2454 fmt
= GET_RTX_FORMAT (code
);
2455 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2461 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2463 /* If replacing pseudo with hard reg or vice versa, ensure the
2464 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2465 if (insn
!= 0 && new != 0
2466 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2467 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2468 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2469 || insn_n_dups
[recog_memoized (insn
)] > 0))
2470 validate_change (insn
, &XEXP (x
, i
), new, 1);
2474 else if (fmt
[i
] == 'E')
2475 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2476 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2482 /* LOC is a location with INSN that is an operand address (the contents of
2483 a MEM). Find the best equivalent address to use that is valid for this
2486 On most CISC machines, complicated address modes are costly, and rtx_cost
2487 is a good approximation for that cost. However, most RISC machines have
2488 only a few (usually only one) memory reference formats. If an address is
2489 valid at all, it is often just as cheap as any other address. Hence, for
2490 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2491 costs of various addresses. For two addresses of equal cost, choose the one
2492 with the highest `rtx_cost' value as that has the potential of eliminating
2493 the most insns. For equal costs, we choose the first in the equivalence
2494 class. Note that we ignore the fact that pseudo registers are cheaper
2495 than hard registers here because we would also prefer the pseudo registers.
2499 find_best_addr (insn
, loc
)
2503 struct table_elt
*elt
, *p
;
2506 int found_better
= 1;
2507 int save_do_not_record
= do_not_record
;
2508 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2509 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2514 /* Do not try to replace constant addresses or addresses of local and
2515 argument slots. These MEM expressions are made only once and inserted
2516 in many instructions, as well as being used to control symbol table
2517 output. It is not safe to clobber them.
2519 There are some uncommon cases where the address is already in a register
2520 for some reason, but we cannot take advantage of that because we have
2521 no easy way to unshare the MEM. In addition, looking up all stack
2522 addresses is costly. */
2523 if ((GET_CODE (addr
) == PLUS
2524 && GET_CODE (XEXP (addr
, 0)) == REG
2525 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2526 && (regno
= REGNO (XEXP (addr
, 0)),
2527 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2528 || regno
== ARG_POINTER_REGNUM
))
2529 || (GET_CODE (addr
) == REG
2530 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2531 || regno
== HARD_FRAME_POINTER_REGNUM
2532 || regno
== ARG_POINTER_REGNUM
))
2533 || CONSTANT_ADDRESS_P (addr
))
2536 /* If this address is not simply a register, try to fold it. This will
2537 sometimes simplify the expression. Many simplifications
2538 will not be valid, but some, usually applying the associative rule, will
2539 be valid and produce better code. */
2540 if (GET_CODE (addr
) != REG
2541 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2544 /* If this address is not in the hash table, we can't look for equivalences
2545 of the whole address. Also, ignore if volatile. */
2548 hash
= HASH (addr
, Pmode
);
2549 addr_volatile
= do_not_record
;
2550 do_not_record
= save_do_not_record
;
2551 hash_arg_in_memory
= save_hash_arg_in_memory
;
2552 hash_arg_in_struct
= save_hash_arg_in_struct
;
2557 elt
= lookup (addr
, hash
, Pmode
);
2559 #ifndef ADDRESS_COST
2562 our_cost
= elt
->cost
;
2564 /* Find the lowest cost below ours that works. */
2565 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2566 if (elt
->cost
< our_cost
2567 && (GET_CODE (elt
->exp
) == REG
2568 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2569 && validate_change (insn
, loc
,
2570 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2577 /* We need to find the best (under the criteria documented above) entry
2578 in the class that is valid. We use the `flag' field to indicate
2579 choices that were invalid and iterate until we can't find a better
2580 one that hasn't already been tried. */
2582 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2585 while (found_better
)
2587 int best_addr_cost
= ADDRESS_COST (*loc
);
2588 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2589 struct table_elt
*best_elt
= elt
;
2592 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2594 && (GET_CODE (p
->exp
) == REG
2595 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2596 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2597 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2598 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2601 best_addr_cost
= ADDRESS_COST (p
->exp
);
2602 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2608 if (validate_change (insn
, loc
,
2609 canon_reg (copy_rtx (best_elt
->exp
),
2618 /* If the address is a binary operation with the first operand a register
2619 and the second a constant, do the same as above, but looking for
2620 equivalences of the register. Then try to simplify before checking for
2621 the best address to use. This catches a few cases: First is when we
2622 have REG+const and the register is another REG+const. We can often merge
2623 the constants and eliminate one insn and one register. It may also be
2624 that a machine has a cheap REG+REG+const. Finally, this improves the
2625 code on the Alpha for unaligned byte stores. */
2627 if (flag_expensive_optimizations
2628 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2629 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2630 && GET_CODE (XEXP (*loc
, 0)) == REG
2631 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2633 rtx c
= XEXP (*loc
, 1);
2636 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2637 do_not_record
= save_do_not_record
;
2638 hash_arg_in_memory
= save_hash_arg_in_memory
;
2639 hash_arg_in_struct
= save_hash_arg_in_struct
;
2641 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2645 /* We need to find the best (under the criteria documented above) entry
2646 in the class that is valid. We use the `flag' field to indicate
2647 choices that were invalid and iterate until we can't find a better
2648 one that hasn't already been tried. */
2650 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2653 while (found_better
)
2655 int best_addr_cost
= ADDRESS_COST (*loc
);
2656 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2657 struct table_elt
*best_elt
= elt
;
2658 rtx best_rtx
= *loc
;
2661 /* This is at worst case an O(n^2) algorithm, so limit our search
2662 to the first 32 elements on the list. This avoids trouble
2663 compiling code with very long basic blocks that can easily
2664 call cse_gen_binary so many times that we run out of memory. */
2667 for (p
= elt
->first_same_value
, count
= 0;
2669 p
= p
->next_same_value
, count
++)
2671 && (GET_CODE (p
->exp
) == REG
2672 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2674 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2676 if ((ADDRESS_COST (new) < best_addr_cost
2677 || (ADDRESS_COST (new) == best_addr_cost
2678 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2681 best_addr_cost
= ADDRESS_COST (new);
2682 best_rtx_cost
= (COST (new) + 1) >> 1;
2690 if (validate_change (insn
, loc
,
2691 canon_reg (copy_rtx (best_rtx
),
2702 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2703 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2704 what values are being compared.
2706 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2707 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2708 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2709 compared to produce cc0.
2711 The return value is the comparison operator and is either the code of
2712 A or the code corresponding to the inverse of the comparison. */
2714 static enum rtx_code
2715 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2718 enum machine_mode
*pmode1
, *pmode2
;
2722 arg1
= *parg1
, arg2
= *parg2
;
2724 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2726 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2728 /* Set non-zero when we find something of interest. */
2730 int reverse_code
= 0;
2731 struct table_elt
*p
= 0;
2733 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2734 On machines with CC0, this is the only case that can occur, since
2735 fold_rtx will return the COMPARE or item being compared with zero
2738 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2741 /* If ARG1 is a comparison operator and CODE is testing for
2742 STORE_FLAG_VALUE, get the inner arguments. */
2744 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2747 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2748 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2749 #ifdef FLOAT_STORE_FLAG_VALUE
2750 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2751 && FLOAT_STORE_FLAG_VALUE
< 0)
2756 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2757 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2758 #ifdef FLOAT_STORE_FLAG_VALUE
2759 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2760 && FLOAT_STORE_FLAG_VALUE
< 0)
2763 x
= arg1
, reverse_code
= 1;
2766 /* ??? We could also check for
2768 (ne (and (eq (...) (const_int 1))) (const_int 0))
2770 and related forms, but let's wait until we see them occurring. */
2773 /* Look up ARG1 in the hash table and see if it has an equivalence
2774 that lets us see what is being compared. */
2775 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2777 if (p
) p
= p
->first_same_value
;
2779 for (; p
; p
= p
->next_same_value
)
2781 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2783 /* If the entry isn't valid, skip it. */
2784 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2787 if (GET_CODE (p
->exp
) == COMPARE
2788 /* Another possibility is that this machine has a compare insn
2789 that includes the comparison code. In that case, ARG1 would
2790 be equivalent to a comparison operation that would set ARG1 to
2791 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2792 ORIG_CODE is the actual comparison being done; if it is an EQ,
2793 we must reverse ORIG_CODE. On machine with a negative value
2794 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2797 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2798 && (GET_MODE_BITSIZE (inner_mode
)
2799 <= HOST_BITS_PER_WIDE_INT
)
2800 && (STORE_FLAG_VALUE
2801 & ((HOST_WIDE_INT
) 1
2802 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2803 #ifdef FLOAT_STORE_FLAG_VALUE
2805 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2806 && FLOAT_STORE_FLAG_VALUE
< 0)
2809 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2814 else if ((code
== EQ
2816 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2817 && (GET_MODE_BITSIZE (inner_mode
)
2818 <= HOST_BITS_PER_WIDE_INT
)
2819 && (STORE_FLAG_VALUE
2820 & ((HOST_WIDE_INT
) 1
2821 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2822 #ifdef FLOAT_STORE_FLAG_VALUE
2824 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2825 && FLOAT_STORE_FLAG_VALUE
< 0)
2828 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2835 /* If this is fp + constant, the equivalent is a better operand since
2836 it may let us predict the value of the comparison. */
2837 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2844 /* If we didn't find a useful equivalence for ARG1, we are done.
2845 Otherwise, set up for the next iteration. */
2849 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2850 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2851 code
= GET_CODE (x
);
2854 code
= reverse_condition (code
);
2857 /* Return our results. Return the modes from before fold_rtx
2858 because fold_rtx might produce const_int, and then it's too late. */
2859 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2860 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2865 /* Try to simplify a unary operation CODE whose output mode is to be
2866 MODE with input operand OP whose mode was originally OP_MODE.
2867 Return zero if no simplification can be made. */
2870 simplify_unary_operation (code
, mode
, op
, op_mode
)
2872 enum machine_mode mode
;
2874 enum machine_mode op_mode
;
2876 register int width
= GET_MODE_BITSIZE (mode
);
2878 /* The order of these tests is critical so that, for example, we don't
2879 check the wrong mode (input vs. output) for a conversion operation,
2880 such as FIX. At some point, this should be simplified. */
2882 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2883 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2887 #ifdef REAL_ARITHMETIC
2888 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2890 d
= (double) INTVAL (op
);
2892 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2894 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2898 #ifdef REAL_ARITHMETIC
2899 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2901 d
= (double) (unsigned int) INTVAL (op
);
2903 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2906 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2907 && GET_MODE (op
) == VOIDmode
)
2911 #ifdef REAL_ARITHMETIC
2912 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2914 if (CONST_DOUBLE_HIGH (op
) < 0)
2916 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2917 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2918 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2919 d
+= (double) (unsigned HOST_WIDE_INT
) (~ CONST_DOUBLE_LOW (op
));
2924 d
= (double) CONST_DOUBLE_HIGH (op
);
2925 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2926 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2927 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2929 #endif /* REAL_ARITHMETIC */
2930 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2932 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2933 && GET_MODE (op
) == VOIDmode
)
2937 #ifdef REAL_ARITHMETIC
2938 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2939 CONST_DOUBLE_HIGH (op
));
2941 d
= (double) CONST_DOUBLE_HIGH (op
);
2942 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2943 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2944 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2945 #endif /* REAL_ARITHMETIC */
2946 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2950 if (GET_CODE (op
) == CONST_INT
2951 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
2953 register HOST_WIDE_INT arg0
= INTVAL (op
);
2954 register HOST_WIDE_INT val
;
2967 val
= (arg0
>= 0 ? arg0
: - arg0
);
2971 /* Don't use ffs here. Instead, get low order bit and then its
2972 number. If arg0 is zero, this will return 0, as desired. */
2973 arg0
&= GET_MODE_MASK (mode
);
2974 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2982 if (op_mode
== VOIDmode
)
2984 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2986 /* If we were really extending the mode,
2987 we would have to distinguish between zero-extension
2988 and sign-extension. */
2989 if (width
!= GET_MODE_BITSIZE (op_mode
))
2993 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2994 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3000 if (op_mode
== VOIDmode
)
3002 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3004 /* If we were really extending the mode,
3005 we would have to distinguish between zero-extension
3006 and sign-extension. */
3007 if (width
!= GET_MODE_BITSIZE (op_mode
))
3011 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3014 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3016 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3017 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3030 /* Clear the bits that don't belong in our mode,
3031 unless they and our sign bit are all one.
3032 So we get either a reasonable negative value or a reasonable
3033 unsigned value for this mode. */
3034 if (width
< HOST_BITS_PER_WIDE_INT
3035 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3036 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3037 val
&= (1 << width
) - 1;
3039 return GEN_INT (val
);
3042 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3043 for a DImode operation on a CONST_INT. */
3044 else if (GET_MODE (op
) == VOIDmode
&& width
== HOST_BITS_PER_INT
* 2
3045 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3047 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3049 if (GET_CODE (op
) == CONST_DOUBLE
)
3050 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3052 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3062 neg_double (l1
, h1
, &lv
, &hv
);
3067 neg_double (l1
, h1
, &lv
, &hv
);
3075 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3077 lv
= exact_log2 (l1
& (-l1
)) + 1;
3081 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3082 return GEN_INT (l1
& GET_MODE_MASK (mode
));
3088 if (op_mode
== VOIDmode
3089 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3093 lv
= l1
& GET_MODE_MASK (op_mode
);
3097 if (op_mode
== VOIDmode
3098 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3102 lv
= l1
& GET_MODE_MASK (op_mode
);
3103 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3104 && (lv
& ((HOST_WIDE_INT
) 1
3105 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3106 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3108 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3119 return immed_double_const (lv
, hv
, mode
);
3122 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3123 else if (GET_CODE (op
) == CONST_DOUBLE
3124 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3130 if (setjmp (handler
))
3131 /* There used to be a warning here, but that is inadvisable.
3132 People may want to cause traps, and the natural way
3133 to do it should not get a warning. */
3136 set_float_handler (handler
);
3138 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3143 d
= REAL_VALUE_NEGATE (d
);
3147 if (REAL_VALUE_NEGATIVE (d
))
3148 d
= REAL_VALUE_NEGATE (d
);
3151 case FLOAT_TRUNCATE
:
3152 d
= real_value_truncate (mode
, d
);
3156 /* All this does is change the mode. */
3160 d
= REAL_VALUE_RNDZINT (d
);
3164 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3174 x
= immed_real_const_1 (d
, mode
);
3175 set_float_handler (NULL_PTR
);
3178 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3179 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3185 if (setjmp (handler
))
3188 set_float_handler (handler
);
3190 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3195 val
= REAL_VALUE_FIX (d
);
3199 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3206 set_float_handler (NULL_PTR
);
3208 /* Clear the bits that don't belong in our mode,
3209 unless they and our sign bit are all one.
3210 So we get either a reasonable negative value or a reasonable
3211 unsigned value for this mode. */
3212 if (width
< HOST_BITS_PER_WIDE_INT
3213 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3214 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3215 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3217 return GEN_INT (val
);
3220 /* This was formerly used only for non-IEEE float.
3221 eggert@twinsun.com says it is safe for IEEE also. */
3224 /* There are some simplifications we can do even if the operands
3230 /* (not (not X)) == X, similarly for NEG. */
3231 if (GET_CODE (op
) == code
)
3232 return XEXP (op
, 0);
3236 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3237 becomes just the MINUS if its mode is MODE. This allows
3238 folding switch statements on machines using casesi (such as
3240 if (GET_CODE (op
) == TRUNCATE
3241 && GET_MODE (XEXP (op
, 0)) == mode
3242 && GET_CODE (XEXP (op
, 0)) == MINUS
3243 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3244 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3245 return XEXP (op
, 0);
3253 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3254 and OP1. Return 0 if no simplification is possible.
3256 Don't use this for relational operations such as EQ or LT.
3257 Use simplify_relational_operation instead. */
3260 simplify_binary_operation (code
, mode
, op0
, op1
)
3262 enum machine_mode mode
;
3265 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3267 int width
= GET_MODE_BITSIZE (mode
);
3270 /* Relational operations don't work here. We must know the mode
3271 of the operands in order to do the comparison correctly.
3272 Assuming a full word can give incorrect results.
3273 Consider comparing 128 with -128 in QImode. */
3275 if (GET_RTX_CLASS (code
) == '<')
3278 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3279 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3280 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3281 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3283 REAL_VALUE_TYPE f0
, f1
, value
;
3286 if (setjmp (handler
))
3289 set_float_handler (handler
);
3291 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3292 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3293 f0
= real_value_truncate (mode
, f0
);
3294 f1
= real_value_truncate (mode
, f1
);
3296 #ifdef REAL_ARITHMETIC
3297 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3311 #ifndef REAL_INFINITY
3318 value
= MIN (f0
, f1
);
3321 value
= MAX (f0
, f1
);
3328 set_float_handler (NULL_PTR
);
3329 value
= real_value_truncate (mode
, value
);
3330 return immed_real_const_1 (value
, mode
);
3332 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3334 /* We can fold some multi-word operations. */
3335 if (GET_MODE_CLASS (mode
) == MODE_INT
3336 && width
== HOST_BITS_PER_WIDE_INT
* 2
3337 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3338 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3340 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3342 if (GET_CODE (op0
) == CONST_DOUBLE
)
3343 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3345 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3347 if (GET_CODE (op1
) == CONST_DOUBLE
)
3348 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3350 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3355 /* A - B == A + (-B). */
3356 neg_double (l2
, h2
, &lv
, &hv
);
3359 /* .. fall through ... */
3362 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3366 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3369 case DIV
: case MOD
: case UDIV
: case UMOD
:
3370 /* We'd need to include tree.h to do this and it doesn't seem worth
3375 lv
= l1
& l2
, hv
= h1
& h2
;
3379 lv
= l1
| l2
, hv
= h1
| h2
;
3383 lv
= l1
^ l2
, hv
= h1
^ h2
;
3389 && ((unsigned HOST_WIDE_INT
) l1
3390 < (unsigned HOST_WIDE_INT
) l2
)))
3399 && ((unsigned HOST_WIDE_INT
) l1
3400 > (unsigned HOST_WIDE_INT
) l2
)))
3407 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3409 && ((unsigned HOST_WIDE_INT
) l1
3410 < (unsigned HOST_WIDE_INT
) l2
)))
3417 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3419 && ((unsigned HOST_WIDE_INT
) l1
3420 > (unsigned HOST_WIDE_INT
) l2
)))
3426 case LSHIFTRT
: case ASHIFTRT
:
3427 case ASHIFT
: case LSHIFT
:
3428 case ROTATE
: case ROTATERT
:
3429 #ifdef SHIFT_COUNT_TRUNCATED
3430 if (SHIFT_COUNT_TRUNCATED
)
3431 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3434 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3437 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3438 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3440 else if (code
== ASHIFT
|| code
== LSHIFT
)
3441 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3443 else if (code
== ROTATE
)
3444 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3445 else /* code == ROTATERT */
3446 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3453 return immed_double_const (lv
, hv
, mode
);
3456 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3457 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3459 /* Even if we can't compute a constant result,
3460 there are some cases worth simplifying. */
3465 /* In IEEE floating point, x+0 is not the same as x. Similarly
3466 for the other optimizations below. */
3467 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3468 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3471 if (op1
== CONST0_RTX (mode
))
3474 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3475 if (GET_CODE (op0
) == NEG
)
3476 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3477 else if (GET_CODE (op1
) == NEG
)
3478 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3480 /* Handle both-operands-constant cases. We can only add
3481 CONST_INTs to constants since the sum of relocatable symbols
3482 can't be handled by most assemblers. Don't add CONST_INT
3483 to CONST_INT since overflow won't be computed properly if wider
3484 than HOST_BITS_PER_WIDE_INT. */
3486 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3487 && GET_CODE (op1
) == CONST_INT
)
3488 return plus_constant (op0
, INTVAL (op1
));
3489 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3490 && GET_CODE (op0
) == CONST_INT
)
3491 return plus_constant (op1
, INTVAL (op0
));
3493 /* See if this is something like X * C - X or vice versa or
3494 if the multiplication is written as a shift. If so, we can
3495 distribute and make a new multiply, shift, or maybe just
3496 have X (if C is 2 in the example above). But don't make
3497 real multiply if we didn't have one before. */
3499 if (! FLOAT_MODE_P (mode
))
3501 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3502 rtx lhs
= op0
, rhs
= op1
;
3505 if (GET_CODE (lhs
) == NEG
)
3506 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3507 else if (GET_CODE (lhs
) == MULT
3508 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3510 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3513 else if (GET_CODE (lhs
) == ASHIFT
3514 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3515 && INTVAL (XEXP (lhs
, 1)) >= 0
3516 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3518 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3519 lhs
= XEXP (lhs
, 0);
3522 if (GET_CODE (rhs
) == NEG
)
3523 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3524 else if (GET_CODE (rhs
) == MULT
3525 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3527 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3530 else if (GET_CODE (rhs
) == ASHIFT
3531 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3532 && INTVAL (XEXP (rhs
, 1)) >= 0
3533 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3535 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3536 rhs
= XEXP (rhs
, 0);
3539 if (rtx_equal_p (lhs
, rhs
))
3541 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3542 GEN_INT (coeff0
+ coeff1
));
3543 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3547 /* If one of the operands is a PLUS or a MINUS, see if we can
3548 simplify this by the associative law.
3549 Don't use the associative law for floating point.
3550 The inaccuracy makes it nonassociative,
3551 and subtle programs can break if operations are associated. */
3553 if (INTEGRAL_MODE_P (mode
)
3554 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3555 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3556 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3562 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3563 using cc0, in which case we want to leave it as a COMPARE
3564 so we can distinguish it from a register-register-copy.
3566 In IEEE floating point, x-0 is not the same as x. */
3568 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3569 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3570 && op1
== CONST0_RTX (mode
))
3573 /* Do nothing here. */
3578 /* None of these optimizations can be done for IEEE
3580 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3581 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3584 /* We can't assume x-x is 0 even with non-IEEE floating point,
3585 but since it is zero except in very strange circumstances, we
3586 will treat it as zero with -ffast-math. */
3587 if (rtx_equal_p (op0
, op1
)
3588 && ! side_effects_p (op0
)
3589 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3590 return CONST0_RTX (mode
);
3592 /* Change subtraction from zero into negation. */
3593 if (op0
== CONST0_RTX (mode
))
3594 return gen_rtx (NEG
, mode
, op1
);
3596 /* (-1 - a) is ~a. */
3597 if (op0
== constm1_rtx
)
3598 return gen_rtx (NOT
, mode
, op1
);
3600 /* Subtracting 0 has no effect. */
3601 if (op1
== CONST0_RTX (mode
))
3604 /* See if this is something like X * C - X or vice versa or
3605 if the multiplication is written as a shift. If so, we can
3606 distribute and make a new multiply, shift, or maybe just
3607 have X (if C is 2 in the example above). But don't make
3608 real multiply if we didn't have one before. */
3610 if (! FLOAT_MODE_P (mode
))
3612 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3613 rtx lhs
= op0
, rhs
= op1
;
3616 if (GET_CODE (lhs
) == NEG
)
3617 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3618 else if (GET_CODE (lhs
) == MULT
3619 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3621 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3624 else if (GET_CODE (lhs
) == ASHIFT
3625 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3626 && INTVAL (XEXP (lhs
, 1)) >= 0
3627 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3629 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3630 lhs
= XEXP (lhs
, 0);
3633 if (GET_CODE (rhs
) == NEG
)
3634 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3635 else if (GET_CODE (rhs
) == MULT
3636 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3638 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3641 else if (GET_CODE (rhs
) == ASHIFT
3642 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3643 && INTVAL (XEXP (rhs
, 1)) >= 0
3644 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3646 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3647 rhs
= XEXP (rhs
, 0);
3650 if (rtx_equal_p (lhs
, rhs
))
3652 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3653 GEN_INT (coeff0
- coeff1
));
3654 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3658 /* (a - (-b)) -> (a + b). */
3659 if (GET_CODE (op1
) == NEG
)
3660 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3662 /* If one of the operands is a PLUS or a MINUS, see if we can
3663 simplify this by the associative law.
3664 Don't use the associative law for floating point.
3665 The inaccuracy makes it nonassociative,
3666 and subtle programs can break if operations are associated. */
3668 if (INTEGRAL_MODE_P (mode
)
3669 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3670 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3671 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3674 /* Don't let a relocatable value get a negative coeff. */
3675 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op1
) != VOIDmode
)
3676 return plus_constant (op0
, - INTVAL (op1
));
3680 if (op1
== constm1_rtx
)
3682 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3684 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3687 /* In IEEE floating point, x*0 is not always 0. */
3688 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3689 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3690 && op1
== CONST0_RTX (mode
)
3691 && ! side_effects_p (op0
))
3694 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3695 However, ANSI says we can drop signals,
3696 so we can do this anyway. */
3697 if (op1
== CONST1_RTX (mode
))
3700 /* Convert multiply by constant power of two into shift unless
3701 we are still generating RTL. This test is a kludge. */
3702 if (GET_CODE (op1
) == CONST_INT
3703 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3704 && ! rtx_equal_function_value_matters
)
3705 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3707 if (GET_CODE (op1
) == CONST_DOUBLE
3708 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3712 int op1is2
, op1ism1
;
3714 if (setjmp (handler
))
3717 set_float_handler (handler
);
3718 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3719 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3720 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3721 set_float_handler (NULL_PTR
);
3723 /* x*2 is x+x and x*(-1) is -x */
3724 if (op1is2
&& GET_MODE (op0
) == mode
)
3725 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3727 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3728 return gen_rtx (NEG
, mode
, op0
);
3733 if (op1
== const0_rtx
)
3735 if (GET_CODE (op1
) == CONST_INT
3736 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3738 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3740 /* A | (~A) -> -1 */
3741 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3742 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3743 && ! side_effects_p (op0
)
3744 && GET_MODE_CLASS (mode
) != MODE_CC
)
3749 if (op1
== const0_rtx
)
3751 if (GET_CODE (op1
) == CONST_INT
3752 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3753 return gen_rtx (NOT
, mode
, op0
);
3754 if (op0
== op1
&& ! side_effects_p (op0
)
3755 && GET_MODE_CLASS (mode
) != MODE_CC
)
3760 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3762 if (GET_CODE (op1
) == CONST_INT
3763 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3765 if (op0
== op1
&& ! side_effects_p (op0
)
3766 && GET_MODE_CLASS (mode
) != MODE_CC
)
3769 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3770 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3771 && ! side_effects_p (op0
)
3772 && GET_MODE_CLASS (mode
) != MODE_CC
)
3777 /* Convert divide by power of two into shift (divide by 1 handled
3779 if (GET_CODE (op1
) == CONST_INT
3780 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3781 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3783 /* ... fall through ... */
3786 if (op1
== CONST1_RTX (mode
))
3789 /* In IEEE floating point, 0/x is not always 0. */
3790 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3791 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3792 && op0
== CONST0_RTX (mode
)
3793 && ! side_effects_p (op1
))
3796 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3797 /* Change division by a constant into multiplication. Only do
3798 this with -ffast-math until an expert says it is safe in
3800 else if (GET_CODE (op1
) == CONST_DOUBLE
3801 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3802 && op1
!= CONST0_RTX (mode
)
3806 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3808 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3810 #if defined (REAL_ARITHMETIC)
3811 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3812 return gen_rtx (MULT
, mode
, op0
,
3813 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3815 return gen_rtx (MULT
, mode
, op0
,
3816 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3824 /* Handle modulus by power of two (mod with 1 handled below). */
3825 if (GET_CODE (op1
) == CONST_INT
3826 && exact_log2 (INTVAL (op1
)) > 0)
3827 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3829 /* ... fall through ... */
3832 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3833 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3839 /* Rotating ~0 always results in ~0. */
3840 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3841 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3842 && ! side_effects_p (op1
))
3845 /* ... fall through ... */
3851 if (op1
== const0_rtx
)
3853 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3858 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3859 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3860 && ! side_effects_p (op0
))
3862 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3867 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3869 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
3870 && ! side_effects_p (op0
))
3872 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3877 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3879 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3884 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3886 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3897 /* Get the integer argument values in two forms:
3898 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3900 arg0
= INTVAL (op0
);
3901 arg1
= INTVAL (op1
);
3903 if (width
< HOST_BITS_PER_WIDE_INT
)
3905 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3906 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3909 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3910 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
3913 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3914 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
3922 /* Compute the value of the arithmetic. */
3927 val
= arg0s
+ arg1s
;
3931 val
= arg0s
- arg1s
;
3935 val
= arg0s
* arg1s
;
3941 val
= arg0s
/ arg1s
;
3947 val
= arg0s
% arg1s
;
3953 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
3959 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
3975 /* If shift count is undefined, don't fold it; let the machine do
3976 what it wants. But truncate it if the machine will do that. */
3980 #ifdef SHIFT_COUNT_TRUNCATED
3981 if (SHIFT_COUNT_TRUNCATED
)
3985 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
3993 #ifdef SHIFT_COUNT_TRUNCATED
3994 if (SHIFT_COUNT_TRUNCATED
)
3998 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4005 #ifdef SHIFT_COUNT_TRUNCATED
4006 if (SHIFT_COUNT_TRUNCATED
)
4010 val
= arg0s
>> arg1
;
4012 /* Bootstrap compiler may not have sign extended the right shift.
4013 Manually extend the sign to insure bootstrap cc matches gcc. */
4014 if (arg0s
< 0 && arg1
> 0)
4015 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4024 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4025 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4033 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4034 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4038 /* Do nothing here. */
4042 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4046 val
= ((unsigned HOST_WIDE_INT
) arg0
4047 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4051 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4055 val
= ((unsigned HOST_WIDE_INT
) arg0
4056 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4063 /* Clear the bits that don't belong in our mode, unless they and our sign
4064 bit are all one. So we get either a reasonable negative value or a
4065 reasonable unsigned value for this mode. */
4066 if (width
< HOST_BITS_PER_WIDE_INT
4067 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4068 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4069 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4071 return GEN_INT (val
);
4074 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4077 Rather than test for specific case, we do this by a brute-force method
4078 and do all possible simplifications until no more changes occur. Then
4079 we rebuild the operation. */
4082 simplify_plus_minus (code
, mode
, op0
, op1
)
4084 enum machine_mode mode
;
4090 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4091 int first
= 1, negate
= 0, changed
;
4094 bzero (ops
, sizeof ops
);
4096 /* Set up the two operands and then expand them until nothing has been
4097 changed. If we run out of room in our array, give up; this should
4098 almost never happen. */
4100 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4107 for (i
= 0; i
< n_ops
; i
++)
4108 switch (GET_CODE (ops
[i
]))
4115 ops
[n_ops
] = XEXP (ops
[i
], 1);
4116 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4117 ops
[i
] = XEXP (ops
[i
], 0);
4123 ops
[i
] = XEXP (ops
[i
], 0);
4124 negs
[i
] = ! negs
[i
];
4129 ops
[i
] = XEXP (ops
[i
], 0);
4135 /* ~a -> (-a - 1) */
4138 ops
[n_ops
] = constm1_rtx
;
4139 negs
[n_ops
++] = negs
[i
];
4140 ops
[i
] = XEXP (ops
[i
], 0);
4141 negs
[i
] = ! negs
[i
];
4148 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4153 /* If we only have two operands, we can't do anything. */
4157 /* Now simplify each pair of operands until nothing changes. The first
4158 time through just simplify constants against each other. */
4165 for (i
= 0; i
< n_ops
- 1; i
++)
4166 for (j
= i
+ 1; j
< n_ops
; j
++)
4167 if (ops
[i
] != 0 && ops
[j
] != 0
4168 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4170 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4171 enum rtx_code ncode
= PLUS
;
4173 if (negs
[i
] && ! negs
[j
])
4174 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4175 else if (! negs
[i
] && negs
[j
])
4178 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4181 ops
[i
] = tem
, ops
[j
] = 0;
4182 negs
[i
] = negs
[i
] && negs
[j
];
4183 if (GET_CODE (tem
) == NEG
)
4184 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4186 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4187 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4195 /* Pack all the operands to the lower-numbered entries and give up if
4196 we didn't reduce the number of operands we had. Make sure we
4197 count a CONST as two operands. If we have the same number of
4198 operands, but have made more CONSTs than we had, this is also
4199 an improvement, so accept it. */
4201 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4204 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4205 if (GET_CODE (ops
[j
]) == CONST
)
4209 if (i
+ n_consts
> input_ops
4210 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4215 /* If we have a CONST_INT, put it last. */
4216 for (i
= 0; i
< n_ops
- 1; i
++)
4217 if (GET_CODE (ops
[i
]) == CONST_INT
)
4219 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4220 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4223 /* Put a non-negated operand first. If there aren't any, make all
4224 operands positive and negate the whole thing later. */
4225 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4230 for (i
= 0; i
< n_ops
; i
++)
4236 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4237 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4240 /* Now make the result by performing the requested operations. */
4242 for (i
= 1; i
< n_ops
; i
++)
4243 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4245 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4248 /* Make a binary operation by properly ordering the operands and
4249 seeing if the expression folds. */
4252 cse_gen_binary (code
, mode
, op0
, op1
)
4254 enum machine_mode mode
;
4259 /* Put complex operands first and constants second if commutative. */
4260 if (GET_RTX_CLASS (code
) == 'c'
4261 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4262 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4263 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4264 || (GET_CODE (op0
) == SUBREG
4265 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4266 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4267 tem
= op0
, op0
= op1
, op1
= tem
;
4269 /* If this simplifies, do it. */
4270 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4275 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4276 just form the operation. */
4278 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4279 && GET_MODE (op0
) != VOIDmode
)
4280 return plus_constant (op0
, INTVAL (op1
));
4281 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4282 && GET_MODE (op0
) != VOIDmode
)
4283 return plus_constant (op0
, - INTVAL (op1
));
4285 return gen_rtx (code
, mode
, op0
, op1
);
4288 /* Like simplify_binary_operation except used for relational operators.
4289 MODE is the mode of the operands, not that of the result. If MODE
4290 is VOIDmode, both operands must also be VOIDmode and we compare the
4291 operands in "infinite precision".
4293 If no simplification is possible, this function returns zero. Otherwise,
4294 it returns either const_true_rtx or const0_rtx. */
4297 simplify_relational_operation (code
, mode
, op0
, op1
)
4299 enum machine_mode mode
;
4302 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4305 /* If op0 is a compare, extract the comparison arguments from it. */
4306 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4307 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4309 /* We can't simplify MODE_CC values since we don't know what the
4310 actual comparison is. */
4311 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4318 /* For integer comparisons of A and B maybe we can simplify A - B and can
4319 then simplify a comparison of that with zero. If A and B are both either
4320 a register or a CONST_INT, this can't help; testing for these cases will
4321 prevent infinite recursion here and speed things up.
4323 If CODE is an unsigned comparison, we can only do this if A - B is a
4324 constant integer, and then we have to compare that integer with zero as a
4325 signed comparison. Note that this will give the incorrect result from
4326 comparisons that overflow. Since these are undefined, this is probably
4327 OK. If it causes a problem, we can check for A or B being an address
4328 (fp + const or SYMBOL_REF) and only do it in that case. */
4330 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4331 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4332 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4333 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4334 && (GET_CODE (tem
) == CONST_INT
4335 || (code
!= GTU
&& code
!= GEU
&&
4336 code
!= LTU
&& code
!= LEU
)))
4337 return simplify_relational_operation (signed_condition (code
),
4338 mode
, tem
, const0_rtx
);
4340 /* For non-IEEE floating-point, if the two operands are equal, we know the
4342 if (rtx_equal_p (op0
, op1
)
4343 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4344 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4345 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4347 /* If the operands are floating-point constants, see if we can fold
4349 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4350 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4351 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4353 REAL_VALUE_TYPE d0
, d1
;
4356 if (setjmp (handler
))
4359 set_float_handler (handler
);
4360 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4361 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4362 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4363 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4364 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4365 set_float_handler (NULL_PTR
);
4367 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4369 /* Otherwise, see if the operands are both integers. */
4370 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4371 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4372 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4374 int width
= GET_MODE_BITSIZE (mode
);
4375 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4376 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4378 /* Get the two words comprising each integer constant. */
4379 if (GET_CODE (op0
) == CONST_DOUBLE
)
4381 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4382 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4386 l0u
= l0s
= INTVAL (op0
);
4387 h0u
= 0, h0s
= l0s
< 0 ? -1 : 0;
4390 if (GET_CODE (op1
) == CONST_DOUBLE
)
4392 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4393 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4397 l1u
= l1s
= INTVAL (op1
);
4398 h1u
= 0, h1s
= l1s
< 0 ? -1 : 0;
4401 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4402 we have to sign or zero-extend the values. */
4403 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4404 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4406 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4408 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4409 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4411 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4412 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4414 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4415 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4418 equal
= (h0u
== h1u
&& l0u
== l1u
);
4419 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4420 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4421 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4422 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4425 /* Otherwise, there are some code-specific tests we can make. */
4431 /* References to the frame plus a constant or labels cannot
4432 be zero, but a SYMBOL_REF can due to #pragma weak. */
4433 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4434 || GET_CODE (op0
) == LABEL_REF
)
4435 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4436 /* On some machines, the ap reg can be 0 sometimes. */
4437 && op0
!= arg_pointer_rtx
4444 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4445 || GET_CODE (op0
) == LABEL_REF
)
4446 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4447 && op0
!= arg_pointer_rtx
4450 return const_true_rtx
;
4454 /* Unsigned values are never negative. */
4455 if (op1
== const0_rtx
)
4456 return const_true_rtx
;
4460 if (op1
== const0_rtx
)
4465 /* Unsigned values are never greater than the largest
4467 if (GET_CODE (op1
) == CONST_INT
4468 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4469 && INTEGRAL_MODE_P (mode
))
4470 return const_true_rtx
;
4474 if (GET_CODE (op1
) == CONST_INT
4475 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4476 && INTEGRAL_MODE_P (mode
))
4484 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4489 return equal
? const_true_rtx
: const0_rtx
;
4491 return ! equal
? const_true_rtx
: const0_rtx
;
4493 return op0lt
? const_true_rtx
: const0_rtx
;
4495 return op1lt
? const_true_rtx
: const0_rtx
;
4497 return op0ltu
? const_true_rtx
: const0_rtx
;
4499 return op1ltu
? const_true_rtx
: const0_rtx
;
4501 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4503 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4505 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4507 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4513 /* Simplify CODE, an operation with result mode MODE and three operands,
4514 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4515 a constant. Return 0 if no simplifications is possible. */
4518 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4520 enum machine_mode mode
, op0_mode
;
4523 int width
= GET_MODE_BITSIZE (mode
);
4525 /* VOIDmode means "infinite" precision. */
4527 width
= HOST_BITS_PER_WIDE_INT
;
4533 if (GET_CODE (op0
) == CONST_INT
4534 && GET_CODE (op1
) == CONST_INT
4535 && GET_CODE (op2
) == CONST_INT
4536 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4537 && width
<= HOST_BITS_PER_WIDE_INT
)
4539 /* Extracting a bit-field from a constant */
4540 HOST_WIDE_INT val
= INTVAL (op0
);
4543 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4545 val
>>= INTVAL (op2
);
4547 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4549 /* First zero-extend. */
4550 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4551 /* If desired, propagate sign bit. */
4552 if (code
== SIGN_EXTRACT
4553 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4554 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4557 /* Clear the bits that don't belong in our mode,
4558 unless they and our sign bit are all one.
4559 So we get either a reasonable negative value or a reasonable
4560 unsigned value for this mode. */
4561 if (width
< HOST_BITS_PER_WIDE_INT
4562 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4563 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4564 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4566 return GEN_INT (val
);
4571 if (GET_CODE (op0
) == CONST_INT
)
4572 return op0
!= const0_rtx
? op1
: op2
;
4582 /* If X is a nontrivial arithmetic operation on an argument
4583 for which a constant value can be determined, return
4584 the result of operating on that value, as a constant.
4585 Otherwise, return X, possibly with one or more operands
4586 modified by recursive calls to this function.
4588 If X is a register whose contents are known, we do NOT
4589 return those contents here. equiv_constant is called to
4592 INSN is the insn that we may be modifying. If it is 0, make a copy
4593 of X before modifying it. */
4600 register enum rtx_code code
;
4601 register enum machine_mode mode
;
4608 /* Folded equivalents of first two operands of X. */
4612 /* Constant equivalents of first three operands of X;
4613 0 when no such equivalent is known. */
4618 /* The mode of the first operand of X. We need this for sign and zero
4620 enum machine_mode mode_arg0
;
4625 mode
= GET_MODE (x
);
4626 code
= GET_CODE (x
);
4635 /* No use simplifying an EXPR_LIST
4636 since they are used only for lists of args
4637 in a function call's REG_EQUAL note. */
4643 return prev_insn_cc0
;
4647 /* If the next insn is a CODE_LABEL followed by a jump table,
4648 PC's value is a LABEL_REF pointing to that label. That
4649 lets us fold switch statements on the Vax. */
4650 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4652 rtx next
= next_nonnote_insn (insn
);
4654 if (next
&& GET_CODE (next
) == CODE_LABEL
4655 && NEXT_INSN (next
) != 0
4656 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4657 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4658 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4659 return gen_rtx (LABEL_REF
, Pmode
, next
);
4664 /* See if we previously assigned a constant value to this SUBREG. */
4665 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4666 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4669 /* If this is a paradoxical SUBREG, we have no idea what value the
4670 extra bits would have. However, if the operand is equivalent
4671 to a SUBREG whose operand is the same as our mode, and all the
4672 modes are within a word, we can just use the inner operand
4673 because these SUBREGs just say how to treat the register.
4675 Similarly if we find an integer constant. */
4677 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4679 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4680 struct table_elt
*elt
;
4682 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4683 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4684 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4686 for (elt
= elt
->first_same_value
;
4687 elt
; elt
= elt
->next_same_value
)
4689 if (CONSTANT_P (elt
->exp
)
4690 && GET_MODE (elt
->exp
) == VOIDmode
)
4693 if (GET_CODE (elt
->exp
) == SUBREG
4694 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4695 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4696 return copy_rtx (SUBREG_REG (elt
->exp
));
4702 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4703 We might be able to if the SUBREG is extracting a single word in an
4704 integral mode or extracting the low part. */
4706 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4707 const_arg0
= equiv_constant (folded_arg0
);
4709 folded_arg0
= const_arg0
;
4711 if (folded_arg0
!= SUBREG_REG (x
))
4715 if (GET_MODE_CLASS (mode
) == MODE_INT
4716 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4717 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4718 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4719 GET_MODE (SUBREG_REG (x
)));
4720 if (new == 0 && subreg_lowpart_p (x
))
4721 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4726 /* If this is a narrowing SUBREG and our operand is a REG, see if
4727 we can find an equivalence for REG that is an arithmetic operation
4728 in a wider mode where both operands are paradoxical SUBREGs
4729 from objects of our result mode. In that case, we couldn't report
4730 an equivalent value for that operation, since we don't know what the
4731 extra bits will be. But we can find an equivalence for this SUBREG
4732 by folding that operation is the narrow mode. This allows us to
4733 fold arithmetic in narrow modes when the machine only supports
4734 word-sized arithmetic.
4736 Also look for a case where we have a SUBREG whose operand is the
4737 same as our result. If both modes are smaller than a word, we
4738 are simply interpreting a register in different modes and we
4739 can use the inner value. */
4741 if (GET_CODE (folded_arg0
) == REG
4742 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4743 && subreg_lowpart_p (x
))
4745 struct table_elt
*elt
;
4747 /* We can use HASH here since we know that canon_hash won't be
4749 elt
= lookup (folded_arg0
,
4750 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4751 GET_MODE (folded_arg0
));
4754 elt
= elt
->first_same_value
;
4756 for (; elt
; elt
= elt
->next_same_value
)
4758 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4760 /* Just check for unary and binary operations. */
4761 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4762 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4763 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4764 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4765 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4767 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4769 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4770 op0
= fold_rtx (op0
, NULL_RTX
);
4772 op0
= equiv_constant (op0
);
4774 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4777 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4778 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4779 && eltcode
!= DIV
&& eltcode
!= MOD
4780 && eltcode
!= UDIV
&& eltcode
!= UMOD
4781 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4782 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4783 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4784 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4786 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4787 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4788 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4790 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4792 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4793 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4795 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4796 op0
= fold_rtx (op0
, NULL_RTX
);
4799 op0
= equiv_constant (op0
);
4801 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4802 op1
= fold_rtx (op1
, NULL_RTX
);
4805 op1
= equiv_constant (op1
);
4807 /* If we are looking for the low SImode part of
4808 (ashift:DI c (const_int 32)), it doesn't work
4809 to compute that in SImode, because a 32-bit shift
4810 in SImode is unpredictable. We know the value is 0. */
4812 && (GET_CODE (elt
->exp
) == ASHIFT
4813 || GET_CODE (elt
->exp
) == LSHIFT
)
4814 && GET_CODE (op1
) == CONST_INT
4815 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4817 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4819 /* If the count fits in the inner mode's width,
4820 but exceeds the outer mode's width,
4821 the value will get truncated to 0
4825 /* If the count exceeds even the inner mode's width,
4826 don't fold this expression. */
4829 else if (op0
&& op1
)
4830 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4834 else if (GET_CODE (elt
->exp
) == SUBREG
4835 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4836 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4838 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4839 new = copy_rtx (SUBREG_REG (elt
->exp
));
4850 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4851 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4852 new = lookup_as_function (XEXP (x
, 0), code
);
4854 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4858 /* If we are not actually processing an insn, don't try to find the
4859 best address. Not only don't we care, but we could modify the
4860 MEM in an invalid way since we have no insn to validate against. */
4862 find_best_addr (insn
, &XEXP (x
, 0));
4865 /* Even if we don't fold in the insn itself,
4866 we can safely do so here, in hopes of getting a constant. */
4867 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
4869 HOST_WIDE_INT offset
= 0;
4871 if (GET_CODE (addr
) == REG
4872 && REGNO_QTY_VALID_P (REGNO (addr
))
4873 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4874 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4875 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4877 /* If address is constant, split it into a base and integer offset. */
4878 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4880 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4881 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4883 base
= XEXP (XEXP (addr
, 0), 0);
4884 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4886 else if (GET_CODE (addr
) == LO_SUM
4887 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4888 base
= XEXP (addr
, 1);
4890 /* If this is a constant pool reference, we can fold it into its
4891 constant to allow better value tracking. */
4892 if (base
&& GET_CODE (base
) == SYMBOL_REF
4893 && CONSTANT_POOL_ADDRESS_P (base
))
4895 rtx constant
= get_pool_constant (base
);
4896 enum machine_mode const_mode
= get_pool_mode (base
);
4899 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4900 constant_pool_entries_cost
= COST (constant
);
4902 /* If we are loading the full constant, we have an equivalence. */
4903 if (offset
== 0 && mode
== const_mode
)
4906 /* If this actually isn't a constant (wierd!), we can't do
4907 anything. Otherwise, handle the two most common cases:
4908 extracting a word from a multi-word constant, and extracting
4909 the low-order bits. Other cases don't seem common enough to
4911 if (! CONSTANT_P (constant
))
4914 if (GET_MODE_CLASS (mode
) == MODE_INT
4915 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4916 && offset
% UNITS_PER_WORD
== 0
4917 && (new = operand_subword (constant
,
4918 offset
/ UNITS_PER_WORD
,
4919 0, const_mode
)) != 0)
4922 if (((BYTES_BIG_ENDIAN
4923 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4924 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4925 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4929 /* If this is a reference to a label at a known position in a jump
4930 table, we also know its value. */
4931 if (base
&& GET_CODE (base
) == LABEL_REF
)
4933 rtx label
= XEXP (base
, 0);
4934 rtx table_insn
= NEXT_INSN (label
);
4936 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4937 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4939 rtx table
= PATTERN (table_insn
);
4942 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4943 < XVECLEN (table
, 0)))
4944 return XVECEXP (table
, 0,
4945 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4947 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4948 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4950 rtx table
= PATTERN (table_insn
);
4953 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4954 < XVECLEN (table
, 1)))
4956 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4957 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4960 if (GET_MODE (table
) != Pmode
)
4961 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4975 mode_arg0
= VOIDmode
;
4977 /* Try folding our operands.
4978 Then see which ones have constant values known. */
4980 fmt
= GET_RTX_FORMAT (code
);
4981 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4984 rtx arg
= XEXP (x
, i
);
4985 rtx folded_arg
= arg
, const_arg
= 0;
4986 enum machine_mode mode_arg
= GET_MODE (arg
);
4987 rtx cheap_arg
, expensive_arg
;
4988 rtx replacements
[2];
4991 /* Most arguments are cheap, so handle them specially. */
4992 switch (GET_CODE (arg
))
4995 /* This is the same as calling equiv_constant; it is duplicated
4997 if (REGNO_QTY_VALID_P (REGNO (arg
))
4998 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4999 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5000 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5002 = gen_lowpart_if_possible (GET_MODE (arg
),
5003 qty_const
[reg_qty
[REGNO (arg
)]]);
5016 folded_arg
= prev_insn_cc0
;
5017 mode_arg
= prev_insn_cc0_mode
;
5018 const_arg
= equiv_constant (folded_arg
);
5023 folded_arg
= fold_rtx (arg
, insn
);
5024 const_arg
= equiv_constant (folded_arg
);
5027 /* For the first three operands, see if the operand
5028 is constant or equivalent to a constant. */
5032 folded_arg0
= folded_arg
;
5033 const_arg0
= const_arg
;
5034 mode_arg0
= mode_arg
;
5037 folded_arg1
= folded_arg
;
5038 const_arg1
= const_arg
;
5041 const_arg2
= const_arg
;
5045 /* Pick the least expensive of the folded argument and an
5046 equivalent constant argument. */
5047 if (const_arg
== 0 || const_arg
== folded_arg
5048 || COST (const_arg
) > COST (folded_arg
))
5049 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5051 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5053 /* Try to replace the operand with the cheapest of the two
5054 possibilities. If it doesn't work and this is either of the first
5055 two operands of a commutative operation, try swapping them.
5056 If THAT fails, try the more expensive, provided it is cheaper
5057 than what is already there. */
5059 if (cheap_arg
== XEXP (x
, i
))
5062 if (insn
== 0 && ! copied
)
5068 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5070 j
< 2 && replacements
[j
]
5071 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5074 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5077 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5079 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5080 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5082 if (apply_change_group ())
5084 /* Swap them back to be invalid so that this loop can
5085 continue and flag them to be swapped back later. */
5088 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5097 else if (fmt
[i
] == 'E')
5098 /* Don't try to fold inside of a vector of expressions.
5099 Doing nothing is harmless. */
5102 /* If a commutative operation, place a constant integer as the second
5103 operand unless the first operand is also a constant integer. Otherwise,
5104 place any constant second unless the first operand is also a constant. */
5106 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5108 if (must_swap
|| (const_arg0
5110 || (GET_CODE (const_arg0
) == CONST_INT
5111 && GET_CODE (const_arg1
) != CONST_INT
))))
5113 register rtx tem
= XEXP (x
, 0);
5115 if (insn
== 0 && ! copied
)
5121 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5122 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5123 if (apply_change_group ())
5125 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5126 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5131 /* If X is an arithmetic operation, see if we can simplify it. */
5133 switch (GET_RTX_CLASS (code
))
5136 /* We can't simplify extension ops unless we know the original mode. */
5137 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5138 && mode_arg0
== VOIDmode
)
5140 new = simplify_unary_operation (code
, mode
,
5141 const_arg0
? const_arg0
: folded_arg0
,
5146 /* See what items are actually being compared and set FOLDED_ARG[01]
5147 to those values and CODE to the actual comparison code. If any are
5148 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5149 do anything if both operands are already known to be constant. */
5151 if (const_arg0
== 0 || const_arg1
== 0)
5153 struct table_elt
*p0
, *p1
;
5154 rtx
true = const_true_rtx
, false = const0_rtx
;
5155 enum machine_mode mode_arg1
;
5157 #ifdef FLOAT_STORE_FLAG_VALUE
5158 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5160 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5161 false = CONST0_RTX (mode
);
5165 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5166 &mode_arg0
, &mode_arg1
);
5167 const_arg0
= equiv_constant (folded_arg0
);
5168 const_arg1
= equiv_constant (folded_arg1
);
5170 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5171 what kinds of things are being compared, so we can't do
5172 anything with this comparison. */
5174 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5177 /* If we do not now have two constants being compared, see if we
5178 can nevertheless deduce some things about the comparison. */
5179 if (const_arg0
== 0 || const_arg1
== 0)
5181 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5182 constant? These aren't zero, but we don't know their sign. */
5183 if (const_arg1
== const0_rtx
5184 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5185 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5187 || GET_CODE (folded_arg0
) == SYMBOL_REF
5189 || GET_CODE (folded_arg0
) == LABEL_REF
5190 || GET_CODE (folded_arg0
) == CONST
))
5194 else if (code
== NE
)
5198 /* See if the two operands are the same. We don't do this
5199 for IEEE floating-point since we can't assume x == x
5200 since x might be a NaN. */
5202 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5203 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5204 && (folded_arg0
== folded_arg1
5205 || (GET_CODE (folded_arg0
) == REG
5206 && GET_CODE (folded_arg1
) == REG
5207 && (reg_qty
[REGNO (folded_arg0
)]
5208 == reg_qty
[REGNO (folded_arg1
)]))
5209 || ((p0
= lookup (folded_arg0
,
5210 (safe_hash (folded_arg0
, mode_arg0
)
5211 % NBUCKETS
), mode_arg0
))
5212 && (p1
= lookup (folded_arg1
,
5213 (safe_hash (folded_arg1
, mode_arg0
)
5214 % NBUCKETS
), mode_arg0
))
5215 && p0
->first_same_value
== p1
->first_same_value
)))
5216 return ((code
== EQ
|| code
== LE
|| code
== GE
5217 || code
== LEU
|| code
== GEU
)
5220 /* If FOLDED_ARG0 is a register, see if the comparison we are
5221 doing now is either the same as we did before or the reverse
5222 (we only check the reverse if not floating-point). */
5223 else if (GET_CODE (folded_arg0
) == REG
)
5225 int qty
= reg_qty
[REGNO (folded_arg0
)];
5227 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5228 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5229 || (comparison_dominates_p (qty_comparison_code
[qty
],
5230 reverse_condition (code
))
5231 && ! FLOAT_MODE_P (mode_arg0
)))
5232 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5234 && rtx_equal_p (qty_comparison_const
[qty
],
5236 || (GET_CODE (folded_arg1
) == REG
5237 && (reg_qty
[REGNO (folded_arg1
)]
5238 == qty_comparison_qty
[qty
]))))
5239 return (comparison_dominates_p (qty_comparison_code
[qty
],
5246 /* If we are comparing against zero, see if the first operand is
5247 equivalent to an IOR with a constant. If so, we may be able to
5248 determine the result of this comparison. */
5250 if (const_arg1
== const0_rtx
)
5252 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5256 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5257 && GET_CODE (inner_const
) == CONST_INT
5258 && INTVAL (inner_const
) != 0)
5260 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5261 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5262 && (INTVAL (inner_const
)
5263 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5264 rtx
true = const_true_rtx
, false = const0_rtx
;
5266 #ifdef FLOAT_STORE_FLAG_VALUE
5267 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5269 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5270 false = CONST0_RTX (mode
);
5292 new = simplify_relational_operation (code
, mode_arg0
,
5293 const_arg0
? const_arg0
: folded_arg0
,
5294 const_arg1
? const_arg1
: folded_arg1
);
5295 #ifdef FLOAT_STORE_FLAG_VALUE
5296 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5297 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5298 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
));
5307 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5308 with that LABEL_REF as its second operand. If so, the result is
5309 the first operand of that MINUS. This handles switches with an
5310 ADDR_DIFF_VEC table. */
5311 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5313 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
5315 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5316 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5320 /* If second operand is a register equivalent to a negative
5321 CONST_INT, see if we can find a register equivalent to the
5322 positive constant. Make a MINUS if so. Don't do this for
5323 a negative constant since we might then alternate between
5324 chosing positive and negative constants. Having the positive
5325 constant previously-used is the more common case. */
5326 if (const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
5327 && INTVAL (const_arg1
) < 0 && GET_CODE (folded_arg1
) == REG
)
5329 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5331 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5335 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5336 if (GET_CODE (p
->exp
) == REG
)
5337 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5338 canon_reg (p
->exp
, NULL_RTX
));
5343 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5344 If so, produce (PLUS Z C2-C). */
5345 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5347 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5348 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5349 return fold_rtx (plus_constant (copy_rtx (y
),
5350 -INTVAL (const_arg1
)),
5354 /* ... fall through ... */
5357 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5358 case IOR
: case AND
: case XOR
:
5359 case MULT
: case DIV
: case UDIV
:
5360 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5361 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5362 is known to be of similar form, we may be able to replace the
5363 operation with a combined operation. This may eliminate the
5364 intermediate operation if every use is simplified in this way.
5365 Note that the similar optimization done by combine.c only works
5366 if the intermediate operation's result has only one reference. */
5368 if (GET_CODE (folded_arg0
) == REG
5369 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5372 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5373 rtx y
= lookup_as_function (folded_arg0
, code
);
5375 enum rtx_code associate_code
;
5379 || 0 == (inner_const
5380 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5381 || GET_CODE (inner_const
) != CONST_INT
5382 /* If we have compiled a statement like
5383 "if (x == (x & mask1))", and now are looking at
5384 "x & mask2", we will have a case where the first operand
5385 of Y is the same as our first operand. Unless we detect
5386 this case, an infinite loop will result. */
5387 || XEXP (y
, 0) == folded_arg0
)
5390 /* Don't associate these operations if they are a PLUS with the
5391 same constant and it is a power of two. These might be doable
5392 with a pre- or post-increment. Similarly for two subtracts of
5393 identical powers of two with post decrement. */
5395 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5397 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5398 || exact_log2 (INTVAL (const_arg1
)) >= 0
5400 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5401 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5406 /* Compute the code used to compose the constants. For example,
5407 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5410 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5411 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5413 new_const
= simplify_binary_operation (associate_code
, mode
,
5414 const_arg1
, inner_const
);
5419 /* If we are associating shift operations, don't let this
5420 produce a shift of the size of the object or larger.
5421 This could occur when we follow a sign-extend by a right
5422 shift on a machine that does a sign-extend as a pair
5425 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5426 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5428 /* As an exception, we can turn an ASHIFTRT of this
5429 form into a shift of the number of bits - 1. */
5430 if (code
== ASHIFTRT
)
5431 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5436 y
= copy_rtx (XEXP (y
, 0));
5438 /* If Y contains our first operand (the most common way this
5439 can happen is if Y is a MEM), we would do into an infinite
5440 loop if we tried to fold it. So don't in that case. */
5442 if (! reg_mentioned_p (folded_arg0
, y
))
5443 y
= fold_rtx (y
, insn
);
5445 return cse_gen_binary (code
, mode
, y
, new_const
);
5449 new = simplify_binary_operation (code
, mode
,
5450 const_arg0
? const_arg0
: folded_arg0
,
5451 const_arg1
? const_arg1
: folded_arg1
);
5455 /* (lo_sum (high X) X) is simply X. */
5456 if (code
== LO_SUM
&& const_arg0
!= 0
5457 && GET_CODE (const_arg0
) == HIGH
5458 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5464 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5465 const_arg0
? const_arg0
: folded_arg0
,
5466 const_arg1
? const_arg1
: folded_arg1
,
5467 const_arg2
? const_arg2
: XEXP (x
, 2));
5471 return new ? new : x
;
5474 /* Return a constant value currently equivalent to X.
5475 Return 0 if we don't know one. */
5481 if (GET_CODE (x
) == REG
5482 && REGNO_QTY_VALID_P (REGNO (x
))
5483 && qty_const
[reg_qty
[REGNO (x
)]])
5484 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5486 if (x
!= 0 && CONSTANT_P (x
))
5489 /* If X is a MEM, try to fold it outside the context of any insn to see if
5490 it might be equivalent to a constant. That handles the case where it
5491 is a constant-pool reference. Then try to look it up in the hash table
5492 in case it is something whose value we have seen before. */
5494 if (GET_CODE (x
) == MEM
)
5496 struct table_elt
*elt
;
5498 x
= fold_rtx (x
, NULL_RTX
);
5502 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5506 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5507 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5514 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5515 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5516 least-significant part of X.
5517 MODE specifies how big a part of X to return.
5519 If the requested operation cannot be done, 0 is returned.
5521 This is similar to gen_lowpart in emit-rtl.c. */
5524 gen_lowpart_if_possible (mode
, x
)
5525 enum machine_mode mode
;
5528 rtx result
= gen_lowpart_common (mode
, x
);
5532 else if (GET_CODE (x
) == MEM
)
5534 /* This is the only other case we handle. */
5535 register int offset
= 0;
5538 #if WORDS_BIG_ENDIAN
5539 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5540 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5542 #if BYTES_BIG_ENDIAN
5543 /* Adjust the address so that the address-after-the-data
5545 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5546 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5548 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5549 if (! memory_address_p (mode
, XEXP (new, 0)))
5551 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5552 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5553 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5560 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5561 branch. It will be zero if not.
5563 In certain cases, this can cause us to add an equivalence. For example,
5564 if we are following the taken case of
5566 we can add the fact that `i' and '2' are now equivalent.
5568 In any case, we can record that this comparison was passed. If the same
5569 comparison is seen later, we will know its value. */
5572 record_jump_equiv (insn
, taken
)
5576 int cond_known_true
;
5578 enum machine_mode mode
, mode0
, mode1
;
5579 int reversed_nonequality
= 0;
5582 /* Ensure this is the right kind of insn. */
5583 if (! condjump_p (insn
) || simplejump_p (insn
))
5586 /* See if this jump condition is known true or false. */
5588 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5590 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5592 /* Get the type of comparison being done and the operands being compared.
5593 If we had to reverse a non-equality condition, record that fact so we
5594 know that it isn't valid for floating-point. */
5595 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5596 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5597 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5599 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5600 if (! cond_known_true
)
5602 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5603 code
= reverse_condition (code
);
5606 /* The mode is the mode of the non-constant. */
5608 if (mode1
!= VOIDmode
)
5611 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5614 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5615 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5616 Make any useful entries we can with that information. Called from
5617 above function and called recursively. */
5620 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5622 enum machine_mode mode
;
5624 int reversed_nonequality
;
5626 unsigned op0_hash
, op1_hash
;
5627 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5628 struct table_elt
*op0_elt
, *op1_elt
;
5630 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5631 we know that they are also equal in the smaller mode (this is also
5632 true for all smaller modes whether or not there is a SUBREG, but
5633 is not worth testing for with no SUBREG. */
5635 /* Note that GET_MODE (op0) may not equal MODE. */
5636 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5637 && (GET_MODE_SIZE (GET_MODE (op0
))
5638 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5640 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5641 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5643 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5644 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5645 reversed_nonequality
);
5648 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5649 && (GET_MODE_SIZE (GET_MODE (op1
))
5650 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5652 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5653 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5655 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5656 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5657 reversed_nonequality
);
5660 /* Similarly, if this is an NE comparison, and either is a SUBREG
5661 making a smaller mode, we know the whole thing is also NE. */
5663 /* Note that GET_MODE (op0) may not equal MODE;
5664 if we test MODE instead, we can get an infinite recursion
5665 alternating between two modes each wider than MODE. */
5667 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5668 && subreg_lowpart_p (op0
)
5669 && (GET_MODE_SIZE (GET_MODE (op0
))
5670 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5672 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5673 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5675 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5676 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5677 reversed_nonequality
);
5680 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5681 && subreg_lowpart_p (op1
)
5682 && (GET_MODE_SIZE (GET_MODE (op1
))
5683 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5685 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5686 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5688 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5689 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5690 reversed_nonequality
);
5693 /* Hash both operands. */
5696 hash_arg_in_memory
= 0;
5697 hash_arg_in_struct
= 0;
5698 op0_hash
= HASH (op0
, mode
);
5699 op0_in_memory
= hash_arg_in_memory
;
5700 op0_in_struct
= hash_arg_in_struct
;
5706 hash_arg_in_memory
= 0;
5707 hash_arg_in_struct
= 0;
5708 op1_hash
= HASH (op1
, mode
);
5709 op1_in_memory
= hash_arg_in_memory
;
5710 op1_in_struct
= hash_arg_in_struct
;
5715 /* Look up both operands. */
5716 op0_elt
= lookup (op0
, op0_hash
, mode
);
5717 op1_elt
= lookup (op1
, op1_hash
, mode
);
5719 /* If we aren't setting two things equal all we can do is save this
5720 comparison. Similarly if this is floating-point. In the latter
5721 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5722 If we record the equality, we might inadvertently delete code
5723 whose intent was to change -0 to +0. */
5725 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5727 /* If we reversed a floating-point comparison, if OP0 is not a
5728 register, or if OP1 is neither a register or constant, we can't
5731 if (GET_CODE (op1
) != REG
)
5732 op1
= equiv_constant (op1
);
5734 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5735 || GET_CODE (op0
) != REG
|| op1
== 0)
5738 /* Put OP0 in the hash table if it isn't already. This gives it a
5739 new quantity number. */
5742 if (insert_regs (op0
, NULL_PTR
, 0))
5744 rehash_using_reg (op0
);
5745 op0_hash
= HASH (op0
, mode
);
5747 /* If OP0 is contained in OP1, this changes its hash code
5748 as well. Faster to rehash than to check, except
5749 for the simple case of a constant. */
5750 if (! CONSTANT_P (op1
))
5751 op1_hash
= HASH (op1
,mode
);
5754 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5755 op0_elt
->in_memory
= op0_in_memory
;
5756 op0_elt
->in_struct
= op0_in_struct
;
5759 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5760 if (GET_CODE (op1
) == REG
)
5762 /* Look it up again--in case op0 and op1 are the same. */
5763 op1_elt
= lookup (op1
, op1_hash
, mode
);
5765 /* Put OP1 in the hash table so it gets a new quantity number. */
5768 if (insert_regs (op1
, NULL_PTR
, 0))
5770 rehash_using_reg (op1
);
5771 op1_hash
= HASH (op1
, mode
);
5774 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5775 op1_elt
->in_memory
= op1_in_memory
;
5776 op1_elt
->in_struct
= op1_in_struct
;
5779 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5780 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5784 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5785 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5791 /* If either side is still missing an equivalence, make it now,
5792 then merge the equivalences. */
5796 if (insert_regs (op0
, NULL_PTR
, 0))
5798 rehash_using_reg (op0
);
5799 op0_hash
= HASH (op0
, mode
);
5802 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5803 op0_elt
->in_memory
= op0_in_memory
;
5804 op0_elt
->in_struct
= op0_in_struct
;
5809 if (insert_regs (op1
, NULL_PTR
, 0))
5811 rehash_using_reg (op1
);
5812 op1_hash
= HASH (op1
, mode
);
5815 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5816 op1_elt
->in_memory
= op1_in_memory
;
5817 op1_elt
->in_struct
= op1_in_struct
;
5820 merge_equiv_classes (op0_elt
, op1_elt
);
5821 last_jump_equiv_class
= op0_elt
;
5824 /* CSE processing for one instruction.
5825 First simplify sources and addresses of all assignments
5826 in the instruction, using previously-computed equivalents values.
5827 Then install the new sources and destinations in the table
5828 of available values.
5830 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5833 /* Data on one SET contained in the instruction. */
5837 /* The SET rtx itself. */
5839 /* The SET_SRC of the rtx (the original value, if it is changing). */
5841 /* The hash-table element for the SET_SRC of the SET. */
5842 struct table_elt
*src_elt
;
5843 /* Hash value for the SET_SRC. */
5845 /* Hash value for the SET_DEST. */
5847 /* The SET_DEST, with SUBREG, etc., stripped. */
5849 /* Place where the pointer to the INNER_DEST was found. */
5850 rtx
*inner_dest_loc
;
5851 /* Nonzero if the SET_SRC is in memory. */
5853 /* Nonzero if the SET_SRC is in a structure. */
5855 /* Nonzero if the SET_SRC contains something
5856 whose value cannot be predicted and understood. */
5858 /* Original machine mode, in case it becomes a CONST_INT. */
5859 enum machine_mode mode
;
5860 /* A constant equivalent for SET_SRC, if any. */
5862 /* Hash value of constant equivalent for SET_SRC. */
5863 unsigned src_const_hash
;
5864 /* Table entry for constant equivalent for SET_SRC, if any. */
5865 struct table_elt
*src_const_elt
;
5869 cse_insn (insn
, in_libcall_block
)
5871 int in_libcall_block
;
5873 register rtx x
= PATTERN (insn
);
5876 register int n_sets
= 0;
5878 /* Records what this insn does to set CC0. */
5879 rtx this_insn_cc0
= 0;
5880 enum machine_mode this_insn_cc0_mode
;
5881 struct write_data writes_memory
;
5882 static struct write_data init
= {0, 0, 0, 0};
5885 struct table_elt
*src_eqv_elt
= 0;
5886 int src_eqv_volatile
;
5887 int src_eqv_in_memory
;
5888 int src_eqv_in_struct
;
5889 unsigned src_eqv_hash
;
5894 writes_memory
= init
;
5896 /* Find all the SETs and CLOBBERs in this instruction.
5897 Record all the SETs in the array `set' and count them.
5898 Also determine whether there is a CLOBBER that invalidates
5899 all memory references, or all references at varying addresses. */
5901 if (GET_CODE (x
) == SET
)
5903 sets
= (struct set
*) alloca (sizeof (struct set
));
5906 /* Ignore SETs that are unconditional jumps.
5907 They never need cse processing, so this does not hurt.
5908 The reason is not efficiency but rather
5909 so that we can test at the end for instructions
5910 that have been simplified to unconditional jumps
5911 and not be misled by unchanged instructions
5912 that were unconditional jumps to begin with. */
5913 if (SET_DEST (x
) == pc_rtx
5914 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5917 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5918 The hard function value register is used only once, to copy to
5919 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5920 Ensure we invalidate the destination register. On the 80386 no
5921 other code would invalidate it since it is a fixed_reg.
5922 We need not check the return of apply_change_group; see canon_reg. */
5924 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5926 canon_reg (SET_SRC (x
), insn
);
5927 apply_change_group ();
5928 fold_rtx (SET_SRC (x
), insn
);
5929 invalidate (SET_DEST (x
));
5934 else if (GET_CODE (x
) == PARALLEL
)
5936 register int lim
= XVECLEN (x
, 0);
5938 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5940 /* Find all regs explicitly clobbered in this insn,
5941 and ensure they are not replaced with any other regs
5942 elsewhere in this insn.
5943 When a reg that is clobbered is also used for input,
5944 we should presume that that is for a reason,
5945 and we should not substitute some other register
5946 which is not supposed to be clobbered.
5947 Therefore, this loop cannot be merged into the one below
5948 because a CALL may precede a CLOBBER and refer to the
5949 value clobbered. We must not let a canonicalization do
5950 anything in that case. */
5951 for (i
= 0; i
< lim
; i
++)
5953 register rtx y
= XVECEXP (x
, 0, i
);
5954 if (GET_CODE (y
) == CLOBBER
)
5956 rtx clobbered
= XEXP (y
, 0);
5958 if (GET_CODE (clobbered
) == REG
5959 || GET_CODE (clobbered
) == SUBREG
)
5960 invalidate (clobbered
);
5961 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
5962 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
5963 invalidate (XEXP (clobbered
, 0));
5967 for (i
= 0; i
< lim
; i
++)
5969 register rtx y
= XVECEXP (x
, 0, i
);
5970 if (GET_CODE (y
) == SET
)
5972 /* As above, we ignore unconditional jumps and call-insns and
5973 ignore the result of apply_change_group. */
5974 if (GET_CODE (SET_SRC (y
)) == CALL
)
5976 canon_reg (SET_SRC (y
), insn
);
5977 apply_change_group ();
5978 fold_rtx (SET_SRC (y
), insn
);
5979 invalidate (SET_DEST (y
));
5981 else if (SET_DEST (y
) == pc_rtx
5982 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5985 sets
[n_sets
++].rtl
= y
;
5987 else if (GET_CODE (y
) == CLOBBER
)
5989 /* If we clobber memory, take note of that,
5990 and canon the address.
5991 This does nothing when a register is clobbered
5992 because we have already invalidated the reg. */
5993 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5995 canon_reg (XEXP (y
, 0), NULL_RTX
);
5996 note_mem_written (XEXP (y
, 0), &writes_memory
);
5999 else if (GET_CODE (y
) == USE
6000 && ! (GET_CODE (XEXP (y
, 0)) == REG
6001 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6002 canon_reg (y
, NULL_RTX
);
6003 else if (GET_CODE (y
) == CALL
)
6005 /* The result of apply_change_group can be ignored; see
6007 canon_reg (y
, insn
);
6008 apply_change_group ();
6013 else if (GET_CODE (x
) == CLOBBER
)
6015 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6017 canon_reg (XEXP (x
, 0), NULL_RTX
);
6018 note_mem_written (XEXP (x
, 0), &writes_memory
);
6022 /* Canonicalize a USE of a pseudo register or memory location. */
6023 else if (GET_CODE (x
) == USE
6024 && ! (GET_CODE (XEXP (x
, 0)) == REG
6025 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6026 canon_reg (XEXP (x
, 0), NULL_RTX
);
6027 else if (GET_CODE (x
) == CALL
)
6029 /* The result of apply_change_group can be ignored; see canon_reg. */
6030 canon_reg (x
, insn
);
6031 apply_change_group ();
6035 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
6037 /* Store the equivalent value in SRC_EQV, if different. */
6038 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6040 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
6041 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6044 /* Canonicalize sources and addresses of destinations.
6045 We do this in a separate pass to avoid problems when a MATCH_DUP is
6046 present in the insn pattern. In that case, we want to ensure that
6047 we don't break the duplicate nature of the pattern. So we will replace
6048 both operands at the same time. Otherwise, we would fail to find an
6049 equivalent substitution in the loop calling validate_change below.
6051 We used to suppress canonicalization of DEST if it appears in SRC,
6052 but we don't do this any more. */
6054 for (i
= 0; i
< n_sets
; i
++)
6056 rtx dest
= SET_DEST (sets
[i
].rtl
);
6057 rtx src
= SET_SRC (sets
[i
].rtl
);
6058 rtx
new = canon_reg (src
, insn
);
6060 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6061 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6062 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6063 || insn_n_dups
[recog_memoized (insn
)] > 0)
6064 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6066 SET_SRC (sets
[i
].rtl
) = new;
6068 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6070 validate_change (insn
, &XEXP (dest
, 1),
6071 canon_reg (XEXP (dest
, 1), insn
), 1);
6072 validate_change (insn
, &XEXP (dest
, 2),
6073 canon_reg (XEXP (dest
, 2), insn
), 1);
6076 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6077 || GET_CODE (dest
) == ZERO_EXTRACT
6078 || GET_CODE (dest
) == SIGN_EXTRACT
)
6079 dest
= XEXP (dest
, 0);
6081 if (GET_CODE (dest
) == MEM
)
6082 canon_reg (dest
, insn
);
6085 /* Now that we have done all the replacements, we can apply the change
6086 group and see if they all work. Note that this will cause some
6087 canonicalizations that would have worked individually not to be applied
6088 because some other canonicalization didn't work, but this should not
6091 The result of apply_change_group can be ignored; see canon_reg. */
6093 apply_change_group ();
6095 /* Set sets[i].src_elt to the class each source belongs to.
6096 Detect assignments from or to volatile things
6097 and set set[i] to zero so they will be ignored
6098 in the rest of this function.
6100 Nothing in this loop changes the hash table or the register chains. */
6102 for (i
= 0; i
< n_sets
; i
++)
6104 register rtx src
, dest
;
6105 register rtx src_folded
;
6106 register struct table_elt
*elt
= 0, *p
;
6107 enum machine_mode mode
;
6110 rtx src_related
= 0;
6111 struct table_elt
*src_const_elt
= 0;
6112 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6113 int src_related_cost
= 10000, src_elt_cost
= 10000;
6114 /* Set non-zero if we need to call force_const_mem on with the
6115 contents of src_folded before using it. */
6116 int src_folded_force_flag
= 0;
6118 dest
= SET_DEST (sets
[i
].rtl
);
6119 src
= SET_SRC (sets
[i
].rtl
);
6121 /* If SRC is a constant that has no machine mode,
6122 hash it with the destination's machine mode.
6123 This way we can keep different modes separate. */
6125 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6126 sets
[i
].mode
= mode
;
6130 enum machine_mode eqvmode
= mode
;
6131 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6132 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6134 hash_arg_in_memory
= 0;
6135 hash_arg_in_struct
= 0;
6136 src_eqv
= fold_rtx (src_eqv
, insn
);
6137 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6139 /* Find the equivalence class for the equivalent expression. */
6142 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6144 src_eqv_volatile
= do_not_record
;
6145 src_eqv_in_memory
= hash_arg_in_memory
;
6146 src_eqv_in_struct
= hash_arg_in_struct
;
6149 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6150 value of the INNER register, not the destination. So it is not
6151 a legal substitution for the source. But save it for later. */
6152 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6155 src_eqv_here
= src_eqv
;
6157 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6158 simplified result, which may not necessarily be valid. */
6159 src_folded
= fold_rtx (src
, insn
);
6161 /* If storing a constant in a bitfield, pre-truncate the constant
6162 so we will be able to record it later. */
6163 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6164 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6166 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6168 if (GET_CODE (src
) == CONST_INT
6169 && GET_CODE (width
) == CONST_INT
6170 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6171 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6173 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6174 << INTVAL (width
)) - 1));
6177 /* Compute SRC's hash code, and also notice if it
6178 should not be recorded at all. In that case,
6179 prevent any further processing of this assignment. */
6181 hash_arg_in_memory
= 0;
6182 hash_arg_in_struct
= 0;
6185 sets
[i
].src_hash
= HASH (src
, mode
);
6186 sets
[i
].src_volatile
= do_not_record
;
6187 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6188 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6191 /* It is no longer clear why we used to do this, but it doesn't
6192 appear to still be needed. So let's try without it since this
6193 code hurts cse'ing widened ops. */
6194 /* If source is a perverse subreg (such as QI treated as an SI),
6195 treat it as volatile. It may do the work of an SI in one context
6196 where the extra bits are not being used, but cannot replace an SI
6198 if (GET_CODE (src
) == SUBREG
6199 && (GET_MODE_SIZE (GET_MODE (src
))
6200 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6201 sets
[i
].src_volatile
= 1;
6204 /* Locate all possible equivalent forms for SRC. Try to replace
6205 SRC in the insn with each cheaper equivalent.
6207 We have the following types of equivalents: SRC itself, a folded
6208 version, a value given in a REG_EQUAL note, or a value related
6211 Each of these equivalents may be part of an additional class
6212 of equivalents (if more than one is in the table, they must be in
6213 the same class; we check for this).
6215 If the source is volatile, we don't do any table lookups.
6217 We note any constant equivalent for possible later use in a
6220 if (!sets
[i
].src_volatile
)
6221 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6223 sets
[i
].src_elt
= elt
;
6225 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6227 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6229 /* The REG_EQUAL is indicating that two formerly distinct
6230 classes are now equivalent. So merge them. */
6231 merge_equiv_classes (elt
, src_eqv_elt
);
6232 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6233 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6239 else if (src_eqv_elt
)
6242 /* Try to find a constant somewhere and record it in `src_const'.
6243 Record its table element, if any, in `src_const_elt'. Look in
6244 any known equivalences first. (If the constant is not in the
6245 table, also set `sets[i].src_const_hash'). */
6247 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6251 src_const_elt
= elt
;
6256 && (CONSTANT_P (src_folded
)
6257 /* Consider (minus (label_ref L1) (label_ref L2)) as
6258 "constant" here so we will record it. This allows us
6259 to fold switch statements when an ADDR_DIFF_VEC is used. */
6260 || (GET_CODE (src_folded
) == MINUS
6261 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6262 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6263 src_const
= src_folded
, src_const_elt
= elt
;
6264 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6265 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6267 /* If we don't know if the constant is in the table, get its
6268 hash code and look it up. */
6269 if (src_const
&& src_const_elt
== 0)
6271 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6272 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6275 sets
[i
].src_const
= src_const
;
6276 sets
[i
].src_const_elt
= src_const_elt
;
6278 /* If the constant and our source are both in the table, mark them as
6279 equivalent. Otherwise, if a constant is in the table but the source
6280 isn't, set ELT to it. */
6281 if (src_const_elt
&& elt
6282 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6283 merge_equiv_classes (elt
, src_const_elt
);
6284 else if (src_const_elt
&& elt
== 0)
6285 elt
= src_const_elt
;
6287 /* See if there is a register linearly related to a constant
6288 equivalent of SRC. */
6290 && (GET_CODE (src_const
) == CONST
6291 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6293 src_related
= use_related_value (src_const
, src_const_elt
);
6296 struct table_elt
*src_related_elt
6297 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6298 if (src_related_elt
&& elt
)
6300 if (elt
->first_same_value
6301 != src_related_elt
->first_same_value
)
6302 /* This can occur when we previously saw a CONST
6303 involving a SYMBOL_REF and then see the SYMBOL_REF
6304 twice. Merge the involved classes. */
6305 merge_equiv_classes (elt
, src_related_elt
);
6308 src_related_elt
= 0;
6310 else if (src_related_elt
&& elt
== 0)
6311 elt
= src_related_elt
;
6315 /* See if we have a CONST_INT that is already in a register in a
6318 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6319 && GET_MODE_CLASS (mode
) == MODE_INT
6320 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6322 enum machine_mode wider_mode
;
6324 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6325 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6326 && src_related
== 0;
6327 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6329 struct table_elt
*const_elt
6330 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6335 for (const_elt
= const_elt
->first_same_value
;
6336 const_elt
; const_elt
= const_elt
->next_same_value
)
6337 if (GET_CODE (const_elt
->exp
) == REG
)
6339 src_related
= gen_lowpart_if_possible (mode
,
6346 /* Another possibility is that we have an AND with a constant in
6347 a mode narrower than a word. If so, it might have been generated
6348 as part of an "if" which would narrow the AND. If we already
6349 have done the AND in a wider mode, we can use a SUBREG of that
6352 if (flag_expensive_optimizations
&& ! src_related
6353 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6354 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6356 enum machine_mode tmode
;
6357 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6359 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6360 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6361 tmode
= GET_MODE_WIDER_MODE (tmode
))
6363 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6364 struct table_elt
*larger_elt
;
6368 PUT_MODE (new_and
, tmode
);
6369 XEXP (new_and
, 0) = inner
;
6370 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6371 if (larger_elt
== 0)
6374 for (larger_elt
= larger_elt
->first_same_value
;
6375 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6376 if (GET_CODE (larger_elt
->exp
) == REG
)
6379 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6389 #ifdef LOAD_EXTEND_OP
6390 /* See if a MEM has already been loaded with a widening operation;
6391 if it has, we can use a subreg of that. Many CISC machines
6392 also have such operations, but this is only likely to be
6393 beneficial these machines. */
6395 if (flag_expensive_optimizations
&& src_related
== 0
6396 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6397 && GET_MODE_CLASS (mode
) == MODE_INT
6398 && GET_CODE (src
) == MEM
&& ! do_not_record
6399 && LOAD_EXTEND_OP (mode
) != NIL
)
6401 enum machine_mode tmode
;
6403 /* Set what we are trying to extend and the operation it might
6404 have been extended with. */
6405 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6406 XEXP (memory_extend_rtx
, 0) = src
;
6408 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6409 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6410 tmode
= GET_MODE_WIDER_MODE (tmode
))
6412 struct table_elt
*larger_elt
;
6414 PUT_MODE (memory_extend_rtx
, tmode
);
6415 larger_elt
= lookup (memory_extend_rtx
,
6416 HASH (memory_extend_rtx
, tmode
), tmode
);
6417 if (larger_elt
== 0)
6420 for (larger_elt
= larger_elt
->first_same_value
;
6421 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6422 if (GET_CODE (larger_elt
->exp
) == REG
)
6424 src_related
= gen_lowpart_if_possible (mode
,
6433 #endif /* LOAD_EXTEND_OP */
6435 if (src
== src_folded
)
6438 /* At this point, ELT, if non-zero, points to a class of expressions
6439 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6440 and SRC_RELATED, if non-zero, each contain additional equivalent
6441 expressions. Prune these latter expressions by deleting expressions
6442 already in the equivalence class.
6444 Check for an equivalent identical to the destination. If found,
6445 this is the preferred equivalent since it will likely lead to
6446 elimination of the insn. Indicate this by placing it in
6449 if (elt
) elt
= elt
->first_same_value
;
6450 for (p
= elt
; p
; p
= p
->next_same_value
)
6452 enum rtx_code code
= GET_CODE (p
->exp
);
6454 /* If the expression is not valid, ignore it. Then we do not
6455 have to check for validity below. In most cases, we can use
6456 `rtx_equal_p', since canonicalization has already been done. */
6457 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6460 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6462 else if (src_folded
&& GET_CODE (src_folded
) == code
6463 && rtx_equal_p (src_folded
, p
->exp
))
6465 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6466 && rtx_equal_p (src_eqv_here
, p
->exp
))
6468 else if (src_related
&& GET_CODE (src_related
) == code
6469 && rtx_equal_p (src_related
, p
->exp
))
6472 /* This is the same as the destination of the insns, we want
6473 to prefer it. Copy it to src_related. The code below will
6474 then give it a negative cost. */
6475 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6480 /* Find the cheapest valid equivalent, trying all the available
6481 possibilities. Prefer items not in the hash table to ones
6482 that are when they are equal cost. Note that we can never
6483 worsen an insn as the current contents will also succeed.
6484 If we find an equivalent identical to the destination, use it as best,
6485 since this insn will probably be eliminated in that case. */
6488 if (rtx_equal_p (src
, dest
))
6491 src_cost
= COST (src
);
6496 if (rtx_equal_p (src_eqv_here
, dest
))
6499 src_eqv_cost
= COST (src_eqv_here
);
6504 if (rtx_equal_p (src_folded
, dest
))
6505 src_folded_cost
= -1;
6507 src_folded_cost
= COST (src_folded
);
6512 if (rtx_equal_p (src_related
, dest
))
6513 src_related_cost
= -1;
6515 src_related_cost
= COST (src_related
);
6518 /* If this was an indirect jump insn, a known label will really be
6519 cheaper even though it looks more expensive. */
6520 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6521 src_folded
= src_const
, src_folded_cost
= -1;
6523 /* Terminate loop when replacement made. This must terminate since
6524 the current contents will be tested and will always be valid. */
6529 /* Skip invalid entries. */
6530 while (elt
&& GET_CODE (elt
->exp
) != REG
6531 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6532 elt
= elt
->next_same_value
;
6534 if (elt
) src_elt_cost
= elt
->cost
;
6536 /* Find cheapest and skip it for the next time. For items
6537 of equal cost, use this order:
6538 src_folded, src, src_eqv, src_related and hash table entry. */
6539 if (src_folded_cost
<= src_cost
6540 && src_folded_cost
<= src_eqv_cost
6541 && src_folded_cost
<= src_related_cost
6542 && src_folded_cost
<= src_elt_cost
)
6544 trial
= src_folded
, src_folded_cost
= 10000;
6545 if (src_folded_force_flag
)
6546 trial
= force_const_mem (mode
, trial
);
6548 else if (src_cost
<= src_eqv_cost
6549 && src_cost
<= src_related_cost
6550 && src_cost
<= src_elt_cost
)
6551 trial
= src
, src_cost
= 10000;
6552 else if (src_eqv_cost
<= src_related_cost
6553 && src_eqv_cost
<= src_elt_cost
)
6554 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6555 else if (src_related_cost
<= src_elt_cost
)
6556 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6559 trial
= copy_rtx (elt
->exp
);
6560 elt
= elt
->next_same_value
;
6561 src_elt_cost
= 10000;
6564 /* We don't normally have an insn matching (set (pc) (pc)), so
6565 check for this separately here. We will delete such an
6568 Tablejump insns contain a USE of the table, so simply replacing
6569 the operand with the constant won't match. This is simply an
6570 unconditional branch, however, and is therefore valid. Just
6571 insert the substitution here and we will delete and re-emit
6574 if (n_sets
== 1 && dest
== pc_rtx
6576 || (GET_CODE (trial
) == LABEL_REF
6577 && ! condjump_p (insn
))))
6579 /* If TRIAL is a label in front of a jump table, we are
6580 really falling through the switch (this is how casesi
6581 insns work), so we must branch around the table. */
6582 if (GET_CODE (trial
) == CODE_LABEL
6583 && NEXT_INSN (trial
) != 0
6584 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6585 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6586 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6588 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6590 SET_SRC (sets
[i
].rtl
) = trial
;
6591 cse_jumps_altered
= 1;
6595 /* Look for a substitution that makes a valid insn. */
6596 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6598 /* The result of apply_change_group can be ignored; see
6601 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6602 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6604 apply_change_group ();
6608 /* If we previously found constant pool entries for
6609 constants and this is a constant, try making a
6610 pool entry. Put it in src_folded unless we already have done
6611 this since that is where it likely came from. */
6613 else if (constant_pool_entries_cost
6614 && CONSTANT_P (trial
)
6615 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6616 && GET_MODE_CLASS (mode
) != MODE_CC
)
6618 src_folded_force_flag
= 1;
6620 src_folded_cost
= constant_pool_entries_cost
;
6624 src
= SET_SRC (sets
[i
].rtl
);
6626 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6627 However, there is an important exception: If both are registers
6628 that are not the head of their equivalence class, replace SET_SRC
6629 with the head of the class. If we do not do this, we will have
6630 both registers live over a portion of the basic block. This way,
6631 their lifetimes will likely abut instead of overlapping. */
6632 if (GET_CODE (dest
) == REG
6633 && REGNO_QTY_VALID_P (REGNO (dest
))
6634 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6635 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6636 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6637 /* Don't do this if the original insn had a hard reg as
6639 && (GET_CODE (sets
[i
].src
) != REG
6640 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6641 /* We can't call canon_reg here because it won't do anything if
6642 SRC is a hard register. */
6644 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6646 src
= SET_SRC (sets
[i
].rtl
)
6647 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6648 : gen_rtx (REG
, GET_MODE (src
), first
);
6650 /* If we had a constant that is cheaper than what we are now
6651 setting SRC to, use that constant. We ignored it when we
6652 thought we could make this into a no-op. */
6653 if (src_const
&& COST (src_const
) < COST (src
)
6654 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6658 /* If we made a change, recompute SRC values. */
6659 if (src
!= sets
[i
].src
)
6662 hash_arg_in_memory
= 0;
6663 hash_arg_in_struct
= 0;
6665 sets
[i
].src_hash
= HASH (src
, mode
);
6666 sets
[i
].src_volatile
= do_not_record
;
6667 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6668 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6669 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6672 /* If this is a single SET, we are setting a register, and we have an
6673 equivalent constant, we want to add a REG_NOTE. We don't want
6674 to write a REG_EQUAL note for a constant pseudo since verifying that
6675 that pseudo hasn't been eliminated is a pain. Such a note also
6676 won't help anything. */
6677 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6678 && GET_CODE (src_const
) != REG
)
6680 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6682 /* Record the actual constant value in a REG_EQUAL note, making
6683 a new one if one does not already exist. */
6685 XEXP (tem
, 0) = src_const
;
6687 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6688 src_const
, REG_NOTES (insn
));
6690 /* If storing a constant value in a register that
6691 previously held the constant value 0,
6692 record this fact with a REG_WAS_0 note on this insn.
6694 Note that the *register* is required to have previously held 0,
6695 not just any register in the quantity and we must point to the
6696 insn that set that register to zero.
6698 Rather than track each register individually, we just see if
6699 the last set for this quantity was for this register. */
6701 if (REGNO_QTY_VALID_P (REGNO (dest
))
6702 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6704 /* See if we previously had a REG_WAS_0 note. */
6705 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6706 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6708 if ((tem
= single_set (const_insn
)) != 0
6709 && rtx_equal_p (SET_DEST (tem
), dest
))
6712 XEXP (note
, 0) = const_insn
;
6714 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6715 const_insn
, REG_NOTES (insn
));
6720 /* Now deal with the destination. */
6722 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6724 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6725 to the MEM or REG within it. */
6726 while (GET_CODE (dest
) == SIGN_EXTRACT
6727 || GET_CODE (dest
) == ZERO_EXTRACT
6728 || GET_CODE (dest
) == SUBREG
6729 || GET_CODE (dest
) == STRICT_LOW_PART
)
6731 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6732 dest
= XEXP (dest
, 0);
6735 sets
[i
].inner_dest
= dest
;
6737 if (GET_CODE (dest
) == MEM
)
6739 dest
= fold_rtx (dest
, insn
);
6741 /* Decide whether we invalidate everything in memory,
6742 or just things at non-fixed places.
6743 Writing a large aggregate must invalidate everything
6744 because we don't know how long it is. */
6745 note_mem_written (dest
, &writes_memory
);
6748 /* Compute the hash code of the destination now,
6749 before the effects of this instruction are recorded,
6750 since the register values used in the address computation
6751 are those before this instruction. */
6752 sets
[i
].dest_hash
= HASH (dest
, mode
);
6754 /* Don't enter a bit-field in the hash table
6755 because the value in it after the store
6756 may not equal what was stored, due to truncation. */
6758 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6759 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6761 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6763 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6764 && GET_CODE (width
) == CONST_INT
6765 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6766 && ! (INTVAL (src_const
)
6767 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6768 /* Exception: if the value is constant,
6769 and it won't be truncated, record it. */
6773 /* This is chosen so that the destination will be invalidated
6774 but no new value will be recorded.
6775 We must invalidate because sometimes constant
6776 values can be recorded for bitfields. */
6777 sets
[i
].src_elt
= 0;
6778 sets
[i
].src_volatile
= 1;
6784 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6786 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6788 PUT_CODE (insn
, NOTE
);
6789 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6790 NOTE_SOURCE_FILE (insn
) = 0;
6791 cse_jumps_altered
= 1;
6792 /* One less use of the label this insn used to jump to. */
6793 --LABEL_NUSES (JUMP_LABEL (insn
));
6794 /* No more processing for this set. */
6798 /* If this SET is now setting PC to a label, we know it used to
6799 be a conditional or computed branch. So we see if we can follow
6800 it. If it was a computed branch, delete it and re-emit. */
6801 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6805 /* If this is not in the format for a simple branch and
6806 we are the only SET in it, re-emit it. */
6807 if (! simplejump_p (insn
) && n_sets
== 1)
6809 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6810 JUMP_LABEL (new) = XEXP (src
, 0);
6811 LABEL_NUSES (XEXP (src
, 0))++;
6816 /* Otherwise, force rerecognition, since it probably had
6817 a different pattern before.
6818 This shouldn't really be necessary, since whatever
6819 changed the source value above should have done this.
6820 Until the right place is found, might as well do this here. */
6821 INSN_CODE (insn
) = -1;
6823 /* Now that we've converted this jump to an unconditional jump,
6824 there is dead code after it. Delete the dead code until we
6825 reach a BARRIER, the end of the function, or a label. Do
6826 not delete NOTEs except for NOTE_INSN_DELETED since later
6827 phases assume these notes are retained. */
6831 while (NEXT_INSN (p
) != 0
6832 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6833 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6835 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6836 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6837 delete_insn (NEXT_INSN (p
));
6842 /* If we don't have a BARRIER immediately after INSN, put one there.
6843 Much code assumes that there are no NOTEs between a JUMP_INSN and
6846 if (NEXT_INSN (insn
) == 0
6847 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6848 emit_barrier_after (insn
);
6850 /* We might have two BARRIERs separated by notes. Delete the second
6853 if (p
!= insn
&& NEXT_INSN (p
) != 0
6854 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6855 delete_insn (NEXT_INSN (p
));
6857 cse_jumps_altered
= 1;
6861 /* If destination is volatile, invalidate it and then do no further
6862 processing for this assignment. */
6864 else if (do_not_record
)
6866 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6867 || GET_CODE (dest
) == MEM
)
6869 else if (GET_CODE (dest
) == STRICT_LOW_PART
6870 || GET_CODE (dest
) == ZERO_EXTRACT
)
6871 invalidate (XEXP (dest
, 0));
6875 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6876 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6879 /* If setting CC0, record what it was set to, or a constant, if it
6880 is equivalent to a constant. If it is being set to a floating-point
6881 value, make a COMPARE with the appropriate constant of 0. If we
6882 don't do this, later code can interpret this as a test against
6883 const0_rtx, which can cause problems if we try to put it into an
6884 insn as a floating-point operand. */
6885 if (dest
== cc0_rtx
)
6887 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6888 this_insn_cc0_mode
= mode
;
6889 if (FLOAT_MODE_P (mode
))
6890 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6896 /* Now enter all non-volatile source expressions in the hash table
6897 if they are not already present.
6898 Record their equivalence classes in src_elt.
6899 This way we can insert the corresponding destinations into
6900 the same classes even if the actual sources are no longer in them
6901 (having been invalidated). */
6903 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6904 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6906 register struct table_elt
*elt
;
6907 register struct table_elt
*classp
= sets
[0].src_elt
;
6908 rtx dest
= SET_DEST (sets
[0].rtl
);
6909 enum machine_mode eqvmode
= GET_MODE (dest
);
6911 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6913 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6916 if (insert_regs (src_eqv
, classp
, 0))
6917 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6918 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
6919 elt
->in_memory
= src_eqv_in_memory
;
6920 elt
->in_struct
= src_eqv_in_struct
;
6923 /* Check to see if src_eqv_elt is the same as a set source which
6924 does not yet have an elt, and if so set the elt of the set source
6926 for (i
= 0; i
< n_sets
; i
++)
6927 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
6928 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
6929 sets
[i
].src_elt
= src_eqv_elt
;
6932 for (i
= 0; i
< n_sets
; i
++)
6933 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6934 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6936 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6938 /* REG_EQUAL in setting a STRICT_LOW_PART
6939 gives an equivalent for the entire destination register,
6940 not just for the subreg being stored in now.
6941 This is a more interesting equivalence, so we arrange later
6942 to treat the entire reg as the destination. */
6943 sets
[i
].src_elt
= src_eqv_elt
;
6944 sets
[i
].src_hash
= src_eqv_hash
;
6948 /* Insert source and constant equivalent into hash table, if not
6950 register struct table_elt
*classp
= src_eqv_elt
;
6951 register rtx src
= sets
[i
].src
;
6952 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6953 enum machine_mode mode
6954 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6956 if (sets
[i
].src_elt
== 0)
6958 register struct table_elt
*elt
;
6960 /* Note that these insert_regs calls cannot remove
6961 any of the src_elt's, because they would have failed to
6962 match if not still valid. */
6963 if (insert_regs (src
, classp
, 0))
6964 sets
[i
].src_hash
= HASH (src
, mode
);
6965 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
6966 elt
->in_memory
= sets
[i
].src_in_memory
;
6967 elt
->in_struct
= sets
[i
].src_in_struct
;
6968 sets
[i
].src_elt
= classp
= elt
;
6971 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6972 && src
!= sets
[i
].src_const
6973 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6974 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6975 sets
[i
].src_const_hash
, mode
);
6978 else if (sets
[i
].src_elt
== 0)
6979 /* If we did not insert the source into the hash table (e.g., it was
6980 volatile), note the equivalence class for the REG_EQUAL value, if any,
6981 so that the destination goes into that class. */
6982 sets
[i
].src_elt
= src_eqv_elt
;
6984 invalidate_from_clobbers (&writes_memory
, x
);
6986 /* Some registers are invalidated by subroutine calls. Memory is
6987 invalidated by non-constant calls. */
6989 if (GET_CODE (insn
) == CALL_INSN
)
6991 static struct write_data everything
= {0, 1, 1, 1};
6993 if (! CONST_CALL_P (insn
))
6994 invalidate_memory (&everything
);
6995 invalidate_for_call ();
6998 /* Now invalidate everything set by this instruction.
6999 If a SUBREG or other funny destination is being set,
7000 sets[i].rtl is still nonzero, so here we invalidate the reg
7001 a part of which is being set. */
7003 for (i
= 0; i
< n_sets
; i
++)
7006 register rtx dest
= sets
[i
].inner_dest
;
7008 /* Needed for registers to remove the register from its
7009 previous quantity's chain.
7010 Needed for memory if this is a nonvarying address, unless
7011 we have just done an invalidate_memory that covers even those. */
7012 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7013 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7015 else if (GET_CODE (dest
) == STRICT_LOW_PART
7016 || GET_CODE (dest
) == ZERO_EXTRACT
)
7017 invalidate (XEXP (dest
, 0));
7020 /* Make sure registers mentioned in destinations
7021 are safe for use in an expression to be inserted.
7022 This removes from the hash table
7023 any invalid entry that refers to one of these registers.
7025 We don't care about the return value from mention_regs because
7026 we are going to hash the SET_DEST values unconditionally. */
7028 for (i
= 0; i
< n_sets
; i
++)
7029 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7030 mention_regs (SET_DEST (sets
[i
].rtl
));
7032 /* We may have just removed some of the src_elt's from the hash table.
7033 So replace each one with the current head of the same class. */
7035 for (i
= 0; i
< n_sets
; i
++)
7038 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7039 /* If elt was removed, find current head of same class,
7040 or 0 if nothing remains of that class. */
7042 register struct table_elt
*elt
= sets
[i
].src_elt
;
7044 while (elt
&& elt
->prev_same_value
)
7045 elt
= elt
->prev_same_value
;
7047 while (elt
&& elt
->first_same_value
== 0)
7048 elt
= elt
->next_same_value
;
7049 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7053 /* Now insert the destinations into their equivalence classes. */
7055 for (i
= 0; i
< n_sets
; i
++)
7058 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7059 register struct table_elt
*elt
;
7061 /* Don't record value if we are not supposed to risk allocating
7062 floating-point values in registers that might be wider than
7064 if ((flag_float_store
7065 && GET_CODE (dest
) == MEM
7066 && FLOAT_MODE_P (GET_MODE (dest
)))
7067 /* Don't record values of destinations set inside a libcall block
7068 since we might delete the libcall. Things should have been set
7069 up so we won't want to reuse such a value, but we play it safe
7072 /* If we didn't put a REG_EQUAL value or a source into the hash
7073 table, there is no point is recording DEST. */
7074 || sets
[i
].src_elt
== 0)
7077 /* STRICT_LOW_PART isn't part of the value BEING set,
7078 and neither is the SUBREG inside it.
7079 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7080 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7081 dest
= SUBREG_REG (XEXP (dest
, 0));
7083 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7084 /* Registers must also be inserted into chains for quantities. */
7085 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7086 /* If `insert_regs' changes something, the hash code must be
7088 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7090 elt
= insert (dest
, sets
[i
].src_elt
,
7091 sets
[i
].dest_hash
, GET_MODE (dest
));
7092 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
7095 /* This implicitly assumes a whole struct
7096 need not have MEM_IN_STRUCT_P.
7097 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7098 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7099 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7102 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7103 narrower than M2, and both M1 and M2 are the same number of words,
7104 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7105 make that equivalence as well.
7107 However, BAR may have equivalences for which gen_lowpart_if_possible
7108 will produce a simpler value than gen_lowpart_if_possible applied to
7109 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7110 BAR's equivalences. If we don't get a simplified form, make
7111 the SUBREG. It will not be used in an equivalence, but will
7112 cause two similar assignments to be detected.
7114 Note the loop below will find SUBREG_REG (DEST) since we have
7115 already entered SRC and DEST of the SET in the table. */
7117 if (GET_CODE (dest
) == SUBREG
7118 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
7119 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
7120 && (GET_MODE_SIZE (GET_MODE (dest
))
7121 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7122 && sets
[i
].src_elt
!= 0)
7124 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7125 struct table_elt
*elt
, *classp
= 0;
7127 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7128 elt
= elt
->next_same_value
)
7132 struct table_elt
*src_elt
;
7134 /* Ignore invalid entries. */
7135 if (GET_CODE (elt
->exp
) != REG
7136 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7139 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7141 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
7143 src_hash
= HASH (new_src
, new_mode
);
7144 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7146 /* Put the new source in the hash table is if isn't
7150 if (insert_regs (new_src
, classp
, 0))
7151 src_hash
= HASH (new_src
, new_mode
);
7152 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7153 src_elt
->in_memory
= elt
->in_memory
;
7154 src_elt
->in_struct
= elt
->in_struct
;
7156 else if (classp
&& classp
!= src_elt
->first_same_value
)
7157 /* Show that two things that we've seen before are
7158 actually the same. */
7159 merge_equiv_classes (src_elt
, classp
);
7161 classp
= src_elt
->first_same_value
;
7166 /* Special handling for (set REG0 REG1)
7167 where REG0 is the "cheapest", cheaper than REG1.
7168 After cse, REG1 will probably not be used in the sequel,
7169 so (if easily done) change this insn to (set REG1 REG0) and
7170 replace REG1 with REG0 in the previous insn that computed their value.
7171 Then REG1 will become a dead store and won't cloud the situation
7172 for later optimizations.
7174 Do not make this change if REG1 is a hard register, because it will
7175 then be used in the sequel and we may be changing a two-operand insn
7176 into a three-operand insn.
7178 Also do not do this if we are operating on a copy of INSN. */
7180 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7181 && NEXT_INSN (PREV_INSN (insn
)) == insn
7182 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7183 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7184 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7185 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7186 == REGNO (SET_DEST (sets
[0].rtl
))))
7188 rtx prev
= PREV_INSN (insn
);
7189 while (prev
&& GET_CODE (prev
) == NOTE
)
7190 prev
= PREV_INSN (prev
);
7192 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7193 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7195 rtx dest
= SET_DEST (sets
[0].rtl
);
7196 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7198 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7199 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7200 SET_SRC (sets
[0].rtl
), 1);
7201 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7202 apply_change_group ();
7204 /* If REG1 was equivalent to a constant, REG0 is not. */
7206 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7208 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7209 any REG_WAS_0 note on INSN to PREV. */
7210 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7212 remove_note (prev
, note
);
7214 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7217 remove_note (insn
, note
);
7218 XEXP (note
, 1) = REG_NOTES (prev
);
7219 REG_NOTES (prev
) = note
;
7224 /* If this is a conditional jump insn, record any known equivalences due to
7225 the condition being tested. */
7227 last_jump_equiv_class
= 0;
7228 if (GET_CODE (insn
) == JUMP_INSN
7229 && n_sets
== 1 && GET_CODE (x
) == SET
7230 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7231 record_jump_equiv (insn
, 0);
7234 /* If the previous insn set CC0 and this insn no longer references CC0,
7235 delete the previous insn. Here we use the fact that nothing expects CC0
7236 to be valid over an insn, which is true until the final pass. */
7237 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7238 && (tem
= single_set (prev_insn
)) != 0
7239 && SET_DEST (tem
) == cc0_rtx
7240 && ! reg_mentioned_p (cc0_rtx
, x
))
7242 PUT_CODE (prev_insn
, NOTE
);
7243 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7244 NOTE_SOURCE_FILE (prev_insn
) = 0;
7247 prev_insn_cc0
= this_insn_cc0
;
7248 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7254 /* Store 1 in *WRITES_PTR for those categories of memory ref
7255 that must be invalidated when the expression WRITTEN is stored in.
7256 If WRITTEN is null, say everything must be invalidated. */
7259 note_mem_written (written
, writes_ptr
)
7261 struct write_data
*writes_ptr
;
7263 static struct write_data everything
= {0, 1, 1, 1};
7266 *writes_ptr
= everything
;
7267 else if (GET_CODE (written
) == MEM
)
7269 /* Pushing or popping the stack invalidates just the stack pointer. */
7270 rtx addr
= XEXP (written
, 0);
7271 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7272 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7273 && GET_CODE (XEXP (addr
, 0)) == REG
7274 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7279 else if (GET_MODE (written
) == BLKmode
)
7280 *writes_ptr
= everything
;
7281 /* (mem (scratch)) means clobber everything. */
7282 else if (GET_CODE (addr
) == SCRATCH
)
7283 *writes_ptr
= everything
;
7284 else if (cse_rtx_addr_varies_p (written
))
7286 /* A varying address that is a sum indicates an array element,
7287 and that's just as good as a structure element
7288 in implying that we need not invalidate scalar variables.
7289 However, we must allow QImode aliasing of scalars, because the
7290 ANSI C standard allows character pointers to alias anything. */
7291 if (! ((MEM_IN_STRUCT_P (written
)
7292 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7293 && GET_MODE (written
) != QImode
))
7294 writes_ptr
->all
= 1;
7295 writes_ptr
->nonscalar
= 1;
7297 writes_ptr
->var
= 1;
7301 /* Perform invalidation on the basis of everything about an insn
7302 except for invalidating the actual places that are SET in it.
7303 This includes the places CLOBBERed, and anything that might
7304 alias with something that is SET or CLOBBERed.
7306 W points to the writes_memory for this insn, a struct write_data
7307 saying which kinds of memory references must be invalidated.
7308 X is the pattern of the insn. */
7311 invalidate_from_clobbers (w
, x
)
7312 struct write_data
*w
;
7315 /* If W->var is not set, W specifies no action.
7316 If W->all is set, this step gets all memory refs
7317 so they can be ignored in the rest of this function. */
7319 invalidate_memory (w
);
7323 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7324 reg_tick
[STACK_POINTER_REGNUM
]++;
7326 /* This should be *very* rare. */
7327 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7328 invalidate (stack_pointer_rtx
);
7331 if (GET_CODE (x
) == CLOBBER
)
7333 rtx ref
= XEXP (x
, 0);
7336 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7337 || (GET_CODE (ref
) == MEM
&& ! w
->all
))
7339 else if (GET_CODE (ref
) == STRICT_LOW_PART
7340 || GET_CODE (ref
) == ZERO_EXTRACT
)
7341 invalidate (XEXP (ref
, 0));
7344 else if (GET_CODE (x
) == PARALLEL
)
7347 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7349 register rtx y
= XVECEXP (x
, 0, i
);
7350 if (GET_CODE (y
) == CLOBBER
)
7352 rtx ref
= XEXP (y
, 0);
7355 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7356 || (GET_CODE (ref
) == MEM
&& !w
->all
))
7358 else if (GET_CODE (ref
) == STRICT_LOW_PART
7359 || GET_CODE (ref
) == ZERO_EXTRACT
)
7360 invalidate (XEXP (ref
, 0));
7367 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7368 and replace any registers in them with either an equivalent constant
7369 or the canonical form of the register. If we are inside an address,
7370 only do this if the address remains valid.
7372 OBJECT is 0 except when within a MEM in which case it is the MEM.
7374 Return the replacement for X. */
7377 cse_process_notes (x
, object
)
7381 enum rtx_code code
= GET_CODE (x
);
7382 char *fmt
= GET_RTX_FORMAT (code
);
7398 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7403 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7404 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7406 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7412 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7413 /* We don't substitute VOIDmode constants into these rtx,
7414 since they would impede folding. */
7415 if (GET_MODE (new) != VOIDmode
)
7416 validate_change (object
, &XEXP (x
, 0), new, 0);
7421 i
= reg_qty
[REGNO (x
)];
7423 /* Return a constant or a constant register. */
7424 if (REGNO_QTY_VALID_P (REGNO (x
))
7425 && qty_const
[i
] != 0
7426 && (CONSTANT_P (qty_const
[i
])
7427 || GET_CODE (qty_const
[i
]) == REG
))
7429 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7434 /* Otherwise, canonicalize this register. */
7435 return canon_reg (x
, NULL_RTX
);
7438 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7440 validate_change (object
, &XEXP (x
, i
),
7441 cse_process_notes (XEXP (x
, i
), object
), 0);
7446 /* Find common subexpressions between the end test of a loop and the beginning
7447 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7449 Often we have a loop where an expression in the exit test is used
7450 in the body of the loop. For example "while (*p) *q++ = *p++;".
7451 Because of the way we duplicate the loop exit test in front of the loop,
7452 however, we don't detect that common subexpression. This will be caught
7453 when global cse is implemented, but this is a quite common case.
7455 This function handles the most common cases of these common expressions.
7456 It is called after we have processed the basic block ending with the
7457 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7458 jumps to a label used only once. */
7461 cse_around_loop (loop_start
)
7466 struct table_elt
*p
;
7468 /* If the jump at the end of the loop doesn't go to the start, we don't
7470 for (insn
= PREV_INSN (loop_start
);
7471 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7472 insn
= PREV_INSN (insn
))
7476 || GET_CODE (insn
) != NOTE
7477 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7480 /* If the last insn of the loop (the end test) was an NE comparison,
7481 we will interpret it as an EQ comparison, since we fell through
7482 the loop. Any equivalences resulting from that comparison are
7483 therefore not valid and must be invalidated. */
7484 if (last_jump_equiv_class
)
7485 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7486 p
= p
->next_same_value
)
7487 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7488 || GET_CODE (p
->exp
) == SUBREG
)
7489 invalidate (p
->exp
);
7490 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7491 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7492 invalidate (XEXP (p
->exp
, 0));
7494 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7495 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7497 The only thing we do with SET_DEST is invalidate entries, so we
7498 can safely process each SET in order. It is slightly less efficient
7499 to do so, but we only want to handle the most common cases. */
7501 for (insn
= NEXT_INSN (loop_start
);
7502 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7503 && ! (GET_CODE (insn
) == NOTE
7504 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7505 insn
= NEXT_INSN (insn
))
7507 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7508 && (GET_CODE (PATTERN (insn
)) == SET
7509 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7510 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7511 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7512 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7513 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7514 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7515 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7516 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7521 /* Variable used for communications between the next two routines. */
7523 static struct write_data skipped_writes_memory
;
7525 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7526 since they are done elsewhere. This function is called via note_stores. */
7529 invalidate_skipped_set (dest
, set
)
7533 if (GET_CODE (set
) == CLOBBER
7540 if (GET_CODE (dest
) == MEM
)
7541 note_mem_written (dest
, &skipped_writes_memory
);
7543 /* There are times when an address can appear varying and be a PLUS
7544 during this scan when it would be a fixed address were we to know
7545 the proper equivalences. So promote "nonscalar" to be "all". */
7546 if (skipped_writes_memory
.nonscalar
)
7547 skipped_writes_memory
.all
= 1;
7549 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7550 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7552 else if (GET_CODE (dest
) == STRICT_LOW_PART
7553 || GET_CODE (dest
) == ZERO_EXTRACT
)
7554 invalidate (XEXP (dest
, 0));
7557 /* Invalidate all insns from START up to the end of the function or the
7558 next label. This called when we wish to CSE around a block that is
7559 conditionally executed. */
7562 invalidate_skipped_block (start
)
7566 static struct write_data init
= {0, 0, 0, 0};
7567 static struct write_data everything
= {0, 1, 1, 1};
7569 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7570 insn
= NEXT_INSN (insn
))
7572 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7575 skipped_writes_memory
= init
;
7577 if (GET_CODE (insn
) == CALL_INSN
)
7579 invalidate_for_call ();
7580 skipped_writes_memory
= everything
;
7583 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7584 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7588 /* Used for communication between the following two routines; contains a
7589 value to be checked for modification. */
7591 static rtx cse_check_loop_start_value
;
7593 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7594 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7597 cse_check_loop_start (x
, set
)
7601 if (cse_check_loop_start_value
== 0
7602 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7605 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7606 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7607 cse_check_loop_start_value
= 0;
7610 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7611 a loop that starts with the label at LOOP_START.
7613 If X is a SET, we see if its SET_SRC is currently in our hash table.
7614 If so, we see if it has a value equal to some register used only in the
7615 loop exit code (as marked by jump.c).
7617 If those two conditions are true, we search backwards from the start of
7618 the loop to see if that same value was loaded into a register that still
7619 retains its value at the start of the loop.
7621 If so, we insert an insn after the load to copy the destination of that
7622 load into the equivalent register and (try to) replace our SET_SRC with that
7625 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7628 cse_set_around_loop (x
, insn
, loop_start
)
7633 struct table_elt
*src_elt
;
7634 static struct write_data init
= {0, 0, 0, 0};
7635 struct write_data writes_memory
;
7637 writes_memory
= init
;
7639 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7640 are setting PC or CC0 or whose SET_SRC is already a register. */
7641 if (GET_CODE (x
) == SET
7642 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7643 && GET_CODE (SET_SRC (x
)) != REG
)
7645 src_elt
= lookup (SET_SRC (x
),
7646 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7647 GET_MODE (SET_DEST (x
)));
7650 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7651 src_elt
= src_elt
->next_same_value
)
7652 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7653 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7657 /* Look for an insn in front of LOOP_START that sets
7658 something in the desired mode to SET_SRC (x) before we hit
7659 a label or CALL_INSN. */
7661 for (p
= prev_nonnote_insn (loop_start
);
7662 p
&& GET_CODE (p
) != CALL_INSN
7663 && GET_CODE (p
) != CODE_LABEL
;
7664 p
= prev_nonnote_insn (p
))
7665 if ((set
= single_set (p
)) != 0
7666 && GET_CODE (SET_DEST (set
)) == REG
7667 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7668 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7670 /* We now have to ensure that nothing between P
7671 and LOOP_START modified anything referenced in
7672 SET_SRC (x). We know that nothing within the loop
7673 can modify it, or we would have invalidated it in
7677 cse_check_loop_start_value
= SET_SRC (x
);
7678 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7679 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7680 note_stores (PATTERN (q
), cse_check_loop_start
);
7682 /* If nothing was changed and we can replace our
7683 SET_SRC, add an insn after P to copy its destination
7684 to what we will be replacing SET_SRC with. */
7685 if (cse_check_loop_start_value
7686 && validate_change (insn
, &SET_SRC (x
),
7688 emit_insn_after (gen_move_insn (src_elt
->exp
,
7696 /* Now invalidate anything modified by X. */
7697 note_mem_written (SET_DEST (x
), &writes_memory
);
7699 if (writes_memory
.var
)
7700 invalidate_memory (&writes_memory
);
7702 /* See comment on similar code in cse_insn for explanation of these tests. */
7703 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7704 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7705 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7706 invalidate (SET_DEST (x
));
7707 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
7708 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
7709 invalidate (XEXP (SET_DEST (x
), 0));
7712 /* Find the end of INSN's basic block and return its range,
7713 the total number of SETs in all the insns of the block, the last insn of the
7714 block, and the branch path.
7716 The branch path indicates which branches should be followed. If a non-zero
7717 path size is specified, the block should be rescanned and a different set
7718 of branches will be taken. The branch path is only used if
7719 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7721 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7722 used to describe the block. It is filled in with the information about
7723 the current block. The incoming structure's branch path, if any, is used
7724 to construct the output branch path. */
7727 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7729 struct cse_basic_block_data
*data
;
7736 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7737 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7738 int path_size
= data
->path_size
;
7742 /* Update the previous branch path, if any. If the last branch was
7743 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7744 shorten the path by one and look at the previous branch. We know that
7745 at least one branch must have been taken if PATH_SIZE is non-zero. */
7746 while (path_size
> 0)
7748 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7750 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7757 /* Scan to end of this basic block. */
7758 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7760 /* Don't cse out the end of a loop. This makes a difference
7761 only for the unusual loops that always execute at least once;
7762 all other loops have labels there so we will stop in any case.
7763 Cse'ing out the end of the loop is dangerous because it
7764 might cause an invariant expression inside the loop
7765 to be reused after the end of the loop. This would make it
7766 hard to move the expression out of the loop in loop.c,
7767 especially if it is one of several equivalent expressions
7768 and loop.c would like to eliminate it.
7770 If we are running after loop.c has finished, we can ignore
7771 the NOTE_INSN_LOOP_END. */
7773 if (! after_loop
&& GET_CODE (p
) == NOTE
7774 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7777 /* Don't cse over a call to setjmp; on some machines (eg vax)
7778 the regs restored by the longjmp come from
7779 a later time than the setjmp. */
7780 if (GET_CODE (p
) == NOTE
7781 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7784 /* A PARALLEL can have lots of SETs in it,
7785 especially if it is really an ASM_OPERANDS. */
7786 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7787 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7788 nsets
+= XVECLEN (PATTERN (p
), 0);
7789 else if (GET_CODE (p
) != NOTE
)
7792 /* Ignore insns made by CSE; they cannot affect the boundaries of
7795 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
7796 high_cuid
= INSN_CUID (p
);
7797 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
7798 low_cuid
= INSN_CUID (p
);
7800 /* See if this insn is in our branch path. If it is and we are to
7802 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7804 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7807 /* Point to next entry in path, if any. */
7811 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7812 was specified, we haven't reached our maximum path length, there are
7813 insns following the target of the jump, this is the only use of the
7814 jump label, and the target label is preceded by a BARRIER.
7816 Alternatively, we can follow the jump if it branches around a
7817 block of code and there are no other branches into the block.
7818 In this case invalidate_skipped_block will be called to invalidate any
7819 registers set in the block when following the jump. */
7821 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7822 && GET_CODE (p
) == JUMP_INSN
7823 && GET_CODE (PATTERN (p
)) == SET
7824 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7825 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7826 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7828 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7829 if ((GET_CODE (q
) != NOTE
7830 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7831 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7832 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7835 /* If we ran into a BARRIER, this code is an extension of the
7836 basic block when the branch is taken. */
7837 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7839 /* Don't allow ourself to keep walking around an
7840 always-executed loop. */
7841 if (next_real_insn (q
) == next
)
7847 /* Similarly, don't put a branch in our path more than once. */
7848 for (i
= 0; i
< path_entry
; i
++)
7849 if (data
->path
[i
].branch
== p
)
7852 if (i
!= path_entry
)
7855 data
->path
[path_entry
].branch
= p
;
7856 data
->path
[path_entry
++].status
= TAKEN
;
7858 /* This branch now ends our path. It was possible that we
7859 didn't see this branch the last time around (when the
7860 insn in front of the target was a JUMP_INSN that was
7861 turned into a no-op). */
7862 path_size
= path_entry
;
7865 /* Mark block so we won't scan it again later. */
7866 PUT_MODE (NEXT_INSN (p
), QImode
);
7868 /* Detect a branch around a block of code. */
7869 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7873 if (next_real_insn (q
) == next
)
7879 for (i
= 0; i
< path_entry
; i
++)
7880 if (data
->path
[i
].branch
== p
)
7883 if (i
!= path_entry
)
7886 /* This is no_labels_between_p (p, q) with an added check for
7887 reaching the end of a function (in case Q precedes P). */
7888 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7889 if (GET_CODE (tmp
) == CODE_LABEL
)
7894 data
->path
[path_entry
].branch
= p
;
7895 data
->path
[path_entry
++].status
= AROUND
;
7897 path_size
= path_entry
;
7900 /* Mark block so we won't scan it again later. */
7901 PUT_MODE (NEXT_INSN (p
), QImode
);
7908 data
->low_cuid
= low_cuid
;
7909 data
->high_cuid
= high_cuid
;
7910 data
->nsets
= nsets
;
7913 /* If all jumps in the path are not taken, set our path length to zero
7914 so a rescan won't be done. */
7915 for (i
= path_size
- 1; i
>= 0; i
--)
7916 if (data
->path
[i
].status
!= NOT_TAKEN
)
7920 data
->path_size
= 0;
7922 data
->path_size
= path_size
;
7924 /* End the current branch path. */
7925 data
->path
[path_size
].branch
= 0;
7928 /* Perform cse on the instructions of a function.
7929 F is the first instruction.
7930 NREGS is one plus the highest pseudo-reg number used in the instruction.
7932 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7933 (only if -frerun-cse-after-loop).
7935 Returns 1 if jump_optimize should be redone due to simplifications
7936 in conditional jump instructions. */
7939 cse_main (f
, nregs
, after_loop
, file
)
7945 struct cse_basic_block_data val
;
7946 register rtx insn
= f
;
7949 cse_jumps_altered
= 0;
7950 constant_pool_entries_cost
= 0;
7957 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7958 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7960 for (i
= 0; i
< nregs
; i
++)
7962 all_minus_one
[i
] = -1;
7966 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7967 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7968 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7969 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7970 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7972 #ifdef LOAD_EXTEND_OP
7974 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7975 and change the code and mode as appropriate. */
7976 memory_extend_rtx
= gen_rtx (ZERO_EXTEND
, VOIDmode
, 0);
7979 /* Discard all the free elements of the previous function
7980 since they are allocated in the temporarily obstack. */
7981 bzero (table
, sizeof table
);
7982 free_element_chain
= 0;
7983 n_elements_made
= 0;
7985 /* Find the largest uid. */
7987 max_uid
= get_max_uid ();
7988 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
7989 bzero (uid_cuid
, (max_uid
+ 1) * sizeof (int));
7991 /* Compute the mapping from uids to cuids.
7992 CUIDs are numbers assigned to insns, like uids,
7993 except that cuids increase monotonically through the code.
7994 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7995 between two insns is not affected by -g. */
7997 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7999 if (GET_CODE (insn
) != NOTE
8000 || NOTE_LINE_NUMBER (insn
) < 0)
8001 INSN_CUID (insn
) = ++i
;
8003 /* Give a line number note the same cuid as preceding insn. */
8004 INSN_CUID (insn
) = i
;
8007 /* Initialize which registers are clobbered by calls. */
8009 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8011 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8012 if ((call_used_regs
[i
]
8013 /* Used to check !fixed_regs[i] here, but that isn't safe;
8014 fixed regs are still call-clobbered, and sched can get
8015 confused if they can "live across calls".
8017 The frame pointer is always preserved across calls. The arg
8018 pointer is if it is fixed. The stack pointer usually is, unless
8019 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8020 will be present. If we are generating PIC code, the PIC offset
8021 table register is preserved across calls. */
8023 && i
!= STACK_POINTER_REGNUM
8024 && i
!= FRAME_POINTER_REGNUM
8025 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8026 && i
!= HARD_FRAME_POINTER_REGNUM
8028 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8029 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8031 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8032 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8036 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8038 /* Loop over basic blocks.
8039 Compute the maximum number of qty's needed for each basic block
8040 (which is 2 for each SET). */
8044 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8045 flag_cse_skip_blocks
);
8047 /* If this basic block was already processed or has no sets, skip it. */
8048 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8050 PUT_MODE (insn
, VOIDmode
);
8051 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8056 cse_basic_block_start
= val
.low_cuid
;
8057 cse_basic_block_end
= val
.high_cuid
;
8058 max_qty
= val
.nsets
* 2;
8061 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8062 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8065 /* Make MAX_QTY bigger to give us room to optimize
8066 past the end of this basic block, if that should prove useful. */
8072 /* If this basic block is being extended by following certain jumps,
8073 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8074 Otherwise, we start after this basic block. */
8075 if (val
.path_size
> 0)
8076 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8079 int old_cse_jumps_altered
= cse_jumps_altered
;
8082 /* When cse changes a conditional jump to an unconditional
8083 jump, we want to reprocess the block, since it will give
8084 us a new branch path to investigate. */
8085 cse_jumps_altered
= 0;
8086 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8087 if (cse_jumps_altered
== 0
8088 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8091 cse_jumps_altered
|= old_cse_jumps_altered
;
8099 /* Tell refers_to_mem_p that qty_const info is not available. */
8102 if (max_elements_made
< n_elements_made
)
8103 max_elements_made
= n_elements_made
;
8105 return cse_jumps_altered
;
8108 /* Process a single basic block. FROM and TO and the limits of the basic
8109 block. NEXT_BRANCH points to the branch path when following jumps or
8110 a null path when not following jumps.
8112 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8113 loop. This is true when we are being called for the last time on a
8114 block and this CSE pass is before loop.c. */
8117 cse_basic_block (from
, to
, next_branch
, around_loop
)
8118 register rtx from
, to
;
8119 struct branch_path
*next_branch
;
8124 int in_libcall_block
= 0;
8126 /* Each of these arrays is undefined before max_reg, so only allocate
8127 the space actually needed and adjust the start below. */
8129 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8130 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8131 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8132 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8133 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8135 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8136 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8137 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8139 qty_first_reg
-= max_reg
;
8140 qty_last_reg
-= max_reg
;
8141 qty_mode
-= max_reg
;
8142 qty_const
-= max_reg
;
8143 qty_const_insn
-= max_reg
;
8144 qty_comparison_code
-= max_reg
;
8145 qty_comparison_qty
-= max_reg
;
8146 qty_comparison_const
-= max_reg
;
8150 /* TO might be a label. If so, protect it from being deleted. */
8151 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8154 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8156 register enum rtx_code code
;
8158 /* See if this is a branch that is part of the path. If so, and it is
8159 to be taken, do so. */
8160 if (next_branch
->branch
== insn
)
8162 enum taken status
= next_branch
++->status
;
8163 if (status
!= NOT_TAKEN
)
8165 if (status
== TAKEN
)
8166 record_jump_equiv (insn
, 1);
8168 invalidate_skipped_block (NEXT_INSN (insn
));
8170 /* Set the last insn as the jump insn; it doesn't affect cc0.
8171 Then follow this branch. */
8176 insn
= JUMP_LABEL (insn
);
8181 code
= GET_CODE (insn
);
8182 if (GET_MODE (insn
) == QImode
)
8183 PUT_MODE (insn
, VOIDmode
);
8185 if (GET_RTX_CLASS (code
) == 'i')
8187 /* Process notes first so we have all notes in canonical forms when
8188 looking for duplicate operations. */
8190 if (REG_NOTES (insn
))
8191 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8193 /* Track when we are inside in LIBCALL block. Inside such a block,
8194 we do not want to record destinations. The last insn of a
8195 LIBCALL block is not considered to be part of the block, since
8196 its destination is the result of the block and hence should be
8199 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8200 in_libcall_block
= 1;
8201 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8202 in_libcall_block
= 0;
8204 cse_insn (insn
, in_libcall_block
);
8207 /* If INSN is now an unconditional jump, skip to the end of our
8208 basic block by pretending that we just did the last insn in the
8209 basic block. If we are jumping to the end of our block, show
8210 that we can have one usage of TO. */
8212 if (simplejump_p (insn
))
8217 if (JUMP_LABEL (insn
) == to
)
8220 /* Maybe TO was deleted because the jump is unconditional.
8221 If so, there is nothing left in this basic block. */
8222 /* ??? Perhaps it would be smarter to set TO
8223 to whatever follows this insn,
8224 and pretend the basic block had always ended here. */
8225 if (INSN_DELETED_P (to
))
8228 insn
= PREV_INSN (to
);
8231 /* See if it is ok to keep on going past the label
8232 which used to end our basic block. Remember that we incremented
8233 the count of that label, so we decrement it here. If we made
8234 a jump unconditional, TO_USAGE will be one; in that case, we don't
8235 want to count the use in that jump. */
8237 if (to
!= 0 && NEXT_INSN (insn
) == to
8238 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8240 struct cse_basic_block_data val
;
8242 insn
= NEXT_INSN (to
);
8244 if (LABEL_NUSES (to
) == 0)
8247 /* Find the end of the following block. Note that we won't be
8248 following branches in this case. If TO was the last insn
8249 in the function, we are done. Similarly, if we deleted the
8250 insn after TO, it must have been because it was preceded by
8251 a BARRIER. In that case, we are done with this block because it
8252 has no continuation. */
8254 if (insn
== 0 || INSN_DELETED_P (insn
))
8259 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8261 /* If the tables we allocated have enough space left
8262 to handle all the SETs in the next basic block,
8263 continue through it. Otherwise, return,
8264 and that block will be scanned individually. */
8265 if (val
.nsets
* 2 + next_qty
> max_qty
)
8268 cse_basic_block_start
= val
.low_cuid
;
8269 cse_basic_block_end
= val
.high_cuid
;
8272 /* Prevent TO from being deleted if it is a label. */
8273 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8276 /* Back up so we process the first insn in the extension. */
8277 insn
= PREV_INSN (insn
);
8281 if (next_qty
> max_qty
)
8284 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8285 the previous insn is the only insn that branches to the head of a loop,
8286 we can cse into the loop. Don't do this if we changed the jump
8287 structure of a loop unless we aren't going to be following jumps. */
8289 if ((cse_jumps_altered
== 0
8290 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8291 && around_loop
&& to
!= 0
8292 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8293 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8294 && JUMP_LABEL (PREV_INSN (to
)) != 0
8295 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8296 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8298 return to
? NEXT_INSN (to
) : 0;
8301 /* Count the number of times registers are used (not set) in X.
8302 COUNTS is an array in which we accumulate the count, INCR is how much
8303 we count each register usage.
8305 Don't count a usage of DEST, which is the SET_DEST of a SET which
8306 contains X in its SET_SRC. This is because such a SET does not
8307 modify the liveness of DEST. */
8310 count_reg_usage (x
, counts
, dest
, incr
)
8316 enum rtx_code code
= GET_CODE (x
);
8324 counts
[REGNO (x
)] += incr
;
8338 /* Unless we are setting a REG, count everything in SET_DEST. */
8339 if (GET_CODE (SET_DEST (x
)) != REG
)
8340 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8342 /* If SRC has side-effects, then we can't delete this insn, so the
8343 usage of SET_DEST inside SRC counts.
8345 ??? Strictly-speaking, we might be preserving this insn
8346 because some other SET has side-effects, but that's hard
8347 to do and can't happen now. */
8348 count_reg_usage (SET_SRC (x
), counts
,
8349 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8356 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8358 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8362 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8367 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
8368 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8370 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8374 fmt
= GET_RTX_FORMAT (code
);
8375 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8378 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8379 else if (fmt
[i
] == 'E')
8380 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8381 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8385 /* Scan all the insns and delete any that are dead; i.e., they store a register
8386 that is never used or they copy a register to itself.
8388 This is used to remove insns made obviously dead by cse. It improves the
8389 heuristics in loop since it won't try to move dead invariants out of loops
8390 or make givs for dead quantities. The remaining passes of the compilation
8391 are also sped up. */
8394 delete_dead_from_cse (insns
, nreg
)
8398 int *counts
= (int *) alloca (nreg
* sizeof (int));
8404 /* First count the number of times each register is used. */
8405 bzero (counts
, sizeof (int) * nreg
);
8406 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8407 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8409 /* Go from the last insn to the first and delete insns that only set unused
8410 registers or copy a register to itself. As we delete an insn, remove
8411 usage counts for registers it uses. */
8412 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8416 prev
= prev_real_insn (insn
);
8418 /* Don't delete any insns that are part of a libcall block.
8419 Flow or loop might get confused if we did that. Remember
8420 that we are scanning backwards. */
8421 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8426 else if (GET_CODE (PATTERN (insn
)) == SET
)
8428 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8429 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8433 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8434 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8435 && ((tem
= next_nonnote_insn (insn
)) == 0
8436 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8437 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8440 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8441 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8442 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8443 || side_effects_p (SET_SRC (PATTERN (insn
))))
8446 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8447 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8449 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8451 if (GET_CODE (elt
) == SET
)
8453 if (GET_CODE (SET_DEST (elt
)) == REG
8454 && SET_DEST (elt
) == SET_SRC (elt
))
8458 else if (GET_CODE (SET_DEST (elt
)) == CC0
8459 && ! side_effects_p (SET_SRC (elt
))
8460 && ((tem
= next_nonnote_insn (insn
)) == 0
8461 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8462 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8465 else if (GET_CODE (SET_DEST (elt
)) != REG
8466 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8467 || counts
[REGNO (SET_DEST (elt
))] != 0
8468 || side_effects_p (SET_SRC (elt
)))
8471 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8477 /* If this is a dead insn, delete it and show registers in it aren't
8482 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8486 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))