1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
26 #include "hard-reg-set.h"
28 #include "basic-block.h"
30 #include "insn-config.h"
39 #include "diagnostic-core.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
51 /* The basic idea of common subexpression elimination is to go
52 through the code, keeping a record of expressions that would
53 have the same value at the current scan point, and replacing
54 expressions encountered with the cheapest equivalent expression.
56 It is too complicated to keep track of the different possibilities
57 when control paths merge in this code; so, at each label, we forget all
58 that is known and start fresh. This can be described as processing each
59 extended basic block separately. We have a separate pass to perform
62 Note CSE can turn a conditional or computed jump into a nop or
63 an unconditional jump. When this occurs we arrange to run the jump
64 optimizer after CSE to delete the unreachable code.
66 We use two data structures to record the equivalent expressions:
67 a hash table for most expressions, and a vector of "quantity
68 numbers" to record equivalent (pseudo) registers.
70 The use of the special data structure for registers is desirable
71 because it is faster. It is possible because registers references
72 contain a fairly small number, the register number, taken from
73 a contiguously allocated series, and two register references are
74 identical if they have the same number. General expressions
75 do not have any such thing, so the only way to retrieve the
76 information recorded on an expression other than a register
77 is to keep it in a hash table.
79 Registers and "quantity numbers":
81 At the start of each basic block, all of the (hardware and pseudo)
82 registers used in the function are given distinct quantity
83 numbers to indicate their contents. During scan, when the code
84 copies one register into another, we copy the quantity number.
85 When a register is loaded in any other way, we allocate a new
86 quantity number to describe the value generated by this operation.
87 `REG_QTY (N)' records what quantity register N is currently thought
90 All real quantity numbers are greater than or equal to zero.
91 If register N has not been assigned a quantity, `REG_QTY (N)' will
92 equal -N - 1, which is always negative.
94 Quantity numbers below zero do not exist and none of the `qty_table'
95 entries should be referenced with a negative index.
97 We also maintain a bidirectional chain of registers for each
98 quantity number. The `qty_table` members `first_reg' and `last_reg',
99 and `reg_eqv_table' members `next' and `prev' hold these chains.
101 The first register in a chain is the one whose lifespan is least local.
102 Among equals, it is the one that was seen first.
103 We replace any equivalent register with that one.
105 If two registers have the same quantity number, it must be true that
106 REG expressions with qty_table `mode' must be in the hash table for both
107 registers and must be in the same class.
109 The converse is not true. Since hard registers may be referenced in
110 any mode, two REG expressions might be equivalent in the hash table
111 but not have the same quantity number if the quantity number of one
112 of the registers is not the same mode as those expressions.
114 Constants and quantity numbers
116 When a quantity has a known constant value, that value is stored
117 in the appropriate qty_table `const_rtx'. This is in addition to
118 putting the constant in the hash table as is usual for non-regs.
120 Whether a reg or a constant is preferred is determined by the configuration
121 macro CONST_COSTS and will often depend on the constant value. In any
122 event, expressions containing constants can be simplified, by fold_rtx.
124 When a quantity has a known nearly constant value (such as an address
125 of a stack slot), that value is stored in the appropriate qty_table
128 Integer constants don't have a machine mode. However, cse
129 determines the intended machine mode from the destination
130 of the instruction that moves the constant. The machine mode
131 is recorded in the hash table along with the actual RTL
132 constant expression so that different modes are kept separate.
136 To record known equivalences among expressions in general
137 we use a hash table called `table'. It has a fixed number of buckets
138 that contain chains of `struct table_elt' elements for expressions.
139 These chains connect the elements whose expressions have the same
142 Other chains through the same elements connect the elements which
143 currently have equivalent values.
145 Register references in an expression are canonicalized before hashing
146 the expression. This is done using `reg_qty' and qty_table `first_reg'.
147 The hash code of a register reference is computed using the quantity
148 number, not the register number.
150 When the value of an expression changes, it is necessary to remove from the
151 hash table not just that expression but all expressions whose values
152 could be different as a result.
154 1. If the value changing is in memory, except in special cases
155 ANYTHING referring to memory could be changed. That is because
156 nobody knows where a pointer does not point.
157 The function `invalidate_memory' removes what is necessary.
159 The special cases are when the address is constant or is
160 a constant plus a fixed register such as the frame pointer
161 or a static chain pointer. When such addresses are stored in,
162 we can tell exactly which other such addresses must be invalidated
163 due to overlap. `invalidate' does this.
164 All expressions that refer to non-constant
165 memory addresses are also invalidated. `invalidate_memory' does this.
167 2. If the value changing is a register, all expressions
168 containing references to that register, and only those,
171 Because searching the entire hash table for expressions that contain
172 a register is very slow, we try to figure out when it isn't necessary.
173 Precisely, this is necessary only when expressions have been
174 entered in the hash table using this register, and then the value has
175 changed, and then another expression wants to be added to refer to
176 the register's new value. This sequence of circumstances is rare
177 within any one basic block.
179 `REG_TICK' and `REG_IN_TABLE', accessors for members of
180 cse_reg_info, are used to detect this case. REG_TICK (i) is
181 incremented whenever a value is stored in register i.
182 REG_IN_TABLE (i) holds -1 if no references to register i have been
183 entered in the table; otherwise, it contains the value REG_TICK (i)
184 had when the references were entered. If we want to enter a
185 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
186 remove old references. Until we want to enter a new entry, the
187 mere fact that the two vectors don't match makes the entries be
188 ignored if anyone tries to match them.
190 Registers themselves are entered in the hash table as well as in
191 the equivalent-register chains. However, `REG_TICK' and
192 `REG_IN_TABLE' do not apply to expressions which are simple
193 register references. These expressions are removed from the table
194 immediately when they become invalid, and this can be done even if
195 we do not immediately search for all the expressions that refer to
198 A CLOBBER rtx in an instruction invalidates its operand for further
199 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
200 invalidates everything that resides in memory.
204 Constant expressions that differ only by an additive integer
205 are called related. When a constant expression is put in
206 the table, the related expression with no constant term
207 is also entered. These are made to point at each other
208 so that it is possible to find out if there exists any
209 register equivalent to an expression related to a given expression. */
211 /* Length of qty_table vector. We know in advance we will not need
212 a quantity number this big. */
216 /* Next quantity number to be allocated.
217 This is 1 + the largest number needed so far. */
221 /* Per-qty information tracking.
223 `first_reg' and `last_reg' track the head and tail of the
224 chain of registers which currently contain this quantity.
226 `mode' contains the machine mode of this quantity.
228 `const_rtx' holds the rtx of the constant value of this
229 quantity, if known. A summations of the frame/arg pointer
230 and a constant can also be entered here. When this holds
231 a known value, `const_insn' is the insn which stored the
234 `comparison_{code,const,qty}' are used to track when a
235 comparison between a quantity and some constant or register has
236 been passed. In such a case, we know the results of the comparison
237 in case we see it again. These members record a comparison that
238 is known to be true. `comparison_code' holds the rtx code of such
239 a comparison, else it is set to UNKNOWN and the other two
240 comparison members are undefined. `comparison_const' holds
241 the constant being compared against, or zero if the comparison
242 is not against a constant. `comparison_qty' holds the quantity
243 being compared against when the result is known. If the comparison
244 is not with a register, `comparison_qty' is -1. */
246 struct qty_table_elem
249 rtx_insn
*const_insn
;
250 rtx comparison_const
;
252 unsigned int first_reg
, last_reg
;
253 /* The sizes of these fields should match the sizes of the
254 code and mode fields of struct rtx_def (see rtl.h). */
255 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
256 ENUM_BITFIELD(machine_mode
) mode
: 8;
259 /* The table of all qtys, indexed by qty number. */
260 static struct qty_table_elem
*qty_table
;
263 /* For machines that have a CC0, we do not record its value in the hash
264 table since its use is guaranteed to be the insn immediately following
265 its definition and any other insn is presumed to invalidate it.
267 Instead, we store below the current and last value assigned to CC0.
268 If it should happen to be a constant, it is stored in preference
269 to the actual assigned value. In case it is a constant, we store
270 the mode in which the constant should be interpreted. */
272 static rtx this_insn_cc0
, prev_insn_cc0
;
273 static enum machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
276 /* Insn being scanned. */
278 static rtx_insn
*this_insn
;
279 static bool optimize_this_for_speed_p
;
281 /* Index by register number, gives the number of the next (or
282 previous) register in the chain of registers sharing the same
285 Or -1 if this register is at the end of the chain.
287 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
289 /* Per-register equivalence chain. */
295 /* The table of all register equivalence chains. */
296 static struct reg_eqv_elem
*reg_eqv_table
;
300 /* The timestamp at which this register is initialized. */
301 unsigned int timestamp
;
303 /* The quantity number of the register's current contents. */
306 /* The number of times the register has been altered in the current
310 /* The REG_TICK value at which rtx's containing this register are
311 valid in the hash table. If this does not equal the current
312 reg_tick value, such expressions existing in the hash table are
316 /* The SUBREG that was set when REG_TICK was last incremented. Set
317 to -1 if the last store was to the whole register, not a subreg. */
318 unsigned int subreg_ticked
;
321 /* A table of cse_reg_info indexed by register numbers. */
322 static struct cse_reg_info
*cse_reg_info_table
;
324 /* The size of the above table. */
325 static unsigned int cse_reg_info_table_size
;
327 /* The index of the first entry that has not been initialized. */
328 static unsigned int cse_reg_info_table_first_uninitialized
;
330 /* The timestamp at the beginning of the current run of
331 cse_extended_basic_block. We increment this variable at the beginning of
332 the current run of cse_extended_basic_block. The timestamp field of a
333 cse_reg_info entry matches the value of this variable if and only
334 if the entry has been initialized during the current run of
335 cse_extended_basic_block. */
336 static unsigned int cse_reg_info_timestamp
;
338 /* A HARD_REG_SET containing all the hard registers for which there is
339 currently a REG expression in the hash table. Note the difference
340 from the above variables, which indicate if the REG is mentioned in some
341 expression in the table. */
343 static HARD_REG_SET hard_regs_in_table
;
345 /* True if CSE has altered the CFG. */
346 static bool cse_cfg_altered
;
348 /* True if CSE has altered conditional jump insns in such a way
349 that jump optimization should be redone. */
350 static bool cse_jumps_altered
;
352 /* True if we put a LABEL_REF into the hash table for an INSN
353 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
354 to put in the note. */
355 static bool recorded_label_ref
;
357 /* canon_hash stores 1 in do_not_record
358 if it notices a reference to CC0, PC, or some other volatile
361 static int do_not_record
;
363 /* canon_hash stores 1 in hash_arg_in_memory
364 if it notices a reference to memory within the expression being hashed. */
366 static int hash_arg_in_memory
;
368 /* The hash table contains buckets which are chains of `struct table_elt's,
369 each recording one expression's information.
370 That expression is in the `exp' field.
372 The canon_exp field contains a canonical (from the point of view of
373 alias analysis) version of the `exp' field.
375 Those elements with the same hash code are chained in both directions
376 through the `next_same_hash' and `prev_same_hash' fields.
378 Each set of expressions with equivalent values
379 are on a two-way chain through the `next_same_value'
380 and `prev_same_value' fields, and all point with
381 the `first_same_value' field at the first element in
382 that chain. The chain is in order of increasing cost.
383 Each element's cost value is in its `cost' field.
385 The `in_memory' field is nonzero for elements that
386 involve any reference to memory. These elements are removed
387 whenever a write is done to an unidentified location in memory.
388 To be safe, we assume that a memory address is unidentified unless
389 the address is either a symbol constant or a constant plus
390 the frame pointer or argument pointer.
392 The `related_value' field is used to connect related expressions
393 (that differ by adding an integer).
394 The related expressions are chained in a circular fashion.
395 `related_value' is zero for expressions for which this
398 The `cost' field stores the cost of this element's expression.
399 The `regcost' field stores the value returned by approx_reg_cost for
400 this element's expression.
402 The `is_const' flag is set if the element is a constant (including
405 The `flag' field is used as a temporary during some search routines.
407 The `mode' field is usually the same as GET_MODE (`exp'), but
408 if `exp' is a CONST_INT and has no machine mode then the `mode'
409 field is the mode it was being used as. Each constant is
410 recorded separately for each mode it is used with. */
416 struct table_elt
*next_same_hash
;
417 struct table_elt
*prev_same_hash
;
418 struct table_elt
*next_same_value
;
419 struct table_elt
*prev_same_value
;
420 struct table_elt
*first_same_value
;
421 struct table_elt
*related_value
;
424 /* The size of this field should match the size
425 of the mode field of struct rtx_def (see rtl.h). */
426 ENUM_BITFIELD(machine_mode
) mode
: 8;
432 /* We don't want a lot of buckets, because we rarely have very many
433 things stored in the hash table, and a lot of buckets slows
434 down a lot of loops that happen frequently. */
436 #define HASH_SIZE (1 << HASH_SHIFT)
437 #define HASH_MASK (HASH_SIZE - 1)
439 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
440 register (hard registers may require `do_not_record' to be set). */
443 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
444 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
445 : canon_hash (X, M)) & HASH_MASK)
447 /* Like HASH, but without side-effects. */
448 #define SAFE_HASH(X, M) \
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : safe_hash (X, M)) & HASH_MASK)
453 /* Determine whether register number N is considered a fixed register for the
454 purpose of approximating register costs.
455 It is desirable to replace other regs with fixed regs, to reduce need for
457 A reg wins if it is either the frame pointer or designated as fixed. */
458 #define FIXED_REGNO_P(N) \
459 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
460 || fixed_regs[N] || global_regs[N])
462 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
463 hard registers and pointers into the frame are the cheapest with a cost
464 of 0. Next come pseudos with a cost of one and other hard registers with
465 a cost of 2. Aside from these special cases, call `rtx_cost'. */
467 #define CHEAP_REGNO(N) \
468 (REGNO_PTR_FRAME_P (N) \
469 || (HARD_REGISTER_NUM_P (N) \
470 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
472 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
473 #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
475 /* Get the number of times this register has been updated in this
478 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
480 /* Get the point at which REG was recorded in the table. */
482 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
484 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
487 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
489 /* Get the quantity number for REG. */
491 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
493 /* Determine if the quantity number for register X represents a valid index
494 into the qty_table. */
496 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
498 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
500 #define CHEAPER(X, Y) \
501 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
503 static struct table_elt
*table
[HASH_SIZE
];
505 /* Chain of `struct table_elt's made so far for this function
506 but currently removed from the table. */
508 static struct table_elt
*free_element_chain
;
510 /* Set to the cost of a constant pool reference if one was found for a
511 symbolic constant. If this was found, it means we should try to
512 convert constants into constant pool entries if they don't fit in
515 static int constant_pool_entries_cost
;
516 static int constant_pool_entries_regcost
;
518 /* Trace a patch through the CFG. */
522 /* The basic block for this path entry. */
526 /* This data describes a block that will be processed by
527 cse_extended_basic_block. */
529 struct cse_basic_block_data
531 /* Total number of SETs in block. */
533 /* Size of current branch path, if any. */
535 /* Current path, indicating which basic_blocks will be processed. */
536 struct branch_path
*path
;
540 /* Pointers to the live in/live out bitmaps for the boundaries of the
542 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
544 /* A simple bitmap to track which basic blocks have been visited
545 already as part of an already processed extended basic block. */
546 static sbitmap cse_visited_basic_blocks
;
548 static bool fixed_base_plus_p (rtx x
);
549 static int notreg_cost (rtx
, enum rtx_code
, int);
550 static int preferable (int, int, int, int);
551 static void new_basic_block (void);
552 static void make_new_qty (unsigned int, enum machine_mode
);
553 static void make_regs_eqv (unsigned int, unsigned int);
554 static void delete_reg_equiv (unsigned int);
555 static int mention_regs (rtx
);
556 static int insert_regs (rtx
, struct table_elt
*, int);
557 static void remove_from_table (struct table_elt
*, unsigned);
558 static void remove_pseudo_from_table (rtx
, unsigned);
559 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
560 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
561 static rtx
lookup_as_function (rtx
, enum rtx_code
);
562 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
563 enum machine_mode
, int, int);
564 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
566 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
567 static void invalidate (rtx
, enum machine_mode
);
568 static void remove_invalid_refs (unsigned int);
569 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
571 static void rehash_using_reg (rtx
);
572 static void invalidate_memory (void);
573 static void invalidate_for_call (void);
574 static rtx
use_related_value (rtx
, struct table_elt
*);
576 static inline unsigned canon_hash (rtx
, enum machine_mode
);
577 static inline unsigned safe_hash (rtx
, enum machine_mode
);
578 static inline unsigned hash_rtx_string (const char *);
580 static rtx
canon_reg (rtx
, rtx_insn
*);
581 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
583 enum machine_mode
*);
584 static rtx
fold_rtx (rtx
, rtx_insn
*);
585 static rtx
equiv_constant (rtx
);
586 static void record_jump_equiv (rtx_insn
*, bool);
587 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
589 static void cse_insn (rtx_insn
*);
590 static void cse_prescan_path (struct cse_basic_block_data
*);
591 static void invalidate_from_clobbers (rtx_insn
*);
592 static void invalidate_from_sets_and_clobbers (rtx_insn
*);
593 static rtx
cse_process_notes (rtx
, rtx
, bool *);
594 static void cse_extended_basic_block (struct cse_basic_block_data
*);
595 extern void dump_class (struct table_elt
*);
596 static void get_cse_reg_info_1 (unsigned int regno
);
597 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
599 static void flush_hash_table (void);
600 static bool insn_live_p (rtx_insn
*, int *);
601 static bool set_live_p (rtx
, rtx_insn
*, int *);
602 static void cse_change_cc_mode_insn (rtx_insn
*, rtx
);
603 static void cse_change_cc_mode_insns (rtx_insn
*, rtx_insn
*, rtx
);
604 static enum machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
608 #undef RTL_HOOKS_GEN_LOWPART
609 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
611 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
613 /* Nonzero if X has the form (PLUS frame-pointer integer). */
616 fixed_base_plus_p (rtx x
)
618 switch (GET_CODE (x
))
621 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
623 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
628 if (!CONST_INT_P (XEXP (x
, 1)))
630 return fixed_base_plus_p (XEXP (x
, 0));
637 /* Dump the expressions in the equivalence class indicated by CLASSP.
638 This function is used only for debugging. */
640 dump_class (struct table_elt
*classp
)
642 struct table_elt
*elt
;
644 fprintf (stderr
, "Equivalence chain for ");
645 print_rtl (stderr
, classp
->exp
);
646 fprintf (stderr
, ": \n");
648 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
650 print_rtl (stderr
, elt
->exp
);
651 fprintf (stderr
, "\n");
655 /* Return an estimate of the cost of the registers used in an rtx.
656 This is mostly the number of different REG expressions in the rtx;
657 however for some exceptions like fixed registers we use a cost of
658 0. If any other hard register reference occurs, return MAX_COST. */
661 approx_reg_cost (const_rtx x
)
664 subrtx_iterator::array_type array
;
665 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
670 unsigned int regno
= REGNO (x
);
671 if (!CHEAP_REGNO (regno
))
673 if (regno
< FIRST_PSEUDO_REGISTER
)
675 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
687 /* Return a negative value if an rtx A, whose costs are given by COST_A
688 and REGCOST_A, is more desirable than an rtx B.
689 Return a positive value if A is less desirable, or 0 if the two are
692 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
694 /* First, get rid of cases involving expressions that are entirely
696 if (cost_a
!= cost_b
)
698 if (cost_a
== MAX_COST
)
700 if (cost_b
== MAX_COST
)
704 /* Avoid extending lifetimes of hardregs. */
705 if (regcost_a
!= regcost_b
)
707 if (regcost_a
== MAX_COST
)
709 if (regcost_b
== MAX_COST
)
713 /* Normal operation costs take precedence. */
714 if (cost_a
!= cost_b
)
715 return cost_a
- cost_b
;
716 /* Only if these are identical consider effects on register pressure. */
717 if (regcost_a
!= regcost_b
)
718 return regcost_a
- regcost_b
;
722 /* Internal function, to compute cost when X is not a register; called
723 from COST macro to keep it simple. */
726 notreg_cost (rtx x
, enum rtx_code outer
, int opno
)
728 return ((GET_CODE (x
) == SUBREG
729 && REG_P (SUBREG_REG (x
))
730 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
731 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
732 && (GET_MODE_SIZE (GET_MODE (x
))
733 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
734 && subreg_lowpart_p (x
)
735 && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x
),
736 GET_MODE (SUBREG_REG (x
))))
738 : rtx_cost (x
, outer
, opno
, optimize_this_for_speed_p
) * 2);
742 /* Initialize CSE_REG_INFO_TABLE. */
745 init_cse_reg_info (unsigned int nregs
)
747 /* Do we need to grow the table? */
748 if (nregs
> cse_reg_info_table_size
)
750 unsigned int new_size
;
752 if (cse_reg_info_table_size
< 2048)
754 /* Compute a new size that is a power of 2 and no smaller
755 than the large of NREGS and 64. */
756 new_size
= (cse_reg_info_table_size
757 ? cse_reg_info_table_size
: 64);
759 while (new_size
< nregs
)
764 /* If we need a big table, allocate just enough to hold
769 /* Reallocate the table with NEW_SIZE entries. */
770 free (cse_reg_info_table
);
771 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
772 cse_reg_info_table_size
= new_size
;
773 cse_reg_info_table_first_uninitialized
= 0;
776 /* Do we have all of the first NREGS entries initialized? */
777 if (cse_reg_info_table_first_uninitialized
< nregs
)
779 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
782 /* Put the old timestamp on newly allocated entries so that they
783 will all be considered out of date. We do not touch those
784 entries beyond the first NREGS entries to be nice to the
786 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
787 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
789 cse_reg_info_table_first_uninitialized
= nregs
;
793 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
796 get_cse_reg_info_1 (unsigned int regno
)
798 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
799 entry will be considered to have been initialized. */
800 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
802 /* Initialize the rest of the entry. */
803 cse_reg_info_table
[regno
].reg_tick
= 1;
804 cse_reg_info_table
[regno
].reg_in_table
= -1;
805 cse_reg_info_table
[regno
].subreg_ticked
= -1;
806 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
809 /* Find a cse_reg_info entry for REGNO. */
811 static inline struct cse_reg_info
*
812 get_cse_reg_info (unsigned int regno
)
814 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
816 /* If this entry has not been initialized, go ahead and initialize
818 if (p
->timestamp
!= cse_reg_info_timestamp
)
819 get_cse_reg_info_1 (regno
);
824 /* Clear the hash table and initialize each register with its own quantity,
825 for a new basic block. */
828 new_basic_block (void)
834 /* Invalidate cse_reg_info_table. */
835 cse_reg_info_timestamp
++;
837 /* Clear out hash table state for this pass. */
838 CLEAR_HARD_REG_SET (hard_regs_in_table
);
840 /* The per-quantity values used to be initialized here, but it is
841 much faster to initialize each as it is made in `make_new_qty'. */
843 for (i
= 0; i
< HASH_SIZE
; i
++)
845 struct table_elt
*first
;
850 struct table_elt
*last
= first
;
854 while (last
->next_same_hash
!= NULL
)
855 last
= last
->next_same_hash
;
857 /* Now relink this hash entire chain into
858 the free element list. */
860 last
->next_same_hash
= free_element_chain
;
861 free_element_chain
= first
;
870 /* Say that register REG contains a quantity in mode MODE not in any
871 register before and initialize that quantity. */
874 make_new_qty (unsigned int reg
, enum machine_mode mode
)
877 struct qty_table_elem
*ent
;
878 struct reg_eqv_elem
*eqv
;
880 gcc_assert (next_qty
< max_qty
);
882 q
= REG_QTY (reg
) = next_qty
++;
884 ent
->first_reg
= reg
;
887 ent
->const_rtx
= ent
->const_insn
= NULL
;
888 ent
->comparison_code
= UNKNOWN
;
890 eqv
= ®_eqv_table
[reg
];
891 eqv
->next
= eqv
->prev
= -1;
894 /* Make reg NEW equivalent to reg OLD.
895 OLD is not changing; NEW is. */
898 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
900 unsigned int lastr
, firstr
;
901 int q
= REG_QTY (old_reg
);
902 struct qty_table_elem
*ent
;
906 /* Nothing should become eqv until it has a "non-invalid" qty number. */
907 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
909 REG_QTY (new_reg
) = q
;
910 firstr
= ent
->first_reg
;
911 lastr
= ent
->last_reg
;
913 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
914 hard regs. Among pseudos, if NEW will live longer than any other reg
915 of the same qty, and that is beyond the current basic block,
916 make it the new canonical replacement for this qty. */
917 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
918 /* Certain fixed registers might be of the class NO_REGS. This means
919 that not only can they not be allocated by the compiler, but
920 they cannot be used in substitutions or canonicalizations
922 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
923 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
924 || (new_reg
>= FIRST_PSEUDO_REGISTER
925 && (firstr
< FIRST_PSEUDO_REGISTER
926 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
927 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
928 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
929 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
931 reg_eqv_table
[firstr
].prev
= new_reg
;
932 reg_eqv_table
[new_reg
].next
= firstr
;
933 reg_eqv_table
[new_reg
].prev
= -1;
934 ent
->first_reg
= new_reg
;
938 /* If NEW is a hard reg (known to be non-fixed), insert at end.
939 Otherwise, insert before any non-fixed hard regs that are at the
940 end. Registers of class NO_REGS cannot be used as an
941 equivalent for anything. */
942 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
943 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
944 && new_reg
>= FIRST_PSEUDO_REGISTER
)
945 lastr
= reg_eqv_table
[lastr
].prev
;
946 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
947 if (reg_eqv_table
[lastr
].next
>= 0)
948 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
950 qty_table
[q
].last_reg
= new_reg
;
951 reg_eqv_table
[lastr
].next
= new_reg
;
952 reg_eqv_table
[new_reg
].prev
= lastr
;
956 /* Remove REG from its equivalence class. */
959 delete_reg_equiv (unsigned int reg
)
961 struct qty_table_elem
*ent
;
962 int q
= REG_QTY (reg
);
965 /* If invalid, do nothing. */
966 if (! REGNO_QTY_VALID_P (reg
))
971 p
= reg_eqv_table
[reg
].prev
;
972 n
= reg_eqv_table
[reg
].next
;
975 reg_eqv_table
[n
].prev
= p
;
979 reg_eqv_table
[p
].next
= n
;
983 REG_QTY (reg
) = -reg
- 1;
986 /* Remove any invalid expressions from the hash table
987 that refer to any of the registers contained in expression X.
989 Make sure that newly inserted references to those registers
990 as subexpressions will be considered valid.
992 mention_regs is not called when a register itself
993 is being stored in the table.
995 Return 1 if we have done something that may have changed the hash code
1009 code
= GET_CODE (x
);
1012 unsigned int regno
= REGNO (x
);
1013 unsigned int endregno
= END_REGNO (x
);
1016 for (i
= regno
; i
< endregno
; i
++)
1018 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1019 remove_invalid_refs (i
);
1021 REG_IN_TABLE (i
) = REG_TICK (i
);
1022 SUBREG_TICKED (i
) = -1;
1028 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1029 pseudo if they don't use overlapping words. We handle only pseudos
1030 here for simplicity. */
1031 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1032 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1034 unsigned int i
= REGNO (SUBREG_REG (x
));
1036 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1038 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1039 the last store to this register really stored into this
1040 subreg, then remove the memory of this subreg.
1041 Otherwise, remove any memory of the entire register and
1042 all its subregs from the table. */
1043 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1044 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1045 remove_invalid_refs (i
);
1047 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1050 REG_IN_TABLE (i
) = REG_TICK (i
);
1051 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1055 /* If X is a comparison or a COMPARE and either operand is a register
1056 that does not have a quantity, give it one. This is so that a later
1057 call to record_jump_equiv won't cause X to be assigned a different
1058 hash code and not found in the table after that call.
1060 It is not necessary to do this here, since rehash_using_reg can
1061 fix up the table later, but doing this here eliminates the need to
1062 call that expensive function in the most common case where the only
1063 use of the register is in the comparison. */
1065 if (code
== COMPARE
|| COMPARISON_P (x
))
1067 if (REG_P (XEXP (x
, 0))
1068 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1069 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1071 rehash_using_reg (XEXP (x
, 0));
1075 if (REG_P (XEXP (x
, 1))
1076 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1077 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1079 rehash_using_reg (XEXP (x
, 1));
1084 fmt
= GET_RTX_FORMAT (code
);
1085 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1087 changed
|= mention_regs (XEXP (x
, i
));
1088 else if (fmt
[i
] == 'E')
1089 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1090 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1095 /* Update the register quantities for inserting X into the hash table
1096 with a value equivalent to CLASSP.
1097 (If the class does not contain a REG, it is irrelevant.)
1098 If MODIFIED is nonzero, X is a destination; it is being modified.
1099 Note that delete_reg_equiv should be called on a register
1100 before insert_regs is done on that register with MODIFIED != 0.
1102 Nonzero value means that elements of reg_qty have changed
1103 so X's hash code may be different. */
1106 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1110 unsigned int regno
= REGNO (x
);
1113 /* If REGNO is in the equivalence table already but is of the
1114 wrong mode for that equivalence, don't do anything here. */
1116 qty_valid
= REGNO_QTY_VALID_P (regno
);
1119 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1121 if (ent
->mode
!= GET_MODE (x
))
1125 if (modified
|| ! qty_valid
)
1128 for (classp
= classp
->first_same_value
;
1130 classp
= classp
->next_same_value
)
1131 if (REG_P (classp
->exp
)
1132 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1134 unsigned c_regno
= REGNO (classp
->exp
);
1136 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1138 /* Suppose that 5 is hard reg and 100 and 101 are
1141 (set (reg:si 100) (reg:si 5))
1142 (set (reg:si 5) (reg:si 100))
1143 (set (reg:di 101) (reg:di 5))
1145 We would now set REG_QTY (101) = REG_QTY (5), but the
1146 entry for 5 is in SImode. When we use this later in
1147 copy propagation, we get the register in wrong mode. */
1148 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1151 make_regs_eqv (regno
, c_regno
);
1155 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1156 than REG_IN_TABLE to find out if there was only a single preceding
1157 invalidation - for the SUBREG - or another one, which would be
1158 for the full register. However, if we find here that REG_TICK
1159 indicates that the register is invalid, it means that it has
1160 been invalidated in a separate operation. The SUBREG might be used
1161 now (then this is a recursive call), or we might use the full REG
1162 now and a SUBREG of it later. So bump up REG_TICK so that
1163 mention_regs will do the right thing. */
1165 && REG_IN_TABLE (regno
) >= 0
1166 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1168 make_new_qty (regno
, GET_MODE (x
));
1175 /* If X is a SUBREG, we will likely be inserting the inner register in the
1176 table. If that register doesn't have an assigned quantity number at
1177 this point but does later, the insertion that we will be doing now will
1178 not be accessible because its hash code will have changed. So assign
1179 a quantity number now. */
1181 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1182 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1184 insert_regs (SUBREG_REG (x
), NULL
, 0);
1189 return mention_regs (x
);
1193 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1194 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1195 CST is equal to an anchor. */
1198 compute_const_anchors (rtx cst
,
1199 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1200 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1202 HOST_WIDE_INT n
= INTVAL (cst
);
1204 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1205 if (*lower_base
== n
)
1209 (n
+ (targetm
.const_anchor
- 1)) & ~(targetm
.const_anchor
- 1);
1210 *upper_offs
= n
- *upper_base
;
1211 *lower_offs
= n
- *lower_base
;
1215 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1218 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1219 enum machine_mode mode
)
1221 struct table_elt
*elt
;
1226 anchor_exp
= GEN_INT (anchor
);
1227 hash
= HASH (anchor_exp
, mode
);
1228 elt
= lookup (anchor_exp
, hash
, mode
);
1230 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1232 exp
= plus_constant (mode
, reg
, offs
);
1233 /* REG has just been inserted and the hash codes recomputed. */
1235 hash
= HASH (exp
, mode
);
1237 /* Use the cost of the register rather than the whole expression. When
1238 looking up constant anchors we will further offset the corresponding
1239 expression therefore it does not make sense to prefer REGs over
1240 reg-immediate additions. Prefer instead the oldest expression. Also
1241 don't prefer pseudos over hard regs so that we derive constants in
1242 argument registers from other argument registers rather than from the
1243 original pseudo that was used to synthesize the constant. */
1244 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
), 1);
1247 /* The constant CST is equivalent to the register REG. Create
1248 equivalences between the two anchors of CST and the corresponding
1249 register-offset expressions using REG. */
1252 insert_const_anchors (rtx reg
, rtx cst
, enum machine_mode mode
)
1254 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1256 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1257 &upper_base
, &upper_offs
))
1260 /* Ignore anchors of value 0. Constants accessible from zero are
1262 if (lower_base
!= 0)
1263 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1265 if (upper_base
!= 0)
1266 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1269 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1270 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1271 valid expression. Return the cheapest and oldest of such expressions. In
1272 *OLD, return how old the resulting expression is compared to the other
1273 equivalent expressions. */
1276 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1279 struct table_elt
*elt
;
1281 struct table_elt
*match_elt
;
1284 /* Find the cheapest and *oldest* expression to maximize the chance of
1285 reusing the same pseudo. */
1289 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1291 elt
= elt
->next_same_value
, idx
++)
1293 if (match_elt
&& CHEAPER (match_elt
, elt
))
1296 if (REG_P (elt
->exp
)
1297 || (GET_CODE (elt
->exp
) == PLUS
1298 && REG_P (XEXP (elt
->exp
, 0))
1299 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1303 /* Ignore expressions that are no longer valid. */
1304 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1307 x
= plus_constant (GET_MODE (elt
->exp
), elt
->exp
, offs
);
1309 || (GET_CODE (x
) == PLUS
1310 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1311 -targetm
.const_anchor
,
1312 targetm
.const_anchor
- 1)))
1324 /* Try to express the constant SRC_CONST using a register+offset expression
1325 derived from a constant anchor. Return it if successful or NULL_RTX,
1329 try_const_anchors (rtx src_const
, enum machine_mode mode
)
1331 struct table_elt
*lower_elt
, *upper_elt
;
1332 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1333 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1334 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1335 unsigned lower_old
, upper_old
;
1337 /* CONST_INT is used for CC modes, but we should leave those alone. */
1338 if (GET_MODE_CLASS (mode
) == MODE_CC
)
1341 gcc_assert (SCALAR_INT_MODE_P (mode
));
1342 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1343 &upper_base
, &upper_offs
))
1346 lower_anchor_rtx
= GEN_INT (lower_base
);
1347 upper_anchor_rtx
= GEN_INT (upper_base
);
1348 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1349 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1352 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1354 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1361 /* Return the older expression. */
1362 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1365 /* Look in or update the hash table. */
1367 /* Remove table element ELT from use in the table.
1368 HASH is its hash code, made using the HASH macro.
1369 It's an argument because often that is known in advance
1370 and we save much time not recomputing it. */
1373 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1378 /* Mark this element as removed. See cse_insn. */
1379 elt
->first_same_value
= 0;
1381 /* Remove the table element from its equivalence class. */
1384 struct table_elt
*prev
= elt
->prev_same_value
;
1385 struct table_elt
*next
= elt
->next_same_value
;
1388 next
->prev_same_value
= prev
;
1391 prev
->next_same_value
= next
;
1394 struct table_elt
*newfirst
= next
;
1397 next
->first_same_value
= newfirst
;
1398 next
= next
->next_same_value
;
1403 /* Remove the table element from its hash bucket. */
1406 struct table_elt
*prev
= elt
->prev_same_hash
;
1407 struct table_elt
*next
= elt
->next_same_hash
;
1410 next
->prev_same_hash
= prev
;
1413 prev
->next_same_hash
= next
;
1414 else if (table
[hash
] == elt
)
1418 /* This entry is not in the proper hash bucket. This can happen
1419 when two classes were merged by `merge_equiv_classes'. Search
1420 for the hash bucket that it heads. This happens only very
1421 rarely, so the cost is acceptable. */
1422 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1423 if (table
[hash
] == elt
)
1428 /* Remove the table element from its related-value circular chain. */
1430 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1432 struct table_elt
*p
= elt
->related_value
;
1434 while (p
->related_value
!= elt
)
1435 p
= p
->related_value
;
1436 p
->related_value
= elt
->related_value
;
1437 if (p
->related_value
== p
)
1438 p
->related_value
= 0;
1441 /* Now add it to the free element chain. */
1442 elt
->next_same_hash
= free_element_chain
;
1443 free_element_chain
= elt
;
1446 /* Same as above, but X is a pseudo-register. */
1449 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1451 struct table_elt
*elt
;
1453 /* Because a pseudo-register can be referenced in more than one
1454 mode, we might have to remove more than one table entry. */
1455 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1456 remove_from_table (elt
, hash
);
1459 /* Look up X in the hash table and return its table element,
1460 or 0 if X is not in the table.
1462 MODE is the machine-mode of X, or if X is an integer constant
1463 with VOIDmode then MODE is the mode with which X will be used.
1465 Here we are satisfied to find an expression whose tree structure
1468 static struct table_elt
*
1469 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1471 struct table_elt
*p
;
1473 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1474 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1475 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1481 /* Like `lookup' but don't care whether the table element uses invalid regs.
1482 Also ignore discrepancies in the machine mode of a register. */
1484 static struct table_elt
*
1485 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1487 struct table_elt
*p
;
1491 unsigned int regno
= REGNO (x
);
1493 /* Don't check the machine mode when comparing registers;
1494 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1495 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1497 && REGNO (p
->exp
) == regno
)
1502 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1504 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1511 /* Look for an expression equivalent to X and with code CODE.
1512 If one is found, return that expression. */
1515 lookup_as_function (rtx x
, enum rtx_code code
)
1518 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1523 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1524 if (GET_CODE (p
->exp
) == code
1525 /* Make sure this is a valid entry in the table. */
1526 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1532 /* Insert X in the hash table, assuming HASH is its hash code and
1533 CLASSP is an element of the class it should go in (or 0 if a new
1534 class should be made). COST is the code of X and reg_cost is the
1535 cost of registers in X. It is inserted at the proper position to
1536 keep the class in the order cheapest first.
1538 MODE is the machine-mode of X, or if X is an integer constant
1539 with VOIDmode then MODE is the mode with which X will be used.
1541 For elements of equal cheapness, the most recent one
1542 goes in front, except that the first element in the list
1543 remains first unless a cheaper element is added. The order of
1544 pseudo-registers does not matter, as canon_reg will be called to
1545 find the cheapest when a register is retrieved from the table.
1547 The in_memory field in the hash table element is set to 0.
1548 The caller must set it nonzero if appropriate.
1550 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1551 and if insert_regs returns a nonzero value
1552 you must then recompute its hash code before calling here.
1554 If necessary, update table showing constant values of quantities. */
1556 static struct table_elt
*
1557 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1558 enum machine_mode mode
, int cost
, int reg_cost
)
1560 struct table_elt
*elt
;
1562 /* If X is a register and we haven't made a quantity for it,
1563 something is wrong. */
1564 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1566 /* If X is a hard register, show it is being put in the table. */
1567 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1568 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1570 /* Put an element for X into the right hash bucket. */
1572 elt
= free_element_chain
;
1574 free_element_chain
= elt
->next_same_hash
;
1576 elt
= XNEW (struct table_elt
);
1579 elt
->canon_exp
= NULL_RTX
;
1581 elt
->regcost
= reg_cost
;
1582 elt
->next_same_value
= 0;
1583 elt
->prev_same_value
= 0;
1584 elt
->next_same_hash
= table
[hash
];
1585 elt
->prev_same_hash
= 0;
1586 elt
->related_value
= 0;
1589 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1592 table
[hash
]->prev_same_hash
= elt
;
1595 /* Put it into the proper value-class. */
1598 classp
= classp
->first_same_value
;
1599 if (CHEAPER (elt
, classp
))
1600 /* Insert at the head of the class. */
1602 struct table_elt
*p
;
1603 elt
->next_same_value
= classp
;
1604 classp
->prev_same_value
= elt
;
1605 elt
->first_same_value
= elt
;
1607 for (p
= classp
; p
; p
= p
->next_same_value
)
1608 p
->first_same_value
= elt
;
1612 /* Insert not at head of the class. */
1613 /* Put it after the last element cheaper than X. */
1614 struct table_elt
*p
, *next
;
1617 (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1621 /* Put it after P and before NEXT. */
1622 elt
->next_same_value
= next
;
1624 next
->prev_same_value
= elt
;
1626 elt
->prev_same_value
= p
;
1627 p
->next_same_value
= elt
;
1628 elt
->first_same_value
= classp
;
1632 elt
->first_same_value
= elt
;
1634 /* If this is a constant being set equivalent to a register or a register
1635 being set equivalent to a constant, note the constant equivalence.
1637 If this is a constant, it cannot be equivalent to a different constant,
1638 and a constant is the only thing that can be cheaper than a register. So
1639 we know the register is the head of the class (before the constant was
1642 If this is a register that is not already known equivalent to a
1643 constant, we must check the entire class.
1645 If this is a register that is already known equivalent to an insn,
1646 update the qtys `const_insn' to show that `this_insn' is the latest
1647 insn making that quantity equivalent to the constant. */
1649 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1652 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1653 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1655 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1656 exp_ent
->const_insn
= this_insn
;
1661 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1664 struct table_elt
*p
;
1666 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1668 if (p
->is_const
&& !REG_P (p
->exp
))
1670 int x_q
= REG_QTY (REGNO (x
));
1671 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1674 = gen_lowpart (GET_MODE (x
), p
->exp
);
1675 x_ent
->const_insn
= this_insn
;
1682 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1683 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1684 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1686 /* If this is a constant with symbolic value,
1687 and it has a term with an explicit integer value,
1688 link it up with related expressions. */
1689 if (GET_CODE (x
) == CONST
)
1691 rtx subexp
= get_related_value (x
);
1693 struct table_elt
*subelt
, *subelt_prev
;
1697 /* Get the integer-free subexpression in the hash table. */
1698 subhash
= SAFE_HASH (subexp
, mode
);
1699 subelt
= lookup (subexp
, subhash
, mode
);
1701 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1702 /* Initialize SUBELT's circular chain if it has none. */
1703 if (subelt
->related_value
== 0)
1704 subelt
->related_value
= subelt
;
1705 /* Find the element in the circular chain that precedes SUBELT. */
1706 subelt_prev
= subelt
;
1707 while (subelt_prev
->related_value
!= subelt
)
1708 subelt_prev
= subelt_prev
->related_value
;
1709 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1710 This way the element that follows SUBELT is the oldest one. */
1711 elt
->related_value
= subelt_prev
->related_value
;
1712 subelt_prev
->related_value
= elt
;
1719 /* Wrap insert_with_costs by passing the default costs. */
1721 static struct table_elt
*
1722 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1723 enum machine_mode mode
)
1726 insert_with_costs (x
, classp
, hash
, mode
, COST (x
), approx_reg_cost (x
));
1730 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1731 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1732 the two classes equivalent.
1734 CLASS1 will be the surviving class; CLASS2 should not be used after this
1737 Any invalid entries in CLASS2 will not be copied. */
1740 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1742 struct table_elt
*elt
, *next
, *new_elt
;
1744 /* Ensure we start with the head of the classes. */
1745 class1
= class1
->first_same_value
;
1746 class2
= class2
->first_same_value
;
1748 /* If they were already equal, forget it. */
1749 if (class1
== class2
)
1752 for (elt
= class2
; elt
; elt
= next
)
1756 enum machine_mode mode
= elt
->mode
;
1758 next
= elt
->next_same_value
;
1760 /* Remove old entry, make a new one in CLASS1's class.
1761 Don't do this for invalid entries as we cannot find their
1762 hash code (it also isn't necessary). */
1763 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1765 bool need_rehash
= false;
1767 hash_arg_in_memory
= 0;
1768 hash
= HASH (exp
, mode
);
1772 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1773 delete_reg_equiv (REGNO (exp
));
1776 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1777 remove_pseudo_from_table (exp
, hash
);
1779 remove_from_table (elt
, hash
);
1781 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1783 rehash_using_reg (exp
);
1784 hash
= HASH (exp
, mode
);
1786 new_elt
= insert (exp
, class1
, hash
, mode
);
1787 new_elt
->in_memory
= hash_arg_in_memory
;
1792 /* Flush the entire hash table. */
1795 flush_hash_table (void)
1798 struct table_elt
*p
;
1800 for (i
= 0; i
< HASH_SIZE
; i
++)
1801 for (p
= table
[i
]; p
; p
= table
[i
])
1803 /* Note that invalidate can remove elements
1804 after P in the current hash chain. */
1806 invalidate (p
->exp
, VOIDmode
);
1808 remove_from_table (p
, i
);
1812 /* Check whether an anti dependence exists between X and EXP. MODE and
1813 ADDR are as for canon_anti_dependence. */
1816 check_dependence (const_rtx x
, rtx exp
, enum machine_mode mode
, rtx addr
)
1818 subrtx_iterator::array_type array
;
1819 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
1821 const_rtx x
= *iter
;
1822 if (MEM_P (x
) && canon_anti_dependence (x
, true, exp
, mode
, addr
))
1828 /* Remove from the hash table, or mark as invalid, all expressions whose
1829 values could be altered by storing in X. X is a register, a subreg, or
1830 a memory reference with nonvarying address (because, when a memory
1831 reference with a varying address is stored in, all memory references are
1832 removed by invalidate_memory so specific invalidation is superfluous).
1833 FULL_MODE, if not VOIDmode, indicates that this much should be
1834 invalidated instead of just the amount indicated by the mode of X. This
1835 is only used for bitfield stores into memory.
1837 A nonvarying address may be just a register or just a symbol reference,
1838 or it may be either of those plus a numeric offset. */
1841 invalidate (rtx x
, enum machine_mode full_mode
)
1844 struct table_elt
*p
;
1847 switch (GET_CODE (x
))
1851 /* If X is a register, dependencies on its contents are recorded
1852 through the qty number mechanism. Just change the qty number of
1853 the register, mark it as invalid for expressions that refer to it,
1854 and remove it itself. */
1855 unsigned int regno
= REGNO (x
);
1856 unsigned int hash
= HASH (x
, GET_MODE (x
));
1858 /* Remove REGNO from any quantity list it might be on and indicate
1859 that its value might have changed. If it is a pseudo, remove its
1860 entry from the hash table.
1862 For a hard register, we do the first two actions above for any
1863 additional hard registers corresponding to X. Then, if any of these
1864 registers are in the table, we must remove any REG entries that
1865 overlap these registers. */
1867 delete_reg_equiv (regno
);
1869 SUBREG_TICKED (regno
) = -1;
1871 if (regno
>= FIRST_PSEUDO_REGISTER
)
1872 remove_pseudo_from_table (x
, hash
);
1875 HOST_WIDE_INT in_table
1876 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1877 unsigned int endregno
= END_HARD_REGNO (x
);
1878 unsigned int tregno
, tendregno
, rn
;
1879 struct table_elt
*p
, *next
;
1881 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1883 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1885 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1886 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1887 delete_reg_equiv (rn
);
1889 SUBREG_TICKED (rn
) = -1;
1893 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1894 for (p
= table
[hash
]; p
; p
= next
)
1896 next
= p
->next_same_hash
;
1899 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1902 tregno
= REGNO (p
->exp
);
1903 tendregno
= END_HARD_REGNO (p
->exp
);
1904 if (tendregno
> regno
&& tregno
< endregno
)
1905 remove_from_table (p
, hash
);
1912 invalidate (SUBREG_REG (x
), VOIDmode
);
1916 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1917 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1921 /* This is part of a disjoint return value; extract the location in
1922 question ignoring the offset. */
1923 invalidate (XEXP (x
, 0), VOIDmode
);
1927 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1928 /* Calculate the canonical version of X here so that
1929 true_dependence doesn't generate new RTL for X on each call. */
1932 /* Remove all hash table elements that refer to overlapping pieces of
1934 if (full_mode
== VOIDmode
)
1935 full_mode
= GET_MODE (x
);
1937 for (i
= 0; i
< HASH_SIZE
; i
++)
1939 struct table_elt
*next
;
1941 for (p
= table
[i
]; p
; p
= next
)
1943 next
= p
->next_same_hash
;
1946 /* Just canonicalize the expression once;
1947 otherwise each time we call invalidate
1948 true_dependence will canonicalize the
1949 expression again. */
1951 p
->canon_exp
= canon_rtx (p
->exp
);
1952 if (check_dependence (p
->canon_exp
, x
, full_mode
, addr
))
1953 remove_from_table (p
, i
);
1964 /* Remove all expressions that refer to register REGNO,
1965 since they are already invalid, and we are about to
1966 mark that register valid again and don't want the old
1967 expressions to reappear as valid. */
1970 remove_invalid_refs (unsigned int regno
)
1973 struct table_elt
*p
, *next
;
1975 for (i
= 0; i
< HASH_SIZE
; i
++)
1976 for (p
= table
[i
]; p
; p
= next
)
1978 next
= p
->next_same_hash
;
1980 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1981 remove_from_table (p
, i
);
1985 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1988 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1989 enum machine_mode mode
)
1992 struct table_elt
*p
, *next
;
1993 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1995 for (i
= 0; i
< HASH_SIZE
; i
++)
1996 for (p
= table
[i
]; p
; p
= next
)
1999 next
= p
->next_same_hash
;
2002 && (GET_CODE (exp
) != SUBREG
2003 || !REG_P (SUBREG_REG (exp
))
2004 || REGNO (SUBREG_REG (exp
)) != regno
2005 || (((SUBREG_BYTE (exp
)
2006 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
2007 && SUBREG_BYTE (exp
) <= end
))
2008 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2009 remove_from_table (p
, i
);
2013 /* Recompute the hash codes of any valid entries in the hash table that
2014 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2016 This is called when we make a jump equivalence. */
2019 rehash_using_reg (rtx x
)
2022 struct table_elt
*p
, *next
;
2025 if (GET_CODE (x
) == SUBREG
)
2028 /* If X is not a register or if the register is known not to be in any
2029 valid entries in the table, we have no work to do. */
2032 || REG_IN_TABLE (REGNO (x
)) < 0
2033 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2036 /* Scan all hash chains looking for valid entries that mention X.
2037 If we find one and it is in the wrong hash chain, move it. */
2039 for (i
= 0; i
< HASH_SIZE
; i
++)
2040 for (p
= table
[i
]; p
; p
= next
)
2042 next
= p
->next_same_hash
;
2043 if (reg_mentioned_p (x
, p
->exp
)
2044 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2045 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2047 if (p
->next_same_hash
)
2048 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2050 if (p
->prev_same_hash
)
2051 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2053 table
[i
] = p
->next_same_hash
;
2055 p
->next_same_hash
= table
[hash
];
2056 p
->prev_same_hash
= 0;
2058 table
[hash
]->prev_same_hash
= p
;
2064 /* Remove from the hash table any expression that is a call-clobbered
2065 register. Also update their TICK values. */
2068 invalidate_for_call (void)
2070 unsigned int regno
, endregno
;
2073 struct table_elt
*p
, *next
;
2075 hard_reg_set_iterator hrsi
;
2077 /* Go through all the hard registers. For each that is clobbered in
2078 a CALL_INSN, remove the register from quantity chains and update
2079 reg_tick if defined. Also see if any of these registers is currently
2081 EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call
, 0, regno
, hrsi
)
2083 delete_reg_equiv (regno
);
2084 if (REG_TICK (regno
) >= 0)
2087 SUBREG_TICKED (regno
) = -1;
2089 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2092 /* In the case where we have no call-clobbered hard registers in the
2093 table, we are done. Otherwise, scan the table and remove any
2094 entry that overlaps a call-clobbered register. */
2097 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2098 for (p
= table
[hash
]; p
; p
= next
)
2100 next
= p
->next_same_hash
;
2103 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2106 regno
= REGNO (p
->exp
);
2107 endregno
= END_HARD_REGNO (p
->exp
);
2109 for (i
= regno
; i
< endregno
; i
++)
2110 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2112 remove_from_table (p
, hash
);
2118 /* Given an expression X of type CONST,
2119 and ELT which is its table entry (or 0 if it
2120 is not in the hash table),
2121 return an alternate expression for X as a register plus integer.
2122 If none can be found, return 0. */
2125 use_related_value (rtx x
, struct table_elt
*elt
)
2127 struct table_elt
*relt
= 0;
2128 struct table_elt
*p
, *q
;
2129 HOST_WIDE_INT offset
;
2131 /* First, is there anything related known?
2132 If we have a table element, we can tell from that.
2133 Otherwise, must look it up. */
2135 if (elt
!= 0 && elt
->related_value
!= 0)
2137 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2139 rtx subexp
= get_related_value (x
);
2141 relt
= lookup (subexp
,
2142 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2149 /* Search all related table entries for one that has an
2150 equivalent register. */
2155 /* This loop is strange in that it is executed in two different cases.
2156 The first is when X is already in the table. Then it is searching
2157 the RELATED_VALUE list of X's class (RELT). The second case is when
2158 X is not in the table. Then RELT points to a class for the related
2161 Ensure that, whatever case we are in, that we ignore classes that have
2162 the same value as X. */
2164 if (rtx_equal_p (x
, p
->exp
))
2167 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2174 p
= p
->related_value
;
2176 /* We went all the way around, so there is nothing to be found.
2177 Alternatively, perhaps RELT was in the table for some other reason
2178 and it has no related values recorded. */
2179 if (p
== relt
|| p
== 0)
2186 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2187 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2188 return plus_constant (q
->mode
, q
->exp
, offset
);
2192 /* Hash a string. Just add its bytes up. */
2193 static inline unsigned
2194 hash_rtx_string (const char *ps
)
2197 const unsigned char *p
= (const unsigned char *) ps
;
2206 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2207 When the callback returns true, we continue with the new rtx. */
2210 hash_rtx_cb (const_rtx x
, enum machine_mode mode
,
2211 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2212 bool have_reg_qty
, hash_rtx_callback_function cb
)
2218 enum machine_mode newmode
;
2221 /* Used to turn recursion into iteration. We can't rely on GCC's
2222 tail-recursion elimination since we need to keep accumulating values
2228 /* Invoke the callback first. */
2230 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2232 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2233 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2237 code
= GET_CODE (x
);
2242 unsigned int regno
= REGNO (x
);
2244 if (do_not_record_p
&& !reload_completed
)
2246 /* On some machines, we can't record any non-fixed hard register,
2247 because extending its life will cause reload problems. We
2248 consider ap, fp, sp, gp to be fixed for this purpose.
2250 We also consider CCmode registers to be fixed for this purpose;
2251 failure to do so leads to failure to simplify 0<100 type of
2254 On all machines, we can't record any global registers.
2255 Nor should we record any register that is in a small
2256 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2259 if (regno
>= FIRST_PSEUDO_REGISTER
)
2261 else if (x
== frame_pointer_rtx
2262 || x
== hard_frame_pointer_rtx
2263 || x
== arg_pointer_rtx
2264 || x
== stack_pointer_rtx
2265 || x
== pic_offset_table_rtx
)
2267 else if (global_regs
[regno
])
2269 else if (fixed_regs
[regno
])
2271 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2273 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2275 else if (targetm
.class_likely_spilled_p (REGNO_REG_CLASS (regno
)))
2282 *do_not_record_p
= 1;
2287 hash
+= ((unsigned int) REG
<< 7);
2288 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2292 /* We handle SUBREG of a REG specially because the underlying
2293 reg changes its hash value with every value change; we don't
2294 want to have to forget unrelated subregs when one subreg changes. */
2297 if (REG_P (SUBREG_REG (x
)))
2299 hash
+= (((unsigned int) SUBREG
<< 7)
2300 + REGNO (SUBREG_REG (x
))
2301 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2308 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2309 + (unsigned int) INTVAL (x
));
2312 case CONST_WIDE_INT
:
2313 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (x
); i
++)
2314 hash
+= CONST_WIDE_INT_ELT (x
, i
);
2318 /* This is like the general case, except that it only counts
2319 the integers representing the constant. */
2320 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2321 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (x
) == VOIDmode
)
2322 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2323 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2325 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2329 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2330 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2338 units
= CONST_VECTOR_NUNITS (x
);
2340 for (i
= 0; i
< units
; ++i
)
2342 elt
= CONST_VECTOR_ELT (x
, i
);
2343 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2344 do_not_record_p
, hash_arg_in_memory_p
,
2351 /* Assume there is only one rtx object for any given label. */
2353 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2354 differences and differences between each stage's debugging dumps. */
2355 hash
+= (((unsigned int) LABEL_REF
<< 7)
2356 + CODE_LABEL_NUMBER (LABEL_REF_LABEL (x
)));
2361 /* Don't hash on the symbol's address to avoid bootstrap differences.
2362 Different hash values may cause expressions to be recorded in
2363 different orders and thus different registers to be used in the
2364 final assembler. This also avoids differences in the dump files
2365 between various stages. */
2367 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2370 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2372 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2377 /* We don't record if marked volatile or if BLKmode since we don't
2378 know the size of the move. */
2379 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2381 *do_not_record_p
= 1;
2384 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2385 *hash_arg_in_memory_p
= 1;
2387 /* Now that we have already found this special case,
2388 might as well speed it up as much as possible. */
2389 hash
+= (unsigned) MEM
;
2394 /* A USE that mentions non-volatile memory needs special
2395 handling since the MEM may be BLKmode which normally
2396 prevents an entry from being made. Pure calls are
2397 marked by a USE which mentions BLKmode memory.
2398 See calls.c:emit_call_1. */
2399 if (MEM_P (XEXP (x
, 0))
2400 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2402 hash
+= (unsigned) USE
;
2405 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2406 *hash_arg_in_memory_p
= 1;
2408 /* Now that we have already found this special case,
2409 might as well speed it up as much as possible. */
2410 hash
+= (unsigned) MEM
;
2425 case UNSPEC_VOLATILE
:
2426 if (do_not_record_p
) {
2427 *do_not_record_p
= 1;
2435 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2437 *do_not_record_p
= 1;
2442 /* We don't want to take the filename and line into account. */
2443 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2444 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2445 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2446 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2448 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2450 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2452 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2453 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2454 do_not_record_p
, hash_arg_in_memory_p
,
2457 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2460 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2461 x
= ASM_OPERANDS_INPUT (x
, 0);
2462 mode
= GET_MODE (x
);
2474 i
= GET_RTX_LENGTH (code
) - 1;
2475 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2476 fmt
= GET_RTX_FORMAT (code
);
2482 /* If we are about to do the last recursive call
2483 needed at this level, change it into iteration.
2484 This function is called enough to be worth it. */
2491 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2492 hash_arg_in_memory_p
,
2497 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2498 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2499 hash_arg_in_memory_p
,
2504 hash
+= hash_rtx_string (XSTR (x
, i
));
2508 hash
+= (unsigned int) XINT (x
, i
);
2523 /* Hash an rtx. We are careful to make sure the value is never negative.
2524 Equivalent registers hash identically.
2525 MODE is used in hashing for CONST_INTs only;
2526 otherwise the mode of X is used.
2528 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2530 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2531 a MEM rtx which does not have the MEM_READONLY_P flag set.
2533 Note that cse_insn knows that the hash code of a MEM expression
2534 is just (int) MEM plus the hash code of the address. */
2537 hash_rtx (const_rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2538 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2540 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2541 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2544 /* Hash an rtx X for cse via hash_rtx.
2545 Stores 1 in do_not_record if any subexpression is volatile.
2546 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2547 does not have the MEM_READONLY_P flag set. */
2549 static inline unsigned
2550 canon_hash (rtx x
, enum machine_mode mode
)
2552 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2555 /* Like canon_hash but with no side effects, i.e. do_not_record
2556 and hash_arg_in_memory are not changed. */
2558 static inline unsigned
2559 safe_hash (rtx x
, enum machine_mode mode
)
2561 int dummy_do_not_record
;
2562 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2565 /* Return 1 iff X and Y would canonicalize into the same thing,
2566 without actually constructing the canonicalization of either one.
2567 If VALIDATE is nonzero,
2568 we assume X is an expression being processed from the rtl
2569 and Y was found in the hash table. We check register refs
2570 in Y for being marked as valid.
2572 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2575 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2581 /* Note: it is incorrect to assume an expression is equivalent to itself
2582 if VALIDATE is nonzero. */
2583 if (x
== y
&& !validate
)
2586 if (x
== 0 || y
== 0)
2589 code
= GET_CODE (x
);
2590 if (code
!= GET_CODE (y
))
2593 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2594 if (GET_MODE (x
) != GET_MODE (y
))
2597 /* MEMs referring to different address space are not equivalent. */
2598 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2609 return LABEL_REF_LABEL (x
) == LABEL_REF_LABEL (y
);
2612 return XSTR (x
, 0) == XSTR (y
, 0);
2616 return REGNO (x
) == REGNO (y
);
2619 unsigned int regno
= REGNO (y
);
2621 unsigned int endregno
= END_REGNO (y
);
2623 /* If the quantities are not the same, the expressions are not
2624 equivalent. If there are and we are not to validate, they
2625 are equivalent. Otherwise, ensure all regs are up-to-date. */
2627 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2633 for (i
= regno
; i
< endregno
; i
++)
2634 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2643 /* A volatile mem should not be considered equivalent to any
2645 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2648 /* Can't merge two expressions in different alias sets, since we
2649 can decide that the expression is transparent in a block when
2650 it isn't, due to it being set with the different alias set.
2652 Also, can't merge two expressions with different MEM_ATTRS.
2653 They could e.g. be two different entities allocated into the
2654 same space on the stack (see e.g. PR25130). In that case, the
2655 MEM addresses can be the same, even though the two MEMs are
2656 absolutely not equivalent.
2658 But because really all MEM attributes should be the same for
2659 equivalent MEMs, we just use the invariant that MEMs that have
2660 the same attributes share the same mem_attrs data structure. */
2661 if (!mem_attrs_eq_p (MEM_ATTRS (x
), MEM_ATTRS (y
)))
2664 /* If we are handling exceptions, we cannot consider two expressions
2665 with different trapping status as equivalent, because simple_mem
2666 might accept one and reject the other. */
2667 if (cfun
->can_throw_non_call_exceptions
2668 && (MEM_NOTRAP_P (x
) != MEM_NOTRAP_P (y
)))
2673 /* For commutative operations, check both orders. */
2681 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2683 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2684 validate
, for_gcse
))
2685 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2687 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2688 validate
, for_gcse
)));
2691 /* We don't use the generic code below because we want to
2692 disregard filename and line numbers. */
2694 /* A volatile asm isn't equivalent to any other. */
2695 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2698 if (GET_MODE (x
) != GET_MODE (y
)
2699 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2700 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2701 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2702 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2703 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2706 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2708 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2709 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2710 ASM_OPERANDS_INPUT (y
, i
),
2712 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2713 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2723 /* Compare the elements. If any pair of corresponding elements
2724 fail to match, return 0 for the whole thing. */
2726 fmt
= GET_RTX_FORMAT (code
);
2727 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2732 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2733 validate
, for_gcse
))
2738 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2740 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2741 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2742 validate
, for_gcse
))
2747 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2752 if (XINT (x
, i
) != XINT (y
, i
))
2757 if (XWINT (x
, i
) != XWINT (y
, i
))
2773 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2774 the result if necessary. INSN is as for canon_reg. */
2777 validate_canon_reg (rtx
*xloc
, rtx_insn
*insn
)
2781 rtx new_rtx
= canon_reg (*xloc
, insn
);
2783 /* If replacing pseudo with hard reg or vice versa, ensure the
2784 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2785 gcc_assert (insn
&& new_rtx
);
2786 validate_change (insn
, xloc
, new_rtx
, 1);
2790 /* Canonicalize an expression:
2791 replace each register reference inside it
2792 with the "oldest" equivalent register.
2794 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2795 after we make our substitution. The calls are made with IN_GROUP nonzero
2796 so apply_change_group must be called upon the outermost return from this
2797 function (unless INSN is zero). The result of apply_change_group can
2798 generally be discarded since the changes we are making are optional. */
2801 canon_reg (rtx x
, rtx_insn
*insn
)
2810 code
= GET_CODE (x
);
2827 struct qty_table_elem
*ent
;
2829 /* Never replace a hard reg, because hard regs can appear
2830 in more than one machine mode, and we must preserve the mode
2831 of each occurrence. Also, some hard regs appear in
2832 MEMs that are shared and mustn't be altered. Don't try to
2833 replace any reg that maps to a reg of class NO_REGS. */
2834 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2835 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2838 q
= REG_QTY (REGNO (x
));
2839 ent
= &qty_table
[q
];
2840 first
= ent
->first_reg
;
2841 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2842 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2843 : gen_rtx_REG (ent
->mode
, first
));
2850 fmt
= GET_RTX_FORMAT (code
);
2851 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2856 validate_canon_reg (&XEXP (x
, i
), insn
);
2857 else if (fmt
[i
] == 'E')
2858 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2859 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2865 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2866 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2867 what values are being compared.
2869 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2870 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2871 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2872 compared to produce cc0.
2874 The return value is the comparison operator and is either the code of
2875 A or the code corresponding to the inverse of the comparison. */
2877 static enum rtx_code
2878 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2879 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2882 hash_set
<rtx
> *visited
= NULL
;
2883 /* Set nonzero when we find something of interest. */
2886 arg1
= *parg1
, arg2
= *parg2
;
2888 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2890 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2892 int reverse_code
= 0;
2893 struct table_elt
*p
= 0;
2895 /* Remember state from previous iteration. */
2899 visited
= new hash_set
<rtx
>;
2904 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2905 On machines with CC0, this is the only case that can occur, since
2906 fold_rtx will return the COMPARE or item being compared with zero
2909 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2912 /* If ARG1 is a comparison operator and CODE is testing for
2913 STORE_FLAG_VALUE, get the inner arguments. */
2915 else if (COMPARISON_P (arg1
))
2917 #ifdef FLOAT_STORE_FLAG_VALUE
2918 REAL_VALUE_TYPE fsfv
;
2922 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2923 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2924 #ifdef FLOAT_STORE_FLAG_VALUE
2925 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2926 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2927 REAL_VALUE_NEGATIVE (fsfv
)))
2932 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2933 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2934 #ifdef FLOAT_STORE_FLAG_VALUE
2935 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2936 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2937 REAL_VALUE_NEGATIVE (fsfv
)))
2940 x
= arg1
, reverse_code
= 1;
2943 /* ??? We could also check for
2945 (ne (and (eq (...) (const_int 1))) (const_int 0))
2947 and related forms, but let's wait until we see them occurring. */
2950 /* Look up ARG1 in the hash table and see if it has an equivalence
2951 that lets us see what is being compared. */
2952 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
2955 p
= p
->first_same_value
;
2957 /* If what we compare is already known to be constant, that is as
2959 We need to break the loop in this case, because otherwise we
2960 can have an infinite loop when looking at a reg that is known
2961 to be a constant which is the same as a comparison of a reg
2962 against zero which appears later in the insn stream, which in
2963 turn is constant and the same as the comparison of the first reg
2969 for (; p
; p
= p
->next_same_value
)
2971 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2972 #ifdef FLOAT_STORE_FLAG_VALUE
2973 REAL_VALUE_TYPE fsfv
;
2976 /* If the entry isn't valid, skip it. */
2977 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2980 /* If it's a comparison we've used before, skip it. */
2981 if (visited
&& visited
->contains (p
->exp
))
2984 if (GET_CODE (p
->exp
) == COMPARE
2985 /* Another possibility is that this machine has a compare insn
2986 that includes the comparison code. In that case, ARG1 would
2987 be equivalent to a comparison operation that would set ARG1 to
2988 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2989 ORIG_CODE is the actual comparison being done; if it is an EQ,
2990 we must reverse ORIG_CODE. On machine with a negative value
2991 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2994 && val_signbit_known_set_p (inner_mode
,
2996 #ifdef FLOAT_STORE_FLAG_VALUE
2998 && SCALAR_FLOAT_MODE_P (inner_mode
)
2999 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3000 REAL_VALUE_NEGATIVE (fsfv
)))
3003 && COMPARISON_P (p
->exp
)))
3008 else if ((code
== EQ
3010 && val_signbit_known_set_p (inner_mode
,
3012 #ifdef FLOAT_STORE_FLAG_VALUE
3014 && SCALAR_FLOAT_MODE_P (inner_mode
)
3015 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3016 REAL_VALUE_NEGATIVE (fsfv
)))
3019 && COMPARISON_P (p
->exp
))
3026 /* If this non-trapping address, e.g. fp + constant, the
3027 equivalent is a better operand since it may let us predict
3028 the value of the comparison. */
3029 else if (!rtx_addr_can_trap_p (p
->exp
))
3036 /* If we didn't find a useful equivalence for ARG1, we are done.
3037 Otherwise, set up for the next iteration. */
3041 /* If we need to reverse the comparison, make sure that that is
3042 possible -- we can't necessarily infer the value of GE from LT
3043 with floating-point operands. */
3046 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3047 if (reversed
== UNKNOWN
)
3052 else if (COMPARISON_P (x
))
3053 code
= GET_CODE (x
);
3054 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3057 /* Return our results. Return the modes from before fold_rtx
3058 because fold_rtx might produce const_int, and then it's too late. */
3059 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3060 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3067 /* If X is a nontrivial arithmetic operation on an argument for which
3068 a constant value can be determined, return the result of operating
3069 on that value, as a constant. Otherwise, return X, possibly with
3070 one or more operands changed to a forward-propagated constant.
3072 If X is a register whose contents are known, we do NOT return
3073 those contents here; equiv_constant is called to perform that task.
3074 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3076 INSN is the insn that we may be modifying. If it is 0, make a copy
3077 of X before modifying it. */
3080 fold_rtx (rtx x
, rtx_insn
*insn
)
3083 enum machine_mode mode
;
3089 /* Operands of X. */
3093 /* Constant equivalents of first three operands of X;
3094 0 when no such equivalent is known. */
3099 /* The mode of the first operand of X. We need this for sign and zero
3101 enum machine_mode mode_arg0
;
3106 /* Try to perform some initial simplifications on X. */
3107 code
= GET_CODE (x
);
3112 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3122 /* No use simplifying an EXPR_LIST
3123 since they are used only for lists of args
3124 in a function call's REG_EQUAL note. */
3130 return prev_insn_cc0
;
3136 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3137 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3138 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3142 #ifdef NO_FUNCTION_CSE
3144 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3149 /* Anything else goes through the loop below. */
3154 mode
= GET_MODE (x
);
3158 mode_arg0
= VOIDmode
;
3160 /* Try folding our operands.
3161 Then see which ones have constant values known. */
3163 fmt
= GET_RTX_FORMAT (code
);
3164 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3167 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3168 enum machine_mode mode_arg
= GET_MODE (folded_arg
);
3170 switch (GET_CODE (folded_arg
))
3175 const_arg
= equiv_constant (folded_arg
);
3182 const_arg
= folded_arg
;
3187 /* The cc0-user and cc0-setter may be in different blocks if
3188 the cc0-setter potentially traps. In that case PREV_INSN_CC0
3189 will have been cleared as we exited the block with the
3192 While we could potentially track cc0 in this case, it just
3193 doesn't seem to be worth it given that cc0 targets are not
3194 terribly common or important these days and trapping math
3195 is rarely used. The combination of those two conditions
3196 necessary to trip this situation is exceedingly rare in the
3200 const_arg
= NULL_RTX
;
3204 folded_arg
= prev_insn_cc0
;
3205 mode_arg
= prev_insn_cc0_mode
;
3206 const_arg
= equiv_constant (folded_arg
);
3212 folded_arg
= fold_rtx (folded_arg
, insn
);
3213 const_arg
= equiv_constant (folded_arg
);
3217 /* For the first three operands, see if the operand
3218 is constant or equivalent to a constant. */
3222 folded_arg0
= folded_arg
;
3223 const_arg0
= const_arg
;
3224 mode_arg0
= mode_arg
;
3227 folded_arg1
= folded_arg
;
3228 const_arg1
= const_arg
;
3231 const_arg2
= const_arg
;
3235 /* Pick the least expensive of the argument and an equivalent constant
3238 && const_arg
!= folded_arg
3239 && COST_IN (const_arg
, code
, i
) <= COST_IN (folded_arg
, code
, i
)
3241 /* It's not safe to substitute the operand of a conversion
3242 operator with a constant, as the conversion's identity
3243 depends upon the mode of its operand. This optimization
3244 is handled by the call to simplify_unary_operation. */
3245 && (GET_RTX_CLASS (code
) != RTX_UNARY
3246 || GET_MODE (const_arg
) == mode_arg0
3247 || (code
!= ZERO_EXTEND
3248 && code
!= SIGN_EXTEND
3250 && code
!= FLOAT_TRUNCATE
3251 && code
!= FLOAT_EXTEND
3254 && code
!= UNSIGNED_FLOAT
3255 && code
!= UNSIGNED_FIX
)))
3256 folded_arg
= const_arg
;
3258 if (folded_arg
== XEXP (x
, i
))
3261 if (insn
== NULL_RTX
&& !changed
)
3264 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3269 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3270 consistent with the order in X. */
3271 if (canonicalize_change_group (insn
, x
))
3274 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3275 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3278 apply_change_group ();
3281 /* If X is an arithmetic operation, see if we can simplify it. */
3283 switch (GET_RTX_CLASS (code
))
3287 /* We can't simplify extension ops unless we know the
3289 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3290 && mode_arg0
== VOIDmode
)
3293 new_rtx
= simplify_unary_operation (code
, mode
,
3294 const_arg0
? const_arg0
: folded_arg0
,
3300 case RTX_COMM_COMPARE
:
3301 /* See what items are actually being compared and set FOLDED_ARG[01]
3302 to those values and CODE to the actual comparison code. If any are
3303 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3304 do anything if both operands are already known to be constant. */
3306 /* ??? Vector mode comparisons are not supported yet. */
3307 if (VECTOR_MODE_P (mode
))
3310 if (const_arg0
== 0 || const_arg1
== 0)
3312 struct table_elt
*p0
, *p1
;
3313 rtx true_rtx
, false_rtx
;
3314 enum machine_mode mode_arg1
;
3316 if (SCALAR_FLOAT_MODE_P (mode
))
3318 #ifdef FLOAT_STORE_FLAG_VALUE
3319 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3320 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3322 true_rtx
= NULL_RTX
;
3324 false_rtx
= CONST0_RTX (mode
);
3328 true_rtx
= const_true_rtx
;
3329 false_rtx
= const0_rtx
;
3332 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3333 &mode_arg0
, &mode_arg1
);
3335 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3336 what kinds of things are being compared, so we can't do
3337 anything with this comparison. */
3339 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3342 const_arg0
= equiv_constant (folded_arg0
);
3343 const_arg1
= equiv_constant (folded_arg1
);
3345 /* If we do not now have two constants being compared, see
3346 if we can nevertheless deduce some things about the
3348 if (const_arg0
== 0 || const_arg1
== 0)
3350 if (const_arg1
!= NULL
)
3352 rtx cheapest_simplification
;
3355 struct table_elt
*p
;
3357 /* See if we can find an equivalent of folded_arg0
3358 that gets us a cheaper expression, possibly a
3359 constant through simplifications. */
3360 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3365 cheapest_simplification
= x
;
3366 cheapest_cost
= COST (x
);
3368 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3372 /* If the entry isn't valid, skip it. */
3373 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3376 /* Try to simplify using this equivalence. */
3378 = simplify_relational_operation (code
, mode
,
3383 if (simp_result
== NULL
)
3386 cost
= COST (simp_result
);
3387 if (cost
< cheapest_cost
)
3389 cheapest_cost
= cost
;
3390 cheapest_simplification
= simp_result
;
3394 /* If we have a cheaper expression now, use that
3395 and try folding it further, from the top. */
3396 if (cheapest_simplification
!= x
)
3397 return fold_rtx (copy_rtx (cheapest_simplification
),
3402 /* See if the two operands are the same. */
3404 if ((REG_P (folded_arg0
)
3405 && REG_P (folded_arg1
)
3406 && (REG_QTY (REGNO (folded_arg0
))
3407 == REG_QTY (REGNO (folded_arg1
))))
3408 || ((p0
= lookup (folded_arg0
,
3409 SAFE_HASH (folded_arg0
, mode_arg0
),
3411 && (p1
= lookup (folded_arg1
,
3412 SAFE_HASH (folded_arg1
, mode_arg0
),
3414 && p0
->first_same_value
== p1
->first_same_value
))
3415 folded_arg1
= folded_arg0
;
3417 /* If FOLDED_ARG0 is a register, see if the comparison we are
3418 doing now is either the same as we did before or the reverse
3419 (we only check the reverse if not floating-point). */
3420 else if (REG_P (folded_arg0
))
3422 int qty
= REG_QTY (REGNO (folded_arg0
));
3424 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3426 struct qty_table_elem
*ent
= &qty_table
[qty
];
3428 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3429 || (! FLOAT_MODE_P (mode_arg0
)
3430 && comparison_dominates_p (ent
->comparison_code
,
3431 reverse_condition (code
))))
3432 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3434 && rtx_equal_p (ent
->comparison_const
,
3436 || (REG_P (folded_arg1
)
3437 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3439 if (comparison_dominates_p (ent
->comparison_code
, code
))
3454 /* If we are comparing against zero, see if the first operand is
3455 equivalent to an IOR with a constant. If so, we may be able to
3456 determine the result of this comparison. */
3457 if (const_arg1
== const0_rtx
&& !const_arg0
)
3459 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3463 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3464 && CONST_INT_P (inner_const
)
3465 && INTVAL (inner_const
) != 0)
3466 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3470 rtx op0
= const_arg0
? const_arg0
: copy_rtx (folded_arg0
);
3471 rtx op1
= const_arg1
? const_arg1
: copy_rtx (folded_arg1
);
3472 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
,
3478 case RTX_COMM_ARITH
:
3482 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3483 with that LABEL_REF as its second operand. If so, the result is
3484 the first operand of that MINUS. This handles switches with an
3485 ADDR_DIFF_VEC table. */
3486 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3489 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3490 : lookup_as_function (folded_arg0
, MINUS
);
3492 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3493 && LABEL_REF_LABEL (XEXP (y
, 1)) == LABEL_REF_LABEL (const_arg1
))
3496 /* Now try for a CONST of a MINUS like the above. */
3497 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3498 : lookup_as_function (folded_arg0
, CONST
))) != 0
3499 && GET_CODE (XEXP (y
, 0)) == MINUS
3500 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3501 && LABEL_REF_LABEL (XEXP (XEXP (y
, 0), 1)) == LABEL_REF_LABEL (const_arg1
))
3502 return XEXP (XEXP (y
, 0), 0);
3505 /* Likewise if the operands are in the other order. */
3506 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3509 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3510 : lookup_as_function (folded_arg1
, MINUS
);
3512 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3513 && LABEL_REF_LABEL (XEXP (y
, 1)) == LABEL_REF_LABEL (const_arg0
))
3516 /* Now try for a CONST of a MINUS like the above. */
3517 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3518 : lookup_as_function (folded_arg1
, CONST
))) != 0
3519 && GET_CODE (XEXP (y
, 0)) == MINUS
3520 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3521 && LABEL_REF_LABEL (XEXP (XEXP (y
, 0), 1)) == LABEL_REF_LABEL (const_arg0
))
3522 return XEXP (XEXP (y
, 0), 0);
3525 /* If second operand is a register equivalent to a negative
3526 CONST_INT, see if we can find a register equivalent to the
3527 positive constant. Make a MINUS if so. Don't do this for
3528 a non-negative constant since we might then alternate between
3529 choosing positive and negative constants. Having the positive
3530 constant previously-used is the more common case. Be sure
3531 the resulting constant is non-negative; if const_arg1 were
3532 the smallest negative number this would overflow: depending
3533 on the mode, this would either just be the same value (and
3534 hence not save anything) or be incorrect. */
3535 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3536 && INTVAL (const_arg1
) < 0
3537 /* This used to test
3539 -INTVAL (const_arg1) >= 0
3541 But The Sun V5.0 compilers mis-compiled that test. So
3542 instead we test for the problematic value in a more direct
3543 manner and hope the Sun compilers get it correct. */
3544 && INTVAL (const_arg1
) !=
3545 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
3546 && REG_P (folded_arg1
))
3548 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3550 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3553 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3555 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3556 canon_reg (p
->exp
, NULL
));
3561 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3562 If so, produce (PLUS Z C2-C). */
3563 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
))
3565 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3566 if (y
&& CONST_INT_P (XEXP (y
, 1)))
3567 return fold_rtx (plus_constant (mode
, copy_rtx (y
),
3568 -INTVAL (const_arg1
)),
3575 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3576 case IOR
: case AND
: case XOR
:
3578 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3579 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3580 is known to be of similar form, we may be able to replace the
3581 operation with a combined operation. This may eliminate the
3582 intermediate operation if every use is simplified in this way.
3583 Note that the similar optimization done by combine.c only works
3584 if the intermediate operation's result has only one reference. */
3586 if (REG_P (folded_arg0
)
3587 && const_arg1
&& CONST_INT_P (const_arg1
))
3590 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3591 rtx y
, inner_const
, new_const
;
3592 rtx canon_const_arg1
= const_arg1
;
3593 enum rtx_code associate_code
;
3596 && (INTVAL (const_arg1
) >= GET_MODE_PRECISION (mode
)
3597 || INTVAL (const_arg1
) < 0))
3599 if (SHIFT_COUNT_TRUNCATED
)
3600 canon_const_arg1
= GEN_INT (INTVAL (const_arg1
)
3601 & (GET_MODE_BITSIZE (mode
)
3607 y
= lookup_as_function (folded_arg0
, code
);
3611 /* If we have compiled a statement like
3612 "if (x == (x & mask1))", and now are looking at
3613 "x & mask2", we will have a case where the first operand
3614 of Y is the same as our first operand. Unless we detect
3615 this case, an infinite loop will result. */
3616 if (XEXP (y
, 0) == folded_arg0
)
3619 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3620 if (!inner_const
|| !CONST_INT_P (inner_const
))
3623 /* Don't associate these operations if they are a PLUS with the
3624 same constant and it is a power of two. These might be doable
3625 with a pre- or post-increment. Similarly for two subtracts of
3626 identical powers of two with post decrement. */
3628 if (code
== PLUS
&& const_arg1
== inner_const
3629 && ((HAVE_PRE_INCREMENT
3630 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3631 || (HAVE_POST_INCREMENT
3632 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3633 || (HAVE_PRE_DECREMENT
3634 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
3635 || (HAVE_POST_DECREMENT
3636 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
3639 /* ??? Vector mode shifts by scalar
3640 shift operand are not supported yet. */
3641 if (is_shift
&& VECTOR_MODE_P (mode
))
3645 && (INTVAL (inner_const
) >= GET_MODE_PRECISION (mode
)
3646 || INTVAL (inner_const
) < 0))
3648 if (SHIFT_COUNT_TRUNCATED
)
3649 inner_const
= GEN_INT (INTVAL (inner_const
)
3650 & (GET_MODE_BITSIZE (mode
) - 1));
3655 /* Compute the code used to compose the constants. For example,
3656 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3658 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3660 new_const
= simplify_binary_operation (associate_code
, mode
,
3667 /* If we are associating shift operations, don't let this
3668 produce a shift of the size of the object or larger.
3669 This could occur when we follow a sign-extend by a right
3670 shift on a machine that does a sign-extend as a pair
3674 && CONST_INT_P (new_const
)
3675 && INTVAL (new_const
) >= GET_MODE_PRECISION (mode
))
3677 /* As an exception, we can turn an ASHIFTRT of this
3678 form into a shift of the number of bits - 1. */
3679 if (code
== ASHIFTRT
)
3680 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
3681 else if (!side_effects_p (XEXP (y
, 0)))
3682 return CONST0_RTX (mode
);
3687 y
= copy_rtx (XEXP (y
, 0));
3689 /* If Y contains our first operand (the most common way this
3690 can happen is if Y is a MEM), we would do into an infinite
3691 loop if we tried to fold it. So don't in that case. */
3693 if (! reg_mentioned_p (folded_arg0
, y
))
3694 y
= fold_rtx (y
, insn
);
3696 return simplify_gen_binary (code
, mode
, y
, new_const
);
3700 case DIV
: case UDIV
:
3701 /* ??? The associative optimization performed immediately above is
3702 also possible for DIV and UDIV using associate_code of MULT.
3703 However, we would need extra code to verify that the
3704 multiplication does not overflow, that is, there is no overflow
3705 in the calculation of new_const. */
3712 new_rtx
= simplify_binary_operation (code
, mode
,
3713 const_arg0
? const_arg0
: folded_arg0
,
3714 const_arg1
? const_arg1
: folded_arg1
);
3718 /* (lo_sum (high X) X) is simply X. */
3719 if (code
== LO_SUM
&& const_arg0
!= 0
3720 && GET_CODE (const_arg0
) == HIGH
3721 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3726 case RTX_BITFIELD_OPS
:
3727 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3728 const_arg0
? const_arg0
: folded_arg0
,
3729 const_arg1
? const_arg1
: folded_arg1
,
3730 const_arg2
? const_arg2
: XEXP (x
, 2));
3737 return new_rtx
? new_rtx
: x
;
3740 /* Return a constant value currently equivalent to X.
3741 Return 0 if we don't know one. */
3744 equiv_constant (rtx x
)
3747 && REGNO_QTY_VALID_P (REGNO (x
)))
3749 int x_q
= REG_QTY (REGNO (x
));
3750 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3752 if (x_ent
->const_rtx
)
3753 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3756 if (x
== 0 || CONSTANT_P (x
))
3759 if (GET_CODE (x
) == SUBREG
)
3761 enum machine_mode mode
= GET_MODE (x
);
3762 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3765 /* See if we previously assigned a constant value to this SUBREG. */
3766 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3767 || (new_rtx
= lookup_as_function (x
, CONST_WIDE_INT
)) != 0
3768 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3769 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3772 /* If we didn't and if doing so makes sense, see if we previously
3773 assigned a constant value to the enclosing word mode SUBREG. */
3774 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
)
3775 && GET_MODE_SIZE (word_mode
) < GET_MODE_SIZE (imode
))
3777 int byte
= SUBREG_BYTE (x
) - subreg_lowpart_offset (mode
, word_mode
);
3778 if (byte
>= 0 && (byte
% UNITS_PER_WORD
) == 0)
3780 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3781 new_rtx
= lookup_as_function (y
, CONST_INT
);
3783 return gen_lowpart (mode
, new_rtx
);
3787 /* Otherwise see if we already have a constant for the inner REG,
3788 and if that is enough to calculate an equivalent constant for
3789 the subreg. Note that the upper bits of paradoxical subregs
3790 are undefined, so they cannot be said to equal anything. */
3791 if (REG_P (SUBREG_REG (x
))
3792 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (imode
)
3793 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3794 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3799 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3800 the hash table in case its value was seen before. */
3804 struct table_elt
*elt
;
3806 x
= avoid_constant_pool_reference (x
);
3810 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3814 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3815 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3822 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3825 In certain cases, this can cause us to add an equivalence. For example,
3826 if we are following the taken case of
3828 we can add the fact that `i' and '2' are now equivalent.
3830 In any case, we can record that this comparison was passed. If the same
3831 comparison is seen later, we will know its value. */
3834 record_jump_equiv (rtx_insn
*insn
, bool taken
)
3836 int cond_known_true
;
3839 enum machine_mode mode
, mode0
, mode1
;
3840 int reversed_nonequality
= 0;
3843 /* Ensure this is the right kind of insn. */
3844 gcc_assert (any_condjump_p (insn
));
3846 set
= pc_set (insn
);
3848 /* See if this jump condition is known true or false. */
3850 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3852 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3854 /* Get the type of comparison being done and the operands being compared.
3855 If we had to reverse a non-equality condition, record that fact so we
3856 know that it isn't valid for floating-point. */
3857 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3858 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3859 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3861 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3862 if (! cond_known_true
)
3864 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3866 /* Don't remember if we can't find the inverse. */
3867 if (code
== UNKNOWN
)
3871 /* The mode is the mode of the non-constant. */
3873 if (mode1
!= VOIDmode
)
3876 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3879 /* Yet another form of subreg creation. In this case, we want something in
3880 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3883 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
3885 enum machine_mode op_mode
= GET_MODE (op
);
3886 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3888 return lowpart_subreg (mode
, op
, op_mode
);
3891 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3892 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3893 Make any useful entries we can with that information. Called from
3894 above function and called recursively. */
3897 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
3898 rtx op1
, int reversed_nonequality
)
3900 unsigned op0_hash
, op1_hash
;
3901 int op0_in_memory
, op1_in_memory
;
3902 struct table_elt
*op0_elt
, *op1_elt
;
3904 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3905 we know that they are also equal in the smaller mode (this is also
3906 true for all smaller modes whether or not there is a SUBREG, but
3907 is not worth testing for with no SUBREG). */
3909 /* Note that GET_MODE (op0) may not equal MODE. */
3910 if (code
== EQ
&& paradoxical_subreg_p (op0
))
3912 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3913 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3915 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3916 reversed_nonequality
);
3919 if (code
== EQ
&& paradoxical_subreg_p (op1
))
3921 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3922 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3924 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3925 reversed_nonequality
);
3928 /* Similarly, if this is an NE comparison, and either is a SUBREG
3929 making a smaller mode, we know the whole thing is also NE. */
3931 /* Note that GET_MODE (op0) may not equal MODE;
3932 if we test MODE instead, we can get an infinite recursion
3933 alternating between two modes each wider than MODE. */
3935 if (code
== NE
&& GET_CODE (op0
) == SUBREG
3936 && subreg_lowpart_p (op0
)
3937 && (GET_MODE_SIZE (GET_MODE (op0
))
3938 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3940 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3941 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3943 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3944 reversed_nonequality
);
3947 if (code
== NE
&& GET_CODE (op1
) == SUBREG
3948 && subreg_lowpart_p (op1
)
3949 && (GET_MODE_SIZE (GET_MODE (op1
))
3950 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
3952 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3953 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3955 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3956 reversed_nonequality
);
3959 /* Hash both operands. */
3962 hash_arg_in_memory
= 0;
3963 op0_hash
= HASH (op0
, mode
);
3964 op0_in_memory
= hash_arg_in_memory
;
3970 hash_arg_in_memory
= 0;
3971 op1_hash
= HASH (op1
, mode
);
3972 op1_in_memory
= hash_arg_in_memory
;
3977 /* Look up both operands. */
3978 op0_elt
= lookup (op0
, op0_hash
, mode
);
3979 op1_elt
= lookup (op1
, op1_hash
, mode
);
3981 /* If both operands are already equivalent or if they are not in the
3982 table but are identical, do nothing. */
3983 if ((op0_elt
!= 0 && op1_elt
!= 0
3984 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
3985 || op0
== op1
|| rtx_equal_p (op0
, op1
))
3988 /* If we aren't setting two things equal all we can do is save this
3989 comparison. Similarly if this is floating-point. In the latter
3990 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3991 If we record the equality, we might inadvertently delete code
3992 whose intent was to change -0 to +0. */
3994 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
3996 struct qty_table_elem
*ent
;
3999 /* If we reversed a floating-point comparison, if OP0 is not a
4000 register, or if OP1 is neither a register or constant, we can't
4004 op1
= equiv_constant (op1
);
4006 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4007 || !REG_P (op0
) || op1
== 0)
4010 /* Put OP0 in the hash table if it isn't already. This gives it a
4011 new quantity number. */
4014 if (insert_regs (op0
, NULL
, 0))
4016 rehash_using_reg (op0
);
4017 op0_hash
= HASH (op0
, mode
);
4019 /* If OP0 is contained in OP1, this changes its hash code
4020 as well. Faster to rehash than to check, except
4021 for the simple case of a constant. */
4022 if (! CONSTANT_P (op1
))
4023 op1_hash
= HASH (op1
,mode
);
4026 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4027 op0_elt
->in_memory
= op0_in_memory
;
4030 qty
= REG_QTY (REGNO (op0
));
4031 ent
= &qty_table
[qty
];
4033 ent
->comparison_code
= code
;
4036 /* Look it up again--in case op0 and op1 are the same. */
4037 op1_elt
= lookup (op1
, op1_hash
, mode
);
4039 /* Put OP1 in the hash table so it gets a new quantity number. */
4042 if (insert_regs (op1
, NULL
, 0))
4044 rehash_using_reg (op1
);
4045 op1_hash
= HASH (op1
, mode
);
4048 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4049 op1_elt
->in_memory
= op1_in_memory
;
4052 ent
->comparison_const
= NULL_RTX
;
4053 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4057 ent
->comparison_const
= op1
;
4058 ent
->comparison_qty
= -1;
4064 /* If either side is still missing an equivalence, make it now,
4065 then merge the equivalences. */
4069 if (insert_regs (op0
, NULL
, 0))
4071 rehash_using_reg (op0
);
4072 op0_hash
= HASH (op0
, mode
);
4075 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4076 op0_elt
->in_memory
= op0_in_memory
;
4081 if (insert_regs (op1
, NULL
, 0))
4083 rehash_using_reg (op1
);
4084 op1_hash
= HASH (op1
, mode
);
4087 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4088 op1_elt
->in_memory
= op1_in_memory
;
4091 merge_equiv_classes (op0_elt
, op1_elt
);
4094 /* CSE processing for one instruction.
4096 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4097 but the few that "leak through" are cleaned up by cse_insn, and complex
4098 addressing modes are often formed here.
4100 The main function is cse_insn, and between here and that function
4101 a couple of helper functions is defined to keep the size of cse_insn
4102 within reasonable proportions.
4104 Data is shared between the main and helper functions via STRUCT SET,
4105 that contains all data related for every set in the instruction that
4108 Note that cse_main processes all sets in the instruction. Most
4109 passes in GCC only process simple SET insns or single_set insns, but
4110 CSE processes insns with multiple sets as well. */
4112 /* Data on one SET contained in the instruction. */
4116 /* The SET rtx itself. */
4118 /* The SET_SRC of the rtx (the original value, if it is changing). */
4120 /* The hash-table element for the SET_SRC of the SET. */
4121 struct table_elt
*src_elt
;
4122 /* Hash value for the SET_SRC. */
4124 /* Hash value for the SET_DEST. */
4126 /* The SET_DEST, with SUBREG, etc., stripped. */
4128 /* Nonzero if the SET_SRC is in memory. */
4130 /* Nonzero if the SET_SRC contains something
4131 whose value cannot be predicted and understood. */
4133 /* Original machine mode, in case it becomes a CONST_INT.
4134 The size of this field should match the size of the mode
4135 field of struct rtx_def (see rtl.h). */
4136 ENUM_BITFIELD(machine_mode
) mode
: 8;
4137 /* A constant equivalent for SET_SRC, if any. */
4139 /* Hash value of constant equivalent for SET_SRC. */
4140 unsigned src_const_hash
;
4141 /* Table entry for constant equivalent for SET_SRC, if any. */
4142 struct table_elt
*src_const_elt
;
4143 /* Table entry for the destination address. */
4144 struct table_elt
*dest_addr_elt
;
4147 /* Special handling for (set REG0 REG1) where REG0 is the
4148 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4149 be used in the sequel, so (if easily done) change this insn to
4150 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4151 that computed their value. Then REG1 will become a dead store
4152 and won't cloud the situation for later optimizations.
4154 Do not make this change if REG1 is a hard register, because it will
4155 then be used in the sequel and we may be changing a two-operand insn
4156 into a three-operand insn.
4158 This is the last transformation that cse_insn will try to do. */
4161 try_back_substitute_reg (rtx set
, rtx_insn
*insn
)
4163 rtx dest
= SET_DEST (set
);
4164 rtx src
= SET_SRC (set
);
4167 && REG_P (src
) && ! HARD_REGISTER_P (src
)
4168 && REGNO_QTY_VALID_P (REGNO (src
)))
4170 int src_q
= REG_QTY (REGNO (src
));
4171 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4173 if (src_ent
->first_reg
== REGNO (dest
))
4175 /* Scan for the previous nonnote insn, but stop at a basic
4177 rtx_insn
*prev
= insn
;
4178 rtx_insn
*bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
4181 prev
= PREV_INSN (prev
);
4183 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
4185 /* Do not swap the registers around if the previous instruction
4186 attaches a REG_EQUIV note to REG1.
4188 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4189 from the pseudo that originally shadowed an incoming argument
4190 to another register. Some uses of REG_EQUIV might rely on it
4191 being attached to REG1 rather than REG2.
4193 This section previously turned the REG_EQUIV into a REG_EQUAL
4194 note. We cannot do that because REG_EQUIV may provide an
4195 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4196 if (NONJUMP_INSN_P (prev
)
4197 && GET_CODE (PATTERN (prev
)) == SET
4198 && SET_DEST (PATTERN (prev
)) == src
4199 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
4203 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
4204 validate_change (insn
, &SET_DEST (set
), src
, 1);
4205 validate_change (insn
, &SET_SRC (set
), dest
, 1);
4206 apply_change_group ();
4208 /* If INSN has a REG_EQUAL note, and this note mentions
4209 REG0, then we must delete it, because the value in
4210 REG0 has changed. If the note's value is REG1, we must
4211 also delete it because that is now this insn's dest. */
4212 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4214 && (reg_mentioned_p (dest
, XEXP (note
, 0))
4215 || rtx_equal_p (src
, XEXP (note
, 0))))
4216 remove_note (insn
, note
);
4222 /* Record all the SETs in this instruction into SETS_PTR,
4223 and return the number of recorded sets. */
4225 find_sets_in_insn (rtx_insn
*insn
, struct set
**psets
)
4227 struct set
*sets
= *psets
;
4229 rtx x
= PATTERN (insn
);
4231 if (GET_CODE (x
) == SET
)
4233 /* Ignore SETs that are unconditional jumps.
4234 They never need cse processing, so this does not hurt.
4235 The reason is not efficiency but rather
4236 so that we can test at the end for instructions
4237 that have been simplified to unconditional jumps
4238 and not be misled by unchanged instructions
4239 that were unconditional jumps to begin with. */
4240 if (SET_DEST (x
) == pc_rtx
4241 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4243 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4244 The hard function value register is used only once, to copy to
4245 someplace else, so it isn't worth cse'ing. */
4246 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4249 sets
[n_sets
++].rtl
= x
;
4251 else if (GET_CODE (x
) == PARALLEL
)
4253 int i
, lim
= XVECLEN (x
, 0);
4255 /* Go over the epressions of the PARALLEL in forward order, to
4256 put them in the same order in the SETS array. */
4257 for (i
= 0; i
< lim
; i
++)
4259 rtx y
= XVECEXP (x
, 0, i
);
4260 if (GET_CODE (y
) == SET
)
4262 /* As above, we ignore unconditional jumps and call-insns and
4263 ignore the result of apply_change_group. */
4264 if (SET_DEST (y
) == pc_rtx
4265 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4267 else if (GET_CODE (SET_SRC (y
)) == CALL
)
4270 sets
[n_sets
++].rtl
= y
;
4278 /* Where possible, substitute every register reference in the N_SETS
4279 number of SETS in INSN with the the canonical register.
4281 Register canonicalization propagatest the earliest register (i.e.
4282 one that is set before INSN) with the same value. This is a very
4283 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4284 to RTL. For instance, a CONST for an address is usually expanded
4285 multiple times to loads into different registers, thus creating many
4286 subexpressions of the form:
4288 (set (reg1) (some_const))
4289 (set (mem (... reg1 ...) (thing)))
4290 (set (reg2) (some_const))
4291 (set (mem (... reg2 ...) (thing)))
4293 After canonicalizing, the code takes the following form:
4295 (set (reg1) (some_const))
4296 (set (mem (... reg1 ...) (thing)))
4297 (set (reg2) (some_const))
4298 (set (mem (... reg1 ...) (thing)))
4300 The set to reg2 is now trivially dead, and the memory reference (or
4301 address, or whatever) may be a candidate for further CSEing.
4303 In this function, the result of apply_change_group can be ignored;
4307 canonicalize_insn (rtx_insn
*insn
, struct set
**psets
, int n_sets
)
4309 struct set
*sets
= *psets
;
4311 rtx x
= PATTERN (insn
);
4316 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4317 if (GET_CODE (XEXP (tem
, 0)) != SET
)
4318 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4321 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
4323 canon_reg (SET_SRC (x
), insn
);
4324 apply_change_group ();
4325 fold_rtx (SET_SRC (x
), insn
);
4327 else if (GET_CODE (x
) == CLOBBER
)
4329 /* If we clobber memory, canon the address.
4330 This does nothing when a register is clobbered
4331 because we have already invalidated the reg. */
4332 if (MEM_P (XEXP (x
, 0)))
4333 canon_reg (XEXP (x
, 0), insn
);
4335 else if (GET_CODE (x
) == USE
4336 && ! (REG_P (XEXP (x
, 0))
4337 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4338 /* Canonicalize a USE of a pseudo register or memory location. */
4339 canon_reg (x
, insn
);
4340 else if (GET_CODE (x
) == ASM_OPERANDS
)
4342 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
4344 rtx input
= ASM_OPERANDS_INPUT (x
, i
);
4345 if (!(REG_P (input
) && REGNO (input
) < FIRST_PSEUDO_REGISTER
))
4347 input
= canon_reg (input
, insn
);
4348 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
), input
, 1);
4352 else if (GET_CODE (x
) == CALL
)
4354 canon_reg (x
, insn
);
4355 apply_change_group ();
4358 else if (DEBUG_INSN_P (insn
))
4359 canon_reg (PATTERN (insn
), insn
);
4360 else if (GET_CODE (x
) == PARALLEL
)
4362 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
4364 rtx y
= XVECEXP (x
, 0, i
);
4365 if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
4367 canon_reg (SET_SRC (y
), insn
);
4368 apply_change_group ();
4369 fold_rtx (SET_SRC (y
), insn
);
4371 else if (GET_CODE (y
) == CLOBBER
)
4373 if (MEM_P (XEXP (y
, 0)))
4374 canon_reg (XEXP (y
, 0), insn
);
4376 else if (GET_CODE (y
) == USE
4377 && ! (REG_P (XEXP (y
, 0))
4378 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4379 canon_reg (y
, insn
);
4380 else if (GET_CODE (y
) == CALL
)
4382 canon_reg (y
, insn
);
4383 apply_change_group ();
4389 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4390 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4392 /* We potentially will process this insn many times. Therefore,
4393 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4396 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4397 because cse_insn handles those specially. */
4398 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != STRICT_LOW_PART
4399 && rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
4400 remove_note (insn
, tem
);
4403 canon_reg (XEXP (tem
, 0), insn
);
4404 apply_change_group ();
4405 XEXP (tem
, 0) = fold_rtx (XEXP (tem
, 0), insn
);
4406 df_notes_rescan (insn
);
4410 /* Canonicalize sources and addresses of destinations.
4411 We do this in a separate pass to avoid problems when a MATCH_DUP is
4412 present in the insn pattern. In that case, we want to ensure that
4413 we don't break the duplicate nature of the pattern. So we will replace
4414 both operands at the same time. Otherwise, we would fail to find an
4415 equivalent substitution in the loop calling validate_change below.
4417 We used to suppress canonicalization of DEST if it appears in SRC,
4418 but we don't do this any more. */
4420 for (i
= 0; i
< n_sets
; i
++)
4422 rtx dest
= SET_DEST (sets
[i
].rtl
);
4423 rtx src
= SET_SRC (sets
[i
].rtl
);
4424 rtx new_rtx
= canon_reg (src
, insn
);
4426 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4428 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4430 validate_change (insn
, &XEXP (dest
, 1),
4431 canon_reg (XEXP (dest
, 1), insn
), 1);
4432 validate_change (insn
, &XEXP (dest
, 2),
4433 canon_reg (XEXP (dest
, 2), insn
), 1);
4436 while (GET_CODE (dest
) == SUBREG
4437 || GET_CODE (dest
) == ZERO_EXTRACT
4438 || GET_CODE (dest
) == STRICT_LOW_PART
)
4439 dest
= XEXP (dest
, 0);
4442 canon_reg (dest
, insn
);
4445 /* Now that we have done all the replacements, we can apply the change
4446 group and see if they all work. Note that this will cause some
4447 canonicalizations that would have worked individually not to be applied
4448 because some other canonicalization didn't work, but this should not
4451 The result of apply_change_group can be ignored; see canon_reg. */
4453 apply_change_group ();
4456 /* Main function of CSE.
4457 First simplify sources and addresses of all assignments
4458 in the instruction, using previously-computed equivalents values.
4459 Then install the new sources and destinations in the table
4460 of available values. */
4463 cse_insn (rtx_insn
*insn
)
4465 rtx x
= PATTERN (insn
);
4471 struct table_elt
*src_eqv_elt
= 0;
4472 int src_eqv_volatile
= 0;
4473 int src_eqv_in_memory
= 0;
4474 unsigned src_eqv_hash
= 0;
4476 struct set
*sets
= (struct set
*) 0;
4478 if (GET_CODE (x
) == SET
)
4479 sets
= XALLOCA (struct set
);
4480 else if (GET_CODE (x
) == PARALLEL
)
4481 sets
= XALLOCAVEC (struct set
, XVECLEN (x
, 0));
4485 /* Records what this insn does to set CC0. */
4487 this_insn_cc0_mode
= VOIDmode
;
4490 /* Find all regs explicitly clobbered in this insn,
4491 to ensure they are not replaced with any other regs
4492 elsewhere in this insn. */
4493 invalidate_from_sets_and_clobbers (insn
);
4495 /* Record all the SETs in this instruction. */
4496 n_sets
= find_sets_in_insn (insn
, &sets
);
4498 /* Substitute the canonical register where possible. */
4499 canonicalize_insn (insn
, &sets
, n_sets
);
4501 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4502 if different, or if the DEST is a STRICT_LOW_PART. The latter condition
4503 is necessary because SRC_EQV is handled specially for this case, and if
4504 it isn't set, then there will be no equivalence for the destination. */
4505 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4506 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4507 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4508 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4509 src_eqv
= copy_rtx (XEXP (tem
, 0));
4511 /* Set sets[i].src_elt to the class each source belongs to.
4512 Detect assignments from or to volatile things
4513 and set set[i] to zero so they will be ignored
4514 in the rest of this function.
4516 Nothing in this loop changes the hash table or the register chains. */
4518 for (i
= 0; i
< n_sets
; i
++)
4520 bool repeat
= false;
4523 struct table_elt
*elt
= 0, *p
;
4524 enum machine_mode mode
;
4527 rtx src_related
= 0;
4528 bool src_related_is_const_anchor
= false;
4529 struct table_elt
*src_const_elt
= 0;
4530 int src_cost
= MAX_COST
;
4531 int src_eqv_cost
= MAX_COST
;
4532 int src_folded_cost
= MAX_COST
;
4533 int src_related_cost
= MAX_COST
;
4534 int src_elt_cost
= MAX_COST
;
4535 int src_regcost
= MAX_COST
;
4536 int src_eqv_regcost
= MAX_COST
;
4537 int src_folded_regcost
= MAX_COST
;
4538 int src_related_regcost
= MAX_COST
;
4539 int src_elt_regcost
= MAX_COST
;
4540 /* Set nonzero if we need to call force_const_mem on with the
4541 contents of src_folded before using it. */
4542 int src_folded_force_flag
= 0;
4544 dest
= SET_DEST (sets
[i
].rtl
);
4545 src
= SET_SRC (sets
[i
].rtl
);
4547 /* If SRC is a constant that has no machine mode,
4548 hash it with the destination's machine mode.
4549 This way we can keep different modes separate. */
4551 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4552 sets
[i
].mode
= mode
;
4556 enum machine_mode eqvmode
= mode
;
4557 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4558 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4560 hash_arg_in_memory
= 0;
4561 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4563 /* Find the equivalence class for the equivalent expression. */
4566 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4568 src_eqv_volatile
= do_not_record
;
4569 src_eqv_in_memory
= hash_arg_in_memory
;
4572 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4573 value of the INNER register, not the destination. So it is not
4574 a valid substitution for the source. But save it for later. */
4575 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4578 src_eqv_here
= src_eqv
;
4580 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4581 simplified result, which may not necessarily be valid. */
4582 src_folded
= fold_rtx (src
, insn
);
4585 /* ??? This caused bad code to be generated for the m68k port with -O2.
4586 Suppose src is (CONST_INT -1), and that after truncation src_folded
4587 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4588 At the end we will add src and src_const to the same equivalence
4589 class. We now have 3 and -1 on the same equivalence class. This
4590 causes later instructions to be mis-optimized. */
4591 /* If storing a constant in a bitfield, pre-truncate the constant
4592 so we will be able to record it later. */
4593 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4595 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4597 if (CONST_INT_P (src
)
4598 && CONST_INT_P (width
)
4599 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4600 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4602 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4603 << INTVAL (width
)) - 1));
4607 /* Compute SRC's hash code, and also notice if it
4608 should not be recorded at all. In that case,
4609 prevent any further processing of this assignment. */
4611 hash_arg_in_memory
= 0;
4614 sets
[i
].src_hash
= HASH (src
, mode
);
4615 sets
[i
].src_volatile
= do_not_record
;
4616 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4618 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4619 a pseudo, do not record SRC. Using SRC as a replacement for
4620 anything else will be incorrect in that situation. Note that
4621 this usually occurs only for stack slots, in which case all the
4622 RTL would be referring to SRC, so we don't lose any optimization
4623 opportunities by not having SRC in the hash table. */
4626 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4628 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4629 sets
[i
].src_volatile
= 1;
4631 /* Also do not record result of a non-volatile inline asm with
4632 more than one result or with clobbers, we do not want CSE to
4633 break the inline asm apart. */
4634 else if (GET_CODE (src
) == ASM_OPERANDS
4635 && GET_CODE (x
) == PARALLEL
)
4636 sets
[i
].src_volatile
= 1;
4639 /* It is no longer clear why we used to do this, but it doesn't
4640 appear to still be needed. So let's try without it since this
4641 code hurts cse'ing widened ops. */
4642 /* If source is a paradoxical subreg (such as QI treated as an SI),
4643 treat it as volatile. It may do the work of an SI in one context
4644 where the extra bits are not being used, but cannot replace an SI
4646 if (paradoxical_subreg_p (src
))
4647 sets
[i
].src_volatile
= 1;
4650 /* Locate all possible equivalent forms for SRC. Try to replace
4651 SRC in the insn with each cheaper equivalent.
4653 We have the following types of equivalents: SRC itself, a folded
4654 version, a value given in a REG_EQUAL note, or a value related
4657 Each of these equivalents may be part of an additional class
4658 of equivalents (if more than one is in the table, they must be in
4659 the same class; we check for this).
4661 If the source is volatile, we don't do any table lookups.
4663 We note any constant equivalent for possible later use in a
4666 if (!sets
[i
].src_volatile
)
4667 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4669 sets
[i
].src_elt
= elt
;
4671 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4673 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4675 /* The REG_EQUAL is indicating that two formerly distinct
4676 classes are now equivalent. So merge them. */
4677 merge_equiv_classes (elt
, src_eqv_elt
);
4678 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4679 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4685 else if (src_eqv_elt
)
4688 /* Try to find a constant somewhere and record it in `src_const'.
4689 Record its table element, if any, in `src_const_elt'. Look in
4690 any known equivalences first. (If the constant is not in the
4691 table, also set `sets[i].src_const_hash'). */
4693 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4697 src_const_elt
= elt
;
4702 && (CONSTANT_P (src_folded
)
4703 /* Consider (minus (label_ref L1) (label_ref L2)) as
4704 "constant" here so we will record it. This allows us
4705 to fold switch statements when an ADDR_DIFF_VEC is used. */
4706 || (GET_CODE (src_folded
) == MINUS
4707 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4708 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4709 src_const
= src_folded
, src_const_elt
= elt
;
4710 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4711 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4713 /* If we don't know if the constant is in the table, get its
4714 hash code and look it up. */
4715 if (src_const
&& src_const_elt
== 0)
4717 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4718 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4721 sets
[i
].src_const
= src_const
;
4722 sets
[i
].src_const_elt
= src_const_elt
;
4724 /* If the constant and our source are both in the table, mark them as
4725 equivalent. Otherwise, if a constant is in the table but the source
4726 isn't, set ELT to it. */
4727 if (src_const_elt
&& elt
4728 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4729 merge_equiv_classes (elt
, src_const_elt
);
4730 else if (src_const_elt
&& elt
== 0)
4731 elt
= src_const_elt
;
4733 /* See if there is a register linearly related to a constant
4734 equivalent of SRC. */
4736 && (GET_CODE (src_const
) == CONST
4737 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4739 src_related
= use_related_value (src_const
, src_const_elt
);
4742 struct table_elt
*src_related_elt
4743 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4744 if (src_related_elt
&& elt
)
4746 if (elt
->first_same_value
4747 != src_related_elt
->first_same_value
)
4748 /* This can occur when we previously saw a CONST
4749 involving a SYMBOL_REF and then see the SYMBOL_REF
4750 twice. Merge the involved classes. */
4751 merge_equiv_classes (elt
, src_related_elt
);
4754 src_related_elt
= 0;
4756 else if (src_related_elt
&& elt
== 0)
4757 elt
= src_related_elt
;
4761 /* See if we have a CONST_INT that is already in a register in a
4764 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4765 && GET_MODE_CLASS (mode
) == MODE_INT
4766 && GET_MODE_PRECISION (mode
) < BITS_PER_WORD
)
4768 enum machine_mode wider_mode
;
4770 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
4771 wider_mode
!= VOIDmode
4772 && GET_MODE_PRECISION (wider_mode
) <= BITS_PER_WORD
4773 && src_related
== 0;
4774 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4776 struct table_elt
*const_elt
4777 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4782 for (const_elt
= const_elt
->first_same_value
;
4783 const_elt
; const_elt
= const_elt
->next_same_value
)
4784 if (REG_P (const_elt
->exp
))
4786 src_related
= gen_lowpart (mode
, const_elt
->exp
);
4792 /* Another possibility is that we have an AND with a constant in
4793 a mode narrower than a word. If so, it might have been generated
4794 as part of an "if" which would narrow the AND. If we already
4795 have done the AND in a wider mode, we can use a SUBREG of that
4798 if (flag_expensive_optimizations
&& ! src_related
4799 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4800 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4802 enum machine_mode tmode
;
4803 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4805 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4806 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4807 tmode
= GET_MODE_WIDER_MODE (tmode
))
4809 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4810 struct table_elt
*larger_elt
;
4814 PUT_MODE (new_and
, tmode
);
4815 XEXP (new_and
, 0) = inner
;
4816 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4817 if (larger_elt
== 0)
4820 for (larger_elt
= larger_elt
->first_same_value
;
4821 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4822 if (REG_P (larger_elt
->exp
))
4825 = gen_lowpart (mode
, larger_elt
->exp
);
4835 #ifdef LOAD_EXTEND_OP
4836 /* See if a MEM has already been loaded with a widening operation;
4837 if it has, we can use a subreg of that. Many CISC machines
4838 also have such operations, but this is only likely to be
4839 beneficial on these machines. */
4841 if (flag_expensive_optimizations
&& src_related
== 0
4842 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4843 && GET_MODE_CLASS (mode
) == MODE_INT
4844 && MEM_P (src
) && ! do_not_record
4845 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
4847 struct rtx_def memory_extend_buf
;
4848 rtx memory_extend_rtx
= &memory_extend_buf
;
4849 enum machine_mode tmode
;
4851 /* Set what we are trying to extend and the operation it might
4852 have been extended with. */
4853 memset (memory_extend_rtx
, 0, sizeof (*memory_extend_rtx
));
4854 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
4855 XEXP (memory_extend_rtx
, 0) = src
;
4857 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4858 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4859 tmode
= GET_MODE_WIDER_MODE (tmode
))
4861 struct table_elt
*larger_elt
;
4863 PUT_MODE (memory_extend_rtx
, tmode
);
4864 larger_elt
= lookup (memory_extend_rtx
,
4865 HASH (memory_extend_rtx
, tmode
), tmode
);
4866 if (larger_elt
== 0)
4869 for (larger_elt
= larger_elt
->first_same_value
;
4870 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4871 if (REG_P (larger_elt
->exp
))
4873 src_related
= gen_lowpart (mode
, larger_elt
->exp
);
4881 #endif /* LOAD_EXTEND_OP */
4883 /* Try to express the constant using a register+offset expression
4884 derived from a constant anchor. */
4886 if (targetm
.const_anchor
4889 && GET_CODE (src_const
) == CONST_INT
)
4891 src_related
= try_const_anchors (src_const
, mode
);
4892 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
4896 if (src
== src_folded
)
4899 /* At this point, ELT, if nonzero, points to a class of expressions
4900 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4901 and SRC_RELATED, if nonzero, each contain additional equivalent
4902 expressions. Prune these latter expressions by deleting expressions
4903 already in the equivalence class.
4905 Check for an equivalent identical to the destination. If found,
4906 this is the preferred equivalent since it will likely lead to
4907 elimination of the insn. Indicate this by placing it in
4911 elt
= elt
->first_same_value
;
4912 for (p
= elt
; p
; p
= p
->next_same_value
)
4914 enum rtx_code code
= GET_CODE (p
->exp
);
4916 /* If the expression is not valid, ignore it. Then we do not
4917 have to check for validity below. In most cases, we can use
4918 `rtx_equal_p', since canonicalization has already been done. */
4919 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
4922 /* Also skip paradoxical subregs, unless that's what we're
4924 if (paradoxical_subreg_p (p
->exp
)
4926 && GET_CODE (src
) == SUBREG
4927 && GET_MODE (src
) == GET_MODE (p
->exp
)
4928 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4929 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
4932 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
4934 else if (src_folded
&& GET_CODE (src_folded
) == code
4935 && rtx_equal_p (src_folded
, p
->exp
))
4937 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
4938 && rtx_equal_p (src_eqv_here
, p
->exp
))
4940 else if (src_related
&& GET_CODE (src_related
) == code
4941 && rtx_equal_p (src_related
, p
->exp
))
4944 /* This is the same as the destination of the insns, we want
4945 to prefer it. Copy it to src_related. The code below will
4946 then give it a negative cost. */
4947 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
4951 /* Find the cheapest valid equivalent, trying all the available
4952 possibilities. Prefer items not in the hash table to ones
4953 that are when they are equal cost. Note that we can never
4954 worsen an insn as the current contents will also succeed.
4955 If we find an equivalent identical to the destination, use it as best,
4956 since this insn will probably be eliminated in that case. */
4959 if (rtx_equal_p (src
, dest
))
4960 src_cost
= src_regcost
= -1;
4963 src_cost
= COST (src
);
4964 src_regcost
= approx_reg_cost (src
);
4970 if (rtx_equal_p (src_eqv_here
, dest
))
4971 src_eqv_cost
= src_eqv_regcost
= -1;
4974 src_eqv_cost
= COST (src_eqv_here
);
4975 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
4981 if (rtx_equal_p (src_folded
, dest
))
4982 src_folded_cost
= src_folded_regcost
= -1;
4985 src_folded_cost
= COST (src_folded
);
4986 src_folded_regcost
= approx_reg_cost (src_folded
);
4992 if (rtx_equal_p (src_related
, dest
))
4993 src_related_cost
= src_related_regcost
= -1;
4996 src_related_cost
= COST (src_related
);
4997 src_related_regcost
= approx_reg_cost (src_related
);
4999 /* If a const-anchor is used to synthesize a constant that
5000 normally requires multiple instructions then slightly prefer
5001 it over the original sequence. These instructions are likely
5002 to become redundant now. We can't compare against the cost
5003 of src_eqv_here because, on MIPS for example, multi-insn
5004 constants have zero cost; they are assumed to be hoisted from
5006 if (src_related_is_const_anchor
5007 && src_related_cost
== src_cost
5013 /* If this was an indirect jump insn, a known label will really be
5014 cheaper even though it looks more expensive. */
5015 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5016 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5018 /* Terminate loop when replacement made. This must terminate since
5019 the current contents will be tested and will always be valid. */
5024 /* Skip invalid entries. */
5025 while (elt
&& !REG_P (elt
->exp
)
5026 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5027 elt
= elt
->next_same_value
;
5029 /* A paradoxical subreg would be bad here: it'll be the right
5030 size, but later may be adjusted so that the upper bits aren't
5031 what we want. So reject it. */
5033 && paradoxical_subreg_p (elt
->exp
)
5034 /* It is okay, though, if the rtx we're trying to match
5035 will ignore any of the bits we can't predict. */
5037 && GET_CODE (src
) == SUBREG
5038 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5039 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5040 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5042 elt
= elt
->next_same_value
;
5048 src_elt_cost
= elt
->cost
;
5049 src_elt_regcost
= elt
->regcost
;
5052 /* Find cheapest and skip it for the next time. For items
5053 of equal cost, use this order:
5054 src_folded, src, src_eqv, src_related and hash table entry. */
5056 && preferable (src_folded_cost
, src_folded_regcost
,
5057 src_cost
, src_regcost
) <= 0
5058 && preferable (src_folded_cost
, src_folded_regcost
,
5059 src_eqv_cost
, src_eqv_regcost
) <= 0
5060 && preferable (src_folded_cost
, src_folded_regcost
,
5061 src_related_cost
, src_related_regcost
) <= 0
5062 && preferable (src_folded_cost
, src_folded_regcost
,
5063 src_elt_cost
, src_elt_regcost
) <= 0)
5065 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5066 if (src_folded_force_flag
)
5068 rtx forced
= force_const_mem (mode
, trial
);
5074 && preferable (src_cost
, src_regcost
,
5075 src_eqv_cost
, src_eqv_regcost
) <= 0
5076 && preferable (src_cost
, src_regcost
,
5077 src_related_cost
, src_related_regcost
) <= 0
5078 && preferable (src_cost
, src_regcost
,
5079 src_elt_cost
, src_elt_regcost
) <= 0)
5080 trial
= src
, src_cost
= MAX_COST
;
5081 else if (src_eqv_here
5082 && preferable (src_eqv_cost
, src_eqv_regcost
,
5083 src_related_cost
, src_related_regcost
) <= 0
5084 && preferable (src_eqv_cost
, src_eqv_regcost
,
5085 src_elt_cost
, src_elt_regcost
) <= 0)
5086 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
5087 else if (src_related
5088 && preferable (src_related_cost
, src_related_regcost
,
5089 src_elt_cost
, src_elt_regcost
) <= 0)
5090 trial
= src_related
, src_related_cost
= MAX_COST
;
5094 elt
= elt
->next_same_value
;
5095 src_elt_cost
= MAX_COST
;
5098 /* Avoid creation of overlapping memory moves. */
5099 if (MEM_P (trial
) && MEM_P (SET_DEST (sets
[i
].rtl
)))
5103 /* BLKmode moves are not handled by cse anyway. */
5104 if (GET_MODE (trial
) == BLKmode
)
5107 src
= canon_rtx (trial
);
5108 dest
= canon_rtx (SET_DEST (sets
[i
].rtl
));
5110 if (!MEM_P (src
) || !MEM_P (dest
)
5111 || !nonoverlapping_memrefs_p (src
, dest
, false))
5116 (set (reg:M N) (const_int A))
5117 (set (reg:M2 O) (const_int B))
5118 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5120 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5121 && CONST_INT_P (trial
)
5122 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5123 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5124 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5125 && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets
[i
].rtl
)))
5126 >= INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1)))
5127 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5128 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5129 <= HOST_BITS_PER_WIDE_INT
))
5131 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5132 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5133 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5134 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5135 struct table_elt
*dest_elt
5136 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5137 rtx dest_cst
= NULL
;
5140 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5141 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5148 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5151 if (BITS_BIG_ENDIAN
)
5152 shift
= GET_MODE_PRECISION (GET_MODE (dest_reg
))
5153 - INTVAL (pos
) - INTVAL (width
);
5155 shift
= INTVAL (pos
);
5156 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5157 mask
= ~(HOST_WIDE_INT
) 0;
5159 mask
= ((HOST_WIDE_INT
) 1 << INTVAL (width
)) - 1;
5160 val
&= ~(mask
<< shift
);
5161 val
|= (INTVAL (trial
) & mask
) << shift
;
5162 val
= trunc_int_for_mode (val
, GET_MODE (dest_reg
));
5163 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5165 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5167 if (apply_change_group ())
5169 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5172 remove_note (insn
, note
);
5173 df_notes_rescan (insn
);
5177 src_eqv_volatile
= 0;
5178 src_eqv_in_memory
= 0;
5186 /* We don't normally have an insn matching (set (pc) (pc)), so
5187 check for this separately here. We will delete such an
5190 For other cases such as a table jump or conditional jump
5191 where we know the ultimate target, go ahead and replace the
5192 operand. While that may not make a valid insn, we will
5193 reemit the jump below (and also insert any necessary
5195 if (n_sets
== 1 && dest
== pc_rtx
5197 || (GET_CODE (trial
) == LABEL_REF
5198 && ! condjump_p (insn
))))
5200 /* Don't substitute non-local labels, this confuses CFG. */
5201 if (GET_CODE (trial
) == LABEL_REF
5202 && LABEL_REF_NONLOCAL_P (trial
))
5205 SET_SRC (sets
[i
].rtl
) = trial
;
5206 cse_jumps_altered
= true;
5210 /* Reject certain invalid forms of CONST that we create. */
5211 else if (CONSTANT_P (trial
)
5212 && GET_CODE (trial
) == CONST
5213 /* Reject cases that will cause decode_rtx_const to
5214 die. On the alpha when simplifying a switch, we
5215 get (const (truncate (minus (label_ref)
5217 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5218 /* Likewise on IA-64, except without the
5220 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5221 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5222 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5223 /* Do nothing for this case. */
5226 /* Look for a substitution that makes a valid insn. */
5227 else if (validate_unshare_change
5228 (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5230 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5232 /* The result of apply_change_group can be ignored; see
5235 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5236 apply_change_group ();
5241 /* If we previously found constant pool entries for
5242 constants and this is a constant, try making a
5243 pool entry. Put it in src_folded unless we already have done
5244 this since that is where it likely came from. */
5246 else if (constant_pool_entries_cost
5247 && CONSTANT_P (trial
)
5249 || (!MEM_P (src_folded
)
5250 && ! src_folded_force_flag
))
5251 && GET_MODE_CLASS (mode
) != MODE_CC
5252 && mode
!= VOIDmode
)
5254 src_folded_force_flag
= 1;
5256 src_folded_cost
= constant_pool_entries_cost
;
5257 src_folded_regcost
= constant_pool_entries_regcost
;
5261 /* If we changed the insn too much, handle this set from scratch. */
5268 src
= SET_SRC (sets
[i
].rtl
);
5270 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5271 However, there is an important exception: If both are registers
5272 that are not the head of their equivalence class, replace SET_SRC
5273 with the head of the class. If we do not do this, we will have
5274 both registers live over a portion of the basic block. This way,
5275 their lifetimes will likely abut instead of overlapping. */
5277 && REGNO_QTY_VALID_P (REGNO (dest
)))
5279 int dest_q
= REG_QTY (REGNO (dest
));
5280 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5282 if (dest_ent
->mode
== GET_MODE (dest
)
5283 && dest_ent
->first_reg
!= REGNO (dest
)
5284 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5285 /* Don't do this if the original insn had a hard reg as
5286 SET_SRC or SET_DEST. */
5287 && (!REG_P (sets
[i
].src
)
5288 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5289 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5290 /* We can't call canon_reg here because it won't do anything if
5291 SRC is a hard register. */
5293 int src_q
= REG_QTY (REGNO (src
));
5294 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5295 int first
= src_ent
->first_reg
;
5297 = (first
>= FIRST_PSEUDO_REGISTER
5298 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5300 /* We must use validate-change even for this, because this
5301 might be a special no-op instruction, suitable only to
5303 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5306 /* If we had a constant that is cheaper than what we are now
5307 setting SRC to, use that constant. We ignored it when we
5308 thought we could make this into a no-op. */
5309 if (src_const
&& COST (src_const
) < COST (src
)
5310 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5317 /* If we made a change, recompute SRC values. */
5318 if (src
!= sets
[i
].src
)
5321 hash_arg_in_memory
= 0;
5323 sets
[i
].src_hash
= HASH (src
, mode
);
5324 sets
[i
].src_volatile
= do_not_record
;
5325 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5326 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5329 /* If this is a single SET, we are setting a register, and we have an
5330 equivalent constant, we want to add a REG_EQUAL note if the constant
5331 is different from the source. We don't want to do it for a constant
5332 pseudo since verifying that this pseudo hasn't been eliminated is a
5333 pain; moreover such a note won't help anything.
5335 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5336 which can be created for a reference to a compile time computable
5337 entry in a jump table. */
5341 && !REG_P (src_const
)
5342 && !(GET_CODE (src_const
) == SUBREG
5343 && REG_P (SUBREG_REG (src_const
)))
5344 && !(GET_CODE (src_const
) == CONST
5345 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5346 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5347 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
)
5348 && !rtx_equal_p (src
, src_const
))
5350 /* Make sure that the rtx is not shared. */
5351 src_const
= copy_rtx (src_const
);
5353 /* Record the actual constant value in a REG_EQUAL note,
5354 making a new one if one does not already exist. */
5355 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5356 df_notes_rescan (insn
);
5359 /* Now deal with the destination. */
5362 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5363 while (GET_CODE (dest
) == SUBREG
5364 || GET_CODE (dest
) == ZERO_EXTRACT
5365 || GET_CODE (dest
) == STRICT_LOW_PART
)
5366 dest
= XEXP (dest
, 0);
5368 sets
[i
].inner_dest
= dest
;
5372 #ifdef PUSH_ROUNDING
5373 /* Stack pushes invalidate the stack pointer. */
5374 rtx addr
= XEXP (dest
, 0);
5375 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5376 && XEXP (addr
, 0) == stack_pointer_rtx
)
5377 invalidate (stack_pointer_rtx
, VOIDmode
);
5379 dest
= fold_rtx (dest
, insn
);
5382 /* Compute the hash code of the destination now,
5383 before the effects of this instruction are recorded,
5384 since the register values used in the address computation
5385 are those before this instruction. */
5386 sets
[i
].dest_hash
= HASH (dest
, mode
);
5388 /* Don't enter a bit-field in the hash table
5389 because the value in it after the store
5390 may not equal what was stored, due to truncation. */
5392 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5394 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5396 if (src_const
!= 0 && CONST_INT_P (src_const
)
5397 && CONST_INT_P (width
)
5398 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5399 && ! (INTVAL (src_const
)
5400 & (HOST_WIDE_INT_M1U
<< INTVAL (width
))))
5401 /* Exception: if the value is constant,
5402 and it won't be truncated, record it. */
5406 /* This is chosen so that the destination will be invalidated
5407 but no new value will be recorded.
5408 We must invalidate because sometimes constant
5409 values can be recorded for bitfields. */
5410 sets
[i
].src_elt
= 0;
5411 sets
[i
].src_volatile
= 1;
5417 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5419 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5421 /* One less use of the label this insn used to jump to. */
5422 delete_insn_and_edges (insn
);
5423 cse_jumps_altered
= true;
5424 /* No more processing for this set. */
5428 /* If this SET is now setting PC to a label, we know it used to
5429 be a conditional or computed branch. */
5430 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5431 && !LABEL_REF_NONLOCAL_P (src
))
5433 /* We reemit the jump in as many cases as possible just in
5434 case the form of an unconditional jump is significantly
5435 different than a computed jump or conditional jump.
5437 If this insn has multiple sets, then reemitting the
5438 jump is nontrivial. So instead we just force rerecognition
5439 and hope for the best. */
5445 new_rtx
= emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
5446 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5447 LABEL_NUSES (XEXP (src
, 0))++;
5449 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5450 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5453 XEXP (note
, 1) = NULL_RTX
;
5454 REG_NOTES (new_rtx
) = note
;
5457 delete_insn_and_edges (insn
);
5461 INSN_CODE (insn
) = -1;
5463 /* Do not bother deleting any unreachable code, let jump do it. */
5464 cse_jumps_altered
= true;
5468 /* If destination is volatile, invalidate it and then do no further
5469 processing for this assignment. */
5471 else if (do_not_record
)
5473 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5474 invalidate (dest
, VOIDmode
);
5475 else if (MEM_P (dest
))
5476 invalidate (dest
, VOIDmode
);
5477 else if (GET_CODE (dest
) == STRICT_LOW_PART
5478 || GET_CODE (dest
) == ZERO_EXTRACT
)
5479 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5483 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5484 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5487 /* If setting CC0, record what it was set to, or a constant, if it
5488 is equivalent to a constant. If it is being set to a floating-point
5489 value, make a COMPARE with the appropriate constant of 0. If we
5490 don't do this, later code can interpret this as a test against
5491 const0_rtx, which can cause problems if we try to put it into an
5492 insn as a floating-point operand. */
5493 if (dest
== cc0_rtx
)
5495 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5496 this_insn_cc0_mode
= mode
;
5497 if (FLOAT_MODE_P (mode
))
5498 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5504 /* Now enter all non-volatile source expressions in the hash table
5505 if they are not already present.
5506 Record their equivalence classes in src_elt.
5507 This way we can insert the corresponding destinations into
5508 the same classes even if the actual sources are no longer in them
5509 (having been invalidated). */
5511 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5512 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5514 struct table_elt
*elt
;
5515 struct table_elt
*classp
= sets
[0].src_elt
;
5516 rtx dest
= SET_DEST (sets
[0].rtl
);
5517 enum machine_mode eqvmode
= GET_MODE (dest
);
5519 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5521 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5524 if (insert_regs (src_eqv
, classp
, 0))
5526 rehash_using_reg (src_eqv
);
5527 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5529 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5530 elt
->in_memory
= src_eqv_in_memory
;
5533 /* Check to see if src_eqv_elt is the same as a set source which
5534 does not yet have an elt, and if so set the elt of the set source
5536 for (i
= 0; i
< n_sets
; i
++)
5537 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5538 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5539 sets
[i
].src_elt
= src_eqv_elt
;
5542 for (i
= 0; i
< n_sets
; i
++)
5543 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5544 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5546 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5548 /* REG_EQUAL in setting a STRICT_LOW_PART
5549 gives an equivalent for the entire destination register,
5550 not just for the subreg being stored in now.
5551 This is a more interesting equivalence, so we arrange later
5552 to treat the entire reg as the destination. */
5553 sets
[i
].src_elt
= src_eqv_elt
;
5554 sets
[i
].src_hash
= src_eqv_hash
;
5558 /* Insert source and constant equivalent into hash table, if not
5560 struct table_elt
*classp
= src_eqv_elt
;
5561 rtx src
= sets
[i
].src
;
5562 rtx dest
= SET_DEST (sets
[i
].rtl
);
5563 enum machine_mode mode
5564 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5566 /* It's possible that we have a source value known to be
5567 constant but don't have a REG_EQUAL note on the insn.
5568 Lack of a note will mean src_eqv_elt will be NULL. This
5569 can happen where we've generated a SUBREG to access a
5570 CONST_INT that is already in a register in a wider mode.
5571 Ensure that the source expression is put in the proper
5574 classp
= sets
[i
].src_const_elt
;
5576 if (sets
[i
].src_elt
== 0)
5578 struct table_elt
*elt
;
5580 /* Note that these insert_regs calls cannot remove
5581 any of the src_elt's, because they would have failed to
5582 match if not still valid. */
5583 if (insert_regs (src
, classp
, 0))
5585 rehash_using_reg (src
);
5586 sets
[i
].src_hash
= HASH (src
, mode
);
5588 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5589 elt
->in_memory
= sets
[i
].src_in_memory
;
5590 sets
[i
].src_elt
= classp
= elt
;
5592 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5593 && src
!= sets
[i
].src_const
5594 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5595 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5596 sets
[i
].src_const_hash
, mode
);
5599 else if (sets
[i
].src_elt
== 0)
5600 /* If we did not insert the source into the hash table (e.g., it was
5601 volatile), note the equivalence class for the REG_EQUAL value, if any,
5602 so that the destination goes into that class. */
5603 sets
[i
].src_elt
= src_eqv_elt
;
5605 /* Record destination addresses in the hash table. This allows us to
5606 check if they are invalidated by other sets. */
5607 for (i
= 0; i
< n_sets
; i
++)
5611 rtx x
= sets
[i
].inner_dest
;
5612 struct table_elt
*elt
;
5613 enum machine_mode mode
;
5619 mode
= GET_MODE (x
);
5620 hash
= HASH (x
, mode
);
5621 elt
= lookup (x
, hash
, mode
);
5624 if (insert_regs (x
, NULL
, 0))
5626 rtx dest
= SET_DEST (sets
[i
].rtl
);
5628 rehash_using_reg (x
);
5629 hash
= HASH (x
, mode
);
5630 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5632 elt
= insert (x
, NULL
, hash
, mode
);
5635 sets
[i
].dest_addr_elt
= elt
;
5638 sets
[i
].dest_addr_elt
= NULL
;
5642 invalidate_from_clobbers (insn
);
5644 /* Some registers are invalidated by subroutine calls. Memory is
5645 invalidated by non-constant calls. */
5649 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5650 invalidate_memory ();
5651 invalidate_for_call ();
5654 /* Now invalidate everything set by this instruction.
5655 If a SUBREG or other funny destination is being set,
5656 sets[i].rtl is still nonzero, so here we invalidate the reg
5657 a part of which is being set. */
5659 for (i
= 0; i
< n_sets
; i
++)
5662 /* We can't use the inner dest, because the mode associated with
5663 a ZERO_EXTRACT is significant. */
5664 rtx dest
= SET_DEST (sets
[i
].rtl
);
5666 /* Needed for registers to remove the register from its
5667 previous quantity's chain.
5668 Needed for memory if this is a nonvarying address, unless
5669 we have just done an invalidate_memory that covers even those. */
5670 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5671 invalidate (dest
, VOIDmode
);
5672 else if (MEM_P (dest
))
5673 invalidate (dest
, VOIDmode
);
5674 else if (GET_CODE (dest
) == STRICT_LOW_PART
5675 || GET_CODE (dest
) == ZERO_EXTRACT
)
5676 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5679 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5680 the regs restored by the longjmp come from a later time
5682 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5684 flush_hash_table ();
5688 /* Make sure registers mentioned in destinations
5689 are safe for use in an expression to be inserted.
5690 This removes from the hash table
5691 any invalid entry that refers to one of these registers.
5693 We don't care about the return value from mention_regs because
5694 we are going to hash the SET_DEST values unconditionally. */
5696 for (i
= 0; i
< n_sets
; i
++)
5700 rtx x
= SET_DEST (sets
[i
].rtl
);
5706 /* We used to rely on all references to a register becoming
5707 inaccessible when a register changes to a new quantity,
5708 since that changes the hash code. However, that is not
5709 safe, since after HASH_SIZE new quantities we get a
5710 hash 'collision' of a register with its own invalid
5711 entries. And since SUBREGs have been changed not to
5712 change their hash code with the hash code of the register,
5713 it wouldn't work any longer at all. So we have to check
5714 for any invalid references lying around now.
5715 This code is similar to the REG case in mention_regs,
5716 but it knows that reg_tick has been incremented, and
5717 it leaves reg_in_table as -1 . */
5718 unsigned int regno
= REGNO (x
);
5719 unsigned int endregno
= END_REGNO (x
);
5722 for (i
= regno
; i
< endregno
; i
++)
5724 if (REG_IN_TABLE (i
) >= 0)
5726 remove_invalid_refs (i
);
5727 REG_IN_TABLE (i
) = -1;
5734 /* We may have just removed some of the src_elt's from the hash table.
5735 So replace each one with the current head of the same class.
5736 Also check if destination addresses have been removed. */
5738 for (i
= 0; i
< n_sets
; i
++)
5741 if (sets
[i
].dest_addr_elt
5742 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5744 /* The elt was removed, which means this destination is not
5745 valid after this instruction. */
5746 sets
[i
].rtl
= NULL_RTX
;
5748 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5749 /* If elt was removed, find current head of same class,
5750 or 0 if nothing remains of that class. */
5752 struct table_elt
*elt
= sets
[i
].src_elt
;
5754 while (elt
&& elt
->prev_same_value
)
5755 elt
= elt
->prev_same_value
;
5757 while (elt
&& elt
->first_same_value
== 0)
5758 elt
= elt
->next_same_value
;
5759 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5763 /* Now insert the destinations into their equivalence classes. */
5765 for (i
= 0; i
< n_sets
; i
++)
5768 rtx dest
= SET_DEST (sets
[i
].rtl
);
5769 struct table_elt
*elt
;
5771 /* Don't record value if we are not supposed to risk allocating
5772 floating-point values in registers that might be wider than
5774 if ((flag_float_store
5776 && FLOAT_MODE_P (GET_MODE (dest
)))
5777 /* Don't record BLKmode values, because we don't know the
5778 size of it, and can't be sure that other BLKmode values
5779 have the same or smaller size. */
5780 || GET_MODE (dest
) == BLKmode
5781 /* If we didn't put a REG_EQUAL value or a source into the hash
5782 table, there is no point is recording DEST. */
5783 || sets
[i
].src_elt
== 0
5784 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5785 or SIGN_EXTEND, don't record DEST since it can cause
5786 some tracking to be wrong.
5788 ??? Think about this more later. */
5789 || (paradoxical_subreg_p (dest
)
5790 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5791 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5794 /* STRICT_LOW_PART isn't part of the value BEING set,
5795 and neither is the SUBREG inside it.
5796 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5797 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5798 dest
= SUBREG_REG (XEXP (dest
, 0));
5800 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5801 /* Registers must also be inserted into chains for quantities. */
5802 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5804 /* If `insert_regs' changes something, the hash code must be
5806 rehash_using_reg (dest
);
5807 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5810 elt
= insert (dest
, sets
[i
].src_elt
,
5811 sets
[i
].dest_hash
, GET_MODE (dest
));
5813 /* If this is a constant, insert the constant anchors with the
5814 equivalent register-offset expressions using register DEST. */
5815 if (targetm
.const_anchor
5817 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5818 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5819 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5821 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5822 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5824 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5825 narrower than M2, and both M1 and M2 are the same number of words,
5826 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5827 make that equivalence as well.
5829 However, BAR may have equivalences for which gen_lowpart
5830 will produce a simpler value than gen_lowpart applied to
5831 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5832 BAR's equivalences. If we don't get a simplified form, make
5833 the SUBREG. It will not be used in an equivalence, but will
5834 cause two similar assignments to be detected.
5836 Note the loop below will find SUBREG_REG (DEST) since we have
5837 already entered SRC and DEST of the SET in the table. */
5839 if (GET_CODE (dest
) == SUBREG
5840 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
5842 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
5843 && (GET_MODE_SIZE (GET_MODE (dest
))
5844 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5845 && sets
[i
].src_elt
!= 0)
5847 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
5848 struct table_elt
*elt
, *classp
= 0;
5850 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
5851 elt
= elt
->next_same_value
)
5855 struct table_elt
*src_elt
;
5858 /* Ignore invalid entries. */
5859 if (!REG_P (elt
->exp
)
5860 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5863 /* We may have already been playing subreg games. If the
5864 mode is already correct for the destination, use it. */
5865 if (GET_MODE (elt
->exp
) == new_mode
)
5869 /* Calculate big endian correction for the SUBREG_BYTE.
5870 We have already checked that M1 (GET_MODE (dest))
5871 is not narrower than M2 (new_mode). */
5872 if (BYTES_BIG_ENDIAN
)
5873 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
5874 - GET_MODE_SIZE (new_mode
));
5876 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
5877 GET_MODE (dest
), byte
);
5880 /* The call to simplify_gen_subreg fails if the value
5881 is VOIDmode, yet we can't do any simplification, e.g.
5882 for EXPR_LISTs denoting function call results.
5883 It is invalid to construct a SUBREG with a VOIDmode
5884 SUBREG_REG, hence a zero new_src means we can't do
5885 this substitution. */
5889 src_hash
= HASH (new_src
, new_mode
);
5890 src_elt
= lookup (new_src
, src_hash
, new_mode
);
5892 /* Put the new source in the hash table is if isn't
5896 if (insert_regs (new_src
, classp
, 0))
5898 rehash_using_reg (new_src
);
5899 src_hash
= HASH (new_src
, new_mode
);
5901 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
5902 src_elt
->in_memory
= elt
->in_memory
;
5904 else if (classp
&& classp
!= src_elt
->first_same_value
)
5905 /* Show that two things that we've seen before are
5906 actually the same. */
5907 merge_equiv_classes (src_elt
, classp
);
5909 classp
= src_elt
->first_same_value
;
5910 /* Ignore invalid entries. */
5912 && !REG_P (classp
->exp
)
5913 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
5914 classp
= classp
->next_same_value
;
5919 /* Special handling for (set REG0 REG1) where REG0 is the
5920 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5921 be used in the sequel, so (if easily done) change this insn to
5922 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5923 that computed their value. Then REG1 will become a dead store
5924 and won't cloud the situation for later optimizations.
5926 Do not make this change if REG1 is a hard register, because it will
5927 then be used in the sequel and we may be changing a two-operand insn
5928 into a three-operand insn.
5930 Also do not do this if we are operating on a copy of INSN. */
5932 if (n_sets
== 1 && sets
[0].rtl
)
5933 try_back_substitute_reg (sets
[0].rtl
, insn
);
5938 /* Remove from the hash table all expressions that reference memory. */
5941 invalidate_memory (void)
5944 struct table_elt
*p
, *next
;
5946 for (i
= 0; i
< HASH_SIZE
; i
++)
5947 for (p
= table
[i
]; p
; p
= next
)
5949 next
= p
->next_same_hash
;
5951 remove_from_table (p
, i
);
5955 /* Perform invalidation on the basis of everything about INSN,
5956 except for invalidating the actual places that are SET in it.
5957 This includes the places CLOBBERed, and anything that might
5958 alias with something that is SET or CLOBBERed. */
5961 invalidate_from_clobbers (rtx_insn
*insn
)
5963 rtx x
= PATTERN (insn
);
5965 if (GET_CODE (x
) == CLOBBER
)
5967 rtx ref
= XEXP (x
, 0);
5970 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5972 invalidate (ref
, VOIDmode
);
5973 else if (GET_CODE (ref
) == STRICT_LOW_PART
5974 || GET_CODE (ref
) == ZERO_EXTRACT
)
5975 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5978 else if (GET_CODE (x
) == PARALLEL
)
5981 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
5983 rtx y
= XVECEXP (x
, 0, i
);
5984 if (GET_CODE (y
) == CLOBBER
)
5986 rtx ref
= XEXP (y
, 0);
5987 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5989 invalidate (ref
, VOIDmode
);
5990 else if (GET_CODE (ref
) == STRICT_LOW_PART
5991 || GET_CODE (ref
) == ZERO_EXTRACT
)
5992 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5998 /* Perform invalidation on the basis of everything about INSN.
5999 This includes the places CLOBBERed, and anything that might
6000 alias with something that is SET or CLOBBERed. */
6003 invalidate_from_sets_and_clobbers (rtx_insn
*insn
)
6006 rtx x
= PATTERN (insn
);
6010 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6011 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6012 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6015 /* Ensure we invalidate the destination register of a CALL insn.
6016 This is necessary for machines where this register is a fixed_reg,
6017 because no other code would invalidate it. */
6018 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
6019 invalidate (SET_DEST (x
), VOIDmode
);
6021 else if (GET_CODE (x
) == PARALLEL
)
6025 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6027 rtx y
= XVECEXP (x
, 0, i
);
6028 if (GET_CODE (y
) == CLOBBER
)
6030 rtx clobbered
= XEXP (y
, 0);
6032 if (REG_P (clobbered
)
6033 || GET_CODE (clobbered
) == SUBREG
)
6034 invalidate (clobbered
, VOIDmode
);
6035 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6036 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6037 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6039 else if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
6040 invalidate (SET_DEST (y
), VOIDmode
);
6045 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6046 and replace any registers in them with either an equivalent constant
6047 or the canonical form of the register. If we are inside an address,
6048 only do this if the address remains valid.
6050 OBJECT is 0 except when within a MEM in which case it is the MEM.
6052 Return the replacement for X. */
6055 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
6057 enum rtx_code code
= GET_CODE (x
);
6058 const char *fmt
= GET_RTX_FORMAT (code
);
6073 validate_change (x
, &XEXP (x
, 0),
6074 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
6078 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6079 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
6085 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
6092 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6093 /* We don't substitute VOIDmode constants into these rtx,
6094 since they would impede folding. */
6095 if (GET_MODE (new_rtx
) != VOIDmode
)
6096 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6100 case UNSIGNED_FLOAT
:
6102 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6103 /* We don't substitute negative VOIDmode constants into these rtx,
6104 since they would impede folding. */
6105 if (GET_MODE (new_rtx
) != VOIDmode
6106 || (CONST_INT_P (new_rtx
) && INTVAL (new_rtx
) >= 0)
6107 || (CONST_DOUBLE_P (new_rtx
) && CONST_DOUBLE_HIGH (new_rtx
) >= 0))
6108 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6113 i
= REG_QTY (REGNO (x
));
6115 /* Return a constant or a constant register. */
6116 if (REGNO_QTY_VALID_P (REGNO (x
)))
6118 struct qty_table_elem
*ent
= &qty_table
[i
];
6120 if (ent
->const_rtx
!= NULL_RTX
6121 && (CONSTANT_P (ent
->const_rtx
)
6122 || REG_P (ent
->const_rtx
)))
6124 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6126 return copy_rtx (new_rtx
);
6130 /* Otherwise, canonicalize this register. */
6131 return canon_reg (x
, NULL
);
6137 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6139 validate_change (object
, &XEXP (x
, i
),
6140 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
6146 cse_process_notes (rtx x
, rtx object
, bool *changed
)
6148 rtx new_rtx
= cse_process_notes_1 (x
, object
, changed
);
6155 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6157 DATA is a pointer to a struct cse_basic_block_data, that is used to
6159 It is filled with a queue of basic blocks, starting with FIRST_BB
6160 and following a trace through the CFG.
6162 If all paths starting at FIRST_BB have been followed, or no new path
6163 starting at FIRST_BB can be constructed, this function returns FALSE.
6164 Otherwise, DATA->path is filled and the function returns TRUE indicating
6165 that a path to follow was found.
6167 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6168 block in the path will be FIRST_BB. */
6171 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6178 bitmap_set_bit (cse_visited_basic_blocks
, first_bb
->index
);
6180 /* See if there is a previous path. */
6181 path_size
= data
->path_size
;
6183 /* There is a previous path. Make sure it started with FIRST_BB. */
6185 gcc_assert (data
->path
[0].bb
== first_bb
);
6187 /* There was only one basic block in the last path. Clear the path and
6188 return, so that paths starting at another basic block can be tried. */
6195 /* If the path was empty from the beginning, construct a new path. */
6197 data
->path
[path_size
++].bb
= first_bb
;
6200 /* Otherwise, path_size must be equal to or greater than 2, because
6201 a previous path exists that is at least two basic blocks long.
6203 Update the previous branch path, if any. If the last branch was
6204 previously along the branch edge, take the fallthrough edge now. */
6205 while (path_size
>= 2)
6207 basic_block last_bb_in_path
, previous_bb_in_path
;
6211 last_bb_in_path
= data
->path
[path_size
].bb
;
6212 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6214 /* If we previously followed a path along the branch edge, try
6215 the fallthru edge now. */
6216 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6217 && any_condjump_p (BB_END (previous_bb_in_path
))
6218 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6219 && e
== BRANCH_EDGE (previous_bb_in_path
))
6221 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6222 if (bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6223 && single_pred_p (bb
)
6224 /* We used to assert here that we would only see blocks
6225 that we have not visited yet. But we may end up
6226 visiting basic blocks twice if the CFG has changed
6227 in this run of cse_main, because when the CFG changes
6228 the topological sort of the CFG also changes. A basic
6229 blocks that previously had more than two predecessors
6230 may now have a single predecessor, and become part of
6231 a path that starts at another basic block.
6233 We still want to visit each basic block only once, so
6234 halt the path here if we have already visited BB. */
6235 && !bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
))
6237 bitmap_set_bit (cse_visited_basic_blocks
, bb
->index
);
6238 data
->path
[path_size
++].bb
= bb
;
6243 data
->path
[path_size
].bb
= NULL
;
6246 /* If only one block remains in the path, bail. */
6254 /* Extend the path if possible. */
6257 bb
= data
->path
[path_size
- 1].bb
;
6258 while (bb
&& path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
))
6260 if (single_succ_p (bb
))
6261 e
= single_succ_edge (bb
);
6262 else if (EDGE_COUNT (bb
->succs
) == 2
6263 && any_condjump_p (BB_END (bb
)))
6265 /* First try to follow the branch. If that doesn't lead
6266 to a useful path, follow the fallthru edge. */
6267 e
= BRANCH_EDGE (bb
);
6268 if (!single_pred_p (e
->dest
))
6269 e
= FALLTHRU_EDGE (bb
);
6275 && !((e
->flags
& EDGE_ABNORMAL_CALL
) && cfun
->has_nonlocal_label
)
6276 && e
->dest
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6277 && single_pred_p (e
->dest
)
6278 /* Avoid visiting basic blocks twice. The large comment
6279 above explains why this can happen. */
6280 && !bitmap_bit_p (cse_visited_basic_blocks
, e
->dest
->index
))
6282 basic_block bb2
= e
->dest
;
6283 bitmap_set_bit (cse_visited_basic_blocks
, bb2
->index
);
6284 data
->path
[path_size
++].bb
= bb2
;
6293 data
->path_size
= path_size
;
6294 return path_size
!= 0;
6297 /* Dump the path in DATA to file F. NSETS is the number of sets
6301 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6305 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6306 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6307 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6308 fputc ('\n', dump_file
);
6313 /* Return true if BB has exception handling successor edges. */
6316 have_eh_succ_edges (basic_block bb
)
6321 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6322 if (e
->flags
& EDGE_EH
)
6329 /* Scan to the end of the path described by DATA. Return an estimate of
6330 the total number of SETs of all insns in the path. */
6333 cse_prescan_path (struct cse_basic_block_data
*data
)
6336 int path_size
= data
->path_size
;
6339 /* Scan to end of each basic block in the path. */
6340 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6345 bb
= data
->path
[path_entry
].bb
;
6347 FOR_BB_INSNS (bb
, insn
)
6352 /* A PARALLEL can have lots of SETs in it,
6353 especially if it is really an ASM_OPERANDS. */
6354 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6355 nsets
+= XVECLEN (PATTERN (insn
), 0);
6361 data
->nsets
= nsets
;
6364 /* Return true if the pattern of INSN uses a LABEL_REF for which
6365 there isn't a REG_LABEL_OPERAND note. */
6368 check_for_label_ref (rtx_insn
*insn
)
6370 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6371 note for it, we must rerun jump since it needs to place the note. If
6372 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6373 don't do this since no REG_LABEL_OPERAND will be added. */
6374 subrtx_iterator::array_type array
;
6375 FOR_EACH_SUBRTX (iter
, array
, PATTERN (insn
), ALL
)
6377 const_rtx x
= *iter
;
6378 if (GET_CODE (x
) == LABEL_REF
6379 && !LABEL_REF_NONLOCAL_P (x
)
6381 || !label_is_jump_target_p (LABEL_REF_LABEL (x
), insn
))
6382 && LABEL_P (LABEL_REF_LABEL (x
))
6383 && INSN_UID (LABEL_REF_LABEL (x
)) != 0
6384 && !find_reg_note (insn
, REG_LABEL_OPERAND
, LABEL_REF_LABEL (x
)))
6390 /* Process a single extended basic block described by EBB_DATA. */
6393 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6395 int path_size
= ebb_data
->path_size
;
6399 /* Allocate the space needed by qty_table. */
6400 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6403 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6404 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6405 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6410 bb
= ebb_data
->path
[path_entry
].bb
;
6412 /* Invalidate recorded information for eh regs if there is an EH
6413 edge pointing to that bb. */
6414 if (bb_has_eh_pred (bb
))
6418 FOR_EACH_ARTIFICIAL_DEF (def
, bb
->index
)
6419 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6420 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6423 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6424 FOR_BB_INSNS (bb
, insn
)
6426 /* If we have processed 1,000 insns, flush the hash table to
6427 avoid extreme quadratic behavior. We must not include NOTEs
6428 in the count since there may be more of them when generating
6429 debugging information. If we clear the table at different
6430 times, code generated with -g -O might be different than code
6431 generated with -O but not -g.
6433 FIXME: This is a real kludge and needs to be done some other
6435 if (NONDEBUG_INSN_P (insn
)
6436 && num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
6438 flush_hash_table ();
6444 /* Process notes first so we have all notes in canonical forms
6445 when looking for duplicate operations. */
6446 if (REG_NOTES (insn
))
6448 bool changed
= false;
6449 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6450 NULL_RTX
, &changed
);
6452 df_notes_rescan (insn
);
6457 /* If we haven't already found an insn where we added a LABEL_REF,
6459 if (INSN_P (insn
) && !recorded_label_ref
6460 && check_for_label_ref (insn
))
6461 recorded_label_ref
= true;
6464 if (NONDEBUG_INSN_P (insn
))
6466 /* If the previous insn sets CC0 and this insn no
6467 longer references CC0, delete the previous insn.
6468 Here we use fact that nothing expects CC0 to be
6469 valid over an insn, which is true until the final
6471 rtx_insn
*prev_insn
;
6474 prev_insn
= prev_nonnote_nondebug_insn (insn
);
6475 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6476 && (tem
= single_set (prev_insn
)) != NULL_RTX
6477 && SET_DEST (tem
) == cc0_rtx
6478 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6479 delete_insn (prev_insn
);
6481 /* If this insn is not the last insn in the basic
6482 block, it will be PREV_INSN(insn) in the next
6483 iteration. If we recorded any CC0-related
6484 information for this insn, remember it. */
6485 if (insn
!= BB_END (bb
))
6487 prev_insn_cc0
= this_insn_cc0
;
6488 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6495 /* With non-call exceptions, we are not always able to update
6496 the CFG properly inside cse_insn. So clean up possibly
6497 redundant EH edges here. */
6498 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6499 cse_cfg_altered
|= purge_dead_edges (bb
);
6501 /* If we changed a conditional jump, we may have terminated
6502 the path we are following. Check that by verifying that
6503 the edge we would take still exists. If the edge does
6504 not exist anymore, purge the remainder of the path.
6505 Note that this will cause us to return to the caller. */
6506 if (path_entry
< path_size
- 1)
6508 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6509 if (!find_edge (bb
, next_bb
))
6515 /* If we truncate the path, we must also reset the
6516 visited bit on the remaining blocks in the path,
6517 or we will never visit them at all. */
6518 bitmap_clear_bit (cse_visited_basic_blocks
,
6519 ebb_data
->path
[path_size
].bb
->index
);
6520 ebb_data
->path
[path_size
].bb
= NULL
;
6522 while (path_size
- 1 != path_entry
);
6523 ebb_data
->path_size
= path_size
;
6527 /* If this is a conditional jump insn, record any known
6528 equivalences due to the condition being tested. */
6530 if (path_entry
< path_size
- 1
6532 && single_set (insn
)
6533 && any_condjump_p (insn
))
6535 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6536 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6537 record_jump_equiv (insn
, taken
);
6541 /* Clear the CC0-tracking related insns, they can't provide
6542 useful information across basic block boundaries. */
6547 gcc_assert (next_qty
<= max_qty
);
6553 /* Perform cse on the instructions of a function.
6554 F is the first instruction.
6555 NREGS is one plus the highest pseudo-reg number used in the instruction.
6557 Return 2 if jump optimizations should be redone due to simplifications
6558 in conditional jump instructions.
6559 Return 1 if the CFG should be cleaned up because it has been modified.
6560 Return 0 otherwise. */
6563 cse_main (rtx_insn
*f ATTRIBUTE_UNUSED
, int nregs
)
6565 struct cse_basic_block_data ebb_data
;
6567 int *rc_order
= XNEWVEC (int, last_basic_block_for_fn (cfun
));
6570 df_set_flags (DF_LR_RUN_DCE
);
6571 df_note_add_problem ();
6573 df_set_flags (DF_DEFER_INSN_RESCAN
);
6575 reg_scan (get_insns (), max_reg_num ());
6576 init_cse_reg_info (nregs
);
6578 ebb_data
.path
= XNEWVEC (struct branch_path
,
6579 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6581 cse_cfg_altered
= false;
6582 cse_jumps_altered
= false;
6583 recorded_label_ref
= false;
6584 constant_pool_entries_cost
= 0;
6585 constant_pool_entries_regcost
= 0;
6586 ebb_data
.path_size
= 0;
6588 rtl_hooks
= cse_rtl_hooks
;
6591 init_alias_analysis ();
6593 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6595 /* Set up the table of already visited basic blocks. */
6596 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block_for_fn (cfun
));
6597 bitmap_clear (cse_visited_basic_blocks
);
6599 /* Loop over basic blocks in reverse completion order (RPO),
6600 excluding the ENTRY and EXIT blocks. */
6601 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6603 while (i
< n_blocks
)
6605 /* Find the first block in the RPO queue that we have not yet
6606 processed before. */
6609 bb
= BASIC_BLOCK_FOR_FN (cfun
, rc_order
[i
++]);
6611 while (bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
)
6614 /* Find all paths starting with BB, and process them. */
6615 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6617 /* Pre-scan the path. */
6618 cse_prescan_path (&ebb_data
);
6620 /* If this basic block has no sets, skip it. */
6621 if (ebb_data
.nsets
== 0)
6624 /* Get a reasonable estimate for the maximum number of qty's
6625 needed for this path. For this, we take the number of sets
6626 and multiply that by MAX_RECOG_OPERANDS. */
6627 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6629 /* Dump the path we're about to process. */
6631 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6633 cse_extended_basic_block (&ebb_data
);
6638 end_alias_analysis ();
6639 free (reg_eqv_table
);
6640 free (ebb_data
.path
);
6641 sbitmap_free (cse_visited_basic_blocks
);
6643 rtl_hooks
= general_rtl_hooks
;
6645 if (cse_jumps_altered
|| recorded_label_ref
)
6647 else if (cse_cfg_altered
)
6653 /* Count the number of times registers are used (not set) in X.
6654 COUNTS is an array in which we accumulate the count, INCR is how much
6655 we count each register usage.
6657 Don't count a usage of DEST, which is the SET_DEST of a SET which
6658 contains X in its SET_SRC. This is because such a SET does not
6659 modify the liveness of DEST.
6660 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6661 We must then count uses of a SET_DEST regardless, because the insn can't be
6665 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6675 switch (code
= GET_CODE (x
))
6679 counts
[REGNO (x
)] += incr
;
6691 /* If we are clobbering a MEM, mark any registers inside the address
6693 if (MEM_P (XEXP (x
, 0)))
6694 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6698 /* Unless we are setting a REG, count everything in SET_DEST. */
6699 if (!REG_P (SET_DEST (x
)))
6700 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6701 count_reg_usage (SET_SRC (x
), counts
,
6702 dest
? dest
: SET_DEST (x
),
6712 /* We expect dest to be NULL_RTX here. If the insn may throw,
6713 or if it cannot be deleted due to side-effects, mark this fact
6714 by setting DEST to pc_rtx. */
6715 if ((!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (x
))
6716 || side_effects_p (PATTERN (x
)))
6718 if (code
== CALL_INSN
)
6719 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6720 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6722 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6725 note
= find_reg_equal_equiv_note (x
);
6728 rtx eqv
= XEXP (note
, 0);
6730 if (GET_CODE (eqv
) == EXPR_LIST
)
6731 /* This REG_EQUAL note describes the result of a function call.
6732 Process all the arguments. */
6735 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6736 eqv
= XEXP (eqv
, 1);
6738 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6740 count_reg_usage (eqv
, counts
, dest
, incr
);
6745 if (REG_NOTE_KIND (x
) == REG_EQUAL
6746 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6747 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6748 involving registers in the address. */
6749 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6750 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6752 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6756 /* Iterate over just the inputs, not the constraints as well. */
6757 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6758 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6769 fmt
= GET_RTX_FORMAT (code
);
6770 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6773 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6774 else if (fmt
[i
] == 'E')
6775 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6776 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6780 /* Return true if X is a dead register. */
6783 is_dead_reg (const_rtx x
, int *counts
)
6786 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6787 && counts
[REGNO (x
)] == 0);
6790 /* Return true if set is live. */
6792 set_live_p (rtx set
, rtx_insn
*insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
6799 if (set_noop_p (set
))
6803 else if (GET_CODE (SET_DEST (set
)) == CC0
6804 && !side_effects_p (SET_SRC (set
))
6805 && ((tem
= next_nonnote_nondebug_insn (insn
)) == NULL_RTX
6807 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
6810 else if (!is_dead_reg (SET_DEST (set
), counts
)
6811 || side_effects_p (SET_SRC (set
)))
6816 /* Return true if insn is live. */
6819 insn_live_p (rtx_insn
*insn
, int *counts
)
6822 if (!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (insn
))
6824 else if (GET_CODE (PATTERN (insn
)) == SET
)
6825 return set_live_p (PATTERN (insn
), insn
, counts
);
6826 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6828 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6830 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6832 if (GET_CODE (elt
) == SET
)
6834 if (set_live_p (elt
, insn
, counts
))
6837 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6842 else if (DEBUG_INSN_P (insn
))
6846 for (next
= NEXT_INSN (insn
); next
; next
= NEXT_INSN (next
))
6849 else if (!DEBUG_INSN_P (next
))
6851 else if (INSN_VAR_LOCATION_DECL (insn
) == INSN_VAR_LOCATION_DECL (next
))
6860 /* Count the number of stores into pseudo. Callback for note_stores. */
6863 count_stores (rtx x
, const_rtx set ATTRIBUTE_UNUSED
, void *data
)
6865 int *counts
= (int *) data
;
6866 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
6867 counts
[REGNO (x
)]++;
6870 /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
6871 pseudo doesn't have a replacement. COUNTS[X] is zero if register X
6872 is dead and REPLACEMENTS[X] is null if it has no replacemenet.
6873 Set *SEEN_REPL to true if we see a dead register that does have
6877 is_dead_debug_insn (const_rtx pat
, int *counts
, rtx
*replacements
,
6880 subrtx_iterator::array_type array
;
6881 FOR_EACH_SUBRTX (iter
, array
, pat
, NONCONST
)
6883 const_rtx x
= *iter
;
6884 if (is_dead_reg (x
, counts
))
6886 if (replacements
&& replacements
[REGNO (x
)] != NULL_RTX
)
6895 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6896 Callback for simplify_replace_fn_rtx. */
6899 replace_dead_reg (rtx x
, const_rtx old_rtx ATTRIBUTE_UNUSED
, void *data
)
6901 rtx
*replacements
= (rtx
*) data
;
6904 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6905 && replacements
[REGNO (x
)] != NULL_RTX
)
6907 if (GET_MODE (x
) == GET_MODE (replacements
[REGNO (x
)]))
6908 return replacements
[REGNO (x
)];
6909 return lowpart_subreg (GET_MODE (x
), replacements
[REGNO (x
)],
6910 GET_MODE (replacements
[REGNO (x
)]));
6915 /* Scan all the insns and delete any that are dead; i.e., they store a register
6916 that is never used or they copy a register to itself.
6918 This is used to remove insns made obviously dead by cse, loop or other
6919 optimizations. It improves the heuristics in loop since it won't try to
6920 move dead invariants out of loops or make givs for dead quantities. The
6921 remaining passes of the compilation are also sped up. */
6924 delete_trivially_dead_insns (rtx_insn
*insns
, int nreg
)
6927 rtx_insn
*insn
, *prev
;
6928 rtx
*replacements
= NULL
;
6931 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
6932 /* First count the number of times each register is used. */
6933 if (MAY_HAVE_DEBUG_INSNS
)
6935 counts
= XCNEWVEC (int, nreg
* 3);
6936 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6937 if (DEBUG_INSN_P (insn
))
6938 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
6940 else if (INSN_P (insn
))
6942 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6943 note_stores (PATTERN (insn
), count_stores
, counts
+ nreg
* 2);
6945 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6946 First one counts how many times each pseudo is used outside
6947 of debug insns, second counts how many times each pseudo is
6948 used in debug insns and third counts how many times a pseudo
6953 counts
= XCNEWVEC (int, nreg
);
6954 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6956 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6957 /* If no debug insns can be present, COUNTS is just an array
6958 which counts how many times each pseudo is used. */
6960 /* Pseudo PIC register should be considered as used due to possible
6961 new usages generated. */
6962 if (!reload_completed
6963 && pic_offset_table_rtx
6964 && REGNO (pic_offset_table_rtx
) >= FIRST_PSEUDO_REGISTER
)
6965 counts
[REGNO (pic_offset_table_rtx
)]++;
6966 /* Go from the last insn to the first and delete insns that only set unused
6967 registers or copy a register to itself. As we delete an insn, remove
6968 usage counts for registers it uses.
6970 The first jump optimization pass may leave a real insn as the last
6971 insn in the function. We must not skip that insn or we may end
6972 up deleting code that is not really dead.
6974 If some otherwise unused register is only used in DEBUG_INSNs,
6975 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6976 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6977 has been created for the unused register, replace it with
6978 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6979 for (insn
= get_last_insn (); insn
; insn
= prev
)
6983 prev
= PREV_INSN (insn
);
6987 live_insn
= insn_live_p (insn
, counts
);
6989 /* If this is a dead insn, delete it and show registers in it aren't
6992 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
6994 if (DEBUG_INSN_P (insn
))
6995 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7000 if (MAY_HAVE_DEBUG_INSNS
7001 && (set
= single_set (insn
)) != NULL_RTX
7002 && is_dead_reg (SET_DEST (set
), counts
)
7003 /* Used at least once in some DEBUG_INSN. */
7004 && counts
[REGNO (SET_DEST (set
)) + nreg
] > 0
7005 /* And set exactly once. */
7006 && counts
[REGNO (SET_DEST (set
)) + nreg
* 2] == 1
7007 && !side_effects_p (SET_SRC (set
))
7008 && asm_noperands (PATTERN (insn
)) < 0)
7010 rtx dval
, bind_var_loc
;
7013 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7014 dval
= make_debug_expr_from_rtl (SET_DEST (set
));
7016 /* Emit a debug bind insn before the insn in which
7019 gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set
)),
7020 DEBUG_EXPR_TREE_DECL (dval
),
7022 VAR_INIT_STATUS_INITIALIZED
);
7023 count_reg_usage (bind_var_loc
, counts
+ nreg
, NULL_RTX
, 1);
7025 bind
= emit_debug_insn_before (bind_var_loc
, insn
);
7026 df_insn_rescan (bind
);
7028 if (replacements
== NULL
)
7029 replacements
= XCNEWVEC (rtx
, nreg
);
7030 replacements
[REGNO (SET_DEST (set
))] = dval
;
7033 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7036 delete_insn_and_edges (insn
);
7040 if (MAY_HAVE_DEBUG_INSNS
)
7042 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
7043 if (DEBUG_INSN_P (insn
))
7045 /* If this debug insn references a dead register that wasn't replaced
7046 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7047 bool seen_repl
= false;
7048 if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn
),
7049 counts
, replacements
, &seen_repl
))
7051 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
7052 df_insn_rescan (insn
);
7056 INSN_VAR_LOCATION_LOC (insn
)
7057 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn
),
7058 NULL_RTX
, replace_dead_reg
,
7060 df_insn_rescan (insn
);
7063 free (replacements
);
7066 if (dump_file
&& ndead
)
7067 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7071 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7075 /* If LOC contains references to NEWREG in a different mode, change them
7076 to use NEWREG instead. */
7079 cse_change_cc_mode (subrtx_ptr_iterator::array_type
&array
,
7080 rtx
*loc
, rtx insn
, rtx newreg
)
7082 FOR_EACH_SUBRTX_PTR (iter
, array
, loc
, NONCONST
)
7088 && REGNO (x
) == REGNO (newreg
)
7089 && GET_MODE (x
) != GET_MODE (newreg
))
7091 validate_change (insn
, loc
, newreg
, 1);
7092 iter
.skip_subrtxes ();
7097 /* Change the mode of any reference to the register REGNO (NEWREG) to
7098 GET_MODE (NEWREG) in INSN. */
7101 cse_change_cc_mode_insn (rtx_insn
*insn
, rtx newreg
)
7108 subrtx_ptr_iterator::array_type array
;
7109 cse_change_cc_mode (array
, &PATTERN (insn
), insn
, newreg
);
7110 cse_change_cc_mode (array
, ®_NOTES (insn
), insn
, newreg
);
7112 /* If the following assertion was triggered, there is most probably
7113 something wrong with the cc_modes_compatible back end function.
7114 CC modes only can be considered compatible if the insn - with the mode
7115 replaced by any of the compatible modes - can still be recognized. */
7116 success
= apply_change_group ();
7117 gcc_assert (success
);
7120 /* Change the mode of any reference to the register REGNO (NEWREG) to
7121 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7122 any instruction which modifies NEWREG. */
7125 cse_change_cc_mode_insns (rtx_insn
*start
, rtx_insn
*end
, rtx newreg
)
7129 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7131 if (! INSN_P (insn
))
7134 if (reg_set_p (newreg
, insn
))
7137 cse_change_cc_mode_insn (insn
, newreg
);
7141 /* BB is a basic block which finishes with CC_REG as a condition code
7142 register which is set to CC_SRC. Look through the successors of BB
7143 to find blocks which have a single predecessor (i.e., this one),
7144 and look through those blocks for an assignment to CC_REG which is
7145 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7146 permitted to change the mode of CC_SRC to a compatible mode. This
7147 returns VOIDmode if no equivalent assignments were found.
7148 Otherwise it returns the mode which CC_SRC should wind up with.
7149 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7150 but is passed unmodified down to recursive calls in order to prevent
7153 The main complexity in this function is handling the mode issues.
7154 We may have more than one duplicate which we can eliminate, and we
7155 try to find a mode which will work for multiple duplicates. */
7157 static enum machine_mode
7158 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
7159 bool can_change_mode
)
7162 enum machine_mode mode
;
7163 unsigned int insn_count
;
7166 enum machine_mode modes
[2];
7167 rtx_insn
*last_insns
[2];
7172 /* We expect to have two successors. Look at both before picking
7173 the final mode for the comparison. If we have more successors
7174 (i.e., some sort of table jump, although that seems unlikely),
7175 then we require all beyond the first two to use the same
7178 found_equiv
= false;
7179 mode
= GET_MODE (cc_src
);
7181 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7186 if (e
->flags
& EDGE_COMPLEX
)
7189 if (EDGE_COUNT (e
->dest
->preds
) != 1
7190 || e
->dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
)
7191 /* Avoid endless recursion on unreachable blocks. */
7192 || e
->dest
== orig_bb
)
7195 end
= NEXT_INSN (BB_END (e
->dest
));
7196 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7200 if (! INSN_P (insn
))
7203 /* If CC_SRC is modified, we have to stop looking for
7204 something which uses it. */
7205 if (modified_in_p (cc_src
, insn
))
7208 /* Check whether INSN sets CC_REG to CC_SRC. */
7209 set
= single_set (insn
);
7211 && REG_P (SET_DEST (set
))
7212 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7215 enum machine_mode set_mode
;
7216 enum machine_mode comp_mode
;
7219 set_mode
= GET_MODE (SET_SRC (set
));
7220 comp_mode
= set_mode
;
7221 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7223 else if (GET_CODE (cc_src
) == COMPARE
7224 && GET_CODE (SET_SRC (set
)) == COMPARE
7226 && rtx_equal_p (XEXP (cc_src
, 0),
7227 XEXP (SET_SRC (set
), 0))
7228 && rtx_equal_p (XEXP (cc_src
, 1),
7229 XEXP (SET_SRC (set
), 1)))
7232 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7233 if (comp_mode
!= VOIDmode
7234 && (can_change_mode
|| comp_mode
== mode
))
7241 if (insn_count
< ARRAY_SIZE (insns
))
7243 insns
[insn_count
] = insn
;
7244 modes
[insn_count
] = set_mode
;
7245 last_insns
[insn_count
] = end
;
7248 if (mode
!= comp_mode
)
7250 gcc_assert (can_change_mode
);
7253 /* The modified insn will be re-recognized later. */
7254 PUT_MODE (cc_src
, mode
);
7259 if (set_mode
!= mode
)
7261 /* We found a matching expression in the
7262 wrong mode, but we don't have room to
7263 store it in the array. Punt. This case
7267 /* INSN sets CC_REG to a value equal to CC_SRC
7268 with the right mode. We can simply delete
7273 /* We found an instruction to delete. Keep looking,
7274 in the hopes of finding a three-way jump. */
7278 /* We found an instruction which sets the condition
7279 code, so don't look any farther. */
7283 /* If INSN sets CC_REG in some other way, don't look any
7285 if (reg_set_p (cc_reg
, insn
))
7289 /* If we fell off the bottom of the block, we can keep looking
7290 through successors. We pass CAN_CHANGE_MODE as false because
7291 we aren't prepared to handle compatibility between the
7292 further blocks and this block. */
7295 enum machine_mode submode
;
7297 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7298 if (submode
!= VOIDmode
)
7300 gcc_assert (submode
== mode
);
7302 can_change_mode
= false;
7310 /* Now INSN_COUNT is the number of instructions we found which set
7311 CC_REG to a value equivalent to CC_SRC. The instructions are in
7312 INSNS. The modes used by those instructions are in MODES. */
7315 for (i
= 0; i
< insn_count
; ++i
)
7317 if (modes
[i
] != mode
)
7319 /* We need to change the mode of CC_REG in INSNS[i] and
7320 subsequent instructions. */
7323 if (GET_MODE (cc_reg
) == mode
)
7326 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7328 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7332 delete_insn_and_edges (insns
[i
]);
7338 /* If we have a fixed condition code register (or two), walk through
7339 the instructions and try to eliminate duplicate assignments. */
7342 cse_condition_code_reg (void)
7344 unsigned int cc_regno_1
;
7345 unsigned int cc_regno_2
;
7350 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7353 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7354 if (cc_regno_2
!= INVALID_REGNUM
)
7355 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7357 cc_reg_2
= NULL_RTX
;
7359 FOR_EACH_BB_FN (bb
, cfun
)
7361 rtx_insn
*last_insn
;
7364 rtx_insn
*cc_src_insn
;
7366 enum machine_mode mode
;
7367 enum machine_mode orig_mode
;
7369 /* Look for blocks which end with a conditional jump based on a
7370 condition code register. Then look for the instruction which
7371 sets the condition code register. Then look through the
7372 successor blocks for instructions which set the condition
7373 code register to the same value. There are other possible
7374 uses of the condition code register, but these are by far the
7375 most common and the ones which we are most likely to be able
7378 last_insn
= BB_END (bb
);
7379 if (!JUMP_P (last_insn
))
7382 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7384 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7391 for (insn
= PREV_INSN (last_insn
);
7392 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7393 insn
= PREV_INSN (insn
))
7397 if (! INSN_P (insn
))
7399 set
= single_set (insn
);
7401 && REG_P (SET_DEST (set
))
7402 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7405 cc_src
= SET_SRC (set
);
7408 else if (reg_set_p (cc_reg
, insn
))
7415 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7418 /* Now CC_REG is a condition code register used for a
7419 conditional jump at the end of the block, and CC_SRC, in
7420 CC_SRC_INSN, is the value to which that condition code
7421 register is set, and CC_SRC is still meaningful at the end of
7424 orig_mode
= GET_MODE (cc_src
);
7425 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7426 if (mode
!= VOIDmode
)
7428 gcc_assert (mode
== GET_MODE (cc_src
));
7429 if (mode
!= orig_mode
)
7431 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7433 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7435 /* Do the same in the following insns that use the
7436 current value of CC_REG within BB. */
7437 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7438 NEXT_INSN (last_insn
),
7446 /* Perform common subexpression elimination. Nonzero value from
7447 `cse_main' means that jumps were simplified and some code may now
7448 be unreachable, so do jump optimization again. */
7450 rest_of_handle_cse (void)
7455 dump_flow_info (dump_file
, dump_flags
);
7457 tem
= cse_main (get_insns (), max_reg_num ());
7459 /* If we are not running more CSE passes, then we are no longer
7460 expecting CSE to be run. But always rerun it in a cheap mode. */
7461 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7465 timevar_push (TV_JUMP
);
7466 rebuild_jump_labels (get_insns ());
7467 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7468 timevar_pop (TV_JUMP
);
7470 else if (tem
== 1 || optimize
> 1)
7478 const pass_data pass_data_cse
=
7480 RTL_PASS
, /* type */
7482 OPTGROUP_NONE
, /* optinfo_flags */
7484 0, /* properties_required */
7485 0, /* properties_provided */
7486 0, /* properties_destroyed */
7487 0, /* todo_flags_start */
7488 TODO_df_finish
, /* todo_flags_finish */
7491 class pass_cse
: public rtl_opt_pass
7494 pass_cse (gcc::context
*ctxt
)
7495 : rtl_opt_pass (pass_data_cse
, ctxt
)
7498 /* opt_pass methods: */
7499 virtual bool gate (function
*) { return optimize
> 0; }
7500 virtual unsigned int execute (function
*) { return rest_of_handle_cse (); }
7502 }; // class pass_cse
7507 make_pass_cse (gcc::context
*ctxt
)
7509 return new pass_cse (ctxt
);
7513 /* Run second CSE pass after loop optimizations. */
7515 rest_of_handle_cse2 (void)
7520 dump_flow_info (dump_file
, dump_flags
);
7522 tem
= cse_main (get_insns (), max_reg_num ());
7524 /* Run a pass to eliminate duplicated assignments to condition code
7525 registers. We have to run this after bypass_jumps, because it
7526 makes it harder for that pass to determine whether a jump can be
7528 cse_condition_code_reg ();
7530 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7534 timevar_push (TV_JUMP
);
7535 rebuild_jump_labels (get_insns ());
7536 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7537 timevar_pop (TV_JUMP
);
7542 cse_not_expected
= 1;
7549 const pass_data pass_data_cse2
=
7551 RTL_PASS
, /* type */
7553 OPTGROUP_NONE
, /* optinfo_flags */
7554 TV_CSE2
, /* tv_id */
7555 0, /* properties_required */
7556 0, /* properties_provided */
7557 0, /* properties_destroyed */
7558 0, /* todo_flags_start */
7559 TODO_df_finish
, /* todo_flags_finish */
7562 class pass_cse2
: public rtl_opt_pass
7565 pass_cse2 (gcc::context
*ctxt
)
7566 : rtl_opt_pass (pass_data_cse2
, ctxt
)
7569 /* opt_pass methods: */
7570 virtual bool gate (function
*)
7572 return optimize
> 0 && flag_rerun_cse_after_loop
;
7575 virtual unsigned int execute (function
*) { return rest_of_handle_cse2 (); }
7577 }; // class pass_cse2
7582 make_pass_cse2 (gcc::context
*ctxt
)
7584 return new pass_cse2 (ctxt
);
7587 /* Run second CSE pass after loop optimizations. */
7589 rest_of_handle_cse_after_global_opts (void)
7594 /* We only want to do local CSE, so don't follow jumps. */
7595 save_cfj
= flag_cse_follow_jumps
;
7596 flag_cse_follow_jumps
= 0;
7598 rebuild_jump_labels (get_insns ());
7599 tem
= cse_main (get_insns (), max_reg_num ());
7600 purge_all_dead_edges ();
7601 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7603 cse_not_expected
= !flag_rerun_cse_after_loop
;
7605 /* If cse altered any jumps, rerun jump opts to clean things up. */
7608 timevar_push (TV_JUMP
);
7609 rebuild_jump_labels (get_insns ());
7610 cleanup_cfg (CLEANUP_CFG_CHANGED
);
7611 timevar_pop (TV_JUMP
);
7616 flag_cse_follow_jumps
= save_cfj
;
7622 const pass_data pass_data_cse_after_global_opts
=
7624 RTL_PASS
, /* type */
7625 "cse_local", /* name */
7626 OPTGROUP_NONE
, /* optinfo_flags */
7628 0, /* properties_required */
7629 0, /* properties_provided */
7630 0, /* properties_destroyed */
7631 0, /* todo_flags_start */
7632 TODO_df_finish
, /* todo_flags_finish */
7635 class pass_cse_after_global_opts
: public rtl_opt_pass
7638 pass_cse_after_global_opts (gcc::context
*ctxt
)
7639 : rtl_opt_pass (pass_data_cse_after_global_opts
, ctxt
)
7642 /* opt_pass methods: */
7643 virtual bool gate (function
*)
7645 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7648 virtual unsigned int execute (function
*)
7650 return rest_of_handle_cse_after_global_opts ();
7653 }; // class pass_cse_after_global_opts
7658 make_pass_cse_after_global_opts (gcc::context
*ctxt
)
7660 return new pass_cse_after_global_opts (ctxt
);