1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* Must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
36 /* The basic idea of common subexpression elimination is to go
37 through the code, keeping a record of expressions that would
38 have the same value at the current scan point, and replacing
39 expressions encountered with the cheapest equivalent expression.
41 It is too complicated to keep track of the different possibilities
42 when control paths merge; so, at each label, we forget all that is
43 known and start fresh. This can be described as processing each
44 basic block separately. Note, however, that these are not quite
45 the same as the basic blocks found by a later pass and used for
46 data flow analysis and register packing. We do not need to start fresh
47 after a conditional jump instruction if there is no label there.
49 We use two data structures to record the equivalent expressions:
50 a hash table for most expressions, and several vectors together
51 with "quantity numbers" to record equivalent (pseudo) registers.
53 The use of the special data structure for registers is desirable
54 because it is faster. It is possible because registers references
55 contain a fairly small number, the register number, taken from
56 a contiguously allocated series, and two register references are
57 identical if they have the same number. General expressions
58 do not have any such thing, so the only way to retrieve the
59 information recorded on an expression other than a register
60 is to keep it in a hash table.
62 Registers and "quantity numbers":
64 At the start of each basic block, all of the (hardware and pseudo)
65 registers used in the function are given distinct quantity
66 numbers to indicate their contents. During scan, when the code
67 copies one register into another, we copy the quantity number.
68 When a register is loaded in any other way, we allocate a new
69 quantity number to describe the value generated by this operation.
70 `reg_qty' records what quantity a register is currently thought
73 All real quantity numbers are greater than or equal to `max_reg'.
74 If register N has not been assigned a quantity, reg_qty[N] will equal N.
76 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
77 variables should be referenced with an index below `max_reg'.
79 We also maintain a bidirectional chain of registers for each
80 quantity number. `qty_first_reg', `qty_last_reg',
81 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
83 The first register in a chain is the one whose lifespan is least local.
84 Among equals, it is the one that was seen first.
85 We replace any equivalent register with that one.
87 If two registers have the same quantity number, it must be true that
88 REG expressions with `qty_mode' must be in the hash table for both
89 registers and must be in the same class.
91 The converse is not true. Since hard registers may be referenced in
92 any mode, two REG expressions might be equivalent in the hash table
93 but not have the same quantity number if the quantity number of one
94 of the registers is not the same mode as those expressions.
96 Constants and quantity numbers
98 When a quantity has a known constant value, that value is stored
99 in the appropriate element of qty_const. This is in addition to
100 putting the constant in the hash table as is usual for non-regs.
102 Whether a reg or a constant is preferred is determined by the configuration
103 macro CONST_COSTS and will often depend on the constant value. In any
104 event, expressions containing constants can be simplified, by fold_rtx.
106 When a quantity has a known nearly constant value (such as an address
107 of a stack slot), that value is stored in the appropriate element
110 Integer constants don't have a machine mode. However, cse
111 determines the intended machine mode from the destination
112 of the instruction that moves the constant. The machine mode
113 is recorded in the hash table along with the actual RTL
114 constant expression so that different modes are kept separate.
118 To record known equivalences among expressions in general
119 we use a hash table called `table'. It has a fixed number of buckets
120 that contain chains of `struct table_elt' elements for expressions.
121 These chains connect the elements whose expressions have the same
124 Other chains through the same elements connect the elements which
125 currently have equivalent values.
127 Register references in an expression are canonicalized before hashing
128 the expression. This is done using `reg_qty' and `qty_first_reg'.
129 The hash code of a register reference is computed using the quantity
130 number, not the register number.
132 When the value of an expression changes, it is necessary to remove from the
133 hash table not just that expression but all expressions whose values
134 could be different as a result.
136 1. If the value changing is in memory, except in special cases
137 ANYTHING referring to memory could be changed. That is because
138 nobody knows where a pointer does not point.
139 The function `invalidate_memory' removes what is necessary.
141 The special cases are when the address is constant or is
142 a constant plus a fixed register such as the frame pointer
143 or a static chain pointer. When such addresses are stored in,
144 we can tell exactly which other such addresses must be invalidated
145 due to overlap. `invalidate' does this.
146 All expressions that refer to non-constant
147 memory addresses are also invalidated. `invalidate_memory' does this.
149 2. If the value changing is a register, all expressions
150 containing references to that register, and only those,
153 Because searching the entire hash table for expressions that contain
154 a register is very slow, we try to figure out when it isn't necessary.
155 Precisely, this is necessary only when expressions have been
156 entered in the hash table using this register, and then the value has
157 changed, and then another expression wants to be added to refer to
158 the register's new value. This sequence of circumstances is rare
159 within any one basic block.
161 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
162 reg_tick[i] is incremented whenever a value is stored in register i.
163 reg_in_table[i] holds -1 if no references to register i have been
164 entered in the table; otherwise, it contains the value reg_tick[i] had
165 when the references were entered. If we want to enter a reference
166 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
167 Until we want to enter a new entry, the mere fact that the two vectors
168 don't match makes the entries be ignored if anyone tries to match them.
170 Registers themselves are entered in the hash table as well as in
171 the equivalent-register chains. However, the vectors `reg_tick'
172 and `reg_in_table' do not apply to expressions which are simple
173 register references. These expressions are removed from the table
174 immediately when they become invalid, and this can be done even if
175 we do not immediately search for all the expressions that refer to
178 A CLOBBER rtx in an instruction invalidates its operand for further
179 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
180 invalidates everything that resides in memory.
184 Constant expressions that differ only by an additive integer
185 are called related. When a constant expression is put in
186 the table, the related expression with no constant term
187 is also entered. These are made to point at each other
188 so that it is possible to find out if there exists any
189 register equivalent to an expression related to a given expression. */
191 /* One plus largest register number used in this function. */
195 /* Length of vectors indexed by quantity number.
196 We know in advance we will not need a quantity number this big. */
200 /* Next quantity number to be allocated.
201 This is 1 + the largest number needed so far. */
205 /* Indexed by quantity number, gives the first (or last) (pseudo) register
206 in the chain of registers that currently contain this quantity. */
208 static int *qty_first_reg
;
209 static int *qty_last_reg
;
211 /* Index by quantity number, gives the mode of the quantity. */
213 static enum machine_mode
*qty_mode
;
215 /* Indexed by quantity number, gives the rtx of the constant value of the
216 quantity, or zero if it does not have a known value.
217 A sum of the frame pointer (or arg pointer) plus a constant
218 can also be entered here. */
220 static rtx
*qty_const
;
222 /* Indexed by qty number, gives the insn that stored the constant value
223 recorded in `qty_const'. */
225 static rtx
*qty_const_insn
;
227 /* The next three variables are used to track when a comparison between a
228 quantity and some constant or register has been passed. In that case, we
229 know the results of the comparison in case we see it again. These variables
230 record a comparison that is known to be true. */
232 /* Indexed by qty number, gives the rtx code of a comparison with a known
233 result involving this quantity. If none, it is UNKNOWN. */
234 static enum rtx_code
*qty_comparison_code
;
236 /* Indexed by qty number, gives the constant being compared against in a
237 comparison of known result. If no such comparison, it is undefined.
238 If the comparison is not with a constant, it is zero. */
240 static rtx
*qty_comparison_const
;
242 /* Indexed by qty number, gives the quantity being compared against in a
243 comparison of known result. If no such comparison, if it undefined.
244 If the comparison is not with a register, it is -1. */
246 static int *qty_comparison_qty
;
249 /* For machines that have a CC0, we do not record its value in the hash
250 table since its use is guaranteed to be the insn immediately following
251 its definition and any other insn is presumed to invalidate it.
253 Instead, we store below the value last assigned to CC0. If it should
254 happen to be a constant, it is stored in preference to the actual
255 assigned value. In case it is a constant, we store the mode in which
256 the constant should be interpreted. */
258 static rtx prev_insn_cc0
;
259 static enum machine_mode prev_insn_cc0_mode
;
262 /* Previous actual insn. 0 if at first insn of basic block. */
264 static rtx prev_insn
;
266 /* Insn being scanned. */
268 static rtx this_insn
;
270 /* Index by (pseudo) register number, gives the quantity number
271 of the register's current contents. */
275 /* Index by (pseudo) register number, gives the number of the next (or
276 previous) (pseudo) register in the chain of registers sharing the same
279 Or -1 if this register is at the end of the chain.
281 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
283 static int *reg_next_eqv
;
284 static int *reg_prev_eqv
;
286 /* Index by (pseudo) register number, gives the number of times
287 that register has been altered in the current basic block. */
289 static int *reg_tick
;
291 /* Index by (pseudo) register number, gives the reg_tick value at which
292 rtx's containing this register are valid in the hash table.
293 If this does not equal the current reg_tick value, such expressions
294 existing in the hash table are invalid.
295 If this is -1, no expressions containing this register have been
296 entered in the table. */
298 static int *reg_in_table
;
300 /* A HARD_REG_SET containing all the hard registers for which there is
301 currently a REG expression in the hash table. Note the difference
302 from the above variables, which indicate if the REG is mentioned in some
303 expression in the table. */
305 static HARD_REG_SET hard_regs_in_table
;
307 /* A HARD_REG_SET containing all the hard registers that are invalidated
310 static HARD_REG_SET regs_invalidated_by_call
;
312 /* Two vectors of ints:
313 one containing max_reg -1's; the other max_reg + 500 (an approximation
314 for max_qty) elements where element i contains i.
315 These are used to initialize various other vectors fast. */
317 static int *all_minus_one
;
318 static int *consec_ints
;
320 /* CUID of insn that starts the basic block currently being cse-processed. */
322 static int cse_basic_block_start
;
324 /* CUID of insn that ends the basic block currently being cse-processed. */
326 static int cse_basic_block_end
;
328 /* Vector mapping INSN_UIDs to cuids.
329 The cuids are like uids but increase monotonically always.
330 We use them to see whether a reg is used outside a given basic block. */
332 static int *uid_cuid
;
334 /* Highest UID in UID_CUID. */
337 /* Get the cuid of an insn. */
339 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
341 /* Nonzero if cse has altered conditional jump insns
342 in such a way that jump optimization should be redone. */
344 static int cse_jumps_altered
;
346 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
347 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
348 to put in the note. */
349 static int recorded_label_ref
;
351 /* canon_hash stores 1 in do_not_record
352 if it notices a reference to CC0, PC, or some other volatile
355 static int do_not_record
;
357 #ifdef LOAD_EXTEND_OP
359 /* Scratch rtl used when looking for load-extended copy of a MEM. */
360 static rtx memory_extend_rtx
;
363 /* canon_hash stores 1 in hash_arg_in_memory
364 if it notices a reference to memory within the expression being hashed. */
366 static int hash_arg_in_memory
;
368 /* canon_hash stores 1 in hash_arg_in_struct
369 if it notices a reference to memory that's part of a structure. */
371 static int hash_arg_in_struct
;
373 /* The hash table contains buckets which are chains of `struct table_elt's,
374 each recording one expression's information.
375 That expression is in the `exp' field.
377 Those elements with the same hash code are chained in both directions
378 through the `next_same_hash' and `prev_same_hash' fields.
380 Each set of expressions with equivalent values
381 are on a two-way chain through the `next_same_value'
382 and `prev_same_value' fields, and all point with
383 the `first_same_value' field at the first element in
384 that chain. The chain is in order of increasing cost.
385 Each element's cost value is in its `cost' field.
387 The `in_memory' field is nonzero for elements that
388 involve any reference to memory. These elements are removed
389 whenever a write is done to an unidentified location in memory.
390 To be safe, we assume that a memory address is unidentified unless
391 the address is either a symbol constant or a constant plus
392 the frame pointer or argument pointer.
394 The `in_struct' field is nonzero for elements that
395 involve any reference to memory inside a structure or array.
397 The `related_value' field is used to connect related expressions
398 (that differ by adding an integer).
399 The related expressions are chained in a circular fashion.
400 `related_value' is zero for expressions for which this
403 The `cost' field stores the cost of this element's expression.
405 The `is_const' flag is set if the element is a constant (including
408 The `flag' field is used as a temporary during some search routines.
410 The `mode' field is usually the same as GET_MODE (`exp'), but
411 if `exp' is a CONST_INT and has no machine mode then the `mode'
412 field is the mode it was being used as. Each constant is
413 recorded separately for each mode it is used with. */
419 struct table_elt
*next_same_hash
;
420 struct table_elt
*prev_same_hash
;
421 struct table_elt
*next_same_value
;
422 struct table_elt
*prev_same_value
;
423 struct table_elt
*first_same_value
;
424 struct table_elt
*related_value
;
426 enum machine_mode mode
;
433 /* We don't want a lot of buckets, because we rarely have very many
434 things stored in the hash table, and a lot of buckets slows
435 down a lot of loops that happen frequently. */
438 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
439 register (hard registers may require `do_not_record' to be set). */
442 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
443 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
444 : canon_hash (X, M) % NBUCKETS)
446 /* Determine whether register number N is considered a fixed register for CSE.
447 It is desirable to replace other regs with fixed regs, to reduce need for
449 A reg wins if it is either the frame pointer or designated as fixed,
450 but not if it is an overlapping register. */
451 #ifdef OVERLAPPING_REGNO_P
452 #define FIXED_REGNO_P(N) \
453 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
454 || fixed_regs[N] || global_regs[N]) \
455 && ! OVERLAPPING_REGNO_P ((N)))
457 #define FIXED_REGNO_P(N) \
458 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
459 || fixed_regs[N] || global_regs[N])
462 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
463 hard registers and pointers into the frame are the cheapest with a cost
464 of 0. Next come pseudos with a cost of one and other hard registers with
465 a cost of 2. Aside from these special cases, call `rtx_cost'. */
467 #define CHEAP_REGNO(N) \
468 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
469 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
470 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
471 || ((N) < FIRST_PSEUDO_REGISTER \
472 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
474 /* A register is cheap if it is a user variable assigned to the register
475 or if its register number always corresponds to a cheap register. */
477 #define CHEAP_REG(N) \
478 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
479 || CHEAP_REGNO (REGNO (N)))
482 (GET_CODE (X) == REG \
483 ? (CHEAP_REG (X) ? 0 \
484 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
486 : rtx_cost (X, SET) * 2)
488 /* Determine if the quantity number for register X represents a valid index
489 into the `qty_...' variables. */
491 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
493 static struct table_elt
*table
[NBUCKETS
];
495 /* Chain of `struct table_elt's made so far for this function
496 but currently removed from the table. */
498 static struct table_elt
*free_element_chain
;
500 /* Number of `struct table_elt' structures made so far for this function. */
502 static int n_elements_made
;
504 /* Maximum value `n_elements_made' has had so far in this compilation
505 for functions previously processed. */
507 static int max_elements_made
;
509 /* Surviving equivalence class when two equivalence classes are merged
510 by recording the effects of a jump in the last insn. Zero if the
511 last insn was not a conditional jump. */
513 static struct table_elt
*last_jump_equiv_class
;
515 /* Set to the cost of a constant pool reference if one was found for a
516 symbolic constant. If this was found, it means we should try to
517 convert constants into constant pool entries if they don't fit in
520 static int constant_pool_entries_cost
;
522 /* Bits describing what kind of values in memory must be invalidated
523 for a particular instruction. If all three bits are zero,
524 no memory refs need to be invalidated. Each bit is more powerful
525 than the preceding ones, and if a bit is set then the preceding
528 Here is how the bits are set:
529 Pushing onto the stack invalidates only the stack pointer,
530 writing at a fixed address invalidates only variable addresses,
531 writing in a structure element at variable address
532 invalidates all but scalar variables,
533 and writing in anything else at variable address invalidates everything. */
537 int sp
: 1; /* Invalidate stack pointer. */
538 int var
: 1; /* Invalidate variable addresses. */
539 int nonscalar
: 1; /* Invalidate all but scalar variables. */
540 int all
: 1; /* Invalidate all memory refs. */
543 /* Define maximum length of a branch path. */
545 #define PATHLENGTH 10
547 /* This data describes a block that will be processed by cse_basic_block. */
549 struct cse_basic_block_data
{
550 /* Lowest CUID value of insns in block. */
552 /* Highest CUID value of insns in block. */
554 /* Total number of SETs in block. */
556 /* Last insn in the block. */
558 /* Size of current branch path, if any. */
560 /* Current branch path, indicating which branches will be taken. */
562 /* The branch insn. */
564 /* Whether it should be taken or not. AROUND is the same as taken
565 except that it is used when the destination label is not preceded
567 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
571 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
572 virtual regs here because the simplify_*_operation routines are called
573 by integrate.c, which is called before virtual register instantiation. */
575 #define FIXED_BASE_PLUS_P(X) \
576 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
577 || (X) == arg_pointer_rtx \
578 || (X) == virtual_stack_vars_rtx \
579 || (X) == virtual_incoming_args_rtx \
580 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
581 && (XEXP (X, 0) == frame_pointer_rtx \
582 || XEXP (X, 0) == hard_frame_pointer_rtx \
583 || XEXP (X, 0) == arg_pointer_rtx \
584 || XEXP (X, 0) == virtual_stack_vars_rtx \
585 || XEXP (X, 0) == virtual_incoming_args_rtx)))
587 /* Similar, but also allows reference to the stack pointer.
589 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
590 arg_pointer_rtx by itself is nonzero, because on at least one machine,
591 the i960, the arg pointer is zero when it is unused. */
593 #define NONZERO_BASE_PLUS_P(X) \
594 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
595 || (X) == virtual_stack_vars_rtx \
596 || (X) == virtual_incoming_args_rtx \
597 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
598 && (XEXP (X, 0) == frame_pointer_rtx \
599 || XEXP (X, 0) == hard_frame_pointer_rtx \
600 || XEXP (X, 0) == arg_pointer_rtx \
601 || XEXP (X, 0) == virtual_stack_vars_rtx \
602 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
603 || (X) == stack_pointer_rtx \
604 || (X) == virtual_stack_dynamic_rtx \
605 || (X) == virtual_outgoing_args_rtx \
606 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
607 && (XEXP (X, 0) == stack_pointer_rtx \
608 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
609 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
611 static void new_basic_block
PROTO((void));
612 static void make_new_qty
PROTO((int));
613 static void make_regs_eqv
PROTO((int, int));
614 static void delete_reg_equiv
PROTO((int));
615 static int mention_regs
PROTO((rtx
));
616 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
617 static void free_element
PROTO((struct table_elt
*));
618 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
619 static struct table_elt
*get_element
PROTO((void));
620 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
621 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
622 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
623 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
625 static void merge_equiv_classes
PROTO((struct table_elt
*,
626 struct table_elt
*));
627 static void invalidate
PROTO((rtx
, enum machine_mode
));
628 static void remove_invalid_refs
PROTO((int));
629 static void rehash_using_reg
PROTO((rtx
));
630 static void invalidate_memory
PROTO((struct write_data
*));
631 static void invalidate_for_call
PROTO((void));
632 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
633 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
634 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
635 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
636 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
639 static int refers_to_p
PROTO((rtx
, rtx
));
640 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
642 static int cse_rtx_addr_varies_p
PROTO((rtx
));
643 static rtx canon_reg
PROTO((rtx
, rtx
));
644 static void find_best_addr
PROTO((rtx
, rtx
*));
645 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
647 enum machine_mode
*));
648 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
650 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
652 static rtx fold_rtx
PROTO((rtx
, rtx
));
653 static rtx equiv_constant
PROTO((rtx
));
654 static void record_jump_equiv
PROTO((rtx
, int));
655 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
657 static void cse_insn
PROTO((rtx
, int));
658 static void note_mem_written
PROTO((rtx
, struct write_data
*));
659 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
660 static rtx cse_process_notes
PROTO((rtx
, rtx
));
661 static void cse_around_loop
PROTO((rtx
));
662 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
663 static void invalidate_skipped_block
PROTO((rtx
));
664 static void cse_check_loop_start
PROTO((rtx
, rtx
));
665 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
666 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
667 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
669 extern int rtx_equal_function_value_matters
;
671 /* Return an estimate of the cost of computing rtx X.
672 One use is in cse, to decide which expression to keep in the hash table.
673 Another is in rtl generation, to pick the cheapest way to multiply.
674 Other uses like the latter are expected in the future. */
676 /* Return the right cost to give to an operation
677 to make the cost of the corresponding register-to-register instruction
678 N times that of a fast register-to-register instruction. */
680 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
683 rtx_cost (x
, outer_code
)
685 enum rtx_code outer_code
;
688 register enum rtx_code code
;
695 /* Compute the default costs of certain things.
696 Note that RTX_COSTS can override the defaults. */
702 /* Count multiplication by 2**n as a shift,
703 because if we are considering it, we would output it as a shift. */
704 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
705 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
708 total
= COSTS_N_INSNS (5);
714 total
= COSTS_N_INSNS (7);
717 /* Used in loop.c and combine.c as a marker. */
721 /* We don't want these to be used in substitutions because
722 we have no way of validating the resulting insn. So assign
723 anything containing an ASM_OPERANDS a very high cost. */
733 return ! CHEAP_REG (x
);
736 /* If we can't tie these modes, make this expensive. The larger
737 the mode, the more expensive it is. */
738 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
739 return COSTS_N_INSNS (2
740 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
743 RTX_COSTS (x
, code
, outer_code
);
745 CONST_COSTS (x
, code
, outer_code
);
748 /* Sum the costs of the sub-rtx's, plus cost of this operation,
749 which is already in total. */
751 fmt
= GET_RTX_FORMAT (code
);
752 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
754 total
+= rtx_cost (XEXP (x
, i
), code
);
755 else if (fmt
[i
] == 'E')
756 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
757 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
762 /* Clear the hash table and initialize each register with its own quantity,
763 for a new basic block. */
772 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
774 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
775 max_reg
* sizeof (int));
776 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
777 CLEAR_HARD_REG_SET (hard_regs_in_table
);
779 /* The per-quantity values used to be initialized here, but it is
780 much faster to initialize each as it is made in `make_new_qty'. */
782 for (i
= 0; i
< NBUCKETS
; i
++)
784 register struct table_elt
*this, *next
;
785 for (this = table
[i
]; this; this = next
)
787 next
= this->next_same_hash
;
792 bzero ((char *) table
, sizeof table
);
801 /* Say that register REG contains a quantity not in any register before
802 and initialize that quantity. */
810 if (next_qty
>= max_qty
)
813 q
= reg_qty
[reg
] = next_qty
++;
814 qty_first_reg
[q
] = reg
;
815 qty_last_reg
[q
] = reg
;
816 qty_const
[q
] = qty_const_insn
[q
] = 0;
817 qty_comparison_code
[q
] = UNKNOWN
;
819 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
822 /* Make reg NEW equivalent to reg OLD.
823 OLD is not changing; NEW is. */
826 make_regs_eqv (new, old
)
827 register int new, old
;
829 register int lastr
, firstr
;
830 register int q
= reg_qty
[old
];
832 /* Nothing should become eqv until it has a "non-invalid" qty number. */
833 if (! REGNO_QTY_VALID_P (old
))
837 firstr
= qty_first_reg
[q
];
838 lastr
= qty_last_reg
[q
];
840 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
841 hard regs. Among pseudos, if NEW will live longer than any other reg
842 of the same qty, and that is beyond the current basic block,
843 make it the new canonical replacement for this qty. */
844 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
845 /* Certain fixed registers might be of the class NO_REGS. This means
846 that not only can they not be allocated by the compiler, but
847 they cannot be used in substitutions or canonicalizations
849 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
850 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
851 || (new >= FIRST_PSEUDO_REGISTER
852 && (firstr
< FIRST_PSEUDO_REGISTER
853 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
854 || (uid_cuid
[regno_first_uid
[new]]
855 < cse_basic_block_start
))
856 && (uid_cuid
[regno_last_uid
[new]]
857 > uid_cuid
[regno_last_uid
[firstr
]]))))))
859 reg_prev_eqv
[firstr
] = new;
860 reg_next_eqv
[new] = firstr
;
861 reg_prev_eqv
[new] = -1;
862 qty_first_reg
[q
] = new;
866 /* If NEW is a hard reg (known to be non-fixed), insert at end.
867 Otherwise, insert before any non-fixed hard regs that are at the
868 end. Registers of class NO_REGS cannot be used as an
869 equivalent for anything. */
870 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
871 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
872 && new >= FIRST_PSEUDO_REGISTER
)
873 lastr
= reg_prev_eqv
[lastr
];
874 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
875 if (reg_next_eqv
[lastr
] >= 0)
876 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
878 qty_last_reg
[q
] = new;
879 reg_next_eqv
[lastr
] = new;
880 reg_prev_eqv
[new] = lastr
;
884 /* Remove REG from its equivalence class. */
887 delete_reg_equiv (reg
)
890 register int q
= reg_qty
[reg
];
893 /* If invalid, do nothing. */
897 p
= reg_prev_eqv
[reg
];
898 n
= reg_next_eqv
[reg
];
907 qty_first_reg
[q
] = n
;
912 /* Remove any invalid expressions from the hash table
913 that refer to any of the registers contained in expression X.
915 Make sure that newly inserted references to those registers
916 as subexpressions will be considered valid.
918 mention_regs is not called when a register itself
919 is being stored in the table.
921 Return 1 if we have done something that may have changed the hash code
928 register enum rtx_code code
;
931 register int changed
= 0;
939 register int regno
= REGNO (x
);
940 register int endregno
941 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
942 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
945 for (i
= regno
; i
< endregno
; i
++)
947 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
948 remove_invalid_refs (i
);
950 reg_in_table
[i
] = reg_tick
[i
];
956 /* If X is a comparison or a COMPARE and either operand is a register
957 that does not have a quantity, give it one. This is so that a later
958 call to record_jump_equiv won't cause X to be assigned a different
959 hash code and not found in the table after that call.
961 It is not necessary to do this here, since rehash_using_reg can
962 fix up the table later, but doing this here eliminates the need to
963 call that expensive function in the most common case where the only
964 use of the register is in the comparison. */
966 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
968 if (GET_CODE (XEXP (x
, 0)) == REG
969 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
970 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
972 rehash_using_reg (XEXP (x
, 0));
976 if (GET_CODE (XEXP (x
, 1)) == REG
977 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
978 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
980 rehash_using_reg (XEXP (x
, 1));
985 fmt
= GET_RTX_FORMAT (code
);
986 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
988 changed
|= mention_regs (XEXP (x
, i
));
989 else if (fmt
[i
] == 'E')
990 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
991 changed
|= mention_regs (XVECEXP (x
, i
, j
));
996 /* Update the register quantities for inserting X into the hash table
997 with a value equivalent to CLASSP.
998 (If the class does not contain a REG, it is irrelevant.)
999 If MODIFIED is nonzero, X is a destination; it is being modified.
1000 Note that delete_reg_equiv should be called on a register
1001 before insert_regs is done on that register with MODIFIED != 0.
1003 Nonzero value means that elements of reg_qty have changed
1004 so X's hash code may be different. */
1007 insert_regs (x
, classp
, modified
)
1009 struct table_elt
*classp
;
1012 if (GET_CODE (x
) == REG
)
1014 register int regno
= REGNO (x
);
1016 /* If REGNO is in the equivalence table already but is of the
1017 wrong mode for that equivalence, don't do anything here. */
1019 if (REGNO_QTY_VALID_P (regno
)
1020 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1023 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1026 for (classp
= classp
->first_same_value
;
1028 classp
= classp
->next_same_value
)
1029 if (GET_CODE (classp
->exp
) == REG
1030 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1032 make_regs_eqv (regno
, REGNO (classp
->exp
));
1036 make_new_qty (regno
);
1037 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1044 /* If X is a SUBREG, we will likely be inserting the inner register in the
1045 table. If that register doesn't have an assigned quantity number at
1046 this point but does later, the insertion that we will be doing now will
1047 not be accessible because its hash code will have changed. So assign
1048 a quantity number now. */
1050 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1051 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1053 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1054 mention_regs (SUBREG_REG (x
));
1058 return mention_regs (x
);
1061 /* Look in or update the hash table. */
1063 /* Put the element ELT on the list of free elements. */
1067 struct table_elt
*elt
;
1069 elt
->next_same_hash
= free_element_chain
;
1070 free_element_chain
= elt
;
1073 /* Return an element that is free for use. */
1075 static struct table_elt
*
1078 struct table_elt
*elt
= free_element_chain
;
1081 free_element_chain
= elt
->next_same_hash
;
1085 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1088 /* Remove table element ELT from use in the table.
1089 HASH is its hash code, made using the HASH macro.
1090 It's an argument because often that is known in advance
1091 and we save much time not recomputing it. */
1094 remove_from_table (elt
, hash
)
1095 register struct table_elt
*elt
;
1101 /* Mark this element as removed. See cse_insn. */
1102 elt
->first_same_value
= 0;
1104 /* Remove the table element from its equivalence class. */
1107 register struct table_elt
*prev
= elt
->prev_same_value
;
1108 register struct table_elt
*next
= elt
->next_same_value
;
1110 if (next
) next
->prev_same_value
= prev
;
1113 prev
->next_same_value
= next
;
1116 register struct table_elt
*newfirst
= next
;
1119 next
->first_same_value
= newfirst
;
1120 next
= next
->next_same_value
;
1125 /* Remove the table element from its hash bucket. */
1128 register struct table_elt
*prev
= elt
->prev_same_hash
;
1129 register struct table_elt
*next
= elt
->next_same_hash
;
1131 if (next
) next
->prev_same_hash
= prev
;
1134 prev
->next_same_hash
= next
;
1135 else if (table
[hash
] == elt
)
1139 /* This entry is not in the proper hash bucket. This can happen
1140 when two classes were merged by `merge_equiv_classes'. Search
1141 for the hash bucket that it heads. This happens only very
1142 rarely, so the cost is acceptable. */
1143 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1144 if (table
[hash
] == elt
)
1149 /* Remove the table element from its related-value circular chain. */
1151 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1153 register struct table_elt
*p
= elt
->related_value
;
1154 while (p
->related_value
!= elt
)
1155 p
= p
->related_value
;
1156 p
->related_value
= elt
->related_value
;
1157 if (p
->related_value
== p
)
1158 p
->related_value
= 0;
1164 /* Look up X in the hash table and return its table element,
1165 or 0 if X is not in the table.
1167 MODE is the machine-mode of X, or if X is an integer constant
1168 with VOIDmode then MODE is the mode with which X will be used.
1170 Here we are satisfied to find an expression whose tree structure
1173 static struct table_elt
*
1174 lookup (x
, hash
, mode
)
1177 enum machine_mode mode
;
1179 register struct table_elt
*p
;
1181 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1182 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1183 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1189 /* Like `lookup' but don't care whether the table element uses invalid regs.
1190 Also ignore discrepancies in the machine mode of a register. */
1192 static struct table_elt
*
1193 lookup_for_remove (x
, hash
, mode
)
1196 enum machine_mode mode
;
1198 register struct table_elt
*p
;
1200 if (GET_CODE (x
) == REG
)
1202 int regno
= REGNO (x
);
1203 /* Don't check the machine mode when comparing registers;
1204 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1205 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1206 if (GET_CODE (p
->exp
) == REG
1207 && REGNO (p
->exp
) == regno
)
1212 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1213 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1220 /* Look for an expression equivalent to X and with code CODE.
1221 If one is found, return that expression. */
1224 lookup_as_function (x
, code
)
1228 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1233 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1235 if (GET_CODE (p
->exp
) == code
1236 /* Make sure this is a valid entry in the table. */
1237 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1244 /* Insert X in the hash table, assuming HASH is its hash code
1245 and CLASSP is an element of the class it should go in
1246 (or 0 if a new class should be made).
1247 It is inserted at the proper position to keep the class in
1248 the order cheapest first.
1250 MODE is the machine-mode of X, or if X is an integer constant
1251 with VOIDmode then MODE is the mode with which X will be used.
1253 For elements of equal cheapness, the most recent one
1254 goes in front, except that the first element in the list
1255 remains first unless a cheaper element is added. The order of
1256 pseudo-registers does not matter, as canon_reg will be called to
1257 find the cheapest when a register is retrieved from the table.
1259 The in_memory field in the hash table element is set to 0.
1260 The caller must set it nonzero if appropriate.
1262 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1263 and if insert_regs returns a nonzero value
1264 you must then recompute its hash code before calling here.
1266 If necessary, update table showing constant values of quantities. */
1268 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1270 static struct table_elt
*
1271 insert (x
, classp
, hash
, mode
)
1273 register struct table_elt
*classp
;
1275 enum machine_mode mode
;
1277 register struct table_elt
*elt
;
1279 /* If X is a register and we haven't made a quantity for it,
1280 something is wrong. */
1281 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1284 /* If X is a hard register, show it is being put in the table. */
1285 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1287 int regno
= REGNO (x
);
1288 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1291 for (i
= regno
; i
< endregno
; i
++)
1292 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1295 /* If X is a label, show we recorded it. */
1296 if (GET_CODE (x
) == LABEL_REF
1297 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1298 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1299 recorded_label_ref
= 1;
1301 /* Put an element for X into the right hash bucket. */
1303 elt
= get_element ();
1305 elt
->cost
= COST (x
);
1306 elt
->next_same_value
= 0;
1307 elt
->prev_same_value
= 0;
1308 elt
->next_same_hash
= table
[hash
];
1309 elt
->prev_same_hash
= 0;
1310 elt
->related_value
= 0;
1313 elt
->is_const
= (CONSTANT_P (x
)
1314 /* GNU C++ takes advantage of this for `this'
1315 (and other const values). */
1316 || (RTX_UNCHANGING_P (x
)
1317 && GET_CODE (x
) == REG
1318 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1319 || FIXED_BASE_PLUS_P (x
));
1322 table
[hash
]->prev_same_hash
= elt
;
1325 /* Put it into the proper value-class. */
1328 classp
= classp
->first_same_value
;
1329 if (CHEAPER (elt
, classp
))
1330 /* Insert at the head of the class */
1332 register struct table_elt
*p
;
1333 elt
->next_same_value
= classp
;
1334 classp
->prev_same_value
= elt
;
1335 elt
->first_same_value
= elt
;
1337 for (p
= classp
; p
; p
= p
->next_same_value
)
1338 p
->first_same_value
= elt
;
1342 /* Insert not at head of the class. */
1343 /* Put it after the last element cheaper than X. */
1344 register struct table_elt
*p
, *next
;
1345 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1347 /* Put it after P and before NEXT. */
1348 elt
->next_same_value
= next
;
1350 next
->prev_same_value
= elt
;
1351 elt
->prev_same_value
= p
;
1352 p
->next_same_value
= elt
;
1353 elt
->first_same_value
= classp
;
1357 elt
->first_same_value
= elt
;
1359 /* If this is a constant being set equivalent to a register or a register
1360 being set equivalent to a constant, note the constant equivalence.
1362 If this is a constant, it cannot be equivalent to a different constant,
1363 and a constant is the only thing that can be cheaper than a register. So
1364 we know the register is the head of the class (before the constant was
1367 If this is a register that is not already known equivalent to a
1368 constant, we must check the entire class.
1370 If this is a register that is already known equivalent to an insn,
1371 update `qty_const_insn' to show that `this_insn' is the latest
1372 insn making that quantity equivalent to the constant. */
1374 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1376 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1377 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1378 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1381 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1383 register struct table_elt
*p
;
1385 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1389 qty_const
[reg_qty
[REGNO (x
)]]
1390 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1391 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1397 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1398 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1399 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1401 /* If this is a constant with symbolic value,
1402 and it has a term with an explicit integer value,
1403 link it up with related expressions. */
1404 if (GET_CODE (x
) == CONST
)
1406 rtx subexp
= get_related_value (x
);
1408 struct table_elt
*subelt
, *subelt_prev
;
1412 /* Get the integer-free subexpression in the hash table. */
1413 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1414 subelt
= lookup (subexp
, subhash
, mode
);
1416 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1417 /* Initialize SUBELT's circular chain if it has none. */
1418 if (subelt
->related_value
== 0)
1419 subelt
->related_value
= subelt
;
1420 /* Find the element in the circular chain that precedes SUBELT. */
1421 subelt_prev
= subelt
;
1422 while (subelt_prev
->related_value
!= subelt
)
1423 subelt_prev
= subelt_prev
->related_value
;
1424 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1425 This way the element that follows SUBELT is the oldest one. */
1426 elt
->related_value
= subelt_prev
->related_value
;
1427 subelt_prev
->related_value
= elt
;
1434 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1435 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1436 the two classes equivalent.
1438 CLASS1 will be the surviving class; CLASS2 should not be used after this
1441 Any invalid entries in CLASS2 will not be copied. */
1444 merge_equiv_classes (class1
, class2
)
1445 struct table_elt
*class1
, *class2
;
1447 struct table_elt
*elt
, *next
, *new;
1449 /* Ensure we start with the head of the classes. */
1450 class1
= class1
->first_same_value
;
1451 class2
= class2
->first_same_value
;
1453 /* If they were already equal, forget it. */
1454 if (class1
== class2
)
1457 for (elt
= class2
; elt
; elt
= next
)
1461 enum machine_mode mode
= elt
->mode
;
1463 next
= elt
->next_same_value
;
1465 /* Remove old entry, make a new one in CLASS1's class.
1466 Don't do this for invalid entries as we cannot find their
1467 hash code (it also isn't necessary). */
1468 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1470 hash_arg_in_memory
= 0;
1471 hash_arg_in_struct
= 0;
1472 hash
= HASH (exp
, mode
);
1474 if (GET_CODE (exp
) == REG
)
1475 delete_reg_equiv (REGNO (exp
));
1477 remove_from_table (elt
, hash
);
1479 if (insert_regs (exp
, class1
, 0))
1481 rehash_using_reg (exp
);
1482 hash
= HASH (exp
, mode
);
1484 new = insert (exp
, class1
, hash
, mode
);
1485 new->in_memory
= hash_arg_in_memory
;
1486 new->in_struct
= hash_arg_in_struct
;
1491 /* Remove from the hash table, or mark as invalid,
1492 all expressions whose values could be altered by storing in X.
1493 X is a register, a subreg, or a memory reference with nonvarying address
1494 (because, when a memory reference with a varying address is stored in,
1495 all memory references are removed by invalidate_memory
1496 so specific invalidation is superfluous).
1497 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1498 instead of just the amount indicated by the mode of X. This is only used
1499 for bitfield stores into memory.
1501 A nonvarying address may be just a register or just
1502 a symbol reference, or it may be either of those plus
1503 a numeric offset. */
1506 invalidate (x
, full_mode
)
1508 enum machine_mode full_mode
;
1511 register struct table_elt
*p
;
1513 HOST_WIDE_INT start
, end
;
1515 /* If X is a register, dependencies on its contents
1516 are recorded through the qty number mechanism.
1517 Just change the qty number of the register,
1518 mark it as invalid for expressions that refer to it,
1519 and remove it itself. */
1521 if (GET_CODE (x
) == REG
)
1523 register int regno
= REGNO (x
);
1524 register unsigned hash
= HASH (x
, GET_MODE (x
));
1526 /* Remove REGNO from any quantity list it might be on and indicate
1527 that it's value might have changed. If it is a pseudo, remove its
1528 entry from the hash table.
1530 For a hard register, we do the first two actions above for any
1531 additional hard registers corresponding to X. Then, if any of these
1532 registers are in the table, we must remove any REG entries that
1533 overlap these registers. */
1535 delete_reg_equiv (regno
);
1538 if (regno
>= FIRST_PSEUDO_REGISTER
)
1539 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1542 HOST_WIDE_INT in_table
1543 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1544 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1545 int tregno
, tendregno
;
1546 register struct table_elt
*p
, *next
;
1548 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1550 for (i
= regno
+ 1; i
< endregno
; i
++)
1552 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1553 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1554 delete_reg_equiv (i
);
1559 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1560 for (p
= table
[hash
]; p
; p
= next
)
1562 next
= p
->next_same_hash
;
1564 if (GET_CODE (p
->exp
) != REG
1565 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1568 tregno
= REGNO (p
->exp
);
1570 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1571 if (tendregno
> regno
&& tregno
< endregno
)
1572 remove_from_table (p
, hash
);
1579 if (GET_CODE (x
) == SUBREG
)
1581 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1583 invalidate (SUBREG_REG (x
), VOIDmode
);
1587 /* X is not a register; it must be a memory reference with
1588 a nonvarying address. Remove all hash table elements
1589 that refer to overlapping pieces of memory. */
1591 if (GET_CODE (x
) != MEM
)
1594 if (full_mode
== VOIDmode
)
1595 full_mode
= GET_MODE (x
);
1597 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (full_mode
),
1598 &base
, &start
, &end
);
1600 for (i
= 0; i
< NBUCKETS
; i
++)
1602 register struct table_elt
*next
;
1603 for (p
= table
[i
]; p
; p
= next
)
1605 next
= p
->next_same_hash
;
1606 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1607 remove_from_table (p
, i
);
1612 /* Remove all expressions that refer to register REGNO,
1613 since they are already invalid, and we are about to
1614 mark that register valid again and don't want the old
1615 expressions to reappear as valid. */
1618 remove_invalid_refs (regno
)
1622 register struct table_elt
*p
, *next
;
1624 for (i
= 0; i
< NBUCKETS
; i
++)
1625 for (p
= table
[i
]; p
; p
= next
)
1627 next
= p
->next_same_hash
;
1628 if (GET_CODE (p
->exp
) != REG
1629 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1630 remove_from_table (p
, i
);
1634 /* Recompute the hash codes of any valid entries in the hash table that
1635 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1637 This is called when we make a jump equivalence. */
1640 rehash_using_reg (x
)
1644 struct table_elt
*p
, *next
;
1647 if (GET_CODE (x
) == SUBREG
)
1650 /* If X is not a register or if the register is known not to be in any
1651 valid entries in the table, we have no work to do. */
1653 if (GET_CODE (x
) != REG
1654 || reg_in_table
[REGNO (x
)] < 0
1655 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1658 /* Scan all hash chains looking for valid entries that mention X.
1659 If we find one and it is in the wrong hash chain, move it. We can skip
1660 objects that are registers, since they are handled specially. */
1662 for (i
= 0; i
< NBUCKETS
; i
++)
1663 for (p
= table
[i
]; p
; p
= next
)
1665 next
= p
->next_same_hash
;
1666 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1667 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1668 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1670 if (p
->next_same_hash
)
1671 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1673 if (p
->prev_same_hash
)
1674 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1676 table
[i
] = p
->next_same_hash
;
1678 p
->next_same_hash
= table
[hash
];
1679 p
->prev_same_hash
= 0;
1681 table
[hash
]->prev_same_hash
= p
;
1687 /* Remove from the hash table all expressions that reference memory,
1688 or some of them as specified by *WRITES. */
1691 invalidate_memory (writes
)
1692 struct write_data
*writes
;
1695 register struct table_elt
*p
, *next
;
1696 int all
= writes
->all
;
1697 int nonscalar
= writes
->nonscalar
;
1699 for (i
= 0; i
< NBUCKETS
; i
++)
1700 for (p
= table
[i
]; p
; p
= next
)
1702 next
= p
->next_same_hash
;
1705 || (nonscalar
&& p
->in_struct
)
1706 || cse_rtx_addr_varies_p (p
->exp
)))
1707 remove_from_table (p
, i
);
1711 /* Remove from the hash table any expression that is a call-clobbered
1712 register. Also update their TICK values. */
1715 invalidate_for_call ()
1717 int regno
, endregno
;
1720 struct table_elt
*p
, *next
;
1723 /* Go through all the hard registers. For each that is clobbered in
1724 a CALL_INSN, remove the register from quantity chains and update
1725 reg_tick if defined. Also see if any of these registers is currently
1728 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1729 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1731 delete_reg_equiv (regno
);
1732 if (reg_tick
[regno
] >= 0)
1735 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1738 /* In the case where we have no call-clobbered hard registers in the
1739 table, we are done. Otherwise, scan the table and remove any
1740 entry that overlaps a call-clobbered register. */
1743 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1744 for (p
= table
[hash
]; p
; p
= next
)
1746 next
= p
->next_same_hash
;
1748 if (GET_CODE (p
->exp
) != REG
1749 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1752 regno
= REGNO (p
->exp
);
1753 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1755 for (i
= regno
; i
< endregno
; i
++)
1756 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1758 remove_from_table (p
, hash
);
1764 /* Given an expression X of type CONST,
1765 and ELT which is its table entry (or 0 if it
1766 is not in the hash table),
1767 return an alternate expression for X as a register plus integer.
1768 If none can be found, return 0. */
1771 use_related_value (x
, elt
)
1773 struct table_elt
*elt
;
1775 register struct table_elt
*relt
= 0;
1776 register struct table_elt
*p
, *q
;
1777 HOST_WIDE_INT offset
;
1779 /* First, is there anything related known?
1780 If we have a table element, we can tell from that.
1781 Otherwise, must look it up. */
1783 if (elt
!= 0 && elt
->related_value
!= 0)
1785 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1787 rtx subexp
= get_related_value (x
);
1789 relt
= lookup (subexp
,
1790 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1797 /* Search all related table entries for one that has an
1798 equivalent register. */
1803 /* This loop is strange in that it is executed in two different cases.
1804 The first is when X is already in the table. Then it is searching
1805 the RELATED_VALUE list of X's class (RELT). The second case is when
1806 X is not in the table. Then RELT points to a class for the related
1809 Ensure that, whatever case we are in, that we ignore classes that have
1810 the same value as X. */
1812 if (rtx_equal_p (x
, p
->exp
))
1815 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1816 if (GET_CODE (q
->exp
) == REG
)
1822 p
= p
->related_value
;
1824 /* We went all the way around, so there is nothing to be found.
1825 Alternatively, perhaps RELT was in the table for some other reason
1826 and it has no related values recorded. */
1827 if (p
== relt
|| p
== 0)
1834 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1835 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1836 return plus_constant (q
->exp
, offset
);
1839 /* Hash an rtx. We are careful to make sure the value is never negative.
1840 Equivalent registers hash identically.
1841 MODE is used in hashing for CONST_INTs only;
1842 otherwise the mode of X is used.
1844 Store 1 in do_not_record if any subexpression is volatile.
1846 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1847 which does not have the RTX_UNCHANGING_P bit set.
1848 In this case, also store 1 in hash_arg_in_struct
1849 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1851 Note that cse_insn knows that the hash code of a MEM expression
1852 is just (int) MEM plus the hash code of the address. */
1855 canon_hash (x
, mode
)
1857 enum machine_mode mode
;
1860 register unsigned hash
= 0;
1861 register enum rtx_code code
;
1864 /* repeat is used to turn tail-recursion into iteration. */
1869 code
= GET_CODE (x
);
1874 register int regno
= REGNO (x
);
1876 /* On some machines, we can't record any non-fixed hard register,
1877 because extending its life will cause reload problems. We
1878 consider ap, fp, and sp to be fixed for this purpose.
1879 On all machines, we can't record any global registers. */
1881 if (regno
< FIRST_PSEUDO_REGISTER
1882 && (global_regs
[regno
]
1883 #ifdef SMALL_REGISTER_CLASSES
1884 || (! fixed_regs
[regno
]
1885 && regno
!= FRAME_POINTER_REGNUM
1886 && regno
!= HARD_FRAME_POINTER_REGNUM
1887 && regno
!= ARG_POINTER_REGNUM
1888 && regno
!= STACK_POINTER_REGNUM
)
1895 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1901 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1902 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1907 /* This is like the general case, except that it only counts
1908 the integers representing the constant. */
1909 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1910 if (GET_MODE (x
) != VOIDmode
)
1911 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1913 unsigned tem
= XINT (x
, i
);
1917 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
1918 + (unsigned) CONST_DOUBLE_HIGH (x
));
1921 /* Assume there is only one rtx object for any given label. */
1924 += ((unsigned) LABEL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XEXP (x
, 0);
1929 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XSTR (x
, 0);
1933 if (MEM_VOLATILE_P (x
))
1938 if (! RTX_UNCHANGING_P (x
))
1940 hash_arg_in_memory
= 1;
1941 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1943 /* Now that we have already found this special case,
1944 might as well speed it up as much as possible. */
1945 hash
+= (unsigned) MEM
;
1956 case UNSPEC_VOLATILE
:
1961 if (MEM_VOLATILE_P (x
))
1968 i
= GET_RTX_LENGTH (code
) - 1;
1969 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1970 fmt
= GET_RTX_FORMAT (code
);
1975 rtx tem
= XEXP (x
, i
);
1977 /* If we are about to do the last recursive call
1978 needed at this level, change it into iteration.
1979 This function is called enough to be worth it. */
1985 hash
+= canon_hash (tem
, 0);
1987 else if (fmt
[i
] == 'E')
1988 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1989 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1990 else if (fmt
[i
] == 's')
1992 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
1997 else if (fmt
[i
] == 'i')
1999 register unsigned tem
= XINT (x
, i
);
2008 /* Like canon_hash but with no side effects. */
2013 enum machine_mode mode
;
2015 int save_do_not_record
= do_not_record
;
2016 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2017 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2018 unsigned hash
= canon_hash (x
, mode
);
2019 hash_arg_in_memory
= save_hash_arg_in_memory
;
2020 hash_arg_in_struct
= save_hash_arg_in_struct
;
2021 do_not_record
= save_do_not_record
;
2025 /* Return 1 iff X and Y would canonicalize into the same thing,
2026 without actually constructing the canonicalization of either one.
2027 If VALIDATE is nonzero,
2028 we assume X is an expression being processed from the rtl
2029 and Y was found in the hash table. We check register refs
2030 in Y for being marked as valid.
2032 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2033 that is known to be in the register. Ordinarily, we don't allow them
2034 to match, because letting them match would cause unpredictable results
2035 in all the places that search a hash table chain for an equivalent
2036 for a given value. A possible equivalent that has different structure
2037 has its hash code computed from different data. Whether the hash code
2038 is the same as that of the the given value is pure luck. */
2041 exp_equiv_p (x
, y
, validate
, equal_values
)
2047 register enum rtx_code code
;
2050 /* Note: it is incorrect to assume an expression is equivalent to itself
2051 if VALIDATE is nonzero. */
2052 if (x
== y
&& !validate
)
2054 if (x
== 0 || y
== 0)
2057 code
= GET_CODE (x
);
2058 if (code
!= GET_CODE (y
))
2063 /* If X is a constant and Y is a register or vice versa, they may be
2064 equivalent. We only have to validate if Y is a register. */
2065 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2066 && REGNO_QTY_VALID_P (REGNO (y
))
2067 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2068 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2069 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2072 if (CONSTANT_P (y
) && code
== REG
2073 && REGNO_QTY_VALID_P (REGNO (x
))
2074 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2075 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2081 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2082 if (GET_MODE (x
) != GET_MODE (y
))
2092 return INTVAL (x
) == INTVAL (y
);
2095 return XEXP (x
, 0) == XEXP (y
, 0);
2098 return XSTR (x
, 0) == XSTR (y
, 0);
2102 int regno
= REGNO (y
);
2104 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2105 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2108 /* If the quantities are not the same, the expressions are not
2109 equivalent. If there are and we are not to validate, they
2110 are equivalent. Otherwise, ensure all regs are up-to-date. */
2112 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2118 for (i
= regno
; i
< endregno
; i
++)
2119 if (reg_in_table
[i
] != reg_tick
[i
])
2125 /* For commutative operations, check both orders. */
2133 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2134 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2135 validate
, equal_values
))
2136 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2137 validate
, equal_values
)
2138 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2139 validate
, equal_values
)));
2142 /* Compare the elements. If any pair of corresponding elements
2143 fail to match, return 0 for the whole things. */
2145 fmt
= GET_RTX_FORMAT (code
);
2146 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2151 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2156 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2158 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2159 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2160 validate
, equal_values
))
2165 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2170 if (XINT (x
, i
) != XINT (y
, i
))
2175 if (XWINT (x
, i
) != XWINT (y
, i
))
2190 /* Return 1 iff any subexpression of X matches Y.
2191 Here we do not require that X or Y be valid (for registers referred to)
2192 for being in the hash table. */
2199 register enum rtx_code code
;
2205 if (x
== 0 || y
== 0)
2208 code
= GET_CODE (x
);
2209 /* If X as a whole has the same code as Y, they may match.
2211 if (code
== GET_CODE (y
))
2213 if (exp_equiv_p (x
, y
, 0, 1))
2217 /* X does not match, so try its subexpressions. */
2219 fmt
= GET_RTX_FORMAT (code
);
2220 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2229 if (refers_to_p (XEXP (x
, i
), y
))
2232 else if (fmt
[i
] == 'E')
2235 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2236 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2243 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2244 set PBASE, PSTART, and PEND which correspond to the base of the address,
2245 the starting offset, and ending offset respectively.
2247 ADDR is known to be a nonvarying address. */
2249 /* ??? Despite what the comments say, this function is in fact frequently
2250 passed varying addresses. This does not appear to cause any problems. */
2253 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2257 HOST_WIDE_INT
*pstart
, *pend
;
2260 HOST_WIDE_INT start
, end
;
2266 /* Registers with nonvarying addresses usually have constant equivalents;
2267 but the frame pointer register is also possible. */
2268 if (GET_CODE (base
) == REG
2270 && REGNO_QTY_VALID_P (REGNO (base
))
2271 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2272 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2273 base
= qty_const
[reg_qty
[REGNO (base
)]];
2274 else if (GET_CODE (base
) == PLUS
2275 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2276 && GET_CODE (XEXP (base
, 0)) == REG
2278 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2279 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2280 == GET_MODE (XEXP (base
, 0)))
2281 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2283 start
= INTVAL (XEXP (base
, 1));
2284 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2286 /* This can happen as the result of virtual register instantiation,
2287 if the initial offset is too large to be a valid address. */
2288 else if (GET_CODE (base
) == PLUS
2289 && GET_CODE (XEXP (base
, 0)) == REG
2290 && GET_CODE (XEXP (base
, 1)) == REG
2292 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2293 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2294 == GET_MODE (XEXP (base
, 0)))
2295 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]]
2296 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2297 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 1))]]
2298 == GET_MODE (XEXP (base
, 1)))
2299 && qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]])
2301 rtx tem
= qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]];
2302 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2304 /* One of the two values must be a constant. */
2305 if (GET_CODE (base
) != CONST_INT
)
2307 if (GET_CODE (tem
) != CONST_INT
)
2309 start
= INTVAL (tem
);
2313 start
= INTVAL (base
);
2318 /* Handle everything that we can find inside an address that has been
2319 viewed as constant. */
2323 /* If no part of this switch does a "continue", the code outside
2324 will exit this loop. */
2326 switch (GET_CODE (base
))
2329 /* By definition, operand1 of a LO_SUM is the associated constant
2330 address. Use the associated constant address as the base
2332 base
= XEXP (base
, 1);
2336 /* Strip off CONST. */
2337 base
= XEXP (base
, 0);
2341 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2343 start
+= INTVAL (XEXP (base
, 1));
2344 base
= XEXP (base
, 0);
2350 /* Handle the case of an AND which is the negative of a power of
2351 two. This is used to represent unaligned memory operations. */
2352 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2353 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2355 set_nonvarying_address_components (XEXP (base
, 0), size
,
2356 pbase
, pstart
, pend
);
2358 /* Assume the worst misalignment. START is affected, but not
2359 END, so compensate but adjusting SIZE. Don't lose any
2360 constant we already had. */
2362 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2363 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2373 if (GET_CODE (base
) == CONST_INT
)
2375 start
+= INTVAL (base
);
2381 /* Set the return values. */
2387 /* Return 1 iff any subexpression of X refers to memory
2388 at an address of BASE plus some offset
2389 such that any of the bytes' offsets fall between START (inclusive)
2390 and END (exclusive).
2392 The value is undefined if X is a varying address (as determined by
2393 cse_rtx_addr_varies_p). This function is not used in such cases.
2395 When used in the cse pass, `qty_const' is nonzero, and it is used
2396 to treat an address that is a register with a known constant value
2397 as if it were that constant value.
2398 In the loop pass, `qty_const' is zero, so this is not done. */
2401 refers_to_mem_p (x
, base
, start
, end
)
2403 HOST_WIDE_INT start
, end
;
2405 register HOST_WIDE_INT i
;
2406 register enum rtx_code code
;
2413 code
= GET_CODE (x
);
2416 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2418 HOST_WIDE_INT mystart
, myend
;
2420 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2421 &mybase
, &mystart
, &myend
);
2424 /* refers_to_mem_p is never called with varying addresses.
2425 If the base addresses are not equal, there is no chance
2426 of the memory addresses conflicting. */
2427 if (! rtx_equal_p (mybase
, base
))
2430 return myend
> start
&& mystart
< end
;
2433 /* X does not match, so try its subexpressions. */
2435 fmt
= GET_RTX_FORMAT (code
);
2436 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2445 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2448 else if (fmt
[i
] == 'E')
2451 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2452 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2459 /* Nonzero if X refers to memory at a varying address;
2460 except that a register which has at the moment a known constant value
2461 isn't considered variable. */
2464 cse_rtx_addr_varies_p (x
)
2467 /* We need not check for X and the equivalence class being of the same
2468 mode because if X is equivalent to a constant in some mode, it
2469 doesn't vary in any mode. */
2471 if (GET_CODE (x
) == MEM
2472 && GET_CODE (XEXP (x
, 0)) == REG
2473 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2474 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2475 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2478 if (GET_CODE (x
) == MEM
2479 && GET_CODE (XEXP (x
, 0)) == PLUS
2480 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2481 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2482 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2483 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2484 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2485 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2488 /* This can happen as the result of virtual register instantiation, if
2489 the initial constant is too large to be a valid address. This gives
2490 us a three instruction sequence, load large offset into a register,
2491 load fp minus a constant into a register, then a MEM which is the
2492 sum of the two `constant' registers. */
2493 if (GET_CODE (x
) == MEM
2494 && GET_CODE (XEXP (x
, 0)) == PLUS
2495 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2496 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == REG
2497 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2498 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2499 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2500 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]]
2501 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 1)))
2502 && (GET_MODE (XEXP (XEXP (x
, 0), 1))
2503 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 1))]])
2504 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 1))]])
2507 return rtx_addr_varies_p (x
);
2510 /* Canonicalize an expression:
2511 replace each register reference inside it
2512 with the "oldest" equivalent register.
2514 If INSN is non-zero and we are replacing a pseudo with a hard register
2515 or vice versa, validate_change is used to ensure that INSN remains valid
2516 after we make our substitution. The calls are made with IN_GROUP non-zero
2517 so apply_change_group must be called upon the outermost return from this
2518 function (unless INSN is zero). The result of apply_change_group can
2519 generally be discarded since the changes we are making are optional. */
2527 register enum rtx_code code
;
2533 code
= GET_CODE (x
);
2551 /* Never replace a hard reg, because hard regs can appear
2552 in more than one machine mode, and we must preserve the mode
2553 of each occurrence. Also, some hard regs appear in
2554 MEMs that are shared and mustn't be altered. Don't try to
2555 replace any reg that maps to a reg of class NO_REGS. */
2556 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2557 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2560 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2561 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2562 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2563 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2567 fmt
= GET_RTX_FORMAT (code
);
2568 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2574 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2576 /* If replacing pseudo with hard reg or vice versa, ensure the
2577 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2578 if (insn
!= 0 && new != 0
2579 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2580 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2581 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2582 || insn_n_dups
[recog_memoized (insn
)] > 0))
2583 validate_change (insn
, &XEXP (x
, i
), new, 1);
2587 else if (fmt
[i
] == 'E')
2588 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2589 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2595 /* LOC is a location with INSN that is an operand address (the contents of
2596 a MEM). Find the best equivalent address to use that is valid for this
2599 On most CISC machines, complicated address modes are costly, and rtx_cost
2600 is a good approximation for that cost. However, most RISC machines have
2601 only a few (usually only one) memory reference formats. If an address is
2602 valid at all, it is often just as cheap as any other address. Hence, for
2603 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2604 costs of various addresses. For two addresses of equal cost, choose the one
2605 with the highest `rtx_cost' value as that has the potential of eliminating
2606 the most insns. For equal costs, we choose the first in the equivalence
2607 class. Note that we ignore the fact that pseudo registers are cheaper
2608 than hard registers here because we would also prefer the pseudo registers.
2612 find_best_addr (insn
, loc
)
2616 struct table_elt
*elt
, *p
;
2619 int found_better
= 1;
2620 int save_do_not_record
= do_not_record
;
2621 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2622 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2627 /* Do not try to replace constant addresses or addresses of local and
2628 argument slots. These MEM expressions are made only once and inserted
2629 in many instructions, as well as being used to control symbol table
2630 output. It is not safe to clobber them.
2632 There are some uncommon cases where the address is already in a register
2633 for some reason, but we cannot take advantage of that because we have
2634 no easy way to unshare the MEM. In addition, looking up all stack
2635 addresses is costly. */
2636 if ((GET_CODE (addr
) == PLUS
2637 && GET_CODE (XEXP (addr
, 0)) == REG
2638 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2639 && (regno
= REGNO (XEXP (addr
, 0)),
2640 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2641 || regno
== ARG_POINTER_REGNUM
))
2642 || (GET_CODE (addr
) == REG
2643 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2644 || regno
== HARD_FRAME_POINTER_REGNUM
2645 || regno
== ARG_POINTER_REGNUM
))
2646 || CONSTANT_ADDRESS_P (addr
))
2649 /* If this address is not simply a register, try to fold it. This will
2650 sometimes simplify the expression. Many simplifications
2651 will not be valid, but some, usually applying the associative rule, will
2652 be valid and produce better code. */
2653 if (GET_CODE (addr
) != REG
2654 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2657 /* If this address is not in the hash table, we can't look for equivalences
2658 of the whole address. Also, ignore if volatile. */
2661 hash
= HASH (addr
, Pmode
);
2662 addr_volatile
= do_not_record
;
2663 do_not_record
= save_do_not_record
;
2664 hash_arg_in_memory
= save_hash_arg_in_memory
;
2665 hash_arg_in_struct
= save_hash_arg_in_struct
;
2670 elt
= lookup (addr
, hash
, Pmode
);
2672 #ifndef ADDRESS_COST
2675 our_cost
= elt
->cost
;
2677 /* Find the lowest cost below ours that works. */
2678 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2679 if (elt
->cost
< our_cost
2680 && (GET_CODE (elt
->exp
) == REG
2681 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2682 && validate_change (insn
, loc
,
2683 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2690 /* We need to find the best (under the criteria documented above) entry
2691 in the class that is valid. We use the `flag' field to indicate
2692 choices that were invalid and iterate until we can't find a better
2693 one that hasn't already been tried. */
2695 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2698 while (found_better
)
2700 int best_addr_cost
= ADDRESS_COST (*loc
);
2701 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2702 struct table_elt
*best_elt
= elt
;
2705 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2707 && (GET_CODE (p
->exp
) == REG
2708 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2709 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2710 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2711 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2714 best_addr_cost
= ADDRESS_COST (p
->exp
);
2715 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2721 if (validate_change (insn
, loc
,
2722 canon_reg (copy_rtx (best_elt
->exp
),
2731 /* If the address is a binary operation with the first operand a register
2732 and the second a constant, do the same as above, but looking for
2733 equivalences of the register. Then try to simplify before checking for
2734 the best address to use. This catches a few cases: First is when we
2735 have REG+const and the register is another REG+const. We can often merge
2736 the constants and eliminate one insn and one register. It may also be
2737 that a machine has a cheap REG+REG+const. Finally, this improves the
2738 code on the Alpha for unaligned byte stores. */
2740 if (flag_expensive_optimizations
2741 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2742 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2743 && GET_CODE (XEXP (*loc
, 0)) == REG
2744 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2746 rtx c
= XEXP (*loc
, 1);
2749 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2750 do_not_record
= save_do_not_record
;
2751 hash_arg_in_memory
= save_hash_arg_in_memory
;
2752 hash_arg_in_struct
= save_hash_arg_in_struct
;
2754 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2758 /* We need to find the best (under the criteria documented above) entry
2759 in the class that is valid. We use the `flag' field to indicate
2760 choices that were invalid and iterate until we can't find a better
2761 one that hasn't already been tried. */
2763 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2766 while (found_better
)
2768 int best_addr_cost
= ADDRESS_COST (*loc
);
2769 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2770 struct table_elt
*best_elt
= elt
;
2771 rtx best_rtx
= *loc
;
2774 /* This is at worst case an O(n^2) algorithm, so limit our search
2775 to the first 32 elements on the list. This avoids trouble
2776 compiling code with very long basic blocks that can easily
2777 call cse_gen_binary so many times that we run out of memory. */
2780 for (p
= elt
->first_same_value
, count
= 0;
2782 p
= p
->next_same_value
, count
++)
2784 && (GET_CODE (p
->exp
) == REG
2785 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2787 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2789 if ((ADDRESS_COST (new) < best_addr_cost
2790 || (ADDRESS_COST (new) == best_addr_cost
2791 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2794 best_addr_cost
= ADDRESS_COST (new);
2795 best_rtx_cost
= (COST (new) + 1) >> 1;
2803 if (validate_change (insn
, loc
,
2804 canon_reg (copy_rtx (best_rtx
),
2815 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2816 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2817 what values are being compared.
2819 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2820 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2821 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2822 compared to produce cc0.
2824 The return value is the comparison operator and is either the code of
2825 A or the code corresponding to the inverse of the comparison. */
2827 static enum rtx_code
2828 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2831 enum machine_mode
*pmode1
, *pmode2
;
2835 arg1
= *parg1
, arg2
= *parg2
;
2837 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2839 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2841 /* Set non-zero when we find something of interest. */
2843 int reverse_code
= 0;
2844 struct table_elt
*p
= 0;
2846 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2847 On machines with CC0, this is the only case that can occur, since
2848 fold_rtx will return the COMPARE or item being compared with zero
2851 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2854 /* If ARG1 is a comparison operator and CODE is testing for
2855 STORE_FLAG_VALUE, get the inner arguments. */
2857 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2860 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2861 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2862 #ifdef FLOAT_STORE_FLAG_VALUE
2863 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2864 && FLOAT_STORE_FLAG_VALUE
< 0)
2869 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2870 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2871 #ifdef FLOAT_STORE_FLAG_VALUE
2872 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2873 && FLOAT_STORE_FLAG_VALUE
< 0)
2876 x
= arg1
, reverse_code
= 1;
2879 /* ??? We could also check for
2881 (ne (and (eq (...) (const_int 1))) (const_int 0))
2883 and related forms, but let's wait until we see them occurring. */
2886 /* Look up ARG1 in the hash table and see if it has an equivalence
2887 that lets us see what is being compared. */
2888 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2890 if (p
) p
= p
->first_same_value
;
2892 for (; p
; p
= p
->next_same_value
)
2894 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2896 /* If the entry isn't valid, skip it. */
2897 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2900 if (GET_CODE (p
->exp
) == COMPARE
2901 /* Another possibility is that this machine has a compare insn
2902 that includes the comparison code. In that case, ARG1 would
2903 be equivalent to a comparison operation that would set ARG1 to
2904 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2905 ORIG_CODE is the actual comparison being done; if it is an EQ,
2906 we must reverse ORIG_CODE. On machine with a negative value
2907 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2910 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2911 && (GET_MODE_BITSIZE (inner_mode
)
2912 <= HOST_BITS_PER_WIDE_INT
)
2913 && (STORE_FLAG_VALUE
2914 & ((HOST_WIDE_INT
) 1
2915 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2916 #ifdef FLOAT_STORE_FLAG_VALUE
2918 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2919 && FLOAT_STORE_FLAG_VALUE
< 0)
2922 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2927 else if ((code
== EQ
2929 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2930 && (GET_MODE_BITSIZE (inner_mode
)
2931 <= HOST_BITS_PER_WIDE_INT
)
2932 && (STORE_FLAG_VALUE
2933 & ((HOST_WIDE_INT
) 1
2934 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2935 #ifdef FLOAT_STORE_FLAG_VALUE
2937 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2938 && FLOAT_STORE_FLAG_VALUE
< 0)
2941 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2948 /* If this is fp + constant, the equivalent is a better operand since
2949 it may let us predict the value of the comparison. */
2950 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2957 /* If we didn't find a useful equivalence for ARG1, we are done.
2958 Otherwise, set up for the next iteration. */
2962 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2963 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2964 code
= GET_CODE (x
);
2967 code
= reverse_condition (code
);
2970 /* Return our results. Return the modes from before fold_rtx
2971 because fold_rtx might produce const_int, and then it's too late. */
2972 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2973 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2978 /* Try to simplify a unary operation CODE whose output mode is to be
2979 MODE with input operand OP whose mode was originally OP_MODE.
2980 Return zero if no simplification can be made. */
2983 simplify_unary_operation (code
, mode
, op
, op_mode
)
2985 enum machine_mode mode
;
2987 enum machine_mode op_mode
;
2989 register int width
= GET_MODE_BITSIZE (mode
);
2991 /* The order of these tests is critical so that, for example, we don't
2992 check the wrong mode (input vs. output) for a conversion operation,
2993 such as FIX. At some point, this should be simplified. */
2995 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2997 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
2998 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3000 HOST_WIDE_INT hv
, lv
;
3003 if (GET_CODE (op
) == CONST_INT
)
3004 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3006 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3008 #ifdef REAL_ARITHMETIC
3009 REAL_VALUE_FROM_INT (d
, lv
, hv
);
3013 d
= (double) (~ hv
);
3014 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3015 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3016 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
3022 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3023 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3024 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3026 #endif /* REAL_ARITHMETIC */
3027 d
= real_value_truncate (mode
, d
);
3028 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3030 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
3031 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3033 HOST_WIDE_INT hv
, lv
;
3036 if (GET_CODE (op
) == CONST_INT
)
3037 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3039 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3041 if (op_mode
== VOIDmode
)
3043 /* We don't know how to interpret negative-looking numbers in
3044 this case, so don't try to fold those. */
3048 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
3051 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
3053 #ifdef REAL_ARITHMETIC
3054 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
);
3057 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3058 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3059 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3060 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3061 #endif /* REAL_ARITHMETIC */
3062 d
= real_value_truncate (mode
, d
);
3063 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3067 if (GET_CODE (op
) == CONST_INT
3068 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3070 register HOST_WIDE_INT arg0
= INTVAL (op
);
3071 register HOST_WIDE_INT val
;
3084 val
= (arg0
>= 0 ? arg0
: - arg0
);
3088 /* Don't use ffs here. Instead, get low order bit and then its
3089 number. If arg0 is zero, this will return 0, as desired. */
3090 arg0
&= GET_MODE_MASK (mode
);
3091 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3099 if (op_mode
== VOIDmode
)
3101 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3103 /* If we were really extending the mode,
3104 we would have to distinguish between zero-extension
3105 and sign-extension. */
3106 if (width
!= GET_MODE_BITSIZE (op_mode
))
3110 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3111 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3117 if (op_mode
== VOIDmode
)
3119 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3121 /* If we were really extending the mode,
3122 we would have to distinguish between zero-extension
3123 and sign-extension. */
3124 if (width
!= GET_MODE_BITSIZE (op_mode
))
3128 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3131 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3133 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3134 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3147 /* Clear the bits that don't belong in our mode,
3148 unless they and our sign bit are all one.
3149 So we get either a reasonable negative value or a reasonable
3150 unsigned value for this mode. */
3151 if (width
< HOST_BITS_PER_WIDE_INT
3152 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3153 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3154 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3156 return GEN_INT (val
);
3159 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3160 for a DImode operation on a CONST_INT. */
3161 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3162 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3164 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3166 if (GET_CODE (op
) == CONST_DOUBLE
)
3167 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3169 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3179 neg_double (l1
, h1
, &lv
, &hv
);
3184 neg_double (l1
, h1
, &lv
, &hv
);
3192 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3194 lv
= exact_log2 (l1
& (-l1
)) + 1;
3198 /* This is just a change-of-mode, so do nothing. */
3203 if (op_mode
== VOIDmode
3204 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3208 lv
= l1
& GET_MODE_MASK (op_mode
);
3212 if (op_mode
== VOIDmode
3213 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3217 lv
= l1
& GET_MODE_MASK (op_mode
);
3218 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3219 && (lv
& ((HOST_WIDE_INT
) 1
3220 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3221 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3223 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3234 return immed_double_const (lv
, hv
, mode
);
3237 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3238 else if (GET_CODE (op
) == CONST_DOUBLE
3239 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3245 if (setjmp (handler
))
3246 /* There used to be a warning here, but that is inadvisable.
3247 People may want to cause traps, and the natural way
3248 to do it should not get a warning. */
3251 set_float_handler (handler
);
3253 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3258 d
= REAL_VALUE_NEGATE (d
);
3262 if (REAL_VALUE_NEGATIVE (d
))
3263 d
= REAL_VALUE_NEGATE (d
);
3266 case FLOAT_TRUNCATE
:
3267 d
= real_value_truncate (mode
, d
);
3271 /* All this does is change the mode. */
3275 d
= REAL_VALUE_RNDZINT (d
);
3279 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3289 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3290 set_float_handler (NULL_PTR
);
3294 else if (GET_CODE (op
) == CONST_DOUBLE
3295 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3296 && GET_MODE_CLASS (mode
) == MODE_INT
3297 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3303 if (setjmp (handler
))
3306 set_float_handler (handler
);
3308 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3313 val
= REAL_VALUE_FIX (d
);
3317 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3324 set_float_handler (NULL_PTR
);
3326 /* Clear the bits that don't belong in our mode,
3327 unless they and our sign bit are all one.
3328 So we get either a reasonable negative value or a reasonable
3329 unsigned value for this mode. */
3330 if (width
< HOST_BITS_PER_WIDE_INT
3331 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3332 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3333 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3335 /* If this would be an entire word for the target, but is not for
3336 the host, then sign-extend on the host so that the number will look
3337 the same way on the host that it would on the target.
3339 For example, when building a 64 bit alpha hosted 32 bit sparc
3340 targeted compiler, then we want the 32 bit unsigned value -1 to be
3341 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3342 The later confuses the sparc backend. */
3344 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
3345 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
3346 val
|= ((HOST_WIDE_INT
) (-1) << width
);
3348 return GEN_INT (val
);
3351 /* This was formerly used only for non-IEEE float.
3352 eggert@twinsun.com says it is safe for IEEE also. */
3355 /* There are some simplifications we can do even if the operands
3361 /* (not (not X)) == X, similarly for NEG. */
3362 if (GET_CODE (op
) == code
)
3363 return XEXP (op
, 0);
3367 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3368 becomes just the MINUS if its mode is MODE. This allows
3369 folding switch statements on machines using casesi (such as
3371 if (GET_CODE (op
) == TRUNCATE
3372 && GET_MODE (XEXP (op
, 0)) == mode
3373 && GET_CODE (XEXP (op
, 0)) == MINUS
3374 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3375 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3376 return XEXP (op
, 0);
3378 #ifdef POINTERS_EXTEND_UNSIGNED
3379 if (! POINTERS_EXTEND_UNSIGNED
3380 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3382 return convert_memory_address (Pmode
, op
);
3386 #ifdef POINTERS_EXTEND_UNSIGNED
3388 if (POINTERS_EXTEND_UNSIGNED
3389 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3391 return convert_memory_address (Pmode
, op
);
3400 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3401 and OP1. Return 0 if no simplification is possible.
3403 Don't use this for relational operations such as EQ or LT.
3404 Use simplify_relational_operation instead. */
3407 simplify_binary_operation (code
, mode
, op0
, op1
)
3409 enum machine_mode mode
;
3412 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3414 int width
= GET_MODE_BITSIZE (mode
);
3417 /* Relational operations don't work here. We must know the mode
3418 of the operands in order to do the comparison correctly.
3419 Assuming a full word can give incorrect results.
3420 Consider comparing 128 with -128 in QImode. */
3422 if (GET_RTX_CLASS (code
) == '<')
3425 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3426 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3427 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3428 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3430 REAL_VALUE_TYPE f0
, f1
, value
;
3433 if (setjmp (handler
))
3436 set_float_handler (handler
);
3438 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3439 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3440 f0
= real_value_truncate (mode
, f0
);
3441 f1
= real_value_truncate (mode
, f1
);
3443 #ifdef REAL_ARITHMETIC
3444 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3458 #ifndef REAL_INFINITY
3465 value
= MIN (f0
, f1
);
3468 value
= MAX (f0
, f1
);
3475 value
= real_value_truncate (mode
, value
);
3476 set_float_handler (NULL_PTR
);
3477 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3479 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3481 /* We can fold some multi-word operations. */
3482 if (GET_MODE_CLASS (mode
) == MODE_INT
3483 && width
== HOST_BITS_PER_WIDE_INT
* 2
3484 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3485 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3487 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3489 if (GET_CODE (op0
) == CONST_DOUBLE
)
3490 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3492 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3494 if (GET_CODE (op1
) == CONST_DOUBLE
)
3495 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3497 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3502 /* A - B == A + (-B). */
3503 neg_double (l2
, h2
, &lv
, &hv
);
3506 /* .. fall through ... */
3509 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3513 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3516 case DIV
: case MOD
: case UDIV
: case UMOD
:
3517 /* We'd need to include tree.h to do this and it doesn't seem worth
3522 lv
= l1
& l2
, hv
= h1
& h2
;
3526 lv
= l1
| l2
, hv
= h1
| h2
;
3530 lv
= l1
^ l2
, hv
= h1
^ h2
;
3536 && ((unsigned HOST_WIDE_INT
) l1
3537 < (unsigned HOST_WIDE_INT
) l2
)))
3546 && ((unsigned HOST_WIDE_INT
) l1
3547 > (unsigned HOST_WIDE_INT
) l2
)))
3554 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3556 && ((unsigned HOST_WIDE_INT
) l1
3557 < (unsigned HOST_WIDE_INT
) l2
)))
3564 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3566 && ((unsigned HOST_WIDE_INT
) l1
3567 > (unsigned HOST_WIDE_INT
) l2
)))
3573 case LSHIFTRT
: case ASHIFTRT
:
3575 case ROTATE
: case ROTATERT
:
3576 #ifdef SHIFT_COUNT_TRUNCATED
3577 if (SHIFT_COUNT_TRUNCATED
)
3578 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3581 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3584 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3585 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3587 else if (code
== ASHIFT
)
3588 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3589 else if (code
== ROTATE
)
3590 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3591 else /* code == ROTATERT */
3592 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3599 return immed_double_const (lv
, hv
, mode
);
3602 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3603 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3605 /* Even if we can't compute a constant result,
3606 there are some cases worth simplifying. */
3611 /* In IEEE floating point, x+0 is not the same as x. Similarly
3612 for the other optimizations below. */
3613 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3614 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3617 if (op1
== CONST0_RTX (mode
))
3620 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3621 if (GET_CODE (op0
) == NEG
)
3622 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3623 else if (GET_CODE (op1
) == NEG
)
3624 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3626 /* Handle both-operands-constant cases. We can only add
3627 CONST_INTs to constants since the sum of relocatable symbols
3628 can't be handled by most assemblers. Don't add CONST_INT
3629 to CONST_INT since overflow won't be computed properly if wider
3630 than HOST_BITS_PER_WIDE_INT. */
3632 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3633 && GET_CODE (op1
) == CONST_INT
)
3634 return plus_constant (op0
, INTVAL (op1
));
3635 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3636 && GET_CODE (op0
) == CONST_INT
)
3637 return plus_constant (op1
, INTVAL (op0
));
3639 /* See if this is something like X * C - X or vice versa or
3640 if the multiplication is written as a shift. If so, we can
3641 distribute and make a new multiply, shift, or maybe just
3642 have X (if C is 2 in the example above). But don't make
3643 real multiply if we didn't have one before. */
3645 if (! FLOAT_MODE_P (mode
))
3647 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3648 rtx lhs
= op0
, rhs
= op1
;
3651 if (GET_CODE (lhs
) == NEG
)
3652 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3653 else if (GET_CODE (lhs
) == MULT
3654 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3656 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3659 else if (GET_CODE (lhs
) == ASHIFT
3660 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3661 && INTVAL (XEXP (lhs
, 1)) >= 0
3662 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3664 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3665 lhs
= XEXP (lhs
, 0);
3668 if (GET_CODE (rhs
) == NEG
)
3669 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3670 else if (GET_CODE (rhs
) == MULT
3671 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3673 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3676 else if (GET_CODE (rhs
) == ASHIFT
3677 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3678 && INTVAL (XEXP (rhs
, 1)) >= 0
3679 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3681 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3682 rhs
= XEXP (rhs
, 0);
3685 if (rtx_equal_p (lhs
, rhs
))
3687 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3688 GEN_INT (coeff0
+ coeff1
));
3689 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3693 /* If one of the operands is a PLUS or a MINUS, see if we can
3694 simplify this by the associative law.
3695 Don't use the associative law for floating point.
3696 The inaccuracy makes it nonassociative,
3697 and subtle programs can break if operations are associated. */
3699 if (INTEGRAL_MODE_P (mode
)
3700 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3701 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3702 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3708 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3709 using cc0, in which case we want to leave it as a COMPARE
3710 so we can distinguish it from a register-register-copy.
3712 In IEEE floating point, x-0 is not the same as x. */
3714 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3715 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3716 && op1
== CONST0_RTX (mode
))
3719 /* Do nothing here. */
3724 /* None of these optimizations can be done for IEEE
3726 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3727 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3730 /* We can't assume x-x is 0 even with non-IEEE floating point,
3731 but since it is zero except in very strange circumstances, we
3732 will treat it as zero with -ffast-math. */
3733 if (rtx_equal_p (op0
, op1
)
3734 && ! side_effects_p (op0
)
3735 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3736 return CONST0_RTX (mode
);
3738 /* Change subtraction from zero into negation. */
3739 if (op0
== CONST0_RTX (mode
))
3740 return gen_rtx (NEG
, mode
, op1
);
3742 /* (-1 - a) is ~a. */
3743 if (op0
== constm1_rtx
)
3744 return gen_rtx (NOT
, mode
, op1
);
3746 /* Subtracting 0 has no effect. */
3747 if (op1
== CONST0_RTX (mode
))
3750 /* See if this is something like X * C - X or vice versa or
3751 if the multiplication is written as a shift. If so, we can
3752 distribute and make a new multiply, shift, or maybe just
3753 have X (if C is 2 in the example above). But don't make
3754 real multiply if we didn't have one before. */
3756 if (! FLOAT_MODE_P (mode
))
3758 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3759 rtx lhs
= op0
, rhs
= op1
;
3762 if (GET_CODE (lhs
) == NEG
)
3763 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3764 else if (GET_CODE (lhs
) == MULT
3765 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3767 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3770 else if (GET_CODE (lhs
) == ASHIFT
3771 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3772 && INTVAL (XEXP (lhs
, 1)) >= 0
3773 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3775 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3776 lhs
= XEXP (lhs
, 0);
3779 if (GET_CODE (rhs
) == NEG
)
3780 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3781 else if (GET_CODE (rhs
) == MULT
3782 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3784 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3787 else if (GET_CODE (rhs
) == ASHIFT
3788 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3789 && INTVAL (XEXP (rhs
, 1)) >= 0
3790 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3792 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3793 rhs
= XEXP (rhs
, 0);
3796 if (rtx_equal_p (lhs
, rhs
))
3798 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3799 GEN_INT (coeff0
- coeff1
));
3800 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3804 /* (a - (-b)) -> (a + b). */
3805 if (GET_CODE (op1
) == NEG
)
3806 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3808 /* If one of the operands is a PLUS or a MINUS, see if we can
3809 simplify this by the associative law.
3810 Don't use the associative law for floating point.
3811 The inaccuracy makes it nonassociative,
3812 and subtle programs can break if operations are associated. */
3814 if (INTEGRAL_MODE_P (mode
)
3815 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3816 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3817 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3820 /* Don't let a relocatable value get a negative coeff. */
3821 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3822 return plus_constant (op0
, - INTVAL (op1
));
3824 /* (x - (x & y)) -> (x & ~y) */
3825 if (GET_CODE (op1
) == AND
)
3827 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
3828 return cse_gen_binary (AND
, mode
, op0
, gen_rtx (NOT
, mode
, XEXP (op1
, 1)));
3829 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
3830 return cse_gen_binary (AND
, mode
, op0
, gen_rtx (NOT
, mode
, XEXP (op1
, 0)));
3835 if (op1
== constm1_rtx
)
3837 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3839 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3842 /* In IEEE floating point, x*0 is not always 0. */
3843 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3844 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3845 && op1
== CONST0_RTX (mode
)
3846 && ! side_effects_p (op0
))
3849 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3850 However, ANSI says we can drop signals,
3851 so we can do this anyway. */
3852 if (op1
== CONST1_RTX (mode
))
3855 /* Convert multiply by constant power of two into shift unless
3856 we are still generating RTL. This test is a kludge. */
3857 if (GET_CODE (op1
) == CONST_INT
3858 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3859 && ! rtx_equal_function_value_matters
)
3860 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3862 if (GET_CODE (op1
) == CONST_DOUBLE
3863 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3867 int op1is2
, op1ism1
;
3869 if (setjmp (handler
))
3872 set_float_handler (handler
);
3873 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3874 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3875 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3876 set_float_handler (NULL_PTR
);
3878 /* x*2 is x+x and x*(-1) is -x */
3879 if (op1is2
&& GET_MODE (op0
) == mode
)
3880 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3882 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3883 return gen_rtx (NEG
, mode
, op0
);
3888 if (op1
== const0_rtx
)
3890 if (GET_CODE (op1
) == CONST_INT
3891 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3893 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3895 /* A | (~A) -> -1 */
3896 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3897 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3898 && ! side_effects_p (op0
)
3899 && GET_MODE_CLASS (mode
) != MODE_CC
)
3904 if (op1
== const0_rtx
)
3906 if (GET_CODE (op1
) == CONST_INT
3907 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3908 return gen_rtx (NOT
, mode
, op0
);
3909 if (op0
== op1
&& ! side_effects_p (op0
)
3910 && GET_MODE_CLASS (mode
) != MODE_CC
)
3915 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3917 if (GET_CODE (op1
) == CONST_INT
3918 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3920 if (op0
== op1
&& ! side_effects_p (op0
)
3921 && GET_MODE_CLASS (mode
) != MODE_CC
)
3924 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3925 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3926 && ! side_effects_p (op0
)
3927 && GET_MODE_CLASS (mode
) != MODE_CC
)
3932 /* Convert divide by power of two into shift (divide by 1 handled
3934 if (GET_CODE (op1
) == CONST_INT
3935 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3936 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3938 /* ... fall through ... */
3941 if (op1
== CONST1_RTX (mode
))
3944 /* In IEEE floating point, 0/x is not always 0. */
3945 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3946 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3947 && op0
== CONST0_RTX (mode
)
3948 && ! side_effects_p (op1
))
3951 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3952 /* Change division by a constant into multiplication. Only do
3953 this with -ffast-math until an expert says it is safe in
3955 else if (GET_CODE (op1
) == CONST_DOUBLE
3956 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3957 && op1
!= CONST0_RTX (mode
)
3961 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3963 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3965 #if defined (REAL_ARITHMETIC)
3966 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3967 return gen_rtx (MULT
, mode
, op0
,
3968 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3970 return gen_rtx (MULT
, mode
, op0
,
3971 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3979 /* Handle modulus by power of two (mod with 1 handled below). */
3980 if (GET_CODE (op1
) == CONST_INT
3981 && exact_log2 (INTVAL (op1
)) > 0)
3982 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3984 /* ... fall through ... */
3987 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3988 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3994 /* Rotating ~0 always results in ~0. */
3995 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3996 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3997 && ! side_effects_p (op1
))
4000 /* ... fall through ... */
4005 if (op1
== const0_rtx
)
4007 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
4012 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4013 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
4014 && ! side_effects_p (op0
))
4016 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4021 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4023 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
4024 && ! side_effects_p (op0
))
4026 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4031 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4033 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4038 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
4040 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4051 /* Get the integer argument values in two forms:
4052 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4054 arg0
= INTVAL (op0
);
4055 arg1
= INTVAL (op1
);
4057 if (width
< HOST_BITS_PER_WIDE_INT
)
4059 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4060 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4063 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4064 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4067 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4068 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4076 /* Compute the value of the arithmetic. */
4081 val
= arg0s
+ arg1s
;
4085 val
= arg0s
- arg1s
;
4089 val
= arg0s
* arg1s
;
4095 val
= arg0s
/ arg1s
;
4101 val
= arg0s
% arg1s
;
4107 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4113 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4129 /* If shift count is undefined, don't fold it; let the machine do
4130 what it wants. But truncate it if the machine will do that. */
4134 #ifdef SHIFT_COUNT_TRUNCATED
4135 if (SHIFT_COUNT_TRUNCATED
)
4139 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4146 #ifdef SHIFT_COUNT_TRUNCATED
4147 if (SHIFT_COUNT_TRUNCATED
)
4151 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4158 #ifdef SHIFT_COUNT_TRUNCATED
4159 if (SHIFT_COUNT_TRUNCATED
)
4163 val
= arg0s
>> arg1
;
4165 /* Bootstrap compiler may not have sign extended the right shift.
4166 Manually extend the sign to insure bootstrap cc matches gcc. */
4167 if (arg0s
< 0 && arg1
> 0)
4168 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4177 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4178 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4186 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4187 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4191 /* Do nothing here. */
4195 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4199 val
= ((unsigned HOST_WIDE_INT
) arg0
4200 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4204 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4208 val
= ((unsigned HOST_WIDE_INT
) arg0
4209 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4216 /* Clear the bits that don't belong in our mode, unless they and our sign
4217 bit are all one. So we get either a reasonable negative value or a
4218 reasonable unsigned value for this mode. */
4219 if (width
< HOST_BITS_PER_WIDE_INT
4220 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4221 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4222 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4224 /* If this would be an entire word for the target, but is not for
4225 the host, then sign-extend on the host so that the number will look
4226 the same way on the host that it would on the target.
4228 For example, when building a 64 bit alpha hosted 32 bit sparc
4229 targeted compiler, then we want the 32 bit unsigned value -1 to be
4230 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4231 The later confuses the sparc backend. */
4233 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
4234 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
4235 val
|= ((HOST_WIDE_INT
) (-1) << width
);
4237 return GEN_INT (val
);
4240 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4243 Rather than test for specific case, we do this by a brute-force method
4244 and do all possible simplifications until no more changes occur. Then
4245 we rebuild the operation. */
4248 simplify_plus_minus (code
, mode
, op0
, op1
)
4250 enum machine_mode mode
;
4256 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4257 int first
= 1, negate
= 0, changed
;
4260 bzero ((char *) ops
, sizeof ops
);
4262 /* Set up the two operands and then expand them until nothing has been
4263 changed. If we run out of room in our array, give up; this should
4264 almost never happen. */
4266 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4273 for (i
= 0; i
< n_ops
; i
++)
4274 switch (GET_CODE (ops
[i
]))
4281 ops
[n_ops
] = XEXP (ops
[i
], 1);
4282 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4283 ops
[i
] = XEXP (ops
[i
], 0);
4289 ops
[i
] = XEXP (ops
[i
], 0);
4290 negs
[i
] = ! negs
[i
];
4295 ops
[i
] = XEXP (ops
[i
], 0);
4301 /* ~a -> (-a - 1) */
4304 ops
[n_ops
] = constm1_rtx
;
4305 negs
[n_ops
++] = negs
[i
];
4306 ops
[i
] = XEXP (ops
[i
], 0);
4307 negs
[i
] = ! negs
[i
];
4314 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4319 /* If we only have two operands, we can't do anything. */
4323 /* Now simplify each pair of operands until nothing changes. The first
4324 time through just simplify constants against each other. */
4331 for (i
= 0; i
< n_ops
- 1; i
++)
4332 for (j
= i
+ 1; j
< n_ops
; j
++)
4333 if (ops
[i
] != 0 && ops
[j
] != 0
4334 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4336 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4337 enum rtx_code ncode
= PLUS
;
4339 if (negs
[i
] && ! negs
[j
])
4340 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4341 else if (! negs
[i
] && negs
[j
])
4344 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4347 ops
[i
] = tem
, ops
[j
] = 0;
4348 negs
[i
] = negs
[i
] && negs
[j
];
4349 if (GET_CODE (tem
) == NEG
)
4350 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4352 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4353 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4361 /* Pack all the operands to the lower-numbered entries and give up if
4362 we didn't reduce the number of operands we had. Make sure we
4363 count a CONST as two operands. If we have the same number of
4364 operands, but have made more CONSTs than we had, this is also
4365 an improvement, so accept it. */
4367 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4370 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4371 if (GET_CODE (ops
[j
]) == CONST
)
4375 if (i
+ n_consts
> input_ops
4376 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4381 /* If we have a CONST_INT, put it last. */
4382 for (i
= 0; i
< n_ops
- 1; i
++)
4383 if (GET_CODE (ops
[i
]) == CONST_INT
)
4385 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4386 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4389 /* Put a non-negated operand first. If there aren't any, make all
4390 operands positive and negate the whole thing later. */
4391 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4396 for (i
= 0; i
< n_ops
; i
++)
4402 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4403 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4406 /* Now make the result by performing the requested operations. */
4408 for (i
= 1; i
< n_ops
; i
++)
4409 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4411 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4414 /* Make a binary operation by properly ordering the operands and
4415 seeing if the expression folds. */
4418 cse_gen_binary (code
, mode
, op0
, op1
)
4420 enum machine_mode mode
;
4425 /* Put complex operands first and constants second if commutative. */
4426 if (GET_RTX_CLASS (code
) == 'c'
4427 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4428 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4429 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4430 || (GET_CODE (op0
) == SUBREG
4431 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4432 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4433 tem
= op0
, op0
= op1
, op1
= tem
;
4435 /* If this simplifies, do it. */
4436 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4441 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4442 just form the operation. */
4444 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4445 && GET_MODE (op0
) != VOIDmode
)
4446 return plus_constant (op0
, INTVAL (op1
));
4447 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4448 && GET_MODE (op0
) != VOIDmode
)
4449 return plus_constant (op0
, - INTVAL (op1
));
4451 return gen_rtx (code
, mode
, op0
, op1
);
4454 /* Like simplify_binary_operation except used for relational operators.
4455 MODE is the mode of the operands, not that of the result. If MODE
4456 is VOIDmode, both operands must also be VOIDmode and we compare the
4457 operands in "infinite precision".
4459 If no simplification is possible, this function returns zero. Otherwise,
4460 it returns either const_true_rtx or const0_rtx. */
4463 simplify_relational_operation (code
, mode
, op0
, op1
)
4465 enum machine_mode mode
;
4468 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4471 /* If op0 is a compare, extract the comparison arguments from it. */
4472 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4473 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4475 /* We can't simplify MODE_CC values since we don't know what the
4476 actual comparison is. */
4477 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4484 /* For integer comparisons of A and B maybe we can simplify A - B and can
4485 then simplify a comparison of that with zero. If A and B are both either
4486 a register or a CONST_INT, this can't help; testing for these cases will
4487 prevent infinite recursion here and speed things up.
4489 If CODE is an unsigned comparison, then we can never do this optimization,
4490 because it gives an incorrect result if the subtraction wraps around zero.
4491 ANSI C defines unsigned operations such that they never overflow, and
4492 thus such cases can not be ignored. */
4494 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4495 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4496 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4497 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4498 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4499 return simplify_relational_operation (signed_condition (code
),
4500 mode
, tem
, const0_rtx
);
4502 /* For non-IEEE floating-point, if the two operands are equal, we know the
4504 if (rtx_equal_p (op0
, op1
)
4505 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4506 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4507 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4509 /* If the operands are floating-point constants, see if we can fold
4511 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4512 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4513 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4515 REAL_VALUE_TYPE d0
, d1
;
4518 if (setjmp (handler
))
4521 set_float_handler (handler
);
4522 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4523 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4524 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4525 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4526 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4527 set_float_handler (NULL_PTR
);
4529 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4531 /* Otherwise, see if the operands are both integers. */
4532 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4533 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4534 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4536 int width
= GET_MODE_BITSIZE (mode
);
4537 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4538 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4540 /* Get the two words comprising each integer constant. */
4541 if (GET_CODE (op0
) == CONST_DOUBLE
)
4543 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4544 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4548 l0u
= l0s
= INTVAL (op0
);
4549 h0u
= 0, h0s
= l0s
< 0 ? -1 : 0;
4552 if (GET_CODE (op1
) == CONST_DOUBLE
)
4554 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4555 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4559 l1u
= l1s
= INTVAL (op1
);
4560 h1u
= 0, h1s
= l1s
< 0 ? -1 : 0;
4563 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4564 we have to sign or zero-extend the values. */
4565 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4566 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4568 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4570 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4571 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4573 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4574 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4576 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4577 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4580 equal
= (h0u
== h1u
&& l0u
== l1u
);
4581 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4582 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4583 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4584 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4587 /* Otherwise, there are some code-specific tests we can make. */
4593 /* References to the frame plus a constant or labels cannot
4594 be zero, but a SYMBOL_REF can due to #pragma weak. */
4595 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4596 || GET_CODE (op0
) == LABEL_REF
)
4597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4598 /* On some machines, the ap reg can be 0 sometimes. */
4599 && op0
!= arg_pointer_rtx
4606 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4607 || GET_CODE (op0
) == LABEL_REF
)
4608 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4609 && op0
!= arg_pointer_rtx
4612 return const_true_rtx
;
4616 /* Unsigned values are never negative. */
4617 if (op1
== const0_rtx
)
4618 return const_true_rtx
;
4622 if (op1
== const0_rtx
)
4627 /* Unsigned values are never greater than the largest
4629 if (GET_CODE (op1
) == CONST_INT
4630 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4631 && INTEGRAL_MODE_P (mode
))
4632 return const_true_rtx
;
4636 if (GET_CODE (op1
) == CONST_INT
4637 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4638 && INTEGRAL_MODE_P (mode
))
4646 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4651 return equal
? const_true_rtx
: const0_rtx
;
4653 return ! equal
? const_true_rtx
: const0_rtx
;
4655 return op0lt
? const_true_rtx
: const0_rtx
;
4657 return op1lt
? const_true_rtx
: const0_rtx
;
4659 return op0ltu
? const_true_rtx
: const0_rtx
;
4661 return op1ltu
? const_true_rtx
: const0_rtx
;
4663 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4665 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4667 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4669 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4675 /* Simplify CODE, an operation with result mode MODE and three operands,
4676 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4677 a constant. Return 0 if no simplifications is possible. */
4680 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4682 enum machine_mode mode
, op0_mode
;
4685 int width
= GET_MODE_BITSIZE (mode
);
4687 /* VOIDmode means "infinite" precision. */
4689 width
= HOST_BITS_PER_WIDE_INT
;
4695 if (GET_CODE (op0
) == CONST_INT
4696 && GET_CODE (op1
) == CONST_INT
4697 && GET_CODE (op2
) == CONST_INT
4698 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4699 && width
<= HOST_BITS_PER_WIDE_INT
)
4701 /* Extracting a bit-field from a constant */
4702 HOST_WIDE_INT val
= INTVAL (op0
);
4704 if (BITS_BIG_ENDIAN
)
4705 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4706 - INTVAL (op2
) - INTVAL (op1
));
4708 val
>>= INTVAL (op2
);
4710 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4712 /* First zero-extend. */
4713 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4714 /* If desired, propagate sign bit. */
4715 if (code
== SIGN_EXTRACT
4716 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4717 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4720 /* Clear the bits that don't belong in our mode,
4721 unless they and our sign bit are all one.
4722 So we get either a reasonable negative value or a reasonable
4723 unsigned value for this mode. */
4724 if (width
< HOST_BITS_PER_WIDE_INT
4725 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4726 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4727 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4729 return GEN_INT (val
);
4734 if (GET_CODE (op0
) == CONST_INT
)
4735 return op0
!= const0_rtx
? op1
: op2
;
4745 /* If X is a nontrivial arithmetic operation on an argument
4746 for which a constant value can be determined, return
4747 the result of operating on that value, as a constant.
4748 Otherwise, return X, possibly with one or more operands
4749 modified by recursive calls to this function.
4751 If X is a register whose contents are known, we do NOT
4752 return those contents here. equiv_constant is called to
4755 INSN is the insn that we may be modifying. If it is 0, make a copy
4756 of X before modifying it. */
4763 register enum rtx_code code
;
4764 register enum machine_mode mode
;
4771 /* Folded equivalents of first two operands of X. */
4775 /* Constant equivalents of first three operands of X;
4776 0 when no such equivalent is known. */
4781 /* The mode of the first operand of X. We need this for sign and zero
4783 enum machine_mode mode_arg0
;
4788 mode
= GET_MODE (x
);
4789 code
= GET_CODE (x
);
4798 /* No use simplifying an EXPR_LIST
4799 since they are used only for lists of args
4800 in a function call's REG_EQUAL note. */
4806 return prev_insn_cc0
;
4810 /* If the next insn is a CODE_LABEL followed by a jump table,
4811 PC's value is a LABEL_REF pointing to that label. That
4812 lets us fold switch statements on the Vax. */
4813 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4815 rtx next
= next_nonnote_insn (insn
);
4817 if (next
&& GET_CODE (next
) == CODE_LABEL
4818 && NEXT_INSN (next
) != 0
4819 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4820 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4821 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4822 return gen_rtx (LABEL_REF
, Pmode
, next
);
4827 /* See if we previously assigned a constant value to this SUBREG. */
4828 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4829 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4832 /* If this is a paradoxical SUBREG, we have no idea what value the
4833 extra bits would have. However, if the operand is equivalent
4834 to a SUBREG whose operand is the same as our mode, and all the
4835 modes are within a word, we can just use the inner operand
4836 because these SUBREGs just say how to treat the register.
4838 Similarly if we find an integer constant. */
4840 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4842 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4843 struct table_elt
*elt
;
4845 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4846 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4847 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4849 for (elt
= elt
->first_same_value
;
4850 elt
; elt
= elt
->next_same_value
)
4852 if (CONSTANT_P (elt
->exp
)
4853 && GET_MODE (elt
->exp
) == VOIDmode
)
4856 if (GET_CODE (elt
->exp
) == SUBREG
4857 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4858 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4859 return copy_rtx (SUBREG_REG (elt
->exp
));
4865 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4866 We might be able to if the SUBREG is extracting a single word in an
4867 integral mode or extracting the low part. */
4869 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4870 const_arg0
= equiv_constant (folded_arg0
);
4872 folded_arg0
= const_arg0
;
4874 if (folded_arg0
!= SUBREG_REG (x
))
4878 if (GET_MODE_CLASS (mode
) == MODE_INT
4879 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4880 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4881 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4882 GET_MODE (SUBREG_REG (x
)));
4883 if (new == 0 && subreg_lowpart_p (x
))
4884 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4889 /* If this is a narrowing SUBREG and our operand is a REG, see if
4890 we can find an equivalence for REG that is an arithmetic operation
4891 in a wider mode where both operands are paradoxical SUBREGs
4892 from objects of our result mode. In that case, we couldn't report
4893 an equivalent value for that operation, since we don't know what the
4894 extra bits will be. But we can find an equivalence for this SUBREG
4895 by folding that operation is the narrow mode. This allows us to
4896 fold arithmetic in narrow modes when the machine only supports
4897 word-sized arithmetic.
4899 Also look for a case where we have a SUBREG whose operand is the
4900 same as our result. If both modes are smaller than a word, we
4901 are simply interpreting a register in different modes and we
4902 can use the inner value. */
4904 if (GET_CODE (folded_arg0
) == REG
4905 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4906 && subreg_lowpart_p (x
))
4908 struct table_elt
*elt
;
4910 /* We can use HASH here since we know that canon_hash won't be
4912 elt
= lookup (folded_arg0
,
4913 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4914 GET_MODE (folded_arg0
));
4917 elt
= elt
->first_same_value
;
4919 for (; elt
; elt
= elt
->next_same_value
)
4921 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4923 /* Just check for unary and binary operations. */
4924 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4925 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4926 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4927 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4928 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4930 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4932 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4933 op0
= fold_rtx (op0
, NULL_RTX
);
4935 op0
= equiv_constant (op0
);
4937 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4940 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4941 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4942 && eltcode
!= DIV
&& eltcode
!= MOD
4943 && eltcode
!= UDIV
&& eltcode
!= UMOD
4944 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4945 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4946 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4947 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4949 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4950 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4951 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4953 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4955 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4956 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4958 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4959 op0
= fold_rtx (op0
, NULL_RTX
);
4962 op0
= equiv_constant (op0
);
4964 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4965 op1
= fold_rtx (op1
, NULL_RTX
);
4968 op1
= equiv_constant (op1
);
4970 /* If we are looking for the low SImode part of
4971 (ashift:DI c (const_int 32)), it doesn't work
4972 to compute that in SImode, because a 32-bit shift
4973 in SImode is unpredictable. We know the value is 0. */
4975 && GET_CODE (elt
->exp
) == ASHIFT
4976 && GET_CODE (op1
) == CONST_INT
4977 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4979 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4981 /* If the count fits in the inner mode's width,
4982 but exceeds the outer mode's width,
4983 the value will get truncated to 0
4987 /* If the count exceeds even the inner mode's width,
4988 don't fold this expression. */
4991 else if (op0
&& op1
)
4992 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4996 else if (GET_CODE (elt
->exp
) == SUBREG
4997 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4998 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
5000 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5001 new = copy_rtx (SUBREG_REG (elt
->exp
));
5012 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5013 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5014 new = lookup_as_function (XEXP (x
, 0), code
);
5016 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
5020 /* If we are not actually processing an insn, don't try to find the
5021 best address. Not only don't we care, but we could modify the
5022 MEM in an invalid way since we have no insn to validate against. */
5024 find_best_addr (insn
, &XEXP (x
, 0));
5027 /* Even if we don't fold in the insn itself,
5028 we can safely do so here, in hopes of getting a constant. */
5029 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5031 HOST_WIDE_INT offset
= 0;
5033 if (GET_CODE (addr
) == REG
5034 && REGNO_QTY_VALID_P (REGNO (addr
))
5035 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
5036 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
5037 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
5039 /* If address is constant, split it into a base and integer offset. */
5040 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5042 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5043 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5045 base
= XEXP (XEXP (addr
, 0), 0);
5046 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5048 else if (GET_CODE (addr
) == LO_SUM
5049 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5050 base
= XEXP (addr
, 1);
5052 /* If this is a constant pool reference, we can fold it into its
5053 constant to allow better value tracking. */
5054 if (base
&& GET_CODE (base
) == SYMBOL_REF
5055 && CONSTANT_POOL_ADDRESS_P (base
))
5057 rtx constant
= get_pool_constant (base
);
5058 enum machine_mode const_mode
= get_pool_mode (base
);
5061 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5062 constant_pool_entries_cost
= COST (constant
);
5064 /* If we are loading the full constant, we have an equivalence. */
5065 if (offset
== 0 && mode
== const_mode
)
5068 /* If this actually isn't a constant (weird!), we can't do
5069 anything. Otherwise, handle the two most common cases:
5070 extracting a word from a multi-word constant, and extracting
5071 the low-order bits. Other cases don't seem common enough to
5073 if (! CONSTANT_P (constant
))
5076 if (GET_MODE_CLASS (mode
) == MODE_INT
5077 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5078 && offset
% UNITS_PER_WORD
== 0
5079 && (new = operand_subword (constant
,
5080 offset
/ UNITS_PER_WORD
,
5081 0, const_mode
)) != 0)
5084 if (((BYTES_BIG_ENDIAN
5085 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5086 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5087 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5091 /* If this is a reference to a label at a known position in a jump
5092 table, we also know its value. */
5093 if (base
&& GET_CODE (base
) == LABEL_REF
)
5095 rtx label
= XEXP (base
, 0);
5096 rtx table_insn
= NEXT_INSN (label
);
5098 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5099 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5101 rtx table
= PATTERN (table_insn
);
5104 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5105 < XVECLEN (table
, 0)))
5106 return XVECEXP (table
, 0,
5107 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5109 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5110 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5112 rtx table
= PATTERN (table_insn
);
5115 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5116 < XVECLEN (table
, 1)))
5118 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5119 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
5122 if (GET_MODE (table
) != Pmode
)
5123 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
5125 /* Indicate this is a constant. This isn't a
5126 valid form of CONST, but it will only be used
5127 to fold the next insns and then discarded, so
5128 it should be safe. */
5129 return gen_rtx (CONST
, GET_MODE (new), new);
5141 mode_arg0
= VOIDmode
;
5143 /* Try folding our operands.
5144 Then see which ones have constant values known. */
5146 fmt
= GET_RTX_FORMAT (code
);
5147 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5150 rtx arg
= XEXP (x
, i
);
5151 rtx folded_arg
= arg
, const_arg
= 0;
5152 enum machine_mode mode_arg
= GET_MODE (arg
);
5153 rtx cheap_arg
, expensive_arg
;
5154 rtx replacements
[2];
5157 /* Most arguments are cheap, so handle them specially. */
5158 switch (GET_CODE (arg
))
5161 /* This is the same as calling equiv_constant; it is duplicated
5163 if (REGNO_QTY_VALID_P (REGNO (arg
))
5164 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5165 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5166 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5168 = gen_lowpart_if_possible (GET_MODE (arg
),
5169 qty_const
[reg_qty
[REGNO (arg
)]]);
5182 folded_arg
= prev_insn_cc0
;
5183 mode_arg
= prev_insn_cc0_mode
;
5184 const_arg
= equiv_constant (folded_arg
);
5189 folded_arg
= fold_rtx (arg
, insn
);
5190 const_arg
= equiv_constant (folded_arg
);
5193 /* For the first three operands, see if the operand
5194 is constant or equivalent to a constant. */
5198 folded_arg0
= folded_arg
;
5199 const_arg0
= const_arg
;
5200 mode_arg0
= mode_arg
;
5203 folded_arg1
= folded_arg
;
5204 const_arg1
= const_arg
;
5207 const_arg2
= const_arg
;
5211 /* Pick the least expensive of the folded argument and an
5212 equivalent constant argument. */
5213 if (const_arg
== 0 || const_arg
== folded_arg
5214 || COST (const_arg
) > COST (folded_arg
))
5215 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5217 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5219 /* Try to replace the operand with the cheapest of the two
5220 possibilities. If it doesn't work and this is either of the first
5221 two operands of a commutative operation, try swapping them.
5222 If THAT fails, try the more expensive, provided it is cheaper
5223 than what is already there. */
5225 if (cheap_arg
== XEXP (x
, i
))
5228 if (insn
== 0 && ! copied
)
5234 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5236 j
< 2 && replacements
[j
]
5237 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5240 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5243 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5245 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5246 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5248 if (apply_change_group ())
5250 /* Swap them back to be invalid so that this loop can
5251 continue and flag them to be swapped back later. */
5254 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5263 else if (fmt
[i
] == 'E')
5264 /* Don't try to fold inside of a vector of expressions.
5265 Doing nothing is harmless. */
5268 /* If a commutative operation, place a constant integer as the second
5269 operand unless the first operand is also a constant integer. Otherwise,
5270 place any constant second unless the first operand is also a constant. */
5272 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5274 if (must_swap
|| (const_arg0
5276 || (GET_CODE (const_arg0
) == CONST_INT
5277 && GET_CODE (const_arg1
) != CONST_INT
))))
5279 register rtx tem
= XEXP (x
, 0);
5281 if (insn
== 0 && ! copied
)
5287 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5288 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5289 if (apply_change_group ())
5291 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5292 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5297 /* If X is an arithmetic operation, see if we can simplify it. */
5299 switch (GET_RTX_CLASS (code
))
5305 /* We can't simplify extension ops unless we know the
5307 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5308 && mode_arg0
== VOIDmode
)
5311 /* If we had a CONST, strip it off and put it back later if we
5313 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5314 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5316 new = simplify_unary_operation (code
, mode
,
5317 const_arg0
? const_arg0
: folded_arg0
,
5319 if (new != 0 && is_const
)
5320 new = gen_rtx (CONST
, mode
, new);
5325 /* See what items are actually being compared and set FOLDED_ARG[01]
5326 to those values and CODE to the actual comparison code. If any are
5327 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5328 do anything if both operands are already known to be constant. */
5330 if (const_arg0
== 0 || const_arg1
== 0)
5332 struct table_elt
*p0
, *p1
;
5333 rtx
true = const_true_rtx
, false = const0_rtx
;
5334 enum machine_mode mode_arg1
;
5336 #ifdef FLOAT_STORE_FLAG_VALUE
5337 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5339 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5341 false = CONST0_RTX (mode
);
5345 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5346 &mode_arg0
, &mode_arg1
);
5347 const_arg0
= equiv_constant (folded_arg0
);
5348 const_arg1
= equiv_constant (folded_arg1
);
5350 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5351 what kinds of things are being compared, so we can't do
5352 anything with this comparison. */
5354 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5357 /* If we do not now have two constants being compared, see if we
5358 can nevertheless deduce some things about the comparison. */
5359 if (const_arg0
== 0 || const_arg1
== 0)
5361 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5362 constant? These aren't zero, but we don't know their sign. */
5363 if (const_arg1
== const0_rtx
5364 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5365 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5367 || GET_CODE (folded_arg0
) == SYMBOL_REF
5369 || GET_CODE (folded_arg0
) == LABEL_REF
5370 || GET_CODE (folded_arg0
) == CONST
))
5374 else if (code
== NE
)
5378 /* See if the two operands are the same. We don't do this
5379 for IEEE floating-point since we can't assume x == x
5380 since x might be a NaN. */
5382 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5383 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5384 && (folded_arg0
== folded_arg1
5385 || (GET_CODE (folded_arg0
) == REG
5386 && GET_CODE (folded_arg1
) == REG
5387 && (reg_qty
[REGNO (folded_arg0
)]
5388 == reg_qty
[REGNO (folded_arg1
)]))
5389 || ((p0
= lookup (folded_arg0
,
5390 (safe_hash (folded_arg0
, mode_arg0
)
5391 % NBUCKETS
), mode_arg0
))
5392 && (p1
= lookup (folded_arg1
,
5393 (safe_hash (folded_arg1
, mode_arg0
)
5394 % NBUCKETS
), mode_arg0
))
5395 && p0
->first_same_value
== p1
->first_same_value
)))
5396 return ((code
== EQ
|| code
== LE
|| code
== GE
5397 || code
== LEU
|| code
== GEU
)
5400 /* If FOLDED_ARG0 is a register, see if the comparison we are
5401 doing now is either the same as we did before or the reverse
5402 (we only check the reverse if not floating-point). */
5403 else if (GET_CODE (folded_arg0
) == REG
)
5405 int qty
= reg_qty
[REGNO (folded_arg0
)];
5407 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5408 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5409 || (comparison_dominates_p (qty_comparison_code
[qty
],
5410 reverse_condition (code
))
5411 && ! FLOAT_MODE_P (mode_arg0
)))
5412 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5414 && rtx_equal_p (qty_comparison_const
[qty
],
5416 || (GET_CODE (folded_arg1
) == REG
5417 && (reg_qty
[REGNO (folded_arg1
)]
5418 == qty_comparison_qty
[qty
]))))
5419 return (comparison_dominates_p (qty_comparison_code
[qty
],
5426 /* If we are comparing against zero, see if the first operand is
5427 equivalent to an IOR with a constant. If so, we may be able to
5428 determine the result of this comparison. */
5430 if (const_arg1
== const0_rtx
)
5432 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5436 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5437 && GET_CODE (inner_const
) == CONST_INT
5438 && INTVAL (inner_const
) != 0)
5440 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5441 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5442 && (INTVAL (inner_const
)
5443 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5444 rtx
true = const_true_rtx
, false = const0_rtx
;
5446 #ifdef FLOAT_STORE_FLAG_VALUE
5447 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5449 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5451 false = CONST0_RTX (mode
);
5473 new = simplify_relational_operation (code
, mode_arg0
,
5474 const_arg0
? const_arg0
: folded_arg0
,
5475 const_arg1
? const_arg1
: folded_arg1
);
5476 #ifdef FLOAT_STORE_FLAG_VALUE
5477 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5478 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5479 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5488 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5489 with that LABEL_REF as its second operand. If so, the result is
5490 the first operand of that MINUS. This handles switches with an
5491 ADDR_DIFF_VEC table. */
5492 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5495 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5496 : lookup_as_function (folded_arg0
, MINUS
);
5498 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5499 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5502 /* Now try for a CONST of a MINUS like the above. */
5503 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5504 : lookup_as_function (folded_arg0
, CONST
))) != 0
5505 && GET_CODE (XEXP (y
, 0)) == MINUS
5506 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5507 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5508 return XEXP (XEXP (y
, 0), 0);
5511 /* Likewise if the operands are in the other order. */
5512 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5515 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5516 : lookup_as_function (folded_arg1
, MINUS
);
5518 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5519 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5522 /* Now try for a CONST of a MINUS like the above. */
5523 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5524 : lookup_as_function (folded_arg1
, CONST
))) != 0
5525 && GET_CODE (XEXP (y
, 0)) == MINUS
5526 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5527 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5528 return XEXP (XEXP (y
, 0), 0);
5531 /* If second operand is a register equivalent to a negative
5532 CONST_INT, see if we can find a register equivalent to the
5533 positive constant. Make a MINUS if so. Don't do this for
5534 a negative constant since we might then alternate between
5535 chosing positive and negative constants. Having the positive
5536 constant previously-used is the more common case. */
5537 if (const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
5538 && INTVAL (const_arg1
) < 0 && GET_CODE (folded_arg1
) == REG
)
5540 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5542 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5546 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5547 if (GET_CODE (p
->exp
) == REG
)
5548 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5549 canon_reg (p
->exp
, NULL_RTX
));
5554 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5555 If so, produce (PLUS Z C2-C). */
5556 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5558 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5559 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5560 return fold_rtx (plus_constant (copy_rtx (y
),
5561 -INTVAL (const_arg1
)),
5565 /* ... fall through ... */
5568 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5569 case IOR
: case AND
: case XOR
:
5570 case MULT
: case DIV
: case UDIV
:
5571 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5572 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5573 is known to be of similar form, we may be able to replace the
5574 operation with a combined operation. This may eliminate the
5575 intermediate operation if every use is simplified in this way.
5576 Note that the similar optimization done by combine.c only works
5577 if the intermediate operation's result has only one reference. */
5579 if (GET_CODE (folded_arg0
) == REG
5580 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5583 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5584 rtx y
= lookup_as_function (folded_arg0
, code
);
5586 enum rtx_code associate_code
;
5590 || 0 == (inner_const
5591 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5592 || GET_CODE (inner_const
) != CONST_INT
5593 /* If we have compiled a statement like
5594 "if (x == (x & mask1))", and now are looking at
5595 "x & mask2", we will have a case where the first operand
5596 of Y is the same as our first operand. Unless we detect
5597 this case, an infinite loop will result. */
5598 || XEXP (y
, 0) == folded_arg0
)
5601 /* Don't associate these operations if they are a PLUS with the
5602 same constant and it is a power of two. These might be doable
5603 with a pre- or post-increment. Similarly for two subtracts of
5604 identical powers of two with post decrement. */
5606 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5608 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5609 || exact_log2 (INTVAL (const_arg1
)) >= 0
5611 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5612 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5617 /* Compute the code used to compose the constants. For example,
5618 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5621 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5622 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5624 new_const
= simplify_binary_operation (associate_code
, mode
,
5625 const_arg1
, inner_const
);
5630 /* If we are associating shift operations, don't let this
5631 produce a shift of the size of the object or larger.
5632 This could occur when we follow a sign-extend by a right
5633 shift on a machine that does a sign-extend as a pair
5636 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5637 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5639 /* As an exception, we can turn an ASHIFTRT of this
5640 form into a shift of the number of bits - 1. */
5641 if (code
== ASHIFTRT
)
5642 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5647 y
= copy_rtx (XEXP (y
, 0));
5649 /* If Y contains our first operand (the most common way this
5650 can happen is if Y is a MEM), we would do into an infinite
5651 loop if we tried to fold it. So don't in that case. */
5653 if (! reg_mentioned_p (folded_arg0
, y
))
5654 y
= fold_rtx (y
, insn
);
5656 return cse_gen_binary (code
, mode
, y
, new_const
);
5660 new = simplify_binary_operation (code
, mode
,
5661 const_arg0
? const_arg0
: folded_arg0
,
5662 const_arg1
? const_arg1
: folded_arg1
);
5666 /* (lo_sum (high X) X) is simply X. */
5667 if (code
== LO_SUM
&& const_arg0
!= 0
5668 && GET_CODE (const_arg0
) == HIGH
5669 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5675 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5676 const_arg0
? const_arg0
: folded_arg0
,
5677 const_arg1
? const_arg1
: folded_arg1
,
5678 const_arg2
? const_arg2
: XEXP (x
, 2));
5682 return new ? new : x
;
5685 /* Return a constant value currently equivalent to X.
5686 Return 0 if we don't know one. */
5692 if (GET_CODE (x
) == REG
5693 && REGNO_QTY_VALID_P (REGNO (x
))
5694 && qty_const
[reg_qty
[REGNO (x
)]])
5695 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5697 if (x
!= 0 && CONSTANT_P (x
))
5700 /* If X is a MEM, try to fold it outside the context of any insn to see if
5701 it might be equivalent to a constant. That handles the case where it
5702 is a constant-pool reference. Then try to look it up in the hash table
5703 in case it is something whose value we have seen before. */
5705 if (GET_CODE (x
) == MEM
)
5707 struct table_elt
*elt
;
5709 x
= fold_rtx (x
, NULL_RTX
);
5713 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5717 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5718 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5725 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5726 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5727 least-significant part of X.
5728 MODE specifies how big a part of X to return.
5730 If the requested operation cannot be done, 0 is returned.
5732 This is similar to gen_lowpart in emit-rtl.c. */
5735 gen_lowpart_if_possible (mode
, x
)
5736 enum machine_mode mode
;
5739 rtx result
= gen_lowpart_common (mode
, x
);
5743 else if (GET_CODE (x
) == MEM
)
5745 /* This is the only other case we handle. */
5746 register int offset
= 0;
5749 if (WORDS_BIG_ENDIAN
)
5750 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5751 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5752 if (BYTES_BIG_ENDIAN
)
5753 /* Adjust the address so that the address-after-the-data is
5755 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5756 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5757 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5758 if (! memory_address_p (mode
, XEXP (new, 0)))
5760 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5761 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5762 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5769 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5770 branch. It will be zero if not.
5772 In certain cases, this can cause us to add an equivalence. For example,
5773 if we are following the taken case of
5775 we can add the fact that `i' and '2' are now equivalent.
5777 In any case, we can record that this comparison was passed. If the same
5778 comparison is seen later, we will know its value. */
5781 record_jump_equiv (insn
, taken
)
5785 int cond_known_true
;
5787 enum machine_mode mode
, mode0
, mode1
;
5788 int reversed_nonequality
= 0;
5791 /* Ensure this is the right kind of insn. */
5792 if (! condjump_p (insn
) || simplejump_p (insn
))
5795 /* See if this jump condition is known true or false. */
5797 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5799 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5801 /* Get the type of comparison being done and the operands being compared.
5802 If we had to reverse a non-equality condition, record that fact so we
5803 know that it isn't valid for floating-point. */
5804 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5805 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5806 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5808 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5809 if (! cond_known_true
)
5811 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5812 code
= reverse_condition (code
);
5815 /* The mode is the mode of the non-constant. */
5817 if (mode1
!= VOIDmode
)
5820 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5823 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5824 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5825 Make any useful entries we can with that information. Called from
5826 above function and called recursively. */
5829 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5831 enum machine_mode mode
;
5833 int reversed_nonequality
;
5835 unsigned op0_hash
, op1_hash
;
5836 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5837 struct table_elt
*op0_elt
, *op1_elt
;
5839 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5840 we know that they are also equal in the smaller mode (this is also
5841 true for all smaller modes whether or not there is a SUBREG, but
5842 is not worth testing for with no SUBREG. */
5844 /* Note that GET_MODE (op0) may not equal MODE. */
5845 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5846 && (GET_MODE_SIZE (GET_MODE (op0
))
5847 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5849 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5850 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5852 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5853 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5854 reversed_nonequality
);
5857 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5858 && (GET_MODE_SIZE (GET_MODE (op1
))
5859 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5861 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5862 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5864 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5865 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5866 reversed_nonequality
);
5869 /* Similarly, if this is an NE comparison, and either is a SUBREG
5870 making a smaller mode, we know the whole thing is also NE. */
5872 /* Note that GET_MODE (op0) may not equal MODE;
5873 if we test MODE instead, we can get an infinite recursion
5874 alternating between two modes each wider than MODE. */
5876 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5877 && subreg_lowpart_p (op0
)
5878 && (GET_MODE_SIZE (GET_MODE (op0
))
5879 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5881 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5882 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5884 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5885 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5886 reversed_nonequality
);
5889 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5890 && subreg_lowpart_p (op1
)
5891 && (GET_MODE_SIZE (GET_MODE (op1
))
5892 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5894 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5895 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5897 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5898 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5899 reversed_nonequality
);
5902 /* Hash both operands. */
5905 hash_arg_in_memory
= 0;
5906 hash_arg_in_struct
= 0;
5907 op0_hash
= HASH (op0
, mode
);
5908 op0_in_memory
= hash_arg_in_memory
;
5909 op0_in_struct
= hash_arg_in_struct
;
5915 hash_arg_in_memory
= 0;
5916 hash_arg_in_struct
= 0;
5917 op1_hash
= HASH (op1
, mode
);
5918 op1_in_memory
= hash_arg_in_memory
;
5919 op1_in_struct
= hash_arg_in_struct
;
5924 /* Look up both operands. */
5925 op0_elt
= lookup (op0
, op0_hash
, mode
);
5926 op1_elt
= lookup (op1
, op1_hash
, mode
);
5928 /* If both operands are already equivalent or if they are not in the
5929 table but are identical, do nothing. */
5930 if ((op0_elt
!= 0 && op1_elt
!= 0
5931 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
5932 || op0
== op1
|| rtx_equal_p (op0
, op1
))
5935 /* If we aren't setting two things equal all we can do is save this
5936 comparison. Similarly if this is floating-point. In the latter
5937 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5938 If we record the equality, we might inadvertently delete code
5939 whose intent was to change -0 to +0. */
5941 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5943 /* If we reversed a floating-point comparison, if OP0 is not a
5944 register, or if OP1 is neither a register or constant, we can't
5947 if (GET_CODE (op1
) != REG
)
5948 op1
= equiv_constant (op1
);
5950 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5951 || GET_CODE (op0
) != REG
|| op1
== 0)
5954 /* Put OP0 in the hash table if it isn't already. This gives it a
5955 new quantity number. */
5958 if (insert_regs (op0
, NULL_PTR
, 0))
5960 rehash_using_reg (op0
);
5961 op0_hash
= HASH (op0
, mode
);
5963 /* If OP0 is contained in OP1, this changes its hash code
5964 as well. Faster to rehash than to check, except
5965 for the simple case of a constant. */
5966 if (! CONSTANT_P (op1
))
5967 op1_hash
= HASH (op1
,mode
);
5970 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5971 op0_elt
->in_memory
= op0_in_memory
;
5972 op0_elt
->in_struct
= op0_in_struct
;
5975 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5976 if (GET_CODE (op1
) == REG
)
5978 /* Look it up again--in case op0 and op1 are the same. */
5979 op1_elt
= lookup (op1
, op1_hash
, mode
);
5981 /* Put OP1 in the hash table so it gets a new quantity number. */
5984 if (insert_regs (op1
, NULL_PTR
, 0))
5986 rehash_using_reg (op1
);
5987 op1_hash
= HASH (op1
, mode
);
5990 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5991 op1_elt
->in_memory
= op1_in_memory
;
5992 op1_elt
->in_struct
= op1_in_struct
;
5995 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5996 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
6000 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
6001 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
6007 /* If either side is still missing an equivalence, make it now,
6008 then merge the equivalences. */
6012 if (insert_regs (op0
, NULL_PTR
, 0))
6014 rehash_using_reg (op0
);
6015 op0_hash
= HASH (op0
, mode
);
6018 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6019 op0_elt
->in_memory
= op0_in_memory
;
6020 op0_elt
->in_struct
= op0_in_struct
;
6025 if (insert_regs (op1
, NULL_PTR
, 0))
6027 rehash_using_reg (op1
);
6028 op1_hash
= HASH (op1
, mode
);
6031 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6032 op1_elt
->in_memory
= op1_in_memory
;
6033 op1_elt
->in_struct
= op1_in_struct
;
6036 merge_equiv_classes (op0_elt
, op1_elt
);
6037 last_jump_equiv_class
= op0_elt
;
6040 /* CSE processing for one instruction.
6041 First simplify sources and addresses of all assignments
6042 in the instruction, using previously-computed equivalents values.
6043 Then install the new sources and destinations in the table
6044 of available values.
6046 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6049 /* Data on one SET contained in the instruction. */
6053 /* The SET rtx itself. */
6055 /* The SET_SRC of the rtx (the original value, if it is changing). */
6057 /* The hash-table element for the SET_SRC of the SET. */
6058 struct table_elt
*src_elt
;
6059 /* Hash value for the SET_SRC. */
6061 /* Hash value for the SET_DEST. */
6063 /* The SET_DEST, with SUBREG, etc., stripped. */
6065 /* Place where the pointer to the INNER_DEST was found. */
6066 rtx
*inner_dest_loc
;
6067 /* Nonzero if the SET_SRC is in memory. */
6069 /* Nonzero if the SET_SRC is in a structure. */
6071 /* Nonzero if the SET_SRC contains something
6072 whose value cannot be predicted and understood. */
6074 /* Original machine mode, in case it becomes a CONST_INT. */
6075 enum machine_mode mode
;
6076 /* A constant equivalent for SET_SRC, if any. */
6078 /* Hash value of constant equivalent for SET_SRC. */
6079 unsigned src_const_hash
;
6080 /* Table entry for constant equivalent for SET_SRC, if any. */
6081 struct table_elt
*src_const_elt
;
6085 cse_insn (insn
, in_libcall_block
)
6087 int in_libcall_block
;
6089 register rtx x
= PATTERN (insn
);
6092 register int n_sets
= 0;
6094 /* Records what this insn does to set CC0. */
6095 rtx this_insn_cc0
= 0;
6096 enum machine_mode this_insn_cc0_mode
;
6097 struct write_data writes_memory
;
6098 static struct write_data init
= {0, 0, 0, 0};
6101 struct table_elt
*src_eqv_elt
= 0;
6102 int src_eqv_volatile
;
6103 int src_eqv_in_memory
;
6104 int src_eqv_in_struct
;
6105 unsigned src_eqv_hash
;
6110 writes_memory
= init
;
6112 /* Find all the SETs and CLOBBERs in this instruction.
6113 Record all the SETs in the array `set' and count them.
6114 Also determine whether there is a CLOBBER that invalidates
6115 all memory references, or all references at varying addresses. */
6117 if (GET_CODE (insn
) == CALL_INSN
)
6119 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6120 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6121 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6124 if (GET_CODE (x
) == SET
)
6126 sets
= (struct set
*) alloca (sizeof (struct set
));
6129 /* Ignore SETs that are unconditional jumps.
6130 They never need cse processing, so this does not hurt.
6131 The reason is not efficiency but rather
6132 so that we can test at the end for instructions
6133 that have been simplified to unconditional jumps
6134 and not be misled by unchanged instructions
6135 that were unconditional jumps to begin with. */
6136 if (SET_DEST (x
) == pc_rtx
6137 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6140 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6141 The hard function value register is used only once, to copy to
6142 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6143 Ensure we invalidate the destination register. On the 80386 no
6144 other code would invalidate it since it is a fixed_reg.
6145 We need not check the return of apply_change_group; see canon_reg. */
6147 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6149 canon_reg (SET_SRC (x
), insn
);
6150 apply_change_group ();
6151 fold_rtx (SET_SRC (x
), insn
);
6152 invalidate (SET_DEST (x
), VOIDmode
);
6157 else if (GET_CODE (x
) == PARALLEL
)
6159 register int lim
= XVECLEN (x
, 0);
6161 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6163 /* Find all regs explicitly clobbered in this insn,
6164 and ensure they are not replaced with any other regs
6165 elsewhere in this insn.
6166 When a reg that is clobbered is also used for input,
6167 we should presume that that is for a reason,
6168 and we should not substitute some other register
6169 which is not supposed to be clobbered.
6170 Therefore, this loop cannot be merged into the one below
6171 because a CALL may precede a CLOBBER and refer to the
6172 value clobbered. We must not let a canonicalization do
6173 anything in that case. */
6174 for (i
= 0; i
< lim
; i
++)
6176 register rtx y
= XVECEXP (x
, 0, i
);
6177 if (GET_CODE (y
) == CLOBBER
)
6179 rtx clobbered
= XEXP (y
, 0);
6181 if (GET_CODE (clobbered
) == REG
6182 || GET_CODE (clobbered
) == SUBREG
)
6183 invalidate (clobbered
, VOIDmode
);
6184 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6185 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6186 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6190 for (i
= 0; i
< lim
; i
++)
6192 register rtx y
= XVECEXP (x
, 0, i
);
6193 if (GET_CODE (y
) == SET
)
6195 /* As above, we ignore unconditional jumps and call-insns and
6196 ignore the result of apply_change_group. */
6197 if (GET_CODE (SET_SRC (y
)) == CALL
)
6199 canon_reg (SET_SRC (y
), insn
);
6200 apply_change_group ();
6201 fold_rtx (SET_SRC (y
), insn
);
6202 invalidate (SET_DEST (y
), VOIDmode
);
6204 else if (SET_DEST (y
) == pc_rtx
6205 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6208 sets
[n_sets
++].rtl
= y
;
6210 else if (GET_CODE (y
) == CLOBBER
)
6212 /* If we clobber memory, take note of that,
6213 and canon the address.
6214 This does nothing when a register is clobbered
6215 because we have already invalidated the reg. */
6216 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6218 canon_reg (XEXP (y
, 0), NULL_RTX
);
6219 note_mem_written (XEXP (y
, 0), &writes_memory
);
6222 else if (GET_CODE (y
) == USE
6223 && ! (GET_CODE (XEXP (y
, 0)) == REG
6224 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6225 canon_reg (y
, NULL_RTX
);
6226 else if (GET_CODE (y
) == CALL
)
6228 /* The result of apply_change_group can be ignored; see
6230 canon_reg (y
, insn
);
6231 apply_change_group ();
6236 else if (GET_CODE (x
) == CLOBBER
)
6238 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6240 canon_reg (XEXP (x
, 0), NULL_RTX
);
6241 note_mem_written (XEXP (x
, 0), &writes_memory
);
6245 /* Canonicalize a USE of a pseudo register or memory location. */
6246 else if (GET_CODE (x
) == USE
6247 && ! (GET_CODE (XEXP (x
, 0)) == REG
6248 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6249 canon_reg (XEXP (x
, 0), NULL_RTX
);
6250 else if (GET_CODE (x
) == CALL
)
6252 /* The result of apply_change_group can be ignored; see canon_reg. */
6253 canon_reg (x
, insn
);
6254 apply_change_group ();
6258 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6259 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6260 is handled specially for this case, and if it isn't set, then there will
6261 be no equivalence for the destination. */
6262 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6263 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6264 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6265 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6266 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6268 /* Canonicalize sources and addresses of destinations.
6269 We do this in a separate pass to avoid problems when a MATCH_DUP is
6270 present in the insn pattern. In that case, we want to ensure that
6271 we don't break the duplicate nature of the pattern. So we will replace
6272 both operands at the same time. Otherwise, we would fail to find an
6273 equivalent substitution in the loop calling validate_change below.
6275 We used to suppress canonicalization of DEST if it appears in SRC,
6276 but we don't do this any more. */
6278 for (i
= 0; i
< n_sets
; i
++)
6280 rtx dest
= SET_DEST (sets
[i
].rtl
);
6281 rtx src
= SET_SRC (sets
[i
].rtl
);
6282 rtx
new = canon_reg (src
, insn
);
6284 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6285 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6286 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6287 || insn_n_dups
[recog_memoized (insn
)] > 0)
6288 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6290 SET_SRC (sets
[i
].rtl
) = new;
6292 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6294 validate_change (insn
, &XEXP (dest
, 1),
6295 canon_reg (XEXP (dest
, 1), insn
), 1);
6296 validate_change (insn
, &XEXP (dest
, 2),
6297 canon_reg (XEXP (dest
, 2), insn
), 1);
6300 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6301 || GET_CODE (dest
) == ZERO_EXTRACT
6302 || GET_CODE (dest
) == SIGN_EXTRACT
)
6303 dest
= XEXP (dest
, 0);
6305 if (GET_CODE (dest
) == MEM
)
6306 canon_reg (dest
, insn
);
6309 /* Now that we have done all the replacements, we can apply the change
6310 group and see if they all work. Note that this will cause some
6311 canonicalizations that would have worked individually not to be applied
6312 because some other canonicalization didn't work, but this should not
6315 The result of apply_change_group can be ignored; see canon_reg. */
6317 apply_change_group ();
6319 /* Set sets[i].src_elt to the class each source belongs to.
6320 Detect assignments from or to volatile things
6321 and set set[i] to zero so they will be ignored
6322 in the rest of this function.
6324 Nothing in this loop changes the hash table or the register chains. */
6326 for (i
= 0; i
< n_sets
; i
++)
6328 register rtx src
, dest
;
6329 register rtx src_folded
;
6330 register struct table_elt
*elt
= 0, *p
;
6331 enum machine_mode mode
;
6334 rtx src_related
= 0;
6335 struct table_elt
*src_const_elt
= 0;
6336 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6337 int src_related_cost
= 10000, src_elt_cost
= 10000;
6338 /* Set non-zero if we need to call force_const_mem on with the
6339 contents of src_folded before using it. */
6340 int src_folded_force_flag
= 0;
6342 dest
= SET_DEST (sets
[i
].rtl
);
6343 src
= SET_SRC (sets
[i
].rtl
);
6345 /* If SRC is a constant that has no machine mode,
6346 hash it with the destination's machine mode.
6347 This way we can keep different modes separate. */
6349 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6350 sets
[i
].mode
= mode
;
6354 enum machine_mode eqvmode
= mode
;
6355 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6356 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6358 hash_arg_in_memory
= 0;
6359 hash_arg_in_struct
= 0;
6360 src_eqv
= fold_rtx (src_eqv
, insn
);
6361 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6363 /* Find the equivalence class for the equivalent expression. */
6366 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6368 src_eqv_volatile
= do_not_record
;
6369 src_eqv_in_memory
= hash_arg_in_memory
;
6370 src_eqv_in_struct
= hash_arg_in_struct
;
6373 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6374 value of the INNER register, not the destination. So it is not
6375 a valid substitution for the source. But save it for later. */
6376 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6379 src_eqv_here
= src_eqv
;
6381 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6382 simplified result, which may not necessarily be valid. */
6383 src_folded
= fold_rtx (src
, insn
);
6386 /* ??? This caused bad code to be generated for the m68k port with -O2.
6387 Suppose src is (CONST_INT -1), and that after truncation src_folded
6388 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6389 At the end we will add src and src_const to the same equivalence
6390 class. We now have 3 and -1 on the same equivalence class. This
6391 causes later instructions to be mis-optimized. */
6392 /* If storing a constant in a bitfield, pre-truncate the constant
6393 so we will be able to record it later. */
6394 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6395 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6397 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6399 if (GET_CODE (src
) == CONST_INT
6400 && GET_CODE (width
) == CONST_INT
6401 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6402 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6404 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6405 << INTVAL (width
)) - 1));
6409 /* Compute SRC's hash code, and also notice if it
6410 should not be recorded at all. In that case,
6411 prevent any further processing of this assignment. */
6413 hash_arg_in_memory
= 0;
6414 hash_arg_in_struct
= 0;
6417 sets
[i
].src_hash
= HASH (src
, mode
);
6418 sets
[i
].src_volatile
= do_not_record
;
6419 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6420 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6423 /* It is no longer clear why we used to do this, but it doesn't
6424 appear to still be needed. So let's try without it since this
6425 code hurts cse'ing widened ops. */
6426 /* If source is a perverse subreg (such as QI treated as an SI),
6427 treat it as volatile. It may do the work of an SI in one context
6428 where the extra bits are not being used, but cannot replace an SI
6430 if (GET_CODE (src
) == SUBREG
6431 && (GET_MODE_SIZE (GET_MODE (src
))
6432 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6433 sets
[i
].src_volatile
= 1;
6436 /* Locate all possible equivalent forms for SRC. Try to replace
6437 SRC in the insn with each cheaper equivalent.
6439 We have the following types of equivalents: SRC itself, a folded
6440 version, a value given in a REG_EQUAL note, or a value related
6443 Each of these equivalents may be part of an additional class
6444 of equivalents (if more than one is in the table, they must be in
6445 the same class; we check for this).
6447 If the source is volatile, we don't do any table lookups.
6449 We note any constant equivalent for possible later use in a
6452 if (!sets
[i
].src_volatile
)
6453 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6455 sets
[i
].src_elt
= elt
;
6457 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6459 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6461 /* The REG_EQUAL is indicating that two formerly distinct
6462 classes are now equivalent. So merge them. */
6463 merge_equiv_classes (elt
, src_eqv_elt
);
6464 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6465 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6471 else if (src_eqv_elt
)
6474 /* Try to find a constant somewhere and record it in `src_const'.
6475 Record its table element, if any, in `src_const_elt'. Look in
6476 any known equivalences first. (If the constant is not in the
6477 table, also set `sets[i].src_const_hash'). */
6479 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6483 src_const_elt
= elt
;
6488 && (CONSTANT_P (src_folded
)
6489 /* Consider (minus (label_ref L1) (label_ref L2)) as
6490 "constant" here so we will record it. This allows us
6491 to fold switch statements when an ADDR_DIFF_VEC is used. */
6492 || (GET_CODE (src_folded
) == MINUS
6493 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6494 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6495 src_const
= src_folded
, src_const_elt
= elt
;
6496 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6497 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6499 /* If we don't know if the constant is in the table, get its
6500 hash code and look it up. */
6501 if (src_const
&& src_const_elt
== 0)
6503 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6504 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6507 sets
[i
].src_const
= src_const
;
6508 sets
[i
].src_const_elt
= src_const_elt
;
6510 /* If the constant and our source are both in the table, mark them as
6511 equivalent. Otherwise, if a constant is in the table but the source
6512 isn't, set ELT to it. */
6513 if (src_const_elt
&& elt
6514 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6515 merge_equiv_classes (elt
, src_const_elt
);
6516 else if (src_const_elt
&& elt
== 0)
6517 elt
= src_const_elt
;
6519 /* See if there is a register linearly related to a constant
6520 equivalent of SRC. */
6522 && (GET_CODE (src_const
) == CONST
6523 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6525 src_related
= use_related_value (src_const
, src_const_elt
);
6528 struct table_elt
*src_related_elt
6529 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6530 if (src_related_elt
&& elt
)
6532 if (elt
->first_same_value
6533 != src_related_elt
->first_same_value
)
6534 /* This can occur when we previously saw a CONST
6535 involving a SYMBOL_REF and then see the SYMBOL_REF
6536 twice. Merge the involved classes. */
6537 merge_equiv_classes (elt
, src_related_elt
);
6540 src_related_elt
= 0;
6542 else if (src_related_elt
&& elt
== 0)
6543 elt
= src_related_elt
;
6547 /* See if we have a CONST_INT that is already in a register in a
6550 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6551 && GET_MODE_CLASS (mode
) == MODE_INT
6552 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6554 enum machine_mode wider_mode
;
6556 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6557 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6558 && src_related
== 0;
6559 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6561 struct table_elt
*const_elt
6562 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6567 for (const_elt
= const_elt
->first_same_value
;
6568 const_elt
; const_elt
= const_elt
->next_same_value
)
6569 if (GET_CODE (const_elt
->exp
) == REG
)
6571 src_related
= gen_lowpart_if_possible (mode
,
6578 /* Another possibility is that we have an AND with a constant in
6579 a mode narrower than a word. If so, it might have been generated
6580 as part of an "if" which would narrow the AND. If we already
6581 have done the AND in a wider mode, we can use a SUBREG of that
6584 if (flag_expensive_optimizations
&& ! src_related
6585 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6586 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6588 enum machine_mode tmode
;
6589 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6591 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6592 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6593 tmode
= GET_MODE_WIDER_MODE (tmode
))
6595 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6596 struct table_elt
*larger_elt
;
6600 PUT_MODE (new_and
, tmode
);
6601 XEXP (new_and
, 0) = inner
;
6602 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6603 if (larger_elt
== 0)
6606 for (larger_elt
= larger_elt
->first_same_value
;
6607 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6608 if (GET_CODE (larger_elt
->exp
) == REG
)
6611 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6621 #ifdef LOAD_EXTEND_OP
6622 /* See if a MEM has already been loaded with a widening operation;
6623 if it has, we can use a subreg of that. Many CISC machines
6624 also have such operations, but this is only likely to be
6625 beneficial these machines. */
6627 if (flag_expensive_optimizations
&& src_related
== 0
6628 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6629 && GET_MODE_CLASS (mode
) == MODE_INT
6630 && GET_CODE (src
) == MEM
&& ! do_not_record
6631 && LOAD_EXTEND_OP (mode
) != NIL
)
6633 enum machine_mode tmode
;
6635 /* Set what we are trying to extend and the operation it might
6636 have been extended with. */
6637 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6638 XEXP (memory_extend_rtx
, 0) = src
;
6640 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6641 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6642 tmode
= GET_MODE_WIDER_MODE (tmode
))
6644 struct table_elt
*larger_elt
;
6646 PUT_MODE (memory_extend_rtx
, tmode
);
6647 larger_elt
= lookup (memory_extend_rtx
,
6648 HASH (memory_extend_rtx
, tmode
), tmode
);
6649 if (larger_elt
== 0)
6652 for (larger_elt
= larger_elt
->first_same_value
;
6653 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6654 if (GET_CODE (larger_elt
->exp
) == REG
)
6656 src_related
= gen_lowpart_if_possible (mode
,
6665 #endif /* LOAD_EXTEND_OP */
6667 if (src
== src_folded
)
6670 /* At this point, ELT, if non-zero, points to a class of expressions
6671 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6672 and SRC_RELATED, if non-zero, each contain additional equivalent
6673 expressions. Prune these latter expressions by deleting expressions
6674 already in the equivalence class.
6676 Check for an equivalent identical to the destination. If found,
6677 this is the preferred equivalent since it will likely lead to
6678 elimination of the insn. Indicate this by placing it in
6681 if (elt
) elt
= elt
->first_same_value
;
6682 for (p
= elt
; p
; p
= p
->next_same_value
)
6684 enum rtx_code code
= GET_CODE (p
->exp
);
6686 /* If the expression is not valid, ignore it. Then we do not
6687 have to check for validity below. In most cases, we can use
6688 `rtx_equal_p', since canonicalization has already been done. */
6689 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6692 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6694 else if (src_folded
&& GET_CODE (src_folded
) == code
6695 && rtx_equal_p (src_folded
, p
->exp
))
6697 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6698 && rtx_equal_p (src_eqv_here
, p
->exp
))
6700 else if (src_related
&& GET_CODE (src_related
) == code
6701 && rtx_equal_p (src_related
, p
->exp
))
6704 /* This is the same as the destination of the insns, we want
6705 to prefer it. Copy it to src_related. The code below will
6706 then give it a negative cost. */
6707 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6712 /* Find the cheapest valid equivalent, trying all the available
6713 possibilities. Prefer items not in the hash table to ones
6714 that are when they are equal cost. Note that we can never
6715 worsen an insn as the current contents will also succeed.
6716 If we find an equivalent identical to the destination, use it as best,
6717 since this insn will probably be eliminated in that case. */
6720 if (rtx_equal_p (src
, dest
))
6723 src_cost
= COST (src
);
6728 if (rtx_equal_p (src_eqv_here
, dest
))
6731 src_eqv_cost
= COST (src_eqv_here
);
6736 if (rtx_equal_p (src_folded
, dest
))
6737 src_folded_cost
= -1;
6739 src_folded_cost
= COST (src_folded
);
6744 if (rtx_equal_p (src_related
, dest
))
6745 src_related_cost
= -1;
6747 src_related_cost
= COST (src_related
);
6750 /* If this was an indirect jump insn, a known label will really be
6751 cheaper even though it looks more expensive. */
6752 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6753 src_folded
= src_const
, src_folded_cost
= -1;
6755 /* Terminate loop when replacement made. This must terminate since
6756 the current contents will be tested and will always be valid. */
6761 /* Skip invalid entries. */
6762 while (elt
&& GET_CODE (elt
->exp
) != REG
6763 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6764 elt
= elt
->next_same_value
;
6766 if (elt
) src_elt_cost
= elt
->cost
;
6768 /* Find cheapest and skip it for the next time. For items
6769 of equal cost, use this order:
6770 src_folded, src, src_eqv, src_related and hash table entry. */
6771 if (src_folded_cost
<= src_cost
6772 && src_folded_cost
<= src_eqv_cost
6773 && src_folded_cost
<= src_related_cost
6774 && src_folded_cost
<= src_elt_cost
)
6776 trial
= src_folded
, src_folded_cost
= 10000;
6777 if (src_folded_force_flag
)
6778 trial
= force_const_mem (mode
, trial
);
6780 else if (src_cost
<= src_eqv_cost
6781 && src_cost
<= src_related_cost
6782 && src_cost
<= src_elt_cost
)
6783 trial
= src
, src_cost
= 10000;
6784 else if (src_eqv_cost
<= src_related_cost
6785 && src_eqv_cost
<= src_elt_cost
)
6786 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6787 else if (src_related_cost
<= src_elt_cost
)
6788 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6791 trial
= copy_rtx (elt
->exp
);
6792 elt
= elt
->next_same_value
;
6793 src_elt_cost
= 10000;
6796 /* We don't normally have an insn matching (set (pc) (pc)), so
6797 check for this separately here. We will delete such an
6800 Tablejump insns contain a USE of the table, so simply replacing
6801 the operand with the constant won't match. This is simply an
6802 unconditional branch, however, and is therefore valid. Just
6803 insert the substitution here and we will delete and re-emit
6806 if (n_sets
== 1 && dest
== pc_rtx
6808 || (GET_CODE (trial
) == LABEL_REF
6809 && ! condjump_p (insn
))))
6811 /* If TRIAL is a label in front of a jump table, we are
6812 really falling through the switch (this is how casesi
6813 insns work), so we must branch around the table. */
6814 if (GET_CODE (trial
) == CODE_LABEL
6815 && NEXT_INSN (trial
) != 0
6816 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6817 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6818 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6820 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6822 SET_SRC (sets
[i
].rtl
) = trial
;
6823 cse_jumps_altered
= 1;
6827 /* Look for a substitution that makes a valid insn. */
6828 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6830 /* The result of apply_change_group can be ignored; see
6833 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6834 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6836 apply_change_group ();
6840 /* If we previously found constant pool entries for
6841 constants and this is a constant, try making a
6842 pool entry. Put it in src_folded unless we already have done
6843 this since that is where it likely came from. */
6845 else if (constant_pool_entries_cost
6846 && CONSTANT_P (trial
)
6847 && ! (GET_CODE (trial
) == CONST
6848 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
6850 || (GET_CODE (src_folded
) != MEM
6851 && ! src_folded_force_flag
))
6852 && GET_MODE_CLASS (mode
) != MODE_CC
)
6854 src_folded_force_flag
= 1;
6856 src_folded_cost
= constant_pool_entries_cost
;
6860 src
= SET_SRC (sets
[i
].rtl
);
6862 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6863 However, there is an important exception: If both are registers
6864 that are not the head of their equivalence class, replace SET_SRC
6865 with the head of the class. If we do not do this, we will have
6866 both registers live over a portion of the basic block. This way,
6867 their lifetimes will likely abut instead of overlapping. */
6868 if (GET_CODE (dest
) == REG
6869 && REGNO_QTY_VALID_P (REGNO (dest
))
6870 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6871 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6872 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6873 /* Don't do this if the original insn had a hard reg as
6875 && (GET_CODE (sets
[i
].src
) != REG
6876 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6877 /* We can't call canon_reg here because it won't do anything if
6878 SRC is a hard register. */
6880 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6882 src
= SET_SRC (sets
[i
].rtl
)
6883 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6884 : gen_rtx (REG
, GET_MODE (src
), first
);
6886 /* If we had a constant that is cheaper than what we are now
6887 setting SRC to, use that constant. We ignored it when we
6888 thought we could make this into a no-op. */
6889 if (src_const
&& COST (src_const
) < COST (src
)
6890 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6894 /* If we made a change, recompute SRC values. */
6895 if (src
!= sets
[i
].src
)
6898 hash_arg_in_memory
= 0;
6899 hash_arg_in_struct
= 0;
6901 sets
[i
].src_hash
= HASH (src
, mode
);
6902 sets
[i
].src_volatile
= do_not_record
;
6903 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6904 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6905 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6908 /* If this is a single SET, we are setting a register, and we have an
6909 equivalent constant, we want to add a REG_NOTE. We don't want
6910 to write a REG_EQUAL note for a constant pseudo since verifying that
6911 that pseudo hasn't been eliminated is a pain. Such a note also
6912 won't help anything. */
6913 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6914 && GET_CODE (src_const
) != REG
)
6916 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6918 /* Record the actual constant value in a REG_EQUAL note, making
6919 a new one if one does not already exist. */
6921 XEXP (tem
, 0) = src_const
;
6923 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6924 src_const
, REG_NOTES (insn
));
6926 /* If storing a constant value in a register that
6927 previously held the constant value 0,
6928 record this fact with a REG_WAS_0 note on this insn.
6930 Note that the *register* is required to have previously held 0,
6931 not just any register in the quantity and we must point to the
6932 insn that set that register to zero.
6934 Rather than track each register individually, we just see if
6935 the last set for this quantity was for this register. */
6937 if (REGNO_QTY_VALID_P (REGNO (dest
))
6938 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6940 /* See if we previously had a REG_WAS_0 note. */
6941 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6942 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6944 if ((tem
= single_set (const_insn
)) != 0
6945 && rtx_equal_p (SET_DEST (tem
), dest
))
6948 XEXP (note
, 0) = const_insn
;
6950 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6951 const_insn
, REG_NOTES (insn
));
6956 /* Now deal with the destination. */
6958 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6960 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6961 to the MEM or REG within it. */
6962 while (GET_CODE (dest
) == SIGN_EXTRACT
6963 || GET_CODE (dest
) == ZERO_EXTRACT
6964 || GET_CODE (dest
) == SUBREG
6965 || GET_CODE (dest
) == STRICT_LOW_PART
)
6967 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6968 dest
= XEXP (dest
, 0);
6971 sets
[i
].inner_dest
= dest
;
6973 if (GET_CODE (dest
) == MEM
)
6975 dest
= fold_rtx (dest
, insn
);
6977 /* Decide whether we invalidate everything in memory,
6978 or just things at non-fixed places.
6979 Writing a large aggregate must invalidate everything
6980 because we don't know how long it is. */
6981 note_mem_written (dest
, &writes_memory
);
6984 /* Compute the hash code of the destination now,
6985 before the effects of this instruction are recorded,
6986 since the register values used in the address computation
6987 are those before this instruction. */
6988 sets
[i
].dest_hash
= HASH (dest
, mode
);
6990 /* Don't enter a bit-field in the hash table
6991 because the value in it after the store
6992 may not equal what was stored, due to truncation. */
6994 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6995 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6997 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6999 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7000 && GET_CODE (width
) == CONST_INT
7001 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7002 && ! (INTVAL (src_const
)
7003 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7004 /* Exception: if the value is constant,
7005 and it won't be truncated, record it. */
7009 /* This is chosen so that the destination will be invalidated
7010 but no new value will be recorded.
7011 We must invalidate because sometimes constant
7012 values can be recorded for bitfields. */
7013 sets
[i
].src_elt
= 0;
7014 sets
[i
].src_volatile
= 1;
7020 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7022 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7024 PUT_CODE (insn
, NOTE
);
7025 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7026 NOTE_SOURCE_FILE (insn
) = 0;
7027 cse_jumps_altered
= 1;
7028 /* One less use of the label this insn used to jump to. */
7029 --LABEL_NUSES (JUMP_LABEL (insn
));
7030 /* No more processing for this set. */
7034 /* If this SET is now setting PC to a label, we know it used to
7035 be a conditional or computed branch. So we see if we can follow
7036 it. If it was a computed branch, delete it and re-emit. */
7037 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7041 /* If this is not in the format for a simple branch and
7042 we are the only SET in it, re-emit it. */
7043 if (! simplejump_p (insn
) && n_sets
== 1)
7045 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7046 JUMP_LABEL (new) = XEXP (src
, 0);
7047 LABEL_NUSES (XEXP (src
, 0))++;
7052 /* Otherwise, force rerecognition, since it probably had
7053 a different pattern before.
7054 This shouldn't really be necessary, since whatever
7055 changed the source value above should have done this.
7056 Until the right place is found, might as well do this here. */
7057 INSN_CODE (insn
) = -1;
7059 /* Now that we've converted this jump to an unconditional jump,
7060 there is dead code after it. Delete the dead code until we
7061 reach a BARRIER, the end of the function, or a label. Do
7062 not delete NOTEs except for NOTE_INSN_DELETED since later
7063 phases assume these notes are retained. */
7067 while (NEXT_INSN (p
) != 0
7068 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7069 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7071 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7072 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7073 delete_insn (NEXT_INSN (p
));
7078 /* If we don't have a BARRIER immediately after INSN, put one there.
7079 Much code assumes that there are no NOTEs between a JUMP_INSN and
7082 if (NEXT_INSN (insn
) == 0
7083 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7084 emit_barrier_before (NEXT_INSN (insn
));
7086 /* We might have two BARRIERs separated by notes. Delete the second
7089 if (p
!= insn
&& NEXT_INSN (p
) != 0
7090 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7091 delete_insn (NEXT_INSN (p
));
7093 cse_jumps_altered
= 1;
7097 /* If destination is volatile, invalidate it and then do no further
7098 processing for this assignment. */
7100 else if (do_not_record
)
7102 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7103 || GET_CODE (dest
) == MEM
)
7104 invalidate (dest
, VOIDmode
);
7105 else if (GET_CODE (dest
) == STRICT_LOW_PART
7106 || GET_CODE (dest
) == ZERO_EXTRACT
)
7107 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7111 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7112 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7115 /* If setting CC0, record what it was set to, or a constant, if it
7116 is equivalent to a constant. If it is being set to a floating-point
7117 value, make a COMPARE with the appropriate constant of 0. If we
7118 don't do this, later code can interpret this as a test against
7119 const0_rtx, which can cause problems if we try to put it into an
7120 insn as a floating-point operand. */
7121 if (dest
== cc0_rtx
)
7123 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7124 this_insn_cc0_mode
= mode
;
7125 if (FLOAT_MODE_P (mode
))
7126 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
7132 /* Now enter all non-volatile source expressions in the hash table
7133 if they are not already present.
7134 Record their equivalence classes in src_elt.
7135 This way we can insert the corresponding destinations into
7136 the same classes even if the actual sources are no longer in them
7137 (having been invalidated). */
7139 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7140 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7142 register struct table_elt
*elt
;
7143 register struct table_elt
*classp
= sets
[0].src_elt
;
7144 rtx dest
= SET_DEST (sets
[0].rtl
);
7145 enum machine_mode eqvmode
= GET_MODE (dest
);
7147 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7149 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7152 if (insert_regs (src_eqv
, classp
, 0))
7154 rehash_using_reg (src_eqv
);
7155 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7157 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7158 elt
->in_memory
= src_eqv_in_memory
;
7159 elt
->in_struct
= src_eqv_in_struct
;
7162 /* Check to see if src_eqv_elt is the same as a set source which
7163 does not yet have an elt, and if so set the elt of the set source
7165 for (i
= 0; i
< n_sets
; i
++)
7166 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7167 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7168 sets
[i
].src_elt
= src_eqv_elt
;
7171 for (i
= 0; i
< n_sets
; i
++)
7172 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7173 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7175 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7177 /* REG_EQUAL in setting a STRICT_LOW_PART
7178 gives an equivalent for the entire destination register,
7179 not just for the subreg being stored in now.
7180 This is a more interesting equivalence, so we arrange later
7181 to treat the entire reg as the destination. */
7182 sets
[i
].src_elt
= src_eqv_elt
;
7183 sets
[i
].src_hash
= src_eqv_hash
;
7187 /* Insert source and constant equivalent into hash table, if not
7189 register struct table_elt
*classp
= src_eqv_elt
;
7190 register rtx src
= sets
[i
].src
;
7191 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7192 enum machine_mode mode
7193 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7195 if (sets
[i
].src_elt
== 0)
7197 register struct table_elt
*elt
;
7199 /* Note that these insert_regs calls cannot remove
7200 any of the src_elt's, because they would have failed to
7201 match if not still valid. */
7202 if (insert_regs (src
, classp
, 0))
7204 rehash_using_reg (src
);
7205 sets
[i
].src_hash
= HASH (src
, mode
);
7207 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7208 elt
->in_memory
= sets
[i
].src_in_memory
;
7209 elt
->in_struct
= sets
[i
].src_in_struct
;
7210 sets
[i
].src_elt
= classp
= elt
;
7213 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7214 && src
!= sets
[i
].src_const
7215 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7216 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7217 sets
[i
].src_const_hash
, mode
);
7220 else if (sets
[i
].src_elt
== 0)
7221 /* If we did not insert the source into the hash table (e.g., it was
7222 volatile), note the equivalence class for the REG_EQUAL value, if any,
7223 so that the destination goes into that class. */
7224 sets
[i
].src_elt
= src_eqv_elt
;
7226 invalidate_from_clobbers (&writes_memory
, x
);
7228 /* Some registers are invalidated by subroutine calls. Memory is
7229 invalidated by non-constant calls. */
7231 if (GET_CODE (insn
) == CALL_INSN
)
7233 static struct write_data everything
= {0, 1, 1, 1};
7235 if (! CONST_CALL_P (insn
))
7236 invalidate_memory (&everything
);
7237 invalidate_for_call ();
7240 /* Now invalidate everything set by this instruction.
7241 If a SUBREG or other funny destination is being set,
7242 sets[i].rtl is still nonzero, so here we invalidate the reg
7243 a part of which is being set. */
7245 for (i
= 0; i
< n_sets
; i
++)
7248 /* We can't use the inner dest, because the mode associated with
7249 a ZERO_EXTRACT is significant. */
7250 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7252 /* Needed for registers to remove the register from its
7253 previous quantity's chain.
7254 Needed for memory if this is a nonvarying address, unless
7255 we have just done an invalidate_memory that covers even those. */
7256 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7257 || (GET_CODE (dest
) == MEM
&& ! writes_memory
.all
7258 && ! cse_rtx_addr_varies_p (dest
)))
7259 invalidate (dest
, VOIDmode
);
7260 else if (GET_CODE (dest
) == STRICT_LOW_PART
7261 || GET_CODE (dest
) == ZERO_EXTRACT
)
7262 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7265 /* Make sure registers mentioned in destinations
7266 are safe for use in an expression to be inserted.
7267 This removes from the hash table
7268 any invalid entry that refers to one of these registers.
7270 We don't care about the return value from mention_regs because
7271 we are going to hash the SET_DEST values unconditionally. */
7273 for (i
= 0; i
< n_sets
; i
++)
7274 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7275 mention_regs (SET_DEST (sets
[i
].rtl
));
7277 /* We may have just removed some of the src_elt's from the hash table.
7278 So replace each one with the current head of the same class. */
7280 for (i
= 0; i
< n_sets
; i
++)
7283 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7284 /* If elt was removed, find current head of same class,
7285 or 0 if nothing remains of that class. */
7287 register struct table_elt
*elt
= sets
[i
].src_elt
;
7289 while (elt
&& elt
->prev_same_value
)
7290 elt
= elt
->prev_same_value
;
7292 while (elt
&& elt
->first_same_value
== 0)
7293 elt
= elt
->next_same_value
;
7294 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7298 /* Now insert the destinations into their equivalence classes. */
7300 for (i
= 0; i
< n_sets
; i
++)
7303 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7304 register struct table_elt
*elt
;
7306 /* Don't record value if we are not supposed to risk allocating
7307 floating-point values in registers that might be wider than
7309 if ((flag_float_store
7310 && GET_CODE (dest
) == MEM
7311 && FLOAT_MODE_P (GET_MODE (dest
)))
7312 /* Don't record values of destinations set inside a libcall block
7313 since we might delete the libcall. Things should have been set
7314 up so we won't want to reuse such a value, but we play it safe
7317 /* If we didn't put a REG_EQUAL value or a source into the hash
7318 table, there is no point is recording DEST. */
7319 || sets
[i
].src_elt
== 0
7320 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7321 or SIGN_EXTEND, don't record DEST since it can cause
7322 some tracking to be wrong.
7324 ??? Think about this more later. */
7325 || (GET_CODE (dest
) == SUBREG
7326 && (GET_MODE_SIZE (GET_MODE (dest
))
7327 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7328 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7329 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7332 /* STRICT_LOW_PART isn't part of the value BEING set,
7333 and neither is the SUBREG inside it.
7334 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7335 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7336 dest
= SUBREG_REG (XEXP (dest
, 0));
7338 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7339 /* Registers must also be inserted into chains for quantities. */
7340 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7342 /* If `insert_regs' changes something, the hash code must be
7344 rehash_using_reg (dest
);
7345 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7348 elt
= insert (dest
, sets
[i
].src_elt
,
7349 sets
[i
].dest_hash
, GET_MODE (dest
));
7350 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7351 && ! RTX_UNCHANGING_P (sets
[i
].inner_dest
));
7355 /* This implicitly assumes a whole struct
7356 need not have MEM_IN_STRUCT_P.
7357 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7358 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7359 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7362 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7363 narrower than M2, and both M1 and M2 are the same number of words,
7364 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7365 make that equivalence as well.
7367 However, BAR may have equivalences for which gen_lowpart_if_possible
7368 will produce a simpler value than gen_lowpart_if_possible applied to
7369 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7370 BAR's equivalences. If we don't get a simplified form, make
7371 the SUBREG. It will not be used in an equivalence, but will
7372 cause two similar assignments to be detected.
7374 Note the loop below will find SUBREG_REG (DEST) since we have
7375 already entered SRC and DEST of the SET in the table. */
7377 if (GET_CODE (dest
) == SUBREG
7378 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7380 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7381 && (GET_MODE_SIZE (GET_MODE (dest
))
7382 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7383 && sets
[i
].src_elt
!= 0)
7385 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7386 struct table_elt
*elt
, *classp
= 0;
7388 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7389 elt
= elt
->next_same_value
)
7393 struct table_elt
*src_elt
;
7395 /* Ignore invalid entries. */
7396 if (GET_CODE (elt
->exp
) != REG
7397 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7400 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7402 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
7404 src_hash
= HASH (new_src
, new_mode
);
7405 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7407 /* Put the new source in the hash table is if isn't
7411 if (insert_regs (new_src
, classp
, 0))
7413 rehash_using_reg (new_src
);
7414 src_hash
= HASH (new_src
, new_mode
);
7416 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7417 src_elt
->in_memory
= elt
->in_memory
;
7418 src_elt
->in_struct
= elt
->in_struct
;
7420 else if (classp
&& classp
!= src_elt
->first_same_value
)
7421 /* Show that two things that we've seen before are
7422 actually the same. */
7423 merge_equiv_classes (src_elt
, classp
);
7425 classp
= src_elt
->first_same_value
;
7430 /* Special handling for (set REG0 REG1)
7431 where REG0 is the "cheapest", cheaper than REG1.
7432 After cse, REG1 will probably not be used in the sequel,
7433 so (if easily done) change this insn to (set REG1 REG0) and
7434 replace REG1 with REG0 in the previous insn that computed their value.
7435 Then REG1 will become a dead store and won't cloud the situation
7436 for later optimizations.
7438 Do not make this change if REG1 is a hard register, because it will
7439 then be used in the sequel and we may be changing a two-operand insn
7440 into a three-operand insn.
7442 Also do not do this if we are operating on a copy of INSN. */
7444 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7445 && NEXT_INSN (PREV_INSN (insn
)) == insn
7446 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7447 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7448 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7449 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7450 == REGNO (SET_DEST (sets
[0].rtl
))))
7452 rtx prev
= PREV_INSN (insn
);
7453 while (prev
&& GET_CODE (prev
) == NOTE
)
7454 prev
= PREV_INSN (prev
);
7456 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7457 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7459 rtx dest
= SET_DEST (sets
[0].rtl
);
7460 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7462 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7463 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7464 SET_SRC (sets
[0].rtl
), 1);
7465 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7466 apply_change_group ();
7468 /* If REG1 was equivalent to a constant, REG0 is not. */
7470 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7472 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7473 any REG_WAS_0 note on INSN to PREV. */
7474 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7476 remove_note (prev
, note
);
7478 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7481 remove_note (insn
, note
);
7482 XEXP (note
, 1) = REG_NOTES (prev
);
7483 REG_NOTES (prev
) = note
;
7486 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7487 then we must delete it, because the value in REG0 has changed. */
7488 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7489 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7490 remove_note (insn
, note
);
7494 /* If this is a conditional jump insn, record any known equivalences due to
7495 the condition being tested. */
7497 last_jump_equiv_class
= 0;
7498 if (GET_CODE (insn
) == JUMP_INSN
7499 && n_sets
== 1 && GET_CODE (x
) == SET
7500 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7501 record_jump_equiv (insn
, 0);
7504 /* If the previous insn set CC0 and this insn no longer references CC0,
7505 delete the previous insn. Here we use the fact that nothing expects CC0
7506 to be valid over an insn, which is true until the final pass. */
7507 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7508 && (tem
= single_set (prev_insn
)) != 0
7509 && SET_DEST (tem
) == cc0_rtx
7510 && ! reg_mentioned_p (cc0_rtx
, x
))
7512 PUT_CODE (prev_insn
, NOTE
);
7513 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7514 NOTE_SOURCE_FILE (prev_insn
) = 0;
7517 prev_insn_cc0
= this_insn_cc0
;
7518 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7524 /* Store 1 in *WRITES_PTR for those categories of memory ref
7525 that must be invalidated when the expression WRITTEN is stored in.
7526 If WRITTEN is null, say everything must be invalidated. */
7529 note_mem_written (written
, writes_ptr
)
7531 struct write_data
*writes_ptr
;
7533 static struct write_data everything
= {0, 1, 1, 1};
7536 *writes_ptr
= everything
;
7537 else if (GET_CODE (written
) == MEM
)
7539 /* Pushing or popping the stack invalidates just the stack pointer. */
7540 rtx addr
= XEXP (written
, 0);
7541 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7542 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7543 && GET_CODE (XEXP (addr
, 0)) == REG
7544 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7549 else if (GET_MODE (written
) == BLKmode
)
7550 *writes_ptr
= everything
;
7551 /* (mem (scratch)) means clobber everything. */
7552 else if (GET_CODE (addr
) == SCRATCH
)
7553 *writes_ptr
= everything
;
7554 else if (cse_rtx_addr_varies_p (written
))
7556 /* A varying address that is a sum indicates an array element,
7557 and that's just as good as a structure element
7558 in implying that we need not invalidate scalar variables.
7559 However, we must allow QImode aliasing of scalars, because the
7560 ANSI C standard allows character pointers to alias anything. */
7561 if (! ((MEM_IN_STRUCT_P (written
)
7562 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7563 && GET_MODE (written
) != QImode
))
7564 writes_ptr
->all
= 1;
7565 writes_ptr
->nonscalar
= 1;
7567 writes_ptr
->var
= 1;
7571 /* Perform invalidation on the basis of everything about an insn
7572 except for invalidating the actual places that are SET in it.
7573 This includes the places CLOBBERed, and anything that might
7574 alias with something that is SET or CLOBBERed.
7576 W points to the writes_memory for this insn, a struct write_data
7577 saying which kinds of memory references must be invalidated.
7578 X is the pattern of the insn. */
7581 invalidate_from_clobbers (w
, x
)
7582 struct write_data
*w
;
7585 /* If W->var is not set, W specifies no action.
7586 If W->all is set, this step gets all memory refs
7587 so they can be ignored in the rest of this function. */
7589 invalidate_memory (w
);
7593 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7594 reg_tick
[STACK_POINTER_REGNUM
]++;
7596 /* This should be *very* rare. */
7597 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7598 invalidate (stack_pointer_rtx
, VOIDmode
);
7601 if (GET_CODE (x
) == CLOBBER
)
7603 rtx ref
= XEXP (x
, 0);
7606 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7607 || (GET_CODE (ref
) == MEM
&& ! w
->all
))
7608 invalidate (ref
, VOIDmode
);
7609 else if (GET_CODE (ref
) == STRICT_LOW_PART
7610 || GET_CODE (ref
) == ZERO_EXTRACT
)
7611 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7614 else if (GET_CODE (x
) == PARALLEL
)
7617 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7619 register rtx y
= XVECEXP (x
, 0, i
);
7620 if (GET_CODE (y
) == CLOBBER
)
7622 rtx ref
= XEXP (y
, 0);
7625 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7626 || (GET_CODE (ref
) == MEM
&& !w
->all
))
7627 invalidate (ref
, VOIDmode
);
7628 else if (GET_CODE (ref
) == STRICT_LOW_PART
7629 || GET_CODE (ref
) == ZERO_EXTRACT
)
7630 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7637 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7638 and replace any registers in them with either an equivalent constant
7639 or the canonical form of the register. If we are inside an address,
7640 only do this if the address remains valid.
7642 OBJECT is 0 except when within a MEM in which case it is the MEM.
7644 Return the replacement for X. */
7647 cse_process_notes (x
, object
)
7651 enum rtx_code code
= GET_CODE (x
);
7652 char *fmt
= GET_RTX_FORMAT (code
);
7668 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7673 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7674 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7676 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7682 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7683 /* We don't substitute VOIDmode constants into these rtx,
7684 since they would impede folding. */
7685 if (GET_MODE (new) != VOIDmode
)
7686 validate_change (object
, &XEXP (x
, 0), new, 0);
7691 i
= reg_qty
[REGNO (x
)];
7693 /* Return a constant or a constant register. */
7694 if (REGNO_QTY_VALID_P (REGNO (x
))
7695 && qty_const
[i
] != 0
7696 && (CONSTANT_P (qty_const
[i
])
7697 || GET_CODE (qty_const
[i
]) == REG
))
7699 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7704 /* Otherwise, canonicalize this register. */
7705 return canon_reg (x
, NULL_RTX
);
7708 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7710 validate_change (object
, &XEXP (x
, i
),
7711 cse_process_notes (XEXP (x
, i
), object
), 0);
7716 /* Find common subexpressions between the end test of a loop and the beginning
7717 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7719 Often we have a loop where an expression in the exit test is used
7720 in the body of the loop. For example "while (*p) *q++ = *p++;".
7721 Because of the way we duplicate the loop exit test in front of the loop,
7722 however, we don't detect that common subexpression. This will be caught
7723 when global cse is implemented, but this is a quite common case.
7725 This function handles the most common cases of these common expressions.
7726 It is called after we have processed the basic block ending with the
7727 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7728 jumps to a label used only once. */
7731 cse_around_loop (loop_start
)
7736 struct table_elt
*p
;
7738 /* If the jump at the end of the loop doesn't go to the start, we don't
7740 for (insn
= PREV_INSN (loop_start
);
7741 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7742 insn
= PREV_INSN (insn
))
7746 || GET_CODE (insn
) != NOTE
7747 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7750 /* If the last insn of the loop (the end test) was an NE comparison,
7751 we will interpret it as an EQ comparison, since we fell through
7752 the loop. Any equivalences resulting from that comparison are
7753 therefore not valid and must be invalidated. */
7754 if (last_jump_equiv_class
)
7755 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7756 p
= p
->next_same_value
)
7757 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7758 || (GET_CODE (p
->exp
) == SUBREG
7759 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
7760 invalidate (p
->exp
, VOIDmode
);
7761 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7762 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7763 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
7765 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7766 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7768 The only thing we do with SET_DEST is invalidate entries, so we
7769 can safely process each SET in order. It is slightly less efficient
7770 to do so, but we only want to handle the most common cases. */
7772 for (insn
= NEXT_INSN (loop_start
);
7773 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7774 && ! (GET_CODE (insn
) == NOTE
7775 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7776 insn
= NEXT_INSN (insn
))
7778 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7779 && (GET_CODE (PATTERN (insn
)) == SET
7780 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7781 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7782 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7783 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7784 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7785 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7786 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7787 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7792 /* Variable used for communications between the next two routines. */
7794 static struct write_data skipped_writes_memory
;
7796 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7797 since they are done elsewhere. This function is called via note_stores. */
7800 invalidate_skipped_set (dest
, set
)
7804 if (GET_CODE (set
) == CLOBBER
7811 if (GET_CODE (dest
) == MEM
)
7812 note_mem_written (dest
, &skipped_writes_memory
);
7814 /* There are times when an address can appear varying and be a PLUS
7815 during this scan when it would be a fixed address were we to know
7816 the proper equivalences. So promote "nonscalar" to be "all". */
7817 if (skipped_writes_memory
.nonscalar
)
7818 skipped_writes_memory
.all
= 1;
7820 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7821 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7822 invalidate (dest
, VOIDmode
);
7823 else if (GET_CODE (dest
) == STRICT_LOW_PART
7824 || GET_CODE (dest
) == ZERO_EXTRACT
)
7825 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7828 /* Invalidate all insns from START up to the end of the function or the
7829 next label. This called when we wish to CSE around a block that is
7830 conditionally executed. */
7833 invalidate_skipped_block (start
)
7837 static struct write_data init
= {0, 0, 0, 0};
7838 static struct write_data everything
= {0, 1, 1, 1};
7840 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7841 insn
= NEXT_INSN (insn
))
7843 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7846 skipped_writes_memory
= init
;
7848 if (GET_CODE (insn
) == CALL_INSN
)
7850 invalidate_for_call ();
7851 skipped_writes_memory
= everything
;
7854 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7855 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7859 /* Used for communication between the following two routines; contains a
7860 value to be checked for modification. */
7862 static rtx cse_check_loop_start_value
;
7864 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7865 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7868 cse_check_loop_start (x
, set
)
7872 if (cse_check_loop_start_value
== 0
7873 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7876 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7877 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7878 cse_check_loop_start_value
= 0;
7881 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7882 a loop that starts with the label at LOOP_START.
7884 If X is a SET, we see if its SET_SRC is currently in our hash table.
7885 If so, we see if it has a value equal to some register used only in the
7886 loop exit code (as marked by jump.c).
7888 If those two conditions are true, we search backwards from the start of
7889 the loop to see if that same value was loaded into a register that still
7890 retains its value at the start of the loop.
7892 If so, we insert an insn after the load to copy the destination of that
7893 load into the equivalent register and (try to) replace our SET_SRC with that
7896 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7899 cse_set_around_loop (x
, insn
, loop_start
)
7904 struct table_elt
*src_elt
;
7905 static struct write_data init
= {0, 0, 0, 0};
7906 struct write_data writes_memory
;
7908 writes_memory
= init
;
7910 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7911 are setting PC or CC0 or whose SET_SRC is already a register. */
7912 if (GET_CODE (x
) == SET
7913 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7914 && GET_CODE (SET_SRC (x
)) != REG
)
7916 src_elt
= lookup (SET_SRC (x
),
7917 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7918 GET_MODE (SET_DEST (x
)));
7921 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7922 src_elt
= src_elt
->next_same_value
)
7923 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7924 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7928 /* Look for an insn in front of LOOP_START that sets
7929 something in the desired mode to SET_SRC (x) before we hit
7930 a label or CALL_INSN. */
7932 for (p
= prev_nonnote_insn (loop_start
);
7933 p
&& GET_CODE (p
) != CALL_INSN
7934 && GET_CODE (p
) != CODE_LABEL
;
7935 p
= prev_nonnote_insn (p
))
7936 if ((set
= single_set (p
)) != 0
7937 && GET_CODE (SET_DEST (set
)) == REG
7938 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7939 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7941 /* We now have to ensure that nothing between P
7942 and LOOP_START modified anything referenced in
7943 SET_SRC (x). We know that nothing within the loop
7944 can modify it, or we would have invalidated it in
7948 cse_check_loop_start_value
= SET_SRC (x
);
7949 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7950 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7951 note_stores (PATTERN (q
), cse_check_loop_start
);
7953 /* If nothing was changed and we can replace our
7954 SET_SRC, add an insn after P to copy its destination
7955 to what we will be replacing SET_SRC with. */
7956 if (cse_check_loop_start_value
7957 && validate_change (insn
, &SET_SRC (x
),
7959 emit_insn_after (gen_move_insn (src_elt
->exp
,
7967 /* Now invalidate anything modified by X. */
7968 note_mem_written (SET_DEST (x
), &writes_memory
);
7970 if (writes_memory
.var
)
7971 invalidate_memory (&writes_memory
);
7973 /* See comment on similar code in cse_insn for explanation of these tests. */
7974 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7975 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7976 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7977 invalidate (SET_DEST (x
), VOIDmode
);
7978 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
7979 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
7980 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
7983 /* Find the end of INSN's basic block and return its range,
7984 the total number of SETs in all the insns of the block, the last insn of the
7985 block, and the branch path.
7987 The branch path indicates which branches should be followed. If a non-zero
7988 path size is specified, the block should be rescanned and a different set
7989 of branches will be taken. The branch path is only used if
7990 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7992 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7993 used to describe the block. It is filled in with the information about
7994 the current block. The incoming structure's branch path, if any, is used
7995 to construct the output branch path. */
7998 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8000 struct cse_basic_block_data
*data
;
8007 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8008 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8009 int path_size
= data
->path_size
;
8013 /* Update the previous branch path, if any. If the last branch was
8014 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8015 shorten the path by one and look at the previous branch. We know that
8016 at least one branch must have been taken if PATH_SIZE is non-zero. */
8017 while (path_size
> 0)
8019 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8021 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8028 /* Scan to end of this basic block. */
8029 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8031 /* Don't cse out the end of a loop. This makes a difference
8032 only for the unusual loops that always execute at least once;
8033 all other loops have labels there so we will stop in any case.
8034 Cse'ing out the end of the loop is dangerous because it
8035 might cause an invariant expression inside the loop
8036 to be reused after the end of the loop. This would make it
8037 hard to move the expression out of the loop in loop.c,
8038 especially if it is one of several equivalent expressions
8039 and loop.c would like to eliminate it.
8041 If we are running after loop.c has finished, we can ignore
8042 the NOTE_INSN_LOOP_END. */
8044 if (! after_loop
&& GET_CODE (p
) == NOTE
8045 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8048 /* Don't cse over a call to setjmp; on some machines (eg vax)
8049 the regs restored by the longjmp come from
8050 a later time than the setjmp. */
8051 if (GET_CODE (p
) == NOTE
8052 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8055 /* A PARALLEL can have lots of SETs in it,
8056 especially if it is really an ASM_OPERANDS. */
8057 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8058 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8059 nsets
+= XVECLEN (PATTERN (p
), 0);
8060 else if (GET_CODE (p
) != NOTE
)
8063 /* Ignore insns made by CSE; they cannot affect the boundaries of
8066 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8067 high_cuid
= INSN_CUID (p
);
8068 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8069 low_cuid
= INSN_CUID (p
);
8071 /* See if this insn is in our branch path. If it is and we are to
8073 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8075 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8078 /* Point to next entry in path, if any. */
8082 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8083 was specified, we haven't reached our maximum path length, there are
8084 insns following the target of the jump, this is the only use of the
8085 jump label, and the target label is preceded by a BARRIER.
8087 Alternatively, we can follow the jump if it branches around a
8088 block of code and there are no other branches into the block.
8089 In this case invalidate_skipped_block will be called to invalidate any
8090 registers set in the block when following the jump. */
8092 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8093 && GET_CODE (p
) == JUMP_INSN
8094 && GET_CODE (PATTERN (p
)) == SET
8095 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8096 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8097 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8099 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8100 if ((GET_CODE (q
) != NOTE
8101 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8102 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8103 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8106 /* If we ran into a BARRIER, this code is an extension of the
8107 basic block when the branch is taken. */
8108 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8110 /* Don't allow ourself to keep walking around an
8111 always-executed loop. */
8112 if (next_real_insn (q
) == next
)
8118 /* Similarly, don't put a branch in our path more than once. */
8119 for (i
= 0; i
< path_entry
; i
++)
8120 if (data
->path
[i
].branch
== p
)
8123 if (i
!= path_entry
)
8126 data
->path
[path_entry
].branch
= p
;
8127 data
->path
[path_entry
++].status
= TAKEN
;
8129 /* This branch now ends our path. It was possible that we
8130 didn't see this branch the last time around (when the
8131 insn in front of the target was a JUMP_INSN that was
8132 turned into a no-op). */
8133 path_size
= path_entry
;
8136 /* Mark block so we won't scan it again later. */
8137 PUT_MODE (NEXT_INSN (p
), QImode
);
8139 /* Detect a branch around a block of code. */
8140 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8144 if (next_real_insn (q
) == next
)
8150 for (i
= 0; i
< path_entry
; i
++)
8151 if (data
->path
[i
].branch
== p
)
8154 if (i
!= path_entry
)
8157 /* This is no_labels_between_p (p, q) with an added check for
8158 reaching the end of a function (in case Q precedes P). */
8159 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8160 if (GET_CODE (tmp
) == CODE_LABEL
)
8165 data
->path
[path_entry
].branch
= p
;
8166 data
->path
[path_entry
++].status
= AROUND
;
8168 path_size
= path_entry
;
8171 /* Mark block so we won't scan it again later. */
8172 PUT_MODE (NEXT_INSN (p
), QImode
);
8179 data
->low_cuid
= low_cuid
;
8180 data
->high_cuid
= high_cuid
;
8181 data
->nsets
= nsets
;
8184 /* If all jumps in the path are not taken, set our path length to zero
8185 so a rescan won't be done. */
8186 for (i
= path_size
- 1; i
>= 0; i
--)
8187 if (data
->path
[i
].status
!= NOT_TAKEN
)
8191 data
->path_size
= 0;
8193 data
->path_size
= path_size
;
8195 /* End the current branch path. */
8196 data
->path
[path_size
].branch
= 0;
8199 /* Perform cse on the instructions of a function.
8200 F is the first instruction.
8201 NREGS is one plus the highest pseudo-reg number used in the instruction.
8203 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8204 (only if -frerun-cse-after-loop).
8206 Returns 1 if jump_optimize should be redone due to simplifications
8207 in conditional jump instructions. */
8210 cse_main (f
, nregs
, after_loop
, file
)
8216 struct cse_basic_block_data val
;
8217 register rtx insn
= f
;
8220 cse_jumps_altered
= 0;
8221 recorded_label_ref
= 0;
8222 constant_pool_entries_cost
= 0;
8229 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8230 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8232 for (i
= 0; i
< nregs
; i
++)
8234 all_minus_one
[i
] = -1;
8238 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8239 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8240 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8241 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8242 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8244 #ifdef LOAD_EXTEND_OP
8246 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8247 and change the code and mode as appropriate. */
8248 memory_extend_rtx
= gen_rtx (ZERO_EXTEND
, VOIDmode
, 0);
8251 /* Discard all the free elements of the previous function
8252 since they are allocated in the temporarily obstack. */
8253 bzero ((char *) table
, sizeof table
);
8254 free_element_chain
= 0;
8255 n_elements_made
= 0;
8257 /* Find the largest uid. */
8259 max_uid
= get_max_uid ();
8260 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8261 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8263 /* Compute the mapping from uids to cuids.
8264 CUIDs are numbers assigned to insns, like uids,
8265 except that cuids increase monotonically through the code.
8266 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8267 between two insns is not affected by -g. */
8269 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8271 if (GET_CODE (insn
) != NOTE
8272 || NOTE_LINE_NUMBER (insn
) < 0)
8273 INSN_CUID (insn
) = ++i
;
8275 /* Give a line number note the same cuid as preceding insn. */
8276 INSN_CUID (insn
) = i
;
8279 /* Initialize which registers are clobbered by calls. */
8281 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8283 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8284 if ((call_used_regs
[i
]
8285 /* Used to check !fixed_regs[i] here, but that isn't safe;
8286 fixed regs are still call-clobbered, and sched can get
8287 confused if they can "live across calls".
8289 The frame pointer is always preserved across calls. The arg
8290 pointer is if it is fixed. The stack pointer usually is, unless
8291 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8292 will be present. If we are generating PIC code, the PIC offset
8293 table register is preserved across calls. */
8295 && i
!= STACK_POINTER_REGNUM
8296 && i
!= FRAME_POINTER_REGNUM
8297 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8298 && i
!= HARD_FRAME_POINTER_REGNUM
8300 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8301 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8303 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8304 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8308 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8310 /* Loop over basic blocks.
8311 Compute the maximum number of qty's needed for each basic block
8312 (which is 2 for each SET). */
8316 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8317 flag_cse_skip_blocks
);
8319 /* If this basic block was already processed or has no sets, skip it. */
8320 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8322 PUT_MODE (insn
, VOIDmode
);
8323 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8328 cse_basic_block_start
= val
.low_cuid
;
8329 cse_basic_block_end
= val
.high_cuid
;
8330 max_qty
= val
.nsets
* 2;
8333 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8334 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8337 /* Make MAX_QTY bigger to give us room to optimize
8338 past the end of this basic block, if that should prove useful. */
8344 /* If this basic block is being extended by following certain jumps,
8345 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8346 Otherwise, we start after this basic block. */
8347 if (val
.path_size
> 0)
8348 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8351 int old_cse_jumps_altered
= cse_jumps_altered
;
8354 /* When cse changes a conditional jump to an unconditional
8355 jump, we want to reprocess the block, since it will give
8356 us a new branch path to investigate. */
8357 cse_jumps_altered
= 0;
8358 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8359 if (cse_jumps_altered
== 0
8360 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8363 cse_jumps_altered
|= old_cse_jumps_altered
;
8371 /* Tell refers_to_mem_p that qty_const info is not available. */
8374 if (max_elements_made
< n_elements_made
)
8375 max_elements_made
= n_elements_made
;
8377 return cse_jumps_altered
|| recorded_label_ref
;
8380 /* Process a single basic block. FROM and TO and the limits of the basic
8381 block. NEXT_BRANCH points to the branch path when following jumps or
8382 a null path when not following jumps.
8384 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8385 loop. This is true when we are being called for the last time on a
8386 block and this CSE pass is before loop.c. */
8389 cse_basic_block (from
, to
, next_branch
, around_loop
)
8390 register rtx from
, to
;
8391 struct branch_path
*next_branch
;
8396 int in_libcall_block
= 0;
8398 /* Each of these arrays is undefined before max_reg, so only allocate
8399 the space actually needed and adjust the start below. */
8401 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8402 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8403 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8404 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8405 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8407 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8408 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8409 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8411 qty_first_reg
-= max_reg
;
8412 qty_last_reg
-= max_reg
;
8413 qty_mode
-= max_reg
;
8414 qty_const
-= max_reg
;
8415 qty_const_insn
-= max_reg
;
8416 qty_comparison_code
-= max_reg
;
8417 qty_comparison_qty
-= max_reg
;
8418 qty_comparison_const
-= max_reg
;
8422 /* TO might be a label. If so, protect it from being deleted. */
8423 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8426 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8428 register enum rtx_code code
;
8430 /* See if this is a branch that is part of the path. If so, and it is
8431 to be taken, do so. */
8432 if (next_branch
->branch
== insn
)
8434 enum taken status
= next_branch
++->status
;
8435 if (status
!= NOT_TAKEN
)
8437 if (status
== TAKEN
)
8438 record_jump_equiv (insn
, 1);
8440 invalidate_skipped_block (NEXT_INSN (insn
));
8442 /* Set the last insn as the jump insn; it doesn't affect cc0.
8443 Then follow this branch. */
8448 insn
= JUMP_LABEL (insn
);
8453 code
= GET_CODE (insn
);
8454 if (GET_MODE (insn
) == QImode
)
8455 PUT_MODE (insn
, VOIDmode
);
8457 if (GET_RTX_CLASS (code
) == 'i')
8459 /* Process notes first so we have all notes in canonical forms when
8460 looking for duplicate operations. */
8462 if (REG_NOTES (insn
))
8463 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8465 /* Track when we are inside in LIBCALL block. Inside such a block,
8466 we do not want to record destinations. The last insn of a
8467 LIBCALL block is not considered to be part of the block, since
8468 its destination is the result of the block and hence should be
8471 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8472 in_libcall_block
= 1;
8473 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8474 in_libcall_block
= 0;
8476 cse_insn (insn
, in_libcall_block
);
8479 /* If INSN is now an unconditional jump, skip to the end of our
8480 basic block by pretending that we just did the last insn in the
8481 basic block. If we are jumping to the end of our block, show
8482 that we can have one usage of TO. */
8484 if (simplejump_p (insn
))
8489 if (JUMP_LABEL (insn
) == to
)
8492 /* Maybe TO was deleted because the jump is unconditional.
8493 If so, there is nothing left in this basic block. */
8494 /* ??? Perhaps it would be smarter to set TO
8495 to whatever follows this insn,
8496 and pretend the basic block had always ended here. */
8497 if (INSN_DELETED_P (to
))
8500 insn
= PREV_INSN (to
);
8503 /* See if it is ok to keep on going past the label
8504 which used to end our basic block. Remember that we incremented
8505 the count of that label, so we decrement it here. If we made
8506 a jump unconditional, TO_USAGE will be one; in that case, we don't
8507 want to count the use in that jump. */
8509 if (to
!= 0 && NEXT_INSN (insn
) == to
8510 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8512 struct cse_basic_block_data val
;
8515 insn
= NEXT_INSN (to
);
8517 if (LABEL_NUSES (to
) == 0)
8518 insn
= delete_insn (to
);
8520 /* If TO was the last insn in the function, we are done. */
8524 /* If TO was preceded by a BARRIER we are done with this block
8525 because it has no continuation. */
8526 prev
= prev_nonnote_insn (to
);
8527 if (prev
&& GET_CODE (prev
) == BARRIER
)
8530 /* Find the end of the following block. Note that we won't be
8531 following branches in this case. */
8534 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8536 /* If the tables we allocated have enough space left
8537 to handle all the SETs in the next basic block,
8538 continue through it. Otherwise, return,
8539 and that block will be scanned individually. */
8540 if (val
.nsets
* 2 + next_qty
> max_qty
)
8543 cse_basic_block_start
= val
.low_cuid
;
8544 cse_basic_block_end
= val
.high_cuid
;
8547 /* Prevent TO from being deleted if it is a label. */
8548 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8551 /* Back up so we process the first insn in the extension. */
8552 insn
= PREV_INSN (insn
);
8556 if (next_qty
> max_qty
)
8559 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8560 the previous insn is the only insn that branches to the head of a loop,
8561 we can cse into the loop. Don't do this if we changed the jump
8562 structure of a loop unless we aren't going to be following jumps. */
8564 if ((cse_jumps_altered
== 0
8565 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8566 && around_loop
&& to
!= 0
8567 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8568 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8569 && JUMP_LABEL (PREV_INSN (to
)) != 0
8570 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8571 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8573 return to
? NEXT_INSN (to
) : 0;
8576 /* Count the number of times registers are used (not set) in X.
8577 COUNTS is an array in which we accumulate the count, INCR is how much
8578 we count each register usage.
8580 Don't count a usage of DEST, which is the SET_DEST of a SET which
8581 contains X in its SET_SRC. This is because such a SET does not
8582 modify the liveness of DEST. */
8585 count_reg_usage (x
, counts
, dest
, incr
)
8598 switch (code
= GET_CODE (x
))
8602 counts
[REGNO (x
)] += incr
;
8616 /* Unless we are setting a REG, count everything in SET_DEST. */
8617 if (GET_CODE (SET_DEST (x
)) != REG
)
8618 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8620 /* If SRC has side-effects, then we can't delete this insn, so the
8621 usage of SET_DEST inside SRC counts.
8623 ??? Strictly-speaking, we might be preserving this insn
8624 because some other SET has side-effects, but that's hard
8625 to do and can't happen now. */
8626 count_reg_usage (SET_SRC (x
), counts
,
8627 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8632 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8634 /* ... falls through ... */
8637 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8639 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8642 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8647 if (REG_NOTE_KIND (x
) == REG_EQUAL
8648 || GET_CODE (XEXP (x
,0)) == USE
)
8649 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8650 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8654 fmt
= GET_RTX_FORMAT (code
);
8655 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8658 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8659 else if (fmt
[i
] == 'E')
8660 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8661 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8665 /* Scan all the insns and delete any that are dead; i.e., they store a register
8666 that is never used or they copy a register to itself.
8668 This is used to remove insns made obviously dead by cse. It improves the
8669 heuristics in loop since it won't try to move dead invariants out of loops
8670 or make givs for dead quantities. The remaining passes of the compilation
8671 are also sped up. */
8674 delete_dead_from_cse (insns
, nreg
)
8678 int *counts
= (int *) alloca (nreg
* sizeof (int));
8684 /* First count the number of times each register is used. */
8685 bzero ((char *) counts
, sizeof (int) * nreg
);
8686 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8687 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8689 /* Go from the last insn to the first and delete insns that only set unused
8690 registers or copy a register to itself. As we delete an insn, remove
8691 usage counts for registers it uses. */
8692 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8696 prev
= prev_real_insn (insn
);
8698 /* Don't delete any insns that are part of a libcall block.
8699 Flow or loop might get confused if we did that. Remember
8700 that we are scanning backwards. */
8701 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8706 else if (GET_CODE (PATTERN (insn
)) == SET
)
8708 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8709 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8713 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8714 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8715 && ((tem
= next_nonnote_insn (insn
)) == 0
8716 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8717 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8720 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8721 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8722 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8723 || side_effects_p (SET_SRC (PATTERN (insn
))))
8726 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8727 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8729 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8731 if (GET_CODE (elt
) == SET
)
8733 if (GET_CODE (SET_DEST (elt
)) == REG
8734 && SET_DEST (elt
) == SET_SRC (elt
))
8738 else if (GET_CODE (SET_DEST (elt
)) == CC0
8739 && ! side_effects_p (SET_SRC (elt
))
8740 && ((tem
= next_nonnote_insn (insn
)) == 0
8741 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8742 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8745 else if (GET_CODE (SET_DEST (elt
)) != REG
8746 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8747 || counts
[REGNO (SET_DEST (elt
))] != 0
8748 || side_effects_p (SET_SRC (elt
)))
8751 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8757 /* If this is a dead insn, delete it and show registers in it aren't
8762 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8766 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))