1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* Must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
36 /* The basic idea of common subexpression elimination is to go
37 through the code, keeping a record of expressions that would
38 have the same value at the current scan point, and replacing
39 expressions encountered with the cheapest equivalent expression.
41 It is too complicated to keep track of the different possibilities
42 when control paths merge; so, at each label, we forget all that is
43 known and start fresh. This can be described as processing each
44 basic block separately. Note, however, that these are not quite
45 the same as the basic blocks found by a later pass and used for
46 data flow analysis and register packing. We do not need to start fresh
47 after a conditional jump instruction if there is no label there.
49 We use two data structures to record the equivalent expressions:
50 a hash table for most expressions, and several vectors together
51 with "quantity numbers" to record equivalent (pseudo) registers.
53 The use of the special data structure for registers is desirable
54 because it is faster. It is possible because registers references
55 contain a fairly small number, the register number, taken from
56 a contiguously allocated series, and two register references are
57 identical if they have the same number. General expressions
58 do not have any such thing, so the only way to retrieve the
59 information recorded on an expression other than a register
60 is to keep it in a hash table.
62 Registers and "quantity numbers":
64 At the start of each basic block, all of the (hardware and pseudo)
65 registers used in the function are given distinct quantity
66 numbers to indicate their contents. During scan, when the code
67 copies one register into another, we copy the quantity number.
68 When a register is loaded in any other way, we allocate a new
69 quantity number to describe the value generated by this operation.
70 `reg_qty' records what quantity a register is currently thought
73 All real quantity numbers are greater than or equal to `max_reg'.
74 If register N has not been assigned a quantity, reg_qty[N] will equal N.
76 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
77 variables should be referenced with an index below `max_reg'.
79 We also maintain a bidirectional chain of registers for each
80 quantity number. `qty_first_reg', `qty_last_reg',
81 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
83 The first register in a chain is the one whose lifespan is least local.
84 Among equals, it is the one that was seen first.
85 We replace any equivalent register with that one.
87 If two registers have the same quantity number, it must be true that
88 REG expressions with `qty_mode' must be in the hash table for both
89 registers and must be in the same class.
91 The converse is not true. Since hard registers may be referenced in
92 any mode, two REG expressions might be equivalent in the hash table
93 but not have the same quantity number if the quantity number of one
94 of the registers is not the same mode as those expressions.
96 Constants and quantity numbers
98 When a quantity has a known constant value, that value is stored
99 in the appropriate element of qty_const. This is in addition to
100 putting the constant in the hash table as is usual for non-regs.
102 Whether a reg or a constant is preferred is determined by the configuration
103 macro CONST_COSTS and will often depend on the constant value. In any
104 event, expressions containing constants can be simplified, by fold_rtx.
106 When a quantity has a known nearly constant value (such as an address
107 of a stack slot), that value is stored in the appropriate element
110 Integer constants don't have a machine mode. However, cse
111 determines the intended machine mode from the destination
112 of the instruction that moves the constant. The machine mode
113 is recorded in the hash table along with the actual RTL
114 constant expression so that different modes are kept separate.
118 To record known equivalences among expressions in general
119 we use a hash table called `table'. It has a fixed number of buckets
120 that contain chains of `struct table_elt' elements for expressions.
121 These chains connect the elements whose expressions have the same
124 Other chains through the same elements connect the elements which
125 currently have equivalent values.
127 Register references in an expression are canonicalized before hashing
128 the expression. This is done using `reg_qty' and `qty_first_reg'.
129 The hash code of a register reference is computed using the quantity
130 number, not the register number.
132 When the value of an expression changes, it is necessary to remove from the
133 hash table not just that expression but all expressions whose values
134 could be different as a result.
136 1. If the value changing is in memory, except in special cases
137 ANYTHING referring to memory could be changed. That is because
138 nobody knows where a pointer does not point.
139 The function `invalidate_memory' removes what is necessary.
141 The special cases are when the address is constant or is
142 a constant plus a fixed register such as the frame pointer
143 or a static chain pointer. When such addresses are stored in,
144 we can tell exactly which other such addresses must be invalidated
145 due to overlap. `invalidate' does this.
146 All expressions that refer to non-constant
147 memory addresses are also invalidated. `invalidate_memory' does this.
149 2. If the value changing is a register, all expressions
150 containing references to that register, and only those,
153 Because searching the entire hash table for expressions that contain
154 a register is very slow, we try to figure out when it isn't necessary.
155 Precisely, this is necessary only when expressions have been
156 entered in the hash table using this register, and then the value has
157 changed, and then another expression wants to be added to refer to
158 the register's new value. This sequence of circumstances is rare
159 within any one basic block.
161 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
162 reg_tick[i] is incremented whenever a value is stored in register i.
163 reg_in_table[i] holds -1 if no references to register i have been
164 entered in the table; otherwise, it contains the value reg_tick[i] had
165 when the references were entered. If we want to enter a reference
166 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
167 Until we want to enter a new entry, the mere fact that the two vectors
168 don't match makes the entries be ignored if anyone tries to match them.
170 Registers themselves are entered in the hash table as well as in
171 the equivalent-register chains. However, the vectors `reg_tick'
172 and `reg_in_table' do not apply to expressions which are simple
173 register references. These expressions are removed from the table
174 immediately when they become invalid, and this can be done even if
175 we do not immediately search for all the expressions that refer to
178 A CLOBBER rtx in an instruction invalidates its operand for further
179 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
180 invalidates everything that resides in memory.
184 Constant expressions that differ only by an additive integer
185 are called related. When a constant expression is put in
186 the table, the related expression with no constant term
187 is also entered. These are made to point at each other
188 so that it is possible to find out if there exists any
189 register equivalent to an expression related to a given expression. */
191 /* One plus largest register number used in this function. */
195 /* Length of vectors indexed by quantity number.
196 We know in advance we will not need a quantity number this big. */
200 /* Next quantity number to be allocated.
201 This is 1 + the largest number needed so far. */
205 /* Indexed by quantity number, gives the first (or last) register
206 in the chain of registers that currently contain this quantity. */
208 static int *qty_first_reg
;
209 static int *qty_last_reg
;
211 /* Index by quantity number, gives the mode of the quantity. */
213 static enum machine_mode
*qty_mode
;
215 /* Indexed by quantity number, gives the rtx of the constant value of the
216 quantity, or zero if it does not have a known value.
217 A sum of the frame pointer (or arg pointer) plus a constant
218 can also be entered here. */
220 static rtx
*qty_const
;
222 /* Indexed by qty number, gives the insn that stored the constant value
223 recorded in `qty_const'. */
225 static rtx
*qty_const_insn
;
227 /* The next three variables are used to track when a comparison between a
228 quantity and some constant or register has been passed. In that case, we
229 know the results of the comparison in case we see it again. These variables
230 record a comparison that is known to be true. */
232 /* Indexed by qty number, gives the rtx code of a comparison with a known
233 result involving this quantity. If none, it is UNKNOWN. */
234 static enum rtx_code
*qty_comparison_code
;
236 /* Indexed by qty number, gives the constant being compared against in a
237 comparison of known result. If no such comparison, it is undefined.
238 If the comparison is not with a constant, it is zero. */
240 static rtx
*qty_comparison_const
;
242 /* Indexed by qty number, gives the quantity being compared against in a
243 comparison of known result. If no such comparison, if it undefined.
244 If the comparison is not with a register, it is -1. */
246 static int *qty_comparison_qty
;
249 /* For machines that have a CC0, we do not record its value in the hash
250 table since its use is guaranteed to be the insn immediately following
251 its definition and any other insn is presumed to invalidate it.
253 Instead, we store below the value last assigned to CC0. If it should
254 happen to be a constant, it is stored in preference to the actual
255 assigned value. In case it is a constant, we store the mode in which
256 the constant should be interpreted. */
258 static rtx prev_insn_cc0
;
259 static enum machine_mode prev_insn_cc0_mode
;
262 /* Previous actual insn. 0 if at first insn of basic block. */
264 static rtx prev_insn
;
266 /* Insn being scanned. */
268 static rtx this_insn
;
270 /* Index by register number, gives the quantity number
271 of the register's current contents. */
275 /* Index by register number, gives the number of the next (or
276 previous) register in the chain of registers sharing the same
279 Or -1 if this register is at the end of the chain.
281 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
283 static int *reg_next_eqv
;
284 static int *reg_prev_eqv
;
286 /* Index by register number, gives the number of times
287 that register has been altered in the current basic block. */
289 static int *reg_tick
;
291 /* Index by register number, gives the reg_tick value at which
292 rtx's containing this register are valid in the hash table.
293 If this does not equal the current reg_tick value, such expressions
294 existing in the hash table are invalid.
295 If this is -1, no expressions containing this register have been
296 entered in the table. */
298 static int *reg_in_table
;
300 /* A HARD_REG_SET containing all the hard registers for which there is
301 currently a REG expression in the hash table. Note the difference
302 from the above variables, which indicate if the REG is mentioned in some
303 expression in the table. */
305 static HARD_REG_SET hard_regs_in_table
;
307 /* A HARD_REG_SET containing all the hard registers that are invalidated
310 static HARD_REG_SET regs_invalidated_by_call
;
312 /* Two vectors of ints:
313 one containing max_reg -1's; the other max_reg + 500 (an approximation
314 for max_qty) elements where element i contains i.
315 These are used to initialize various other vectors fast. */
317 static int *all_minus_one
;
318 static int *consec_ints
;
320 /* CUID of insn that starts the basic block currently being cse-processed. */
322 static int cse_basic_block_start
;
324 /* CUID of insn that ends the basic block currently being cse-processed. */
326 static int cse_basic_block_end
;
328 /* Vector mapping INSN_UIDs to cuids.
329 The cuids are like uids but increase monotonically always.
330 We use them to see whether a reg is used outside a given basic block. */
332 static int *uid_cuid
;
334 /* Highest UID in UID_CUID. */
337 /* Get the cuid of an insn. */
339 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
341 /* Nonzero if cse has altered conditional jump insns
342 in such a way that jump optimization should be redone. */
344 static int cse_jumps_altered
;
346 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
347 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
348 to put in the note. */
349 static int recorded_label_ref
;
351 /* canon_hash stores 1 in do_not_record
352 if it notices a reference to CC0, PC, or some other volatile
355 static int do_not_record
;
357 #ifdef LOAD_EXTEND_OP
359 /* Scratch rtl used when looking for load-extended copy of a MEM. */
360 static rtx memory_extend_rtx
;
363 /* canon_hash stores 1 in hash_arg_in_memory
364 if it notices a reference to memory within the expression being hashed. */
366 static int hash_arg_in_memory
;
368 /* canon_hash stores 1 in hash_arg_in_struct
369 if it notices a reference to memory that's part of a structure. */
371 static int hash_arg_in_struct
;
373 /* The hash table contains buckets which are chains of `struct table_elt's,
374 each recording one expression's information.
375 That expression is in the `exp' field.
377 Those elements with the same hash code are chained in both directions
378 through the `next_same_hash' and `prev_same_hash' fields.
380 Each set of expressions with equivalent values
381 are on a two-way chain through the `next_same_value'
382 and `prev_same_value' fields, and all point with
383 the `first_same_value' field at the first element in
384 that chain. The chain is in order of increasing cost.
385 Each element's cost value is in its `cost' field.
387 The `in_memory' field is nonzero for elements that
388 involve any reference to memory. These elements are removed
389 whenever a write is done to an unidentified location in memory.
390 To be safe, we assume that a memory address is unidentified unless
391 the address is either a symbol constant or a constant plus
392 the frame pointer or argument pointer.
394 The `in_struct' field is nonzero for elements that
395 involve any reference to memory inside a structure or array.
397 The `related_value' field is used to connect related expressions
398 (that differ by adding an integer).
399 The related expressions are chained in a circular fashion.
400 `related_value' is zero for expressions for which this
403 The `cost' field stores the cost of this element's expression.
405 The `is_const' flag is set if the element is a constant (including
408 The `flag' field is used as a temporary during some search routines.
410 The `mode' field is usually the same as GET_MODE (`exp'), but
411 if `exp' is a CONST_INT and has no machine mode then the `mode'
412 field is the mode it was being used as. Each constant is
413 recorded separately for each mode it is used with. */
419 struct table_elt
*next_same_hash
;
420 struct table_elt
*prev_same_hash
;
421 struct table_elt
*next_same_value
;
422 struct table_elt
*prev_same_value
;
423 struct table_elt
*first_same_value
;
424 struct table_elt
*related_value
;
426 enum machine_mode mode
;
433 /* We don't want a lot of buckets, because we rarely have very many
434 things stored in the hash table, and a lot of buckets slows
435 down a lot of loops that happen frequently. */
438 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
439 register (hard registers may require `do_not_record' to be set). */
442 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
443 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
444 : canon_hash (X, M) % NBUCKETS)
446 /* Determine whether register number N is considered a fixed register for CSE.
447 It is desirable to replace other regs with fixed regs, to reduce need for
449 A reg wins if it is either the frame pointer or designated as fixed,
450 but not if it is an overlapping register. */
451 #ifdef OVERLAPPING_REGNO_P
452 #define FIXED_REGNO_P(N) \
453 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
454 || fixed_regs[N] || global_regs[N]) \
455 && ! OVERLAPPING_REGNO_P ((N)))
457 #define FIXED_REGNO_P(N) \
458 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
459 || fixed_regs[N] || global_regs[N])
462 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
463 hard registers and pointers into the frame are the cheapest with a cost
464 of 0. Next come pseudos with a cost of one and other hard registers with
465 a cost of 2. Aside from these special cases, call `rtx_cost'. */
467 #define CHEAP_REGNO(N) \
468 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
469 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
470 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
471 || ((N) < FIRST_PSEUDO_REGISTER \
472 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
474 /* A register is cheap if it is a user variable assigned to the register
475 or if its register number always corresponds to a cheap register. */
477 #define CHEAP_REG(N) \
478 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
479 || CHEAP_REGNO (REGNO (N)))
482 (GET_CODE (X) == REG \
483 ? (CHEAP_REG (X) ? 0 \
484 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
488 /* Determine if the quantity number for register X represents a valid index
489 into the `qty_...' variables. */
491 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
493 static struct table_elt
*table
[NBUCKETS
];
495 /* Chain of `struct table_elt's made so far for this function
496 but currently removed from the table. */
498 static struct table_elt
*free_element_chain
;
500 /* Number of `struct table_elt' structures made so far for this function. */
502 static int n_elements_made
;
504 /* Maximum value `n_elements_made' has had so far in this compilation
505 for functions previously processed. */
507 static int max_elements_made
;
509 /* Surviving equivalence class when two equivalence classes are merged
510 by recording the effects of a jump in the last insn. Zero if the
511 last insn was not a conditional jump. */
513 static struct table_elt
*last_jump_equiv_class
;
515 /* Set to the cost of a constant pool reference if one was found for a
516 symbolic constant. If this was found, it means we should try to
517 convert constants into constant pool entries if they don't fit in
520 static int constant_pool_entries_cost
;
522 /* Define maximum length of a branch path. */
524 #define PATHLENGTH 10
526 /* This data describes a block that will be processed by cse_basic_block. */
528 struct cse_basic_block_data
{
529 /* Lowest CUID value of insns in block. */
531 /* Highest CUID value of insns in block. */
533 /* Total number of SETs in block. */
535 /* Last insn in the block. */
537 /* Size of current branch path, if any. */
539 /* Current branch path, indicating which branches will be taken. */
541 /* The branch insn. */
543 /* Whether it should be taken or not. AROUND is the same as taken
544 except that it is used when the destination label is not preceded
546 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
550 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
551 virtual regs here because the simplify_*_operation routines are called
552 by integrate.c, which is called before virtual register instantiation. */
554 #define FIXED_BASE_PLUS_P(X) \
555 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
556 || (X) == arg_pointer_rtx \
557 || (X) == virtual_stack_vars_rtx \
558 || (X) == virtual_incoming_args_rtx \
559 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
560 && (XEXP (X, 0) == frame_pointer_rtx \
561 || XEXP (X, 0) == hard_frame_pointer_rtx \
562 || XEXP (X, 0) == arg_pointer_rtx \
563 || XEXP (X, 0) == virtual_stack_vars_rtx \
564 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
565 || GET_CODE (X) == ADDRESSOF)
567 /* Similar, but also allows reference to the stack pointer.
569 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
570 arg_pointer_rtx by itself is nonzero, because on at least one machine,
571 the i960, the arg pointer is zero when it is unused. */
573 #define NONZERO_BASE_PLUS_P(X) \
574 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
575 || (X) == virtual_stack_vars_rtx \
576 || (X) == virtual_incoming_args_rtx \
577 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
578 && (XEXP (X, 0) == frame_pointer_rtx \
579 || XEXP (X, 0) == hard_frame_pointer_rtx \
580 || XEXP (X, 0) == arg_pointer_rtx \
581 || XEXP (X, 0) == virtual_stack_vars_rtx \
582 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
583 || (X) == stack_pointer_rtx \
584 || (X) == virtual_stack_dynamic_rtx \
585 || (X) == virtual_outgoing_args_rtx \
586 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
587 && (XEXP (X, 0) == stack_pointer_rtx \
588 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
589 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
590 || GET_CODE (X) == ADDRESSOF)
592 static int notreg_cost
PROTO((rtx
));
593 static void new_basic_block
PROTO((void));
594 static void make_new_qty
PROTO((int));
595 static void make_regs_eqv
PROTO((int, int));
596 static void delete_reg_equiv
PROTO((int));
597 static int mention_regs
PROTO((rtx
));
598 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
599 static void free_element
PROTO((struct table_elt
*));
600 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
601 static struct table_elt
*get_element
PROTO((void));
602 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
603 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
604 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
605 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
607 static void merge_equiv_classes
PROTO((struct table_elt
*,
608 struct table_elt
*));
609 static void invalidate
PROTO((rtx
, enum machine_mode
));
610 static int cse_rtx_varies_p
PROTO((rtx
));
611 static void remove_invalid_refs
PROTO((int));
612 static void rehash_using_reg
PROTO((rtx
));
613 static void invalidate_memory
PROTO((void));
614 static void invalidate_for_call
PROTO((void));
615 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
616 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
617 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
618 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
619 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
622 static int refers_to_p
PROTO((rtx
, rtx
));
623 static rtx canon_reg
PROTO((rtx
, rtx
));
624 static void find_best_addr
PROTO((rtx
, rtx
*));
625 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
627 enum machine_mode
*));
628 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
630 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
632 static rtx fold_rtx
PROTO((rtx
, rtx
));
633 static rtx equiv_constant
PROTO((rtx
));
634 static void record_jump_equiv
PROTO((rtx
, int));
635 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
637 static void cse_insn
PROTO((rtx
, int));
638 static int note_mem_written
PROTO((rtx
));
639 static void invalidate_from_clobbers
PROTO((rtx
));
640 static rtx cse_process_notes
PROTO((rtx
, rtx
));
641 static void cse_around_loop
PROTO((rtx
));
642 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
643 static void invalidate_skipped_block
PROTO((rtx
));
644 static void cse_check_loop_start
PROTO((rtx
, rtx
));
645 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
646 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
647 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
649 extern int rtx_equal_function_value_matters
;
651 /* Return an estimate of the cost of computing rtx X.
652 One use is in cse, to decide which expression to keep in the hash table.
653 Another is in rtl generation, to pick the cheapest way to multiply.
654 Other uses like the latter are expected in the future. */
656 /* Internal function, to compute cost when X is not a register; called
657 from COST macro to keep it simple. */
663 return ((GET_CODE (x
) == SUBREG
664 && GET_CODE (SUBREG_REG (x
)) == REG
665 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
666 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
667 && (GET_MODE_SIZE (GET_MODE (x
))
668 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
669 && subreg_lowpart_p (x
)
670 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
671 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
672 ? (CHEAP_REG (SUBREG_REG (x
)) ? 0
673 : (REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
? 1
675 : rtx_cost (x
, SET
) * 2);
678 /* Return the right cost to give to an operation
679 to make the cost of the corresponding register-to-register instruction
680 N times that of a fast register-to-register instruction. */
682 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
685 rtx_cost (x
, outer_code
)
687 enum rtx_code outer_code
;
690 register enum rtx_code code
;
697 /* Compute the default costs of certain things.
698 Note that RTX_COSTS can override the defaults. */
704 /* Count multiplication by 2**n as a shift,
705 because if we are considering it, we would output it as a shift. */
706 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
707 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
710 total
= COSTS_N_INSNS (5);
716 total
= COSTS_N_INSNS (7);
719 /* Used in loop.c and combine.c as a marker. */
723 /* We don't want these to be used in substitutions because
724 we have no way of validating the resulting insn. So assign
725 anything containing an ASM_OPERANDS a very high cost. */
735 return ! CHEAP_REG (x
);
738 /* If we can't tie these modes, make this expensive. The larger
739 the mode, the more expensive it is. */
740 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
741 return COSTS_N_INSNS (2
742 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
745 RTX_COSTS (x
, code
, outer_code
);
747 CONST_COSTS (x
, code
, outer_code
);
750 /* Sum the costs of the sub-rtx's, plus cost of this operation,
751 which is already in total. */
753 fmt
= GET_RTX_FORMAT (code
);
754 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
756 total
+= rtx_cost (XEXP (x
, i
), code
);
757 else if (fmt
[i
] == 'E')
758 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
759 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
764 /* Clear the hash table and initialize each register with its own quantity,
765 for a new basic block. */
774 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
776 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
777 max_reg
* sizeof (int));
778 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
779 CLEAR_HARD_REG_SET (hard_regs_in_table
);
781 /* The per-quantity values used to be initialized here, but it is
782 much faster to initialize each as it is made in `make_new_qty'. */
784 for (i
= 0; i
< NBUCKETS
; i
++)
786 register struct table_elt
*this, *next
;
787 for (this = table
[i
]; this; this = next
)
789 next
= this->next_same_hash
;
794 bzero ((char *) table
, sizeof table
);
803 /* Say that register REG contains a quantity not in any register before
804 and initialize that quantity. */
812 if (next_qty
>= max_qty
)
815 q
= reg_qty
[reg
] = next_qty
++;
816 qty_first_reg
[q
] = reg
;
817 qty_last_reg
[q
] = reg
;
818 qty_const
[q
] = qty_const_insn
[q
] = 0;
819 qty_comparison_code
[q
] = UNKNOWN
;
821 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
824 /* Make reg NEW equivalent to reg OLD.
825 OLD is not changing; NEW is. */
828 make_regs_eqv (new, old
)
829 register int new, old
;
831 register int lastr
, firstr
;
832 register int q
= reg_qty
[old
];
834 /* Nothing should become eqv until it has a "non-invalid" qty number. */
835 if (! REGNO_QTY_VALID_P (old
))
839 firstr
= qty_first_reg
[q
];
840 lastr
= qty_last_reg
[q
];
842 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
843 hard regs. Among pseudos, if NEW will live longer than any other reg
844 of the same qty, and that is beyond the current basic block,
845 make it the new canonical replacement for this qty. */
846 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
847 /* Certain fixed registers might be of the class NO_REGS. This means
848 that not only can they not be allocated by the compiler, but
849 they cannot be used in substitutions or canonicalizations
851 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
852 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
853 || (new >= FIRST_PSEUDO_REGISTER
854 && (firstr
< FIRST_PSEUDO_REGISTER
855 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
856 || (uid_cuid
[REGNO_FIRST_UID (new)]
857 < cse_basic_block_start
))
858 && (uid_cuid
[REGNO_LAST_UID (new)]
859 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
861 reg_prev_eqv
[firstr
] = new;
862 reg_next_eqv
[new] = firstr
;
863 reg_prev_eqv
[new] = -1;
864 qty_first_reg
[q
] = new;
868 /* If NEW is a hard reg (known to be non-fixed), insert at end.
869 Otherwise, insert before any non-fixed hard regs that are at the
870 end. Registers of class NO_REGS cannot be used as an
871 equivalent for anything. */
872 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
873 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
874 && new >= FIRST_PSEUDO_REGISTER
)
875 lastr
= reg_prev_eqv
[lastr
];
876 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
877 if (reg_next_eqv
[lastr
] >= 0)
878 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
880 qty_last_reg
[q
] = new;
881 reg_next_eqv
[lastr
] = new;
882 reg_prev_eqv
[new] = lastr
;
886 /* Remove REG from its equivalence class. */
889 delete_reg_equiv (reg
)
892 register int q
= reg_qty
[reg
];
895 /* If invalid, do nothing. */
899 p
= reg_prev_eqv
[reg
];
900 n
= reg_next_eqv
[reg
];
909 qty_first_reg
[q
] = n
;
914 /* Remove any invalid expressions from the hash table
915 that refer to any of the registers contained in expression X.
917 Make sure that newly inserted references to those registers
918 as subexpressions will be considered valid.
920 mention_regs is not called when a register itself
921 is being stored in the table.
923 Return 1 if we have done something that may have changed the hash code
930 register enum rtx_code code
;
933 register int changed
= 0;
941 register int regno
= REGNO (x
);
942 register int endregno
943 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
944 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
947 for (i
= regno
; i
< endregno
; i
++)
949 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
950 remove_invalid_refs (i
);
952 reg_in_table
[i
] = reg_tick
[i
];
958 /* If X is a comparison or a COMPARE and either operand is a register
959 that does not have a quantity, give it one. This is so that a later
960 call to record_jump_equiv won't cause X to be assigned a different
961 hash code and not found in the table after that call.
963 It is not necessary to do this here, since rehash_using_reg can
964 fix up the table later, but doing this here eliminates the need to
965 call that expensive function in the most common case where the only
966 use of the register is in the comparison. */
968 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
970 if (GET_CODE (XEXP (x
, 0)) == REG
971 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
972 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
974 rehash_using_reg (XEXP (x
, 0));
978 if (GET_CODE (XEXP (x
, 1)) == REG
979 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
980 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
982 rehash_using_reg (XEXP (x
, 1));
987 fmt
= GET_RTX_FORMAT (code
);
988 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
990 changed
|= mention_regs (XEXP (x
, i
));
991 else if (fmt
[i
] == 'E')
992 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
993 changed
|= mention_regs (XVECEXP (x
, i
, j
));
998 /* Update the register quantities for inserting X into the hash table
999 with a value equivalent to CLASSP.
1000 (If the class does not contain a REG, it is irrelevant.)
1001 If MODIFIED is nonzero, X is a destination; it is being modified.
1002 Note that delete_reg_equiv should be called on a register
1003 before insert_regs is done on that register with MODIFIED != 0.
1005 Nonzero value means that elements of reg_qty have changed
1006 so X's hash code may be different. */
1009 insert_regs (x
, classp
, modified
)
1011 struct table_elt
*classp
;
1014 if (GET_CODE (x
) == REG
)
1016 register int regno
= REGNO (x
);
1018 /* If REGNO is in the equivalence table already but is of the
1019 wrong mode for that equivalence, don't do anything here. */
1021 if (REGNO_QTY_VALID_P (regno
)
1022 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1025 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1028 for (classp
= classp
->first_same_value
;
1030 classp
= classp
->next_same_value
)
1031 if (GET_CODE (classp
->exp
) == REG
1032 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1034 make_regs_eqv (regno
, REGNO (classp
->exp
));
1038 make_new_qty (regno
);
1039 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1046 /* If X is a SUBREG, we will likely be inserting the inner register in the
1047 table. If that register doesn't have an assigned quantity number at
1048 this point but does later, the insertion that we will be doing now will
1049 not be accessible because its hash code will have changed. So assign
1050 a quantity number now. */
1052 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1053 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1055 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1056 mention_regs (SUBREG_REG (x
));
1060 return mention_regs (x
);
1063 /* Look in or update the hash table. */
1065 /* Put the element ELT on the list of free elements. */
1069 struct table_elt
*elt
;
1071 elt
->next_same_hash
= free_element_chain
;
1072 free_element_chain
= elt
;
1075 /* Return an element that is free for use. */
1077 static struct table_elt
*
1080 struct table_elt
*elt
= free_element_chain
;
1083 free_element_chain
= elt
->next_same_hash
;
1087 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1090 /* Remove table element ELT from use in the table.
1091 HASH is its hash code, made using the HASH macro.
1092 It's an argument because often that is known in advance
1093 and we save much time not recomputing it. */
1096 remove_from_table (elt
, hash
)
1097 register struct table_elt
*elt
;
1103 /* Mark this element as removed. See cse_insn. */
1104 elt
->first_same_value
= 0;
1106 /* Remove the table element from its equivalence class. */
1109 register struct table_elt
*prev
= elt
->prev_same_value
;
1110 register struct table_elt
*next
= elt
->next_same_value
;
1112 if (next
) next
->prev_same_value
= prev
;
1115 prev
->next_same_value
= next
;
1118 register struct table_elt
*newfirst
= next
;
1121 next
->first_same_value
= newfirst
;
1122 next
= next
->next_same_value
;
1127 /* Remove the table element from its hash bucket. */
1130 register struct table_elt
*prev
= elt
->prev_same_hash
;
1131 register struct table_elt
*next
= elt
->next_same_hash
;
1133 if (next
) next
->prev_same_hash
= prev
;
1136 prev
->next_same_hash
= next
;
1137 else if (table
[hash
] == elt
)
1141 /* This entry is not in the proper hash bucket. This can happen
1142 when two classes were merged by `merge_equiv_classes'. Search
1143 for the hash bucket that it heads. This happens only very
1144 rarely, so the cost is acceptable. */
1145 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1146 if (table
[hash
] == elt
)
1151 /* Remove the table element from its related-value circular chain. */
1153 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1155 register struct table_elt
*p
= elt
->related_value
;
1156 while (p
->related_value
!= elt
)
1157 p
= p
->related_value
;
1158 p
->related_value
= elt
->related_value
;
1159 if (p
->related_value
== p
)
1160 p
->related_value
= 0;
1166 /* Look up X in the hash table and return its table element,
1167 or 0 if X is not in the table.
1169 MODE is the machine-mode of X, or if X is an integer constant
1170 with VOIDmode then MODE is the mode with which X will be used.
1172 Here we are satisfied to find an expression whose tree structure
1175 static struct table_elt
*
1176 lookup (x
, hash
, mode
)
1179 enum machine_mode mode
;
1181 register struct table_elt
*p
;
1183 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1184 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1185 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1191 /* Like `lookup' but don't care whether the table element uses invalid regs.
1192 Also ignore discrepancies in the machine mode of a register. */
1194 static struct table_elt
*
1195 lookup_for_remove (x
, hash
, mode
)
1198 enum machine_mode mode
;
1200 register struct table_elt
*p
;
1202 if (GET_CODE (x
) == REG
)
1204 int regno
= REGNO (x
);
1205 /* Don't check the machine mode when comparing registers;
1206 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1207 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1208 if (GET_CODE (p
->exp
) == REG
1209 && REGNO (p
->exp
) == regno
)
1214 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1215 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1222 /* Look for an expression equivalent to X and with code CODE.
1223 If one is found, return that expression. */
1226 lookup_as_function (x
, code
)
1230 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1235 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1237 if (GET_CODE (p
->exp
) == code
1238 /* Make sure this is a valid entry in the table. */
1239 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1246 /* Insert X in the hash table, assuming HASH is its hash code
1247 and CLASSP is an element of the class it should go in
1248 (or 0 if a new class should be made).
1249 It is inserted at the proper position to keep the class in
1250 the order cheapest first.
1252 MODE is the machine-mode of X, or if X is an integer constant
1253 with VOIDmode then MODE is the mode with which X will be used.
1255 For elements of equal cheapness, the most recent one
1256 goes in front, except that the first element in the list
1257 remains first unless a cheaper element is added. The order of
1258 pseudo-registers does not matter, as canon_reg will be called to
1259 find the cheapest when a register is retrieved from the table.
1261 The in_memory field in the hash table element is set to 0.
1262 The caller must set it nonzero if appropriate.
1264 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1265 and if insert_regs returns a nonzero value
1266 you must then recompute its hash code before calling here.
1268 If necessary, update table showing constant values of quantities. */
1270 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1272 static struct table_elt
*
1273 insert (x
, classp
, hash
, mode
)
1275 register struct table_elt
*classp
;
1277 enum machine_mode mode
;
1279 register struct table_elt
*elt
;
1281 /* If X is a register and we haven't made a quantity for it,
1282 something is wrong. */
1283 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1286 /* If X is a hard register, show it is being put in the table. */
1287 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1289 int regno
= REGNO (x
);
1290 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1293 for (i
= regno
; i
< endregno
; i
++)
1294 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1297 /* If X is a label, show we recorded it. */
1298 if (GET_CODE (x
) == LABEL_REF
1299 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1300 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1301 recorded_label_ref
= 1;
1303 /* Put an element for X into the right hash bucket. */
1305 elt
= get_element ();
1307 elt
->cost
= COST (x
);
1308 elt
->next_same_value
= 0;
1309 elt
->prev_same_value
= 0;
1310 elt
->next_same_hash
= table
[hash
];
1311 elt
->prev_same_hash
= 0;
1312 elt
->related_value
= 0;
1315 elt
->is_const
= (CONSTANT_P (x
)
1316 /* GNU C++ takes advantage of this for `this'
1317 (and other const values). */
1318 || (RTX_UNCHANGING_P (x
)
1319 && GET_CODE (x
) == REG
1320 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1321 || FIXED_BASE_PLUS_P (x
));
1324 table
[hash
]->prev_same_hash
= elt
;
1327 /* Put it into the proper value-class. */
1330 classp
= classp
->first_same_value
;
1331 if (CHEAPER (elt
, classp
))
1332 /* Insert at the head of the class */
1334 register struct table_elt
*p
;
1335 elt
->next_same_value
= classp
;
1336 classp
->prev_same_value
= elt
;
1337 elt
->first_same_value
= elt
;
1339 for (p
= classp
; p
; p
= p
->next_same_value
)
1340 p
->first_same_value
= elt
;
1344 /* Insert not at head of the class. */
1345 /* Put it after the last element cheaper than X. */
1346 register struct table_elt
*p
, *next
;
1347 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1349 /* Put it after P and before NEXT. */
1350 elt
->next_same_value
= next
;
1352 next
->prev_same_value
= elt
;
1353 elt
->prev_same_value
= p
;
1354 p
->next_same_value
= elt
;
1355 elt
->first_same_value
= classp
;
1359 elt
->first_same_value
= elt
;
1361 /* If this is a constant being set equivalent to a register or a register
1362 being set equivalent to a constant, note the constant equivalence.
1364 If this is a constant, it cannot be equivalent to a different constant,
1365 and a constant is the only thing that can be cheaper than a register. So
1366 we know the register is the head of the class (before the constant was
1369 If this is a register that is not already known equivalent to a
1370 constant, we must check the entire class.
1372 If this is a register that is already known equivalent to an insn,
1373 update `qty_const_insn' to show that `this_insn' is the latest
1374 insn making that quantity equivalent to the constant. */
1376 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1377 && GET_CODE (x
) != REG
)
1379 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1380 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1381 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1384 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]]
1387 register struct table_elt
*p
;
1389 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1391 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1393 qty_const
[reg_qty
[REGNO (x
)]]
1394 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1395 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1401 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1402 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1403 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1405 /* If this is a constant with symbolic value,
1406 and it has a term with an explicit integer value,
1407 link it up with related expressions. */
1408 if (GET_CODE (x
) == CONST
)
1410 rtx subexp
= get_related_value (x
);
1412 struct table_elt
*subelt
, *subelt_prev
;
1416 /* Get the integer-free subexpression in the hash table. */
1417 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1418 subelt
= lookup (subexp
, subhash
, mode
);
1420 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1421 /* Initialize SUBELT's circular chain if it has none. */
1422 if (subelt
->related_value
== 0)
1423 subelt
->related_value
= subelt
;
1424 /* Find the element in the circular chain that precedes SUBELT. */
1425 subelt_prev
= subelt
;
1426 while (subelt_prev
->related_value
!= subelt
)
1427 subelt_prev
= subelt_prev
->related_value
;
1428 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1429 This way the element that follows SUBELT is the oldest one. */
1430 elt
->related_value
= subelt_prev
->related_value
;
1431 subelt_prev
->related_value
= elt
;
1438 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1439 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1440 the two classes equivalent.
1442 CLASS1 will be the surviving class; CLASS2 should not be used after this
1445 Any invalid entries in CLASS2 will not be copied. */
1448 merge_equiv_classes (class1
, class2
)
1449 struct table_elt
*class1
, *class2
;
1451 struct table_elt
*elt
, *next
, *new;
1453 /* Ensure we start with the head of the classes. */
1454 class1
= class1
->first_same_value
;
1455 class2
= class2
->first_same_value
;
1457 /* If they were already equal, forget it. */
1458 if (class1
== class2
)
1461 for (elt
= class2
; elt
; elt
= next
)
1465 enum machine_mode mode
= elt
->mode
;
1467 next
= elt
->next_same_value
;
1469 /* Remove old entry, make a new one in CLASS1's class.
1470 Don't do this for invalid entries as we cannot find their
1471 hash code (it also isn't necessary). */
1472 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1474 hash_arg_in_memory
= 0;
1475 hash_arg_in_struct
= 0;
1476 hash
= HASH (exp
, mode
);
1478 if (GET_CODE (exp
) == REG
)
1479 delete_reg_equiv (REGNO (exp
));
1481 remove_from_table (elt
, hash
);
1483 if (insert_regs (exp
, class1
, 0))
1485 rehash_using_reg (exp
);
1486 hash
= HASH (exp
, mode
);
1488 new = insert (exp
, class1
, hash
, mode
);
1489 new->in_memory
= hash_arg_in_memory
;
1490 new->in_struct
= hash_arg_in_struct
;
1495 /* Remove from the hash table, or mark as invalid,
1496 all expressions whose values could be altered by storing in X.
1497 X is a register, a subreg, or a memory reference with nonvarying address
1498 (because, when a memory reference with a varying address is stored in,
1499 all memory references are removed by invalidate_memory
1500 so specific invalidation is superfluous).
1501 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1502 instead of just the amount indicated by the mode of X. This is only used
1503 for bitfield stores into memory.
1505 A nonvarying address may be just a register or just
1506 a symbol reference, or it may be either of those plus
1507 a numeric offset. */
1510 invalidate (x
, full_mode
)
1512 enum machine_mode full_mode
;
1515 register struct table_elt
*p
;
1517 /* If X is a register, dependencies on its contents
1518 are recorded through the qty number mechanism.
1519 Just change the qty number of the register,
1520 mark it as invalid for expressions that refer to it,
1521 and remove it itself. */
1523 if (GET_CODE (x
) == REG
)
1525 register int regno
= REGNO (x
);
1526 register unsigned hash
= HASH (x
, GET_MODE (x
));
1528 /* Remove REGNO from any quantity list it might be on and indicate
1529 that it's value might have changed. If it is a pseudo, remove its
1530 entry from the hash table.
1532 For a hard register, we do the first two actions above for any
1533 additional hard registers corresponding to X. Then, if any of these
1534 registers are in the table, we must remove any REG entries that
1535 overlap these registers. */
1537 delete_reg_equiv (regno
);
1540 if (regno
>= FIRST_PSEUDO_REGISTER
)
1542 /* Because a register can be referenced in more than one mode,
1543 we might have to remove more than one table entry. */
1545 struct table_elt
*elt
;
1547 while (elt
= lookup_for_remove (x
, hash
, GET_MODE (x
)))
1548 remove_from_table (elt
, hash
);
1552 HOST_WIDE_INT in_table
1553 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1554 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1555 int tregno
, tendregno
;
1556 register struct table_elt
*p
, *next
;
1558 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1560 for (i
= regno
+ 1; i
< endregno
; i
++)
1562 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1563 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1564 delete_reg_equiv (i
);
1569 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1570 for (p
= table
[hash
]; p
; p
= next
)
1572 next
= p
->next_same_hash
;
1574 if (GET_CODE (p
->exp
) != REG
1575 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1578 tregno
= REGNO (p
->exp
);
1580 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1581 if (tendregno
> regno
&& tregno
< endregno
)
1582 remove_from_table (p
, hash
);
1589 if (GET_CODE (x
) == SUBREG
)
1591 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1593 invalidate (SUBREG_REG (x
), VOIDmode
);
1597 /* X is not a register; it must be a memory reference with
1598 a nonvarying address. Remove all hash table elements
1599 that refer to overlapping pieces of memory. */
1601 if (GET_CODE (x
) != MEM
)
1604 if (full_mode
== VOIDmode
)
1605 full_mode
= GET_MODE (x
);
1607 for (i
= 0; i
< NBUCKETS
; i
++)
1609 register struct table_elt
*next
;
1610 for (p
= table
[i
]; p
; p
= next
)
1612 next
= p
->next_same_hash
;
1613 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1614 than checking all the aliases). */
1616 && (GET_CODE (p
->exp
) != MEM
1617 || true_dependence (x
, full_mode
, p
->exp
, cse_rtx_varies_p
)))
1618 remove_from_table (p
, i
);
1623 /* Remove all expressions that refer to register REGNO,
1624 since they are already invalid, and we are about to
1625 mark that register valid again and don't want the old
1626 expressions to reappear as valid. */
1629 remove_invalid_refs (regno
)
1633 register struct table_elt
*p
, *next
;
1635 for (i
= 0; i
< NBUCKETS
; i
++)
1636 for (p
= table
[i
]; p
; p
= next
)
1638 next
= p
->next_same_hash
;
1639 if (GET_CODE (p
->exp
) != REG
1640 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1641 remove_from_table (p
, i
);
1645 /* Recompute the hash codes of any valid entries in the hash table that
1646 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1648 This is called when we make a jump equivalence. */
1651 rehash_using_reg (x
)
1655 struct table_elt
*p
, *next
;
1658 if (GET_CODE (x
) == SUBREG
)
1661 /* If X is not a register or if the register is known not to be in any
1662 valid entries in the table, we have no work to do. */
1664 if (GET_CODE (x
) != REG
1665 || reg_in_table
[REGNO (x
)] < 0
1666 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1669 /* Scan all hash chains looking for valid entries that mention X.
1670 If we find one and it is in the wrong hash chain, move it. We can skip
1671 objects that are registers, since they are handled specially. */
1673 for (i
= 0; i
< NBUCKETS
; i
++)
1674 for (p
= table
[i
]; p
; p
= next
)
1676 next
= p
->next_same_hash
;
1677 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1678 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1679 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1681 if (p
->next_same_hash
)
1682 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1684 if (p
->prev_same_hash
)
1685 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1687 table
[i
] = p
->next_same_hash
;
1689 p
->next_same_hash
= table
[hash
];
1690 p
->prev_same_hash
= 0;
1692 table
[hash
]->prev_same_hash
= p
;
1698 /* Remove from the hash table any expression that is a call-clobbered
1699 register. Also update their TICK values. */
1702 invalidate_for_call ()
1704 int regno
, endregno
;
1707 struct table_elt
*p
, *next
;
1710 /* Go through all the hard registers. For each that is clobbered in
1711 a CALL_INSN, remove the register from quantity chains and update
1712 reg_tick if defined. Also see if any of these registers is currently
1715 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1716 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1718 delete_reg_equiv (regno
);
1719 if (reg_tick
[regno
] >= 0)
1722 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1725 /* In the case where we have no call-clobbered hard registers in the
1726 table, we are done. Otherwise, scan the table and remove any
1727 entry that overlaps a call-clobbered register. */
1730 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1731 for (p
= table
[hash
]; p
; p
= next
)
1733 next
= p
->next_same_hash
;
1737 remove_from_table (p
, hash
);
1741 if (GET_CODE (p
->exp
) != REG
1742 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1745 regno
= REGNO (p
->exp
);
1746 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1748 for (i
= regno
; i
< endregno
; i
++)
1749 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1751 remove_from_table (p
, hash
);
1757 /* Given an expression X of type CONST,
1758 and ELT which is its table entry (or 0 if it
1759 is not in the hash table),
1760 return an alternate expression for X as a register plus integer.
1761 If none can be found, return 0. */
1764 use_related_value (x
, elt
)
1766 struct table_elt
*elt
;
1768 register struct table_elt
*relt
= 0;
1769 register struct table_elt
*p
, *q
;
1770 HOST_WIDE_INT offset
;
1772 /* First, is there anything related known?
1773 If we have a table element, we can tell from that.
1774 Otherwise, must look it up. */
1776 if (elt
!= 0 && elt
->related_value
!= 0)
1778 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1780 rtx subexp
= get_related_value (x
);
1782 relt
= lookup (subexp
,
1783 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1790 /* Search all related table entries for one that has an
1791 equivalent register. */
1796 /* This loop is strange in that it is executed in two different cases.
1797 The first is when X is already in the table. Then it is searching
1798 the RELATED_VALUE list of X's class (RELT). The second case is when
1799 X is not in the table. Then RELT points to a class for the related
1802 Ensure that, whatever case we are in, that we ignore classes that have
1803 the same value as X. */
1805 if (rtx_equal_p (x
, p
->exp
))
1808 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1809 if (GET_CODE (q
->exp
) == REG
)
1815 p
= p
->related_value
;
1817 /* We went all the way around, so there is nothing to be found.
1818 Alternatively, perhaps RELT was in the table for some other reason
1819 and it has no related values recorded. */
1820 if (p
== relt
|| p
== 0)
1827 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1828 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1829 return plus_constant (q
->exp
, offset
);
1832 /* Hash an rtx. We are careful to make sure the value is never negative.
1833 Equivalent registers hash identically.
1834 MODE is used in hashing for CONST_INTs only;
1835 otherwise the mode of X is used.
1837 Store 1 in do_not_record if any subexpression is volatile.
1839 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1840 which does not have the RTX_UNCHANGING_P bit set.
1841 In this case, also store 1 in hash_arg_in_struct
1842 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1844 Note that cse_insn knows that the hash code of a MEM expression
1845 is just (int) MEM plus the hash code of the address. */
1848 canon_hash (x
, mode
)
1850 enum machine_mode mode
;
1853 register unsigned hash
= 0;
1854 register enum rtx_code code
;
1857 /* repeat is used to turn tail-recursion into iteration. */
1862 code
= GET_CODE (x
);
1867 register int regno
= REGNO (x
);
1869 /* On some machines, we can't record any non-fixed hard register,
1870 because extending its life will cause reload problems. We
1871 consider ap, fp, and sp to be fixed for this purpose.
1872 On all machines, we can't record any global registers. */
1874 if (regno
< FIRST_PSEUDO_REGISTER
1875 && (global_regs
[regno
]
1876 || (SMALL_REGISTER_CLASSES
1877 && ! fixed_regs
[regno
]
1878 && regno
!= FRAME_POINTER_REGNUM
1879 && regno
!= HARD_FRAME_POINTER_REGNUM
1880 && regno
!= ARG_POINTER_REGNUM
1881 && regno
!= STACK_POINTER_REGNUM
)))
1886 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1892 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1893 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1898 /* This is like the general case, except that it only counts
1899 the integers representing the constant. */
1900 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1901 if (GET_MODE (x
) != VOIDmode
)
1902 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1904 unsigned tem
= XINT (x
, i
);
1908 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
1909 + (unsigned) CONST_DOUBLE_HIGH (x
));
1912 /* Assume there is only one rtx object for any given label. */
1915 += ((unsigned) LABEL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XEXP (x
, 0);
1920 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XSTR (x
, 0);
1924 if (MEM_VOLATILE_P (x
))
1929 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
1931 hash_arg_in_memory
= 1;
1932 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1934 /* Now that we have already found this special case,
1935 might as well speed it up as much as possible. */
1936 hash
+= (unsigned) MEM
;
1947 case UNSPEC_VOLATILE
:
1952 if (MEM_VOLATILE_P (x
))
1963 i
= GET_RTX_LENGTH (code
) - 1;
1964 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1965 fmt
= GET_RTX_FORMAT (code
);
1970 rtx tem
= XEXP (x
, i
);
1972 /* If we are about to do the last recursive call
1973 needed at this level, change it into iteration.
1974 This function is called enough to be worth it. */
1980 hash
+= canon_hash (tem
, 0);
1982 else if (fmt
[i
] == 'E')
1983 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1984 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1985 else if (fmt
[i
] == 's')
1987 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
1992 else if (fmt
[i
] == 'i')
1994 register unsigned tem
= XINT (x
, i
);
1997 else if (fmt
[i
] == '0')
2005 /* Like canon_hash but with no side effects. */
2010 enum machine_mode mode
;
2012 int save_do_not_record
= do_not_record
;
2013 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2014 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2015 unsigned hash
= canon_hash (x
, mode
);
2016 hash_arg_in_memory
= save_hash_arg_in_memory
;
2017 hash_arg_in_struct
= save_hash_arg_in_struct
;
2018 do_not_record
= save_do_not_record
;
2022 /* Return 1 iff X and Y would canonicalize into the same thing,
2023 without actually constructing the canonicalization of either one.
2024 If VALIDATE is nonzero,
2025 we assume X is an expression being processed from the rtl
2026 and Y was found in the hash table. We check register refs
2027 in Y for being marked as valid.
2029 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2030 that is known to be in the register. Ordinarily, we don't allow them
2031 to match, because letting them match would cause unpredictable results
2032 in all the places that search a hash table chain for an equivalent
2033 for a given value. A possible equivalent that has different structure
2034 has its hash code computed from different data. Whether the hash code
2035 is the same as that of the the given value is pure luck. */
2038 exp_equiv_p (x
, y
, validate
, equal_values
)
2044 register enum rtx_code code
;
2047 /* Note: it is incorrect to assume an expression is equivalent to itself
2048 if VALIDATE is nonzero. */
2049 if (x
== y
&& !validate
)
2051 if (x
== 0 || y
== 0)
2054 code
= GET_CODE (x
);
2055 if (code
!= GET_CODE (y
))
2060 /* If X is a constant and Y is a register or vice versa, they may be
2061 equivalent. We only have to validate if Y is a register. */
2062 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2063 && REGNO_QTY_VALID_P (REGNO (y
))
2064 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2065 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2066 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2069 if (CONSTANT_P (y
) && code
== REG
2070 && REGNO_QTY_VALID_P (REGNO (x
))
2071 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2072 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2078 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2079 if (GET_MODE (x
) != GET_MODE (y
))
2089 return INTVAL (x
) == INTVAL (y
);
2092 return XEXP (x
, 0) == XEXP (y
, 0);
2095 return XSTR (x
, 0) == XSTR (y
, 0);
2099 int regno
= REGNO (y
);
2101 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2102 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2105 /* If the quantities are not the same, the expressions are not
2106 equivalent. If there are and we are not to validate, they
2107 are equivalent. Otherwise, ensure all regs are up-to-date. */
2109 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2115 for (i
= regno
; i
< endregno
; i
++)
2116 if (reg_in_table
[i
] != reg_tick
[i
])
2122 /* For commutative operations, check both orders. */
2130 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2131 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2132 validate
, equal_values
))
2133 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2134 validate
, equal_values
)
2135 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2136 validate
, equal_values
)));
2142 /* Compare the elements. If any pair of corresponding elements
2143 fail to match, return 0 for the whole things. */
2145 fmt
= GET_RTX_FORMAT (code
);
2146 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2151 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2156 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2158 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2159 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2160 validate
, equal_values
))
2165 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2170 if (XINT (x
, i
) != XINT (y
, i
))
2175 if (XWINT (x
, i
) != XWINT (y
, i
))
2190 /* Return 1 iff any subexpression of X matches Y.
2191 Here we do not require that X or Y be valid (for registers referred to)
2192 for being in the hash table. */
2199 register enum rtx_code code
;
2205 if (x
== 0 || y
== 0)
2208 code
= GET_CODE (x
);
2209 /* If X as a whole has the same code as Y, they may match.
2211 if (code
== GET_CODE (y
))
2213 if (exp_equiv_p (x
, y
, 0, 1))
2217 /* X does not match, so try its subexpressions. */
2219 fmt
= GET_RTX_FORMAT (code
);
2220 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2229 if (refers_to_p (XEXP (x
, i
), y
))
2232 else if (fmt
[i
] == 'E')
2235 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2236 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2243 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2244 set PBASE, PSTART, and PEND which correspond to the base of the address,
2245 the starting offset, and ending offset respectively.
2247 ADDR is known to be a nonvarying address. */
2249 /* ??? Despite what the comments say, this function is in fact frequently
2250 passed varying addresses. This does not appear to cause any problems. */
2253 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2257 HOST_WIDE_INT
*pstart
, *pend
;
2260 HOST_WIDE_INT start
, end
;
2266 /* Registers with nonvarying addresses usually have constant equivalents;
2267 but the frame pointer register is also possible. */
2268 if (GET_CODE (base
) == REG
2270 && REGNO_QTY_VALID_P (REGNO (base
))
2271 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2272 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2273 base
= qty_const
[reg_qty
[REGNO (base
)]];
2274 else if (GET_CODE (base
) == PLUS
2275 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2276 && GET_CODE (XEXP (base
, 0)) == REG
2278 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2279 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2280 == GET_MODE (XEXP (base
, 0)))
2281 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2283 start
= INTVAL (XEXP (base
, 1));
2284 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2286 /* This can happen as the result of virtual register instantiation,
2287 if the initial offset is too large to be a valid address. */
2288 else if (GET_CODE (base
) == PLUS
2289 && GET_CODE (XEXP (base
, 0)) == REG
2290 && GET_CODE (XEXP (base
, 1)) == REG
2292 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2293 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2294 == GET_MODE (XEXP (base
, 0)))
2295 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]]
2296 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2297 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 1))]]
2298 == GET_MODE (XEXP (base
, 1)))
2299 && qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]])
2301 rtx tem
= qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]];
2302 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2304 /* One of the two values must be a constant. */
2305 if (GET_CODE (base
) != CONST_INT
)
2307 if (GET_CODE (tem
) != CONST_INT
)
2309 start
= INTVAL (tem
);
2313 start
= INTVAL (base
);
2318 /* Handle everything that we can find inside an address that has been
2319 viewed as constant. */
2323 /* If no part of this switch does a "continue", the code outside
2324 will exit this loop. */
2326 switch (GET_CODE (base
))
2329 /* By definition, operand1 of a LO_SUM is the associated constant
2330 address. Use the associated constant address as the base
2332 base
= XEXP (base
, 1);
2336 /* Strip off CONST. */
2337 base
= XEXP (base
, 0);
2341 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2343 start
+= INTVAL (XEXP (base
, 1));
2344 base
= XEXP (base
, 0);
2350 /* Handle the case of an AND which is the negative of a power of
2351 two. This is used to represent unaligned memory operations. */
2352 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2353 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2355 set_nonvarying_address_components (XEXP (base
, 0), size
,
2356 pbase
, pstart
, pend
);
2358 /* Assume the worst misalignment. START is affected, but not
2359 END, so compensate but adjusting SIZE. Don't lose any
2360 constant we already had. */
2362 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2363 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2376 if (GET_CODE (base
) == CONST_INT
)
2378 start
+= INTVAL (base
);
2384 /* Set the return values. */
2390 /* Return 1 if X has a value that can vary even between two
2391 executions of the program. 0 means X can be compared reliably
2392 against certain constants or near-constants. */
2395 cse_rtx_varies_p (x
)
2398 /* We need not check for X and the equivalence class being of the same
2399 mode because if X is equivalent to a constant in some mode, it
2400 doesn't vary in any mode. */
2402 if (GET_CODE (x
) == REG
2403 && REGNO_QTY_VALID_P (REGNO (x
))
2404 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2405 && qty_const
[reg_qty
[REGNO (x
)]] != 0)
2408 if (GET_CODE (x
) == PLUS
2409 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2410 && GET_CODE (XEXP (x
, 0)) == REG
2411 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2412 && (GET_MODE (XEXP (x
, 0))
2413 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2414 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]])
2417 /* This can happen as the result of virtual register instantiation, if
2418 the initial constant is too large to be a valid address. This gives
2419 us a three instruction sequence, load large offset into a register,
2420 load fp minus a constant into a register, then a MEM which is the
2421 sum of the two `constant' registers. */
2422 if (GET_CODE (x
) == PLUS
2423 && GET_CODE (XEXP (x
, 0)) == REG
2424 && GET_CODE (XEXP (x
, 1)) == REG
2425 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2426 && (GET_MODE (XEXP (x
, 0))
2427 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2428 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]]
2429 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1)))
2430 && (GET_MODE (XEXP (x
, 1))
2431 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 1))]])
2432 && qty_const
[reg_qty
[REGNO (XEXP (x
, 1))]])
2435 return rtx_varies_p (x
);
2438 /* Canonicalize an expression:
2439 replace each register reference inside it
2440 with the "oldest" equivalent register.
2442 If INSN is non-zero and we are replacing a pseudo with a hard register
2443 or vice versa, validate_change is used to ensure that INSN remains valid
2444 after we make our substitution. The calls are made with IN_GROUP non-zero
2445 so apply_change_group must be called upon the outermost return from this
2446 function (unless INSN is zero). The result of apply_change_group can
2447 generally be discarded since the changes we are making are optional. */
2455 register enum rtx_code code
;
2461 code
= GET_CODE (x
);
2479 /* Never replace a hard reg, because hard regs can appear
2480 in more than one machine mode, and we must preserve the mode
2481 of each occurrence. Also, some hard regs appear in
2482 MEMs that are shared and mustn't be altered. Don't try to
2483 replace any reg that maps to a reg of class NO_REGS. */
2484 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2485 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2488 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2489 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2490 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2491 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2498 fmt
= GET_RTX_FORMAT (code
);
2499 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2505 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2508 /* If replacing pseudo with hard reg or vice versa, ensure the
2509 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2510 if (insn
!= 0 && new != 0
2511 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2512 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2513 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2514 || (insn_code
= recog_memoized (insn
)) < 0
2515 || insn_n_dups
[insn_code
] > 0))
2516 validate_change (insn
, &XEXP (x
, i
), new, 1);
2520 else if (fmt
[i
] == 'E')
2521 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2522 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2528 /* LOC is a location within INSN that is an operand address (the contents of
2529 a MEM). Find the best equivalent address to use that is valid for this
2532 On most CISC machines, complicated address modes are costly, and rtx_cost
2533 is a good approximation for that cost. However, most RISC machines have
2534 only a few (usually only one) memory reference formats. If an address is
2535 valid at all, it is often just as cheap as any other address. Hence, for
2536 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2537 costs of various addresses. For two addresses of equal cost, choose the one
2538 with the highest `rtx_cost' value as that has the potential of eliminating
2539 the most insns. For equal costs, we choose the first in the equivalence
2540 class. Note that we ignore the fact that pseudo registers are cheaper
2541 than hard registers here because we would also prefer the pseudo registers.
2545 find_best_addr (insn
, loc
)
2549 struct table_elt
*elt
, *p
;
2552 int found_better
= 1;
2553 int save_do_not_record
= do_not_record
;
2554 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2555 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2560 /* Do not try to replace constant addresses or addresses of local and
2561 argument slots. These MEM expressions are made only once and inserted
2562 in many instructions, as well as being used to control symbol table
2563 output. It is not safe to clobber them.
2565 There are some uncommon cases where the address is already in a register
2566 for some reason, but we cannot take advantage of that because we have
2567 no easy way to unshare the MEM. In addition, looking up all stack
2568 addresses is costly. */
2569 if ((GET_CODE (addr
) == PLUS
2570 && GET_CODE (XEXP (addr
, 0)) == REG
2571 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2572 && (regno
= REGNO (XEXP (addr
, 0)),
2573 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2574 || regno
== ARG_POINTER_REGNUM
))
2575 || (GET_CODE (addr
) == REG
2576 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2577 || regno
== HARD_FRAME_POINTER_REGNUM
2578 || regno
== ARG_POINTER_REGNUM
))
2579 || GET_CODE (addr
) == ADDRESSOF
2580 || CONSTANT_ADDRESS_P (addr
))
2583 /* If this address is not simply a register, try to fold it. This will
2584 sometimes simplify the expression. Many simplifications
2585 will not be valid, but some, usually applying the associative rule, will
2586 be valid and produce better code. */
2587 if (GET_CODE (addr
) != REG
)
2589 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2593 && (ADDRESS_COST (folded
) < ADDRESS_COST (addr
)
2594 || (ADDRESS_COST (folded
) == ADDRESS_COST (addr
)
2595 && rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)))
2597 && rtx_cost (folded
, MEM
) < rtx_cost (addr
, MEM
)
2599 && validate_change (insn
, loc
, folded
, 0))
2603 /* If this address is not in the hash table, we can't look for equivalences
2604 of the whole address. Also, ignore if volatile. */
2607 hash
= HASH (addr
, Pmode
);
2608 addr_volatile
= do_not_record
;
2609 do_not_record
= save_do_not_record
;
2610 hash_arg_in_memory
= save_hash_arg_in_memory
;
2611 hash_arg_in_struct
= save_hash_arg_in_struct
;
2616 elt
= lookup (addr
, hash
, Pmode
);
2618 #ifndef ADDRESS_COST
2621 our_cost
= elt
->cost
;
2623 /* Find the lowest cost below ours that works. */
2624 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2625 if (elt
->cost
< our_cost
2626 && (GET_CODE (elt
->exp
) == REG
2627 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2628 && validate_change (insn
, loc
,
2629 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2636 /* We need to find the best (under the criteria documented above) entry
2637 in the class that is valid. We use the `flag' field to indicate
2638 choices that were invalid and iterate until we can't find a better
2639 one that hasn't already been tried. */
2641 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2644 while (found_better
)
2646 int best_addr_cost
= ADDRESS_COST (*loc
);
2647 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2648 struct table_elt
*best_elt
= elt
;
2651 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2653 && (GET_CODE (p
->exp
) == REG
2654 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2655 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2656 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2657 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2660 best_addr_cost
= ADDRESS_COST (p
->exp
);
2661 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2667 if (validate_change (insn
, loc
,
2668 canon_reg (copy_rtx (best_elt
->exp
),
2677 /* If the address is a binary operation with the first operand a register
2678 and the second a constant, do the same as above, but looking for
2679 equivalences of the register. Then try to simplify before checking for
2680 the best address to use. This catches a few cases: First is when we
2681 have REG+const and the register is another REG+const. We can often merge
2682 the constants and eliminate one insn and one register. It may also be
2683 that a machine has a cheap REG+REG+const. Finally, this improves the
2684 code on the Alpha for unaligned byte stores. */
2686 if (flag_expensive_optimizations
2687 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2688 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2689 && GET_CODE (XEXP (*loc
, 0)) == REG
2690 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2692 rtx c
= XEXP (*loc
, 1);
2695 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2696 do_not_record
= save_do_not_record
;
2697 hash_arg_in_memory
= save_hash_arg_in_memory
;
2698 hash_arg_in_struct
= save_hash_arg_in_struct
;
2700 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2704 /* We need to find the best (under the criteria documented above) entry
2705 in the class that is valid. We use the `flag' field to indicate
2706 choices that were invalid and iterate until we can't find a better
2707 one that hasn't already been tried. */
2709 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2712 while (found_better
)
2714 int best_addr_cost
= ADDRESS_COST (*loc
);
2715 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2716 struct table_elt
*best_elt
= elt
;
2717 rtx best_rtx
= *loc
;
2720 /* This is at worst case an O(n^2) algorithm, so limit our search
2721 to the first 32 elements on the list. This avoids trouble
2722 compiling code with very long basic blocks that can easily
2723 call cse_gen_binary so many times that we run out of memory. */
2726 for (p
= elt
->first_same_value
, count
= 0;
2728 p
= p
->next_same_value
, count
++)
2730 && (GET_CODE (p
->exp
) == REG
2731 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2733 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2735 if ((ADDRESS_COST (new) < best_addr_cost
2736 || (ADDRESS_COST (new) == best_addr_cost
2737 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2740 best_addr_cost
= ADDRESS_COST (new);
2741 best_rtx_cost
= (COST (new) + 1) >> 1;
2749 if (validate_change (insn
, loc
,
2750 canon_reg (copy_rtx (best_rtx
),
2761 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2762 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2763 what values are being compared.
2765 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2766 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2767 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2768 compared to produce cc0.
2770 The return value is the comparison operator and is either the code of
2771 A or the code corresponding to the inverse of the comparison. */
2773 static enum rtx_code
2774 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2777 enum machine_mode
*pmode1
, *pmode2
;
2781 arg1
= *parg1
, arg2
= *parg2
;
2783 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2785 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2787 /* Set non-zero when we find something of interest. */
2789 int reverse_code
= 0;
2790 struct table_elt
*p
= 0;
2792 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2793 On machines with CC0, this is the only case that can occur, since
2794 fold_rtx will return the COMPARE or item being compared with zero
2797 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2800 /* If ARG1 is a comparison operator and CODE is testing for
2801 STORE_FLAG_VALUE, get the inner arguments. */
2803 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2806 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2807 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2808 #ifdef FLOAT_STORE_FLAG_VALUE
2809 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2810 && FLOAT_STORE_FLAG_VALUE
< 0)
2815 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2816 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2817 #ifdef FLOAT_STORE_FLAG_VALUE
2818 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2819 && FLOAT_STORE_FLAG_VALUE
< 0)
2822 x
= arg1
, reverse_code
= 1;
2825 /* ??? We could also check for
2827 (ne (and (eq (...) (const_int 1))) (const_int 0))
2829 and related forms, but let's wait until we see them occurring. */
2832 /* Look up ARG1 in the hash table and see if it has an equivalence
2833 that lets us see what is being compared. */
2834 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2836 if (p
) p
= p
->first_same_value
;
2838 for (; p
; p
= p
->next_same_value
)
2840 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2842 /* If the entry isn't valid, skip it. */
2843 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2846 if (GET_CODE (p
->exp
) == COMPARE
2847 /* Another possibility is that this machine has a compare insn
2848 that includes the comparison code. In that case, ARG1 would
2849 be equivalent to a comparison operation that would set ARG1 to
2850 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2851 ORIG_CODE is the actual comparison being done; if it is an EQ,
2852 we must reverse ORIG_CODE. On machine with a negative value
2853 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2856 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2857 && (GET_MODE_BITSIZE (inner_mode
)
2858 <= HOST_BITS_PER_WIDE_INT
)
2859 && (STORE_FLAG_VALUE
2860 & ((HOST_WIDE_INT
) 1
2861 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2862 #ifdef FLOAT_STORE_FLAG_VALUE
2864 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2865 && FLOAT_STORE_FLAG_VALUE
< 0)
2868 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2873 else if ((code
== EQ
2875 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2876 && (GET_MODE_BITSIZE (inner_mode
)
2877 <= HOST_BITS_PER_WIDE_INT
)
2878 && (STORE_FLAG_VALUE
2879 & ((HOST_WIDE_INT
) 1
2880 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2881 #ifdef FLOAT_STORE_FLAG_VALUE
2883 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2884 && FLOAT_STORE_FLAG_VALUE
< 0)
2887 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2894 /* If this is fp + constant, the equivalent is a better operand since
2895 it may let us predict the value of the comparison. */
2896 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2903 /* If we didn't find a useful equivalence for ARG1, we are done.
2904 Otherwise, set up for the next iteration. */
2908 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2909 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2910 code
= GET_CODE (x
);
2913 code
= reverse_condition (code
);
2916 /* Return our results. Return the modes from before fold_rtx
2917 because fold_rtx might produce const_int, and then it's too late. */
2918 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2919 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2924 /* Try to simplify a unary operation CODE whose output mode is to be
2925 MODE with input operand OP whose mode was originally OP_MODE.
2926 Return zero if no simplification can be made. */
2929 simplify_unary_operation (code
, mode
, op
, op_mode
)
2931 enum machine_mode mode
;
2933 enum machine_mode op_mode
;
2935 register int width
= GET_MODE_BITSIZE (mode
);
2937 /* The order of these tests is critical so that, for example, we don't
2938 check the wrong mode (input vs. output) for a conversion operation,
2939 such as FIX. At some point, this should be simplified. */
2941 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2943 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
2944 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2946 HOST_WIDE_INT hv
, lv
;
2949 if (GET_CODE (op
) == CONST_INT
)
2950 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2952 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2954 #ifdef REAL_ARITHMETIC
2955 REAL_VALUE_FROM_INT (d
, lv
, hv
, mode
);
2959 d
= (double) (~ hv
);
2960 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2961 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2962 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
2968 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2969 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2970 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
2972 #endif /* REAL_ARITHMETIC */
2973 d
= real_value_truncate (mode
, d
);
2974 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2976 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
2977 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2979 HOST_WIDE_INT hv
, lv
;
2982 if (GET_CODE (op
) == CONST_INT
)
2983 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2985 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2987 if (op_mode
== VOIDmode
)
2989 /* We don't know how to interpret negative-looking numbers in
2990 this case, so don't try to fold those. */
2994 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
2997 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
2999 #ifdef REAL_ARITHMETIC
3000 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
, mode
);
3003 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3004 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3005 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3006 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3007 #endif /* REAL_ARITHMETIC */
3008 d
= real_value_truncate (mode
, d
);
3009 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3013 if (GET_CODE (op
) == CONST_INT
3014 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3016 register HOST_WIDE_INT arg0
= INTVAL (op
);
3017 register HOST_WIDE_INT val
;
3030 val
= (arg0
>= 0 ? arg0
: - arg0
);
3034 /* Don't use ffs here. Instead, get low order bit and then its
3035 number. If arg0 is zero, this will return 0, as desired. */
3036 arg0
&= GET_MODE_MASK (mode
);
3037 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3045 if (op_mode
== VOIDmode
)
3047 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3049 /* If we were really extending the mode,
3050 we would have to distinguish between zero-extension
3051 and sign-extension. */
3052 if (width
!= GET_MODE_BITSIZE (op_mode
))
3056 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3057 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3063 if (op_mode
== VOIDmode
)
3065 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3067 /* If we were really extending the mode,
3068 we would have to distinguish between zero-extension
3069 and sign-extension. */
3070 if (width
!= GET_MODE_BITSIZE (op_mode
))
3074 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3077 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3079 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3080 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3093 /* Clear the bits that don't belong in our mode,
3094 unless they and our sign bit are all one.
3095 So we get either a reasonable negative value or a reasonable
3096 unsigned value for this mode. */
3097 if (width
< HOST_BITS_PER_WIDE_INT
3098 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3099 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3100 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3102 return GEN_INT (val
);
3105 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3106 for a DImode operation on a CONST_INT. */
3107 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3108 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3110 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3112 if (GET_CODE (op
) == CONST_DOUBLE
)
3113 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3115 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3125 neg_double (l1
, h1
, &lv
, &hv
);
3130 neg_double (l1
, h1
, &lv
, &hv
);
3138 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3140 lv
= exact_log2 (l1
& (-l1
)) + 1;
3144 /* This is just a change-of-mode, so do nothing. */
3149 if (op_mode
== VOIDmode
3150 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3154 lv
= l1
& GET_MODE_MASK (op_mode
);
3158 if (op_mode
== VOIDmode
3159 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3163 lv
= l1
& GET_MODE_MASK (op_mode
);
3164 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3165 && (lv
& ((HOST_WIDE_INT
) 1
3166 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3167 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3169 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3180 return immed_double_const (lv
, hv
, mode
);
3183 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3184 else if (GET_CODE (op
) == CONST_DOUBLE
3185 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3191 if (setjmp (handler
))
3192 /* There used to be a warning here, but that is inadvisable.
3193 People may want to cause traps, and the natural way
3194 to do it should not get a warning. */
3197 set_float_handler (handler
);
3199 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3204 d
= REAL_VALUE_NEGATE (d
);
3208 if (REAL_VALUE_NEGATIVE (d
))
3209 d
= REAL_VALUE_NEGATE (d
);
3212 case FLOAT_TRUNCATE
:
3213 d
= real_value_truncate (mode
, d
);
3217 /* All this does is change the mode. */
3221 d
= REAL_VALUE_RNDZINT (d
);
3225 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3235 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3236 set_float_handler (NULL_PTR
);
3240 else if (GET_CODE (op
) == CONST_DOUBLE
3241 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3242 && GET_MODE_CLASS (mode
) == MODE_INT
3243 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3249 if (setjmp (handler
))
3252 set_float_handler (handler
);
3254 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3259 val
= REAL_VALUE_FIX (d
);
3263 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3270 set_float_handler (NULL_PTR
);
3272 /* Clear the bits that don't belong in our mode,
3273 unless they and our sign bit are all one.
3274 So we get either a reasonable negative value or a reasonable
3275 unsigned value for this mode. */
3276 if (width
< HOST_BITS_PER_WIDE_INT
3277 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3278 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3279 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3281 /* If this would be an entire word for the target, but is not for
3282 the host, then sign-extend on the host so that the number will look
3283 the same way on the host that it would on the target.
3285 For example, when building a 64 bit alpha hosted 32 bit sparc
3286 targeted compiler, then we want the 32 bit unsigned value -1 to be
3287 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3288 The later confuses the sparc backend. */
3290 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
3291 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
3292 val
|= ((HOST_WIDE_INT
) (-1) << width
);
3294 return GEN_INT (val
);
3297 /* This was formerly used only for non-IEEE float.
3298 eggert@twinsun.com says it is safe for IEEE also. */
3301 /* There are some simplifications we can do even if the operands
3307 /* (not (not X)) == X, similarly for NEG. */
3308 if (GET_CODE (op
) == code
)
3309 return XEXP (op
, 0);
3313 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3314 becomes just the MINUS if its mode is MODE. This allows
3315 folding switch statements on machines using casesi (such as
3317 if (GET_CODE (op
) == TRUNCATE
3318 && GET_MODE (XEXP (op
, 0)) == mode
3319 && GET_CODE (XEXP (op
, 0)) == MINUS
3320 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3321 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3322 return XEXP (op
, 0);
3324 #ifdef POINTERS_EXTEND_UNSIGNED
3325 if (! POINTERS_EXTEND_UNSIGNED
3326 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3328 return convert_memory_address (Pmode
, op
);
3332 #ifdef POINTERS_EXTEND_UNSIGNED
3334 if (POINTERS_EXTEND_UNSIGNED
3335 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3337 return convert_memory_address (Pmode
, op
);
3349 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3350 and OP1. Return 0 if no simplification is possible.
3352 Don't use this for relational operations such as EQ or LT.
3353 Use simplify_relational_operation instead. */
3356 simplify_binary_operation (code
, mode
, op0
, op1
)
3358 enum machine_mode mode
;
3361 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3363 int width
= GET_MODE_BITSIZE (mode
);
3366 /* Relational operations don't work here. We must know the mode
3367 of the operands in order to do the comparison correctly.
3368 Assuming a full word can give incorrect results.
3369 Consider comparing 128 with -128 in QImode. */
3371 if (GET_RTX_CLASS (code
) == '<')
3374 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3375 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3376 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3377 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3379 REAL_VALUE_TYPE f0
, f1
, value
;
3382 if (setjmp (handler
))
3385 set_float_handler (handler
);
3387 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3388 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3389 f0
= real_value_truncate (mode
, f0
);
3390 f1
= real_value_truncate (mode
, f1
);
3392 #ifdef REAL_ARITHMETIC
3393 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3407 #ifndef REAL_INFINITY
3414 value
= MIN (f0
, f1
);
3417 value
= MAX (f0
, f1
);
3424 value
= real_value_truncate (mode
, value
);
3425 set_float_handler (NULL_PTR
);
3426 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3428 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3430 /* We can fold some multi-word operations. */
3431 if (GET_MODE_CLASS (mode
) == MODE_INT
3432 && width
== HOST_BITS_PER_WIDE_INT
* 2
3433 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3434 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3436 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3438 if (GET_CODE (op0
) == CONST_DOUBLE
)
3439 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3441 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3443 if (GET_CODE (op1
) == CONST_DOUBLE
)
3444 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3446 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3451 /* A - B == A + (-B). */
3452 neg_double (l2
, h2
, &lv
, &hv
);
3455 /* .. fall through ... */
3458 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3462 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3465 case DIV
: case MOD
: case UDIV
: case UMOD
:
3466 /* We'd need to include tree.h to do this and it doesn't seem worth
3471 lv
= l1
& l2
, hv
= h1
& h2
;
3475 lv
= l1
| l2
, hv
= h1
| h2
;
3479 lv
= l1
^ l2
, hv
= h1
^ h2
;
3485 && ((unsigned HOST_WIDE_INT
) l1
3486 < (unsigned HOST_WIDE_INT
) l2
)))
3495 && ((unsigned HOST_WIDE_INT
) l1
3496 > (unsigned HOST_WIDE_INT
) l2
)))
3503 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3505 && ((unsigned HOST_WIDE_INT
) l1
3506 < (unsigned HOST_WIDE_INT
) l2
)))
3513 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3515 && ((unsigned HOST_WIDE_INT
) l1
3516 > (unsigned HOST_WIDE_INT
) l2
)))
3522 case LSHIFTRT
: case ASHIFTRT
:
3524 case ROTATE
: case ROTATERT
:
3525 #ifdef SHIFT_COUNT_TRUNCATED
3526 if (SHIFT_COUNT_TRUNCATED
)
3527 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3530 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3533 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3534 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3536 else if (code
== ASHIFT
)
3537 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3538 else if (code
== ROTATE
)
3539 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3540 else /* code == ROTATERT */
3541 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3548 return immed_double_const (lv
, hv
, mode
);
3551 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3552 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3554 /* Even if we can't compute a constant result,
3555 there are some cases worth simplifying. */
3560 /* In IEEE floating point, x+0 is not the same as x. Similarly
3561 for the other optimizations below. */
3562 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3563 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3566 if (op1
== CONST0_RTX (mode
))
3569 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3570 if (GET_CODE (op0
) == NEG
)
3571 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3572 else if (GET_CODE (op1
) == NEG
)
3573 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3575 /* Handle both-operands-constant cases. We can only add
3576 CONST_INTs to constants since the sum of relocatable symbols
3577 can't be handled by most assemblers. Don't add CONST_INT
3578 to CONST_INT since overflow won't be computed properly if wider
3579 than HOST_BITS_PER_WIDE_INT. */
3581 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3582 && GET_CODE (op1
) == CONST_INT
)
3583 return plus_constant (op0
, INTVAL (op1
));
3584 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3585 && GET_CODE (op0
) == CONST_INT
)
3586 return plus_constant (op1
, INTVAL (op0
));
3588 /* See if this is something like X * C - X or vice versa or
3589 if the multiplication is written as a shift. If so, we can
3590 distribute and make a new multiply, shift, or maybe just
3591 have X (if C is 2 in the example above). But don't make
3592 real multiply if we didn't have one before. */
3594 if (! FLOAT_MODE_P (mode
))
3596 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3597 rtx lhs
= op0
, rhs
= op1
;
3600 if (GET_CODE (lhs
) == NEG
)
3601 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3602 else if (GET_CODE (lhs
) == MULT
3603 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3605 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3608 else if (GET_CODE (lhs
) == ASHIFT
3609 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3610 && INTVAL (XEXP (lhs
, 1)) >= 0
3611 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3613 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3614 lhs
= XEXP (lhs
, 0);
3617 if (GET_CODE (rhs
) == NEG
)
3618 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3619 else if (GET_CODE (rhs
) == MULT
3620 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3622 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3625 else if (GET_CODE (rhs
) == ASHIFT
3626 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3627 && INTVAL (XEXP (rhs
, 1)) >= 0
3628 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3630 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3631 rhs
= XEXP (rhs
, 0);
3634 if (rtx_equal_p (lhs
, rhs
))
3636 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3637 GEN_INT (coeff0
+ coeff1
));
3638 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3642 /* If one of the operands is a PLUS or a MINUS, see if we can
3643 simplify this by the associative law.
3644 Don't use the associative law for floating point.
3645 The inaccuracy makes it nonassociative,
3646 and subtle programs can break if operations are associated. */
3648 if (INTEGRAL_MODE_P (mode
)
3649 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3650 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3651 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3657 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3658 using cc0, in which case we want to leave it as a COMPARE
3659 so we can distinguish it from a register-register-copy.
3661 In IEEE floating point, x-0 is not the same as x. */
3663 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3664 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3665 && op1
== CONST0_RTX (mode
))
3668 /* Do nothing here. */
3673 /* None of these optimizations can be done for IEEE
3675 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3676 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3679 /* We can't assume x-x is 0 even with non-IEEE floating point,
3680 but since it is zero except in very strange circumstances, we
3681 will treat it as zero with -ffast-math. */
3682 if (rtx_equal_p (op0
, op1
)
3683 && ! side_effects_p (op0
)
3684 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3685 return CONST0_RTX (mode
);
3687 /* Change subtraction from zero into negation. */
3688 if (op0
== CONST0_RTX (mode
))
3689 return gen_rtx (NEG
, mode
, op1
);
3691 /* (-1 - a) is ~a. */
3692 if (op0
== constm1_rtx
)
3693 return gen_rtx (NOT
, mode
, op1
);
3695 /* Subtracting 0 has no effect. */
3696 if (op1
== CONST0_RTX (mode
))
3699 /* See if this is something like X * C - X or vice versa or
3700 if the multiplication is written as a shift. If so, we can
3701 distribute and make a new multiply, shift, or maybe just
3702 have X (if C is 2 in the example above). But don't make
3703 real multiply if we didn't have one before. */
3705 if (! FLOAT_MODE_P (mode
))
3707 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3708 rtx lhs
= op0
, rhs
= op1
;
3711 if (GET_CODE (lhs
) == NEG
)
3712 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3713 else if (GET_CODE (lhs
) == MULT
3714 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3716 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3719 else if (GET_CODE (lhs
) == ASHIFT
3720 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3721 && INTVAL (XEXP (lhs
, 1)) >= 0
3722 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3724 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3725 lhs
= XEXP (lhs
, 0);
3728 if (GET_CODE (rhs
) == NEG
)
3729 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3730 else if (GET_CODE (rhs
) == MULT
3731 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3733 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3736 else if (GET_CODE (rhs
) == ASHIFT
3737 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3738 && INTVAL (XEXP (rhs
, 1)) >= 0
3739 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3741 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3742 rhs
= XEXP (rhs
, 0);
3745 if (rtx_equal_p (lhs
, rhs
))
3747 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3748 GEN_INT (coeff0
- coeff1
));
3749 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3753 /* (a - (-b)) -> (a + b). */
3754 if (GET_CODE (op1
) == NEG
)
3755 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3757 /* If one of the operands is a PLUS or a MINUS, see if we can
3758 simplify this by the associative law.
3759 Don't use the associative law for floating point.
3760 The inaccuracy makes it nonassociative,
3761 and subtle programs can break if operations are associated. */
3763 if (INTEGRAL_MODE_P (mode
)
3764 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3765 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3766 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3769 /* Don't let a relocatable value get a negative coeff. */
3770 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3771 return plus_constant (op0
, - INTVAL (op1
));
3773 /* (x - (x & y)) -> (x & ~y) */
3774 if (GET_CODE (op1
) == AND
)
3776 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
3777 return cse_gen_binary (AND
, mode
, op0
, gen_rtx (NOT
, mode
, XEXP (op1
, 1)));
3778 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
3779 return cse_gen_binary (AND
, mode
, op0
, gen_rtx (NOT
, mode
, XEXP (op1
, 0)));
3784 if (op1
== constm1_rtx
)
3786 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3788 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3791 /* In IEEE floating point, x*0 is not always 0. */
3792 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3793 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3794 && op1
== CONST0_RTX (mode
)
3795 && ! side_effects_p (op0
))
3798 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3799 However, ANSI says we can drop signals,
3800 so we can do this anyway. */
3801 if (op1
== CONST1_RTX (mode
))
3804 /* Convert multiply by constant power of two into shift unless
3805 we are still generating RTL. This test is a kludge. */
3806 if (GET_CODE (op1
) == CONST_INT
3807 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3808 /* If the mode is larger than the host word size, and the
3809 uppermost bit is set, then this isn't a power of two due
3810 to implicit sign extension. */
3811 && (width
<= HOST_BITS_PER_WIDE_INT
3812 || val
!= HOST_BITS_PER_WIDE_INT
- 1)
3813 && ! rtx_equal_function_value_matters
)
3814 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3816 if (GET_CODE (op1
) == CONST_DOUBLE
3817 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3821 int op1is2
, op1ism1
;
3823 if (setjmp (handler
))
3826 set_float_handler (handler
);
3827 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3828 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3829 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3830 set_float_handler (NULL_PTR
);
3832 /* x*2 is x+x and x*(-1) is -x */
3833 if (op1is2
&& GET_MODE (op0
) == mode
)
3834 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3836 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3837 return gen_rtx (NEG
, mode
, op0
);
3842 if (op1
== const0_rtx
)
3844 if (GET_CODE (op1
) == CONST_INT
3845 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3847 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3849 /* A | (~A) -> -1 */
3850 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3851 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3852 && ! side_effects_p (op0
)
3853 && GET_MODE_CLASS (mode
) != MODE_CC
)
3858 if (op1
== const0_rtx
)
3860 if (GET_CODE (op1
) == CONST_INT
3861 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3862 return gen_rtx (NOT
, mode
, op0
);
3863 if (op0
== op1
&& ! side_effects_p (op0
)
3864 && GET_MODE_CLASS (mode
) != MODE_CC
)
3869 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3871 if (GET_CODE (op1
) == CONST_INT
3872 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3874 if (op0
== op1
&& ! side_effects_p (op0
)
3875 && GET_MODE_CLASS (mode
) != MODE_CC
)
3878 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3879 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3880 && ! side_effects_p (op0
)
3881 && GET_MODE_CLASS (mode
) != MODE_CC
)
3886 /* Convert divide by power of two into shift (divide by 1 handled
3888 if (GET_CODE (op1
) == CONST_INT
3889 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3890 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3892 /* ... fall through ... */
3895 if (op1
== CONST1_RTX (mode
))
3898 /* In IEEE floating point, 0/x is not always 0. */
3899 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3900 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3901 && op0
== CONST0_RTX (mode
)
3902 && ! side_effects_p (op1
))
3905 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3906 /* Change division by a constant into multiplication. Only do
3907 this with -ffast-math until an expert says it is safe in
3909 else if (GET_CODE (op1
) == CONST_DOUBLE
3910 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3911 && op1
!= CONST0_RTX (mode
)
3915 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3917 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3919 #if defined (REAL_ARITHMETIC)
3920 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3921 return gen_rtx (MULT
, mode
, op0
,
3922 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3924 return gen_rtx (MULT
, mode
, op0
,
3925 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3933 /* Handle modulus by power of two (mod with 1 handled below). */
3934 if (GET_CODE (op1
) == CONST_INT
3935 && exact_log2 (INTVAL (op1
)) > 0)
3936 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3938 /* ... fall through ... */
3941 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3942 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3948 /* Rotating ~0 always results in ~0. */
3949 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3950 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3951 && ! side_effects_p (op1
))
3954 /* ... fall through ... */
3959 if (op1
== const0_rtx
)
3961 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3966 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3967 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3968 && ! side_effects_p (op0
))
3970 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3975 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3977 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
3978 && ! side_effects_p (op0
))
3980 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3985 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3987 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3992 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3994 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4005 /* Get the integer argument values in two forms:
4006 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4008 arg0
= INTVAL (op0
);
4009 arg1
= INTVAL (op1
);
4011 if (width
< HOST_BITS_PER_WIDE_INT
)
4013 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4014 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4017 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4018 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4021 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4022 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4030 /* Compute the value of the arithmetic. */
4035 val
= arg0s
+ arg1s
;
4039 val
= arg0s
- arg1s
;
4043 val
= arg0s
* arg1s
;
4049 val
= arg0s
/ arg1s
;
4055 val
= arg0s
% arg1s
;
4061 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4067 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4083 /* If shift count is undefined, don't fold it; let the machine do
4084 what it wants. But truncate it if the machine will do that. */
4088 #ifdef SHIFT_COUNT_TRUNCATED
4089 if (SHIFT_COUNT_TRUNCATED
)
4093 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4100 #ifdef SHIFT_COUNT_TRUNCATED
4101 if (SHIFT_COUNT_TRUNCATED
)
4105 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4112 #ifdef SHIFT_COUNT_TRUNCATED
4113 if (SHIFT_COUNT_TRUNCATED
)
4117 val
= arg0s
>> arg1
;
4119 /* Bootstrap compiler may not have sign extended the right shift.
4120 Manually extend the sign to insure bootstrap cc matches gcc. */
4121 if (arg0s
< 0 && arg1
> 0)
4122 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4131 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4132 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4140 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4141 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4145 /* Do nothing here. */
4149 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4153 val
= ((unsigned HOST_WIDE_INT
) arg0
4154 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4158 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4162 val
= ((unsigned HOST_WIDE_INT
) arg0
4163 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4170 /* Clear the bits that don't belong in our mode, unless they and our sign
4171 bit are all one. So we get either a reasonable negative value or a
4172 reasonable unsigned value for this mode. */
4173 if (width
< HOST_BITS_PER_WIDE_INT
4174 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4175 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4176 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4178 /* If this would be an entire word for the target, but is not for
4179 the host, then sign-extend on the host so that the number will look
4180 the same way on the host that it would on the target.
4182 For example, when building a 64 bit alpha hosted 32 bit sparc
4183 targeted compiler, then we want the 32 bit unsigned value -1 to be
4184 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4185 The later confuses the sparc backend. */
4187 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
4188 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
4189 val
|= ((HOST_WIDE_INT
) (-1) << width
);
4191 return GEN_INT (val
);
4194 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4197 Rather than test for specific case, we do this by a brute-force method
4198 and do all possible simplifications until no more changes occur. Then
4199 we rebuild the operation. */
4202 simplify_plus_minus (code
, mode
, op0
, op1
)
4204 enum machine_mode mode
;
4210 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4211 int first
= 1, negate
= 0, changed
;
4214 bzero ((char *) ops
, sizeof ops
);
4216 /* Set up the two operands and then expand them until nothing has been
4217 changed. If we run out of room in our array, give up; this should
4218 almost never happen. */
4220 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4227 for (i
= 0; i
< n_ops
; i
++)
4228 switch (GET_CODE (ops
[i
]))
4235 ops
[n_ops
] = XEXP (ops
[i
], 1);
4236 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4237 ops
[i
] = XEXP (ops
[i
], 0);
4243 ops
[i
] = XEXP (ops
[i
], 0);
4244 negs
[i
] = ! negs
[i
];
4249 ops
[i
] = XEXP (ops
[i
], 0);
4255 /* ~a -> (-a - 1) */
4258 ops
[n_ops
] = constm1_rtx
;
4259 negs
[n_ops
++] = negs
[i
];
4260 ops
[i
] = XEXP (ops
[i
], 0);
4261 negs
[i
] = ! negs
[i
];
4268 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4276 /* If we only have two operands, we can't do anything. */
4280 /* Now simplify each pair of operands until nothing changes. The first
4281 time through just simplify constants against each other. */
4288 for (i
= 0; i
< n_ops
- 1; i
++)
4289 for (j
= i
+ 1; j
< n_ops
; j
++)
4290 if (ops
[i
] != 0 && ops
[j
] != 0
4291 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4293 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4294 enum rtx_code ncode
= PLUS
;
4296 if (negs
[i
] && ! negs
[j
])
4297 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4298 else if (! negs
[i
] && negs
[j
])
4301 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4304 ops
[i
] = tem
, ops
[j
] = 0;
4305 negs
[i
] = negs
[i
] && negs
[j
];
4306 if (GET_CODE (tem
) == NEG
)
4307 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4309 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4310 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4318 /* Pack all the operands to the lower-numbered entries and give up if
4319 we didn't reduce the number of operands we had. Make sure we
4320 count a CONST as two operands. If we have the same number of
4321 operands, but have made more CONSTs than we had, this is also
4322 an improvement, so accept it. */
4324 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4327 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4328 if (GET_CODE (ops
[j
]) == CONST
)
4332 if (i
+ n_consts
> input_ops
4333 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4338 /* If we have a CONST_INT, put it last. */
4339 for (i
= 0; i
< n_ops
- 1; i
++)
4340 if (GET_CODE (ops
[i
]) == CONST_INT
)
4342 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4343 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4346 /* Put a non-negated operand first. If there aren't any, make all
4347 operands positive and negate the whole thing later. */
4348 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4353 for (i
= 0; i
< n_ops
; i
++)
4359 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4360 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4363 /* Now make the result by performing the requested operations. */
4365 for (i
= 1; i
< n_ops
; i
++)
4366 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4368 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4371 /* Make a binary operation by properly ordering the operands and
4372 seeing if the expression folds. */
4375 cse_gen_binary (code
, mode
, op0
, op1
)
4377 enum machine_mode mode
;
4382 /* Put complex operands first and constants second if commutative. */
4383 if (GET_RTX_CLASS (code
) == 'c'
4384 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4385 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4386 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4387 || (GET_CODE (op0
) == SUBREG
4388 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4389 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4390 tem
= op0
, op0
= op1
, op1
= tem
;
4392 /* If this simplifies, do it. */
4393 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4398 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4399 just form the operation. */
4401 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4402 && GET_MODE (op0
) != VOIDmode
)
4403 return plus_constant (op0
, INTVAL (op1
));
4404 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4405 && GET_MODE (op0
) != VOIDmode
)
4406 return plus_constant (op0
, - INTVAL (op1
));
4408 return gen_rtx (code
, mode
, op0
, op1
);
4411 /* Like simplify_binary_operation except used for relational operators.
4412 MODE is the mode of the operands, not that of the result. If MODE
4413 is VOIDmode, both operands must also be VOIDmode and we compare the
4414 operands in "infinite precision".
4416 If no simplification is possible, this function returns zero. Otherwise,
4417 it returns either const_true_rtx or const0_rtx. */
4420 simplify_relational_operation (code
, mode
, op0
, op1
)
4422 enum machine_mode mode
;
4425 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4428 /* If op0 is a compare, extract the comparison arguments from it. */
4429 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4430 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4432 /* We can't simplify MODE_CC values since we don't know what the
4433 actual comparison is. */
4434 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4441 /* For integer comparisons of A and B maybe we can simplify A - B and can
4442 then simplify a comparison of that with zero. If A and B are both either
4443 a register or a CONST_INT, this can't help; testing for these cases will
4444 prevent infinite recursion here and speed things up.
4446 If CODE is an unsigned comparison, then we can never do this optimization,
4447 because it gives an incorrect result if the subtraction wraps around zero.
4448 ANSI C defines unsigned operations such that they never overflow, and
4449 thus such cases can not be ignored. */
4451 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4452 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4453 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4454 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4455 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4456 return simplify_relational_operation (signed_condition (code
),
4457 mode
, tem
, const0_rtx
);
4459 /* For non-IEEE floating-point, if the two operands are equal, we know the
4461 if (rtx_equal_p (op0
, op1
)
4462 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4463 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4464 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4466 /* If the operands are floating-point constants, see if we can fold
4468 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4469 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4470 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4472 REAL_VALUE_TYPE d0
, d1
;
4475 if (setjmp (handler
))
4478 set_float_handler (handler
);
4479 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4480 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4481 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4482 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4483 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4484 set_float_handler (NULL_PTR
);
4486 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4488 /* Otherwise, see if the operands are both integers. */
4489 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4490 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4491 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4493 int width
= GET_MODE_BITSIZE (mode
);
4494 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4495 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4497 /* Get the two words comprising each integer constant. */
4498 if (GET_CODE (op0
) == CONST_DOUBLE
)
4500 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4501 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4505 l0u
= l0s
= INTVAL (op0
);
4506 h0u
= h0s
= l0s
< 0 ? -1 : 0;
4509 if (GET_CODE (op1
) == CONST_DOUBLE
)
4511 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4512 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4516 l1u
= l1s
= INTVAL (op1
);
4517 h1u
= h1s
= l1s
< 0 ? -1 : 0;
4520 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4521 we have to sign or zero-extend the values. */
4522 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4523 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4525 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4527 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4528 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4530 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4531 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4533 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4534 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4537 equal
= (h0u
== h1u
&& l0u
== l1u
);
4538 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4539 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4540 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4541 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4544 /* Otherwise, there are some code-specific tests we can make. */
4550 /* References to the frame plus a constant or labels cannot
4551 be zero, but a SYMBOL_REF can due to #pragma weak. */
4552 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4553 || GET_CODE (op0
) == LABEL_REF
)
4554 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4555 /* On some machines, the ap reg can be 0 sometimes. */
4556 && op0
!= arg_pointer_rtx
4563 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4564 || GET_CODE (op0
) == LABEL_REF
)
4565 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4566 && op0
!= arg_pointer_rtx
4569 return const_true_rtx
;
4573 /* Unsigned values are never negative. */
4574 if (op1
== const0_rtx
)
4575 return const_true_rtx
;
4579 if (op1
== const0_rtx
)
4584 /* Unsigned values are never greater than the largest
4586 if (GET_CODE (op1
) == CONST_INT
4587 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4588 && INTEGRAL_MODE_P (mode
))
4589 return const_true_rtx
;
4593 if (GET_CODE (op1
) == CONST_INT
4594 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4595 && INTEGRAL_MODE_P (mode
))
4606 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4611 return equal
? const_true_rtx
: const0_rtx
;
4613 return ! equal
? const_true_rtx
: const0_rtx
;
4615 return op0lt
? const_true_rtx
: const0_rtx
;
4617 return op1lt
? const_true_rtx
: const0_rtx
;
4619 return op0ltu
? const_true_rtx
: const0_rtx
;
4621 return op1ltu
? const_true_rtx
: const0_rtx
;
4623 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4625 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4627 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4629 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4635 /* Simplify CODE, an operation with result mode MODE and three operands,
4636 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4637 a constant. Return 0 if no simplifications is possible. */
4640 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4642 enum machine_mode mode
, op0_mode
;
4645 int width
= GET_MODE_BITSIZE (mode
);
4647 /* VOIDmode means "infinite" precision. */
4649 width
= HOST_BITS_PER_WIDE_INT
;
4655 if (GET_CODE (op0
) == CONST_INT
4656 && GET_CODE (op1
) == CONST_INT
4657 && GET_CODE (op2
) == CONST_INT
4658 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4659 && width
<= HOST_BITS_PER_WIDE_INT
)
4661 /* Extracting a bit-field from a constant */
4662 HOST_WIDE_INT val
= INTVAL (op0
);
4664 if (BITS_BIG_ENDIAN
)
4665 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4666 - INTVAL (op2
) - INTVAL (op1
));
4668 val
>>= INTVAL (op2
);
4670 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4672 /* First zero-extend. */
4673 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4674 /* If desired, propagate sign bit. */
4675 if (code
== SIGN_EXTRACT
4676 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4677 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4680 /* Clear the bits that don't belong in our mode,
4681 unless they and our sign bit are all one.
4682 So we get either a reasonable negative value or a reasonable
4683 unsigned value for this mode. */
4684 if (width
< HOST_BITS_PER_WIDE_INT
4685 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4686 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4687 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4689 return GEN_INT (val
);
4694 if (GET_CODE (op0
) == CONST_INT
)
4695 return op0
!= const0_rtx
? op1
: op2
;
4697 /* Convert a == b ? b : a to "a". */
4698 if (GET_CODE (op0
) == NE
&& ! side_effects_p (op0
)
4699 && rtx_equal_p (XEXP (op0
, 0), op1
)
4700 && rtx_equal_p (XEXP (op0
, 1), op2
))
4702 else if (GET_CODE (op0
) == EQ
&& ! side_effects_p (op0
)
4703 && rtx_equal_p (XEXP (op0
, 1), op1
)
4704 && rtx_equal_p (XEXP (op0
, 0), op2
))
4715 /* If X is a nontrivial arithmetic operation on an argument
4716 for which a constant value can be determined, return
4717 the result of operating on that value, as a constant.
4718 Otherwise, return X, possibly with one or more operands
4719 modified by recursive calls to this function.
4721 If X is a register whose contents are known, we do NOT
4722 return those contents here. equiv_constant is called to
4725 INSN is the insn that we may be modifying. If it is 0, make a copy
4726 of X before modifying it. */
4733 register enum rtx_code code
;
4734 register enum machine_mode mode
;
4741 /* Folded equivalents of first two operands of X. */
4745 /* Constant equivalents of first three operands of X;
4746 0 when no such equivalent is known. */
4751 /* The mode of the first operand of X. We need this for sign and zero
4753 enum machine_mode mode_arg0
;
4758 mode
= GET_MODE (x
);
4759 code
= GET_CODE (x
);
4768 /* No use simplifying an EXPR_LIST
4769 since they are used only for lists of args
4770 in a function call's REG_EQUAL note. */
4776 return prev_insn_cc0
;
4780 /* If the next insn is a CODE_LABEL followed by a jump table,
4781 PC's value is a LABEL_REF pointing to that label. That
4782 lets us fold switch statements on the Vax. */
4783 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4785 rtx next
= next_nonnote_insn (insn
);
4787 if (next
&& GET_CODE (next
) == CODE_LABEL
4788 && NEXT_INSN (next
) != 0
4789 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4790 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4791 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4792 return gen_rtx (LABEL_REF
, Pmode
, next
);
4797 /* See if we previously assigned a constant value to this SUBREG. */
4798 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4799 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4802 /* If this is a paradoxical SUBREG, we have no idea what value the
4803 extra bits would have. However, if the operand is equivalent
4804 to a SUBREG whose operand is the same as our mode, and all the
4805 modes are within a word, we can just use the inner operand
4806 because these SUBREGs just say how to treat the register.
4808 Similarly if we find an integer constant. */
4810 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4812 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4813 struct table_elt
*elt
;
4815 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4816 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4817 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4819 for (elt
= elt
->first_same_value
;
4820 elt
; elt
= elt
->next_same_value
)
4822 if (CONSTANT_P (elt
->exp
)
4823 && GET_MODE (elt
->exp
) == VOIDmode
)
4826 if (GET_CODE (elt
->exp
) == SUBREG
4827 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4828 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4829 return copy_rtx (SUBREG_REG (elt
->exp
));
4835 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4836 We might be able to if the SUBREG is extracting a single word in an
4837 integral mode or extracting the low part. */
4839 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4840 const_arg0
= equiv_constant (folded_arg0
);
4842 folded_arg0
= const_arg0
;
4844 if (folded_arg0
!= SUBREG_REG (x
))
4848 if (GET_MODE_CLASS (mode
) == MODE_INT
4849 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4850 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4851 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4852 GET_MODE (SUBREG_REG (x
)));
4853 if (new == 0 && subreg_lowpart_p (x
))
4854 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4859 /* If this is a narrowing SUBREG and our operand is a REG, see if
4860 we can find an equivalence for REG that is an arithmetic operation
4861 in a wider mode where both operands are paradoxical SUBREGs
4862 from objects of our result mode. In that case, we couldn't report
4863 an equivalent value for that operation, since we don't know what the
4864 extra bits will be. But we can find an equivalence for this SUBREG
4865 by folding that operation is the narrow mode. This allows us to
4866 fold arithmetic in narrow modes when the machine only supports
4867 word-sized arithmetic.
4869 Also look for a case where we have a SUBREG whose operand is the
4870 same as our result. If both modes are smaller than a word, we
4871 are simply interpreting a register in different modes and we
4872 can use the inner value. */
4874 if (GET_CODE (folded_arg0
) == REG
4875 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4876 && subreg_lowpart_p (x
))
4878 struct table_elt
*elt
;
4880 /* We can use HASH here since we know that canon_hash won't be
4882 elt
= lookup (folded_arg0
,
4883 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4884 GET_MODE (folded_arg0
));
4887 elt
= elt
->first_same_value
;
4889 for (; elt
; elt
= elt
->next_same_value
)
4891 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4893 /* Just check for unary and binary operations. */
4894 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4895 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4896 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4897 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4898 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4900 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4902 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4903 op0
= fold_rtx (op0
, NULL_RTX
);
4905 op0
= equiv_constant (op0
);
4907 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4910 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4911 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4912 && eltcode
!= DIV
&& eltcode
!= MOD
4913 && eltcode
!= UDIV
&& eltcode
!= UMOD
4914 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4915 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4916 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4917 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4919 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4920 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4921 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4923 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4925 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4926 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4928 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4929 op0
= fold_rtx (op0
, NULL_RTX
);
4932 op0
= equiv_constant (op0
);
4934 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4935 op1
= fold_rtx (op1
, NULL_RTX
);
4938 op1
= equiv_constant (op1
);
4940 /* If we are looking for the low SImode part of
4941 (ashift:DI c (const_int 32)), it doesn't work
4942 to compute that in SImode, because a 32-bit shift
4943 in SImode is unpredictable. We know the value is 0. */
4945 && GET_CODE (elt
->exp
) == ASHIFT
4946 && GET_CODE (op1
) == CONST_INT
4947 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4949 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4951 /* If the count fits in the inner mode's width,
4952 but exceeds the outer mode's width,
4953 the value will get truncated to 0
4957 /* If the count exceeds even the inner mode's width,
4958 don't fold this expression. */
4961 else if (op0
&& op1
)
4962 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4966 else if (GET_CODE (elt
->exp
) == SUBREG
4967 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4968 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4970 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4971 new = copy_rtx (SUBREG_REG (elt
->exp
));
4982 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4983 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4984 new = lookup_as_function (XEXP (x
, 0), code
);
4986 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4990 /* If we are not actually processing an insn, don't try to find the
4991 best address. Not only don't we care, but we could modify the
4992 MEM in an invalid way since we have no insn to validate against. */
4994 find_best_addr (insn
, &XEXP (x
, 0));
4997 /* Even if we don't fold in the insn itself,
4998 we can safely do so here, in hopes of getting a constant. */
4999 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5001 HOST_WIDE_INT offset
= 0;
5003 if (GET_CODE (addr
) == REG
5004 && REGNO_QTY_VALID_P (REGNO (addr
))
5005 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
5006 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
5007 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
5009 /* If address is constant, split it into a base and integer offset. */
5010 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5012 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5013 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5015 base
= XEXP (XEXP (addr
, 0), 0);
5016 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5018 else if (GET_CODE (addr
) == LO_SUM
5019 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5020 base
= XEXP (addr
, 1);
5021 else if (GET_CODE (addr
) == ADDRESSOF
)
5024 /* If this is a constant pool reference, we can fold it into its
5025 constant to allow better value tracking. */
5026 if (base
&& GET_CODE (base
) == SYMBOL_REF
5027 && CONSTANT_POOL_ADDRESS_P (base
))
5029 rtx constant
= get_pool_constant (base
);
5030 enum machine_mode const_mode
= get_pool_mode (base
);
5033 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5034 constant_pool_entries_cost
= COST (constant
);
5036 /* If we are loading the full constant, we have an equivalence. */
5037 if (offset
== 0 && mode
== const_mode
)
5040 /* If this actually isn't a constant (weird!), we can't do
5041 anything. Otherwise, handle the two most common cases:
5042 extracting a word from a multi-word constant, and extracting
5043 the low-order bits. Other cases don't seem common enough to
5045 if (! CONSTANT_P (constant
))
5048 if (GET_MODE_CLASS (mode
) == MODE_INT
5049 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5050 && offset
% UNITS_PER_WORD
== 0
5051 && (new = operand_subword (constant
,
5052 offset
/ UNITS_PER_WORD
,
5053 0, const_mode
)) != 0)
5056 if (((BYTES_BIG_ENDIAN
5057 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5058 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5059 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5063 /* If this is a reference to a label at a known position in a jump
5064 table, we also know its value. */
5065 if (base
&& GET_CODE (base
) == LABEL_REF
)
5067 rtx label
= XEXP (base
, 0);
5068 rtx table_insn
= NEXT_INSN (label
);
5070 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5071 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5073 rtx table
= PATTERN (table_insn
);
5076 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5077 < XVECLEN (table
, 0)))
5078 return XVECEXP (table
, 0,
5079 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5081 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5082 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5084 rtx table
= PATTERN (table_insn
);
5087 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5088 < XVECLEN (table
, 1)))
5090 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5091 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
5094 if (GET_MODE (table
) != Pmode
)
5095 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
5097 /* Indicate this is a constant. This isn't a
5098 valid form of CONST, but it will only be used
5099 to fold the next insns and then discarded, so
5100 it should be safe. */
5101 return gen_rtx (CONST
, GET_MODE (new), new);
5110 for (i
= XVECLEN (x
, 3) - 1; i
>= 0; i
--)
5111 validate_change (insn
, &XVECEXP (x
, 3, i
),
5112 fold_rtx (XVECEXP (x
, 3, i
), insn
), 0);
5122 mode_arg0
= VOIDmode
;
5124 /* Try folding our operands.
5125 Then see which ones have constant values known. */
5127 fmt
= GET_RTX_FORMAT (code
);
5128 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5131 rtx arg
= XEXP (x
, i
);
5132 rtx folded_arg
= arg
, const_arg
= 0;
5133 enum machine_mode mode_arg
= GET_MODE (arg
);
5134 rtx cheap_arg
, expensive_arg
;
5135 rtx replacements
[2];
5138 /* Most arguments are cheap, so handle them specially. */
5139 switch (GET_CODE (arg
))
5142 /* This is the same as calling equiv_constant; it is duplicated
5144 if (REGNO_QTY_VALID_P (REGNO (arg
))
5145 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5146 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5147 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5149 = gen_lowpart_if_possible (GET_MODE (arg
),
5150 qty_const
[reg_qty
[REGNO (arg
)]]);
5163 folded_arg
= prev_insn_cc0
;
5164 mode_arg
= prev_insn_cc0_mode
;
5165 const_arg
= equiv_constant (folded_arg
);
5170 folded_arg
= fold_rtx (arg
, insn
);
5171 const_arg
= equiv_constant (folded_arg
);
5174 /* For the first three operands, see if the operand
5175 is constant or equivalent to a constant. */
5179 folded_arg0
= folded_arg
;
5180 const_arg0
= const_arg
;
5181 mode_arg0
= mode_arg
;
5184 folded_arg1
= folded_arg
;
5185 const_arg1
= const_arg
;
5188 const_arg2
= const_arg
;
5192 /* Pick the least expensive of the folded argument and an
5193 equivalent constant argument. */
5194 if (const_arg
== 0 || const_arg
== folded_arg
5195 || COST (const_arg
) > COST (folded_arg
))
5196 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5198 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5200 /* Try to replace the operand with the cheapest of the two
5201 possibilities. If it doesn't work and this is either of the first
5202 two operands of a commutative operation, try swapping them.
5203 If THAT fails, try the more expensive, provided it is cheaper
5204 than what is already there. */
5206 if (cheap_arg
== XEXP (x
, i
))
5209 if (insn
== 0 && ! copied
)
5215 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5217 j
< 2 && replacements
[j
]
5218 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5221 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5224 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5226 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5227 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5229 if (apply_change_group ())
5231 /* Swap them back to be invalid so that this loop can
5232 continue and flag them to be swapped back later. */
5235 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5244 else if (fmt
[i
] == 'E')
5245 /* Don't try to fold inside of a vector of expressions.
5246 Doing nothing is harmless. */
5249 /* If a commutative operation, place a constant integer as the second
5250 operand unless the first operand is also a constant integer. Otherwise,
5251 place any constant second unless the first operand is also a constant. */
5253 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5255 if (must_swap
|| (const_arg0
5257 || (GET_CODE (const_arg0
) == CONST_INT
5258 && GET_CODE (const_arg1
) != CONST_INT
))))
5260 register rtx tem
= XEXP (x
, 0);
5262 if (insn
== 0 && ! copied
)
5268 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5269 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5270 if (apply_change_group ())
5272 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5273 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5278 /* If X is an arithmetic operation, see if we can simplify it. */
5280 switch (GET_RTX_CLASS (code
))
5286 /* We can't simplify extension ops unless we know the
5288 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5289 && mode_arg0
== VOIDmode
)
5292 /* If we had a CONST, strip it off and put it back later if we
5294 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5295 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5297 new = simplify_unary_operation (code
, mode
,
5298 const_arg0
? const_arg0
: folded_arg0
,
5300 if (new != 0 && is_const
)
5301 new = gen_rtx (CONST
, mode
, new);
5306 /* See what items are actually being compared and set FOLDED_ARG[01]
5307 to those values and CODE to the actual comparison code. If any are
5308 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5309 do anything if both operands are already known to be constant. */
5311 if (const_arg0
== 0 || const_arg1
== 0)
5313 struct table_elt
*p0
, *p1
;
5314 rtx
true = const_true_rtx
, false = const0_rtx
;
5315 enum machine_mode mode_arg1
;
5317 #ifdef FLOAT_STORE_FLAG_VALUE
5318 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5320 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5322 false = CONST0_RTX (mode
);
5326 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5327 &mode_arg0
, &mode_arg1
);
5328 const_arg0
= equiv_constant (folded_arg0
);
5329 const_arg1
= equiv_constant (folded_arg1
);
5331 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5332 what kinds of things are being compared, so we can't do
5333 anything with this comparison. */
5335 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5338 /* If we do not now have two constants being compared, see
5339 if we can nevertheless deduce some things about the
5341 if (const_arg0
== 0 || const_arg1
== 0)
5343 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5344 non-explicit constant? These aren't zero, but we
5345 don't know their sign. */
5346 if (const_arg1
== const0_rtx
5347 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5348 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5350 || GET_CODE (folded_arg0
) == SYMBOL_REF
5352 || GET_CODE (folded_arg0
) == LABEL_REF
5353 || GET_CODE (folded_arg0
) == CONST
))
5357 else if (code
== NE
)
5361 /* See if the two operands are the same. We don't do this
5362 for IEEE floating-point since we can't assume x == x
5363 since x might be a NaN. */
5365 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5366 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5367 && (folded_arg0
== folded_arg1
5368 || (GET_CODE (folded_arg0
) == REG
5369 && GET_CODE (folded_arg1
) == REG
5370 && (reg_qty
[REGNO (folded_arg0
)]
5371 == reg_qty
[REGNO (folded_arg1
)]))
5372 || ((p0
= lookup (folded_arg0
,
5373 (safe_hash (folded_arg0
, mode_arg0
)
5374 % NBUCKETS
), mode_arg0
))
5375 && (p1
= lookup (folded_arg1
,
5376 (safe_hash (folded_arg1
, mode_arg0
)
5377 % NBUCKETS
), mode_arg0
))
5378 && p0
->first_same_value
== p1
->first_same_value
)))
5379 return ((code
== EQ
|| code
== LE
|| code
== GE
5380 || code
== LEU
|| code
== GEU
)
5383 /* If FOLDED_ARG0 is a register, see if the comparison we are
5384 doing now is either the same as we did before or the reverse
5385 (we only check the reverse if not floating-point). */
5386 else if (GET_CODE (folded_arg0
) == REG
)
5388 int qty
= reg_qty
[REGNO (folded_arg0
)];
5390 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5391 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5392 || (comparison_dominates_p (qty_comparison_code
[qty
],
5393 reverse_condition (code
))
5394 && ! FLOAT_MODE_P (mode_arg0
)))
5395 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5397 && rtx_equal_p (qty_comparison_const
[qty
],
5399 || (GET_CODE (folded_arg1
) == REG
5400 && (reg_qty
[REGNO (folded_arg1
)]
5401 == qty_comparison_qty
[qty
]))))
5402 return (comparison_dominates_p (qty_comparison_code
[qty
],
5409 /* If we are comparing against zero, see if the first operand is
5410 equivalent to an IOR with a constant. If so, we may be able to
5411 determine the result of this comparison. */
5413 if (const_arg1
== const0_rtx
)
5415 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5419 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5420 && GET_CODE (inner_const
) == CONST_INT
5421 && INTVAL (inner_const
) != 0)
5423 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5424 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5425 && (INTVAL (inner_const
)
5426 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5427 rtx
true = const_true_rtx
, false = const0_rtx
;
5429 #ifdef FLOAT_STORE_FLAG_VALUE
5430 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5432 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5434 false = CONST0_RTX (mode
);
5458 new = simplify_relational_operation (code
, mode_arg0
,
5459 const_arg0
? const_arg0
: folded_arg0
,
5460 const_arg1
? const_arg1
: folded_arg1
);
5461 #ifdef FLOAT_STORE_FLAG_VALUE
5462 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5463 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5464 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5473 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5474 with that LABEL_REF as its second operand. If so, the result is
5475 the first operand of that MINUS. This handles switches with an
5476 ADDR_DIFF_VEC table. */
5477 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5480 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5481 : lookup_as_function (folded_arg0
, MINUS
);
5483 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5484 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5487 /* Now try for a CONST of a MINUS like the above. */
5488 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5489 : lookup_as_function (folded_arg0
, CONST
))) != 0
5490 && GET_CODE (XEXP (y
, 0)) == MINUS
5491 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5492 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5493 return XEXP (XEXP (y
, 0), 0);
5496 /* Likewise if the operands are in the other order. */
5497 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5500 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5501 : lookup_as_function (folded_arg1
, MINUS
);
5503 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5504 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5507 /* Now try for a CONST of a MINUS like the above. */
5508 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5509 : lookup_as_function (folded_arg1
, CONST
))) != 0
5510 && GET_CODE (XEXP (y
, 0)) == MINUS
5511 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5512 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5513 return XEXP (XEXP (y
, 0), 0);
5516 /* If second operand is a register equivalent to a negative
5517 CONST_INT, see if we can find a register equivalent to the
5518 positive constant. Make a MINUS if so. Don't do this for
5519 a non-negative constant since we might then alternate between
5520 chosing positive and negative constants. Having the positive
5521 constant previously-used is the more common case. Be sure
5522 the resulting constant is non-negative; if const_arg1 were
5523 the smallest negative number this would overflow: depending
5524 on the mode, this would either just be the same value (and
5525 hence not save anything) or be incorrect. */
5526 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
5527 && INTVAL (const_arg1
) < 0
5528 && - INTVAL (const_arg1
) >= 0
5529 && GET_CODE (folded_arg1
) == REG
)
5531 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5533 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5537 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5538 if (GET_CODE (p
->exp
) == REG
)
5539 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5540 canon_reg (p
->exp
, NULL_RTX
));
5545 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5546 If so, produce (PLUS Z C2-C). */
5547 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5549 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5550 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5551 return fold_rtx (plus_constant (copy_rtx (y
),
5552 -INTVAL (const_arg1
)),
5556 /* ... fall through ... */
5559 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5560 case IOR
: case AND
: case XOR
:
5561 case MULT
: case DIV
: case UDIV
:
5562 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5563 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5564 is known to be of similar form, we may be able to replace the
5565 operation with a combined operation. This may eliminate the
5566 intermediate operation if every use is simplified in this way.
5567 Note that the similar optimization done by combine.c only works
5568 if the intermediate operation's result has only one reference. */
5570 if (GET_CODE (folded_arg0
) == REG
5571 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5574 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5575 rtx y
= lookup_as_function (folded_arg0
, code
);
5577 enum rtx_code associate_code
;
5581 || 0 == (inner_const
5582 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5583 || GET_CODE (inner_const
) != CONST_INT
5584 /* If we have compiled a statement like
5585 "if (x == (x & mask1))", and now are looking at
5586 "x & mask2", we will have a case where the first operand
5587 of Y is the same as our first operand. Unless we detect
5588 this case, an infinite loop will result. */
5589 || XEXP (y
, 0) == folded_arg0
)
5592 /* Don't associate these operations if they are a PLUS with the
5593 same constant and it is a power of two. These might be doable
5594 with a pre- or post-increment. Similarly for two subtracts of
5595 identical powers of two with post decrement. */
5597 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5599 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5600 || exact_log2 (INTVAL (const_arg1
)) >= 0
5602 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5603 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5608 /* Compute the code used to compose the constants. For example,
5609 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5612 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5613 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5615 new_const
= simplify_binary_operation (associate_code
, mode
,
5616 const_arg1
, inner_const
);
5621 /* If we are associating shift operations, don't let this
5622 produce a shift of the size of the object or larger.
5623 This could occur when we follow a sign-extend by a right
5624 shift on a machine that does a sign-extend as a pair
5627 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5628 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5630 /* As an exception, we can turn an ASHIFTRT of this
5631 form into a shift of the number of bits - 1. */
5632 if (code
== ASHIFTRT
)
5633 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5638 y
= copy_rtx (XEXP (y
, 0));
5640 /* If Y contains our first operand (the most common way this
5641 can happen is if Y is a MEM), we would do into an infinite
5642 loop if we tried to fold it. So don't in that case. */
5644 if (! reg_mentioned_p (folded_arg0
, y
))
5645 y
= fold_rtx (y
, insn
);
5647 return cse_gen_binary (code
, mode
, y
, new_const
);
5655 new = simplify_binary_operation (code
, mode
,
5656 const_arg0
? const_arg0
: folded_arg0
,
5657 const_arg1
? const_arg1
: folded_arg1
);
5661 /* (lo_sum (high X) X) is simply X. */
5662 if (code
== LO_SUM
&& const_arg0
!= 0
5663 && GET_CODE (const_arg0
) == HIGH
5664 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5670 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5671 const_arg0
? const_arg0
: folded_arg0
,
5672 const_arg1
? const_arg1
: folded_arg1
,
5673 const_arg2
? const_arg2
: XEXP (x
, 2));
5677 return new ? new : x
;
5680 /* Return a constant value currently equivalent to X.
5681 Return 0 if we don't know one. */
5687 if (GET_CODE (x
) == REG
5688 && REGNO_QTY_VALID_P (REGNO (x
))
5689 && qty_const
[reg_qty
[REGNO (x
)]])
5690 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5692 if (x
!= 0 && CONSTANT_P (x
))
5695 /* If X is a MEM, try to fold it outside the context of any insn to see if
5696 it might be equivalent to a constant. That handles the case where it
5697 is a constant-pool reference. Then try to look it up in the hash table
5698 in case it is something whose value we have seen before. */
5700 if (GET_CODE (x
) == MEM
)
5702 struct table_elt
*elt
;
5704 x
= fold_rtx (x
, NULL_RTX
);
5708 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5712 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5713 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5720 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5721 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5722 least-significant part of X.
5723 MODE specifies how big a part of X to return.
5725 If the requested operation cannot be done, 0 is returned.
5727 This is similar to gen_lowpart in emit-rtl.c. */
5730 gen_lowpart_if_possible (mode
, x
)
5731 enum machine_mode mode
;
5734 rtx result
= gen_lowpart_common (mode
, x
);
5738 else if (GET_CODE (x
) == MEM
)
5740 /* This is the only other case we handle. */
5741 register int offset
= 0;
5744 if (WORDS_BIG_ENDIAN
)
5745 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5746 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5747 if (BYTES_BIG_ENDIAN
)
5748 /* Adjust the address so that the address-after-the-data is
5750 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5751 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5752 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5753 if (! memory_address_p (mode
, XEXP (new, 0)))
5755 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5756 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5757 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5764 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5765 branch. It will be zero if not.
5767 In certain cases, this can cause us to add an equivalence. For example,
5768 if we are following the taken case of
5770 we can add the fact that `i' and '2' are now equivalent.
5772 In any case, we can record that this comparison was passed. If the same
5773 comparison is seen later, we will know its value. */
5776 record_jump_equiv (insn
, taken
)
5780 int cond_known_true
;
5782 enum machine_mode mode
, mode0
, mode1
;
5783 int reversed_nonequality
= 0;
5786 /* Ensure this is the right kind of insn. */
5787 if (! condjump_p (insn
) || simplejump_p (insn
))
5790 /* See if this jump condition is known true or false. */
5792 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5794 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5796 /* Get the type of comparison being done and the operands being compared.
5797 If we had to reverse a non-equality condition, record that fact so we
5798 know that it isn't valid for floating-point. */
5799 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5800 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5801 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5803 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5804 if (! cond_known_true
)
5806 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5807 code
= reverse_condition (code
);
5810 /* The mode is the mode of the non-constant. */
5812 if (mode1
!= VOIDmode
)
5815 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5818 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5819 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5820 Make any useful entries we can with that information. Called from
5821 above function and called recursively. */
5824 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5826 enum machine_mode mode
;
5828 int reversed_nonequality
;
5830 unsigned op0_hash
, op1_hash
;
5831 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5832 struct table_elt
*op0_elt
, *op1_elt
;
5834 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5835 we know that they are also equal in the smaller mode (this is also
5836 true for all smaller modes whether or not there is a SUBREG, but
5837 is not worth testing for with no SUBREG. */
5839 /* Note that GET_MODE (op0) may not equal MODE. */
5840 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5841 && (GET_MODE_SIZE (GET_MODE (op0
))
5842 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5844 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5845 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5847 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5848 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5849 reversed_nonequality
);
5852 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5853 && (GET_MODE_SIZE (GET_MODE (op1
))
5854 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5856 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5857 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5859 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5860 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5861 reversed_nonequality
);
5864 /* Similarly, if this is an NE comparison, and either is a SUBREG
5865 making a smaller mode, we know the whole thing is also NE. */
5867 /* Note that GET_MODE (op0) may not equal MODE;
5868 if we test MODE instead, we can get an infinite recursion
5869 alternating between two modes each wider than MODE. */
5871 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5872 && subreg_lowpart_p (op0
)
5873 && (GET_MODE_SIZE (GET_MODE (op0
))
5874 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5876 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5877 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5879 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5880 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5881 reversed_nonequality
);
5884 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5885 && subreg_lowpart_p (op1
)
5886 && (GET_MODE_SIZE (GET_MODE (op1
))
5887 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5889 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5890 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5892 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5893 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5894 reversed_nonequality
);
5897 /* Hash both operands. */
5900 hash_arg_in_memory
= 0;
5901 hash_arg_in_struct
= 0;
5902 op0_hash
= HASH (op0
, mode
);
5903 op0_in_memory
= hash_arg_in_memory
;
5904 op0_in_struct
= hash_arg_in_struct
;
5910 hash_arg_in_memory
= 0;
5911 hash_arg_in_struct
= 0;
5912 op1_hash
= HASH (op1
, mode
);
5913 op1_in_memory
= hash_arg_in_memory
;
5914 op1_in_struct
= hash_arg_in_struct
;
5919 /* Look up both operands. */
5920 op0_elt
= lookup (op0
, op0_hash
, mode
);
5921 op1_elt
= lookup (op1
, op1_hash
, mode
);
5923 /* If both operands are already equivalent or if they are not in the
5924 table but are identical, do nothing. */
5925 if ((op0_elt
!= 0 && op1_elt
!= 0
5926 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
5927 || op0
== op1
|| rtx_equal_p (op0
, op1
))
5930 /* If we aren't setting two things equal all we can do is save this
5931 comparison. Similarly if this is floating-point. In the latter
5932 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5933 If we record the equality, we might inadvertently delete code
5934 whose intent was to change -0 to +0. */
5936 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5938 /* If we reversed a floating-point comparison, if OP0 is not a
5939 register, or if OP1 is neither a register or constant, we can't
5942 if (GET_CODE (op1
) != REG
)
5943 op1
= equiv_constant (op1
);
5945 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5946 || GET_CODE (op0
) != REG
|| op1
== 0)
5949 /* Put OP0 in the hash table if it isn't already. This gives it a
5950 new quantity number. */
5953 if (insert_regs (op0
, NULL_PTR
, 0))
5955 rehash_using_reg (op0
);
5956 op0_hash
= HASH (op0
, mode
);
5958 /* If OP0 is contained in OP1, this changes its hash code
5959 as well. Faster to rehash than to check, except
5960 for the simple case of a constant. */
5961 if (! CONSTANT_P (op1
))
5962 op1_hash
= HASH (op1
,mode
);
5965 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5966 op0_elt
->in_memory
= op0_in_memory
;
5967 op0_elt
->in_struct
= op0_in_struct
;
5970 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5971 if (GET_CODE (op1
) == REG
)
5973 /* Look it up again--in case op0 and op1 are the same. */
5974 op1_elt
= lookup (op1
, op1_hash
, mode
);
5976 /* Put OP1 in the hash table so it gets a new quantity number. */
5979 if (insert_regs (op1
, NULL_PTR
, 0))
5981 rehash_using_reg (op1
);
5982 op1_hash
= HASH (op1
, mode
);
5985 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5986 op1_elt
->in_memory
= op1_in_memory
;
5987 op1_elt
->in_struct
= op1_in_struct
;
5990 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5991 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5995 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5996 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
6002 /* If either side is still missing an equivalence, make it now,
6003 then merge the equivalences. */
6007 if (insert_regs (op0
, NULL_PTR
, 0))
6009 rehash_using_reg (op0
);
6010 op0_hash
= HASH (op0
, mode
);
6013 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6014 op0_elt
->in_memory
= op0_in_memory
;
6015 op0_elt
->in_struct
= op0_in_struct
;
6020 if (insert_regs (op1
, NULL_PTR
, 0))
6022 rehash_using_reg (op1
);
6023 op1_hash
= HASH (op1
, mode
);
6026 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6027 op1_elt
->in_memory
= op1_in_memory
;
6028 op1_elt
->in_struct
= op1_in_struct
;
6031 merge_equiv_classes (op0_elt
, op1_elt
);
6032 last_jump_equiv_class
= op0_elt
;
6035 /* CSE processing for one instruction.
6036 First simplify sources and addresses of all assignments
6037 in the instruction, using previously-computed equivalents values.
6038 Then install the new sources and destinations in the table
6039 of available values.
6041 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6044 /* Data on one SET contained in the instruction. */
6048 /* The SET rtx itself. */
6050 /* The SET_SRC of the rtx (the original value, if it is changing). */
6052 /* The hash-table element for the SET_SRC of the SET. */
6053 struct table_elt
*src_elt
;
6054 /* Hash value for the SET_SRC. */
6056 /* Hash value for the SET_DEST. */
6058 /* The SET_DEST, with SUBREG, etc., stripped. */
6060 /* Place where the pointer to the INNER_DEST was found. */
6061 rtx
*inner_dest_loc
;
6062 /* Nonzero if the SET_SRC is in memory. */
6064 /* Nonzero if the SET_SRC is in a structure. */
6066 /* Nonzero if the SET_SRC contains something
6067 whose value cannot be predicted and understood. */
6069 /* Original machine mode, in case it becomes a CONST_INT. */
6070 enum machine_mode mode
;
6071 /* A constant equivalent for SET_SRC, if any. */
6073 /* Hash value of constant equivalent for SET_SRC. */
6074 unsigned src_const_hash
;
6075 /* Table entry for constant equivalent for SET_SRC, if any. */
6076 struct table_elt
*src_const_elt
;
6080 cse_insn (insn
, in_libcall_block
)
6082 int in_libcall_block
;
6084 register rtx x
= PATTERN (insn
);
6087 register int n_sets
= 0;
6089 /* Records what this insn does to set CC0. */
6090 rtx this_insn_cc0
= 0;
6091 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
6094 struct table_elt
*src_eqv_elt
= 0;
6095 int src_eqv_volatile
;
6096 int src_eqv_in_memory
;
6097 int src_eqv_in_struct
;
6098 unsigned src_eqv_hash
;
6104 /* Find all the SETs and CLOBBERs in this instruction.
6105 Record all the SETs in the array `set' and count them.
6106 Also determine whether there is a CLOBBER that invalidates
6107 all memory references, or all references at varying addresses. */
6109 if (GET_CODE (insn
) == CALL_INSN
)
6111 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6112 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6113 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6116 if (GET_CODE (x
) == SET
)
6118 sets
= (struct set
*) alloca (sizeof (struct set
));
6121 /* Ignore SETs that are unconditional jumps.
6122 They never need cse processing, so this does not hurt.
6123 The reason is not efficiency but rather
6124 so that we can test at the end for instructions
6125 that have been simplified to unconditional jumps
6126 and not be misled by unchanged instructions
6127 that were unconditional jumps to begin with. */
6128 if (SET_DEST (x
) == pc_rtx
6129 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6132 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6133 The hard function value register is used only once, to copy to
6134 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6135 Ensure we invalidate the destination register. On the 80386 no
6136 other code would invalidate it since it is a fixed_reg.
6137 We need not check the return of apply_change_group; see canon_reg. */
6139 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6141 canon_reg (SET_SRC (x
), insn
);
6142 apply_change_group ();
6143 fold_rtx (SET_SRC (x
), insn
);
6144 invalidate (SET_DEST (x
), VOIDmode
);
6149 else if (GET_CODE (x
) == PARALLEL
)
6151 register int lim
= XVECLEN (x
, 0);
6153 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6155 /* Find all regs explicitly clobbered in this insn,
6156 and ensure they are not replaced with any other regs
6157 elsewhere in this insn.
6158 When a reg that is clobbered is also used for input,
6159 we should presume that that is for a reason,
6160 and we should not substitute some other register
6161 which is not supposed to be clobbered.
6162 Therefore, this loop cannot be merged into the one below
6163 because a CALL may precede a CLOBBER and refer to the
6164 value clobbered. We must not let a canonicalization do
6165 anything in that case. */
6166 for (i
= 0; i
< lim
; i
++)
6168 register rtx y
= XVECEXP (x
, 0, i
);
6169 if (GET_CODE (y
) == CLOBBER
)
6171 rtx clobbered
= XEXP (y
, 0);
6173 if (GET_CODE (clobbered
) == REG
6174 || GET_CODE (clobbered
) == SUBREG
)
6175 invalidate (clobbered
, VOIDmode
);
6176 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6177 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6178 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6182 for (i
= 0; i
< lim
; i
++)
6184 register rtx y
= XVECEXP (x
, 0, i
);
6185 if (GET_CODE (y
) == SET
)
6187 /* As above, we ignore unconditional jumps and call-insns and
6188 ignore the result of apply_change_group. */
6189 if (GET_CODE (SET_SRC (y
)) == CALL
)
6191 canon_reg (SET_SRC (y
), insn
);
6192 apply_change_group ();
6193 fold_rtx (SET_SRC (y
), insn
);
6194 invalidate (SET_DEST (y
), VOIDmode
);
6196 else if (SET_DEST (y
) == pc_rtx
6197 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6200 sets
[n_sets
++].rtl
= y
;
6202 else if (GET_CODE (y
) == CLOBBER
)
6204 /* If we clobber memory, canon the address.
6205 This does nothing when a register is clobbered
6206 because we have already invalidated the reg. */
6207 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6208 canon_reg (XEXP (y
, 0), NULL_RTX
);
6210 else if (GET_CODE (y
) == USE
6211 && ! (GET_CODE (XEXP (y
, 0)) == REG
6212 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6213 canon_reg (y
, NULL_RTX
);
6214 else if (GET_CODE (y
) == CALL
)
6216 /* The result of apply_change_group can be ignored; see
6218 canon_reg (y
, insn
);
6219 apply_change_group ();
6224 else if (GET_CODE (x
) == CLOBBER
)
6226 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6227 canon_reg (XEXP (x
, 0), NULL_RTX
);
6230 /* Canonicalize a USE of a pseudo register or memory location. */
6231 else if (GET_CODE (x
) == USE
6232 && ! (GET_CODE (XEXP (x
, 0)) == REG
6233 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6234 canon_reg (XEXP (x
, 0), NULL_RTX
);
6235 else if (GET_CODE (x
) == CALL
)
6237 /* The result of apply_change_group can be ignored; see canon_reg. */
6238 canon_reg (x
, insn
);
6239 apply_change_group ();
6243 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6244 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6245 is handled specially for this case, and if it isn't set, then there will
6246 be no equivalence for the destination. */
6247 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6248 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6249 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6250 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6251 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6253 /* Canonicalize sources and addresses of destinations.
6254 We do this in a separate pass to avoid problems when a MATCH_DUP is
6255 present in the insn pattern. In that case, we want to ensure that
6256 we don't break the duplicate nature of the pattern. So we will replace
6257 both operands at the same time. Otherwise, we would fail to find an
6258 equivalent substitution in the loop calling validate_change below.
6260 We used to suppress canonicalization of DEST if it appears in SRC,
6261 but we don't do this any more. */
6263 for (i
= 0; i
< n_sets
; i
++)
6265 rtx dest
= SET_DEST (sets
[i
].rtl
);
6266 rtx src
= SET_SRC (sets
[i
].rtl
);
6267 rtx
new = canon_reg (src
, insn
);
6270 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6271 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6272 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6273 || (insn_code
= recog_memoized (insn
)) < 0
6274 || insn_n_dups
[insn_code
] > 0)
6275 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6277 SET_SRC (sets
[i
].rtl
) = new;
6279 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6281 validate_change (insn
, &XEXP (dest
, 1),
6282 canon_reg (XEXP (dest
, 1), insn
), 1);
6283 validate_change (insn
, &XEXP (dest
, 2),
6284 canon_reg (XEXP (dest
, 2), insn
), 1);
6287 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6288 || GET_CODE (dest
) == ZERO_EXTRACT
6289 || GET_CODE (dest
) == SIGN_EXTRACT
)
6290 dest
= XEXP (dest
, 0);
6292 if (GET_CODE (dest
) == MEM
)
6293 canon_reg (dest
, insn
);
6296 /* Now that we have done all the replacements, we can apply the change
6297 group and see if they all work. Note that this will cause some
6298 canonicalizations that would have worked individually not to be applied
6299 because some other canonicalization didn't work, but this should not
6302 The result of apply_change_group can be ignored; see canon_reg. */
6304 apply_change_group ();
6306 /* Set sets[i].src_elt to the class each source belongs to.
6307 Detect assignments from or to volatile things
6308 and set set[i] to zero so they will be ignored
6309 in the rest of this function.
6311 Nothing in this loop changes the hash table or the register chains. */
6313 for (i
= 0; i
< n_sets
; i
++)
6315 register rtx src
, dest
;
6316 register rtx src_folded
;
6317 register struct table_elt
*elt
= 0, *p
;
6318 enum machine_mode mode
;
6321 rtx src_related
= 0;
6322 struct table_elt
*src_const_elt
= 0;
6323 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6324 int src_related_cost
= 10000, src_elt_cost
= 10000;
6325 /* Set non-zero if we need to call force_const_mem on with the
6326 contents of src_folded before using it. */
6327 int src_folded_force_flag
= 0;
6329 dest
= SET_DEST (sets
[i
].rtl
);
6330 src
= SET_SRC (sets
[i
].rtl
);
6332 /* If SRC is a constant that has no machine mode,
6333 hash it with the destination's machine mode.
6334 This way we can keep different modes separate. */
6336 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6337 sets
[i
].mode
= mode
;
6341 enum machine_mode eqvmode
= mode
;
6342 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6343 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6345 hash_arg_in_memory
= 0;
6346 hash_arg_in_struct
= 0;
6347 src_eqv
= fold_rtx (src_eqv
, insn
);
6348 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6350 /* Find the equivalence class for the equivalent expression. */
6353 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6355 src_eqv_volatile
= do_not_record
;
6356 src_eqv_in_memory
= hash_arg_in_memory
;
6357 src_eqv_in_struct
= hash_arg_in_struct
;
6360 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6361 value of the INNER register, not the destination. So it is not
6362 a valid substitution for the source. But save it for later. */
6363 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6366 src_eqv_here
= src_eqv
;
6368 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6369 simplified result, which may not necessarily be valid. */
6370 src_folded
= fold_rtx (src
, insn
);
6373 /* ??? This caused bad code to be generated for the m68k port with -O2.
6374 Suppose src is (CONST_INT -1), and that after truncation src_folded
6375 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6376 At the end we will add src and src_const to the same equivalence
6377 class. We now have 3 and -1 on the same equivalence class. This
6378 causes later instructions to be mis-optimized. */
6379 /* If storing a constant in a bitfield, pre-truncate the constant
6380 so we will be able to record it later. */
6381 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6382 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6384 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6386 if (GET_CODE (src
) == CONST_INT
6387 && GET_CODE (width
) == CONST_INT
6388 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6389 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6391 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6392 << INTVAL (width
)) - 1));
6396 /* Compute SRC's hash code, and also notice if it
6397 should not be recorded at all. In that case,
6398 prevent any further processing of this assignment. */
6400 hash_arg_in_memory
= 0;
6401 hash_arg_in_struct
= 0;
6404 sets
[i
].src_hash
= HASH (src
, mode
);
6405 sets
[i
].src_volatile
= do_not_record
;
6406 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6407 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6409 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6410 a pseudo that is set more than once, do not record SRC. Using
6411 SRC as a replacement for anything else will be incorrect in that
6412 situation. Note that this usually occurs only for stack slots,
6413 in which case all the RTL would be refering to SRC, so we don't
6414 lose any optimization opportunities by not having SRC in the
6417 if (GET_CODE (src
) == MEM
6418 && find_reg_note (insn
, REG_EQUIV
, src
) != 0
6419 && GET_CODE (dest
) == REG
6420 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
6421 && REG_N_SETS (REGNO (dest
)) != 1)
6422 sets
[i
].src_volatile
= 1;
6425 /* It is no longer clear why we used to do this, but it doesn't
6426 appear to still be needed. So let's try without it since this
6427 code hurts cse'ing widened ops. */
6428 /* If source is a perverse subreg (such as QI treated as an SI),
6429 treat it as volatile. It may do the work of an SI in one context
6430 where the extra bits are not being used, but cannot replace an SI
6432 if (GET_CODE (src
) == SUBREG
6433 && (GET_MODE_SIZE (GET_MODE (src
))
6434 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6435 sets
[i
].src_volatile
= 1;
6438 /* Locate all possible equivalent forms for SRC. Try to replace
6439 SRC in the insn with each cheaper equivalent.
6441 We have the following types of equivalents: SRC itself, a folded
6442 version, a value given in a REG_EQUAL note, or a value related
6445 Each of these equivalents may be part of an additional class
6446 of equivalents (if more than one is in the table, they must be in
6447 the same class; we check for this).
6449 If the source is volatile, we don't do any table lookups.
6451 We note any constant equivalent for possible later use in a
6454 if (!sets
[i
].src_volatile
)
6455 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6457 sets
[i
].src_elt
= elt
;
6459 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6461 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6463 /* The REG_EQUAL is indicating that two formerly distinct
6464 classes are now equivalent. So merge them. */
6465 merge_equiv_classes (elt
, src_eqv_elt
);
6466 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6467 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6473 else if (src_eqv_elt
)
6476 /* Try to find a constant somewhere and record it in `src_const'.
6477 Record its table element, if any, in `src_const_elt'. Look in
6478 any known equivalences first. (If the constant is not in the
6479 table, also set `sets[i].src_const_hash'). */
6481 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6485 src_const_elt
= elt
;
6490 && (CONSTANT_P (src_folded
)
6491 /* Consider (minus (label_ref L1) (label_ref L2)) as
6492 "constant" here so we will record it. This allows us
6493 to fold switch statements when an ADDR_DIFF_VEC is used. */
6494 || (GET_CODE (src_folded
) == MINUS
6495 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6496 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6497 src_const
= src_folded
, src_const_elt
= elt
;
6498 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6499 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6501 /* If we don't know if the constant is in the table, get its
6502 hash code and look it up. */
6503 if (src_const
&& src_const_elt
== 0)
6505 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6506 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6509 sets
[i
].src_const
= src_const
;
6510 sets
[i
].src_const_elt
= src_const_elt
;
6512 /* If the constant and our source are both in the table, mark them as
6513 equivalent. Otherwise, if a constant is in the table but the source
6514 isn't, set ELT to it. */
6515 if (src_const_elt
&& elt
6516 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6517 merge_equiv_classes (elt
, src_const_elt
);
6518 else if (src_const_elt
&& elt
== 0)
6519 elt
= src_const_elt
;
6521 /* See if there is a register linearly related to a constant
6522 equivalent of SRC. */
6524 && (GET_CODE (src_const
) == CONST
6525 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6527 src_related
= use_related_value (src_const
, src_const_elt
);
6530 struct table_elt
*src_related_elt
6531 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6532 if (src_related_elt
&& elt
)
6534 if (elt
->first_same_value
6535 != src_related_elt
->first_same_value
)
6536 /* This can occur when we previously saw a CONST
6537 involving a SYMBOL_REF and then see the SYMBOL_REF
6538 twice. Merge the involved classes. */
6539 merge_equiv_classes (elt
, src_related_elt
);
6542 src_related_elt
= 0;
6544 else if (src_related_elt
&& elt
== 0)
6545 elt
= src_related_elt
;
6549 /* See if we have a CONST_INT that is already in a register in a
6552 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6553 && GET_MODE_CLASS (mode
) == MODE_INT
6554 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6556 enum machine_mode wider_mode
;
6558 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6559 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6560 && src_related
== 0;
6561 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6563 struct table_elt
*const_elt
6564 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6569 for (const_elt
= const_elt
->first_same_value
;
6570 const_elt
; const_elt
= const_elt
->next_same_value
)
6571 if (GET_CODE (const_elt
->exp
) == REG
)
6573 src_related
= gen_lowpart_if_possible (mode
,
6580 /* Another possibility is that we have an AND with a constant in
6581 a mode narrower than a word. If so, it might have been generated
6582 as part of an "if" which would narrow the AND. If we already
6583 have done the AND in a wider mode, we can use a SUBREG of that
6586 if (flag_expensive_optimizations
&& ! src_related
6587 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6588 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6590 enum machine_mode tmode
;
6591 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6593 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6594 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6595 tmode
= GET_MODE_WIDER_MODE (tmode
))
6597 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6598 struct table_elt
*larger_elt
;
6602 PUT_MODE (new_and
, tmode
);
6603 XEXP (new_and
, 0) = inner
;
6604 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6605 if (larger_elt
== 0)
6608 for (larger_elt
= larger_elt
->first_same_value
;
6609 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6610 if (GET_CODE (larger_elt
->exp
) == REG
)
6613 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6623 #ifdef LOAD_EXTEND_OP
6624 /* See if a MEM has already been loaded with a widening operation;
6625 if it has, we can use a subreg of that. Many CISC machines
6626 also have such operations, but this is only likely to be
6627 beneficial these machines. */
6629 if (flag_expensive_optimizations
&& src_related
== 0
6630 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6631 && GET_MODE_CLASS (mode
) == MODE_INT
6632 && GET_CODE (src
) == MEM
&& ! do_not_record
6633 && LOAD_EXTEND_OP (mode
) != NIL
)
6635 enum machine_mode tmode
;
6637 /* Set what we are trying to extend and the operation it might
6638 have been extended with. */
6639 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6640 XEXP (memory_extend_rtx
, 0) = src
;
6642 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6643 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6644 tmode
= GET_MODE_WIDER_MODE (tmode
))
6646 struct table_elt
*larger_elt
;
6648 PUT_MODE (memory_extend_rtx
, tmode
);
6649 larger_elt
= lookup (memory_extend_rtx
,
6650 HASH (memory_extend_rtx
, tmode
), tmode
);
6651 if (larger_elt
== 0)
6654 for (larger_elt
= larger_elt
->first_same_value
;
6655 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6656 if (GET_CODE (larger_elt
->exp
) == REG
)
6658 src_related
= gen_lowpart_if_possible (mode
,
6667 #endif /* LOAD_EXTEND_OP */
6669 if (src
== src_folded
)
6672 /* At this point, ELT, if non-zero, points to a class of expressions
6673 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6674 and SRC_RELATED, if non-zero, each contain additional equivalent
6675 expressions. Prune these latter expressions by deleting expressions
6676 already in the equivalence class.
6678 Check for an equivalent identical to the destination. If found,
6679 this is the preferred equivalent since it will likely lead to
6680 elimination of the insn. Indicate this by placing it in
6683 if (elt
) elt
= elt
->first_same_value
;
6684 for (p
= elt
; p
; p
= p
->next_same_value
)
6686 enum rtx_code code
= GET_CODE (p
->exp
);
6688 /* If the expression is not valid, ignore it. Then we do not
6689 have to check for validity below. In most cases, we can use
6690 `rtx_equal_p', since canonicalization has already been done. */
6691 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6694 /* Also skip paradoxical subregs, unless that's what we're
6697 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
6698 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
6700 && GET_CODE (src
) == SUBREG
6701 && GET_MODE (src
) == GET_MODE (p
->exp
)
6702 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6703 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
6706 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6708 else if (src_folded
&& GET_CODE (src_folded
) == code
6709 && rtx_equal_p (src_folded
, p
->exp
))
6711 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6712 && rtx_equal_p (src_eqv_here
, p
->exp
))
6714 else if (src_related
&& GET_CODE (src_related
) == code
6715 && rtx_equal_p (src_related
, p
->exp
))
6718 /* This is the same as the destination of the insns, we want
6719 to prefer it. Copy it to src_related. The code below will
6720 then give it a negative cost. */
6721 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6726 /* Find the cheapest valid equivalent, trying all the available
6727 possibilities. Prefer items not in the hash table to ones
6728 that are when they are equal cost. Note that we can never
6729 worsen an insn as the current contents will also succeed.
6730 If we find an equivalent identical to the destination, use it as best,
6731 since this insn will probably be eliminated in that case. */
6734 if (rtx_equal_p (src
, dest
))
6737 src_cost
= COST (src
);
6742 if (rtx_equal_p (src_eqv_here
, dest
))
6745 src_eqv_cost
= COST (src_eqv_here
);
6750 if (rtx_equal_p (src_folded
, dest
))
6751 src_folded_cost
= -1;
6753 src_folded_cost
= COST (src_folded
);
6758 if (rtx_equal_p (src_related
, dest
))
6759 src_related_cost
= -1;
6761 src_related_cost
= COST (src_related
);
6764 /* If this was an indirect jump insn, a known label will really be
6765 cheaper even though it looks more expensive. */
6766 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6767 src_folded
= src_const
, src_folded_cost
= -1;
6769 /* Terminate loop when replacement made. This must terminate since
6770 the current contents will be tested and will always be valid. */
6775 /* Skip invalid entries. */
6776 while (elt
&& GET_CODE (elt
->exp
) != REG
6777 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6778 elt
= elt
->next_same_value
;
6780 /* A paradoxical subreg would be bad here: it'll be the right
6781 size, but later may be adjusted so that the upper bits aren't
6782 what we want. So reject it. */
6784 && GET_CODE (elt
->exp
) == SUBREG
6785 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
6786 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
6787 /* It is okay, though, if the rtx we're trying to match
6788 will ignore any of the bits we can't predict. */
6790 && GET_CODE (src
) == SUBREG
6791 && GET_MODE (src
) == GET_MODE (elt
->exp
)
6792 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6793 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
6795 elt
= elt
->next_same_value
;
6799 if (elt
) src_elt_cost
= elt
->cost
;
6801 /* Find cheapest and skip it for the next time. For items
6802 of equal cost, use this order:
6803 src_folded, src, src_eqv, src_related and hash table entry. */
6804 if (src_folded_cost
<= src_cost
6805 && src_folded_cost
<= src_eqv_cost
6806 && src_folded_cost
<= src_related_cost
6807 && src_folded_cost
<= src_elt_cost
)
6809 trial
= src_folded
, src_folded_cost
= 10000;
6810 if (src_folded_force_flag
)
6811 trial
= force_const_mem (mode
, trial
);
6813 else if (src_cost
<= src_eqv_cost
6814 && src_cost
<= src_related_cost
6815 && src_cost
<= src_elt_cost
)
6816 trial
= src
, src_cost
= 10000;
6817 else if (src_eqv_cost
<= src_related_cost
6818 && src_eqv_cost
<= src_elt_cost
)
6819 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6820 else if (src_related_cost
<= src_elt_cost
)
6821 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6824 trial
= copy_rtx (elt
->exp
);
6825 elt
= elt
->next_same_value
;
6826 src_elt_cost
= 10000;
6829 /* We don't normally have an insn matching (set (pc) (pc)), so
6830 check for this separately here. We will delete such an
6833 Tablejump insns contain a USE of the table, so simply replacing
6834 the operand with the constant won't match. This is simply an
6835 unconditional branch, however, and is therefore valid. Just
6836 insert the substitution here and we will delete and re-emit
6839 if (n_sets
== 1 && dest
== pc_rtx
6841 || (GET_CODE (trial
) == LABEL_REF
6842 && ! condjump_p (insn
))))
6844 /* If TRIAL is a label in front of a jump table, we are
6845 really falling through the switch (this is how casesi
6846 insns work), so we must branch around the table. */
6847 if (GET_CODE (trial
) == CODE_LABEL
6848 && NEXT_INSN (trial
) != 0
6849 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6850 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6851 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6853 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6855 SET_SRC (sets
[i
].rtl
) = trial
;
6856 cse_jumps_altered
= 1;
6860 /* Look for a substitution that makes a valid insn. */
6861 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6863 /* The result of apply_change_group can be ignored; see
6866 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6867 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6869 apply_change_group ();
6873 /* If we previously found constant pool entries for
6874 constants and this is a constant, try making a
6875 pool entry. Put it in src_folded unless we already have done
6876 this since that is where it likely came from. */
6878 else if (constant_pool_entries_cost
6879 && CONSTANT_P (trial
)
6880 && ! (GET_CODE (trial
) == CONST
6881 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
6883 || (GET_CODE (src_folded
) != MEM
6884 && ! src_folded_force_flag
))
6885 && GET_MODE_CLASS (mode
) != MODE_CC
6886 && mode
!= VOIDmode
)
6888 src_folded_force_flag
= 1;
6890 src_folded_cost
= constant_pool_entries_cost
;
6894 src
= SET_SRC (sets
[i
].rtl
);
6896 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6897 However, there is an important exception: If both are registers
6898 that are not the head of their equivalence class, replace SET_SRC
6899 with the head of the class. If we do not do this, we will have
6900 both registers live over a portion of the basic block. This way,
6901 their lifetimes will likely abut instead of overlapping. */
6902 if (GET_CODE (dest
) == REG
6903 && REGNO_QTY_VALID_P (REGNO (dest
))
6904 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6905 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6906 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6907 /* Don't do this if the original insn had a hard reg as
6909 && (GET_CODE (sets
[i
].src
) != REG
6910 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6911 /* We can't call canon_reg here because it won't do anything if
6912 SRC is a hard register. */
6914 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6916 src
= SET_SRC (sets
[i
].rtl
)
6917 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6918 : gen_rtx (REG
, GET_MODE (src
), first
);
6920 /* If we had a constant that is cheaper than what we are now
6921 setting SRC to, use that constant. We ignored it when we
6922 thought we could make this into a no-op. */
6923 if (src_const
&& COST (src_const
) < COST (src
)
6924 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6928 /* If we made a change, recompute SRC values. */
6929 if (src
!= sets
[i
].src
)
6932 hash_arg_in_memory
= 0;
6933 hash_arg_in_struct
= 0;
6935 sets
[i
].src_hash
= HASH (src
, mode
);
6936 sets
[i
].src_volatile
= do_not_record
;
6937 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6938 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6939 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6942 /* If this is a single SET, we are setting a register, and we have an
6943 equivalent constant, we want to add a REG_NOTE. We don't want
6944 to write a REG_EQUAL note for a constant pseudo since verifying that
6945 that pseudo hasn't been eliminated is a pain. Such a note also
6946 won't help anything. */
6947 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6948 && GET_CODE (src_const
) != REG
)
6950 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6952 /* Record the actual constant value in a REG_EQUAL note, making
6953 a new one if one does not already exist. */
6955 XEXP (tem
, 0) = src_const
;
6957 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6958 src_const
, REG_NOTES (insn
));
6960 /* If storing a constant value in a register that
6961 previously held the constant value 0,
6962 record this fact with a REG_WAS_0 note on this insn.
6964 Note that the *register* is required to have previously held 0,
6965 not just any register in the quantity and we must point to the
6966 insn that set that register to zero.
6968 Rather than track each register individually, we just see if
6969 the last set for this quantity was for this register. */
6971 if (REGNO_QTY_VALID_P (REGNO (dest
))
6972 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6974 /* See if we previously had a REG_WAS_0 note. */
6975 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6976 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6978 if ((tem
= single_set (const_insn
)) != 0
6979 && rtx_equal_p (SET_DEST (tem
), dest
))
6982 XEXP (note
, 0) = const_insn
;
6984 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6985 const_insn
, REG_NOTES (insn
));
6990 /* Now deal with the destination. */
6992 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6994 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6995 to the MEM or REG within it. */
6996 while (GET_CODE (dest
) == SIGN_EXTRACT
6997 || GET_CODE (dest
) == ZERO_EXTRACT
6998 || GET_CODE (dest
) == SUBREG
6999 || GET_CODE (dest
) == STRICT_LOW_PART
)
7001 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
7002 dest
= XEXP (dest
, 0);
7005 sets
[i
].inner_dest
= dest
;
7007 if (GET_CODE (dest
) == MEM
)
7009 #ifdef PUSH_ROUNDING
7010 /* Stack pushes invalidate the stack pointer. */
7011 rtx addr
= XEXP (dest
, 0);
7012 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7013 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7014 && XEXP (addr
, 0) == stack_pointer_rtx
)
7015 invalidate (stack_pointer_rtx
, Pmode
);
7017 dest
= fold_rtx (dest
, insn
);
7020 /* Compute the hash code of the destination now,
7021 before the effects of this instruction are recorded,
7022 since the register values used in the address computation
7023 are those before this instruction. */
7024 sets
[i
].dest_hash
= HASH (dest
, mode
);
7026 /* Don't enter a bit-field in the hash table
7027 because the value in it after the store
7028 may not equal what was stored, due to truncation. */
7030 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
7031 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
7033 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
7035 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7036 && GET_CODE (width
) == CONST_INT
7037 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7038 && ! (INTVAL (src_const
)
7039 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7040 /* Exception: if the value is constant,
7041 and it won't be truncated, record it. */
7045 /* This is chosen so that the destination will be invalidated
7046 but no new value will be recorded.
7047 We must invalidate because sometimes constant
7048 values can be recorded for bitfields. */
7049 sets
[i
].src_elt
= 0;
7050 sets
[i
].src_volatile
= 1;
7056 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7058 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7060 PUT_CODE (insn
, NOTE
);
7061 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7062 NOTE_SOURCE_FILE (insn
) = 0;
7063 cse_jumps_altered
= 1;
7064 /* One less use of the label this insn used to jump to. */
7065 --LABEL_NUSES (JUMP_LABEL (insn
));
7066 /* No more processing for this set. */
7070 /* If this SET is now setting PC to a label, we know it used to
7071 be a conditional or computed branch. So we see if we can follow
7072 it. If it was a computed branch, delete it and re-emit. */
7073 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7077 /* If this is not in the format for a simple branch and
7078 we are the only SET in it, re-emit it. */
7079 if (! simplejump_p (insn
) && n_sets
== 1)
7081 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7082 JUMP_LABEL (new) = XEXP (src
, 0);
7083 LABEL_NUSES (XEXP (src
, 0))++;
7088 /* Otherwise, force rerecognition, since it probably had
7089 a different pattern before.
7090 This shouldn't really be necessary, since whatever
7091 changed the source value above should have done this.
7092 Until the right place is found, might as well do this here. */
7093 INSN_CODE (insn
) = -1;
7095 /* Now that we've converted this jump to an unconditional jump,
7096 there is dead code after it. Delete the dead code until we
7097 reach a BARRIER, the end of the function, or a label. Do
7098 not delete NOTEs except for NOTE_INSN_DELETED since later
7099 phases assume these notes are retained. */
7103 while (NEXT_INSN (p
) != 0
7104 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7105 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7107 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7108 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7109 delete_insn (NEXT_INSN (p
));
7114 /* If we don't have a BARRIER immediately after INSN, put one there.
7115 Much code assumes that there are no NOTEs between a JUMP_INSN and
7118 if (NEXT_INSN (insn
) == 0
7119 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7120 emit_barrier_before (NEXT_INSN (insn
));
7122 /* We might have two BARRIERs separated by notes. Delete the second
7125 if (p
!= insn
&& NEXT_INSN (p
) != 0
7126 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7127 delete_insn (NEXT_INSN (p
));
7129 cse_jumps_altered
= 1;
7133 /* If destination is volatile, invalidate it and then do no further
7134 processing for this assignment. */
7136 else if (do_not_record
)
7138 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7139 || GET_CODE (dest
) == MEM
)
7140 invalidate (dest
, VOIDmode
);
7141 else if (GET_CODE (dest
) == STRICT_LOW_PART
7142 || GET_CODE (dest
) == ZERO_EXTRACT
)
7143 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7147 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7148 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7151 /* If setting CC0, record what it was set to, or a constant, if it
7152 is equivalent to a constant. If it is being set to a floating-point
7153 value, make a COMPARE with the appropriate constant of 0. If we
7154 don't do this, later code can interpret this as a test against
7155 const0_rtx, which can cause problems if we try to put it into an
7156 insn as a floating-point operand. */
7157 if (dest
== cc0_rtx
)
7159 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7160 this_insn_cc0_mode
= mode
;
7161 if (FLOAT_MODE_P (mode
))
7162 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
7168 /* Now enter all non-volatile source expressions in the hash table
7169 if they are not already present.
7170 Record their equivalence classes in src_elt.
7171 This way we can insert the corresponding destinations into
7172 the same classes even if the actual sources are no longer in them
7173 (having been invalidated). */
7175 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7176 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7178 register struct table_elt
*elt
;
7179 register struct table_elt
*classp
= sets
[0].src_elt
;
7180 rtx dest
= SET_DEST (sets
[0].rtl
);
7181 enum machine_mode eqvmode
= GET_MODE (dest
);
7183 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7185 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7188 if (insert_regs (src_eqv
, classp
, 0))
7190 rehash_using_reg (src_eqv
);
7191 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7193 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7194 elt
->in_memory
= src_eqv_in_memory
;
7195 elt
->in_struct
= src_eqv_in_struct
;
7198 /* Check to see if src_eqv_elt is the same as a set source which
7199 does not yet have an elt, and if so set the elt of the set source
7201 for (i
= 0; i
< n_sets
; i
++)
7202 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7203 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7204 sets
[i
].src_elt
= src_eqv_elt
;
7207 for (i
= 0; i
< n_sets
; i
++)
7208 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7209 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7211 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7213 /* REG_EQUAL in setting a STRICT_LOW_PART
7214 gives an equivalent for the entire destination register,
7215 not just for the subreg being stored in now.
7216 This is a more interesting equivalence, so we arrange later
7217 to treat the entire reg as the destination. */
7218 sets
[i
].src_elt
= src_eqv_elt
;
7219 sets
[i
].src_hash
= src_eqv_hash
;
7223 /* Insert source and constant equivalent into hash table, if not
7225 register struct table_elt
*classp
= src_eqv_elt
;
7226 register rtx src
= sets
[i
].src
;
7227 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7228 enum machine_mode mode
7229 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7231 if (sets
[i
].src_elt
== 0)
7233 register struct table_elt
*elt
;
7235 /* Note that these insert_regs calls cannot remove
7236 any of the src_elt's, because they would have failed to
7237 match if not still valid. */
7238 if (insert_regs (src
, classp
, 0))
7240 rehash_using_reg (src
);
7241 sets
[i
].src_hash
= HASH (src
, mode
);
7243 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7244 elt
->in_memory
= sets
[i
].src_in_memory
;
7245 elt
->in_struct
= sets
[i
].src_in_struct
;
7246 sets
[i
].src_elt
= classp
= elt
;
7249 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7250 && src
!= sets
[i
].src_const
7251 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7252 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7253 sets
[i
].src_const_hash
, mode
);
7256 else if (sets
[i
].src_elt
== 0)
7257 /* If we did not insert the source into the hash table (e.g., it was
7258 volatile), note the equivalence class for the REG_EQUAL value, if any,
7259 so that the destination goes into that class. */
7260 sets
[i
].src_elt
= src_eqv_elt
;
7262 invalidate_from_clobbers (x
);
7264 /* Some registers are invalidated by subroutine calls. Memory is
7265 invalidated by non-constant calls. */
7267 if (GET_CODE (insn
) == CALL_INSN
)
7269 if (! CONST_CALL_P (insn
))
7270 invalidate_memory ();
7271 invalidate_for_call ();
7274 /* Now invalidate everything set by this instruction.
7275 If a SUBREG or other funny destination is being set,
7276 sets[i].rtl is still nonzero, so here we invalidate the reg
7277 a part of which is being set. */
7279 for (i
= 0; i
< n_sets
; i
++)
7282 /* We can't use the inner dest, because the mode associated with
7283 a ZERO_EXTRACT is significant. */
7284 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7286 /* Needed for registers to remove the register from its
7287 previous quantity's chain.
7288 Needed for memory if this is a nonvarying address, unless
7289 we have just done an invalidate_memory that covers even those. */
7290 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7291 || GET_CODE (dest
) == MEM
)
7292 invalidate (dest
, VOIDmode
);
7293 else if (GET_CODE (dest
) == STRICT_LOW_PART
7294 || GET_CODE (dest
) == ZERO_EXTRACT
)
7295 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7298 /* Make sure registers mentioned in destinations
7299 are safe for use in an expression to be inserted.
7300 This removes from the hash table
7301 any invalid entry that refers to one of these registers.
7303 We don't care about the return value from mention_regs because
7304 we are going to hash the SET_DEST values unconditionally. */
7306 for (i
= 0; i
< n_sets
; i
++)
7307 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7308 mention_regs (SET_DEST (sets
[i
].rtl
));
7310 /* We may have just removed some of the src_elt's from the hash table.
7311 So replace each one with the current head of the same class. */
7313 for (i
= 0; i
< n_sets
; i
++)
7316 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7317 /* If elt was removed, find current head of same class,
7318 or 0 if nothing remains of that class. */
7320 register struct table_elt
*elt
= sets
[i
].src_elt
;
7322 while (elt
&& elt
->prev_same_value
)
7323 elt
= elt
->prev_same_value
;
7325 while (elt
&& elt
->first_same_value
== 0)
7326 elt
= elt
->next_same_value
;
7327 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7331 /* Now insert the destinations into their equivalence classes. */
7333 for (i
= 0; i
< n_sets
; i
++)
7336 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7337 register struct table_elt
*elt
;
7339 /* Don't record value if we are not supposed to risk allocating
7340 floating-point values in registers that might be wider than
7342 if ((flag_float_store
7343 && GET_CODE (dest
) == MEM
7344 && FLOAT_MODE_P (GET_MODE (dest
)))
7345 /* Don't record BLKmode values, because we don't know the
7346 size of it, and can't be sure that other BLKmode values
7347 have the same or smaller size. */
7348 || GET_MODE (dest
) == BLKmode
7349 /* Don't record values of destinations set inside a libcall block
7350 since we might delete the libcall. Things should have been set
7351 up so we won't want to reuse such a value, but we play it safe
7354 /* If we didn't put a REG_EQUAL value or a source into the hash
7355 table, there is no point is recording DEST. */
7356 || sets
[i
].src_elt
== 0
7357 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7358 or SIGN_EXTEND, don't record DEST since it can cause
7359 some tracking to be wrong.
7361 ??? Think about this more later. */
7362 || (GET_CODE (dest
) == SUBREG
7363 && (GET_MODE_SIZE (GET_MODE (dest
))
7364 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7365 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7366 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7369 /* STRICT_LOW_PART isn't part of the value BEING set,
7370 and neither is the SUBREG inside it.
7371 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7372 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7373 dest
= SUBREG_REG (XEXP (dest
, 0));
7375 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7376 /* Registers must also be inserted into chains for quantities. */
7377 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7379 /* If `insert_regs' changes something, the hash code must be
7381 rehash_using_reg (dest
);
7382 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7385 elt
= insert (dest
, sets
[i
].src_elt
,
7386 sets
[i
].dest_hash
, GET_MODE (dest
));
7387 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7388 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
7389 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
7394 /* This implicitly assumes a whole struct
7395 need not have MEM_IN_STRUCT_P.
7396 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7397 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7398 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7401 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7402 narrower than M2, and both M1 and M2 are the same number of words,
7403 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7404 make that equivalence as well.
7406 However, BAR may have equivalences for which gen_lowpart_if_possible
7407 will produce a simpler value than gen_lowpart_if_possible applied to
7408 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7409 BAR's equivalences. If we don't get a simplified form, make
7410 the SUBREG. It will not be used in an equivalence, but will
7411 cause two similar assignments to be detected.
7413 Note the loop below will find SUBREG_REG (DEST) since we have
7414 already entered SRC and DEST of the SET in the table. */
7416 if (GET_CODE (dest
) == SUBREG
7417 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7419 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7420 && (GET_MODE_SIZE (GET_MODE (dest
))
7421 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7422 && sets
[i
].src_elt
!= 0)
7424 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7425 struct table_elt
*elt
, *classp
= 0;
7427 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7428 elt
= elt
->next_same_value
)
7432 struct table_elt
*src_elt
;
7434 /* Ignore invalid entries. */
7435 if (GET_CODE (elt
->exp
) != REG
7436 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7439 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7441 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
7443 src_hash
= HASH (new_src
, new_mode
);
7444 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7446 /* Put the new source in the hash table is if isn't
7450 if (insert_regs (new_src
, classp
, 0))
7452 rehash_using_reg (new_src
);
7453 src_hash
= HASH (new_src
, new_mode
);
7455 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7456 src_elt
->in_memory
= elt
->in_memory
;
7457 src_elt
->in_struct
= elt
->in_struct
;
7459 else if (classp
&& classp
!= src_elt
->first_same_value
)
7460 /* Show that two things that we've seen before are
7461 actually the same. */
7462 merge_equiv_classes (src_elt
, classp
);
7464 classp
= src_elt
->first_same_value
;
7469 /* Special handling for (set REG0 REG1)
7470 where REG0 is the "cheapest", cheaper than REG1.
7471 After cse, REG1 will probably not be used in the sequel,
7472 so (if easily done) change this insn to (set REG1 REG0) and
7473 replace REG1 with REG0 in the previous insn that computed their value.
7474 Then REG1 will become a dead store and won't cloud the situation
7475 for later optimizations.
7477 Do not make this change if REG1 is a hard register, because it will
7478 then be used in the sequel and we may be changing a two-operand insn
7479 into a three-operand insn.
7481 Also do not do this if we are operating on a copy of INSN. */
7483 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7484 && NEXT_INSN (PREV_INSN (insn
)) == insn
7485 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7486 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7487 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7488 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7489 == REGNO (SET_DEST (sets
[0].rtl
))))
7491 rtx prev
= PREV_INSN (insn
);
7492 while (prev
&& GET_CODE (prev
) == NOTE
)
7493 prev
= PREV_INSN (prev
);
7495 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7496 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7498 rtx dest
= SET_DEST (sets
[0].rtl
);
7499 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7501 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7502 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7503 SET_SRC (sets
[0].rtl
), 1);
7504 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7505 apply_change_group ();
7507 /* If REG1 was equivalent to a constant, REG0 is not. */
7509 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7511 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7512 any REG_WAS_0 note on INSN to PREV. */
7513 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7515 remove_note (prev
, note
);
7517 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7520 remove_note (insn
, note
);
7521 XEXP (note
, 1) = REG_NOTES (prev
);
7522 REG_NOTES (prev
) = note
;
7525 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7526 then we must delete it, because the value in REG0 has changed. */
7527 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7528 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7529 remove_note (insn
, note
);
7533 /* If this is a conditional jump insn, record any known equivalences due to
7534 the condition being tested. */
7536 last_jump_equiv_class
= 0;
7537 if (GET_CODE (insn
) == JUMP_INSN
7538 && n_sets
== 1 && GET_CODE (x
) == SET
7539 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7540 record_jump_equiv (insn
, 0);
7543 /* If the previous insn set CC0 and this insn no longer references CC0,
7544 delete the previous insn. Here we use the fact that nothing expects CC0
7545 to be valid over an insn, which is true until the final pass. */
7546 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7547 && (tem
= single_set (prev_insn
)) != 0
7548 && SET_DEST (tem
) == cc0_rtx
7549 && ! reg_mentioned_p (cc0_rtx
, x
))
7551 PUT_CODE (prev_insn
, NOTE
);
7552 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7553 NOTE_SOURCE_FILE (prev_insn
) = 0;
7556 prev_insn_cc0
= this_insn_cc0
;
7557 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7563 /* Remove from the ahsh table all expressions that reference memory. */
7565 invalidate_memory ()
7568 register struct table_elt
*p
, *next
;
7570 for (i
= 0; i
< NBUCKETS
; i
++)
7571 for (p
= table
[i
]; p
; p
= next
)
7573 next
= p
->next_same_hash
;
7575 remove_from_table (p
, i
);
7579 /* XXX ??? The name of this function bears little resemblance to
7580 what this function actually does. FIXME. */
7582 note_mem_written (addr
)
7585 /* Pushing or popping the stack invalidates just the stack pointer. */
7586 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7587 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7588 && GET_CODE (XEXP (addr
, 0)) == REG
7589 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7591 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7592 reg_tick
[STACK_POINTER_REGNUM
]++;
7594 /* This should be *very* rare. */
7595 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7596 invalidate (stack_pointer_rtx
, VOIDmode
);
7602 /* Perform invalidation on the basis of everything about an insn
7603 except for invalidating the actual places that are SET in it.
7604 This includes the places CLOBBERed, and anything that might
7605 alias with something that is SET or CLOBBERed.
7607 X is the pattern of the insn. */
7610 invalidate_from_clobbers (x
)
7613 if (GET_CODE (x
) == CLOBBER
)
7615 rtx ref
= XEXP (x
, 0);
7618 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7619 || GET_CODE (ref
) == MEM
)
7620 invalidate (ref
, VOIDmode
);
7621 else if (GET_CODE (ref
) == STRICT_LOW_PART
7622 || GET_CODE (ref
) == ZERO_EXTRACT
)
7623 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7626 else if (GET_CODE (x
) == PARALLEL
)
7629 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7631 register rtx y
= XVECEXP (x
, 0, i
);
7632 if (GET_CODE (y
) == CLOBBER
)
7634 rtx ref
= XEXP (y
, 0);
7635 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7636 || GET_CODE (ref
) == MEM
)
7637 invalidate (ref
, VOIDmode
);
7638 else if (GET_CODE (ref
) == STRICT_LOW_PART
7639 || GET_CODE (ref
) == ZERO_EXTRACT
)
7640 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7646 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7647 and replace any registers in them with either an equivalent constant
7648 or the canonical form of the register. If we are inside an address,
7649 only do this if the address remains valid.
7651 OBJECT is 0 except when within a MEM in which case it is the MEM.
7653 Return the replacement for X. */
7656 cse_process_notes (x
, object
)
7660 enum rtx_code code
= GET_CODE (x
);
7661 char *fmt
= GET_RTX_FORMAT (code
);
7677 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7682 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7683 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7685 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7692 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7693 /* We don't substitute VOIDmode constants into these rtx,
7694 since they would impede folding. */
7695 if (GET_MODE (new) != VOIDmode
)
7696 validate_change (object
, &XEXP (x
, 0), new, 0);
7701 i
= reg_qty
[REGNO (x
)];
7703 /* Return a constant or a constant register. */
7704 if (REGNO_QTY_VALID_P (REGNO (x
))
7705 && qty_const
[i
] != 0
7706 && (CONSTANT_P (qty_const
[i
])
7707 || GET_CODE (qty_const
[i
]) == REG
))
7709 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7714 /* Otherwise, canonicalize this register. */
7715 return canon_reg (x
, NULL_RTX
);
7721 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7723 validate_change (object
, &XEXP (x
, i
),
7724 cse_process_notes (XEXP (x
, i
), object
), 0);
7729 /* Find common subexpressions between the end test of a loop and the beginning
7730 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7732 Often we have a loop where an expression in the exit test is used
7733 in the body of the loop. For example "while (*p) *q++ = *p++;".
7734 Because of the way we duplicate the loop exit test in front of the loop,
7735 however, we don't detect that common subexpression. This will be caught
7736 when global cse is implemented, but this is a quite common case.
7738 This function handles the most common cases of these common expressions.
7739 It is called after we have processed the basic block ending with the
7740 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7741 jumps to a label used only once. */
7744 cse_around_loop (loop_start
)
7749 struct table_elt
*p
;
7751 /* If the jump at the end of the loop doesn't go to the start, we don't
7753 for (insn
= PREV_INSN (loop_start
);
7754 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7755 insn
= PREV_INSN (insn
))
7759 || GET_CODE (insn
) != NOTE
7760 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7763 /* If the last insn of the loop (the end test) was an NE comparison,
7764 we will interpret it as an EQ comparison, since we fell through
7765 the loop. Any equivalences resulting from that comparison are
7766 therefore not valid and must be invalidated. */
7767 if (last_jump_equiv_class
)
7768 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7769 p
= p
->next_same_value
)
7770 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7771 || (GET_CODE (p
->exp
) == SUBREG
7772 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
7773 invalidate (p
->exp
, VOIDmode
);
7774 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7775 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7776 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
7778 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7779 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7781 The only thing we do with SET_DEST is invalidate entries, so we
7782 can safely process each SET in order. It is slightly less efficient
7783 to do so, but we only want to handle the most common cases. */
7785 for (insn
= NEXT_INSN (loop_start
);
7786 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7787 && ! (GET_CODE (insn
) == NOTE
7788 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7789 insn
= NEXT_INSN (insn
))
7791 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7792 && (GET_CODE (PATTERN (insn
)) == SET
7793 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7794 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7795 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7796 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7797 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7798 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7799 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7800 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7805 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7806 since they are done elsewhere. This function is called via note_stores. */
7809 invalidate_skipped_set (dest
, set
)
7813 enum rtx_code code
= GET_CODE (dest
);
7816 && ! note_mem_written (dest
) /* If this is not a stack push ... */
7817 /* There are times when an address can appear varying and be a PLUS
7818 during this scan when it would be a fixed address were we to know
7819 the proper equivalences. So invalidate all memory if there is
7820 a BLKmode or nonscalar memory reference or a reference to a
7821 variable address. */
7822 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
7823 || cse_rtx_varies_p (XEXP (dest
, 0))))
7825 invalidate_memory ();
7829 if (GET_CODE (set
) == CLOBBER
7836 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
7837 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7838 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
7839 invalidate (dest
, VOIDmode
);
7842 /* Invalidate all insns from START up to the end of the function or the
7843 next label. This called when we wish to CSE around a block that is
7844 conditionally executed. */
7847 invalidate_skipped_block (start
)
7852 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7853 insn
= NEXT_INSN (insn
))
7855 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7858 if (GET_CODE (insn
) == CALL_INSN
)
7860 if (! CONST_CALL_P (insn
))
7861 invalidate_memory ();
7862 invalidate_for_call ();
7865 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7869 /* Used for communication between the following two routines; contains a
7870 value to be checked for modification. */
7872 static rtx cse_check_loop_start_value
;
7874 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7875 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7878 cse_check_loop_start (x
, set
)
7882 if (cse_check_loop_start_value
== 0
7883 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7886 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7887 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7888 cse_check_loop_start_value
= 0;
7891 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7892 a loop that starts with the label at LOOP_START.
7894 If X is a SET, we see if its SET_SRC is currently in our hash table.
7895 If so, we see if it has a value equal to some register used only in the
7896 loop exit code (as marked by jump.c).
7898 If those two conditions are true, we search backwards from the start of
7899 the loop to see if that same value was loaded into a register that still
7900 retains its value at the start of the loop.
7902 If so, we insert an insn after the load to copy the destination of that
7903 load into the equivalent register and (try to) replace our SET_SRC with that
7906 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7909 cse_set_around_loop (x
, insn
, loop_start
)
7914 struct table_elt
*src_elt
;
7916 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7917 are setting PC or CC0 or whose SET_SRC is already a register. */
7918 if (GET_CODE (x
) == SET
7919 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7920 && GET_CODE (SET_SRC (x
)) != REG
)
7922 src_elt
= lookup (SET_SRC (x
),
7923 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7924 GET_MODE (SET_DEST (x
)));
7927 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7928 src_elt
= src_elt
->next_same_value
)
7929 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7930 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7934 /* Look for an insn in front of LOOP_START that sets
7935 something in the desired mode to SET_SRC (x) before we hit
7936 a label or CALL_INSN. */
7938 for (p
= prev_nonnote_insn (loop_start
);
7939 p
&& GET_CODE (p
) != CALL_INSN
7940 && GET_CODE (p
) != CODE_LABEL
;
7941 p
= prev_nonnote_insn (p
))
7942 if ((set
= single_set (p
)) != 0
7943 && GET_CODE (SET_DEST (set
)) == REG
7944 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7945 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7947 /* We now have to ensure that nothing between P
7948 and LOOP_START modified anything referenced in
7949 SET_SRC (x). We know that nothing within the loop
7950 can modify it, or we would have invalidated it in
7954 cse_check_loop_start_value
= SET_SRC (x
);
7955 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7956 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7957 note_stores (PATTERN (q
), cse_check_loop_start
);
7959 /* If nothing was changed and we can replace our
7960 SET_SRC, add an insn after P to copy its destination
7961 to what we will be replacing SET_SRC with. */
7962 if (cse_check_loop_start_value
7963 && validate_change (insn
, &SET_SRC (x
),
7965 emit_insn_after (gen_move_insn (src_elt
->exp
,
7973 /* Now invalidate anything modified by X. */
7974 note_mem_written (SET_DEST (x
));
7976 /* See comment on similar code in cse_insn for explanation of these tests. */
7977 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7978 || GET_CODE (SET_DEST (x
)) == MEM
)
7979 invalidate (SET_DEST (x
), VOIDmode
);
7980 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
7981 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
7982 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
7985 /* Find the end of INSN's basic block and return its range,
7986 the total number of SETs in all the insns of the block, the last insn of the
7987 block, and the branch path.
7989 The branch path indicates which branches should be followed. If a non-zero
7990 path size is specified, the block should be rescanned and a different set
7991 of branches will be taken. The branch path is only used if
7992 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7994 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7995 used to describe the block. It is filled in with the information about
7996 the current block. The incoming structure's branch path, if any, is used
7997 to construct the output branch path. */
8000 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8002 struct cse_basic_block_data
*data
;
8009 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8010 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8011 int path_size
= data
->path_size
;
8015 /* Update the previous branch path, if any. If the last branch was
8016 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8017 shorten the path by one and look at the previous branch. We know that
8018 at least one branch must have been taken if PATH_SIZE is non-zero. */
8019 while (path_size
> 0)
8021 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8023 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8030 /* Scan to end of this basic block. */
8031 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8033 /* Don't cse out the end of a loop. This makes a difference
8034 only for the unusual loops that always execute at least once;
8035 all other loops have labels there so we will stop in any case.
8036 Cse'ing out the end of the loop is dangerous because it
8037 might cause an invariant expression inside the loop
8038 to be reused after the end of the loop. This would make it
8039 hard to move the expression out of the loop in loop.c,
8040 especially if it is one of several equivalent expressions
8041 and loop.c would like to eliminate it.
8043 If we are running after loop.c has finished, we can ignore
8044 the NOTE_INSN_LOOP_END. */
8046 if (! after_loop
&& GET_CODE (p
) == NOTE
8047 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8050 /* Don't cse over a call to setjmp; on some machines (eg vax)
8051 the regs restored by the longjmp come from
8052 a later time than the setjmp. */
8053 if (GET_CODE (p
) == NOTE
8054 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8057 /* A PARALLEL can have lots of SETs in it,
8058 especially if it is really an ASM_OPERANDS. */
8059 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8060 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8061 nsets
+= XVECLEN (PATTERN (p
), 0);
8062 else if (GET_CODE (p
) != NOTE
)
8065 /* Ignore insns made by CSE; they cannot affect the boundaries of
8068 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8069 high_cuid
= INSN_CUID (p
);
8070 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8071 low_cuid
= INSN_CUID (p
);
8073 /* See if this insn is in our branch path. If it is and we are to
8075 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8077 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8080 /* Point to next entry in path, if any. */
8084 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8085 was specified, we haven't reached our maximum path length, there are
8086 insns following the target of the jump, this is the only use of the
8087 jump label, and the target label is preceded by a BARRIER.
8089 Alternatively, we can follow the jump if it branches around a
8090 block of code and there are no other branches into the block.
8091 In this case invalidate_skipped_block will be called to invalidate any
8092 registers set in the block when following the jump. */
8094 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8095 && GET_CODE (p
) == JUMP_INSN
8096 && GET_CODE (PATTERN (p
)) == SET
8097 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8098 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8099 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8101 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8102 if ((GET_CODE (q
) != NOTE
8103 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8104 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8105 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8108 /* If we ran into a BARRIER, this code is an extension of the
8109 basic block when the branch is taken. */
8110 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8112 /* Don't allow ourself to keep walking around an
8113 always-executed loop. */
8114 if (next_real_insn (q
) == next
)
8120 /* Similarly, don't put a branch in our path more than once. */
8121 for (i
= 0; i
< path_entry
; i
++)
8122 if (data
->path
[i
].branch
== p
)
8125 if (i
!= path_entry
)
8128 data
->path
[path_entry
].branch
= p
;
8129 data
->path
[path_entry
++].status
= TAKEN
;
8131 /* This branch now ends our path. It was possible that we
8132 didn't see this branch the last time around (when the
8133 insn in front of the target was a JUMP_INSN that was
8134 turned into a no-op). */
8135 path_size
= path_entry
;
8138 /* Mark block so we won't scan it again later. */
8139 PUT_MODE (NEXT_INSN (p
), QImode
);
8141 /* Detect a branch around a block of code. */
8142 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8146 if (next_real_insn (q
) == next
)
8152 for (i
= 0; i
< path_entry
; i
++)
8153 if (data
->path
[i
].branch
== p
)
8156 if (i
!= path_entry
)
8159 /* This is no_labels_between_p (p, q) with an added check for
8160 reaching the end of a function (in case Q precedes P). */
8161 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8162 if (GET_CODE (tmp
) == CODE_LABEL
)
8167 data
->path
[path_entry
].branch
= p
;
8168 data
->path
[path_entry
++].status
= AROUND
;
8170 path_size
= path_entry
;
8173 /* Mark block so we won't scan it again later. */
8174 PUT_MODE (NEXT_INSN (p
), QImode
);
8181 data
->low_cuid
= low_cuid
;
8182 data
->high_cuid
= high_cuid
;
8183 data
->nsets
= nsets
;
8186 /* If all jumps in the path are not taken, set our path length to zero
8187 so a rescan won't be done. */
8188 for (i
= path_size
- 1; i
>= 0; i
--)
8189 if (data
->path
[i
].status
!= NOT_TAKEN
)
8193 data
->path_size
= 0;
8195 data
->path_size
= path_size
;
8197 /* End the current branch path. */
8198 data
->path
[path_size
].branch
= 0;
8201 /* Perform cse on the instructions of a function.
8202 F is the first instruction.
8203 NREGS is one plus the highest pseudo-reg number used in the instruction.
8205 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8206 (only if -frerun-cse-after-loop).
8208 Returns 1 if jump_optimize should be redone due to simplifications
8209 in conditional jump instructions. */
8212 cse_main (f
, nregs
, after_loop
, file
)
8218 struct cse_basic_block_data val
;
8219 register rtx insn
= f
;
8222 cse_jumps_altered
= 0;
8223 recorded_label_ref
= 0;
8224 constant_pool_entries_cost
= 0;
8228 init_alias_analysis ();
8232 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8233 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8235 for (i
= 0; i
< nregs
; i
++)
8237 all_minus_one
[i
] = -1;
8241 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8242 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8243 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8244 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8245 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8247 #ifdef LOAD_EXTEND_OP
8249 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8250 and change the code and mode as appropriate. */
8251 memory_extend_rtx
= gen_rtx (ZERO_EXTEND
, VOIDmode
, NULL_RTX
);
8254 /* Discard all the free elements of the previous function
8255 since they are allocated in the temporarily obstack. */
8256 bzero ((char *) table
, sizeof table
);
8257 free_element_chain
= 0;
8258 n_elements_made
= 0;
8260 /* Find the largest uid. */
8262 max_uid
= get_max_uid ();
8263 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8264 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8266 /* Compute the mapping from uids to cuids.
8267 CUIDs are numbers assigned to insns, like uids,
8268 except that cuids increase monotonically through the code.
8269 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8270 between two insns is not affected by -g. */
8272 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8274 if (GET_CODE (insn
) != NOTE
8275 || NOTE_LINE_NUMBER (insn
) < 0)
8276 INSN_CUID (insn
) = ++i
;
8278 /* Give a line number note the same cuid as preceding insn. */
8279 INSN_CUID (insn
) = i
;
8282 /* Initialize which registers are clobbered by calls. */
8284 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8286 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8287 if ((call_used_regs
[i
]
8288 /* Used to check !fixed_regs[i] here, but that isn't safe;
8289 fixed regs are still call-clobbered, and sched can get
8290 confused if they can "live across calls".
8292 The frame pointer is always preserved across calls. The arg
8293 pointer is if it is fixed. The stack pointer usually is, unless
8294 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8295 will be present. If we are generating PIC code, the PIC offset
8296 table register is preserved across calls. */
8298 && i
!= STACK_POINTER_REGNUM
8299 && i
!= FRAME_POINTER_REGNUM
8300 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8301 && i
!= HARD_FRAME_POINTER_REGNUM
8303 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8304 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8306 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8307 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8311 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8313 /* Loop over basic blocks.
8314 Compute the maximum number of qty's needed for each basic block
8315 (which is 2 for each SET). */
8319 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8320 flag_cse_skip_blocks
);
8322 /* If this basic block was already processed or has no sets, skip it. */
8323 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8325 PUT_MODE (insn
, VOIDmode
);
8326 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8331 cse_basic_block_start
= val
.low_cuid
;
8332 cse_basic_block_end
= val
.high_cuid
;
8333 max_qty
= val
.nsets
* 2;
8336 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8337 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8340 /* Make MAX_QTY bigger to give us room to optimize
8341 past the end of this basic block, if that should prove useful. */
8347 /* If this basic block is being extended by following certain jumps,
8348 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8349 Otherwise, we start after this basic block. */
8350 if (val
.path_size
> 0)
8351 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8354 int old_cse_jumps_altered
= cse_jumps_altered
;
8357 /* When cse changes a conditional jump to an unconditional
8358 jump, we want to reprocess the block, since it will give
8359 us a new branch path to investigate. */
8360 cse_jumps_altered
= 0;
8361 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8362 if (cse_jumps_altered
== 0
8363 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8366 cse_jumps_altered
|= old_cse_jumps_altered
;
8374 /* Tell refers_to_mem_p that qty_const info is not available. */
8377 if (max_elements_made
< n_elements_made
)
8378 max_elements_made
= n_elements_made
;
8380 return cse_jumps_altered
|| recorded_label_ref
;
8383 /* Process a single basic block. FROM and TO and the limits of the basic
8384 block. NEXT_BRANCH points to the branch path when following jumps or
8385 a null path when not following jumps.
8387 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8388 loop. This is true when we are being called for the last time on a
8389 block and this CSE pass is before loop.c. */
8392 cse_basic_block (from
, to
, next_branch
, around_loop
)
8393 register rtx from
, to
;
8394 struct branch_path
*next_branch
;
8399 int in_libcall_block
= 0;
8402 /* Each of these arrays is undefined before max_reg, so only allocate
8403 the space actually needed and adjust the start below. */
8405 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8406 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8407 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8408 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8409 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8411 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8412 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8413 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8415 qty_first_reg
-= max_reg
;
8416 qty_last_reg
-= max_reg
;
8417 qty_mode
-= max_reg
;
8418 qty_const
-= max_reg
;
8419 qty_const_insn
-= max_reg
;
8420 qty_comparison_code
-= max_reg
;
8421 qty_comparison_qty
-= max_reg
;
8422 qty_comparison_const
-= max_reg
;
8426 /* TO might be a label. If so, protect it from being deleted. */
8427 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8430 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8432 register enum rtx_code code
;
8434 struct table_elt
*p
, *next
;
8436 /* If we have processed 1,000 insns, flush the hash table to avoid
8437 extreme quadratic behavior.
8439 ??? This is a real kludge and needs to be done some other way.
8441 if (num_insns
++ > 1000)
8443 for (i
= 0; i
< NBUCKETS
; i
++)
8444 for (p
= table
[i
]; p
; p
= next
)
8446 next
= p
->next_same_hash
;
8448 if (GET_CODE (p
->exp
) == REG
)
8449 invalidate (p
->exp
, p
->mode
);
8451 remove_from_table (p
, i
);
8457 /* See if this is a branch that is part of the path. If so, and it is
8458 to be taken, do so. */
8459 if (next_branch
->branch
== insn
)
8461 enum taken status
= next_branch
++->status
;
8462 if (status
!= NOT_TAKEN
)
8464 if (status
== TAKEN
)
8465 record_jump_equiv (insn
, 1);
8467 invalidate_skipped_block (NEXT_INSN (insn
));
8469 /* Set the last insn as the jump insn; it doesn't affect cc0.
8470 Then follow this branch. */
8475 insn
= JUMP_LABEL (insn
);
8480 code
= GET_CODE (insn
);
8481 if (GET_MODE (insn
) == QImode
)
8482 PUT_MODE (insn
, VOIDmode
);
8484 if (GET_RTX_CLASS (code
) == 'i')
8486 /* Process notes first so we have all notes in canonical forms when
8487 looking for duplicate operations. */
8489 if (REG_NOTES (insn
))
8490 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8492 /* Track when we are inside in LIBCALL block. Inside such a block,
8493 we do not want to record destinations. The last insn of a
8494 LIBCALL block is not considered to be part of the block, since
8495 its destination is the result of the block and hence should be
8498 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8499 in_libcall_block
= 1;
8500 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8501 in_libcall_block
= 0;
8503 cse_insn (insn
, in_libcall_block
);
8506 /* If INSN is now an unconditional jump, skip to the end of our
8507 basic block by pretending that we just did the last insn in the
8508 basic block. If we are jumping to the end of our block, show
8509 that we can have one usage of TO. */
8511 if (simplejump_p (insn
))
8516 if (JUMP_LABEL (insn
) == to
)
8519 /* Maybe TO was deleted because the jump is unconditional.
8520 If so, there is nothing left in this basic block. */
8521 /* ??? Perhaps it would be smarter to set TO
8522 to whatever follows this insn,
8523 and pretend the basic block had always ended here. */
8524 if (INSN_DELETED_P (to
))
8527 insn
= PREV_INSN (to
);
8530 /* See if it is ok to keep on going past the label
8531 which used to end our basic block. Remember that we incremented
8532 the count of that label, so we decrement it here. If we made
8533 a jump unconditional, TO_USAGE will be one; in that case, we don't
8534 want to count the use in that jump. */
8536 if (to
!= 0 && NEXT_INSN (insn
) == to
8537 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8539 struct cse_basic_block_data val
;
8542 insn
= NEXT_INSN (to
);
8544 if (LABEL_NUSES (to
) == 0)
8545 insn
= delete_insn (to
);
8547 /* If TO was the last insn in the function, we are done. */
8551 /* If TO was preceded by a BARRIER we are done with this block
8552 because it has no continuation. */
8553 prev
= prev_nonnote_insn (to
);
8554 if (prev
&& GET_CODE (prev
) == BARRIER
)
8557 /* Find the end of the following block. Note that we won't be
8558 following branches in this case. */
8561 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8563 /* If the tables we allocated have enough space left
8564 to handle all the SETs in the next basic block,
8565 continue through it. Otherwise, return,
8566 and that block will be scanned individually. */
8567 if (val
.nsets
* 2 + next_qty
> max_qty
)
8570 cse_basic_block_start
= val
.low_cuid
;
8571 cse_basic_block_end
= val
.high_cuid
;
8574 /* Prevent TO from being deleted if it is a label. */
8575 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8578 /* Back up so we process the first insn in the extension. */
8579 insn
= PREV_INSN (insn
);
8583 if (next_qty
> max_qty
)
8586 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8587 the previous insn is the only insn that branches to the head of a loop,
8588 we can cse into the loop. Don't do this if we changed the jump
8589 structure of a loop unless we aren't going to be following jumps. */
8591 if ((cse_jumps_altered
== 0
8592 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8593 && around_loop
&& to
!= 0
8594 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8595 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8596 && JUMP_LABEL (PREV_INSN (to
)) != 0
8597 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8598 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8600 return to
? NEXT_INSN (to
) : 0;
8603 /* Count the number of times registers are used (not set) in X.
8604 COUNTS is an array in which we accumulate the count, INCR is how much
8605 we count each register usage.
8607 Don't count a usage of DEST, which is the SET_DEST of a SET which
8608 contains X in its SET_SRC. This is because such a SET does not
8609 modify the liveness of DEST. */
8612 count_reg_usage (x
, counts
, dest
, incr
)
8625 switch (code
= GET_CODE (x
))
8629 counts
[REGNO (x
)] += incr
;
8643 /* Unless we are setting a REG, count everything in SET_DEST. */
8644 if (GET_CODE (SET_DEST (x
)) != REG
)
8645 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8647 /* If SRC has side-effects, then we can't delete this insn, so the
8648 usage of SET_DEST inside SRC counts.
8650 ??? Strictly-speaking, we might be preserving this insn
8651 because some other SET has side-effects, but that's hard
8652 to do and can't happen now. */
8653 count_reg_usage (SET_SRC (x
), counts
,
8654 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8659 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8661 /* ... falls through ... */
8664 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8666 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8669 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8674 if (REG_NOTE_KIND (x
) == REG_EQUAL
8675 || GET_CODE (XEXP (x
,0)) == USE
)
8676 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8677 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8684 fmt
= GET_RTX_FORMAT (code
);
8685 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8688 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8689 else if (fmt
[i
] == 'E')
8690 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8691 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8695 /* Scan all the insns and delete any that are dead; i.e., they store a register
8696 that is never used or they copy a register to itself.
8698 This is used to remove insns made obviously dead by cse. It improves the
8699 heuristics in loop since it won't try to move dead invariants out of loops
8700 or make givs for dead quantities. The remaining passes of the compilation
8701 are also sped up. */
8704 delete_dead_from_cse (insns
, nreg
)
8708 int *counts
= (int *) alloca (nreg
* sizeof (int));
8714 /* First count the number of times each register is used. */
8715 bzero ((char *) counts
, sizeof (int) * nreg
);
8716 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8717 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8719 /* Go from the last insn to the first and delete insns that only set unused
8720 registers or copy a register to itself. As we delete an insn, remove
8721 usage counts for registers it uses. */
8722 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8726 prev
= prev_real_insn (insn
);
8728 /* Don't delete any insns that are part of a libcall block.
8729 Flow or loop might get confused if we did that. Remember
8730 that we are scanning backwards. */
8731 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8736 else if (GET_CODE (PATTERN (insn
)) == SET
)
8738 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8739 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8743 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8744 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8745 && ((tem
= next_nonnote_insn (insn
)) == 0
8746 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8747 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8750 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8751 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8752 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8753 || side_effects_p (SET_SRC (PATTERN (insn
))))
8756 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8757 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8759 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8761 if (GET_CODE (elt
) == SET
)
8763 if (GET_CODE (SET_DEST (elt
)) == REG
8764 && SET_DEST (elt
) == SET_SRC (elt
))
8768 else if (GET_CODE (SET_DEST (elt
)) == CC0
8769 && ! side_effects_p (SET_SRC (elt
))
8770 && ((tem
= next_nonnote_insn (insn
)) == 0
8771 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8772 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8775 else if (GET_CODE (SET_DEST (elt
)) != REG
8776 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8777 || counts
[REGNO (SET_DEST (elt
))] != 0
8778 || side_effects_p (SET_SRC (elt
)))
8781 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8787 /* If this is a dead insn, delete it and show registers in it aren't
8792 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8796 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))