1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Must precede rtl.h for FFS. */
27 #include "hard-reg-set.h"
30 #include "insn-config.h"
35 /* The basic idea of common subexpression elimination is to go
36 through the code, keeping a record of expressions that would
37 have the same value at the current scan point, and replacing
38 expressions encountered with the cheapest equivalent expression.
40 It is too complicated to keep track of the different possibilities
41 when control paths merge; so, at each label, we forget all that is
42 known and start fresh. This can be described as processing each
43 basic block separately. Note, however, that these are not quite
44 the same as the basic blocks found by a later pass and used for
45 data flow analysis and register packing. We do not need to start fresh
46 after a conditional jump instruction if there is no label there.
48 We use two data structures to record the equivalent expressions:
49 a hash table for most expressions, and several vectors together
50 with "quantity numbers" to record equivalent (pseudo) registers.
52 The use of the special data structure for registers is desirable
53 because it is faster. It is possible because registers references
54 contain a fairly small number, the register number, taken from
55 a contiguously allocated series, and two register references are
56 identical if they have the same number. General expressions
57 do not have any such thing, so the only way to retrieve the
58 information recorded on an expression other than a register
59 is to keep it in a hash table.
61 Registers and "quantity numbers":
63 At the start of each basic block, all of the (hardware and pseudo)
64 registers used in the function are given distinct quantity
65 numbers to indicate their contents. During scan, when the code
66 copies one register into another, we copy the quantity number.
67 When a register is loaded in any other way, we allocate a new
68 quantity number to describe the value generated by this operation.
69 `reg_qty' records what quantity a register is currently thought
72 All real quantity numbers are greater than or equal to `max_reg'.
73 If register N has not been assigned a quantity, reg_qty[N] will equal N.
75 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
76 variables should be referenced with an index below `max_reg'.
78 We also maintain a bidirectional chain of registers for each
79 quantity number. `qty_first_reg', `qty_last_reg',
80 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
82 The first register in a chain is the one whose lifespan is least local.
83 Among equals, it is the one that was seen first.
84 We replace any equivalent register with that one.
86 If two registers have the same quantity number, it must be true that
87 REG expressions with `qty_mode' must be in the hash table for both
88 registers and must be in the same class.
90 The converse is not true. Since hard registers may be referenced in
91 any mode, two REG expressions might be equivalent in the hash table
92 but not have the same quantity number if the quantity number of one
93 of the registers is not the same mode as those expressions.
95 Constants and quantity numbers
97 When a quantity has a known constant value, that value is stored
98 in the appropriate element of qty_const. This is in addition to
99 putting the constant in the hash table as is usual for non-regs.
101 Whether a reg or a constant is preferred is determined by the configuration
102 macro CONST_COSTS and will often depend on the constant value. In any
103 event, expressions containing constants can be simplified, by fold_rtx.
105 When a quantity has a known nearly constant value (such as an address
106 of a stack slot), that value is stored in the appropriate element
109 Integer constants don't have a machine mode. However, cse
110 determines the intended machine mode from the destination
111 of the instruction that moves the constant. The machine mode
112 is recorded in the hash table along with the actual RTL
113 constant expression so that different modes are kept separate.
117 To record known equivalences among expressions in general
118 we use a hash table called `table'. It has a fixed number of buckets
119 that contain chains of `struct table_elt' elements for expressions.
120 These chains connect the elements whose expressions have the same
123 Other chains through the same elements connect the elements which
124 currently have equivalent values.
126 Register references in an expression are canonicalized before hashing
127 the expression. This is done using `reg_qty' and `qty_first_reg'.
128 The hash code of a register reference is computed using the quantity
129 number, not the register number.
131 When the value of an expression changes, it is necessary to remove from the
132 hash table not just that expression but all expressions whose values
133 could be different as a result.
135 1. If the value changing is in memory, except in special cases
136 ANYTHING referring to memory could be changed. That is because
137 nobody knows where a pointer does not point.
138 The function `invalidate_memory' removes what is necessary.
140 The special cases are when the address is constant or is
141 a constant plus a fixed register such as the frame pointer
142 or a static chain pointer. When such addresses are stored in,
143 we can tell exactly which other such addresses must be invalidated
144 due to overlap. `invalidate' does this.
145 All expressions that refer to non-constant
146 memory addresses are also invalidated. `invalidate_memory' does this.
148 2. If the value changing is a register, all expressions
149 containing references to that register, and only those,
152 Because searching the entire hash table for expressions that contain
153 a register is very slow, we try to figure out when it isn't necessary.
154 Precisely, this is necessary only when expressions have been
155 entered in the hash table using this register, and then the value has
156 changed, and then another expression wants to be added to refer to
157 the register's new value. This sequence of circumstances is rare
158 within any one basic block.
160 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
161 reg_tick[i] is incremented whenever a value is stored in register i.
162 reg_in_table[i] holds -1 if no references to register i have been
163 entered in the table; otherwise, it contains the value reg_tick[i] had
164 when the references were entered. If we want to enter a reference
165 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
166 Until we want to enter a new entry, the mere fact that the two vectors
167 don't match makes the entries be ignored if anyone tries to match them.
169 Registers themselves are entered in the hash table as well as in
170 the equivalent-register chains. However, the vectors `reg_tick'
171 and `reg_in_table' do not apply to expressions which are simple
172 register references. These expressions are removed from the table
173 immediately when they become invalid, and this can be done even if
174 we do not immediately search for all the expressions that refer to
177 A CLOBBER rtx in an instruction invalidates its operand for further
178 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
179 invalidates everything that resides in memory.
183 Constant expressions that differ only by an additive integer
184 are called related. When a constant expression is put in
185 the table, the related expression with no constant term
186 is also entered. These are made to point at each other
187 so that it is possible to find out if there exists any
188 register equivalent to an expression related to a given expression. */
190 /* One plus largest register number used in this function. */
194 /* Length of vectors indexed by quantity number.
195 We know in advance we will not need a quantity number this big. */
199 /* Next quantity number to be allocated.
200 This is 1 + the largest number needed so far. */
204 /* Indexed by quantity number, gives the first (or last) (pseudo) register
205 in the chain of registers that currently contain this quantity. */
207 static int *qty_first_reg
;
208 static int *qty_last_reg
;
210 /* Index by quantity number, gives the mode of the quantity. */
212 static enum machine_mode
*qty_mode
;
214 /* Indexed by quantity number, gives the rtx of the constant value of the
215 quantity, or zero if it does not have a known value.
216 A sum of the frame pointer (or arg pointer) plus a constant
217 can also be entered here. */
219 static rtx
*qty_const
;
221 /* Indexed by qty number, gives the insn that stored the constant value
222 recorded in `qty_const'. */
224 static rtx
*qty_const_insn
;
226 /* The next three variables are used to track when a comparison between a
227 quantity and some constant or register has been passed. In that case, we
228 know the results of the comparison in case we see it again. These variables
229 record a comparison that is known to be true. */
231 /* Indexed by qty number, gives the rtx code of a comparison with a known
232 result involving this quantity. If none, it is UNKNOWN. */
233 static enum rtx_code
*qty_comparison_code
;
235 /* Indexed by qty number, gives the constant being compared against in a
236 comparison of known result. If no such comparison, it is undefined.
237 If the comparison is not with a constant, it is zero. */
239 static rtx
*qty_comparison_const
;
241 /* Indexed by qty number, gives the quantity being compared against in a
242 comparison of known result. If no such comparison, if it undefined.
243 If the comparison is not with a register, it is -1. */
245 static int *qty_comparison_qty
;
248 /* For machines that have a CC0, we do not record its value in the hash
249 table since its use is guaranteed to be the insn immediately following
250 its definition and any other insn is presumed to invalidate it.
252 Instead, we store below the value last assigned to CC0. If it should
253 happen to be a constant, it is stored in preference to the actual
254 assigned value. In case it is a constant, we store the mode in which
255 the constant should be interpreted. */
257 static rtx prev_insn_cc0
;
258 static enum machine_mode prev_insn_cc0_mode
;
261 /* Previous actual insn. 0 if at first insn of basic block. */
263 static rtx prev_insn
;
265 /* Insn being scanned. */
267 static rtx this_insn
;
269 /* Index by (pseudo) register number, gives the quantity number
270 of the register's current contents. */
274 /* Index by (pseudo) register number, gives the number of the next (or
275 previous) (pseudo) register in the chain of registers sharing the same
278 Or -1 if this register is at the end of the chain.
280 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
282 static int *reg_next_eqv
;
283 static int *reg_prev_eqv
;
285 /* Index by (pseudo) register number, gives the number of times
286 that register has been altered in the current basic block. */
288 static int *reg_tick
;
290 /* Index by (pseudo) register number, gives the reg_tick value at which
291 rtx's containing this register are valid in the hash table.
292 If this does not equal the current reg_tick value, such expressions
293 existing in the hash table are invalid.
294 If this is -1, no expressions containing this register have been
295 entered in the table. */
297 static int *reg_in_table
;
299 /* A HARD_REG_SET containing all the hard registers for which there is
300 currently a REG expression in the hash table. Note the difference
301 from the above variables, which indicate if the REG is mentioned in some
302 expression in the table. */
304 static HARD_REG_SET hard_regs_in_table
;
306 /* A HARD_REG_SET containing all the hard registers that are invalidated
309 static HARD_REG_SET regs_invalidated_by_call
;
311 /* Two vectors of ints:
312 one containing max_reg -1's; the other max_reg + 500 (an approximation
313 for max_qty) elements where element i contains i.
314 These are used to initialize various other vectors fast. */
316 static int *all_minus_one
;
317 static int *consec_ints
;
319 /* CUID of insn that starts the basic block currently being cse-processed. */
321 static int cse_basic_block_start
;
323 /* CUID of insn that ends the basic block currently being cse-processed. */
325 static int cse_basic_block_end
;
327 /* Vector mapping INSN_UIDs to cuids.
328 The cuids are like uids but increase monotonically always.
329 We use them to see whether a reg is used outside a given basic block. */
331 static int *uid_cuid
;
333 /* Highest UID in UID_CUID. */
336 /* Get the cuid of an insn. */
338 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
340 /* Nonzero if cse has altered conditional jump insns
341 in such a way that jump optimization should be redone. */
343 static int cse_jumps_altered
;
345 /* canon_hash stores 1 in do_not_record
346 if it notices a reference to CC0, PC, or some other volatile
349 static int do_not_record
;
351 /* canon_hash stores 1 in hash_arg_in_memory
352 if it notices a reference to memory within the expression being hashed. */
354 static int hash_arg_in_memory
;
356 /* canon_hash stores 1 in hash_arg_in_struct
357 if it notices a reference to memory that's part of a structure. */
359 static int hash_arg_in_struct
;
361 /* The hash table contains buckets which are chains of `struct table_elt's,
362 each recording one expression's information.
363 That expression is in the `exp' field.
365 Those elements with the same hash code are chained in both directions
366 through the `next_same_hash' and `prev_same_hash' fields.
368 Each set of expressions with equivalent values
369 are on a two-way chain through the `next_same_value'
370 and `prev_same_value' fields, and all point with
371 the `first_same_value' field at the first element in
372 that chain. The chain is in order of increasing cost.
373 Each element's cost value is in its `cost' field.
375 The `in_memory' field is nonzero for elements that
376 involve any reference to memory. These elements are removed
377 whenever a write is done to an unidentified location in memory.
378 To be safe, we assume that a memory address is unidentified unless
379 the address is either a symbol constant or a constant plus
380 the frame pointer or argument pointer.
382 The `in_struct' field is nonzero for elements that
383 involve any reference to memory inside a structure or array.
385 The `related_value' field is used to connect related expressions
386 (that differ by adding an integer).
387 The related expressions are chained in a circular fashion.
388 `related_value' is zero for expressions for which this
391 The `cost' field stores the cost of this element's expression.
393 The `is_const' flag is set if the element is a constant (including
396 The `flag' field is used as a temporary during some search routines.
398 The `mode' field is usually the same as GET_MODE (`exp'), but
399 if `exp' is a CONST_INT and has no machine mode then the `mode'
400 field is the mode it was being used as. Each constant is
401 recorded separately for each mode it is used with. */
407 struct table_elt
*next_same_hash
;
408 struct table_elt
*prev_same_hash
;
409 struct table_elt
*next_same_value
;
410 struct table_elt
*prev_same_value
;
411 struct table_elt
*first_same_value
;
412 struct table_elt
*related_value
;
414 enum machine_mode mode
;
421 /* We don't want a lot of buckets, because we rarely have very many
422 things stored in the hash table, and a lot of buckets slows
423 down a lot of loops that happen frequently. */
426 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
427 register (hard registers may require `do_not_record' to be set). */
430 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
431 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
432 : canon_hash (X, M) % NBUCKETS)
434 /* Determine whether register number N is considered a fixed register for CSE.
435 It is desirable to replace other regs with fixed regs, to reduce need for
437 A reg wins if it is either the frame pointer or designated as fixed,
438 but not if it is an overlapping register. */
439 #ifdef OVERLAPPING_REGNO_P
440 #define FIXED_REGNO_P(N) \
441 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
443 && ! OVERLAPPING_REGNO_P ((N)))
445 #define FIXED_REGNO_P(N) \
446 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
450 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
451 hard registers and pointers into the frame are the cheapest with a cost
452 of 0. Next come pseudos with a cost of one and other hard registers with
453 a cost of 2. Aside from these special cases, call `rtx_cost'. */
455 #define CHEAP_REG(N) \
456 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
457 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
458 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
459 || ((N) < FIRST_PSEUDO_REGISTER \
460 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
463 (GET_CODE (X) == REG \
464 ? (CHEAP_REG (REGNO (X)) ? 0 \
465 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
467 : rtx_cost (X, SET) * 2)
469 /* Determine if the quantity number for register X represents a valid index
470 into the `qty_...' variables. */
472 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
474 static struct table_elt
*table
[NBUCKETS
];
476 /* Chain of `struct table_elt's made so far for this function
477 but currently removed from the table. */
479 static struct table_elt
*free_element_chain
;
481 /* Number of `struct table_elt' structures made so far for this function. */
483 static int n_elements_made
;
485 /* Maximum value `n_elements_made' has had so far in this compilation
486 for functions previously processed. */
488 static int max_elements_made
;
490 /* Surviving equivalence class when two equivalence classes are merged
491 by recording the effects of a jump in the last insn. Zero if the
492 last insn was not a conditional jump. */
494 static struct table_elt
*last_jump_equiv_class
;
496 /* Set to the cost of a constant pool reference if one was found for a
497 symbolic constant. If this was found, it means we should try to
498 convert constants into constant pool entries if they don't fit in
501 static int constant_pool_entries_cost
;
503 /* Bits describing what kind of values in memory must be invalidated
504 for a particular instruction. If all three bits are zero,
505 no memory refs need to be invalidated. Each bit is more powerful
506 than the preceding ones, and if a bit is set then the preceding
509 Here is how the bits are set:
510 Pushing onto the stack invalidates only the stack pointer,
511 writing at a fixed address invalidates only variable addresses,
512 writing in a structure element at variable address
513 invalidates all but scalar variables,
514 and writing in anything else at variable address invalidates everything. */
518 int sp
: 1; /* Invalidate stack pointer. */
519 int var
: 1; /* Invalidate variable addresses. */
520 int nonscalar
: 1; /* Invalidate all but scalar variables. */
521 int all
: 1; /* Invalidate all memory refs. */
524 /* Define maximum length of a branch path. */
526 #define PATHLENGTH 10
528 /* This data describes a block that will be processed by cse_basic_block. */
530 struct cse_basic_block_data
{
531 /* Lowest CUID value of insns in block. */
533 /* Highest CUID value of insns in block. */
535 /* Total number of SETs in block. */
537 /* Last insn in the block. */
539 /* Size of current branch path, if any. */
541 /* Current branch path, indicating which branches will be taken. */
543 /* The branch insn. */
545 /* Whether it should be taken or not. AROUND is the same as taken
546 except that it is used when the destination label is not preceded
548 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
552 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
553 virtual regs here because the simplify_*_operation routines are called
554 by integrate.c, which is called before virtual register instantiation. */
556 #define FIXED_BASE_PLUS_P(X) \
557 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
558 || (X) == arg_pointer_rtx \
559 || (X) == virtual_stack_vars_rtx \
560 || (X) == virtual_incoming_args_rtx \
561 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
562 && (XEXP (X, 0) == frame_pointer_rtx \
563 || XEXP (X, 0) == hard_frame_pointer_rtx \
564 || XEXP (X, 0) == arg_pointer_rtx \
565 || XEXP (X, 0) == virtual_stack_vars_rtx \
566 || XEXP (X, 0) == virtual_incoming_args_rtx)))
568 /* Similar, but also allows reference to the stack pointer.
570 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
571 arg_pointer_rtx by itself is nonzero, because on at least one machine,
572 the i960, the arg pointer is zero when it is unused. */
574 #define NONZERO_BASE_PLUS_P(X) \
575 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
576 || (X) == virtual_stack_vars_rtx \
577 || (X) == virtual_incoming_args_rtx \
578 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
579 && (XEXP (X, 0) == frame_pointer_rtx \
580 || XEXP (X, 0) == hard_frame_pointer_rtx \
581 || XEXP (X, 0) == arg_pointer_rtx \
582 || XEXP (X, 0) == virtual_stack_vars_rtx \
583 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
584 || (X) == stack_pointer_rtx \
585 || (X) == virtual_stack_dynamic_rtx \
586 || (X) == virtual_outgoing_args_rtx \
587 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
588 && (XEXP (X, 0) == stack_pointer_rtx \
589 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
590 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
592 static void new_basic_block
PROTO((void));
593 static void make_new_qty
PROTO((int));
594 static void make_regs_eqv
PROTO((int, int));
595 static void delete_reg_equiv
PROTO((int));
596 static int mention_regs
PROTO((rtx
));
597 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
598 static void free_element
PROTO((struct table_elt
*));
599 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
600 static struct table_elt
*get_element
PROTO((void));
601 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
602 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
603 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
604 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
606 static void merge_equiv_classes
PROTO((struct table_elt
*,
607 struct table_elt
*));
608 static void invalidate
PROTO((rtx
));
609 static void remove_invalid_refs
PROTO((int));
610 static void rehash_using_reg
PROTO((rtx
));
611 static void invalidate_memory
PROTO((struct write_data
*));
612 static void invalidate_for_call
PROTO((void));
613 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
614 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
615 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
616 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
617 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
620 static int refers_to_p
PROTO((rtx
, rtx
));
621 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
623 static int cse_rtx_addr_varies_p
PROTO((rtx
));
624 static rtx canon_reg
PROTO((rtx
, rtx
));
625 static void find_best_addr
PROTO((rtx
, rtx
*));
626 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
628 enum machine_mode
*));
629 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
631 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
633 static rtx fold_rtx
PROTO((rtx
, rtx
));
634 static rtx equiv_constant
PROTO((rtx
));
635 static void record_jump_equiv
PROTO((rtx
, int));
636 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
638 static void cse_insn
PROTO((rtx
, int));
639 static void note_mem_written
PROTO((rtx
, struct write_data
*));
640 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
641 static rtx cse_process_notes
PROTO((rtx
, rtx
));
642 static void cse_around_loop
PROTO((rtx
));
643 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
644 static void invalidate_skipped_block
PROTO((rtx
));
645 static void cse_check_loop_start
PROTO((rtx
, rtx
));
646 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
647 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
648 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
650 extern int rtx_equal_function_value_matters
;
652 /* Return an estimate of the cost of computing rtx X.
653 One use is in cse, to decide which expression to keep in the hash table.
654 Another is in rtl generation, to pick the cheapest way to multiply.
655 Other uses like the latter are expected in the future. */
657 /* Return the right cost to give to an operation
658 to make the cost of the corresponding register-to-register instruction
659 N times that of a fast register-to-register instruction. */
661 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
664 rtx_cost (x
, outer_code
)
666 enum rtx_code outer_code
;
669 register enum rtx_code code
;
676 /* Compute the default costs of certain things.
677 Note that RTX_COSTS can override the defaults. */
683 /* Count multiplication by 2**n as a shift,
684 because if we are considering it, we would output it as a shift. */
685 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
686 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
689 total
= COSTS_N_INSNS (5);
695 total
= COSTS_N_INSNS (7);
698 /* Used in loop.c and combine.c as a marker. */
702 /* We don't want these to be used in substitutions because
703 we have no way of validating the resulting insn. So assign
704 anything containing an ASM_OPERANDS a very high cost. */
714 return ! CHEAP_REG (REGNO (x
));
717 /* If we can't tie these modes, make this expensive. The larger
718 the mode, the more expensive it is. */
719 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
720 return COSTS_N_INSNS (2
721 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
724 RTX_COSTS (x
, code
, outer_code
);
726 CONST_COSTS (x
, code
, outer_code
);
729 /* Sum the costs of the sub-rtx's, plus cost of this operation,
730 which is already in total. */
732 fmt
= GET_RTX_FORMAT (code
);
733 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
735 total
+= rtx_cost (XEXP (x
, i
), code
);
736 else if (fmt
[i
] == 'E')
737 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
738 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
743 /* Clear the hash table and initialize each register with its own quantity,
744 for a new basic block. */
753 bzero (reg_tick
, max_reg
* sizeof (int));
755 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
756 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
757 CLEAR_HARD_REG_SET (hard_regs_in_table
);
759 /* The per-quantity values used to be initialized here, but it is
760 much faster to initialize each as it is made in `make_new_qty'. */
762 for (i
= 0; i
< NBUCKETS
; i
++)
764 register struct table_elt
*this, *next
;
765 for (this = table
[i
]; this; this = next
)
767 next
= this->next_same_hash
;
772 bzero (table
, sizeof table
);
781 /* Say that register REG contains a quantity not in any register before
782 and initialize that quantity. */
790 if (next_qty
>= max_qty
)
793 q
= reg_qty
[reg
] = next_qty
++;
794 qty_first_reg
[q
] = reg
;
795 qty_last_reg
[q
] = reg
;
796 qty_const
[q
] = qty_const_insn
[q
] = 0;
797 qty_comparison_code
[q
] = UNKNOWN
;
799 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
802 /* Make reg NEW equivalent to reg OLD.
803 OLD is not changing; NEW is. */
806 make_regs_eqv (new, old
)
807 register int new, old
;
809 register int lastr
, firstr
;
810 register int q
= reg_qty
[old
];
812 /* Nothing should become eqv until it has a "non-invalid" qty number. */
813 if (! REGNO_QTY_VALID_P (old
))
817 firstr
= qty_first_reg
[q
];
818 lastr
= qty_last_reg
[q
];
820 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
821 hard regs. Among pseudos, if NEW will live longer than any other reg
822 of the same qty, and that is beyond the current basic block,
823 make it the new canonical replacement for this qty. */
824 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
825 /* Certain fixed registers might be of the class NO_REGS. This means
826 that not only can they not be allocated by the compiler, but
827 they cannot be used in substitutions or canonicalizations
829 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
830 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
831 || (new >= FIRST_PSEUDO_REGISTER
832 && (firstr
< FIRST_PSEUDO_REGISTER
833 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
834 || (uid_cuid
[regno_first_uid
[new]]
835 < cse_basic_block_start
))
836 && (uid_cuid
[regno_last_uid
[new]]
837 > uid_cuid
[regno_last_uid
[firstr
]]))))))
839 reg_prev_eqv
[firstr
] = new;
840 reg_next_eqv
[new] = firstr
;
841 reg_prev_eqv
[new] = -1;
842 qty_first_reg
[q
] = new;
846 /* If NEW is a hard reg (known to be non-fixed), insert at end.
847 Otherwise, insert before any non-fixed hard regs that are at the
848 end. Registers of class NO_REGS cannot be used as an
849 equivalent for anything. */
850 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
851 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
852 && new >= FIRST_PSEUDO_REGISTER
)
853 lastr
= reg_prev_eqv
[lastr
];
854 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
855 if (reg_next_eqv
[lastr
] >= 0)
856 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
858 qty_last_reg
[q
] = new;
859 reg_next_eqv
[lastr
] = new;
860 reg_prev_eqv
[new] = lastr
;
864 /* Remove REG from its equivalence class. */
867 delete_reg_equiv (reg
)
870 register int q
= reg_qty
[reg
];
873 /* If invalid, do nothing. */
877 p
= reg_prev_eqv
[reg
];
878 n
= reg_next_eqv
[reg
];
887 qty_first_reg
[q
] = n
;
892 /* Remove any invalid expressions from the hash table
893 that refer to any of the registers contained in expression X.
895 Make sure that newly inserted references to those registers
896 as subexpressions will be considered valid.
898 mention_regs is not called when a register itself
899 is being stored in the table.
901 Return 1 if we have done something that may have changed the hash code
908 register enum rtx_code code
;
911 register int changed
= 0;
919 register int regno
= REGNO (x
);
920 register int endregno
921 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
922 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
925 for (i
= regno
; i
< endregno
; i
++)
927 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
928 remove_invalid_refs (i
);
930 reg_in_table
[i
] = reg_tick
[i
];
936 /* If X is a comparison or a COMPARE and either operand is a register
937 that does not have a quantity, give it one. This is so that a later
938 call to record_jump_equiv won't cause X to be assigned a different
939 hash code and not found in the table after that call.
941 It is not necessary to do this here, since rehash_using_reg can
942 fix up the table later, but doing this here eliminates the need to
943 call that expensive function in the most common case where the only
944 use of the register is in the comparison. */
946 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
948 if (GET_CODE (XEXP (x
, 0)) == REG
949 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
950 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
952 rehash_using_reg (XEXP (x
, 0));
956 if (GET_CODE (XEXP (x
, 1)) == REG
957 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
958 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
960 rehash_using_reg (XEXP (x
, 1));
965 fmt
= GET_RTX_FORMAT (code
);
966 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
968 changed
|= mention_regs (XEXP (x
, i
));
969 else if (fmt
[i
] == 'E')
970 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
971 changed
|= mention_regs (XVECEXP (x
, i
, j
));
976 /* Update the register quantities for inserting X into the hash table
977 with a value equivalent to CLASSP.
978 (If the class does not contain a REG, it is irrelevant.)
979 If MODIFIED is nonzero, X is a destination; it is being modified.
980 Note that delete_reg_equiv should be called on a register
981 before insert_regs is done on that register with MODIFIED != 0.
983 Nonzero value means that elements of reg_qty have changed
984 so X's hash code may be different. */
987 insert_regs (x
, classp
, modified
)
989 struct table_elt
*classp
;
992 if (GET_CODE (x
) == REG
)
994 register int regno
= REGNO (x
);
996 /* If REGNO is in the equivalence table already but is of the
997 wrong mode for that equivalence, don't do anything here. */
999 if (REGNO_QTY_VALID_P (regno
)
1000 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1003 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1006 for (classp
= classp
->first_same_value
;
1008 classp
= classp
->next_same_value
)
1009 if (GET_CODE (classp
->exp
) == REG
1010 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1012 make_regs_eqv (regno
, REGNO (classp
->exp
));
1016 make_new_qty (regno
);
1017 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1024 /* If X is a SUBREG, we will likely be inserting the inner register in the
1025 table. If that register doesn't have an assigned quantity number at
1026 this point but does later, the insertion that we will be doing now will
1027 not be accessible because its hash code will have changed. So assign
1028 a quantity number now. */
1030 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1031 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1033 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1034 mention_regs (SUBREG_REG (x
));
1038 return mention_regs (x
);
1041 /* Look in or update the hash table. */
1043 /* Put the element ELT on the list of free elements. */
1047 struct table_elt
*elt
;
1049 elt
->next_same_hash
= free_element_chain
;
1050 free_element_chain
= elt
;
1053 /* Return an element that is free for use. */
1055 static struct table_elt
*
1058 struct table_elt
*elt
= free_element_chain
;
1061 free_element_chain
= elt
->next_same_hash
;
1065 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1068 /* Remove table element ELT from use in the table.
1069 HASH is its hash code, made using the HASH macro.
1070 It's an argument because often that is known in advance
1071 and we save much time not recomputing it. */
1074 remove_from_table (elt
, hash
)
1075 register struct table_elt
*elt
;
1081 /* Mark this element as removed. See cse_insn. */
1082 elt
->first_same_value
= 0;
1084 /* Remove the table element from its equivalence class. */
1087 register struct table_elt
*prev
= elt
->prev_same_value
;
1088 register struct table_elt
*next
= elt
->next_same_value
;
1090 if (next
) next
->prev_same_value
= prev
;
1093 prev
->next_same_value
= next
;
1096 register struct table_elt
*newfirst
= next
;
1099 next
->first_same_value
= newfirst
;
1100 next
= next
->next_same_value
;
1105 /* Remove the table element from its hash bucket. */
1108 register struct table_elt
*prev
= elt
->prev_same_hash
;
1109 register struct table_elt
*next
= elt
->next_same_hash
;
1111 if (next
) next
->prev_same_hash
= prev
;
1114 prev
->next_same_hash
= next
;
1115 else if (table
[hash
] == elt
)
1119 /* This entry is not in the proper hash bucket. This can happen
1120 when two classes were merged by `merge_equiv_classes'. Search
1121 for the hash bucket that it heads. This happens only very
1122 rarely, so the cost is acceptable. */
1123 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1124 if (table
[hash
] == elt
)
1129 /* Remove the table element from its related-value circular chain. */
1131 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1133 register struct table_elt
*p
= elt
->related_value
;
1134 while (p
->related_value
!= elt
)
1135 p
= p
->related_value
;
1136 p
->related_value
= elt
->related_value
;
1137 if (p
->related_value
== p
)
1138 p
->related_value
= 0;
1144 /* Look up X in the hash table and return its table element,
1145 or 0 if X is not in the table.
1147 MODE is the machine-mode of X, or if X is an integer constant
1148 with VOIDmode then MODE is the mode with which X will be used.
1150 Here we are satisfied to find an expression whose tree structure
1153 static struct table_elt
*
1154 lookup (x
, hash
, mode
)
1157 enum machine_mode mode
;
1159 register struct table_elt
*p
;
1161 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1162 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1163 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1169 /* Like `lookup' but don't care whether the table element uses invalid regs.
1170 Also ignore discrepancies in the machine mode of a register. */
1172 static struct table_elt
*
1173 lookup_for_remove (x
, hash
, mode
)
1176 enum machine_mode mode
;
1178 register struct table_elt
*p
;
1180 if (GET_CODE (x
) == REG
)
1182 int regno
= REGNO (x
);
1183 /* Don't check the machine mode when comparing registers;
1184 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1185 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1186 if (GET_CODE (p
->exp
) == REG
1187 && REGNO (p
->exp
) == regno
)
1192 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1193 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1200 /* Look for an expression equivalent to X and with code CODE.
1201 If one is found, return that expression. */
1204 lookup_as_function (x
, code
)
1208 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1213 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1215 if (GET_CODE (p
->exp
) == code
1216 /* Make sure this is a valid entry in the table. */
1217 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1224 /* Insert X in the hash table, assuming HASH is its hash code
1225 and CLASSP is an element of the class it should go in
1226 (or 0 if a new class should be made).
1227 It is inserted at the proper position to keep the class in
1228 the order cheapest first.
1230 MODE is the machine-mode of X, or if X is an integer constant
1231 with VOIDmode then MODE is the mode with which X will be used.
1233 For elements of equal cheapness, the most recent one
1234 goes in front, except that the first element in the list
1235 remains first unless a cheaper element is added. The order of
1236 pseudo-registers does not matter, as canon_reg will be called to
1237 find the cheapest when a register is retrieved from the table.
1239 The in_memory field in the hash table element is set to 0.
1240 The caller must set it nonzero if appropriate.
1242 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1243 and if insert_regs returns a nonzero value
1244 you must then recompute its hash code before calling here.
1246 If necessary, update table showing constant values of quantities. */
1248 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1250 static struct table_elt
*
1251 insert (x
, classp
, hash
, mode
)
1253 register struct table_elt
*classp
;
1255 enum machine_mode mode
;
1257 register struct table_elt
*elt
;
1259 /* If X is a register and we haven't made a quantity for it,
1260 something is wrong. */
1261 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1264 /* If X is a hard register, show it is being put in the table. */
1265 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1267 int regno
= REGNO (x
);
1268 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1271 for (i
= regno
; i
< endregno
; i
++)
1272 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1276 /* Put an element for X into the right hash bucket. */
1278 elt
= get_element ();
1280 elt
->cost
= COST (x
);
1281 elt
->next_same_value
= 0;
1282 elt
->prev_same_value
= 0;
1283 elt
->next_same_hash
= table
[hash
];
1284 elt
->prev_same_hash
= 0;
1285 elt
->related_value
= 0;
1288 elt
->is_const
= (CONSTANT_P (x
)
1289 /* GNU C++ takes advantage of this for `this'
1290 (and other const values). */
1291 || (RTX_UNCHANGING_P (x
)
1292 && GET_CODE (x
) == REG
1293 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1294 || FIXED_BASE_PLUS_P (x
));
1297 table
[hash
]->prev_same_hash
= elt
;
1300 /* Put it into the proper value-class. */
1303 classp
= classp
->first_same_value
;
1304 if (CHEAPER (elt
, classp
))
1305 /* Insert at the head of the class */
1307 register struct table_elt
*p
;
1308 elt
->next_same_value
= classp
;
1309 classp
->prev_same_value
= elt
;
1310 elt
->first_same_value
= elt
;
1312 for (p
= classp
; p
; p
= p
->next_same_value
)
1313 p
->first_same_value
= elt
;
1317 /* Insert not at head of the class. */
1318 /* Put it after the last element cheaper than X. */
1319 register struct table_elt
*p
, *next
;
1320 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1322 /* Put it after P and before NEXT. */
1323 elt
->next_same_value
= next
;
1325 next
->prev_same_value
= elt
;
1326 elt
->prev_same_value
= p
;
1327 p
->next_same_value
= elt
;
1328 elt
->first_same_value
= classp
;
1332 elt
->first_same_value
= elt
;
1334 /* If this is a constant being set equivalent to a register or a register
1335 being set equivalent to a constant, note the constant equivalence.
1337 If this is a constant, it cannot be equivalent to a different constant,
1338 and a constant is the only thing that can be cheaper than a register. So
1339 we know the register is the head of the class (before the constant was
1342 If this is a register that is not already known equivalent to a
1343 constant, we must check the entire class.
1345 If this is a register that is already known equivalent to an insn,
1346 update `qty_const_insn' to show that `this_insn' is the latest
1347 insn making that quantity equivalent to the constant. */
1349 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1351 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1352 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1353 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1356 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1358 register struct table_elt
*p
;
1360 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1364 qty_const
[reg_qty
[REGNO (x
)]]
1365 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1366 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1372 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1373 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1374 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1376 /* If this is a constant with symbolic value,
1377 and it has a term with an explicit integer value,
1378 link it up with related expressions. */
1379 if (GET_CODE (x
) == CONST
)
1381 rtx subexp
= get_related_value (x
);
1383 struct table_elt
*subelt
, *subelt_prev
;
1387 /* Get the integer-free subexpression in the hash table. */
1388 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1389 subelt
= lookup (subexp
, subhash
, mode
);
1391 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1392 /* Initialize SUBELT's circular chain if it has none. */
1393 if (subelt
->related_value
== 0)
1394 subelt
->related_value
= subelt
;
1395 /* Find the element in the circular chain that precedes SUBELT. */
1396 subelt_prev
= subelt
;
1397 while (subelt_prev
->related_value
!= subelt
)
1398 subelt_prev
= subelt_prev
->related_value
;
1399 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1400 This way the element that follows SUBELT is the oldest one. */
1401 elt
->related_value
= subelt_prev
->related_value
;
1402 subelt_prev
->related_value
= elt
;
1409 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1410 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1411 the two classes equivalent.
1413 CLASS1 will be the surviving class; CLASS2 should not be used after this
1416 Any invalid entries in CLASS2 will not be copied. */
1419 merge_equiv_classes (class1
, class2
)
1420 struct table_elt
*class1
, *class2
;
1422 struct table_elt
*elt
, *next
, *new;
1424 /* Ensure we start with the head of the classes. */
1425 class1
= class1
->first_same_value
;
1426 class2
= class2
->first_same_value
;
1428 /* If they were already equal, forget it. */
1429 if (class1
== class2
)
1432 for (elt
= class2
; elt
; elt
= next
)
1436 enum machine_mode mode
= elt
->mode
;
1438 next
= elt
->next_same_value
;
1440 /* Remove old entry, make a new one in CLASS1's class.
1441 Don't do this for invalid entries as we cannot find their
1442 hash code (it also isn't necessary). */
1443 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1445 hash_arg_in_memory
= 0;
1446 hash_arg_in_struct
= 0;
1447 hash
= HASH (exp
, mode
);
1449 if (GET_CODE (exp
) == REG
)
1450 delete_reg_equiv (REGNO (exp
));
1452 remove_from_table (elt
, hash
);
1454 if (insert_regs (exp
, class1
, 0))
1455 hash
= HASH (exp
, mode
);
1456 new = insert (exp
, class1
, hash
, mode
);
1457 new->in_memory
= hash_arg_in_memory
;
1458 new->in_struct
= hash_arg_in_struct
;
1463 /* Remove from the hash table, or mark as invalid,
1464 all expressions whose values could be altered by storing in X.
1465 X is a register, a subreg, or a memory reference with nonvarying address
1466 (because, when a memory reference with a varying address is stored in,
1467 all memory references are removed by invalidate_memory
1468 so specific invalidation is superfluous).
1470 A nonvarying address may be just a register or just
1471 a symbol reference, or it may be either of those plus
1472 a numeric offset. */
1479 register struct table_elt
*p
;
1481 HOST_WIDE_INT start
, end
;
1483 /* If X is a register, dependencies on its contents
1484 are recorded through the qty number mechanism.
1485 Just change the qty number of the register,
1486 mark it as invalid for expressions that refer to it,
1487 and remove it itself. */
1489 if (GET_CODE (x
) == REG
)
1491 register int regno
= REGNO (x
);
1492 register unsigned hash
= HASH (x
, GET_MODE (x
));
1494 /* Remove REGNO from any quantity list it might be on and indicate
1495 that it's value might have changed. If it is a pseudo, remove its
1496 entry from the hash table.
1498 For a hard register, we do the first two actions above for any
1499 additional hard registers corresponding to X. Then, if any of these
1500 registers are in the table, we must remove any REG entries that
1501 overlap these registers. */
1503 delete_reg_equiv (regno
);
1506 if (regno
>= FIRST_PSEUDO_REGISTER
)
1507 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1510 HOST_WIDE_INT in_table
1511 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1512 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1513 int tregno
, tendregno
;
1514 register struct table_elt
*p
, *next
;
1516 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1518 for (i
= regno
+ 1; i
< endregno
; i
++)
1520 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1521 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1522 delete_reg_equiv (i
);
1527 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1528 for (p
= table
[hash
]; p
; p
= next
)
1530 next
= p
->next_same_hash
;
1532 if (GET_CODE (p
->exp
) != REG
1533 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1536 tregno
= REGNO (p
->exp
);
1538 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1539 if (tendregno
> regno
&& tregno
< endregno
)
1540 remove_from_table (p
, hash
);
1547 if (GET_CODE (x
) == SUBREG
)
1549 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1551 invalidate (SUBREG_REG (x
));
1555 /* X is not a register; it must be a memory reference with
1556 a nonvarying address. Remove all hash table elements
1557 that refer to overlapping pieces of memory. */
1559 if (GET_CODE (x
) != MEM
)
1562 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (GET_MODE (x
)),
1563 &base
, &start
, &end
);
1565 for (i
= 0; i
< NBUCKETS
; i
++)
1567 register struct table_elt
*next
;
1568 for (p
= table
[i
]; p
; p
= next
)
1570 next
= p
->next_same_hash
;
1571 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1572 remove_from_table (p
, i
);
1577 /* Remove all expressions that refer to register REGNO,
1578 since they are already invalid, and we are about to
1579 mark that register valid again and don't want the old
1580 expressions to reappear as valid. */
1583 remove_invalid_refs (regno
)
1587 register struct table_elt
*p
, *next
;
1589 for (i
= 0; i
< NBUCKETS
; i
++)
1590 for (p
= table
[i
]; p
; p
= next
)
1592 next
= p
->next_same_hash
;
1593 if (GET_CODE (p
->exp
) != REG
1594 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1595 remove_from_table (p
, i
);
1599 /* Recompute the hash codes of any valid entries in the hash table that
1600 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1602 This is called when we make a jump equivalence. */
1605 rehash_using_reg (x
)
1609 struct table_elt
*p
, *next
;
1612 if (GET_CODE (x
) == SUBREG
)
1615 /* If X is not a register or if the register is known not to be in any
1616 valid entries in the table, we have no work to do. */
1618 if (GET_CODE (x
) != REG
1619 || reg_in_table
[REGNO (x
)] < 0
1620 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1623 /* Scan all hash chains looking for valid entries that mention X.
1624 If we find one and it is in the wrong hash chain, move it. We can skip
1625 objects that are registers, since they are handled specially. */
1627 for (i
= 0; i
< NBUCKETS
; i
++)
1628 for (p
= table
[i
]; p
; p
= next
)
1630 next
= p
->next_same_hash
;
1631 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1632 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1633 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1635 if (p
->next_same_hash
)
1636 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1638 if (p
->prev_same_hash
)
1639 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1641 table
[i
] = p
->next_same_hash
;
1643 p
->next_same_hash
= table
[hash
];
1644 p
->prev_same_hash
= 0;
1646 table
[hash
]->prev_same_hash
= p
;
1652 /* Remove from the hash table all expressions that reference memory,
1653 or some of them as specified by *WRITES. */
1656 invalidate_memory (writes
)
1657 struct write_data
*writes
;
1660 register struct table_elt
*p
, *next
;
1661 int all
= writes
->all
;
1662 int nonscalar
= writes
->nonscalar
;
1664 for (i
= 0; i
< NBUCKETS
; i
++)
1665 for (p
= table
[i
]; p
; p
= next
)
1667 next
= p
->next_same_hash
;
1670 || (nonscalar
&& p
->in_struct
)
1671 || cse_rtx_addr_varies_p (p
->exp
)))
1672 remove_from_table (p
, i
);
1676 /* Remove from the hash table any expression that is a call-clobbered
1677 register. Also update their TICK values. */
1680 invalidate_for_call ()
1682 int regno
, endregno
;
1685 struct table_elt
*p
, *next
;
1688 /* Go through all the hard registers. For each that is clobbered in
1689 a CALL_INSN, remove the register from quantity chains and update
1690 reg_tick if defined. Also see if any of these registers is currently
1693 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1694 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1696 delete_reg_equiv (regno
);
1697 if (reg_tick
[regno
] >= 0)
1700 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1703 /* In the case where we have no call-clobbered hard registers in the
1704 table, we are done. Otherwise, scan the table and remove any
1705 entry that overlaps a call-clobbered register. */
1708 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1709 for (p
= table
[hash
]; p
; p
= next
)
1711 next
= p
->next_same_hash
;
1713 if (GET_CODE (p
->exp
) != REG
1714 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1717 regno
= REGNO (p
->exp
);
1718 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1720 for (i
= regno
; i
< endregno
; i
++)
1721 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1723 remove_from_table (p
, hash
);
1729 /* Given an expression X of type CONST,
1730 and ELT which is its table entry (or 0 if it
1731 is not in the hash table),
1732 return an alternate expression for X as a register plus integer.
1733 If none can be found, return 0. */
1736 use_related_value (x
, elt
)
1738 struct table_elt
*elt
;
1740 register struct table_elt
*relt
= 0;
1741 register struct table_elt
*p
, *q
;
1742 HOST_WIDE_INT offset
;
1744 /* First, is there anything related known?
1745 If we have a table element, we can tell from that.
1746 Otherwise, must look it up. */
1748 if (elt
!= 0 && elt
->related_value
!= 0)
1750 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1752 rtx subexp
= get_related_value (x
);
1754 relt
= lookup (subexp
,
1755 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1762 /* Search all related table entries for one that has an
1763 equivalent register. */
1768 /* This loop is strange in that it is executed in two different cases.
1769 The first is when X is already in the table. Then it is searching
1770 the RELATED_VALUE list of X's class (RELT). The second case is when
1771 X is not in the table. Then RELT points to a class for the related
1774 Ensure that, whatever case we are in, that we ignore classes that have
1775 the same value as X. */
1777 if (rtx_equal_p (x
, p
->exp
))
1780 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1781 if (GET_CODE (q
->exp
) == REG
)
1787 p
= p
->related_value
;
1789 /* We went all the way around, so there is nothing to be found.
1790 Alternatively, perhaps RELT was in the table for some other reason
1791 and it has no related values recorded. */
1792 if (p
== relt
|| p
== 0)
1799 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1800 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1801 return plus_constant (q
->exp
, offset
);
1804 /* Hash an rtx. We are careful to make sure the value is never negative.
1805 Equivalent registers hash identically.
1806 MODE is used in hashing for CONST_INTs only;
1807 otherwise the mode of X is used.
1809 Store 1 in do_not_record if any subexpression is volatile.
1811 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1812 which does not have the RTX_UNCHANGING_P bit set.
1813 In this case, also store 1 in hash_arg_in_struct
1814 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1816 Note that cse_insn knows that the hash code of a MEM expression
1817 is just (int) MEM plus the hash code of the address. */
1820 canon_hash (x
, mode
)
1822 enum machine_mode mode
;
1825 register unsigned hash
= 0;
1826 register enum rtx_code code
;
1829 /* repeat is used to turn tail-recursion into iteration. */
1834 code
= GET_CODE (x
);
1839 register int regno
= REGNO (x
);
1841 /* On some machines, we can't record any non-fixed hard register,
1842 because extending its life will cause reload problems. We
1843 consider ap, fp, and sp to be fixed for this purpose.
1844 On all machines, we can't record any global registers. */
1846 if (regno
< FIRST_PSEUDO_REGISTER
1847 && (global_regs
[regno
]
1848 #ifdef SMALL_REGISTER_CLASSES
1849 || (! fixed_regs
[regno
]
1850 && regno
!= FRAME_POINTER_REGNUM
1851 && regno
!= HARD_FRAME_POINTER_REGNUM
1852 && regno
!= ARG_POINTER_REGNUM
1853 && regno
!= STACK_POINTER_REGNUM
)
1860 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1866 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1867 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1872 /* This is like the general case, except that it only counts
1873 the integers representing the constant. */
1874 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1875 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1877 unsigned tem
= XINT (x
, i
);
1882 /* Assume there is only one rtx object for any given label. */
1884 /* Use `and' to ensure a positive number. */
1885 hash
+= ((unsigned) LABEL_REF
<< 7) + (unsigned) XEXP (x
, 0);
1889 hash
+= ((unsigned) SYMBOL_REF
<< 7) + (unsigned) XEXP (x
, 0);
1893 if (MEM_VOLATILE_P (x
))
1898 if (! RTX_UNCHANGING_P (x
))
1900 hash_arg_in_memory
= 1;
1901 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1903 /* Now that we have already found this special case,
1904 might as well speed it up as much as possible. */
1905 hash
+= (unsigned) MEM
;
1916 case UNSPEC_VOLATILE
:
1921 if (MEM_VOLATILE_P (x
))
1928 i
= GET_RTX_LENGTH (code
) - 1;
1929 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1930 fmt
= GET_RTX_FORMAT (code
);
1935 rtx tem
= XEXP (x
, i
);
1938 /* If the operand is a REG that is equivalent to a constant, hash
1939 as if we were hashing the constant, since we will be comparing
1941 if (tem
!= 0 && GET_CODE (tem
) == REG
1942 && REGNO_QTY_VALID_P (REGNO (tem
))
1943 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1944 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1945 && CONSTANT_P (tem1
))
1948 /* If we are about to do the last recursive call
1949 needed at this level, change it into iteration.
1950 This function is called enough to be worth it. */
1956 hash
+= canon_hash (tem
, 0);
1958 else if (fmt
[i
] == 'E')
1959 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1960 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1961 else if (fmt
[i
] == 's')
1963 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
1968 else if (fmt
[i
] == 'i')
1970 register unsigned tem
= XINT (x
, i
);
1979 /* Like canon_hash but with no side effects. */
1984 enum machine_mode mode
;
1986 int save_do_not_record
= do_not_record
;
1987 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1988 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1989 unsigned hash
= canon_hash (x
, mode
);
1990 hash_arg_in_memory
= save_hash_arg_in_memory
;
1991 hash_arg_in_struct
= save_hash_arg_in_struct
;
1992 do_not_record
= save_do_not_record
;
1996 /* Return 1 iff X and Y would canonicalize into the same thing,
1997 without actually constructing the canonicalization of either one.
1998 If VALIDATE is nonzero,
1999 we assume X is an expression being processed from the rtl
2000 and Y was found in the hash table. We check register refs
2001 in Y for being marked as valid.
2003 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2004 that is known to be in the register. Ordinarily, we don't allow them
2005 to match, because letting them match would cause unpredictable results
2006 in all the places that search a hash table chain for an equivalent
2007 for a given value. A possible equivalent that has different structure
2008 has its hash code computed from different data. Whether the hash code
2009 is the same as that of the the given value is pure luck. */
2012 exp_equiv_p (x
, y
, validate
, equal_values
)
2018 register enum rtx_code code
;
2021 /* Note: it is incorrect to assume an expression is equivalent to itself
2022 if VALIDATE is nonzero. */
2023 if (x
== y
&& !validate
)
2025 if (x
== 0 || y
== 0)
2028 code
= GET_CODE (x
);
2029 if (code
!= GET_CODE (y
))
2034 /* If X is a constant and Y is a register or vice versa, they may be
2035 equivalent. We only have to validate if Y is a register. */
2036 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2037 && REGNO_QTY_VALID_P (REGNO (y
))
2038 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2039 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2040 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2043 if (CONSTANT_P (y
) && code
== REG
2044 && REGNO_QTY_VALID_P (REGNO (x
))
2045 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2046 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2052 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2053 if (GET_MODE (x
) != GET_MODE (y
))
2063 return INTVAL (x
) == INTVAL (y
);
2067 return XEXP (x
, 0) == XEXP (y
, 0);
2071 int regno
= REGNO (y
);
2073 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2074 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2077 /* If the quantities are not the same, the expressions are not
2078 equivalent. If there are and we are not to validate, they
2079 are equivalent. Otherwise, ensure all regs are up-to-date. */
2081 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2087 for (i
= regno
; i
< endregno
; i
++)
2088 if (reg_in_table
[i
] != reg_tick
[i
])
2094 /* For commutative operations, check both orders. */
2102 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2103 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2104 validate
, equal_values
))
2105 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2106 validate
, equal_values
)
2107 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2108 validate
, equal_values
)));
2111 /* Compare the elements. If any pair of corresponding elements
2112 fail to match, return 0 for the whole things. */
2114 fmt
= GET_RTX_FORMAT (code
);
2115 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2120 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2125 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2127 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2128 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2129 validate
, equal_values
))
2134 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2139 if (XINT (x
, i
) != XINT (y
, i
))
2144 if (XWINT (x
, i
) != XWINT (y
, i
))
2159 /* Return 1 iff any subexpression of X matches Y.
2160 Here we do not require that X or Y be valid (for registers referred to)
2161 for being in the hash table. */
2168 register enum rtx_code code
;
2174 if (x
== 0 || y
== 0)
2177 code
= GET_CODE (x
);
2178 /* If X as a whole has the same code as Y, they may match.
2180 if (code
== GET_CODE (y
))
2182 if (exp_equiv_p (x
, y
, 0, 1))
2186 /* X does not match, so try its subexpressions. */
2188 fmt
= GET_RTX_FORMAT (code
);
2189 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2198 if (refers_to_p (XEXP (x
, i
), y
))
2201 else if (fmt
[i
] == 'E')
2204 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2205 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2212 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2213 set PBASE, PSTART, and PEND which correspond to the base of the address,
2214 the starting offset, and ending offset respectively.
2216 ADDR is known to be a nonvarying address.
2218 cse_address_varies_p returns zero for nonvarying addresses. */
2221 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2225 HOST_WIDE_INT
*pstart
, *pend
;
2234 /* Registers with nonvarying addresses usually have constant equivalents;
2235 but the frame pointer register is also possible. */
2236 if (GET_CODE (base
) == REG
2238 && REGNO_QTY_VALID_P (REGNO (base
))
2239 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2240 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2241 base
= qty_const
[reg_qty
[REGNO (base
)]];
2242 else if (GET_CODE (base
) == PLUS
2243 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2244 && GET_CODE (XEXP (base
, 0)) == REG
2246 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2247 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2248 == GET_MODE (XEXP (base
, 0)))
2249 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2251 start
= INTVAL (XEXP (base
, 1));
2252 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2255 /* By definition, operand1 of a LO_SUM is the associated constant
2256 address. Use the associated constant address as the base instead. */
2257 if (GET_CODE (base
) == LO_SUM
)
2258 base
= XEXP (base
, 1);
2260 /* Strip off CONST. */
2261 if (GET_CODE (base
) == CONST
)
2262 base
= XEXP (base
, 0);
2264 if (GET_CODE (base
) == PLUS
2265 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2267 start
+= INTVAL (XEXP (base
, 1));
2268 base
= XEXP (base
, 0);
2273 /* Set the return values. */
2279 /* Return 1 iff any subexpression of X refers to memory
2280 at an address of BASE plus some offset
2281 such that any of the bytes' offsets fall between START (inclusive)
2282 and END (exclusive).
2284 The value is undefined if X is a varying address (as determined by
2285 cse_rtx_addr_varies_p). This function is not used in such cases.
2287 When used in the cse pass, `qty_const' is nonzero, and it is used
2288 to treat an address that is a register with a known constant value
2289 as if it were that constant value.
2290 In the loop pass, `qty_const' is zero, so this is not done. */
2293 refers_to_mem_p (x
, base
, start
, end
)
2295 HOST_WIDE_INT start
, end
;
2297 register HOST_WIDE_INT i
;
2298 register enum rtx_code code
;
2301 if (GET_CODE (base
) == CONST_INT
)
2303 start
+= INTVAL (base
);
2304 end
+= INTVAL (base
);
2312 code
= GET_CODE (x
);
2315 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2317 HOST_WIDE_INT mystart
, myend
;
2319 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2320 &mybase
, &mystart
, &myend
);
2323 /* refers_to_mem_p is never called with varying addresses.
2324 If the base addresses are not equal, there is no chance
2325 of the memory addresses conflicting. */
2326 if (! rtx_equal_p (mybase
, base
))
2329 return myend
> start
&& mystart
< end
;
2332 /* X does not match, so try its subexpressions. */
2334 fmt
= GET_RTX_FORMAT (code
);
2335 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2344 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2347 else if (fmt
[i
] == 'E')
2350 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2351 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2358 /* Nonzero if X refers to memory at a varying address;
2359 except that a register which has at the moment a known constant value
2360 isn't considered variable. */
2363 cse_rtx_addr_varies_p (x
)
2366 /* We need not check for X and the equivalence class being of the same
2367 mode because if X is equivalent to a constant in some mode, it
2368 doesn't vary in any mode. */
2370 if (GET_CODE (x
) == MEM
2371 && GET_CODE (XEXP (x
, 0)) == REG
2372 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2373 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2374 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2377 if (GET_CODE (x
) == MEM
2378 && GET_CODE (XEXP (x
, 0)) == PLUS
2379 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2380 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2381 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2382 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2383 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2384 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2387 return rtx_addr_varies_p (x
);
2390 /* Canonicalize an expression:
2391 replace each register reference inside it
2392 with the "oldest" equivalent register.
2394 If INSN is non-zero and we are replacing a pseudo with a hard register
2395 or vice versa, validate_change is used to ensure that INSN remains valid
2396 after we make our substitution. The calls are made with IN_GROUP non-zero
2397 so apply_change_group must be called upon the outermost return from this
2398 function (unless INSN is zero). The result of apply_change_group can
2399 generally be discarded since the changes we are making are optional. */
2407 register enum rtx_code code
;
2413 code
= GET_CODE (x
);
2431 /* Never replace a hard reg, because hard regs can appear
2432 in more than one machine mode, and we must preserve the mode
2433 of each occurrence. Also, some hard regs appear in
2434 MEMs that are shared and mustn't be altered. Don't try to
2435 replace any reg that maps to a reg of class NO_REGS. */
2436 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2437 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2440 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2441 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2442 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2443 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2447 fmt
= GET_RTX_FORMAT (code
);
2448 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2454 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2456 /* If replacing pseudo with hard reg or vice versa, ensure the
2457 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2458 if (insn
!= 0 && new != 0
2459 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2460 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2461 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2462 || insn_n_dups
[recog_memoized (insn
)] > 0))
2463 validate_change (insn
, &XEXP (x
, i
), new, 1);
2467 else if (fmt
[i
] == 'E')
2468 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2469 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2475 /* LOC is a location with INSN that is an operand address (the contents of
2476 a MEM). Find the best equivalent address to use that is valid for this
2479 On most CISC machines, complicated address modes are costly, and rtx_cost
2480 is a good approximation for that cost. However, most RISC machines have
2481 only a few (usually only one) memory reference formats. If an address is
2482 valid at all, it is often just as cheap as any other address. Hence, for
2483 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2484 costs of various addresses. For two addresses of equal cost, choose the one
2485 with the highest `rtx_cost' value as that has the potential of eliminating
2486 the most insns. For equal costs, we choose the first in the equivalence
2487 class. Note that we ignore the fact that pseudo registers are cheaper
2488 than hard registers here because we would also prefer the pseudo registers.
2492 find_best_addr (insn
, loc
)
2496 struct table_elt
*elt
, *p
;
2499 int found_better
= 1;
2500 int save_do_not_record
= do_not_record
;
2501 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2502 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2507 /* Do not try to replace constant addresses or addresses of local and
2508 argument slots. These MEM expressions are made only once and inserted
2509 in many instructions, as well as being used to control symbol table
2510 output. It is not safe to clobber them.
2512 There are some uncommon cases where the address is already in a register
2513 for some reason, but we cannot take advantage of that because we have
2514 no easy way to unshare the MEM. In addition, looking up all stack
2515 addresses is costly. */
2516 if ((GET_CODE (addr
) == PLUS
2517 && GET_CODE (XEXP (addr
, 0)) == REG
2518 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2519 && (regno
= REGNO (XEXP (addr
, 0)),
2520 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2521 || regno
== ARG_POINTER_REGNUM
))
2522 || (GET_CODE (addr
) == REG
2523 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2524 || regno
== HARD_FRAME_POINTER_REGNUM
2525 || regno
== ARG_POINTER_REGNUM
))
2526 || CONSTANT_ADDRESS_P (addr
))
2529 /* If this address is not simply a register, try to fold it. This will
2530 sometimes simplify the expression. Many simplifications
2531 will not be valid, but some, usually applying the associative rule, will
2532 be valid and produce better code. */
2533 if (GET_CODE (addr
) != REG
2534 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2537 /* If this address is not in the hash table, we can't look for equivalences
2538 of the whole address. Also, ignore if volatile. */
2541 hash
= HASH (addr
, Pmode
);
2542 addr_volatile
= do_not_record
;
2543 do_not_record
= save_do_not_record
;
2544 hash_arg_in_memory
= save_hash_arg_in_memory
;
2545 hash_arg_in_struct
= save_hash_arg_in_struct
;
2550 elt
= lookup (addr
, hash
, Pmode
);
2552 #ifndef ADDRESS_COST
2555 our_cost
= elt
->cost
;
2557 /* Find the lowest cost below ours that works. */
2558 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2559 if (elt
->cost
< our_cost
2560 && (GET_CODE (elt
->exp
) == REG
2561 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2562 && validate_change (insn
, loc
,
2563 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2570 /* We need to find the best (under the criteria documented above) entry
2571 in the class that is valid. We use the `flag' field to indicate
2572 choices that were invalid and iterate until we can't find a better
2573 one that hasn't already been tried. */
2575 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2578 while (found_better
)
2580 int best_addr_cost
= ADDRESS_COST (*loc
);
2581 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2582 struct table_elt
*best_elt
= elt
;
2585 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2587 && (GET_CODE (p
->exp
) == REG
2588 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2589 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2590 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2591 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2594 best_addr_cost
= ADDRESS_COST (p
->exp
);
2595 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2601 if (validate_change (insn
, loc
,
2602 canon_reg (copy_rtx (best_elt
->exp
),
2611 /* If the address is a binary operation with the first operand a register
2612 and the second a constant, do the same as above, but looking for
2613 equivalences of the register. Then try to simplify before checking for
2614 the best address to use. This catches a few cases: First is when we
2615 have REG+const and the register is another REG+const. We can often merge
2616 the constants and eliminate one insn and one register. It may also be
2617 that a machine has a cheap REG+REG+const. Finally, this improves the
2618 code on the Alpha for unaligned byte stores. */
2620 if (flag_expensive_optimizations
2621 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2622 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2623 && GET_CODE (XEXP (*loc
, 0)) == REG
2624 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2626 rtx c
= XEXP (*loc
, 1);
2629 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2630 do_not_record
= save_do_not_record
;
2631 hash_arg_in_memory
= save_hash_arg_in_memory
;
2632 hash_arg_in_struct
= save_hash_arg_in_struct
;
2634 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2638 /* We need to find the best (under the criteria documented above) entry
2639 in the class that is valid. We use the `flag' field to indicate
2640 choices that were invalid and iterate until we can't find a better
2641 one that hasn't already been tried. */
2643 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2646 while (found_better
)
2648 int best_addr_cost
= ADDRESS_COST (*loc
);
2649 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2650 struct table_elt
*best_elt
= elt
;
2651 rtx best_rtx
= *loc
;
2654 /* This is at worst case an O(n^2) algorithm, so limit our search
2655 to the first 32 elements on the list. This avoids trouble
2656 compiling code with very long basic blocks that can easily
2657 call cse_gen_binary so many times that we run out of memory. */
2660 for (p
= elt
->first_same_value
, count
= 0;
2662 p
= p
->next_same_value
, count
++)
2664 && (GET_CODE (p
->exp
) == REG
2665 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2667 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2669 if ((ADDRESS_COST (new) < best_addr_cost
2670 || (ADDRESS_COST (new) == best_addr_cost
2671 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2674 best_addr_cost
= ADDRESS_COST (new);
2675 best_rtx_cost
= (COST (new) + 1) >> 1;
2683 if (validate_change (insn
, loc
,
2684 canon_reg (copy_rtx (best_rtx
),
2695 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2696 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2697 what values are being compared.
2699 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2700 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2701 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2702 compared to produce cc0.
2704 The return value is the comparison operator and is either the code of
2705 A or the code corresponding to the inverse of the comparison. */
2707 static enum rtx_code
2708 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2711 enum machine_mode
*pmode1
, *pmode2
;
2715 arg1
= *parg1
, arg2
= *parg2
;
2717 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2719 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2721 /* Set non-zero when we find something of interest. */
2723 int reverse_code
= 0;
2724 struct table_elt
*p
= 0;
2726 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2727 On machines with CC0, this is the only case that can occur, since
2728 fold_rtx will return the COMPARE or item being compared with zero
2731 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2734 /* If ARG1 is a comparison operator and CODE is testing for
2735 STORE_FLAG_VALUE, get the inner arguments. */
2737 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2740 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2741 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2742 #ifdef FLOAT_STORE_FLAG_VALUE
2743 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2744 && FLOAT_STORE_FLAG_VALUE
< 0)
2749 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2750 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2751 #ifdef FLOAT_STORE_FLAG_VALUE
2752 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2753 && FLOAT_STORE_FLAG_VALUE
< 0)
2756 x
= arg1
, reverse_code
= 1;
2759 /* ??? We could also check for
2761 (ne (and (eq (...) (const_int 1))) (const_int 0))
2763 and related forms, but let's wait until we see them occurring. */
2766 /* Look up ARG1 in the hash table and see if it has an equivalence
2767 that lets us see what is being compared. */
2768 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2770 if (p
) p
= p
->first_same_value
;
2772 for (; p
; p
= p
->next_same_value
)
2774 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2776 /* If the entry isn't valid, skip it. */
2777 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2780 if (GET_CODE (p
->exp
) == COMPARE
2781 /* Another possibility is that this machine has a compare insn
2782 that includes the comparison code. In that case, ARG1 would
2783 be equivalent to a comparison operation that would set ARG1 to
2784 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2785 ORIG_CODE is the actual comparison being done; if it is an EQ,
2786 we must reverse ORIG_CODE. On machine with a negative value
2787 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2790 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2791 && (GET_MODE_BITSIZE (inner_mode
)
2792 <= HOST_BITS_PER_WIDE_INT
)
2793 && (STORE_FLAG_VALUE
2794 & ((HOST_WIDE_INT
) 1
2795 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2796 #ifdef FLOAT_STORE_FLAG_VALUE
2798 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2799 && FLOAT_STORE_FLAG_VALUE
< 0)
2802 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2807 else if ((code
== EQ
2809 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2810 && (GET_MODE_BITSIZE (inner_mode
)
2811 <= HOST_BITS_PER_WIDE_INT
)
2812 && (STORE_FLAG_VALUE
2813 & ((HOST_WIDE_INT
) 1
2814 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2815 #ifdef FLOAT_STORE_FLAG_VALUE
2817 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2818 && FLOAT_STORE_FLAG_VALUE
< 0)
2821 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2828 /* If this is fp + constant, the equivalent is a better operand since
2829 it may let us predict the value of the comparison. */
2830 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2837 /* If we didn't find a useful equivalence for ARG1, we are done.
2838 Otherwise, set up for the next iteration. */
2842 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2843 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2844 code
= GET_CODE (x
);
2847 code
= reverse_condition (code
);
2850 /* Return our results. Return the modes from before fold_rtx
2851 because fold_rtx might produce const_int, and then it's too late. */
2852 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2853 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2858 /* Try to simplify a unary operation CODE whose output mode is to be
2859 MODE with input operand OP whose mode was originally OP_MODE.
2860 Return zero if no simplification can be made. */
2863 simplify_unary_operation (code
, mode
, op
, op_mode
)
2865 enum machine_mode mode
;
2867 enum machine_mode op_mode
;
2869 register int width
= GET_MODE_BITSIZE (mode
);
2871 /* The order of these tests is critical so that, for example, we don't
2872 check the wrong mode (input vs. output) for a conversion operation,
2873 such as FIX. At some point, this should be simplified. */
2875 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2876 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2880 #ifdef REAL_ARITHMETIC
2881 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2883 d
= (double) INTVAL (op
);
2885 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2887 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2891 #ifdef REAL_ARITHMETIC
2892 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2894 d
= (double) (unsigned int) INTVAL (op
);
2896 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2899 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2900 && GET_MODE (op
) == VOIDmode
)
2904 #ifdef REAL_ARITHMETIC
2905 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2907 if (CONST_DOUBLE_HIGH (op
) < 0)
2909 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2910 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2911 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2912 d
+= (double) (unsigned HOST_WIDE_INT
) (~ CONST_DOUBLE_LOW (op
));
2917 d
= (double) CONST_DOUBLE_HIGH (op
);
2918 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2919 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2920 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2922 #endif /* REAL_ARITHMETIC */
2923 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2925 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2926 && GET_MODE (op
) == VOIDmode
)
2930 #ifdef REAL_ARITHMETIC
2931 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2932 CONST_DOUBLE_HIGH (op
));
2934 d
= (double) CONST_DOUBLE_HIGH (op
);
2935 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2936 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2937 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2938 #endif /* REAL_ARITHMETIC */
2939 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2943 if (GET_CODE (op
) == CONST_INT
2944 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
2946 register HOST_WIDE_INT arg0
= INTVAL (op
);
2947 register HOST_WIDE_INT val
;
2960 val
= (arg0
>= 0 ? arg0
: - arg0
);
2964 /* Don't use ffs here. Instead, get low order bit and then its
2965 number. If arg0 is zero, this will return 0, as desired. */
2966 arg0
&= GET_MODE_MASK (mode
);
2967 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2975 if (op_mode
== VOIDmode
)
2977 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2979 /* If we were really extending the mode,
2980 we would have to distinguish between zero-extension
2981 and sign-extension. */
2982 if (width
!= GET_MODE_BITSIZE (op_mode
))
2986 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2987 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2993 if (op_mode
== VOIDmode
)
2995 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2997 /* If we were really extending the mode,
2998 we would have to distinguish between zero-extension
2999 and sign-extension. */
3000 if (width
!= GET_MODE_BITSIZE (op_mode
))
3004 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3007 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3009 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3010 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3023 /* Clear the bits that don't belong in our mode,
3024 unless they and our sign bit are all one.
3025 So we get either a reasonable negative value or a reasonable
3026 unsigned value for this mode. */
3027 if (width
< HOST_BITS_PER_WIDE_INT
3028 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3029 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3030 val
&= (1 << width
) - 1;
3032 return GEN_INT (val
);
3035 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3036 for a DImode operation on a CONST_INT. */
3037 else if (GET_MODE (op
) == VOIDmode
&& width
== HOST_BITS_PER_INT
* 2
3038 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3040 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3042 if (GET_CODE (op
) == CONST_DOUBLE
)
3043 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3045 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3055 neg_double (l1
, h1
, &lv
, &hv
);
3060 neg_double (l1
, h1
, &lv
, &hv
);
3068 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3070 lv
= exact_log2 (l1
& (-l1
)) + 1;
3074 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3075 return GEN_INT (l1
& GET_MODE_MASK (mode
));
3081 if (op_mode
== VOIDmode
3082 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3086 lv
= l1
& GET_MODE_MASK (op_mode
);
3090 if (op_mode
== VOIDmode
3091 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3095 lv
= l1
& GET_MODE_MASK (op_mode
);
3096 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3097 && (lv
& ((HOST_WIDE_INT
) 1
3098 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3099 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3101 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3112 return immed_double_const (lv
, hv
, mode
);
3115 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3116 else if (GET_CODE (op
) == CONST_DOUBLE
3117 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3123 if (setjmp (handler
))
3124 /* There used to be a warning here, but that is inadvisable.
3125 People may want to cause traps, and the natural way
3126 to do it should not get a warning. */
3129 set_float_handler (handler
);
3131 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3136 d
= REAL_VALUE_NEGATE (d
);
3140 if (REAL_VALUE_NEGATIVE (d
))
3141 d
= REAL_VALUE_NEGATE (d
);
3144 case FLOAT_TRUNCATE
:
3145 d
= real_value_truncate (mode
, d
);
3149 /* All this does is change the mode. */
3153 d
= REAL_VALUE_RNDZINT (d
);
3157 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3167 x
= immed_real_const_1 (d
, mode
);
3168 set_float_handler (NULL_PTR
);
3171 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3172 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3178 if (setjmp (handler
))
3181 set_float_handler (handler
);
3183 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3188 val
= REAL_VALUE_FIX (d
);
3192 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3199 set_float_handler (NULL_PTR
);
3201 /* Clear the bits that don't belong in our mode,
3202 unless they and our sign bit are all one.
3203 So we get either a reasonable negative value or a reasonable
3204 unsigned value for this mode. */
3205 if (width
< HOST_BITS_PER_WIDE_INT
3206 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3207 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3208 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3210 return GEN_INT (val
);
3213 /* This was formerly used only for non-IEEE float.
3214 eggert@twinsun.com says it is safe for IEEE also. */
3217 /* There are some simplifications we can do even if the operands
3223 /* (not (not X)) == X, similarly for NEG. */
3224 if (GET_CODE (op
) == code
)
3225 return XEXP (op
, 0);
3229 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3230 becomes just the MINUS if its mode is MODE. This allows
3231 folding switch statements on machines using casesi (such as
3233 if (GET_CODE (op
) == TRUNCATE
3234 && GET_MODE (XEXP (op
, 0)) == mode
3235 && GET_CODE (XEXP (op
, 0)) == MINUS
3236 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3237 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3238 return XEXP (op
, 0);
3246 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3247 and OP1. Return 0 if no simplification is possible.
3249 Don't use this for relational operations such as EQ or LT.
3250 Use simplify_relational_operation instead. */
3253 simplify_binary_operation (code
, mode
, op0
, op1
)
3255 enum machine_mode mode
;
3258 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3260 int width
= GET_MODE_BITSIZE (mode
);
3263 /* Relational operations don't work here. We must know the mode
3264 of the operands in order to do the comparison correctly.
3265 Assuming a full word can give incorrect results.
3266 Consider comparing 128 with -128 in QImode. */
3268 if (GET_RTX_CLASS (code
) == '<')
3271 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3272 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3273 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3274 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3276 REAL_VALUE_TYPE f0
, f1
, value
;
3279 if (setjmp (handler
))
3282 set_float_handler (handler
);
3284 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3285 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3286 f0
= real_value_truncate (mode
, f0
);
3287 f1
= real_value_truncate (mode
, f1
);
3289 #ifdef REAL_ARITHMETIC
3290 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3304 #ifndef REAL_INFINITY
3311 value
= MIN (f0
, f1
);
3314 value
= MAX (f0
, f1
);
3321 set_float_handler (NULL_PTR
);
3322 value
= real_value_truncate (mode
, value
);
3323 return immed_real_const_1 (value
, mode
);
3325 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3327 /* We can fold some multi-word operations. */
3328 if (GET_MODE_CLASS (mode
) == MODE_INT
3329 && width
== HOST_BITS_PER_WIDE_INT
* 2
3330 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3331 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3333 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3335 if (GET_CODE (op0
) == CONST_DOUBLE
)
3336 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3338 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3340 if (GET_CODE (op1
) == CONST_DOUBLE
)
3341 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3343 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3348 /* A - B == A + (-B). */
3349 neg_double (l2
, h2
, &lv
, &hv
);
3352 /* .. fall through ... */
3355 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3359 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3362 case DIV
: case MOD
: case UDIV
: case UMOD
:
3363 /* We'd need to include tree.h to do this and it doesn't seem worth
3368 lv
= l1
& l2
, hv
= h1
& h2
;
3372 lv
= l1
| l2
, hv
= h1
| h2
;
3376 lv
= l1
^ l2
, hv
= h1
^ h2
;
3382 && ((unsigned HOST_WIDE_INT
) l1
3383 < (unsigned HOST_WIDE_INT
) l2
)))
3392 && ((unsigned HOST_WIDE_INT
) l1
3393 > (unsigned HOST_WIDE_INT
) l2
)))
3400 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3402 && ((unsigned HOST_WIDE_INT
) l1
3403 < (unsigned HOST_WIDE_INT
) l2
)))
3410 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3412 && ((unsigned HOST_WIDE_INT
) l1
3413 > (unsigned HOST_WIDE_INT
) l2
)))
3419 case LSHIFTRT
: case ASHIFTRT
:
3420 case ASHIFT
: case LSHIFT
:
3421 case ROTATE
: case ROTATERT
:
3422 #ifdef SHIFT_COUNT_TRUNCATED
3423 if (SHIFT_COUNT_TRUNCATED
)
3424 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3427 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3430 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3431 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3433 else if (code
== ASHIFT
|| code
== LSHIFT
)
3434 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3436 else if (code
== ROTATE
)
3437 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3438 else /* code == ROTATERT */
3439 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3446 return immed_double_const (lv
, hv
, mode
);
3449 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3450 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3452 /* Even if we can't compute a constant result,
3453 there are some cases worth simplifying. */
3458 /* In IEEE floating point, x+0 is not the same as x. Similarly
3459 for the other optimizations below. */
3460 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3461 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3464 if (op1
== CONST0_RTX (mode
))
3467 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3468 if (GET_CODE (op0
) == NEG
)
3469 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3470 else if (GET_CODE (op1
) == NEG
)
3471 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3473 /* Handle both-operands-constant cases. We can only add
3474 CONST_INTs to constants since the sum of relocatable symbols
3475 can't be handled by most assemblers. Don't add CONST_INT
3476 to CONST_INT since overflow won't be computed properly if wider
3477 than HOST_BITS_PER_WIDE_INT. */
3479 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3480 && GET_CODE (op1
) == CONST_INT
)
3481 return plus_constant (op0
, INTVAL (op1
));
3482 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3483 && GET_CODE (op0
) == CONST_INT
)
3484 return plus_constant (op1
, INTVAL (op0
));
3486 /* See if this is something like X * C - X or vice versa or
3487 if the multiplication is written as a shift. If so, we can
3488 distribute and make a new multiply, shift, or maybe just
3489 have X (if C is 2 in the example above). But don't make
3490 real multiply if we didn't have one before. */
3492 if (! FLOAT_MODE_P (mode
))
3494 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3495 rtx lhs
= op0
, rhs
= op1
;
3498 if (GET_CODE (lhs
) == NEG
)
3499 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3500 else if (GET_CODE (lhs
) == MULT
3501 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3503 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3506 else if (GET_CODE (lhs
) == ASHIFT
3507 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3508 && INTVAL (XEXP (lhs
, 1)) >= 0
3509 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3511 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3512 lhs
= XEXP (lhs
, 0);
3515 if (GET_CODE (rhs
) == NEG
)
3516 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3517 else if (GET_CODE (rhs
) == MULT
3518 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3520 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3523 else if (GET_CODE (rhs
) == ASHIFT
3524 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3525 && INTVAL (XEXP (rhs
, 1)) >= 0
3526 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3528 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3529 rhs
= XEXP (rhs
, 0);
3532 if (rtx_equal_p (lhs
, rhs
))
3534 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3535 GEN_INT (coeff0
+ coeff1
));
3536 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3540 /* If one of the operands is a PLUS or a MINUS, see if we can
3541 simplify this by the associative law.
3542 Don't use the associative law for floating point.
3543 The inaccuracy makes it nonassociative,
3544 and subtle programs can break if operations are associated. */
3546 if (INTEGRAL_MODE_P (mode
)
3547 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3548 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3549 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3555 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3556 using cc0, in which case we want to leave it as a COMPARE
3557 so we can distinguish it from a register-register-copy.
3559 In IEEE floating point, x-0 is not the same as x. */
3561 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3562 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3563 && op1
== CONST0_RTX (mode
))
3566 /* Do nothing here. */
3571 /* None of these optimizations can be done for IEEE
3573 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3574 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3577 /* We can't assume x-x is 0 even with non-IEEE floating point,
3578 but since it is zero except in very strange circumstances, we
3579 will treat it as zero with -ffast-math. */
3580 if (rtx_equal_p (op0
, op1
)
3581 && ! side_effects_p (op0
)
3582 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3583 return CONST0_RTX (mode
);
3585 /* Change subtraction from zero into negation. */
3586 if (op0
== CONST0_RTX (mode
))
3587 return gen_rtx (NEG
, mode
, op1
);
3589 /* (-1 - a) is ~a. */
3590 if (op0
== constm1_rtx
)
3591 return gen_rtx (NOT
, mode
, op1
);
3593 /* Subtracting 0 has no effect. */
3594 if (op1
== CONST0_RTX (mode
))
3597 /* See if this is something like X * C - X or vice versa or
3598 if the multiplication is written as a shift. If so, we can
3599 distribute and make a new multiply, shift, or maybe just
3600 have X (if C is 2 in the example above). But don't make
3601 real multiply if we didn't have one before. */
3603 if (! FLOAT_MODE_P (mode
))
3605 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3606 rtx lhs
= op0
, rhs
= op1
;
3609 if (GET_CODE (lhs
) == NEG
)
3610 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3611 else if (GET_CODE (lhs
) == MULT
3612 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3614 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3617 else if (GET_CODE (lhs
) == ASHIFT
3618 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3619 && INTVAL (XEXP (lhs
, 1)) >= 0
3620 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3622 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3623 lhs
= XEXP (lhs
, 0);
3626 if (GET_CODE (rhs
) == NEG
)
3627 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3628 else if (GET_CODE (rhs
) == MULT
3629 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3631 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3634 else if (GET_CODE (rhs
) == ASHIFT
3635 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3636 && INTVAL (XEXP (rhs
, 1)) >= 0
3637 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3639 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3640 rhs
= XEXP (rhs
, 0);
3643 if (rtx_equal_p (lhs
, rhs
))
3645 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3646 GEN_INT (coeff0
- coeff1
));
3647 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3651 /* (a - (-b)) -> (a + b). */
3652 if (GET_CODE (op1
) == NEG
)
3653 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3655 /* If one of the operands is a PLUS or a MINUS, see if we can
3656 simplify this by the associative law.
3657 Don't use the associative law for floating point.
3658 The inaccuracy makes it nonassociative,
3659 and subtle programs can break if operations are associated. */
3661 if (INTEGRAL_MODE_P (mode
)
3662 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3663 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3664 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3667 /* Don't let a relocatable value get a negative coeff. */
3668 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op1
) != VOIDmode
)
3669 return plus_constant (op0
, - INTVAL (op1
));
3673 if (op1
== constm1_rtx
)
3675 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3677 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3680 /* In IEEE floating point, x*0 is not always 0. */
3681 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3682 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3683 && op1
== CONST0_RTX (mode
)
3684 && ! side_effects_p (op0
))
3687 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3688 However, ANSI says we can drop signals,
3689 so we can do this anyway. */
3690 if (op1
== CONST1_RTX (mode
))
3693 /* Convert multiply by constant power of two into shift unless
3694 we are still generating RTL. This test is a kludge. */
3695 if (GET_CODE (op1
) == CONST_INT
3696 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3697 && ! rtx_equal_function_value_matters
)
3698 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3700 if (GET_CODE (op1
) == CONST_DOUBLE
3701 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3705 int op1is2
, op1ism1
;
3707 if (setjmp (handler
))
3710 set_float_handler (handler
);
3711 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3712 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3713 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3714 set_float_handler (NULL_PTR
);
3716 /* x*2 is x+x and x*(-1) is -x */
3717 if (op1is2
&& GET_MODE (op0
) == mode
)
3718 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3720 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3721 return gen_rtx (NEG
, mode
, op0
);
3726 if (op1
== const0_rtx
)
3728 if (GET_CODE (op1
) == CONST_INT
3729 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3731 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3733 /* A | (~A) -> -1 */
3734 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3735 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3736 && ! side_effects_p (op0
)
3737 && GET_MODE_CLASS (mode
) != MODE_CC
)
3742 if (op1
== const0_rtx
)
3744 if (GET_CODE (op1
) == CONST_INT
3745 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3746 return gen_rtx (NOT
, mode
, op0
);
3747 if (op0
== op1
&& ! side_effects_p (op0
)
3748 && GET_MODE_CLASS (mode
) != MODE_CC
)
3753 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3755 if (GET_CODE (op1
) == CONST_INT
3756 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3758 if (op0
== op1
&& ! side_effects_p (op0
)
3759 && GET_MODE_CLASS (mode
) != MODE_CC
)
3762 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3763 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3764 && ! side_effects_p (op0
)
3765 && GET_MODE_CLASS (mode
) != MODE_CC
)
3770 /* Convert divide by power of two into shift (divide by 1 handled
3772 if (GET_CODE (op1
) == CONST_INT
3773 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3774 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3776 /* ... fall through ... */
3779 if (op1
== CONST1_RTX (mode
))
3782 /* In IEEE floating point, 0/x is not always 0. */
3783 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3784 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3785 && op0
== CONST0_RTX (mode
)
3786 && ! side_effects_p (op1
))
3789 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3790 /* Change division by a constant into multiplication. Only do
3791 this with -ffast-math until an expert says it is safe in
3793 else if (GET_CODE (op1
) == CONST_DOUBLE
3794 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3795 && op1
!= CONST0_RTX (mode
)
3799 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3801 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3803 #if defined (REAL_ARITHMETIC)
3804 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3805 return gen_rtx (MULT
, mode
, op0
,
3806 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3808 return gen_rtx (MULT
, mode
, op0
,
3809 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3817 /* Handle modulus by power of two (mod with 1 handled below). */
3818 if (GET_CODE (op1
) == CONST_INT
3819 && exact_log2 (INTVAL (op1
)) > 0)
3820 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3822 /* ... fall through ... */
3825 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3826 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3832 /* Rotating ~0 always results in ~0. */
3833 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3834 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3835 && ! side_effects_p (op1
))
3838 /* ... fall through ... */
3844 if (op1
== const0_rtx
)
3846 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3851 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3852 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3853 && ! side_effects_p (op0
))
3855 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3860 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3862 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
3863 && ! side_effects_p (op0
))
3865 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3870 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3872 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3877 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3879 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3890 /* Get the integer argument values in two forms:
3891 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3893 arg0
= INTVAL (op0
);
3894 arg1
= INTVAL (op1
);
3896 if (width
< HOST_BITS_PER_WIDE_INT
)
3898 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3899 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3902 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3903 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
3906 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3907 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
3915 /* Compute the value of the arithmetic. */
3920 val
= arg0s
+ arg1s
;
3924 val
= arg0s
- arg1s
;
3928 val
= arg0s
* arg1s
;
3934 val
= arg0s
/ arg1s
;
3940 val
= arg0s
% arg1s
;
3946 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
3952 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
3968 /* If shift count is undefined, don't fold it; let the machine do
3969 what it wants. But truncate it if the machine will do that. */
3973 #ifdef SHIFT_COUNT_TRUNCATED
3974 if (SHIFT_COUNT_TRUNCATED
)
3978 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
3986 #ifdef SHIFT_COUNT_TRUNCATED
3987 if (SHIFT_COUNT_TRUNCATED
)
3991 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
3998 #ifdef SHIFT_COUNT_TRUNCATED
3999 if (SHIFT_COUNT_TRUNCATED
)
4003 val
= arg0s
>> arg1
;
4005 /* Bootstrap compiler may not have sign extended the right shift.
4006 Manually extend the sign to insure bootstrap cc matches gcc. */
4007 if (arg0s
< 0 && arg1
> 0)
4008 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4017 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4018 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4026 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4027 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4031 /* Do nothing here. */
4035 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4039 val
= ((unsigned HOST_WIDE_INT
) arg0
4040 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4044 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4048 val
= ((unsigned HOST_WIDE_INT
) arg0
4049 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4056 /* Clear the bits that don't belong in our mode, unless they and our sign
4057 bit are all one. So we get either a reasonable negative value or a
4058 reasonable unsigned value for this mode. */
4059 if (width
< HOST_BITS_PER_WIDE_INT
4060 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4061 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4062 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4064 return GEN_INT (val
);
4067 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4070 Rather than test for specific case, we do this by a brute-force method
4071 and do all possible simplifications until no more changes occur. Then
4072 we rebuild the operation. */
4075 simplify_plus_minus (code
, mode
, op0
, op1
)
4077 enum machine_mode mode
;
4083 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4084 int first
= 1, negate
= 0, changed
;
4087 bzero (ops
, sizeof ops
);
4089 /* Set up the two operands and then expand them until nothing has been
4090 changed. If we run out of room in our array, give up; this should
4091 almost never happen. */
4093 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4100 for (i
= 0; i
< n_ops
; i
++)
4101 switch (GET_CODE (ops
[i
]))
4108 ops
[n_ops
] = XEXP (ops
[i
], 1);
4109 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4110 ops
[i
] = XEXP (ops
[i
], 0);
4116 ops
[i
] = XEXP (ops
[i
], 0);
4117 negs
[i
] = ! negs
[i
];
4122 ops
[i
] = XEXP (ops
[i
], 0);
4128 /* ~a -> (-a - 1) */
4131 ops
[n_ops
] = constm1_rtx
;
4132 negs
[n_ops
++] = negs
[i
];
4133 ops
[i
] = XEXP (ops
[i
], 0);
4134 negs
[i
] = ! negs
[i
];
4141 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4146 /* If we only have two operands, we can't do anything. */
4150 /* Now simplify each pair of operands until nothing changes. The first
4151 time through just simplify constants against each other. */
4158 for (i
= 0; i
< n_ops
- 1; i
++)
4159 for (j
= i
+ 1; j
< n_ops
; j
++)
4160 if (ops
[i
] != 0 && ops
[j
] != 0
4161 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4163 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4164 enum rtx_code ncode
= PLUS
;
4166 if (negs
[i
] && ! negs
[j
])
4167 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4168 else if (! negs
[i
] && negs
[j
])
4171 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4174 ops
[i
] = tem
, ops
[j
] = 0;
4175 negs
[i
] = negs
[i
] && negs
[j
];
4176 if (GET_CODE (tem
) == NEG
)
4177 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4179 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4180 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4188 /* Pack all the operands to the lower-numbered entries and give up if
4189 we didn't reduce the number of operands we had. Make sure we
4190 count a CONST as two operands. If we have the same number of
4191 operands, but have made more CONSTs than we had, this is also
4192 an improvement, so accept it. */
4194 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4197 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4198 if (GET_CODE (ops
[j
]) == CONST
)
4202 if (i
+ n_consts
> input_ops
4203 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4208 /* If we have a CONST_INT, put it last. */
4209 for (i
= 0; i
< n_ops
- 1; i
++)
4210 if (GET_CODE (ops
[i
]) == CONST_INT
)
4212 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4213 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4216 /* Put a non-negated operand first. If there aren't any, make all
4217 operands positive and negate the whole thing later. */
4218 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4223 for (i
= 0; i
< n_ops
; i
++)
4229 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4230 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4233 /* Now make the result by performing the requested operations. */
4235 for (i
= 1; i
< n_ops
; i
++)
4236 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4238 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4241 /* Make a binary operation by properly ordering the operands and
4242 seeing if the expression folds. */
4245 cse_gen_binary (code
, mode
, op0
, op1
)
4247 enum machine_mode mode
;
4252 /* Put complex operands first and constants second if commutative. */
4253 if (GET_RTX_CLASS (code
) == 'c'
4254 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4255 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4256 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4257 || (GET_CODE (op0
) == SUBREG
4258 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4259 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4260 tem
= op0
, op0
= op1
, op1
= tem
;
4262 /* If this simplifies, do it. */
4263 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4268 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4269 just form the operation. */
4271 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4272 && GET_MODE (op0
) != VOIDmode
)
4273 return plus_constant (op0
, INTVAL (op1
));
4274 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4275 && GET_MODE (op0
) != VOIDmode
)
4276 return plus_constant (op0
, - INTVAL (op1
));
4278 return gen_rtx (code
, mode
, op0
, op1
);
4281 /* Like simplify_binary_operation except used for relational operators.
4282 MODE is the mode of the operands, not that of the result. If MODE
4283 is VOIDmode, both operands must also be VOIDmode and we compare the
4284 operands in "infinite precision".
4286 If no simplification is possible, this function returns zero. Otherwise,
4287 it returns either const_true_rtx or const0_rtx. */
4290 simplify_relational_operation (code
, mode
, op0
, op1
)
4292 enum machine_mode mode
;
4295 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4298 /* If op0 is a compare, extract the comparison arguments from it. */
4299 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4300 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4302 /* We can't simplify MODE_CC values since we don't know what the
4303 actual comparison is. */
4304 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4311 /* For integer comparisons of A and B maybe we can simplify A - B and can
4312 then simplify a comparison of that with zero. If A and B are both either
4313 a register or a CONST_INT, this can't help; testing for these cases will
4314 prevent infinite recursion here and speed things up.
4316 If CODE is an unsigned comparison, we can only do this if A - B is a
4317 constant integer, and then we have to compare that integer with zero as a
4318 signed comparison. Note that this will give the incorrect result from
4319 comparisons that overflow. Since these are undefined, this is probably
4320 OK. If it causes a problem, we can check for A or B being an address
4321 (fp + const or SYMBOL_REF) and only do it in that case. */
4323 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4324 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4325 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4326 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4327 && (GET_CODE (tem
) == CONST_INT
4328 || (code
!= GTU
&& code
!= GEU
&&
4329 code
!= LTU
&& code
!= LEU
)))
4330 return simplify_relational_operation (signed_condition (code
),
4331 mode
, tem
, const0_rtx
);
4333 /* For non-IEEE floating-point, if the two operands are equal, we know the
4335 if (rtx_equal_p (op0
, op1
)
4336 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4337 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4338 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4340 /* If the operands are floating-point constants, see if we can fold
4342 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4343 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4344 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4346 REAL_VALUE_TYPE d0
, d1
;
4349 if (setjmp (handler
))
4352 set_float_handler (handler
);
4353 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4354 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4355 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4356 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4357 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4358 set_float_handler (NULL_PTR
);
4360 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4362 /* Otherwise, see if the operands are both integers. */
4363 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4364 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4365 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4367 int width
= GET_MODE_BITSIZE (mode
);
4368 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4369 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4371 /* Get the two words comprising each integer constant. */
4372 if (GET_CODE (op0
) == CONST_DOUBLE
)
4374 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4375 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4379 l0u
= l0s
= INTVAL (op0
);
4380 h0u
= 0, h0s
= l0s
< 0 ? -1 : 0;
4383 if (GET_CODE (op1
) == CONST_DOUBLE
)
4385 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4386 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4390 l1u
= l1s
= INTVAL (op1
);
4391 h1u
= 0, h1s
= l1s
< 0 ? -1 : 0;
4394 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4395 we have to sign or zero-extend the values. */
4396 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4397 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4399 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4401 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4402 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4404 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4405 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4407 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4408 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4411 equal
= (h0u
== h1u
&& l0u
== l1u
);
4412 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4413 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4414 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4415 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4418 /* Otherwise, there are some code-specific tests we can make. */
4424 /* References to the frame plus a constant or labels cannot
4425 be zero, but a SYMBOL_REF can due to #pragma weak. */
4426 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4427 || GET_CODE (op0
) == LABEL_REF
)
4428 #if FRAME_POINTER_REGNO != ARG_POINTGER_REGNO
4429 /* On some machines, the ap reg can be 0 sometimes. */
4430 && op0
!= arg_pointer_rtx
4437 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4438 || GET_CODE (op0
) == LABEL_REF
)
4439 #if FRAME_POINTER_REGNO != ARG_POINTER_REGNO
4440 && op0
!= arg_pointer_rtx
4443 return const_true_rtx
;
4447 /* Unsigned values are never negative. */
4448 if (op1
== const0_rtx
)
4449 return const_true_rtx
;
4453 if (op1
== const0_rtx
)
4458 /* Unsigned values are never greater than the largest
4460 if (GET_CODE (op1
) == CONST_INT
4461 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4462 && INTEGRAL_MODE_P (mode
))
4463 return const_true_rtx
;
4467 if (GET_CODE (op1
) == CONST_INT
4468 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4469 && INTEGRAL_MODE_P (mode
))
4477 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4482 return equal
? const_true_rtx
: const0_rtx
;
4484 return ! equal
? const_true_rtx
: const0_rtx
;
4486 return op0lt
? const_true_rtx
: const0_rtx
;
4488 return op1lt
? const_true_rtx
: const0_rtx
;
4490 return op0ltu
? const_true_rtx
: const0_rtx
;
4492 return op1ltu
? const_true_rtx
: const0_rtx
;
4494 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4496 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4498 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4500 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4506 /* Simplify CODE, an operation with result mode MODE and three operands,
4507 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4508 a constant. Return 0 if no simplifications is possible. */
4511 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4513 enum machine_mode mode
, op0_mode
;
4516 int width
= GET_MODE_BITSIZE (mode
);
4518 /* VOIDmode means "infinite" precision. */
4520 width
= HOST_BITS_PER_WIDE_INT
;
4526 if (GET_CODE (op0
) == CONST_INT
4527 && GET_CODE (op1
) == CONST_INT
4528 && GET_CODE (op2
) == CONST_INT
4529 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4530 && width
<= HOST_BITS_PER_WIDE_INT
)
4532 /* Extracting a bit-field from a constant */
4533 HOST_WIDE_INT val
= INTVAL (op0
);
4536 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4538 val
>>= INTVAL (op2
);
4540 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4542 /* First zero-extend. */
4543 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4544 /* If desired, propagate sign bit. */
4545 if (code
== SIGN_EXTRACT
4546 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4547 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4550 /* Clear the bits that don't belong in our mode,
4551 unless they and our sign bit are all one.
4552 So we get either a reasonable negative value or a reasonable
4553 unsigned value for this mode. */
4554 if (width
< HOST_BITS_PER_WIDE_INT
4555 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4556 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4557 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4559 return GEN_INT (val
);
4564 if (GET_CODE (op0
) == CONST_INT
)
4565 return op0
!= const0_rtx
? op1
: op2
;
4575 /* If X is a nontrivial arithmetic operation on an argument
4576 for which a constant value can be determined, return
4577 the result of operating on that value, as a constant.
4578 Otherwise, return X, possibly with one or more operands
4579 modified by recursive calls to this function.
4581 If X is a register whose contents are known, we do NOT
4582 return those contents here. equiv_constant is called to
4585 INSN is the insn that we may be modifying. If it is 0, make a copy
4586 of X before modifying it. */
4593 register enum rtx_code code
;
4594 register enum machine_mode mode
;
4601 /* Folded equivalents of first two operands of X. */
4605 /* Constant equivalents of first three operands of X;
4606 0 when no such equivalent is known. */
4611 /* The mode of the first operand of X. We need this for sign and zero
4613 enum machine_mode mode_arg0
;
4618 mode
= GET_MODE (x
);
4619 code
= GET_CODE (x
);
4628 /* No use simplifying an EXPR_LIST
4629 since they are used only for lists of args
4630 in a function call's REG_EQUAL note. */
4636 return prev_insn_cc0
;
4640 /* If the next insn is a CODE_LABEL followed by a jump table,
4641 PC's value is a LABEL_REF pointing to that label. That
4642 lets us fold switch statements on the Vax. */
4643 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4645 rtx next
= next_nonnote_insn (insn
);
4647 if (next
&& GET_CODE (next
) == CODE_LABEL
4648 && NEXT_INSN (next
) != 0
4649 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4650 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4651 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4652 return gen_rtx (LABEL_REF
, Pmode
, next
);
4657 /* See if we previously assigned a constant value to this SUBREG. */
4658 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4659 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4662 /* If this is a paradoxical SUBREG, we have no idea what value the
4663 extra bits would have. However, if the operand is equivalent
4664 to a SUBREG whose operand is the same as our mode, and all the
4665 modes are within a word, we can just use the inner operand
4666 because these SUBREGs just say how to treat the register.
4668 Similarly if we find an integer constant. */
4670 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4672 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4673 struct table_elt
*elt
;
4675 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4676 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4677 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4679 for (elt
= elt
->first_same_value
;
4680 elt
; elt
= elt
->next_same_value
)
4682 if (CONSTANT_P (elt
->exp
)
4683 && GET_MODE (elt
->exp
) == VOIDmode
)
4686 if (GET_CODE (elt
->exp
) == SUBREG
4687 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4688 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4689 return copy_rtx (SUBREG_REG (elt
->exp
));
4695 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4696 We might be able to if the SUBREG is extracting a single word in an
4697 integral mode or extracting the low part. */
4699 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4700 const_arg0
= equiv_constant (folded_arg0
);
4702 folded_arg0
= const_arg0
;
4704 if (folded_arg0
!= SUBREG_REG (x
))
4708 if (GET_MODE_CLASS (mode
) == MODE_INT
4709 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4710 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4711 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4712 GET_MODE (SUBREG_REG (x
)));
4713 if (new == 0 && subreg_lowpart_p (x
))
4714 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4719 /* If this is a narrowing SUBREG and our operand is a REG, see if
4720 we can find an equivalence for REG that is an arithmetic operation
4721 in a wider mode where both operands are paradoxical SUBREGs
4722 from objects of our result mode. In that case, we couldn't report
4723 an equivalent value for that operation, since we don't know what the
4724 extra bits will be. But we can find an equivalence for this SUBREG
4725 by folding that operation is the narrow mode. This allows us to
4726 fold arithmetic in narrow modes when the machine only supports
4727 word-sized arithmetic.
4729 Also look for a case where we have a SUBREG whose operand is the
4730 same as our result. If both modes are smaller than a word, we
4731 are simply interpreting a register in different modes and we
4732 can use the inner value. */
4734 if (GET_CODE (folded_arg0
) == REG
4735 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4736 && subreg_lowpart_p (x
))
4738 struct table_elt
*elt
;
4740 /* We can use HASH here since we know that canon_hash won't be
4742 elt
= lookup (folded_arg0
,
4743 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4744 GET_MODE (folded_arg0
));
4747 elt
= elt
->first_same_value
;
4749 for (; elt
; elt
= elt
->next_same_value
)
4751 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4753 /* Just check for unary and binary operations. */
4754 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4755 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4756 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4757 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4758 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4760 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4762 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4763 op0
= fold_rtx (op0
, NULL_RTX
);
4765 op0
= equiv_constant (op0
);
4767 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4770 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4771 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4772 && eltcode
!= DIV
&& eltcode
!= MOD
4773 && eltcode
!= UDIV
&& eltcode
!= UMOD
4774 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4775 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4776 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4777 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4779 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4780 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4781 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4783 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4785 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4786 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4788 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4789 op0
= fold_rtx (op0
, NULL_RTX
);
4792 op0
= equiv_constant (op0
);
4794 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4795 op1
= fold_rtx (op1
, NULL_RTX
);
4798 op1
= equiv_constant (op1
);
4800 /* If we are looking for the low SImode part of
4801 (ashift:DI c (const_int 32)), it doesn't work
4802 to compute that in SImode, because a 32-bit shift
4803 in SImode is unpredictable. We know the value is 0. */
4805 && (GET_CODE (elt
->exp
) == ASHIFT
4806 || GET_CODE (elt
->exp
) == LSHIFT
)
4807 && GET_CODE (op1
) == CONST_INT
4808 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4810 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4812 /* If the count fits in the inner mode's width,
4813 but exceeds the outer mode's width,
4814 the value will get truncated to 0
4818 /* If the count exceeds even the inner mode's width,
4819 don't fold this expression. */
4822 else if (op0
&& op1
)
4823 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4827 else if (GET_CODE (elt
->exp
) == SUBREG
4828 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4829 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4831 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4832 new = copy_rtx (SUBREG_REG (elt
->exp
));
4843 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4844 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4845 new = lookup_as_function (XEXP (x
, 0), code
);
4847 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4851 /* If we are not actually processing an insn, don't try to find the
4852 best address. Not only don't we care, but we could modify the
4853 MEM in an invalid way since we have no insn to validate against. */
4855 find_best_addr (insn
, &XEXP (x
, 0));
4858 /* Even if we don't fold in the insn itself,
4859 we can safely do so here, in hopes of getting a constant. */
4860 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
4862 HOST_WIDE_INT offset
= 0;
4864 if (GET_CODE (addr
) == REG
4865 && REGNO_QTY_VALID_P (REGNO (addr
))
4866 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4867 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4868 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4870 /* If address is constant, split it into a base and integer offset. */
4871 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4873 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4874 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4876 base
= XEXP (XEXP (addr
, 0), 0);
4877 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4879 else if (GET_CODE (addr
) == LO_SUM
4880 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4881 base
= XEXP (addr
, 1);
4883 /* If this is a constant pool reference, we can fold it into its
4884 constant to allow better value tracking. */
4885 if (base
&& GET_CODE (base
) == SYMBOL_REF
4886 && CONSTANT_POOL_ADDRESS_P (base
))
4888 rtx constant
= get_pool_constant (base
);
4889 enum machine_mode const_mode
= get_pool_mode (base
);
4892 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4893 constant_pool_entries_cost
= COST (constant
);
4895 /* If we are loading the full constant, we have an equivalence. */
4896 if (offset
== 0 && mode
== const_mode
)
4899 /* If this actually isn't a constant (wierd!), we can't do
4900 anything. Otherwise, handle the two most common cases:
4901 extracting a word from a multi-word constant, and extracting
4902 the low-order bits. Other cases don't seem common enough to
4904 if (! CONSTANT_P (constant
))
4907 if (GET_MODE_CLASS (mode
) == MODE_INT
4908 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4909 && offset
% UNITS_PER_WORD
== 0
4910 && (new = operand_subword (constant
,
4911 offset
/ UNITS_PER_WORD
,
4912 0, const_mode
)) != 0)
4915 if (((BYTES_BIG_ENDIAN
4916 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4917 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4918 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4922 /* If this is a reference to a label at a known position in a jump
4923 table, we also know its value. */
4924 if (base
&& GET_CODE (base
) == LABEL_REF
)
4926 rtx label
= XEXP (base
, 0);
4927 rtx table_insn
= NEXT_INSN (label
);
4929 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4930 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4932 rtx table
= PATTERN (table_insn
);
4935 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4936 < XVECLEN (table
, 0)))
4937 return XVECEXP (table
, 0,
4938 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4940 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4941 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4943 rtx table
= PATTERN (table_insn
);
4946 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4947 < XVECLEN (table
, 1)))
4949 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4950 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4953 if (GET_MODE (table
) != Pmode
)
4954 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4968 mode_arg0
= VOIDmode
;
4970 /* Try folding our operands.
4971 Then see which ones have constant values known. */
4973 fmt
= GET_RTX_FORMAT (code
);
4974 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4977 rtx arg
= XEXP (x
, i
);
4978 rtx folded_arg
= arg
, const_arg
= 0;
4979 enum machine_mode mode_arg
= GET_MODE (arg
);
4980 rtx cheap_arg
, expensive_arg
;
4981 rtx replacements
[2];
4984 /* Most arguments are cheap, so handle them specially. */
4985 switch (GET_CODE (arg
))
4988 /* This is the same as calling equiv_constant; it is duplicated
4990 if (REGNO_QTY_VALID_P (REGNO (arg
))
4991 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4992 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
4993 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
4995 = gen_lowpart_if_possible (GET_MODE (arg
),
4996 qty_const
[reg_qty
[REGNO (arg
)]]);
5009 folded_arg
= prev_insn_cc0
;
5010 mode_arg
= prev_insn_cc0_mode
;
5011 const_arg
= equiv_constant (folded_arg
);
5016 folded_arg
= fold_rtx (arg
, insn
);
5017 const_arg
= equiv_constant (folded_arg
);
5020 /* For the first three operands, see if the operand
5021 is constant or equivalent to a constant. */
5025 folded_arg0
= folded_arg
;
5026 const_arg0
= const_arg
;
5027 mode_arg0
= mode_arg
;
5030 folded_arg1
= folded_arg
;
5031 const_arg1
= const_arg
;
5034 const_arg2
= const_arg
;
5038 /* Pick the least expensive of the folded argument and an
5039 equivalent constant argument. */
5040 if (const_arg
== 0 || const_arg
== folded_arg
5041 || COST (const_arg
) > COST (folded_arg
))
5042 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5044 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5046 /* Try to replace the operand with the cheapest of the two
5047 possibilities. If it doesn't work and this is either of the first
5048 two operands of a commutative operation, try swapping them.
5049 If THAT fails, try the more expensive, provided it is cheaper
5050 than what is already there. */
5052 if (cheap_arg
== XEXP (x
, i
))
5055 if (insn
== 0 && ! copied
)
5061 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5063 j
< 2 && replacements
[j
]
5064 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5067 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5070 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5072 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5073 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5075 if (apply_change_group ())
5077 /* Swap them back to be invalid so that this loop can
5078 continue and flag them to be swapped back later. */
5081 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5090 else if (fmt
[i
] == 'E')
5091 /* Don't try to fold inside of a vector of expressions.
5092 Doing nothing is harmless. */
5095 /* If a commutative operation, place a constant integer as the second
5096 operand unless the first operand is also a constant integer. Otherwise,
5097 place any constant second unless the first operand is also a constant. */
5099 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5101 if (must_swap
|| (const_arg0
5103 || (GET_CODE (const_arg0
) == CONST_INT
5104 && GET_CODE (const_arg1
) != CONST_INT
))))
5106 register rtx tem
= XEXP (x
, 0);
5108 if (insn
== 0 && ! copied
)
5114 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5115 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5116 if (apply_change_group ())
5118 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5119 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5124 /* If X is an arithmetic operation, see if we can simplify it. */
5126 switch (GET_RTX_CLASS (code
))
5129 /* We can't simplify extension ops unless we know the original mode. */
5130 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5131 && mode_arg0
== VOIDmode
)
5133 new = simplify_unary_operation (code
, mode
,
5134 const_arg0
? const_arg0
: folded_arg0
,
5139 /* See what items are actually being compared and set FOLDED_ARG[01]
5140 to those values and CODE to the actual comparison code. If any are
5141 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5142 do anything if both operands are already known to be constant. */
5144 if (const_arg0
== 0 || const_arg1
== 0)
5146 struct table_elt
*p0
, *p1
;
5147 rtx
true = const_true_rtx
, false = const0_rtx
;
5148 enum machine_mode mode_arg1
;
5150 #ifdef FLOAT_STORE_FLAG_VALUE
5151 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5153 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5154 false = CONST0_RTX (mode
);
5158 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5159 &mode_arg0
, &mode_arg1
);
5160 const_arg0
= equiv_constant (folded_arg0
);
5161 const_arg1
= equiv_constant (folded_arg1
);
5163 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5164 what kinds of things are being compared, so we can't do
5165 anything with this comparison. */
5167 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5170 /* If we do not now have two constants being compared, see if we
5171 can nevertheless deduce some things about the comparison. */
5172 if (const_arg0
== 0 || const_arg1
== 0)
5174 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5175 constant? These aren't zero, but we don't know their sign. */
5176 if (const_arg1
== const0_rtx
5177 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5178 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5180 || GET_CODE (folded_arg0
) == SYMBOL_REF
5182 || GET_CODE (folded_arg0
) == LABEL_REF
5183 || GET_CODE (folded_arg0
) == CONST
))
5187 else if (code
== NE
)
5191 /* See if the two operands are the same. We don't do this
5192 for IEEE floating-point since we can't assume x == x
5193 since x might be a NaN. */
5195 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5196 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5197 && (folded_arg0
== folded_arg1
5198 || (GET_CODE (folded_arg0
) == REG
5199 && GET_CODE (folded_arg1
) == REG
5200 && (reg_qty
[REGNO (folded_arg0
)]
5201 == reg_qty
[REGNO (folded_arg1
)]))
5202 || ((p0
= lookup (folded_arg0
,
5203 (safe_hash (folded_arg0
, mode_arg0
)
5204 % NBUCKETS
), mode_arg0
))
5205 && (p1
= lookup (folded_arg1
,
5206 (safe_hash (folded_arg1
, mode_arg0
)
5207 % NBUCKETS
), mode_arg0
))
5208 && p0
->first_same_value
== p1
->first_same_value
)))
5209 return ((code
== EQ
|| code
== LE
|| code
== GE
5210 || code
== LEU
|| code
== GEU
)
5213 /* If FOLDED_ARG0 is a register, see if the comparison we are
5214 doing now is either the same as we did before or the reverse
5215 (we only check the reverse if not floating-point). */
5216 else if (GET_CODE (folded_arg0
) == REG
)
5218 int qty
= reg_qty
[REGNO (folded_arg0
)];
5220 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5221 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5222 || (comparison_dominates_p (qty_comparison_code
[qty
],
5223 reverse_condition (code
))
5224 && ! FLOAT_MODE_P (mode_arg0
)))
5225 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5227 && rtx_equal_p (qty_comparison_const
[qty
],
5229 || (GET_CODE (folded_arg1
) == REG
5230 && (reg_qty
[REGNO (folded_arg1
)]
5231 == qty_comparison_qty
[qty
]))))
5232 return (comparison_dominates_p (qty_comparison_code
[qty
],
5239 /* If we are comparing against zero, see if the first operand is
5240 equivalent to an IOR with a constant. If so, we may be able to
5241 determine the result of this comparison. */
5243 if (const_arg1
== const0_rtx
)
5245 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5249 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5250 && GET_CODE (inner_const
) == CONST_INT
5251 && INTVAL (inner_const
) != 0)
5253 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5254 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5255 && (INTVAL (inner_const
)
5256 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5257 rtx
true = const_true_rtx
, false = const0_rtx
;
5259 #ifdef FLOAT_STORE_FLAG_VALUE
5260 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5262 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5263 false = CONST0_RTX (mode
);
5285 new = simplify_relational_operation (code
, mode_arg0
,
5286 const_arg0
? const_arg0
: folded_arg0
,
5287 const_arg1
? const_arg1
: folded_arg1
);
5288 #ifdef FLOAT_STORE_FLAG_VALUE
5289 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5290 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5291 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
));
5300 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5301 with that LABEL_REF as its second operand. If so, the result is
5302 the first operand of that MINUS. This handles switches with an
5303 ADDR_DIFF_VEC table. */
5304 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5306 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
5308 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5309 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5313 /* If second operand is a register equivalent to a negative
5314 CONST_INT, see if we can find a register equivalent to the
5315 positive constant. Make a MINUS if so. Don't do this for
5316 a negative constant since we might then alternate between
5317 chosing positive and negative constants. Having the positive
5318 constant previously-used is the more common case. */
5319 if (const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
5320 && INTVAL (const_arg1
) < 0 && GET_CODE (folded_arg1
) == REG
)
5322 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5324 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5328 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5329 if (GET_CODE (p
->exp
) == REG
)
5330 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5331 canon_reg (p
->exp
, NULL_RTX
));
5336 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5337 If so, produce (PLUS Z C2-C). */
5338 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5340 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5341 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5342 return fold_rtx (plus_constant (copy_rtx (y
),
5343 -INTVAL (const_arg1
)),
5347 /* ... fall through ... */
5350 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5351 case IOR
: case AND
: case XOR
:
5352 case MULT
: case DIV
: case UDIV
:
5353 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5354 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5355 is known to be of similar form, we may be able to replace the
5356 operation with a combined operation. This may eliminate the
5357 intermediate operation if every use is simplified in this way.
5358 Note that the similar optimization done by combine.c only works
5359 if the intermediate operation's result has only one reference. */
5361 if (GET_CODE (folded_arg0
) == REG
5362 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5365 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5366 rtx y
= lookup_as_function (folded_arg0
, code
);
5368 enum rtx_code associate_code
;
5372 || 0 == (inner_const
5373 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5374 || GET_CODE (inner_const
) != CONST_INT
5375 /* If we have compiled a statement like
5376 "if (x == (x & mask1))", and now are looking at
5377 "x & mask2", we will have a case where the first operand
5378 of Y is the same as our first operand. Unless we detect
5379 this case, an infinite loop will result. */
5380 || XEXP (y
, 0) == folded_arg0
)
5383 /* Don't associate these operations if they are a PLUS with the
5384 same constant and it is a power of two. These might be doable
5385 with a pre- or post-increment. Similarly for two subtracts of
5386 identical powers of two with post decrement. */
5388 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5390 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5391 || exact_log2 (INTVAL (const_arg1
)) >= 0
5393 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5394 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5399 /* Compute the code used to compose the constants. For example,
5400 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5403 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5404 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5406 new_const
= simplify_binary_operation (associate_code
, mode
,
5407 const_arg1
, inner_const
);
5412 /* If we are associating shift operations, don't let this
5413 produce a shift of the size of the object or larger.
5414 This could occur when we follow a sign-extend by a right
5415 shift on a machine that does a sign-extend as a pair
5418 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5419 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5421 /* As an exception, we can turn an ASHIFTRT of this
5422 form into a shift of the number of bits - 1. */
5423 if (code
== ASHIFTRT
)
5424 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5429 y
= copy_rtx (XEXP (y
, 0));
5431 /* If Y contains our first operand (the most common way this
5432 can happen is if Y is a MEM), we would do into an infinite
5433 loop if we tried to fold it. So don't in that case. */
5435 if (! reg_mentioned_p (folded_arg0
, y
))
5436 y
= fold_rtx (y
, insn
);
5438 return cse_gen_binary (code
, mode
, y
, new_const
);
5442 new = simplify_binary_operation (code
, mode
,
5443 const_arg0
? const_arg0
: folded_arg0
,
5444 const_arg1
? const_arg1
: folded_arg1
);
5448 /* (lo_sum (high X) X) is simply X. */
5449 if (code
== LO_SUM
&& const_arg0
!= 0
5450 && GET_CODE (const_arg0
) == HIGH
5451 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5457 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5458 const_arg0
? const_arg0
: folded_arg0
,
5459 const_arg1
? const_arg1
: folded_arg1
,
5460 const_arg2
? const_arg2
: XEXP (x
, 2));
5464 return new ? new : x
;
5467 /* Return a constant value currently equivalent to X.
5468 Return 0 if we don't know one. */
5474 if (GET_CODE (x
) == REG
5475 && REGNO_QTY_VALID_P (REGNO (x
))
5476 && qty_const
[reg_qty
[REGNO (x
)]])
5477 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5479 if (x
!= 0 && CONSTANT_P (x
))
5482 /* If X is a MEM, try to fold it outside the context of any insn to see if
5483 it might be equivalent to a constant. That handles the case where it
5484 is a constant-pool reference. Then try to look it up in the hash table
5485 in case it is something whose value we have seen before. */
5487 if (GET_CODE (x
) == MEM
)
5489 struct table_elt
*elt
;
5491 x
= fold_rtx (x
, NULL_RTX
);
5495 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5499 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5500 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5507 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5508 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5509 least-significant part of X.
5510 MODE specifies how big a part of X to return.
5512 If the requested operation cannot be done, 0 is returned.
5514 This is similar to gen_lowpart in emit-rtl.c. */
5517 gen_lowpart_if_possible (mode
, x
)
5518 enum machine_mode mode
;
5521 rtx result
= gen_lowpart_common (mode
, x
);
5525 else if (GET_CODE (x
) == MEM
)
5527 /* This is the only other case we handle. */
5528 register int offset
= 0;
5531 #if WORDS_BIG_ENDIAN
5532 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5533 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5535 #if BYTES_BIG_ENDIAN
5536 /* Adjust the address so that the address-after-the-data
5538 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5539 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5541 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5542 if (! memory_address_p (mode
, XEXP (new, 0)))
5544 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5545 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5546 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5553 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5554 branch. It will be zero if not.
5556 In certain cases, this can cause us to add an equivalence. For example,
5557 if we are following the taken case of
5559 we can add the fact that `i' and '2' are now equivalent.
5561 In any case, we can record that this comparison was passed. If the same
5562 comparison is seen later, we will know its value. */
5565 record_jump_equiv (insn
, taken
)
5569 int cond_known_true
;
5571 enum machine_mode mode
, mode0
, mode1
;
5572 int reversed_nonequality
= 0;
5575 /* Ensure this is the right kind of insn. */
5576 if (! condjump_p (insn
) || simplejump_p (insn
))
5579 /* See if this jump condition is known true or false. */
5581 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5583 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5585 /* Get the type of comparison being done and the operands being compared.
5586 If we had to reverse a non-equality condition, record that fact so we
5587 know that it isn't valid for floating-point. */
5588 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5589 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5590 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5592 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5593 if (! cond_known_true
)
5595 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5596 code
= reverse_condition (code
);
5599 /* The mode is the mode of the non-constant. */
5601 if (mode1
!= VOIDmode
)
5604 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5607 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5608 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5609 Make any useful entries we can with that information. Called from
5610 above function and called recursively. */
5613 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5615 enum machine_mode mode
;
5617 int reversed_nonequality
;
5619 unsigned op0_hash
, op1_hash
;
5620 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5621 struct table_elt
*op0_elt
, *op1_elt
;
5623 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5624 we know that they are also equal in the smaller mode (this is also
5625 true for all smaller modes whether or not there is a SUBREG, but
5626 is not worth testing for with no SUBREG. */
5628 /* Note that GET_MODE (op0) may not equal MODE. */
5629 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5630 && (GET_MODE_SIZE (GET_MODE (op0
))
5631 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5633 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5634 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5636 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5637 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5638 reversed_nonequality
);
5641 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5642 && (GET_MODE_SIZE (GET_MODE (op1
))
5643 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5645 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5646 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5648 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5649 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5650 reversed_nonequality
);
5653 /* Similarly, if this is an NE comparison, and either is a SUBREG
5654 making a smaller mode, we know the whole thing is also NE. */
5656 /* Note that GET_MODE (op0) may not equal MODE;
5657 if we test MODE instead, we can get an infinite recursion
5658 alternating between two modes each wider than MODE. */
5660 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5661 && subreg_lowpart_p (op0
)
5662 && (GET_MODE_SIZE (GET_MODE (op0
))
5663 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5665 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5666 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5668 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5669 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5670 reversed_nonequality
);
5673 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5674 && subreg_lowpart_p (op1
)
5675 && (GET_MODE_SIZE (GET_MODE (op1
))
5676 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5678 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5679 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5681 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5682 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5683 reversed_nonequality
);
5686 /* Hash both operands. */
5689 hash_arg_in_memory
= 0;
5690 hash_arg_in_struct
= 0;
5691 op0_hash
= HASH (op0
, mode
);
5692 op0_in_memory
= hash_arg_in_memory
;
5693 op0_in_struct
= hash_arg_in_struct
;
5699 hash_arg_in_memory
= 0;
5700 hash_arg_in_struct
= 0;
5701 op1_hash
= HASH (op1
, mode
);
5702 op1_in_memory
= hash_arg_in_memory
;
5703 op1_in_struct
= hash_arg_in_struct
;
5708 /* Look up both operands. */
5709 op0_elt
= lookup (op0
, op0_hash
, mode
);
5710 op1_elt
= lookup (op1
, op1_hash
, mode
);
5712 /* If we aren't setting two things equal all we can do is save this
5713 comparison. Similarly if this is floating-point. In the latter
5714 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5715 If we record the equality, we might inadvertently delete code
5716 whose intent was to change -0 to +0. */
5718 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5720 /* If we reversed a floating-point comparison, if OP0 is not a
5721 register, or if OP1 is neither a register or constant, we can't
5724 if (GET_CODE (op1
) != REG
)
5725 op1
= equiv_constant (op1
);
5727 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5728 || GET_CODE (op0
) != REG
|| op1
== 0)
5731 /* Put OP0 in the hash table if it isn't already. This gives it a
5732 new quantity number. */
5735 if (insert_regs (op0
, NULL_PTR
, 0))
5737 rehash_using_reg (op0
);
5738 op0_hash
= HASH (op0
, mode
);
5740 /* If OP0 is contained in OP1, this changes its hash code
5741 as well. Faster to rehash than to check, except
5742 for the simple case of a constant. */
5743 if (! CONSTANT_P (op1
))
5744 op1_hash
= HASH (op1
,mode
);
5747 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5748 op0_elt
->in_memory
= op0_in_memory
;
5749 op0_elt
->in_struct
= op0_in_struct
;
5752 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5753 if (GET_CODE (op1
) == REG
)
5755 /* Look it up again--in case op0 and op1 are the same. */
5756 op1_elt
= lookup (op1
, op1_hash
, mode
);
5758 /* Put OP1 in the hash table so it gets a new quantity number. */
5761 if (insert_regs (op1
, NULL_PTR
, 0))
5763 rehash_using_reg (op1
);
5764 op1_hash
= HASH (op1
, mode
);
5767 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5768 op1_elt
->in_memory
= op1_in_memory
;
5769 op1_elt
->in_struct
= op1_in_struct
;
5772 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5773 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5777 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5778 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5784 /* If either side is still missing an equivalence, make it now,
5785 then merge the equivalences. */
5789 if (insert_regs (op0
, NULL_PTR
, 0))
5791 rehash_using_reg (op0
);
5792 op0_hash
= HASH (op0
, mode
);
5795 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5796 op0_elt
->in_memory
= op0_in_memory
;
5797 op0_elt
->in_struct
= op0_in_struct
;
5802 if (insert_regs (op1
, NULL_PTR
, 0))
5804 rehash_using_reg (op1
);
5805 op1_hash
= HASH (op1
, mode
);
5808 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
5809 op1_elt
->in_memory
= op1_in_memory
;
5810 op1_elt
->in_struct
= op1_in_struct
;
5813 merge_equiv_classes (op0_elt
, op1_elt
);
5814 last_jump_equiv_class
= op0_elt
;
5817 /* CSE processing for one instruction.
5818 First simplify sources and addresses of all assignments
5819 in the instruction, using previously-computed equivalents values.
5820 Then install the new sources and destinations in the table
5821 of available values.
5823 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5826 /* Data on one SET contained in the instruction. */
5830 /* The SET rtx itself. */
5832 /* The SET_SRC of the rtx (the original value, if it is changing). */
5834 /* The hash-table element for the SET_SRC of the SET. */
5835 struct table_elt
*src_elt
;
5836 /* Hash value for the SET_SRC. */
5838 /* Hash value for the SET_DEST. */
5840 /* The SET_DEST, with SUBREG, etc., stripped. */
5842 /* Place where the pointer to the INNER_DEST was found. */
5843 rtx
*inner_dest_loc
;
5844 /* Nonzero if the SET_SRC is in memory. */
5846 /* Nonzero if the SET_SRC is in a structure. */
5848 /* Nonzero if the SET_SRC contains something
5849 whose value cannot be predicted and understood. */
5851 /* Original machine mode, in case it becomes a CONST_INT. */
5852 enum machine_mode mode
;
5853 /* A constant equivalent for SET_SRC, if any. */
5855 /* Hash value of constant equivalent for SET_SRC. */
5856 unsigned src_const_hash
;
5857 /* Table entry for constant equivalent for SET_SRC, if any. */
5858 struct table_elt
*src_const_elt
;
5862 cse_insn (insn
, in_libcall_block
)
5864 int in_libcall_block
;
5866 register rtx x
= PATTERN (insn
);
5869 register int n_sets
= 0;
5871 /* Records what this insn does to set CC0. */
5872 rtx this_insn_cc0
= 0;
5873 enum machine_mode this_insn_cc0_mode
;
5874 struct write_data writes_memory
;
5875 static struct write_data init
= {0, 0, 0, 0};
5878 struct table_elt
*src_eqv_elt
= 0;
5879 int src_eqv_volatile
;
5880 int src_eqv_in_memory
;
5881 int src_eqv_in_struct
;
5882 unsigned src_eqv_hash
;
5887 writes_memory
= init
;
5889 /* Find all the SETs and CLOBBERs in this instruction.
5890 Record all the SETs in the array `set' and count them.
5891 Also determine whether there is a CLOBBER that invalidates
5892 all memory references, or all references at varying addresses. */
5894 if (GET_CODE (x
) == SET
)
5896 sets
= (struct set
*) alloca (sizeof (struct set
));
5899 /* Ignore SETs that are unconditional jumps.
5900 They never need cse processing, so this does not hurt.
5901 The reason is not efficiency but rather
5902 so that we can test at the end for instructions
5903 that have been simplified to unconditional jumps
5904 and not be misled by unchanged instructions
5905 that were unconditional jumps to begin with. */
5906 if (SET_DEST (x
) == pc_rtx
5907 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5910 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5911 The hard function value register is used only once, to copy to
5912 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5913 Ensure we invalidate the destination register. On the 80386 no
5914 other code would invalidate it since it is a fixed_reg.
5915 We need not check the return of apply_change_group; see canon_reg. */
5917 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5919 canon_reg (SET_SRC (x
), insn
);
5920 apply_change_group ();
5921 fold_rtx (SET_SRC (x
), insn
);
5922 invalidate (SET_DEST (x
));
5927 else if (GET_CODE (x
) == PARALLEL
)
5929 register int lim
= XVECLEN (x
, 0);
5931 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5933 /* Find all regs explicitly clobbered in this insn,
5934 and ensure they are not replaced with any other regs
5935 elsewhere in this insn.
5936 When a reg that is clobbered is also used for input,
5937 we should presume that that is for a reason,
5938 and we should not substitute some other register
5939 which is not supposed to be clobbered.
5940 Therefore, this loop cannot be merged into the one below
5941 because a CALL may precede a CLOBBER and refer to the
5942 value clobbered. We must not let a canonicalization do
5943 anything in that case. */
5944 for (i
= 0; i
< lim
; i
++)
5946 register rtx y
= XVECEXP (x
, 0, i
);
5947 if (GET_CODE (y
) == CLOBBER
)
5949 rtx clobbered
= XEXP (y
, 0);
5951 if (GET_CODE (clobbered
) == REG
5952 || GET_CODE (clobbered
) == SUBREG
)
5953 invalidate (clobbered
);
5954 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
5955 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
5956 invalidate (XEXP (clobbered
, 0));
5960 for (i
= 0; i
< lim
; i
++)
5962 register rtx y
= XVECEXP (x
, 0, i
);
5963 if (GET_CODE (y
) == SET
)
5965 /* As above, we ignore unconditional jumps and call-insns and
5966 ignore the result of apply_change_group. */
5967 if (GET_CODE (SET_SRC (y
)) == CALL
)
5969 canon_reg (SET_SRC (y
), insn
);
5970 apply_change_group ();
5971 fold_rtx (SET_SRC (y
), insn
);
5972 invalidate (SET_DEST (y
));
5974 else if (SET_DEST (y
) == pc_rtx
5975 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5978 sets
[n_sets
++].rtl
= y
;
5980 else if (GET_CODE (y
) == CLOBBER
)
5982 /* If we clobber memory, take note of that,
5983 and canon the address.
5984 This does nothing when a register is clobbered
5985 because we have already invalidated the reg. */
5986 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5988 canon_reg (XEXP (y
, 0), NULL_RTX
);
5989 note_mem_written (XEXP (y
, 0), &writes_memory
);
5992 else if (GET_CODE (y
) == USE
5993 && ! (GET_CODE (XEXP (y
, 0)) == REG
5994 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
5995 canon_reg (y
, NULL_RTX
);
5996 else if (GET_CODE (y
) == CALL
)
5998 /* The result of apply_change_group can be ignored; see
6000 canon_reg (y
, insn
);
6001 apply_change_group ();
6006 else if (GET_CODE (x
) == CLOBBER
)
6008 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6010 canon_reg (XEXP (x
, 0), NULL_RTX
);
6011 note_mem_written (XEXP (x
, 0), &writes_memory
);
6015 /* Canonicalize a USE of a pseudo register or memory location. */
6016 else if (GET_CODE (x
) == USE
6017 && ! (GET_CODE (XEXP (x
, 0)) == REG
6018 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6019 canon_reg (XEXP (x
, 0), NULL_RTX
);
6020 else if (GET_CODE (x
) == CALL
)
6022 /* The result of apply_change_group can be ignored; see canon_reg. */
6023 canon_reg (x
, insn
);
6024 apply_change_group ();
6028 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
6030 /* Store the equivalent value in SRC_EQV, if different. */
6031 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6033 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
6034 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6037 /* Canonicalize sources and addresses of destinations.
6038 We do this in a separate pass to avoid problems when a MATCH_DUP is
6039 present in the insn pattern. In that case, we want to ensure that
6040 we don't break the duplicate nature of the pattern. So we will replace
6041 both operands at the same time. Otherwise, we would fail to find an
6042 equivalent substitution in the loop calling validate_change below.
6044 We used to suppress canonicalization of DEST if it appears in SRC,
6045 but we don't do this any more. */
6047 for (i
= 0; i
< n_sets
; i
++)
6049 rtx dest
= SET_DEST (sets
[i
].rtl
);
6050 rtx src
= SET_SRC (sets
[i
].rtl
);
6051 rtx
new = canon_reg (src
, insn
);
6053 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6054 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6055 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6056 || insn_n_dups
[recog_memoized (insn
)] > 0)
6057 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6059 SET_SRC (sets
[i
].rtl
) = new;
6061 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6063 validate_change (insn
, &XEXP (dest
, 1),
6064 canon_reg (XEXP (dest
, 1), insn
), 1);
6065 validate_change (insn
, &XEXP (dest
, 2),
6066 canon_reg (XEXP (dest
, 2), insn
), 1);
6069 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6070 || GET_CODE (dest
) == ZERO_EXTRACT
6071 || GET_CODE (dest
) == SIGN_EXTRACT
)
6072 dest
= XEXP (dest
, 0);
6074 if (GET_CODE (dest
) == MEM
)
6075 canon_reg (dest
, insn
);
6078 /* Now that we have done all the replacements, we can apply the change
6079 group and see if they all work. Note that this will cause some
6080 canonicalizations that would have worked individually not to be applied
6081 because some other canonicalization didn't work, but this should not
6084 The result of apply_change_group can be ignored; see canon_reg. */
6086 apply_change_group ();
6088 /* Set sets[i].src_elt to the class each source belongs to.
6089 Detect assignments from or to volatile things
6090 and set set[i] to zero so they will be ignored
6091 in the rest of this function.
6093 Nothing in this loop changes the hash table or the register chains. */
6095 for (i
= 0; i
< n_sets
; i
++)
6097 register rtx src
, dest
;
6098 register rtx src_folded
;
6099 register struct table_elt
*elt
= 0, *p
;
6100 enum machine_mode mode
;
6103 rtx src_related
= 0;
6104 struct table_elt
*src_const_elt
= 0;
6105 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6106 int src_related_cost
= 10000, src_elt_cost
= 10000;
6107 /* Set non-zero if we need to call force_const_mem on with the
6108 contents of src_folded before using it. */
6109 int src_folded_force_flag
= 0;
6111 dest
= SET_DEST (sets
[i
].rtl
);
6112 src
= SET_SRC (sets
[i
].rtl
);
6114 /* If SRC is a constant that has no machine mode,
6115 hash it with the destination's machine mode.
6116 This way we can keep different modes separate. */
6118 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6119 sets
[i
].mode
= mode
;
6123 enum machine_mode eqvmode
= mode
;
6124 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6125 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6127 hash_arg_in_memory
= 0;
6128 hash_arg_in_struct
= 0;
6129 src_eqv
= fold_rtx (src_eqv
, insn
);
6130 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6132 /* Find the equivalence class for the equivalent expression. */
6135 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6137 src_eqv_volatile
= do_not_record
;
6138 src_eqv_in_memory
= hash_arg_in_memory
;
6139 src_eqv_in_struct
= hash_arg_in_struct
;
6142 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6143 value of the INNER register, not the destination. So it is not
6144 a legal substitution for the source. But save it for later. */
6145 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6148 src_eqv_here
= src_eqv
;
6150 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6151 simplified result, which may not necessarily be valid. */
6152 src_folded
= fold_rtx (src
, insn
);
6154 /* If storing a constant in a bitfield, pre-truncate the constant
6155 so we will be able to record it later. */
6156 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6157 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6159 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6161 if (GET_CODE (src
) == CONST_INT
6162 && GET_CODE (width
) == CONST_INT
6163 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6164 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6166 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6167 << INTVAL (width
)) - 1));
6170 /* Compute SRC's hash code, and also notice if it
6171 should not be recorded at all. In that case,
6172 prevent any further processing of this assignment. */
6174 hash_arg_in_memory
= 0;
6175 hash_arg_in_struct
= 0;
6178 sets
[i
].src_hash
= HASH (src
, mode
);
6179 sets
[i
].src_volatile
= do_not_record
;
6180 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6181 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6184 /* It is no longer clear why we used to do this, but it doesn't
6185 appear to still be needed. So let's try without it since this
6186 code hurts cse'ing widened ops. */
6187 /* If source is a perverse subreg (such as QI treated as an SI),
6188 treat it as volatile. It may do the work of an SI in one context
6189 where the extra bits are not being used, but cannot replace an SI
6191 if (GET_CODE (src
) == SUBREG
6192 && (GET_MODE_SIZE (GET_MODE (src
))
6193 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6194 sets
[i
].src_volatile
= 1;
6197 /* Locate all possible equivalent forms for SRC. Try to replace
6198 SRC in the insn with each cheaper equivalent.
6200 We have the following types of equivalents: SRC itself, a folded
6201 version, a value given in a REG_EQUAL note, or a value related
6204 Each of these equivalents may be part of an additional class
6205 of equivalents (if more than one is in the table, they must be in
6206 the same class; we check for this).
6208 If the source is volatile, we don't do any table lookups.
6210 We note any constant equivalent for possible later use in a
6213 if (!sets
[i
].src_volatile
)
6214 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6216 sets
[i
].src_elt
= elt
;
6218 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6220 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6222 /* The REG_EQUAL is indicating that two formerly distinct
6223 classes are now equivalent. So merge them. */
6224 merge_equiv_classes (elt
, src_eqv_elt
);
6225 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6226 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6232 else if (src_eqv_elt
)
6235 /* Try to find a constant somewhere and record it in `src_const'.
6236 Record its table element, if any, in `src_const_elt'. Look in
6237 any known equivalences first. (If the constant is not in the
6238 table, also set `sets[i].src_const_hash'). */
6240 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6244 src_const_elt
= elt
;
6249 && (CONSTANT_P (src_folded
)
6250 /* Consider (minus (label_ref L1) (label_ref L2)) as
6251 "constant" here so we will record it. This allows us
6252 to fold switch statements when an ADDR_DIFF_VEC is used. */
6253 || (GET_CODE (src_folded
) == MINUS
6254 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6255 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6256 src_const
= src_folded
, src_const_elt
= elt
;
6257 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6258 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6260 /* If we don't know if the constant is in the table, get its
6261 hash code and look it up. */
6262 if (src_const
&& src_const_elt
== 0)
6264 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6265 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6268 sets
[i
].src_const
= src_const
;
6269 sets
[i
].src_const_elt
= src_const_elt
;
6271 /* If the constant and our source are both in the table, mark them as
6272 equivalent. Otherwise, if a constant is in the table but the source
6273 isn't, set ELT to it. */
6274 if (src_const_elt
&& elt
6275 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6276 merge_equiv_classes (elt
, src_const_elt
);
6277 else if (src_const_elt
&& elt
== 0)
6278 elt
= src_const_elt
;
6280 /* See if there is a register linearly related to a constant
6281 equivalent of SRC. */
6283 && (GET_CODE (src_const
) == CONST
6284 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6286 src_related
= use_related_value (src_const
, src_const_elt
);
6289 struct table_elt
*src_related_elt
6290 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6291 if (src_related_elt
&& elt
)
6293 if (elt
->first_same_value
6294 != src_related_elt
->first_same_value
)
6295 /* This can occur when we previously saw a CONST
6296 involving a SYMBOL_REF and then see the SYMBOL_REF
6297 twice. Merge the involved classes. */
6298 merge_equiv_classes (elt
, src_related_elt
);
6301 src_related_elt
= 0;
6303 else if (src_related_elt
&& elt
== 0)
6304 elt
= src_related_elt
;
6308 /* See if we have a CONST_INT that is already in a register in a
6311 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6312 && GET_MODE_CLASS (mode
) == MODE_INT
6313 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6315 enum machine_mode wider_mode
;
6317 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6318 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6319 && src_related
== 0;
6320 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6322 struct table_elt
*const_elt
6323 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6328 for (const_elt
= const_elt
->first_same_value
;
6329 const_elt
; const_elt
= const_elt
->next_same_value
)
6330 if (GET_CODE (const_elt
->exp
) == REG
)
6332 src_related
= gen_lowpart_if_possible (mode
,
6339 /* Another possibility is that we have an AND with a constant in
6340 a mode narrower than a word. If so, it might have been generated
6341 as part of an "if" which would narrow the AND. If we already
6342 have done the AND in a wider mode, we can use a SUBREG of that
6345 if (flag_expensive_optimizations
&& ! src_related
6346 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6347 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6349 enum machine_mode tmode
;
6350 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6352 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6353 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6354 tmode
= GET_MODE_WIDER_MODE (tmode
))
6356 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6357 struct table_elt
*larger_elt
;
6361 PUT_MODE (new_and
, tmode
);
6362 XEXP (new_and
, 0) = inner
;
6363 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6364 if (larger_elt
== 0)
6367 for (larger_elt
= larger_elt
->first_same_value
;
6368 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6369 if (GET_CODE (larger_elt
->exp
) == REG
)
6372 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6382 if (src
== src_folded
)
6385 /* At this point, ELT, if non-zero, points to a class of expressions
6386 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6387 and SRC_RELATED, if non-zero, each contain additional equivalent
6388 expressions. Prune these latter expressions by deleting expressions
6389 already in the equivalence class.
6391 Check for an equivalent identical to the destination. If found,
6392 this is the preferred equivalent since it will likely lead to
6393 elimination of the insn. Indicate this by placing it in
6396 if (elt
) elt
= elt
->first_same_value
;
6397 for (p
= elt
; p
; p
= p
->next_same_value
)
6399 enum rtx_code code
= GET_CODE (p
->exp
);
6401 /* If the expression is not valid, ignore it. Then we do not
6402 have to check for validity below. In most cases, we can use
6403 `rtx_equal_p', since canonicalization has already been done. */
6404 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6407 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6409 else if (src_folded
&& GET_CODE (src_folded
) == code
6410 && rtx_equal_p (src_folded
, p
->exp
))
6412 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6413 && rtx_equal_p (src_eqv_here
, p
->exp
))
6415 else if (src_related
&& GET_CODE (src_related
) == code
6416 && rtx_equal_p (src_related
, p
->exp
))
6419 /* This is the same as the destination of the insns, we want
6420 to prefer it. Copy it to src_related. The code below will
6421 then give it a negative cost. */
6422 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6427 /* Find the cheapest valid equivalent, trying all the available
6428 possibilities. Prefer items not in the hash table to ones
6429 that are when they are equal cost. Note that we can never
6430 worsen an insn as the current contents will also succeed.
6431 If we find an equivalent identical to the destination, use it as best,
6432 since this insn will probably be eliminated in that case. */
6435 if (rtx_equal_p (src
, dest
))
6438 src_cost
= COST (src
);
6443 if (rtx_equal_p (src_eqv_here
, dest
))
6446 src_eqv_cost
= COST (src_eqv_here
);
6451 if (rtx_equal_p (src_folded
, dest
))
6452 src_folded_cost
= -1;
6454 src_folded_cost
= COST (src_folded
);
6459 if (rtx_equal_p (src_related
, dest
))
6460 src_related_cost
= -1;
6462 src_related_cost
= COST (src_related
);
6465 /* If this was an indirect jump insn, a known label will really be
6466 cheaper even though it looks more expensive. */
6467 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6468 src_folded
= src_const
, src_folded_cost
= -1;
6470 /* Terminate loop when replacement made. This must terminate since
6471 the current contents will be tested and will always be valid. */
6476 /* Skip invalid entries. */
6477 while (elt
&& GET_CODE (elt
->exp
) != REG
6478 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6479 elt
= elt
->next_same_value
;
6481 if (elt
) src_elt_cost
= elt
->cost
;
6483 /* Find cheapest and skip it for the next time. For items
6484 of equal cost, use this order:
6485 src_folded, src, src_eqv, src_related and hash table entry. */
6486 if (src_folded_cost
<= src_cost
6487 && src_folded_cost
<= src_eqv_cost
6488 && src_folded_cost
<= src_related_cost
6489 && src_folded_cost
<= src_elt_cost
)
6491 trial
= src_folded
, src_folded_cost
= 10000;
6492 if (src_folded_force_flag
)
6493 trial
= force_const_mem (mode
, trial
);
6495 else if (src_cost
<= src_eqv_cost
6496 && src_cost
<= src_related_cost
6497 && src_cost
<= src_elt_cost
)
6498 trial
= src
, src_cost
= 10000;
6499 else if (src_eqv_cost
<= src_related_cost
6500 && src_eqv_cost
<= src_elt_cost
)
6501 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6502 else if (src_related_cost
<= src_elt_cost
)
6503 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6506 trial
= copy_rtx (elt
->exp
);
6507 elt
= elt
->next_same_value
;
6508 src_elt_cost
= 10000;
6511 /* We don't normally have an insn matching (set (pc) (pc)), so
6512 check for this separately here. We will delete such an
6515 Tablejump insns contain a USE of the table, so simply replacing
6516 the operand with the constant won't match. This is simply an
6517 unconditional branch, however, and is therefore valid. Just
6518 insert the substitution here and we will delete and re-emit
6521 if (n_sets
== 1 && dest
== pc_rtx
6523 || (GET_CODE (trial
) == LABEL_REF
6524 && ! condjump_p (insn
))))
6526 /* If TRIAL is a label in front of a jump table, we are
6527 really falling through the switch (this is how casesi
6528 insns work), so we must branch around the table. */
6529 if (GET_CODE (trial
) == CODE_LABEL
6530 && NEXT_INSN (trial
) != 0
6531 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6532 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6533 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6535 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6537 SET_SRC (sets
[i
].rtl
) = trial
;
6538 cse_jumps_altered
= 1;
6542 /* Look for a substitution that makes a valid insn. */
6543 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6545 /* The result of apply_change_group can be ignored; see
6548 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6549 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6551 apply_change_group ();
6555 /* If we previously found constant pool entries for
6556 constants and this is a constant, try making a
6557 pool entry. Put it in src_folded unless we already have done
6558 this since that is where it likely came from. */
6560 else if (constant_pool_entries_cost
6561 && CONSTANT_P (trial
)
6562 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6563 && GET_MODE_CLASS (mode
) != MODE_CC
)
6565 src_folded_force_flag
= 1;
6567 src_folded_cost
= constant_pool_entries_cost
;
6571 src
= SET_SRC (sets
[i
].rtl
);
6573 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6574 However, there is an important exception: If both are registers
6575 that are not the head of their equivalence class, replace SET_SRC
6576 with the head of the class. If we do not do this, we will have
6577 both registers live over a portion of the basic block. This way,
6578 their lifetimes will likely abut instead of overlapping. */
6579 if (GET_CODE (dest
) == REG
6580 && REGNO_QTY_VALID_P (REGNO (dest
))
6581 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6582 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6583 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6584 /* Don't do this if the original insn had a hard reg as
6586 && (GET_CODE (sets
[i
].src
) != REG
6587 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6588 /* We can't call canon_reg here because it won't do anything if
6589 SRC is a hard register. */
6591 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6593 src
= SET_SRC (sets
[i
].rtl
)
6594 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6595 : gen_rtx (REG
, GET_MODE (src
), first
);
6597 /* If we had a constant that is cheaper than what we are now
6598 setting SRC to, use that constant. We ignored it when we
6599 thought we could make this into a no-op. */
6600 if (src_const
&& COST (src_const
) < COST (src
)
6601 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6605 /* If we made a change, recompute SRC values. */
6606 if (src
!= sets
[i
].src
)
6609 hash_arg_in_memory
= 0;
6610 hash_arg_in_struct
= 0;
6612 sets
[i
].src_hash
= HASH (src
, mode
);
6613 sets
[i
].src_volatile
= do_not_record
;
6614 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6615 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6616 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6619 /* If this is a single SET, we are setting a register, and we have an
6620 equivalent constant, we want to add a REG_NOTE. We don't want
6621 to write a REG_EQUAL note for a constant pseudo since verifying that
6622 that pseudo hasn't been eliminated is a pain. Such a note also
6623 won't help anything. */
6624 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6625 && GET_CODE (src_const
) != REG
)
6627 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6629 /* Record the actual constant value in a REG_EQUAL note, making
6630 a new one if one does not already exist. */
6632 XEXP (tem
, 0) = src_const
;
6634 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6635 src_const
, REG_NOTES (insn
));
6637 /* If storing a constant value in a register that
6638 previously held the constant value 0,
6639 record this fact with a REG_WAS_0 note on this insn.
6641 Note that the *register* is required to have previously held 0,
6642 not just any register in the quantity and we must point to the
6643 insn that set that register to zero.
6645 Rather than track each register individually, we just see if
6646 the last set for this quantity was for this register. */
6648 if (REGNO_QTY_VALID_P (REGNO (dest
))
6649 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6651 /* See if we previously had a REG_WAS_0 note. */
6652 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6653 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6655 if ((tem
= single_set (const_insn
)) != 0
6656 && rtx_equal_p (SET_DEST (tem
), dest
))
6659 XEXP (note
, 0) = const_insn
;
6661 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6662 const_insn
, REG_NOTES (insn
));
6667 /* Now deal with the destination. */
6669 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6671 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6672 to the MEM or REG within it. */
6673 while (GET_CODE (dest
) == SIGN_EXTRACT
6674 || GET_CODE (dest
) == ZERO_EXTRACT
6675 || GET_CODE (dest
) == SUBREG
6676 || GET_CODE (dest
) == STRICT_LOW_PART
)
6678 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6679 dest
= XEXP (dest
, 0);
6682 sets
[i
].inner_dest
= dest
;
6684 if (GET_CODE (dest
) == MEM
)
6686 dest
= fold_rtx (dest
, insn
);
6688 /* Decide whether we invalidate everything in memory,
6689 or just things at non-fixed places.
6690 Writing a large aggregate must invalidate everything
6691 because we don't know how long it is. */
6692 note_mem_written (dest
, &writes_memory
);
6695 /* Compute the hash code of the destination now,
6696 before the effects of this instruction are recorded,
6697 since the register values used in the address computation
6698 are those before this instruction. */
6699 sets
[i
].dest_hash
= HASH (dest
, mode
);
6701 /* Don't enter a bit-field in the hash table
6702 because the value in it after the store
6703 may not equal what was stored, due to truncation. */
6705 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6706 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6708 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6710 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6711 && GET_CODE (width
) == CONST_INT
6712 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6713 && ! (INTVAL (src_const
)
6714 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6715 /* Exception: if the value is constant,
6716 and it won't be truncated, record it. */
6720 /* This is chosen so that the destination will be invalidated
6721 but no new value will be recorded.
6722 We must invalidate because sometimes constant
6723 values can be recorded for bitfields. */
6724 sets
[i
].src_elt
= 0;
6725 sets
[i
].src_volatile
= 1;
6731 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6733 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6735 PUT_CODE (insn
, NOTE
);
6736 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6737 NOTE_SOURCE_FILE (insn
) = 0;
6738 cse_jumps_altered
= 1;
6739 /* One less use of the label this insn used to jump to. */
6740 --LABEL_NUSES (JUMP_LABEL (insn
));
6741 /* No more processing for this set. */
6745 /* If this SET is now setting PC to a label, we know it used to
6746 be a conditional or computed branch. So we see if we can follow
6747 it. If it was a computed branch, delete it and re-emit. */
6748 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6752 /* If this is not in the format for a simple branch and
6753 we are the only SET in it, re-emit it. */
6754 if (! simplejump_p (insn
) && n_sets
== 1)
6756 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6757 JUMP_LABEL (new) = XEXP (src
, 0);
6758 LABEL_NUSES (XEXP (src
, 0))++;
6763 /* Otherwise, force rerecognition, since it probably had
6764 a different pattern before.
6765 This shouldn't really be necessary, since whatever
6766 changed the source value above should have done this.
6767 Until the right place is found, might as well do this here. */
6768 INSN_CODE (insn
) = -1;
6770 /* Now that we've converted this jump to an unconditional jump,
6771 there is dead code after it. Delete the dead code until we
6772 reach a BARRIER, the end of the function, or a label. Do
6773 not delete NOTEs except for NOTE_INSN_DELETED since later
6774 phases assume these notes are retained. */
6778 while (NEXT_INSN (p
) != 0
6779 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6780 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6782 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6783 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6784 delete_insn (NEXT_INSN (p
));
6789 /* If we don't have a BARRIER immediately after INSN, put one there.
6790 Much code assumes that there are no NOTEs between a JUMP_INSN and
6793 if (NEXT_INSN (insn
) == 0
6794 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6795 emit_barrier_after (insn
);
6797 /* We might have two BARRIERs separated by notes. Delete the second
6800 if (p
!= insn
&& NEXT_INSN (p
) != 0
6801 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6802 delete_insn (NEXT_INSN (p
));
6804 cse_jumps_altered
= 1;
6808 /* If destination is volatile, invalidate it and then do no further
6809 processing for this assignment. */
6811 else if (do_not_record
)
6813 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6814 || GET_CODE (dest
) == MEM
)
6816 else if (GET_CODE (dest
) == STRICT_LOW_PART
6817 || GET_CODE (dest
) == ZERO_EXTRACT
)
6818 invalidate (XEXP (dest
, 0));
6822 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6823 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6826 /* If setting CC0, record what it was set to, or a constant, if it
6827 is equivalent to a constant. If it is being set to a floating-point
6828 value, make a COMPARE with the appropriate constant of 0. If we
6829 don't do this, later code can interpret this as a test against
6830 const0_rtx, which can cause problems if we try to put it into an
6831 insn as a floating-point operand. */
6832 if (dest
== cc0_rtx
)
6834 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6835 this_insn_cc0_mode
= mode
;
6836 if (FLOAT_MODE_P (mode
))
6837 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6843 /* Now enter all non-volatile source expressions in the hash table
6844 if they are not already present.
6845 Record their equivalence classes in src_elt.
6846 This way we can insert the corresponding destinations into
6847 the same classes even if the actual sources are no longer in them
6848 (having been invalidated). */
6850 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6851 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6853 register struct table_elt
*elt
;
6854 register struct table_elt
*classp
= sets
[0].src_elt
;
6855 rtx dest
= SET_DEST (sets
[0].rtl
);
6856 enum machine_mode eqvmode
= GET_MODE (dest
);
6858 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6860 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6863 if (insert_regs (src_eqv
, classp
, 0))
6864 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6865 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
6866 elt
->in_memory
= src_eqv_in_memory
;
6867 elt
->in_struct
= src_eqv_in_struct
;
6870 /* Check to see if src_eqv_elt is the same as a set source which
6871 does not yet have an elt, and if so set the elt of the set source
6873 for (i
= 0; i
< n_sets
; i
++)
6874 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
6875 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
6876 sets
[i
].src_elt
= src_eqv_elt
;
6879 for (i
= 0; i
< n_sets
; i
++)
6880 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6881 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6883 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6885 /* REG_EQUAL in setting a STRICT_LOW_PART
6886 gives an equivalent for the entire destination register,
6887 not just for the subreg being stored in now.
6888 This is a more interesting equivalence, so we arrange later
6889 to treat the entire reg as the destination. */
6890 sets
[i
].src_elt
= src_eqv_elt
;
6891 sets
[i
].src_hash
= src_eqv_hash
;
6895 /* Insert source and constant equivalent into hash table, if not
6897 register struct table_elt
*classp
= src_eqv_elt
;
6898 register rtx src
= sets
[i
].src
;
6899 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6900 enum machine_mode mode
6901 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6903 if (sets
[i
].src_elt
== 0)
6905 register struct table_elt
*elt
;
6907 /* Note that these insert_regs calls cannot remove
6908 any of the src_elt's, because they would have failed to
6909 match if not still valid. */
6910 if (insert_regs (src
, classp
, 0))
6911 sets
[i
].src_hash
= HASH (src
, mode
);
6912 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
6913 elt
->in_memory
= sets
[i
].src_in_memory
;
6914 elt
->in_struct
= sets
[i
].src_in_struct
;
6915 sets
[i
].src_elt
= classp
= elt
;
6918 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6919 && src
!= sets
[i
].src_const
6920 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6921 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6922 sets
[i
].src_const_hash
, mode
);
6925 else if (sets
[i
].src_elt
== 0)
6926 /* If we did not insert the source into the hash table (e.g., it was
6927 volatile), note the equivalence class for the REG_EQUAL value, if any,
6928 so that the destination goes into that class. */
6929 sets
[i
].src_elt
= src_eqv_elt
;
6931 invalidate_from_clobbers (&writes_memory
, x
);
6933 /* Some registers are invalidated by subroutine calls. Memory is
6934 invalidated by non-constant calls. */
6936 if (GET_CODE (insn
) == CALL_INSN
)
6938 static struct write_data everything
= {0, 1, 1, 1};
6940 if (! CONST_CALL_P (insn
))
6941 invalidate_memory (&everything
);
6942 invalidate_for_call ();
6945 /* Now invalidate everything set by this instruction.
6946 If a SUBREG or other funny destination is being set,
6947 sets[i].rtl is still nonzero, so here we invalidate the reg
6948 a part of which is being set. */
6950 for (i
= 0; i
< n_sets
; i
++)
6953 register rtx dest
= sets
[i
].inner_dest
;
6955 /* Needed for registers to remove the register from its
6956 previous quantity's chain.
6957 Needed for memory if this is a nonvarying address, unless
6958 we have just done an invalidate_memory that covers even those. */
6959 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6960 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6962 else if (GET_CODE (dest
) == STRICT_LOW_PART
6963 || GET_CODE (dest
) == ZERO_EXTRACT
)
6964 invalidate (XEXP (dest
, 0));
6967 /* Make sure registers mentioned in destinations
6968 are safe for use in an expression to be inserted.
6969 This removes from the hash table
6970 any invalid entry that refers to one of these registers.
6972 We don't care about the return value from mention_regs because
6973 we are going to hash the SET_DEST values unconditionally. */
6975 for (i
= 0; i
< n_sets
; i
++)
6976 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
6977 mention_regs (SET_DEST (sets
[i
].rtl
));
6979 /* We may have just removed some of the src_elt's from the hash table.
6980 So replace each one with the current head of the same class. */
6982 for (i
= 0; i
< n_sets
; i
++)
6985 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6986 /* If elt was removed, find current head of same class,
6987 or 0 if nothing remains of that class. */
6989 register struct table_elt
*elt
= sets
[i
].src_elt
;
6991 while (elt
&& elt
->prev_same_value
)
6992 elt
= elt
->prev_same_value
;
6994 while (elt
&& elt
->first_same_value
== 0)
6995 elt
= elt
->next_same_value
;
6996 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7000 /* Now insert the destinations into their equivalence classes. */
7002 for (i
= 0; i
< n_sets
; i
++)
7005 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7006 register struct table_elt
*elt
;
7008 /* Don't record value if we are not supposed to risk allocating
7009 floating-point values in registers that might be wider than
7011 if ((flag_float_store
7012 && GET_CODE (dest
) == MEM
7013 && FLOAT_MODE_P (GET_MODE (dest
)))
7014 /* Don't record values of destinations set inside a libcall block
7015 since we might delete the libcall. Things should have been set
7016 up so we won't want to reuse such a value, but we play it safe
7019 /* If we didn't put a REG_EQUAL value or a source into the hash
7020 table, there is no point is recording DEST. */
7021 || sets
[i
].src_elt
== 0)
7024 /* STRICT_LOW_PART isn't part of the value BEING set,
7025 and neither is the SUBREG inside it.
7026 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7027 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7028 dest
= SUBREG_REG (XEXP (dest
, 0));
7030 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7031 /* Registers must also be inserted into chains for quantities. */
7032 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7033 /* If `insert_regs' changes something, the hash code must be
7035 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7037 elt
= insert (dest
, sets
[i
].src_elt
,
7038 sets
[i
].dest_hash
, GET_MODE (dest
));
7039 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
7042 /* This implicitly assumes a whole struct
7043 need not have MEM_IN_STRUCT_P.
7044 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7045 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7046 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7049 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7050 narrower than M2, and both M1 and M2 are the same number of words,
7051 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7052 make that equivalence as well.
7054 However, BAR may have equivalences for which gen_lowpart_if_possible
7055 will produce a simpler value than gen_lowpart_if_possible applied to
7056 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7057 BAR's equivalences. If we don't get a simplified form, make
7058 the SUBREG. It will not be used in an equivalence, but will
7059 cause two similar assignments to be detected.
7061 Note the loop below will find SUBREG_REG (DEST) since we have
7062 already entered SRC and DEST of the SET in the table. */
7064 if (GET_CODE (dest
) == SUBREG
7065 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
7066 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
7067 && (GET_MODE_SIZE (GET_MODE (dest
))
7068 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7069 && sets
[i
].src_elt
!= 0)
7071 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7072 struct table_elt
*elt
, *classp
= 0;
7074 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7075 elt
= elt
->next_same_value
)
7079 struct table_elt
*src_elt
;
7081 /* Ignore invalid entries. */
7082 if (GET_CODE (elt
->exp
) != REG
7083 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7086 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7088 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
7090 src_hash
= HASH (new_src
, new_mode
);
7091 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7093 /* Put the new source in the hash table is if isn't
7097 if (insert_regs (new_src
, classp
, 0))
7098 src_hash
= HASH (new_src
, new_mode
);
7099 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7100 src_elt
->in_memory
= elt
->in_memory
;
7101 src_elt
->in_struct
= elt
->in_struct
;
7103 else if (classp
&& classp
!= src_elt
->first_same_value
)
7104 /* Show that two things that we've seen before are
7105 actually the same. */
7106 merge_equiv_classes (src_elt
, classp
);
7108 classp
= src_elt
->first_same_value
;
7113 /* Special handling for (set REG0 REG1)
7114 where REG0 is the "cheapest", cheaper than REG1.
7115 After cse, REG1 will probably not be used in the sequel,
7116 so (if easily done) change this insn to (set REG1 REG0) and
7117 replace REG1 with REG0 in the previous insn that computed their value.
7118 Then REG1 will become a dead store and won't cloud the situation
7119 for later optimizations.
7121 Do not make this change if REG1 is a hard register, because it will
7122 then be used in the sequel and we may be changing a two-operand insn
7123 into a three-operand insn.
7125 Also do not do this if we are operating on a copy of INSN. */
7127 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7128 && NEXT_INSN (PREV_INSN (insn
)) == insn
7129 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7130 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7131 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7132 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7133 == REGNO (SET_DEST (sets
[0].rtl
))))
7135 rtx prev
= PREV_INSN (insn
);
7136 while (prev
&& GET_CODE (prev
) == NOTE
)
7137 prev
= PREV_INSN (prev
);
7139 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7140 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7142 rtx dest
= SET_DEST (sets
[0].rtl
);
7143 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7145 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7146 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7147 SET_SRC (sets
[0].rtl
), 1);
7148 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7149 apply_change_group ();
7151 /* If REG1 was equivalent to a constant, REG0 is not. */
7153 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7155 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7156 any REG_WAS_0 note on INSN to PREV. */
7157 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7159 remove_note (prev
, note
);
7161 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7164 remove_note (insn
, note
);
7165 XEXP (note
, 1) = REG_NOTES (prev
);
7166 REG_NOTES (prev
) = note
;
7171 /* If this is a conditional jump insn, record any known equivalences due to
7172 the condition being tested. */
7174 last_jump_equiv_class
= 0;
7175 if (GET_CODE (insn
) == JUMP_INSN
7176 && n_sets
== 1 && GET_CODE (x
) == SET
7177 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7178 record_jump_equiv (insn
, 0);
7181 /* If the previous insn set CC0 and this insn no longer references CC0,
7182 delete the previous insn. Here we use the fact that nothing expects CC0
7183 to be valid over an insn, which is true until the final pass. */
7184 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7185 && (tem
= single_set (prev_insn
)) != 0
7186 && SET_DEST (tem
) == cc0_rtx
7187 && ! reg_mentioned_p (cc0_rtx
, x
))
7189 PUT_CODE (prev_insn
, NOTE
);
7190 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7191 NOTE_SOURCE_FILE (prev_insn
) = 0;
7194 prev_insn_cc0
= this_insn_cc0
;
7195 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7201 /* Store 1 in *WRITES_PTR for those categories of memory ref
7202 that must be invalidated when the expression WRITTEN is stored in.
7203 If WRITTEN is null, say everything must be invalidated. */
7206 note_mem_written (written
, writes_ptr
)
7208 struct write_data
*writes_ptr
;
7210 static struct write_data everything
= {0, 1, 1, 1};
7213 *writes_ptr
= everything
;
7214 else if (GET_CODE (written
) == MEM
)
7216 /* Pushing or popping the stack invalidates just the stack pointer. */
7217 rtx addr
= XEXP (written
, 0);
7218 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7219 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7220 && GET_CODE (XEXP (addr
, 0)) == REG
7221 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7226 else if (GET_MODE (written
) == BLKmode
)
7227 *writes_ptr
= everything
;
7228 /* (mem (scratch)) means clobber everything. */
7229 else if (GET_CODE (addr
) == SCRATCH
)
7230 *writes_ptr
= everything
;
7231 else if (cse_rtx_addr_varies_p (written
))
7233 /* A varying address that is a sum indicates an array element,
7234 and that's just as good as a structure element
7235 in implying that we need not invalidate scalar variables.
7236 However, we must allow QImode aliasing of scalars, because the
7237 ANSI C standard allows character pointers to alias anything. */
7238 if (! ((MEM_IN_STRUCT_P (written
)
7239 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7240 && GET_MODE (written
) != QImode
))
7241 writes_ptr
->all
= 1;
7242 writes_ptr
->nonscalar
= 1;
7244 writes_ptr
->var
= 1;
7248 /* Perform invalidation on the basis of everything about an insn
7249 except for invalidating the actual places that are SET in it.
7250 This includes the places CLOBBERed, and anything that might
7251 alias with something that is SET or CLOBBERed.
7253 W points to the writes_memory for this insn, a struct write_data
7254 saying which kinds of memory references must be invalidated.
7255 X is the pattern of the insn. */
7258 invalidate_from_clobbers (w
, x
)
7259 struct write_data
*w
;
7262 /* If W->var is not set, W specifies no action.
7263 If W->all is set, this step gets all memory refs
7264 so they can be ignored in the rest of this function. */
7266 invalidate_memory (w
);
7270 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7271 reg_tick
[STACK_POINTER_REGNUM
]++;
7273 /* This should be *very* rare. */
7274 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7275 invalidate (stack_pointer_rtx
);
7278 if (GET_CODE (x
) == CLOBBER
)
7280 rtx ref
= XEXP (x
, 0);
7283 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7284 || (GET_CODE (ref
) == MEM
&& ! w
->all
))
7286 else if (GET_CODE (ref
) == STRICT_LOW_PART
7287 || GET_CODE (ref
) == ZERO_EXTRACT
)
7288 invalidate (XEXP (ref
, 0));
7291 else if (GET_CODE (x
) == PARALLEL
)
7294 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7296 register rtx y
= XVECEXP (x
, 0, i
);
7297 if (GET_CODE (y
) == CLOBBER
)
7299 rtx ref
= XEXP (y
, 0);
7302 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7303 || (GET_CODE (ref
) == MEM
&& !w
->all
))
7305 else if (GET_CODE (ref
) == STRICT_LOW_PART
7306 || GET_CODE (ref
) == ZERO_EXTRACT
)
7307 invalidate (XEXP (ref
, 0));
7314 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7315 and replace any registers in them with either an equivalent constant
7316 or the canonical form of the register. If we are inside an address,
7317 only do this if the address remains valid.
7319 OBJECT is 0 except when within a MEM in which case it is the MEM.
7321 Return the replacement for X. */
7324 cse_process_notes (x
, object
)
7328 enum rtx_code code
= GET_CODE (x
);
7329 char *fmt
= GET_RTX_FORMAT (code
);
7345 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7350 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7351 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7353 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7359 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7360 /* We don't substitute VOIDmode constants into these rtx,
7361 since they would impede folding. */
7362 if (GET_MODE (new) != VOIDmode
)
7363 validate_change (object
, &XEXP (x
, 0), new, 0);
7368 i
= reg_qty
[REGNO (x
)];
7370 /* Return a constant or a constant register. */
7371 if (REGNO_QTY_VALID_P (REGNO (x
))
7372 && qty_const
[i
] != 0
7373 && (CONSTANT_P (qty_const
[i
])
7374 || GET_CODE (qty_const
[i
]) == REG
))
7376 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7381 /* Otherwise, canonicalize this register. */
7382 return canon_reg (x
, NULL_RTX
);
7385 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7387 validate_change (object
, &XEXP (x
, i
),
7388 cse_process_notes (XEXP (x
, i
), object
), 0);
7393 /* Find common subexpressions between the end test of a loop and the beginning
7394 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7396 Often we have a loop where an expression in the exit test is used
7397 in the body of the loop. For example "while (*p) *q++ = *p++;".
7398 Because of the way we duplicate the loop exit test in front of the loop,
7399 however, we don't detect that common subexpression. This will be caught
7400 when global cse is implemented, but this is a quite common case.
7402 This function handles the most common cases of these common expressions.
7403 It is called after we have processed the basic block ending with the
7404 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7405 jumps to a label used only once. */
7408 cse_around_loop (loop_start
)
7413 struct table_elt
*p
;
7415 /* If the jump at the end of the loop doesn't go to the start, we don't
7417 for (insn
= PREV_INSN (loop_start
);
7418 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7419 insn
= PREV_INSN (insn
))
7423 || GET_CODE (insn
) != NOTE
7424 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7427 /* If the last insn of the loop (the end test) was an NE comparison,
7428 we will interpret it as an EQ comparison, since we fell through
7429 the loop. Any equivalences resulting from that comparison are
7430 therefore not valid and must be invalidated. */
7431 if (last_jump_equiv_class
)
7432 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7433 p
= p
->next_same_value
)
7434 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7435 || GET_CODE (p
->exp
) == SUBREG
)
7436 invalidate (p
->exp
);
7437 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7438 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7439 invalidate (XEXP (p
->exp
, 0));
7441 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7442 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7444 The only thing we do with SET_DEST is invalidate entries, so we
7445 can safely process each SET in order. It is slightly less efficient
7446 to do so, but we only want to handle the most common cases. */
7448 for (insn
= NEXT_INSN (loop_start
);
7449 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7450 && ! (GET_CODE (insn
) == NOTE
7451 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7452 insn
= NEXT_INSN (insn
))
7454 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7455 && (GET_CODE (PATTERN (insn
)) == SET
7456 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7457 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7458 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7459 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7460 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7461 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7462 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7463 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7468 /* Variable used for communications between the next two routines. */
7470 static struct write_data skipped_writes_memory
;
7472 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7473 since they are done elsewhere. This function is called via note_stores. */
7476 invalidate_skipped_set (dest
, set
)
7480 if (GET_CODE (set
) == CLOBBER
7487 if (GET_CODE (dest
) == MEM
)
7488 note_mem_written (dest
, &skipped_writes_memory
);
7490 /* There are times when an address can appear varying and be a PLUS
7491 during this scan when it would be a fixed address were we to know
7492 the proper equivalences. So promote "nonscalar" to be "all". */
7493 if (skipped_writes_memory
.nonscalar
)
7494 skipped_writes_memory
.all
= 1;
7496 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7497 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7499 else if (GET_CODE (dest
) == STRICT_LOW_PART
7500 || GET_CODE (dest
) == ZERO_EXTRACT
)
7501 invalidate (XEXP (dest
, 0));
7504 /* Invalidate all insns from START up to the end of the function or the
7505 next label. This called when we wish to CSE around a block that is
7506 conditionally executed. */
7509 invalidate_skipped_block (start
)
7513 static struct write_data init
= {0, 0, 0, 0};
7514 static struct write_data everything
= {0, 1, 1, 1};
7516 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7517 insn
= NEXT_INSN (insn
))
7519 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7522 skipped_writes_memory
= init
;
7524 if (GET_CODE (insn
) == CALL_INSN
)
7526 invalidate_for_call ();
7527 skipped_writes_memory
= everything
;
7530 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7531 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7535 /* Used for communication between the following two routines; contains a
7536 value to be checked for modification. */
7538 static rtx cse_check_loop_start_value
;
7540 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7541 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7544 cse_check_loop_start (x
, set
)
7548 if (cse_check_loop_start_value
== 0
7549 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7552 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7553 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7554 cse_check_loop_start_value
= 0;
7557 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7558 a loop that starts with the label at LOOP_START.
7560 If X is a SET, we see if its SET_SRC is currently in our hash table.
7561 If so, we see if it has a value equal to some register used only in the
7562 loop exit code (as marked by jump.c).
7564 If those two conditions are true, we search backwards from the start of
7565 the loop to see if that same value was loaded into a register that still
7566 retains its value at the start of the loop.
7568 If so, we insert an insn after the load to copy the destination of that
7569 load into the equivalent register and (try to) replace our SET_SRC with that
7572 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7575 cse_set_around_loop (x
, insn
, loop_start
)
7580 struct table_elt
*src_elt
;
7581 static struct write_data init
= {0, 0, 0, 0};
7582 struct write_data writes_memory
;
7584 writes_memory
= init
;
7586 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7587 are setting PC or CC0 or whose SET_SRC is already a register. */
7588 if (GET_CODE (x
) == SET
7589 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7590 && GET_CODE (SET_SRC (x
)) != REG
)
7592 src_elt
= lookup (SET_SRC (x
),
7593 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7594 GET_MODE (SET_DEST (x
)));
7597 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7598 src_elt
= src_elt
->next_same_value
)
7599 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7600 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7604 /* Look for an insn in front of LOOP_START that sets
7605 something in the desired mode to SET_SRC (x) before we hit
7606 a label or CALL_INSN. */
7608 for (p
= prev_nonnote_insn (loop_start
);
7609 p
&& GET_CODE (p
) != CALL_INSN
7610 && GET_CODE (p
) != CODE_LABEL
;
7611 p
= prev_nonnote_insn (p
))
7612 if ((set
= single_set (p
)) != 0
7613 && GET_CODE (SET_DEST (set
)) == REG
7614 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7615 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7617 /* We now have to ensure that nothing between P
7618 and LOOP_START modified anything referenced in
7619 SET_SRC (x). We know that nothing within the loop
7620 can modify it, or we would have invalidated it in
7624 cse_check_loop_start_value
= SET_SRC (x
);
7625 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7626 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7627 note_stores (PATTERN (q
), cse_check_loop_start
);
7629 /* If nothing was changed and we can replace our
7630 SET_SRC, add an insn after P to copy its destination
7631 to what we will be replacing SET_SRC with. */
7632 if (cse_check_loop_start_value
7633 && validate_change (insn
, &SET_SRC (x
),
7635 emit_insn_after (gen_move_insn (src_elt
->exp
,
7643 /* Now invalidate anything modified by X. */
7644 note_mem_written (SET_DEST (x
), &writes_memory
);
7646 if (writes_memory
.var
)
7647 invalidate_memory (&writes_memory
);
7649 /* See comment on similar code in cse_insn for explanation of these tests. */
7650 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7651 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7652 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7653 invalidate (SET_DEST (x
));
7654 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
7655 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
7656 invalidate (XEXP (SET_DEST (x
), 0));
7659 /* Find the end of INSN's basic block and return its range,
7660 the total number of SETs in all the insns of the block, the last insn of the
7661 block, and the branch path.
7663 The branch path indicates which branches should be followed. If a non-zero
7664 path size is specified, the block should be rescanned and a different set
7665 of branches will be taken. The branch path is only used if
7666 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7668 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7669 used to describe the block. It is filled in with the information about
7670 the current block. The incoming structure's branch path, if any, is used
7671 to construct the output branch path. */
7674 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7676 struct cse_basic_block_data
*data
;
7683 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7684 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7685 int path_size
= data
->path_size
;
7689 /* Update the previous branch path, if any. If the last branch was
7690 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7691 shorten the path by one and look at the previous branch. We know that
7692 at least one branch must have been taken if PATH_SIZE is non-zero. */
7693 while (path_size
> 0)
7695 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7697 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7704 /* Scan to end of this basic block. */
7705 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7707 /* Don't cse out the end of a loop. This makes a difference
7708 only for the unusual loops that always execute at least once;
7709 all other loops have labels there so we will stop in any case.
7710 Cse'ing out the end of the loop is dangerous because it
7711 might cause an invariant expression inside the loop
7712 to be reused after the end of the loop. This would make it
7713 hard to move the expression out of the loop in loop.c,
7714 especially if it is one of several equivalent expressions
7715 and loop.c would like to eliminate it.
7717 If we are running after loop.c has finished, we can ignore
7718 the NOTE_INSN_LOOP_END. */
7720 if (! after_loop
&& GET_CODE (p
) == NOTE
7721 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7724 /* Don't cse over a call to setjmp; on some machines (eg vax)
7725 the regs restored by the longjmp come from
7726 a later time than the setjmp. */
7727 if (GET_CODE (p
) == NOTE
7728 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7731 /* A PARALLEL can have lots of SETs in it,
7732 especially if it is really an ASM_OPERANDS. */
7733 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7734 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7735 nsets
+= XVECLEN (PATTERN (p
), 0);
7736 else if (GET_CODE (p
) != NOTE
)
7739 /* Ignore insns made by CSE; they cannot affect the boundaries of
7742 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
7743 high_cuid
= INSN_CUID (p
);
7744 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
7745 low_cuid
= INSN_CUID (p
);
7747 /* See if this insn is in our branch path. If it is and we are to
7749 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7751 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7754 /* Point to next entry in path, if any. */
7758 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7759 was specified, we haven't reached our maximum path length, there are
7760 insns following the target of the jump, this is the only use of the
7761 jump label, and the target label is preceded by a BARRIER.
7763 Alternatively, we can follow the jump if it branches around a
7764 block of code and there are no other branches into the block.
7765 In this case invalidate_skipped_block will be called to invalidate any
7766 registers set in the block when following the jump. */
7768 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7769 && GET_CODE (p
) == JUMP_INSN
7770 && GET_CODE (PATTERN (p
)) == SET
7771 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7772 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7773 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7775 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7776 if ((GET_CODE (q
) != NOTE
7777 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7778 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7779 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7782 /* If we ran into a BARRIER, this code is an extension of the
7783 basic block when the branch is taken. */
7784 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7786 /* Don't allow ourself to keep walking around an
7787 always-executed loop. */
7788 if (next_real_insn (q
) == next
)
7794 /* Similarly, don't put a branch in our path more than once. */
7795 for (i
= 0; i
< path_entry
; i
++)
7796 if (data
->path
[i
].branch
== p
)
7799 if (i
!= path_entry
)
7802 data
->path
[path_entry
].branch
= p
;
7803 data
->path
[path_entry
++].status
= TAKEN
;
7805 /* This branch now ends our path. It was possible that we
7806 didn't see this branch the last time around (when the
7807 insn in front of the target was a JUMP_INSN that was
7808 turned into a no-op). */
7809 path_size
= path_entry
;
7812 /* Mark block so we won't scan it again later. */
7813 PUT_MODE (NEXT_INSN (p
), QImode
);
7815 /* Detect a branch around a block of code. */
7816 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7820 if (next_real_insn (q
) == next
)
7826 for (i
= 0; i
< path_entry
; i
++)
7827 if (data
->path
[i
].branch
== p
)
7830 if (i
!= path_entry
)
7833 /* This is no_labels_between_p (p, q) with an added check for
7834 reaching the end of a function (in case Q precedes P). */
7835 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7836 if (GET_CODE (tmp
) == CODE_LABEL
)
7841 data
->path
[path_entry
].branch
= p
;
7842 data
->path
[path_entry
++].status
= AROUND
;
7844 path_size
= path_entry
;
7847 /* Mark block so we won't scan it again later. */
7848 PUT_MODE (NEXT_INSN (p
), QImode
);
7855 data
->low_cuid
= low_cuid
;
7856 data
->high_cuid
= high_cuid
;
7857 data
->nsets
= nsets
;
7860 /* If all jumps in the path are not taken, set our path length to zero
7861 so a rescan won't be done. */
7862 for (i
= path_size
- 1; i
>= 0; i
--)
7863 if (data
->path
[i
].status
!= NOT_TAKEN
)
7867 data
->path_size
= 0;
7869 data
->path_size
= path_size
;
7871 /* End the current branch path. */
7872 data
->path
[path_size
].branch
= 0;
7875 /* Perform cse on the instructions of a function.
7876 F is the first instruction.
7877 NREGS is one plus the highest pseudo-reg number used in the instruction.
7879 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7880 (only if -frerun-cse-after-loop).
7882 Returns 1 if jump_optimize should be redone due to simplifications
7883 in conditional jump instructions. */
7886 cse_main (f
, nregs
, after_loop
, file
)
7892 struct cse_basic_block_data val
;
7893 register rtx insn
= f
;
7896 cse_jumps_altered
= 0;
7897 constant_pool_entries_cost
= 0;
7904 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7905 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7907 for (i
= 0; i
< nregs
; i
++)
7909 all_minus_one
[i
] = -1;
7913 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7914 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7915 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7916 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7917 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7919 /* Discard all the free elements of the previous function
7920 since they are allocated in the temporarily obstack. */
7921 bzero (table
, sizeof table
);
7922 free_element_chain
= 0;
7923 n_elements_made
= 0;
7925 /* Find the largest uid. */
7927 max_uid
= get_max_uid ();
7928 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
7929 bzero (uid_cuid
, (max_uid
+ 1) * sizeof (int));
7931 /* Compute the mapping from uids to cuids.
7932 CUIDs are numbers assigned to insns, like uids,
7933 except that cuids increase monotonically through the code.
7934 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7935 between two insns is not affected by -g. */
7937 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7939 if (GET_CODE (insn
) != NOTE
7940 || NOTE_LINE_NUMBER (insn
) < 0)
7941 INSN_CUID (insn
) = ++i
;
7943 /* Give a line number note the same cuid as preceding insn. */
7944 INSN_CUID (insn
) = i
;
7947 /* Initialize which registers are clobbered by calls. */
7949 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
7951 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
7952 if ((call_used_regs
[i
]
7953 /* Used to check !fixed_regs[i] here, but that isn't safe;
7954 fixed regs are still call-clobbered, and sched can get
7955 confused if they can "live across calls".
7957 The frame pointer is always preserved across calls. The arg
7958 pointer is if it is fixed. The stack pointer usually is, unless
7959 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7960 will be present. If we are generating PIC code, the PIC offset
7961 table register is preserved across calls. */
7963 && i
!= STACK_POINTER_REGNUM
7964 && i
!= FRAME_POINTER_REGNUM
7965 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
7966 && i
!= HARD_FRAME_POINTER_REGNUM
7968 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7969 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
7971 #ifdef PIC_OFFSET_TABLE_REGNUM
7972 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
7976 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
7978 /* Loop over basic blocks.
7979 Compute the maximum number of qty's needed for each basic block
7980 (which is 2 for each SET). */
7984 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7985 flag_cse_skip_blocks
);
7987 /* If this basic block was already processed or has no sets, skip it. */
7988 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7990 PUT_MODE (insn
, VOIDmode
);
7991 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7996 cse_basic_block_start
= val
.low_cuid
;
7997 cse_basic_block_end
= val
.high_cuid
;
7998 max_qty
= val
.nsets
* 2;
8001 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8002 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8005 /* Make MAX_QTY bigger to give us room to optimize
8006 past the end of this basic block, if that should prove useful. */
8012 /* If this basic block is being extended by following certain jumps,
8013 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8014 Otherwise, we start after this basic block. */
8015 if (val
.path_size
> 0)
8016 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8019 int old_cse_jumps_altered
= cse_jumps_altered
;
8022 /* When cse changes a conditional jump to an unconditional
8023 jump, we want to reprocess the block, since it will give
8024 us a new branch path to investigate. */
8025 cse_jumps_altered
= 0;
8026 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8027 if (cse_jumps_altered
== 0
8028 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8031 cse_jumps_altered
|= old_cse_jumps_altered
;
8039 /* Tell refers_to_mem_p that qty_const info is not available. */
8042 if (max_elements_made
< n_elements_made
)
8043 max_elements_made
= n_elements_made
;
8045 return cse_jumps_altered
;
8048 /* Process a single basic block. FROM and TO and the limits of the basic
8049 block. NEXT_BRANCH points to the branch path when following jumps or
8050 a null path when not following jumps.
8052 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8053 loop. This is true when we are being called for the last time on a
8054 block and this CSE pass is before loop.c. */
8057 cse_basic_block (from
, to
, next_branch
, around_loop
)
8058 register rtx from
, to
;
8059 struct branch_path
*next_branch
;
8064 int in_libcall_block
= 0;
8066 /* Each of these arrays is undefined before max_reg, so only allocate
8067 the space actually needed and adjust the start below. */
8069 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8070 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8071 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8072 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8073 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8075 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8076 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8077 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8079 qty_first_reg
-= max_reg
;
8080 qty_last_reg
-= max_reg
;
8081 qty_mode
-= max_reg
;
8082 qty_const
-= max_reg
;
8083 qty_const_insn
-= max_reg
;
8084 qty_comparison_code
-= max_reg
;
8085 qty_comparison_qty
-= max_reg
;
8086 qty_comparison_const
-= max_reg
;
8090 /* TO might be a label. If so, protect it from being deleted. */
8091 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8094 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8096 register enum rtx_code code
;
8098 /* See if this is a branch that is part of the path. If so, and it is
8099 to be taken, do so. */
8100 if (next_branch
->branch
== insn
)
8102 enum taken status
= next_branch
++->status
;
8103 if (status
!= NOT_TAKEN
)
8105 if (status
== TAKEN
)
8106 record_jump_equiv (insn
, 1);
8108 invalidate_skipped_block (NEXT_INSN (insn
));
8110 /* Set the last insn as the jump insn; it doesn't affect cc0.
8111 Then follow this branch. */
8116 insn
= JUMP_LABEL (insn
);
8121 code
= GET_CODE (insn
);
8122 if (GET_MODE (insn
) == QImode
)
8123 PUT_MODE (insn
, VOIDmode
);
8125 if (GET_RTX_CLASS (code
) == 'i')
8127 /* Process notes first so we have all notes in canonical forms when
8128 looking for duplicate operations. */
8130 if (REG_NOTES (insn
))
8131 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8133 /* Track when we are inside in LIBCALL block. Inside such a block,
8134 we do not want to record destinations. The last insn of a
8135 LIBCALL block is not considered to be part of the block, since
8136 its destination is the result of the block and hence should be
8139 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8140 in_libcall_block
= 1;
8141 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8142 in_libcall_block
= 0;
8144 cse_insn (insn
, in_libcall_block
);
8147 /* If INSN is now an unconditional jump, skip to the end of our
8148 basic block by pretending that we just did the last insn in the
8149 basic block. If we are jumping to the end of our block, show
8150 that we can have one usage of TO. */
8152 if (simplejump_p (insn
))
8157 if (JUMP_LABEL (insn
) == to
)
8160 /* Maybe TO was deleted because the jump is unconditional.
8161 If so, there is nothing left in this basic block. */
8162 /* ??? Perhaps it would be smarter to set TO
8163 to whatever follows this insn,
8164 and pretend the basic block had always ended here. */
8165 if (INSN_DELETED_P (to
))
8168 insn
= PREV_INSN (to
);
8171 /* See if it is ok to keep on going past the label
8172 which used to end our basic block. Remember that we incremented
8173 the count of that label, so we decrement it here. If we made
8174 a jump unconditional, TO_USAGE will be one; in that case, we don't
8175 want to count the use in that jump. */
8177 if (to
!= 0 && NEXT_INSN (insn
) == to
8178 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8180 struct cse_basic_block_data val
;
8182 insn
= NEXT_INSN (to
);
8184 if (LABEL_NUSES (to
) == 0)
8187 /* Find the end of the following block. Note that we won't be
8188 following branches in this case. If TO was the last insn
8189 in the function, we are done. Similarly, if we deleted the
8190 insn after TO, it must have been because it was preceded by
8191 a BARRIER. In that case, we are done with this block because it
8192 has no continuation. */
8194 if (insn
== 0 || INSN_DELETED_P (insn
))
8199 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8201 /* If the tables we allocated have enough space left
8202 to handle all the SETs in the next basic block,
8203 continue through it. Otherwise, return,
8204 and that block will be scanned individually. */
8205 if (val
.nsets
* 2 + next_qty
> max_qty
)
8208 cse_basic_block_start
= val
.low_cuid
;
8209 cse_basic_block_end
= val
.high_cuid
;
8212 /* Prevent TO from being deleted if it is a label. */
8213 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8216 /* Back up so we process the first insn in the extension. */
8217 insn
= PREV_INSN (insn
);
8221 if (next_qty
> max_qty
)
8224 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8225 the previous insn is the only insn that branches to the head of a loop,
8226 we can cse into the loop. Don't do this if we changed the jump
8227 structure of a loop unless we aren't going to be following jumps. */
8229 if ((cse_jumps_altered
== 0
8230 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8231 && around_loop
&& to
!= 0
8232 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8233 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8234 && JUMP_LABEL (PREV_INSN (to
)) != 0
8235 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8236 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8238 return to
? NEXT_INSN (to
) : 0;
8241 /* Count the number of times registers are used (not set) in X.
8242 COUNTS is an array in which we accumulate the count, INCR is how much
8243 we count each register usage.
8245 Don't count a usage of DEST, which is the SET_DEST of a SET which
8246 contains X in its SET_SRC. This is because such a SET does not
8247 modify the liveness of DEST. */
8250 count_reg_usage (x
, counts
, dest
, incr
)
8256 enum rtx_code code
= GET_CODE (x
);
8264 counts
[REGNO (x
)] += incr
;
8278 /* Unless we are setting a REG, count everything in SET_DEST. */
8279 if (GET_CODE (SET_DEST (x
)) != REG
)
8280 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8281 count_reg_usage (SET_SRC (x
), counts
, SET_DEST (x
), incr
);
8287 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8289 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8293 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8298 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
8299 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8301 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8305 fmt
= GET_RTX_FORMAT (code
);
8306 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8309 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8310 else if (fmt
[i
] == 'E')
8311 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8312 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8316 /* Scan all the insns and delete any that are dead; i.e., they store a register
8317 that is never used or they copy a register to itself.
8319 This is used to remove insns made obviously dead by cse. It improves the
8320 heuristics in loop since it won't try to move dead invariants out of loops
8321 or make givs for dead quantities. The remaining passes of the compilation
8322 are also sped up. */
8325 delete_dead_from_cse (insns
, nreg
)
8329 int *counts
= (int *) alloca (nreg
* sizeof (int));
8335 /* First count the number of times each register is used. */
8336 bzero (counts
, sizeof (int) * nreg
);
8337 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8338 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8340 /* Go from the last insn to the first and delete insns that only set unused
8341 registers or copy a register to itself. As we delete an insn, remove
8342 usage counts for registers it uses. */
8343 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8347 prev
= prev_real_insn (insn
);
8349 /* Don't delete any insns that are part of a libcall block.
8350 Flow or loop might get confused if we did that. Remember
8351 that we are scanning backwards. */
8352 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8357 else if (GET_CODE (PATTERN (insn
)) == SET
)
8359 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8360 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8364 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8365 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8366 && ((tem
= next_nonnote_insn (insn
)) == 0
8367 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8368 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8371 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8372 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8373 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8374 || side_effects_p (SET_SRC (PATTERN (insn
))))
8377 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8378 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8380 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8382 if (GET_CODE (elt
) == SET
)
8384 if (GET_CODE (SET_DEST (elt
)) == REG
8385 && SET_DEST (elt
) == SET_SRC (elt
))
8389 else if (GET_CODE (SET_DEST (elt
)) == CC0
8390 && ! side_effects_p (SET_SRC (elt
))
8391 && ((tem
= next_nonnote_insn (insn
)) == 0
8392 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8393 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8396 else if (GET_CODE (SET_DEST (elt
)) != REG
8397 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8398 || counts
[REGNO (SET_DEST (elt
))] != 0
8399 || side_effects_p (SET_SRC (elt
)))
8402 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8408 /* If this is a dead insn, delete it and show registers in it aren't
8413 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8417 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))