1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-5, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* Must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
36 /* The basic idea of common subexpression elimination is to go
37 through the code, keeping a record of expressions that would
38 have the same value at the current scan point, and replacing
39 expressions encountered with the cheapest equivalent expression.
41 It is too complicated to keep track of the different possibilities
42 when control paths merge; so, at each label, we forget all that is
43 known and start fresh. This can be described as processing each
44 basic block separately. Note, however, that these are not quite
45 the same as the basic blocks found by a later pass and used for
46 data flow analysis and register packing. We do not need to start fresh
47 after a conditional jump instruction if there is no label there.
49 We use two data structures to record the equivalent expressions:
50 a hash table for most expressions, and several vectors together
51 with "quantity numbers" to record equivalent (pseudo) registers.
53 The use of the special data structure for registers is desirable
54 because it is faster. It is possible because registers references
55 contain a fairly small number, the register number, taken from
56 a contiguously allocated series, and two register references are
57 identical if they have the same number. General expressions
58 do not have any such thing, so the only way to retrieve the
59 information recorded on an expression other than a register
60 is to keep it in a hash table.
62 Registers and "quantity numbers":
64 At the start of each basic block, all of the (hardware and pseudo)
65 registers used in the function are given distinct quantity
66 numbers to indicate their contents. During scan, when the code
67 copies one register into another, we copy the quantity number.
68 When a register is loaded in any other way, we allocate a new
69 quantity number to describe the value generated by this operation.
70 `reg_qty' records what quantity a register is currently thought
73 All real quantity numbers are greater than or equal to `max_reg'.
74 If register N has not been assigned a quantity, reg_qty[N] will equal N.
76 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
77 variables should be referenced with an index below `max_reg'.
79 We also maintain a bidirectional chain of registers for each
80 quantity number. `qty_first_reg', `qty_last_reg',
81 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
83 The first register in a chain is the one whose lifespan is least local.
84 Among equals, it is the one that was seen first.
85 We replace any equivalent register with that one.
87 If two registers have the same quantity number, it must be true that
88 REG expressions with `qty_mode' must be in the hash table for both
89 registers and must be in the same class.
91 The converse is not true. Since hard registers may be referenced in
92 any mode, two REG expressions might be equivalent in the hash table
93 but not have the same quantity number if the quantity number of one
94 of the registers is not the same mode as those expressions.
96 Constants and quantity numbers
98 When a quantity has a known constant value, that value is stored
99 in the appropriate element of qty_const. This is in addition to
100 putting the constant in the hash table as is usual for non-regs.
102 Whether a reg or a constant is preferred is determined by the configuration
103 macro CONST_COSTS and will often depend on the constant value. In any
104 event, expressions containing constants can be simplified, by fold_rtx.
106 When a quantity has a known nearly constant value (such as an address
107 of a stack slot), that value is stored in the appropriate element
110 Integer constants don't have a machine mode. However, cse
111 determines the intended machine mode from the destination
112 of the instruction that moves the constant. The machine mode
113 is recorded in the hash table along with the actual RTL
114 constant expression so that different modes are kept separate.
118 To record known equivalences among expressions in general
119 we use a hash table called `table'. It has a fixed number of buckets
120 that contain chains of `struct table_elt' elements for expressions.
121 These chains connect the elements whose expressions have the same
124 Other chains through the same elements connect the elements which
125 currently have equivalent values.
127 Register references in an expression are canonicalized before hashing
128 the expression. This is done using `reg_qty' and `qty_first_reg'.
129 The hash code of a register reference is computed using the quantity
130 number, not the register number.
132 When the value of an expression changes, it is necessary to remove from the
133 hash table not just that expression but all expressions whose values
134 could be different as a result.
136 1. If the value changing is in memory, except in special cases
137 ANYTHING referring to memory could be changed. That is because
138 nobody knows where a pointer does not point.
139 The function `invalidate_memory' removes what is necessary.
141 The special cases are when the address is constant or is
142 a constant plus a fixed register such as the frame pointer
143 or a static chain pointer. When such addresses are stored in,
144 we can tell exactly which other such addresses must be invalidated
145 due to overlap. `invalidate' does this.
146 All expressions that refer to non-constant
147 memory addresses are also invalidated. `invalidate_memory' does this.
149 2. If the value changing is a register, all expressions
150 containing references to that register, and only those,
153 Because searching the entire hash table for expressions that contain
154 a register is very slow, we try to figure out when it isn't necessary.
155 Precisely, this is necessary only when expressions have been
156 entered in the hash table using this register, and then the value has
157 changed, and then another expression wants to be added to refer to
158 the register's new value. This sequence of circumstances is rare
159 within any one basic block.
161 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
162 reg_tick[i] is incremented whenever a value is stored in register i.
163 reg_in_table[i] holds -1 if no references to register i have been
164 entered in the table; otherwise, it contains the value reg_tick[i] had
165 when the references were entered. If we want to enter a reference
166 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
167 Until we want to enter a new entry, the mere fact that the two vectors
168 don't match makes the entries be ignored if anyone tries to match them.
170 Registers themselves are entered in the hash table as well as in
171 the equivalent-register chains. However, the vectors `reg_tick'
172 and `reg_in_table' do not apply to expressions which are simple
173 register references. These expressions are removed from the table
174 immediately when they become invalid, and this can be done even if
175 we do not immediately search for all the expressions that refer to
178 A CLOBBER rtx in an instruction invalidates its operand for further
179 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
180 invalidates everything that resides in memory.
184 Constant expressions that differ only by an additive integer
185 are called related. When a constant expression is put in
186 the table, the related expression with no constant term
187 is also entered. These are made to point at each other
188 so that it is possible to find out if there exists any
189 register equivalent to an expression related to a given expression. */
191 /* One plus largest register number used in this function. */
195 /* Length of vectors indexed by quantity number.
196 We know in advance we will not need a quantity number this big. */
200 /* Next quantity number to be allocated.
201 This is 1 + the largest number needed so far. */
205 /* Indexed by quantity number, gives the first (or last) (pseudo) register
206 in the chain of registers that currently contain this quantity. */
208 static int *qty_first_reg
;
209 static int *qty_last_reg
;
211 /* Index by quantity number, gives the mode of the quantity. */
213 static enum machine_mode
*qty_mode
;
215 /* Indexed by quantity number, gives the rtx of the constant value of the
216 quantity, or zero if it does not have a known value.
217 A sum of the frame pointer (or arg pointer) plus a constant
218 can also be entered here. */
220 static rtx
*qty_const
;
222 /* Indexed by qty number, gives the insn that stored the constant value
223 recorded in `qty_const'. */
225 static rtx
*qty_const_insn
;
227 /* The next three variables are used to track when a comparison between a
228 quantity and some constant or register has been passed. In that case, we
229 know the results of the comparison in case we see it again. These variables
230 record a comparison that is known to be true. */
232 /* Indexed by qty number, gives the rtx code of a comparison with a known
233 result involving this quantity. If none, it is UNKNOWN. */
234 static enum rtx_code
*qty_comparison_code
;
236 /* Indexed by qty number, gives the constant being compared against in a
237 comparison of known result. If no such comparison, it is undefined.
238 If the comparison is not with a constant, it is zero. */
240 static rtx
*qty_comparison_const
;
242 /* Indexed by qty number, gives the quantity being compared against in a
243 comparison of known result. If no such comparison, if it undefined.
244 If the comparison is not with a register, it is -1. */
246 static int *qty_comparison_qty
;
249 /* For machines that have a CC0, we do not record its value in the hash
250 table since its use is guaranteed to be the insn immediately following
251 its definition and any other insn is presumed to invalidate it.
253 Instead, we store below the value last assigned to CC0. If it should
254 happen to be a constant, it is stored in preference to the actual
255 assigned value. In case it is a constant, we store the mode in which
256 the constant should be interpreted. */
258 static rtx prev_insn_cc0
;
259 static enum machine_mode prev_insn_cc0_mode
;
262 /* Previous actual insn. 0 if at first insn of basic block. */
264 static rtx prev_insn
;
266 /* Insn being scanned. */
268 static rtx this_insn
;
270 /* Index by (pseudo) register number, gives the quantity number
271 of the register's current contents. */
275 /* Index by (pseudo) register number, gives the number of the next (or
276 previous) (pseudo) register in the chain of registers sharing the same
279 Or -1 if this register is at the end of the chain.
281 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
283 static int *reg_next_eqv
;
284 static int *reg_prev_eqv
;
286 /* Index by (pseudo) register number, gives the number of times
287 that register has been altered in the current basic block. */
289 static int *reg_tick
;
291 /* Index by (pseudo) register number, gives the reg_tick value at which
292 rtx's containing this register are valid in the hash table.
293 If this does not equal the current reg_tick value, such expressions
294 existing in the hash table are invalid.
295 If this is -1, no expressions containing this register have been
296 entered in the table. */
298 static int *reg_in_table
;
300 /* A HARD_REG_SET containing all the hard registers for which there is
301 currently a REG expression in the hash table. Note the difference
302 from the above variables, which indicate if the REG is mentioned in some
303 expression in the table. */
305 static HARD_REG_SET hard_regs_in_table
;
307 /* A HARD_REG_SET containing all the hard registers that are invalidated
310 static HARD_REG_SET regs_invalidated_by_call
;
312 /* Two vectors of ints:
313 one containing max_reg -1's; the other max_reg + 500 (an approximation
314 for max_qty) elements where element i contains i.
315 These are used to initialize various other vectors fast. */
317 static int *all_minus_one
;
318 static int *consec_ints
;
320 /* CUID of insn that starts the basic block currently being cse-processed. */
322 static int cse_basic_block_start
;
324 /* CUID of insn that ends the basic block currently being cse-processed. */
326 static int cse_basic_block_end
;
328 /* Vector mapping INSN_UIDs to cuids.
329 The cuids are like uids but increase monotonically always.
330 We use them to see whether a reg is used outside a given basic block. */
332 static int *uid_cuid
;
334 /* Highest UID in UID_CUID. */
337 /* Get the cuid of an insn. */
339 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
341 /* Nonzero if cse has altered conditional jump insns
342 in such a way that jump optimization should be redone. */
344 static int cse_jumps_altered
;
346 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
347 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
348 to put in the note. */
349 static int recorded_label_ref
;
351 /* canon_hash stores 1 in do_not_record
352 if it notices a reference to CC0, PC, or some other volatile
355 static int do_not_record
;
357 #ifdef LOAD_EXTEND_OP
359 /* Scratch rtl used when looking for load-extended copy of a MEM. */
360 static rtx memory_extend_rtx
;
363 /* canon_hash stores 1 in hash_arg_in_memory
364 if it notices a reference to memory within the expression being hashed. */
366 static int hash_arg_in_memory
;
368 /* canon_hash stores 1 in hash_arg_in_struct
369 if it notices a reference to memory that's part of a structure. */
371 static int hash_arg_in_struct
;
373 /* The hash table contains buckets which are chains of `struct table_elt's,
374 each recording one expression's information.
375 That expression is in the `exp' field.
377 Those elements with the same hash code are chained in both directions
378 through the `next_same_hash' and `prev_same_hash' fields.
380 Each set of expressions with equivalent values
381 are on a two-way chain through the `next_same_value'
382 and `prev_same_value' fields, and all point with
383 the `first_same_value' field at the first element in
384 that chain. The chain is in order of increasing cost.
385 Each element's cost value is in its `cost' field.
387 The `in_memory' field is nonzero for elements that
388 involve any reference to memory. These elements are removed
389 whenever a write is done to an unidentified location in memory.
390 To be safe, we assume that a memory address is unidentified unless
391 the address is either a symbol constant or a constant plus
392 the frame pointer or argument pointer.
394 The `in_struct' field is nonzero for elements that
395 involve any reference to memory inside a structure or array.
397 The `related_value' field is used to connect related expressions
398 (that differ by adding an integer).
399 The related expressions are chained in a circular fashion.
400 `related_value' is zero for expressions for which this
403 The `cost' field stores the cost of this element's expression.
405 The `is_const' flag is set if the element is a constant (including
408 The `flag' field is used as a temporary during some search routines.
410 The `mode' field is usually the same as GET_MODE (`exp'), but
411 if `exp' is a CONST_INT and has no machine mode then the `mode'
412 field is the mode it was being used as. Each constant is
413 recorded separately for each mode it is used with. */
419 struct table_elt
*next_same_hash
;
420 struct table_elt
*prev_same_hash
;
421 struct table_elt
*next_same_value
;
422 struct table_elt
*prev_same_value
;
423 struct table_elt
*first_same_value
;
424 struct table_elt
*related_value
;
426 enum machine_mode mode
;
433 /* We don't want a lot of buckets, because we rarely have very many
434 things stored in the hash table, and a lot of buckets slows
435 down a lot of loops that happen frequently. */
438 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
439 register (hard registers may require `do_not_record' to be set). */
442 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
443 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
444 : canon_hash (X, M) % NBUCKETS)
446 /* Determine whether register number N is considered a fixed register for CSE.
447 It is desirable to replace other regs with fixed regs, to reduce need for
449 A reg wins if it is either the frame pointer or designated as fixed,
450 but not if it is an overlapping register. */
451 #ifdef OVERLAPPING_REGNO_P
452 #define FIXED_REGNO_P(N) \
453 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
454 || fixed_regs[N] || global_regs[N]) \
455 && ! OVERLAPPING_REGNO_P ((N)))
457 #define FIXED_REGNO_P(N) \
458 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
459 || fixed_regs[N] || global_regs[N])
462 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
463 hard registers and pointers into the frame are the cheapest with a cost
464 of 0. Next come pseudos with a cost of one and other hard registers with
465 a cost of 2. Aside from these special cases, call `rtx_cost'. */
467 #define CHEAP_REGNO(N) \
468 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
469 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
470 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
471 || ((N) < FIRST_PSEUDO_REGISTER \
472 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
474 /* A register is cheap if it is a user variable assigned to the register
475 or if its register number always corresponds to a cheap register. */
477 #define CHEAP_REG(N) \
478 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
479 || CHEAP_REGNO (REGNO (N)))
482 (GET_CODE (X) == REG \
483 ? (CHEAP_REG (X) ? 0 \
484 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
486 : rtx_cost (X, SET) * 2)
488 /* Determine if the quantity number for register X represents a valid index
489 into the `qty_...' variables. */
491 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
493 static struct table_elt
*table
[NBUCKETS
];
495 /* Chain of `struct table_elt's made so far for this function
496 but currently removed from the table. */
498 static struct table_elt
*free_element_chain
;
500 /* Number of `struct table_elt' structures made so far for this function. */
502 static int n_elements_made
;
504 /* Maximum value `n_elements_made' has had so far in this compilation
505 for functions previously processed. */
507 static int max_elements_made
;
509 /* Surviving equivalence class when two equivalence classes are merged
510 by recording the effects of a jump in the last insn. Zero if the
511 last insn was not a conditional jump. */
513 static struct table_elt
*last_jump_equiv_class
;
515 /* Set to the cost of a constant pool reference if one was found for a
516 symbolic constant. If this was found, it means we should try to
517 convert constants into constant pool entries if they don't fit in
520 static int constant_pool_entries_cost
;
522 /* Bits describing what kind of values in memory must be invalidated
523 for a particular instruction. If all three bits are zero,
524 no memory refs need to be invalidated. Each bit is more powerful
525 than the preceding ones, and if a bit is set then the preceding
528 Here is how the bits are set:
529 Pushing onto the stack invalidates only the stack pointer,
530 writing at a fixed address invalidates only variable addresses,
531 writing in a structure element at variable address
532 invalidates all but scalar variables,
533 and writing in anything else at variable address invalidates everything. */
537 int sp
: 1; /* Invalidate stack pointer. */
538 int var
: 1; /* Invalidate variable addresses. */
539 int nonscalar
: 1; /* Invalidate all but scalar variables. */
540 int all
: 1; /* Invalidate all memory refs. */
543 /* Define maximum length of a branch path. */
545 #define PATHLENGTH 10
547 /* This data describes a block that will be processed by cse_basic_block. */
549 struct cse_basic_block_data
{
550 /* Lowest CUID value of insns in block. */
552 /* Highest CUID value of insns in block. */
554 /* Total number of SETs in block. */
556 /* Last insn in the block. */
558 /* Size of current branch path, if any. */
560 /* Current branch path, indicating which branches will be taken. */
562 /* The branch insn. */
564 /* Whether it should be taken or not. AROUND is the same as taken
565 except that it is used when the destination label is not preceded
567 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
571 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
572 virtual regs here because the simplify_*_operation routines are called
573 by integrate.c, which is called before virtual register instantiation. */
575 #define FIXED_BASE_PLUS_P(X) \
576 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
577 || (X) == arg_pointer_rtx \
578 || (X) == virtual_stack_vars_rtx \
579 || (X) == virtual_incoming_args_rtx \
580 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
581 && (XEXP (X, 0) == frame_pointer_rtx \
582 || XEXP (X, 0) == hard_frame_pointer_rtx \
583 || XEXP (X, 0) == arg_pointer_rtx \
584 || XEXP (X, 0) == virtual_stack_vars_rtx \
585 || XEXP (X, 0) == virtual_incoming_args_rtx)))
587 /* Similar, but also allows reference to the stack pointer.
589 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
590 arg_pointer_rtx by itself is nonzero, because on at least one machine,
591 the i960, the arg pointer is zero when it is unused. */
593 #define NONZERO_BASE_PLUS_P(X) \
594 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
595 || (X) == virtual_stack_vars_rtx \
596 || (X) == virtual_incoming_args_rtx \
597 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
598 && (XEXP (X, 0) == frame_pointer_rtx \
599 || XEXP (X, 0) == hard_frame_pointer_rtx \
600 || XEXP (X, 0) == arg_pointer_rtx \
601 || XEXP (X, 0) == virtual_stack_vars_rtx \
602 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
603 || (X) == stack_pointer_rtx \
604 || (X) == virtual_stack_dynamic_rtx \
605 || (X) == virtual_outgoing_args_rtx \
606 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
607 && (XEXP (X, 0) == stack_pointer_rtx \
608 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
609 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
611 static void new_basic_block
PROTO((void));
612 static void make_new_qty
PROTO((int));
613 static void make_regs_eqv
PROTO((int, int));
614 static void delete_reg_equiv
PROTO((int));
615 static int mention_regs
PROTO((rtx
));
616 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
617 static void free_element
PROTO((struct table_elt
*));
618 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
619 static struct table_elt
*get_element
PROTO((void));
620 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
621 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
622 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
623 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
625 static void merge_equiv_classes
PROTO((struct table_elt
*,
626 struct table_elt
*));
627 static void invalidate
PROTO((rtx
, enum machine_mode
));
628 static void remove_invalid_refs
PROTO((int));
629 static void rehash_using_reg
PROTO((rtx
));
630 static void invalidate_memory
PROTO((struct write_data
*));
631 static void invalidate_for_call
PROTO((void));
632 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
633 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
634 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
635 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
636 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
639 static int refers_to_p
PROTO((rtx
, rtx
));
640 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
642 static int cse_rtx_addr_varies_p
PROTO((rtx
));
643 static rtx canon_reg
PROTO((rtx
, rtx
));
644 static void find_best_addr
PROTO((rtx
, rtx
*));
645 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
647 enum machine_mode
*));
648 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
650 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
652 static rtx fold_rtx
PROTO((rtx
, rtx
));
653 static rtx equiv_constant
PROTO((rtx
));
654 static void record_jump_equiv
PROTO((rtx
, int));
655 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
657 static void cse_insn
PROTO((rtx
, int));
658 static void note_mem_written
PROTO((rtx
, struct write_data
*));
659 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
660 static rtx cse_process_notes
PROTO((rtx
, rtx
));
661 static void cse_around_loop
PROTO((rtx
));
662 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
663 static void invalidate_skipped_block
PROTO((rtx
));
664 static void cse_check_loop_start
PROTO((rtx
, rtx
));
665 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
666 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
667 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
669 extern int rtx_equal_function_value_matters
;
671 /* Return an estimate of the cost of computing rtx X.
672 One use is in cse, to decide which expression to keep in the hash table.
673 Another is in rtl generation, to pick the cheapest way to multiply.
674 Other uses like the latter are expected in the future. */
676 /* Return the right cost to give to an operation
677 to make the cost of the corresponding register-to-register instruction
678 N times that of a fast register-to-register instruction. */
680 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
683 rtx_cost (x
, outer_code
)
685 enum rtx_code outer_code
;
688 register enum rtx_code code
;
695 /* Compute the default costs of certain things.
696 Note that RTX_COSTS can override the defaults. */
702 /* Count multiplication by 2**n as a shift,
703 because if we are considering it, we would output it as a shift. */
704 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
705 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
708 total
= COSTS_N_INSNS (5);
714 total
= COSTS_N_INSNS (7);
717 /* Used in loop.c and combine.c as a marker. */
721 /* We don't want these to be used in substitutions because
722 we have no way of validating the resulting insn. So assign
723 anything containing an ASM_OPERANDS a very high cost. */
733 return ! CHEAP_REG (x
);
736 /* If we can't tie these modes, make this expensive. The larger
737 the mode, the more expensive it is. */
738 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
739 return COSTS_N_INSNS (2
740 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
743 RTX_COSTS (x
, code
, outer_code
);
745 CONST_COSTS (x
, code
, outer_code
);
748 /* Sum the costs of the sub-rtx's, plus cost of this operation,
749 which is already in total. */
751 fmt
= GET_RTX_FORMAT (code
);
752 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
754 total
+= rtx_cost (XEXP (x
, i
), code
);
755 else if (fmt
[i
] == 'E')
756 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
757 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
762 /* Clear the hash table and initialize each register with its own quantity,
763 for a new basic block. */
772 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
774 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
775 max_reg
* sizeof (int));
776 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
777 CLEAR_HARD_REG_SET (hard_regs_in_table
);
779 /* The per-quantity values used to be initialized here, but it is
780 much faster to initialize each as it is made in `make_new_qty'. */
782 for (i
= 0; i
< NBUCKETS
; i
++)
784 register struct table_elt
*this, *next
;
785 for (this = table
[i
]; this; this = next
)
787 next
= this->next_same_hash
;
792 bzero ((char *) table
, sizeof table
);
801 /* Say that register REG contains a quantity not in any register before
802 and initialize that quantity. */
810 if (next_qty
>= max_qty
)
813 q
= reg_qty
[reg
] = next_qty
++;
814 qty_first_reg
[q
] = reg
;
815 qty_last_reg
[q
] = reg
;
816 qty_const
[q
] = qty_const_insn
[q
] = 0;
817 qty_comparison_code
[q
] = UNKNOWN
;
819 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
822 /* Make reg NEW equivalent to reg OLD.
823 OLD is not changing; NEW is. */
826 make_regs_eqv (new, old
)
827 register int new, old
;
829 register int lastr
, firstr
;
830 register int q
= reg_qty
[old
];
832 /* Nothing should become eqv until it has a "non-invalid" qty number. */
833 if (! REGNO_QTY_VALID_P (old
))
837 firstr
= qty_first_reg
[q
];
838 lastr
= qty_last_reg
[q
];
840 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
841 hard regs. Among pseudos, if NEW will live longer than any other reg
842 of the same qty, and that is beyond the current basic block,
843 make it the new canonical replacement for this qty. */
844 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
845 /* Certain fixed registers might be of the class NO_REGS. This means
846 that not only can they not be allocated by the compiler, but
847 they cannot be used in substitutions or canonicalizations
849 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
850 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
851 || (new >= FIRST_PSEUDO_REGISTER
852 && (firstr
< FIRST_PSEUDO_REGISTER
853 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
854 || (uid_cuid
[regno_first_uid
[new]]
855 < cse_basic_block_start
))
856 && (uid_cuid
[regno_last_uid
[new]]
857 > uid_cuid
[regno_last_uid
[firstr
]]))))))
859 reg_prev_eqv
[firstr
] = new;
860 reg_next_eqv
[new] = firstr
;
861 reg_prev_eqv
[new] = -1;
862 qty_first_reg
[q
] = new;
866 /* If NEW is a hard reg (known to be non-fixed), insert at end.
867 Otherwise, insert before any non-fixed hard regs that are at the
868 end. Registers of class NO_REGS cannot be used as an
869 equivalent for anything. */
870 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
871 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
872 && new >= FIRST_PSEUDO_REGISTER
)
873 lastr
= reg_prev_eqv
[lastr
];
874 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
875 if (reg_next_eqv
[lastr
] >= 0)
876 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
878 qty_last_reg
[q
] = new;
879 reg_next_eqv
[lastr
] = new;
880 reg_prev_eqv
[new] = lastr
;
884 /* Remove REG from its equivalence class. */
887 delete_reg_equiv (reg
)
890 register int q
= reg_qty
[reg
];
893 /* If invalid, do nothing. */
897 p
= reg_prev_eqv
[reg
];
898 n
= reg_next_eqv
[reg
];
907 qty_first_reg
[q
] = n
;
912 /* Remove any invalid expressions from the hash table
913 that refer to any of the registers contained in expression X.
915 Make sure that newly inserted references to those registers
916 as subexpressions will be considered valid.
918 mention_regs is not called when a register itself
919 is being stored in the table.
921 Return 1 if we have done something that may have changed the hash code
928 register enum rtx_code code
;
931 register int changed
= 0;
939 register int regno
= REGNO (x
);
940 register int endregno
941 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
942 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
945 for (i
= regno
; i
< endregno
; i
++)
947 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
948 remove_invalid_refs (i
);
950 reg_in_table
[i
] = reg_tick
[i
];
956 /* If X is a comparison or a COMPARE and either operand is a register
957 that does not have a quantity, give it one. This is so that a later
958 call to record_jump_equiv won't cause X to be assigned a different
959 hash code and not found in the table after that call.
961 It is not necessary to do this here, since rehash_using_reg can
962 fix up the table later, but doing this here eliminates the need to
963 call that expensive function in the most common case where the only
964 use of the register is in the comparison. */
966 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
968 if (GET_CODE (XEXP (x
, 0)) == REG
969 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
970 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
972 rehash_using_reg (XEXP (x
, 0));
976 if (GET_CODE (XEXP (x
, 1)) == REG
977 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
978 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
980 rehash_using_reg (XEXP (x
, 1));
985 fmt
= GET_RTX_FORMAT (code
);
986 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
988 changed
|= mention_regs (XEXP (x
, i
));
989 else if (fmt
[i
] == 'E')
990 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
991 changed
|= mention_regs (XVECEXP (x
, i
, j
));
996 /* Update the register quantities for inserting X into the hash table
997 with a value equivalent to CLASSP.
998 (If the class does not contain a REG, it is irrelevant.)
999 If MODIFIED is nonzero, X is a destination; it is being modified.
1000 Note that delete_reg_equiv should be called on a register
1001 before insert_regs is done on that register with MODIFIED != 0.
1003 Nonzero value means that elements of reg_qty have changed
1004 so X's hash code may be different. */
1007 insert_regs (x
, classp
, modified
)
1009 struct table_elt
*classp
;
1012 if (GET_CODE (x
) == REG
)
1014 register int regno
= REGNO (x
);
1016 /* If REGNO is in the equivalence table already but is of the
1017 wrong mode for that equivalence, don't do anything here. */
1019 if (REGNO_QTY_VALID_P (regno
)
1020 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1023 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1026 for (classp
= classp
->first_same_value
;
1028 classp
= classp
->next_same_value
)
1029 if (GET_CODE (classp
->exp
) == REG
1030 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1032 make_regs_eqv (regno
, REGNO (classp
->exp
));
1036 make_new_qty (regno
);
1037 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1044 /* If X is a SUBREG, we will likely be inserting the inner register in the
1045 table. If that register doesn't have an assigned quantity number at
1046 this point but does later, the insertion that we will be doing now will
1047 not be accessible because its hash code will have changed. So assign
1048 a quantity number now. */
1050 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1051 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1053 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1054 mention_regs (SUBREG_REG (x
));
1058 return mention_regs (x
);
1061 /* Look in or update the hash table. */
1063 /* Put the element ELT on the list of free elements. */
1067 struct table_elt
*elt
;
1069 elt
->next_same_hash
= free_element_chain
;
1070 free_element_chain
= elt
;
1073 /* Return an element that is free for use. */
1075 static struct table_elt
*
1078 struct table_elt
*elt
= free_element_chain
;
1081 free_element_chain
= elt
->next_same_hash
;
1085 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1088 /* Remove table element ELT from use in the table.
1089 HASH is its hash code, made using the HASH macro.
1090 It's an argument because often that is known in advance
1091 and we save much time not recomputing it. */
1094 remove_from_table (elt
, hash
)
1095 register struct table_elt
*elt
;
1101 /* Mark this element as removed. See cse_insn. */
1102 elt
->first_same_value
= 0;
1104 /* Remove the table element from its equivalence class. */
1107 register struct table_elt
*prev
= elt
->prev_same_value
;
1108 register struct table_elt
*next
= elt
->next_same_value
;
1110 if (next
) next
->prev_same_value
= prev
;
1113 prev
->next_same_value
= next
;
1116 register struct table_elt
*newfirst
= next
;
1119 next
->first_same_value
= newfirst
;
1120 next
= next
->next_same_value
;
1125 /* Remove the table element from its hash bucket. */
1128 register struct table_elt
*prev
= elt
->prev_same_hash
;
1129 register struct table_elt
*next
= elt
->next_same_hash
;
1131 if (next
) next
->prev_same_hash
= prev
;
1134 prev
->next_same_hash
= next
;
1135 else if (table
[hash
] == elt
)
1139 /* This entry is not in the proper hash bucket. This can happen
1140 when two classes were merged by `merge_equiv_classes'. Search
1141 for the hash bucket that it heads. This happens only very
1142 rarely, so the cost is acceptable. */
1143 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1144 if (table
[hash
] == elt
)
1149 /* Remove the table element from its related-value circular chain. */
1151 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1153 register struct table_elt
*p
= elt
->related_value
;
1154 while (p
->related_value
!= elt
)
1155 p
= p
->related_value
;
1156 p
->related_value
= elt
->related_value
;
1157 if (p
->related_value
== p
)
1158 p
->related_value
= 0;
1164 /* Look up X in the hash table and return its table element,
1165 or 0 if X is not in the table.
1167 MODE is the machine-mode of X, or if X is an integer constant
1168 with VOIDmode then MODE is the mode with which X will be used.
1170 Here we are satisfied to find an expression whose tree structure
1173 static struct table_elt
*
1174 lookup (x
, hash
, mode
)
1177 enum machine_mode mode
;
1179 register struct table_elt
*p
;
1181 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1182 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1183 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1189 /* Like `lookup' but don't care whether the table element uses invalid regs.
1190 Also ignore discrepancies in the machine mode of a register. */
1192 static struct table_elt
*
1193 lookup_for_remove (x
, hash
, mode
)
1196 enum machine_mode mode
;
1198 register struct table_elt
*p
;
1200 if (GET_CODE (x
) == REG
)
1202 int regno
= REGNO (x
);
1203 /* Don't check the machine mode when comparing registers;
1204 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1205 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1206 if (GET_CODE (p
->exp
) == REG
1207 && REGNO (p
->exp
) == regno
)
1212 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1213 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1220 /* Look for an expression equivalent to X and with code CODE.
1221 If one is found, return that expression. */
1224 lookup_as_function (x
, code
)
1228 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1233 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1235 if (GET_CODE (p
->exp
) == code
1236 /* Make sure this is a valid entry in the table. */
1237 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1244 /* Insert X in the hash table, assuming HASH is its hash code
1245 and CLASSP is an element of the class it should go in
1246 (or 0 if a new class should be made).
1247 It is inserted at the proper position to keep the class in
1248 the order cheapest first.
1250 MODE is the machine-mode of X, or if X is an integer constant
1251 with VOIDmode then MODE is the mode with which X will be used.
1253 For elements of equal cheapness, the most recent one
1254 goes in front, except that the first element in the list
1255 remains first unless a cheaper element is added. The order of
1256 pseudo-registers does not matter, as canon_reg will be called to
1257 find the cheapest when a register is retrieved from the table.
1259 The in_memory field in the hash table element is set to 0.
1260 The caller must set it nonzero if appropriate.
1262 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1263 and if insert_regs returns a nonzero value
1264 you must then recompute its hash code before calling here.
1266 If necessary, update table showing constant values of quantities. */
1268 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1270 static struct table_elt
*
1271 insert (x
, classp
, hash
, mode
)
1273 register struct table_elt
*classp
;
1275 enum machine_mode mode
;
1277 register struct table_elt
*elt
;
1279 /* If X is a register and we haven't made a quantity for it,
1280 something is wrong. */
1281 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1284 /* If X is a hard register, show it is being put in the table. */
1285 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1287 int regno
= REGNO (x
);
1288 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1291 for (i
= regno
; i
< endregno
; i
++)
1292 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1295 /* If X is a label, show we recorded it. */
1296 if (GET_CODE (x
) == LABEL_REF
1297 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1298 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1299 recorded_label_ref
= 1;
1301 /* Put an element for X into the right hash bucket. */
1303 elt
= get_element ();
1305 elt
->cost
= COST (x
);
1306 elt
->next_same_value
= 0;
1307 elt
->prev_same_value
= 0;
1308 elt
->next_same_hash
= table
[hash
];
1309 elt
->prev_same_hash
= 0;
1310 elt
->related_value
= 0;
1313 elt
->is_const
= (CONSTANT_P (x
)
1314 /* GNU C++ takes advantage of this for `this'
1315 (and other const values). */
1316 || (RTX_UNCHANGING_P (x
)
1317 && GET_CODE (x
) == REG
1318 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1319 || FIXED_BASE_PLUS_P (x
));
1322 table
[hash
]->prev_same_hash
= elt
;
1325 /* Put it into the proper value-class. */
1328 classp
= classp
->first_same_value
;
1329 if (CHEAPER (elt
, classp
))
1330 /* Insert at the head of the class */
1332 register struct table_elt
*p
;
1333 elt
->next_same_value
= classp
;
1334 classp
->prev_same_value
= elt
;
1335 elt
->first_same_value
= elt
;
1337 for (p
= classp
; p
; p
= p
->next_same_value
)
1338 p
->first_same_value
= elt
;
1342 /* Insert not at head of the class. */
1343 /* Put it after the last element cheaper than X. */
1344 register struct table_elt
*p
, *next
;
1345 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1347 /* Put it after P and before NEXT. */
1348 elt
->next_same_value
= next
;
1350 next
->prev_same_value
= elt
;
1351 elt
->prev_same_value
= p
;
1352 p
->next_same_value
= elt
;
1353 elt
->first_same_value
= classp
;
1357 elt
->first_same_value
= elt
;
1359 /* If this is a constant being set equivalent to a register or a register
1360 being set equivalent to a constant, note the constant equivalence.
1362 If this is a constant, it cannot be equivalent to a different constant,
1363 and a constant is the only thing that can be cheaper than a register. So
1364 we know the register is the head of the class (before the constant was
1367 If this is a register that is not already known equivalent to a
1368 constant, we must check the entire class.
1370 If this is a register that is already known equivalent to an insn,
1371 update `qty_const_insn' to show that `this_insn' is the latest
1372 insn making that quantity equivalent to the constant. */
1374 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1375 && GET_CODE (x
) != REG
)
1377 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1378 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1379 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1382 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]]
1385 register struct table_elt
*p
;
1387 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1389 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1391 qty_const
[reg_qty
[REGNO (x
)]]
1392 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1393 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1399 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1400 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1401 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1403 /* If this is a constant with symbolic value,
1404 and it has a term with an explicit integer value,
1405 link it up with related expressions. */
1406 if (GET_CODE (x
) == CONST
)
1408 rtx subexp
= get_related_value (x
);
1410 struct table_elt
*subelt
, *subelt_prev
;
1414 /* Get the integer-free subexpression in the hash table. */
1415 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1416 subelt
= lookup (subexp
, subhash
, mode
);
1418 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1419 /* Initialize SUBELT's circular chain if it has none. */
1420 if (subelt
->related_value
== 0)
1421 subelt
->related_value
= subelt
;
1422 /* Find the element in the circular chain that precedes SUBELT. */
1423 subelt_prev
= subelt
;
1424 while (subelt_prev
->related_value
!= subelt
)
1425 subelt_prev
= subelt_prev
->related_value
;
1426 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1427 This way the element that follows SUBELT is the oldest one. */
1428 elt
->related_value
= subelt_prev
->related_value
;
1429 subelt_prev
->related_value
= elt
;
1436 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1437 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1438 the two classes equivalent.
1440 CLASS1 will be the surviving class; CLASS2 should not be used after this
1443 Any invalid entries in CLASS2 will not be copied. */
1446 merge_equiv_classes (class1
, class2
)
1447 struct table_elt
*class1
, *class2
;
1449 struct table_elt
*elt
, *next
, *new;
1451 /* Ensure we start with the head of the classes. */
1452 class1
= class1
->first_same_value
;
1453 class2
= class2
->first_same_value
;
1455 /* If they were already equal, forget it. */
1456 if (class1
== class2
)
1459 for (elt
= class2
; elt
; elt
= next
)
1463 enum machine_mode mode
= elt
->mode
;
1465 next
= elt
->next_same_value
;
1467 /* Remove old entry, make a new one in CLASS1's class.
1468 Don't do this for invalid entries as we cannot find their
1469 hash code (it also isn't necessary). */
1470 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1472 hash_arg_in_memory
= 0;
1473 hash_arg_in_struct
= 0;
1474 hash
= HASH (exp
, mode
);
1476 if (GET_CODE (exp
) == REG
)
1477 delete_reg_equiv (REGNO (exp
));
1479 remove_from_table (elt
, hash
);
1481 if (insert_regs (exp
, class1
, 0))
1483 rehash_using_reg (exp
);
1484 hash
= HASH (exp
, mode
);
1486 new = insert (exp
, class1
, hash
, mode
);
1487 new->in_memory
= hash_arg_in_memory
;
1488 new->in_struct
= hash_arg_in_struct
;
1493 /* Remove from the hash table, or mark as invalid,
1494 all expressions whose values could be altered by storing in X.
1495 X is a register, a subreg, or a memory reference with nonvarying address
1496 (because, when a memory reference with a varying address is stored in,
1497 all memory references are removed by invalidate_memory
1498 so specific invalidation is superfluous).
1499 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1500 instead of just the amount indicated by the mode of X. This is only used
1501 for bitfield stores into memory.
1503 A nonvarying address may be just a register or just
1504 a symbol reference, or it may be either of those plus
1505 a numeric offset. */
1508 invalidate (x
, full_mode
)
1510 enum machine_mode full_mode
;
1513 register struct table_elt
*p
;
1515 HOST_WIDE_INT start
, end
;
1517 /* If X is a register, dependencies on its contents
1518 are recorded through the qty number mechanism.
1519 Just change the qty number of the register,
1520 mark it as invalid for expressions that refer to it,
1521 and remove it itself. */
1523 if (GET_CODE (x
) == REG
)
1525 register int regno
= REGNO (x
);
1526 register unsigned hash
= HASH (x
, GET_MODE (x
));
1528 /* Remove REGNO from any quantity list it might be on and indicate
1529 that it's value might have changed. If it is a pseudo, remove its
1530 entry from the hash table.
1532 For a hard register, we do the first two actions above for any
1533 additional hard registers corresponding to X. Then, if any of these
1534 registers are in the table, we must remove any REG entries that
1535 overlap these registers. */
1537 delete_reg_equiv (regno
);
1540 if (regno
>= FIRST_PSEUDO_REGISTER
)
1542 /* Because a register can be referenced in more than one mode,
1543 we might have to remove more than one table entry. */
1545 struct table_elt
*elt
;
1547 while (elt
= lookup_for_remove (x
, hash
, GET_MODE (x
)))
1548 remove_from_table (elt
, hash
);
1552 HOST_WIDE_INT in_table
1553 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1554 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1555 int tregno
, tendregno
;
1556 register struct table_elt
*p
, *next
;
1558 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1560 for (i
= regno
+ 1; i
< endregno
; i
++)
1562 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1563 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1564 delete_reg_equiv (i
);
1569 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1570 for (p
= table
[hash
]; p
; p
= next
)
1572 next
= p
->next_same_hash
;
1574 if (GET_CODE (p
->exp
) != REG
1575 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1578 tregno
= REGNO (p
->exp
);
1580 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1581 if (tendregno
> regno
&& tregno
< endregno
)
1582 remove_from_table (p
, hash
);
1589 if (GET_CODE (x
) == SUBREG
)
1591 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1593 invalidate (SUBREG_REG (x
), VOIDmode
);
1597 /* X is not a register; it must be a memory reference with
1598 a nonvarying address. Remove all hash table elements
1599 that refer to overlapping pieces of memory. */
1601 if (GET_CODE (x
) != MEM
)
1604 if (full_mode
== VOIDmode
)
1605 full_mode
= GET_MODE (x
);
1607 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (full_mode
),
1608 &base
, &start
, &end
);
1610 for (i
= 0; i
< NBUCKETS
; i
++)
1612 register struct table_elt
*next
;
1613 for (p
= table
[i
]; p
; p
= next
)
1615 next
= p
->next_same_hash
;
1616 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1617 remove_from_table (p
, i
);
1622 /* Remove all expressions that refer to register REGNO,
1623 since they are already invalid, and we are about to
1624 mark that register valid again and don't want the old
1625 expressions to reappear as valid. */
1628 remove_invalid_refs (regno
)
1632 register struct table_elt
*p
, *next
;
1634 for (i
= 0; i
< NBUCKETS
; i
++)
1635 for (p
= table
[i
]; p
; p
= next
)
1637 next
= p
->next_same_hash
;
1638 if (GET_CODE (p
->exp
) != REG
1639 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1640 remove_from_table (p
, i
);
1644 /* Recompute the hash codes of any valid entries in the hash table that
1645 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1647 This is called when we make a jump equivalence. */
1650 rehash_using_reg (x
)
1654 struct table_elt
*p
, *next
;
1657 if (GET_CODE (x
) == SUBREG
)
1660 /* If X is not a register or if the register is known not to be in any
1661 valid entries in the table, we have no work to do. */
1663 if (GET_CODE (x
) != REG
1664 || reg_in_table
[REGNO (x
)] < 0
1665 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1668 /* Scan all hash chains looking for valid entries that mention X.
1669 If we find one and it is in the wrong hash chain, move it. We can skip
1670 objects that are registers, since they are handled specially. */
1672 for (i
= 0; i
< NBUCKETS
; i
++)
1673 for (p
= table
[i
]; p
; p
= next
)
1675 next
= p
->next_same_hash
;
1676 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1677 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1678 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1680 if (p
->next_same_hash
)
1681 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1683 if (p
->prev_same_hash
)
1684 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1686 table
[i
] = p
->next_same_hash
;
1688 p
->next_same_hash
= table
[hash
];
1689 p
->prev_same_hash
= 0;
1691 table
[hash
]->prev_same_hash
= p
;
1697 /* Remove from the hash table all expressions that reference memory,
1698 or some of them as specified by *WRITES. */
1701 invalidate_memory (writes
)
1702 struct write_data
*writes
;
1705 register struct table_elt
*p
, *next
;
1706 int all
= writes
->all
;
1707 int nonscalar
= writes
->nonscalar
;
1709 for (i
= 0; i
< NBUCKETS
; i
++)
1710 for (p
= table
[i
]; p
; p
= next
)
1712 next
= p
->next_same_hash
;
1715 || (nonscalar
&& p
->in_struct
)
1716 || cse_rtx_addr_varies_p (p
->exp
)))
1717 remove_from_table (p
, i
);
1721 /* Remove from the hash table any expression that is a call-clobbered
1722 register. Also update their TICK values. */
1725 invalidate_for_call ()
1727 int regno
, endregno
;
1730 struct table_elt
*p
, *next
;
1733 /* Go through all the hard registers. For each that is clobbered in
1734 a CALL_INSN, remove the register from quantity chains and update
1735 reg_tick if defined. Also see if any of these registers is currently
1738 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1739 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1741 delete_reg_equiv (regno
);
1742 if (reg_tick
[regno
] >= 0)
1745 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1748 /* In the case where we have no call-clobbered hard registers in the
1749 table, we are done. Otherwise, scan the table and remove any
1750 entry that overlaps a call-clobbered register. */
1753 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1754 for (p
= table
[hash
]; p
; p
= next
)
1756 next
= p
->next_same_hash
;
1758 if (GET_CODE (p
->exp
) != REG
1759 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1762 regno
= REGNO (p
->exp
);
1763 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1765 for (i
= regno
; i
< endregno
; i
++)
1766 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1768 remove_from_table (p
, hash
);
1774 /* Given an expression X of type CONST,
1775 and ELT which is its table entry (or 0 if it
1776 is not in the hash table),
1777 return an alternate expression for X as a register plus integer.
1778 If none can be found, return 0. */
1781 use_related_value (x
, elt
)
1783 struct table_elt
*elt
;
1785 register struct table_elt
*relt
= 0;
1786 register struct table_elt
*p
, *q
;
1787 HOST_WIDE_INT offset
;
1789 /* First, is there anything related known?
1790 If we have a table element, we can tell from that.
1791 Otherwise, must look it up. */
1793 if (elt
!= 0 && elt
->related_value
!= 0)
1795 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1797 rtx subexp
= get_related_value (x
);
1799 relt
= lookup (subexp
,
1800 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1807 /* Search all related table entries for one that has an
1808 equivalent register. */
1813 /* This loop is strange in that it is executed in two different cases.
1814 The first is when X is already in the table. Then it is searching
1815 the RELATED_VALUE list of X's class (RELT). The second case is when
1816 X is not in the table. Then RELT points to a class for the related
1819 Ensure that, whatever case we are in, that we ignore classes that have
1820 the same value as X. */
1822 if (rtx_equal_p (x
, p
->exp
))
1825 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1826 if (GET_CODE (q
->exp
) == REG
)
1832 p
= p
->related_value
;
1834 /* We went all the way around, so there is nothing to be found.
1835 Alternatively, perhaps RELT was in the table for some other reason
1836 and it has no related values recorded. */
1837 if (p
== relt
|| p
== 0)
1844 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1845 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1846 return plus_constant (q
->exp
, offset
);
1849 /* Hash an rtx. We are careful to make sure the value is never negative.
1850 Equivalent registers hash identically.
1851 MODE is used in hashing for CONST_INTs only;
1852 otherwise the mode of X is used.
1854 Store 1 in do_not_record if any subexpression is volatile.
1856 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1857 which does not have the RTX_UNCHANGING_P bit set.
1858 In this case, also store 1 in hash_arg_in_struct
1859 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1861 Note that cse_insn knows that the hash code of a MEM expression
1862 is just (int) MEM plus the hash code of the address. */
1865 canon_hash (x
, mode
)
1867 enum machine_mode mode
;
1870 register unsigned hash
= 0;
1871 register enum rtx_code code
;
1874 /* repeat is used to turn tail-recursion into iteration. */
1879 code
= GET_CODE (x
);
1884 register int regno
= REGNO (x
);
1886 /* On some machines, we can't record any non-fixed hard register,
1887 because extending its life will cause reload problems. We
1888 consider ap, fp, and sp to be fixed for this purpose.
1889 On all machines, we can't record any global registers. */
1891 if (regno
< FIRST_PSEUDO_REGISTER
1892 && (global_regs
[regno
]
1893 #ifdef SMALL_REGISTER_CLASSES
1894 || (SMALL_REGISTER_CLASSES
1895 && ! fixed_regs
[regno
]
1896 && regno
!= FRAME_POINTER_REGNUM
1897 && regno
!= HARD_FRAME_POINTER_REGNUM
1898 && regno
!= ARG_POINTER_REGNUM
1899 && regno
!= STACK_POINTER_REGNUM
)
1906 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1912 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1913 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1918 /* This is like the general case, except that it only counts
1919 the integers representing the constant. */
1920 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1921 if (GET_MODE (x
) != VOIDmode
)
1922 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1924 unsigned tem
= XINT (x
, i
);
1928 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
1929 + (unsigned) CONST_DOUBLE_HIGH (x
));
1932 /* Assume there is only one rtx object for any given label. */
1935 += ((unsigned) LABEL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XEXP (x
, 0);
1940 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned HOST_WIDE_INT
) XSTR (x
, 0);
1944 if (MEM_VOLATILE_P (x
))
1949 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
1951 hash_arg_in_memory
= 1;
1952 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1954 /* Now that we have already found this special case,
1955 might as well speed it up as much as possible. */
1956 hash
+= (unsigned) MEM
;
1967 case UNSPEC_VOLATILE
:
1972 if (MEM_VOLATILE_P (x
))
1979 i
= GET_RTX_LENGTH (code
) - 1;
1980 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1981 fmt
= GET_RTX_FORMAT (code
);
1986 rtx tem
= XEXP (x
, i
);
1988 /* If we are about to do the last recursive call
1989 needed at this level, change it into iteration.
1990 This function is called enough to be worth it. */
1996 hash
+= canon_hash (tem
, 0);
1998 else if (fmt
[i
] == 'E')
1999 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2000 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
2001 else if (fmt
[i
] == 's')
2003 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
2008 else if (fmt
[i
] == 'i')
2010 register unsigned tem
= XINT (x
, i
);
2019 /* Like canon_hash but with no side effects. */
2024 enum machine_mode mode
;
2026 int save_do_not_record
= do_not_record
;
2027 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2028 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2029 unsigned hash
= canon_hash (x
, mode
);
2030 hash_arg_in_memory
= save_hash_arg_in_memory
;
2031 hash_arg_in_struct
= save_hash_arg_in_struct
;
2032 do_not_record
= save_do_not_record
;
2036 /* Return 1 iff X and Y would canonicalize into the same thing,
2037 without actually constructing the canonicalization of either one.
2038 If VALIDATE is nonzero,
2039 we assume X is an expression being processed from the rtl
2040 and Y was found in the hash table. We check register refs
2041 in Y for being marked as valid.
2043 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2044 that is known to be in the register. Ordinarily, we don't allow them
2045 to match, because letting them match would cause unpredictable results
2046 in all the places that search a hash table chain for an equivalent
2047 for a given value. A possible equivalent that has different structure
2048 has its hash code computed from different data. Whether the hash code
2049 is the same as that of the the given value is pure luck. */
2052 exp_equiv_p (x
, y
, validate
, equal_values
)
2058 register enum rtx_code code
;
2061 /* Note: it is incorrect to assume an expression is equivalent to itself
2062 if VALIDATE is nonzero. */
2063 if (x
== y
&& !validate
)
2065 if (x
== 0 || y
== 0)
2068 code
= GET_CODE (x
);
2069 if (code
!= GET_CODE (y
))
2074 /* If X is a constant and Y is a register or vice versa, they may be
2075 equivalent. We only have to validate if Y is a register. */
2076 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2077 && REGNO_QTY_VALID_P (REGNO (y
))
2078 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2079 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2080 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2083 if (CONSTANT_P (y
) && code
== REG
2084 && REGNO_QTY_VALID_P (REGNO (x
))
2085 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2086 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2092 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2093 if (GET_MODE (x
) != GET_MODE (y
))
2103 return INTVAL (x
) == INTVAL (y
);
2106 return XEXP (x
, 0) == XEXP (y
, 0);
2109 return XSTR (x
, 0) == XSTR (y
, 0);
2113 int regno
= REGNO (y
);
2115 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2116 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2119 /* If the quantities are not the same, the expressions are not
2120 equivalent. If there are and we are not to validate, they
2121 are equivalent. Otherwise, ensure all regs are up-to-date. */
2123 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2129 for (i
= regno
; i
< endregno
; i
++)
2130 if (reg_in_table
[i
] != reg_tick
[i
])
2136 /* For commutative operations, check both orders. */
2144 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2145 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2146 validate
, equal_values
))
2147 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2148 validate
, equal_values
)
2149 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2150 validate
, equal_values
)));
2153 /* Compare the elements. If any pair of corresponding elements
2154 fail to match, return 0 for the whole things. */
2156 fmt
= GET_RTX_FORMAT (code
);
2157 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2162 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2167 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2169 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2170 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2171 validate
, equal_values
))
2176 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2181 if (XINT (x
, i
) != XINT (y
, i
))
2186 if (XWINT (x
, i
) != XWINT (y
, i
))
2201 /* Return 1 iff any subexpression of X matches Y.
2202 Here we do not require that X or Y be valid (for registers referred to)
2203 for being in the hash table. */
2210 register enum rtx_code code
;
2216 if (x
== 0 || y
== 0)
2219 code
= GET_CODE (x
);
2220 /* If X as a whole has the same code as Y, they may match.
2222 if (code
== GET_CODE (y
))
2224 if (exp_equiv_p (x
, y
, 0, 1))
2228 /* X does not match, so try its subexpressions. */
2230 fmt
= GET_RTX_FORMAT (code
);
2231 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2240 if (refers_to_p (XEXP (x
, i
), y
))
2243 else if (fmt
[i
] == 'E')
2246 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2247 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2254 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2255 set PBASE, PSTART, and PEND which correspond to the base of the address,
2256 the starting offset, and ending offset respectively.
2258 ADDR is known to be a nonvarying address. */
2260 /* ??? Despite what the comments say, this function is in fact frequently
2261 passed varying addresses. This does not appear to cause any problems. */
2264 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2268 HOST_WIDE_INT
*pstart
, *pend
;
2271 HOST_WIDE_INT start
, end
;
2277 /* Registers with nonvarying addresses usually have constant equivalents;
2278 but the frame pointer register is also possible. */
2279 if (GET_CODE (base
) == REG
2281 && REGNO_QTY_VALID_P (REGNO (base
))
2282 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2283 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2284 base
= qty_const
[reg_qty
[REGNO (base
)]];
2285 else if (GET_CODE (base
) == PLUS
2286 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2287 && GET_CODE (XEXP (base
, 0)) == REG
2289 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2290 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2291 == GET_MODE (XEXP (base
, 0)))
2292 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2294 start
= INTVAL (XEXP (base
, 1));
2295 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2297 /* This can happen as the result of virtual register instantiation,
2298 if the initial offset is too large to be a valid address. */
2299 else if (GET_CODE (base
) == PLUS
2300 && GET_CODE (XEXP (base
, 0)) == REG
2301 && GET_CODE (XEXP (base
, 1)) == REG
2303 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2304 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2305 == GET_MODE (XEXP (base
, 0)))
2306 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]]
2307 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2308 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 1))]]
2309 == GET_MODE (XEXP (base
, 1)))
2310 && qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]])
2312 rtx tem
= qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]];
2313 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2315 /* One of the two values must be a constant. */
2316 if (GET_CODE (base
) != CONST_INT
)
2318 if (GET_CODE (tem
) != CONST_INT
)
2320 start
= INTVAL (tem
);
2324 start
= INTVAL (base
);
2329 /* Handle everything that we can find inside an address that has been
2330 viewed as constant. */
2334 /* If no part of this switch does a "continue", the code outside
2335 will exit this loop. */
2337 switch (GET_CODE (base
))
2340 /* By definition, operand1 of a LO_SUM is the associated constant
2341 address. Use the associated constant address as the base
2343 base
= XEXP (base
, 1);
2347 /* Strip off CONST. */
2348 base
= XEXP (base
, 0);
2352 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2354 start
+= INTVAL (XEXP (base
, 1));
2355 base
= XEXP (base
, 0);
2361 /* Handle the case of an AND which is the negative of a power of
2362 two. This is used to represent unaligned memory operations. */
2363 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2364 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2366 set_nonvarying_address_components (XEXP (base
, 0), size
,
2367 pbase
, pstart
, pend
);
2369 /* Assume the worst misalignment. START is affected, but not
2370 END, so compensate but adjusting SIZE. Don't lose any
2371 constant we already had. */
2373 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2374 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2384 if (GET_CODE (base
) == CONST_INT
)
2386 start
+= INTVAL (base
);
2392 /* Set the return values. */
2398 /* Return 1 iff any subexpression of X refers to memory
2399 at an address of BASE plus some offset
2400 such that any of the bytes' offsets fall between START (inclusive)
2401 and END (exclusive).
2403 The value is undefined if X is a varying address (as determined by
2404 cse_rtx_addr_varies_p). This function is not used in such cases.
2406 When used in the cse pass, `qty_const' is nonzero, and it is used
2407 to treat an address that is a register with a known constant value
2408 as if it were that constant value.
2409 In the loop pass, `qty_const' is zero, so this is not done. */
2412 refers_to_mem_p (x
, base
, start
, end
)
2414 HOST_WIDE_INT start
, end
;
2416 register HOST_WIDE_INT i
;
2417 register enum rtx_code code
;
2424 code
= GET_CODE (x
);
2427 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2429 HOST_WIDE_INT mystart
, myend
;
2431 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2432 &mybase
, &mystart
, &myend
);
2435 /* refers_to_mem_p is never called with varying addresses.
2436 If the base addresses are not equal, there is no chance
2437 of the memory addresses conflicting. */
2438 if (! rtx_equal_p (mybase
, base
))
2441 return myend
> start
&& mystart
< end
;
2444 /* X does not match, so try its subexpressions. */
2446 fmt
= GET_RTX_FORMAT (code
);
2447 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2456 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2459 else if (fmt
[i
] == 'E')
2462 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2463 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2470 /* Nonzero if X refers to memory at a varying address;
2471 except that a register which has at the moment a known constant value
2472 isn't considered variable. */
2475 cse_rtx_addr_varies_p (x
)
2478 /* We need not check for X and the equivalence class being of the same
2479 mode because if X is equivalent to a constant in some mode, it
2480 doesn't vary in any mode. */
2482 if (GET_CODE (x
) == MEM
2483 && GET_CODE (XEXP (x
, 0)) == REG
2484 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2485 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2486 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2489 if (GET_CODE (x
) == MEM
2490 && GET_CODE (XEXP (x
, 0)) == PLUS
2491 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2492 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2493 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2494 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2495 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2496 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2499 /* This can happen as the result of virtual register instantiation, if
2500 the initial constant is too large to be a valid address. This gives
2501 us a three instruction sequence, load large offset into a register,
2502 load fp minus a constant into a register, then a MEM which is the
2503 sum of the two `constant' registers. */
2504 if (GET_CODE (x
) == MEM
2505 && GET_CODE (XEXP (x
, 0)) == PLUS
2506 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2507 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == REG
2508 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2509 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2510 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2511 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]]
2512 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 1)))
2513 && (GET_MODE (XEXP (XEXP (x
, 0), 1))
2514 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 1))]])
2515 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 1))]])
2518 return rtx_addr_varies_p (x
);
2521 /* Canonicalize an expression:
2522 replace each register reference inside it
2523 with the "oldest" equivalent register.
2525 If INSN is non-zero and we are replacing a pseudo with a hard register
2526 or vice versa, validate_change is used to ensure that INSN remains valid
2527 after we make our substitution. The calls are made with IN_GROUP non-zero
2528 so apply_change_group must be called upon the outermost return from this
2529 function (unless INSN is zero). The result of apply_change_group can
2530 generally be discarded since the changes we are making are optional. */
2538 register enum rtx_code code
;
2544 code
= GET_CODE (x
);
2562 /* Never replace a hard reg, because hard regs can appear
2563 in more than one machine mode, and we must preserve the mode
2564 of each occurrence. Also, some hard regs appear in
2565 MEMs that are shared and mustn't be altered. Don't try to
2566 replace any reg that maps to a reg of class NO_REGS. */
2567 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2568 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2571 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2572 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2573 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2574 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2578 fmt
= GET_RTX_FORMAT (code
);
2579 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2585 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2587 /* If replacing pseudo with hard reg or vice versa, ensure the
2588 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2589 if (insn
!= 0 && new != 0
2590 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2591 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2592 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2593 || insn_n_dups
[recog_memoized (insn
)] > 0))
2594 validate_change (insn
, &XEXP (x
, i
), new, 1);
2598 else if (fmt
[i
] == 'E')
2599 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2600 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2606 /* LOC is a location within INSN that is an operand address (the contents of
2607 a MEM). Find the best equivalent address to use that is valid for this
2610 On most CISC machines, complicated address modes are costly, and rtx_cost
2611 is a good approximation for that cost. However, most RISC machines have
2612 only a few (usually only one) memory reference formats. If an address is
2613 valid at all, it is often just as cheap as any other address. Hence, for
2614 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2615 costs of various addresses. For two addresses of equal cost, choose the one
2616 with the highest `rtx_cost' value as that has the potential of eliminating
2617 the most insns. For equal costs, we choose the first in the equivalence
2618 class. Note that we ignore the fact that pseudo registers are cheaper
2619 than hard registers here because we would also prefer the pseudo registers.
2623 find_best_addr (insn
, loc
)
2627 struct table_elt
*elt
, *p
;
2630 int found_better
= 1;
2631 int save_do_not_record
= do_not_record
;
2632 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2633 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2638 /* Do not try to replace constant addresses or addresses of local and
2639 argument slots. These MEM expressions are made only once and inserted
2640 in many instructions, as well as being used to control symbol table
2641 output. It is not safe to clobber them.
2643 There are some uncommon cases where the address is already in a register
2644 for some reason, but we cannot take advantage of that because we have
2645 no easy way to unshare the MEM. In addition, looking up all stack
2646 addresses is costly. */
2647 if ((GET_CODE (addr
) == PLUS
2648 && GET_CODE (XEXP (addr
, 0)) == REG
2649 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2650 && (regno
= REGNO (XEXP (addr
, 0)),
2651 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2652 || regno
== ARG_POINTER_REGNUM
))
2653 || (GET_CODE (addr
) == REG
2654 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2655 || regno
== HARD_FRAME_POINTER_REGNUM
2656 || regno
== ARG_POINTER_REGNUM
))
2657 || CONSTANT_ADDRESS_P (addr
))
2660 /* If this address is not simply a register, try to fold it. This will
2661 sometimes simplify the expression. Many simplifications
2662 will not be valid, but some, usually applying the associative rule, will
2663 be valid and produce better code. */
2664 if (GET_CODE (addr
) != REG
)
2666 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2670 && (ADDRESS_COST (folded
) < ADDRESS_COST (addr
)
2671 || (ADDRESS_COST (folded
) == ADDRESS_COST (addr
)
2672 && rtx_cost (folded
) > rtx_cost (addr
)))
2674 && rtx_cost (folded
) < rtx_cost (addr
)
2676 && validate_change (insn
, loc
, folded
, 0))
2680 /* If this address is not in the hash table, we can't look for equivalences
2681 of the whole address. Also, ignore if volatile. */
2684 hash
= HASH (addr
, Pmode
);
2685 addr_volatile
= do_not_record
;
2686 do_not_record
= save_do_not_record
;
2687 hash_arg_in_memory
= save_hash_arg_in_memory
;
2688 hash_arg_in_struct
= save_hash_arg_in_struct
;
2693 elt
= lookup (addr
, hash
, Pmode
);
2695 #ifndef ADDRESS_COST
2698 our_cost
= elt
->cost
;
2700 /* Find the lowest cost below ours that works. */
2701 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2702 if (elt
->cost
< our_cost
2703 && (GET_CODE (elt
->exp
) == REG
2704 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2705 && validate_change (insn
, loc
,
2706 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2713 /* We need to find the best (under the criteria documented above) entry
2714 in the class that is valid. We use the `flag' field to indicate
2715 choices that were invalid and iterate until we can't find a better
2716 one that hasn't already been tried. */
2718 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2721 while (found_better
)
2723 int best_addr_cost
= ADDRESS_COST (*loc
);
2724 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2725 struct table_elt
*best_elt
= elt
;
2728 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2730 && (GET_CODE (p
->exp
) == REG
2731 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2732 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2733 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2734 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2737 best_addr_cost
= ADDRESS_COST (p
->exp
);
2738 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2744 if (validate_change (insn
, loc
,
2745 canon_reg (copy_rtx (best_elt
->exp
),
2754 /* If the address is a binary operation with the first operand a register
2755 and the second a constant, do the same as above, but looking for
2756 equivalences of the register. Then try to simplify before checking for
2757 the best address to use. This catches a few cases: First is when we
2758 have REG+const and the register is another REG+const. We can often merge
2759 the constants and eliminate one insn and one register. It may also be
2760 that a machine has a cheap REG+REG+const. Finally, this improves the
2761 code on the Alpha for unaligned byte stores. */
2763 if (flag_expensive_optimizations
2764 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2765 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2766 && GET_CODE (XEXP (*loc
, 0)) == REG
2767 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2769 rtx c
= XEXP (*loc
, 1);
2772 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2773 do_not_record
= save_do_not_record
;
2774 hash_arg_in_memory
= save_hash_arg_in_memory
;
2775 hash_arg_in_struct
= save_hash_arg_in_struct
;
2777 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2781 /* We need to find the best (under the criteria documented above) entry
2782 in the class that is valid. We use the `flag' field to indicate
2783 choices that were invalid and iterate until we can't find a better
2784 one that hasn't already been tried. */
2786 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2789 while (found_better
)
2791 int best_addr_cost
= ADDRESS_COST (*loc
);
2792 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2793 struct table_elt
*best_elt
= elt
;
2794 rtx best_rtx
= *loc
;
2797 /* This is at worst case an O(n^2) algorithm, so limit our search
2798 to the first 32 elements on the list. This avoids trouble
2799 compiling code with very long basic blocks that can easily
2800 call cse_gen_binary so many times that we run out of memory. */
2803 for (p
= elt
->first_same_value
, count
= 0;
2805 p
= p
->next_same_value
, count
++)
2807 && (GET_CODE (p
->exp
) == REG
2808 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2810 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2812 if ((ADDRESS_COST (new) < best_addr_cost
2813 || (ADDRESS_COST (new) == best_addr_cost
2814 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2817 best_addr_cost
= ADDRESS_COST (new);
2818 best_rtx_cost
= (COST (new) + 1) >> 1;
2826 if (validate_change (insn
, loc
,
2827 canon_reg (copy_rtx (best_rtx
),
2838 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2839 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2840 what values are being compared.
2842 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2843 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2844 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2845 compared to produce cc0.
2847 The return value is the comparison operator and is either the code of
2848 A or the code corresponding to the inverse of the comparison. */
2850 static enum rtx_code
2851 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2854 enum machine_mode
*pmode1
, *pmode2
;
2858 arg1
= *parg1
, arg2
= *parg2
;
2860 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2862 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2864 /* Set non-zero when we find something of interest. */
2866 int reverse_code
= 0;
2867 struct table_elt
*p
= 0;
2869 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2870 On machines with CC0, this is the only case that can occur, since
2871 fold_rtx will return the COMPARE or item being compared with zero
2874 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2877 /* If ARG1 is a comparison operator and CODE is testing for
2878 STORE_FLAG_VALUE, get the inner arguments. */
2880 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2883 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2884 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2885 #ifdef FLOAT_STORE_FLAG_VALUE
2886 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2887 && FLOAT_STORE_FLAG_VALUE
< 0)
2892 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2893 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2894 #ifdef FLOAT_STORE_FLAG_VALUE
2895 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2896 && FLOAT_STORE_FLAG_VALUE
< 0)
2899 x
= arg1
, reverse_code
= 1;
2902 /* ??? We could also check for
2904 (ne (and (eq (...) (const_int 1))) (const_int 0))
2906 and related forms, but let's wait until we see them occurring. */
2909 /* Look up ARG1 in the hash table and see if it has an equivalence
2910 that lets us see what is being compared. */
2911 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2913 if (p
) p
= p
->first_same_value
;
2915 for (; p
; p
= p
->next_same_value
)
2917 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2919 /* If the entry isn't valid, skip it. */
2920 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2923 if (GET_CODE (p
->exp
) == COMPARE
2924 /* Another possibility is that this machine has a compare insn
2925 that includes the comparison code. In that case, ARG1 would
2926 be equivalent to a comparison operation that would set ARG1 to
2927 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2928 ORIG_CODE is the actual comparison being done; if it is an EQ,
2929 we must reverse ORIG_CODE. On machine with a negative value
2930 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2933 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2934 && (GET_MODE_BITSIZE (inner_mode
)
2935 <= HOST_BITS_PER_WIDE_INT
)
2936 && (STORE_FLAG_VALUE
2937 & ((HOST_WIDE_INT
) 1
2938 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2939 #ifdef FLOAT_STORE_FLAG_VALUE
2941 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2942 && FLOAT_STORE_FLAG_VALUE
< 0)
2945 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2950 else if ((code
== EQ
2952 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2953 && (GET_MODE_BITSIZE (inner_mode
)
2954 <= HOST_BITS_PER_WIDE_INT
)
2955 && (STORE_FLAG_VALUE
2956 & ((HOST_WIDE_INT
) 1
2957 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2958 #ifdef FLOAT_STORE_FLAG_VALUE
2960 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2961 && FLOAT_STORE_FLAG_VALUE
< 0)
2964 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2971 /* If this is fp + constant, the equivalent is a better operand since
2972 it may let us predict the value of the comparison. */
2973 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2980 /* If we didn't find a useful equivalence for ARG1, we are done.
2981 Otherwise, set up for the next iteration. */
2985 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2986 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2987 code
= GET_CODE (x
);
2990 code
= reverse_condition (code
);
2993 /* Return our results. Return the modes from before fold_rtx
2994 because fold_rtx might produce const_int, and then it's too late. */
2995 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2996 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3001 /* Try to simplify a unary operation CODE whose output mode is to be
3002 MODE with input operand OP whose mode was originally OP_MODE.
3003 Return zero if no simplification can be made. */
3006 simplify_unary_operation (code
, mode
, op
, op_mode
)
3008 enum machine_mode mode
;
3010 enum machine_mode op_mode
;
3012 register int width
= GET_MODE_BITSIZE (mode
);
3014 /* The order of these tests is critical so that, for example, we don't
3015 check the wrong mode (input vs. output) for a conversion operation,
3016 such as FIX. At some point, this should be simplified. */
3018 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3020 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
3021 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3023 HOST_WIDE_INT hv
, lv
;
3026 if (GET_CODE (op
) == CONST_INT
)
3027 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3029 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3031 #ifdef REAL_ARITHMETIC
3032 REAL_VALUE_FROM_INT (d
, lv
, hv
, mode
);
3036 d
= (double) (~ hv
);
3037 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3038 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3039 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
3045 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3046 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3047 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3049 #endif /* REAL_ARITHMETIC */
3050 d
= real_value_truncate (mode
, d
);
3051 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3053 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
3054 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3056 HOST_WIDE_INT hv
, lv
;
3059 if (GET_CODE (op
) == CONST_INT
)
3060 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3062 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3064 if (op_mode
== VOIDmode
)
3066 /* We don't know how to interpret negative-looking numbers in
3067 this case, so don't try to fold those. */
3071 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
3074 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
3076 #ifdef REAL_ARITHMETIC
3077 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
, mode
);
3080 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3081 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3082 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3083 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3084 #endif /* REAL_ARITHMETIC */
3085 d
= real_value_truncate (mode
, d
);
3086 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3090 if (GET_CODE (op
) == CONST_INT
3091 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3093 register HOST_WIDE_INT arg0
= INTVAL (op
);
3094 register HOST_WIDE_INT val
;
3107 val
= (arg0
>= 0 ? arg0
: - arg0
);
3111 /* Don't use ffs here. Instead, get low order bit and then its
3112 number. If arg0 is zero, this will return 0, as desired. */
3113 arg0
&= GET_MODE_MASK (mode
);
3114 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3122 if (op_mode
== VOIDmode
)
3124 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3126 /* If we were really extending the mode,
3127 we would have to distinguish between zero-extension
3128 and sign-extension. */
3129 if (width
!= GET_MODE_BITSIZE (op_mode
))
3133 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3134 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3140 if (op_mode
== VOIDmode
)
3142 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3144 /* If we were really extending the mode,
3145 we would have to distinguish between zero-extension
3146 and sign-extension. */
3147 if (width
!= GET_MODE_BITSIZE (op_mode
))
3151 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3154 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3156 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3157 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3170 /* Clear the bits that don't belong in our mode,
3171 unless they and our sign bit are all one.
3172 So we get either a reasonable negative value or a reasonable
3173 unsigned value for this mode. */
3174 if (width
< HOST_BITS_PER_WIDE_INT
3175 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3176 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3177 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3179 return GEN_INT (val
);
3182 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3183 for a DImode operation on a CONST_INT. */
3184 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3185 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3187 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3189 if (GET_CODE (op
) == CONST_DOUBLE
)
3190 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3192 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3202 neg_double (l1
, h1
, &lv
, &hv
);
3207 neg_double (l1
, h1
, &lv
, &hv
);
3215 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3217 lv
= exact_log2 (l1
& (-l1
)) + 1;
3221 /* This is just a change-of-mode, so do nothing. */
3226 if (op_mode
== VOIDmode
3227 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3231 lv
= l1
& GET_MODE_MASK (op_mode
);
3235 if (op_mode
== VOIDmode
3236 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3240 lv
= l1
& GET_MODE_MASK (op_mode
);
3241 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3242 && (lv
& ((HOST_WIDE_INT
) 1
3243 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3244 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3246 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3257 return immed_double_const (lv
, hv
, mode
);
3260 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3261 else if (GET_CODE (op
) == CONST_DOUBLE
3262 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3268 if (setjmp (handler
))
3269 /* There used to be a warning here, but that is inadvisable.
3270 People may want to cause traps, and the natural way
3271 to do it should not get a warning. */
3274 set_float_handler (handler
);
3276 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3281 d
= REAL_VALUE_NEGATE (d
);
3285 if (REAL_VALUE_NEGATIVE (d
))
3286 d
= REAL_VALUE_NEGATE (d
);
3289 case FLOAT_TRUNCATE
:
3290 d
= real_value_truncate (mode
, d
);
3294 /* All this does is change the mode. */
3298 d
= REAL_VALUE_RNDZINT (d
);
3302 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3312 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3313 set_float_handler (NULL_PTR
);
3317 else if (GET_CODE (op
) == CONST_DOUBLE
3318 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3319 && GET_MODE_CLASS (mode
) == MODE_INT
3320 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3326 if (setjmp (handler
))
3329 set_float_handler (handler
);
3331 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3336 val
= REAL_VALUE_FIX (d
);
3340 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3347 set_float_handler (NULL_PTR
);
3349 /* Clear the bits that don't belong in our mode,
3350 unless they and our sign bit are all one.
3351 So we get either a reasonable negative value or a reasonable
3352 unsigned value for this mode. */
3353 if (width
< HOST_BITS_PER_WIDE_INT
3354 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3355 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3356 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3358 /* If this would be an entire word for the target, but is not for
3359 the host, then sign-extend on the host so that the number will look
3360 the same way on the host that it would on the target.
3362 For example, when building a 64 bit alpha hosted 32 bit sparc
3363 targeted compiler, then we want the 32 bit unsigned value -1 to be
3364 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3365 The later confuses the sparc backend. */
3367 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
3368 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
3369 val
|= ((HOST_WIDE_INT
) (-1) << width
);
3371 return GEN_INT (val
);
3374 /* This was formerly used only for non-IEEE float.
3375 eggert@twinsun.com says it is safe for IEEE also. */
3378 /* There are some simplifications we can do even if the operands
3384 /* (not (not X)) == X, similarly for NEG. */
3385 if (GET_CODE (op
) == code
)
3386 return XEXP (op
, 0);
3390 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3391 becomes just the MINUS if its mode is MODE. This allows
3392 folding switch statements on machines using casesi (such as
3394 if (GET_CODE (op
) == TRUNCATE
3395 && GET_MODE (XEXP (op
, 0)) == mode
3396 && GET_CODE (XEXP (op
, 0)) == MINUS
3397 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3398 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3399 return XEXP (op
, 0);
3401 #ifdef POINTERS_EXTEND_UNSIGNED
3402 if (! POINTERS_EXTEND_UNSIGNED
3403 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3405 return convert_memory_address (Pmode
, op
);
3409 #ifdef POINTERS_EXTEND_UNSIGNED
3411 if (POINTERS_EXTEND_UNSIGNED
3412 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3414 return convert_memory_address (Pmode
, op
);
3423 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3424 and OP1. Return 0 if no simplification is possible.
3426 Don't use this for relational operations such as EQ or LT.
3427 Use simplify_relational_operation instead. */
3430 simplify_binary_operation (code
, mode
, op0
, op1
)
3432 enum machine_mode mode
;
3435 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3437 int width
= GET_MODE_BITSIZE (mode
);
3440 /* Relational operations don't work here. We must know the mode
3441 of the operands in order to do the comparison correctly.
3442 Assuming a full word can give incorrect results.
3443 Consider comparing 128 with -128 in QImode. */
3445 if (GET_RTX_CLASS (code
) == '<')
3448 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3449 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3450 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3451 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3453 REAL_VALUE_TYPE f0
, f1
, value
;
3456 if (setjmp (handler
))
3459 set_float_handler (handler
);
3461 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3462 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3463 f0
= real_value_truncate (mode
, f0
);
3464 f1
= real_value_truncate (mode
, f1
);
3466 #ifdef REAL_ARITHMETIC
3467 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3481 #ifndef REAL_INFINITY
3488 value
= MIN (f0
, f1
);
3491 value
= MAX (f0
, f1
);
3498 value
= real_value_truncate (mode
, value
);
3499 set_float_handler (NULL_PTR
);
3500 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3502 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3504 /* We can fold some multi-word operations. */
3505 if (GET_MODE_CLASS (mode
) == MODE_INT
3506 && width
== HOST_BITS_PER_WIDE_INT
* 2
3507 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3508 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3510 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3512 if (GET_CODE (op0
) == CONST_DOUBLE
)
3513 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3515 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3517 if (GET_CODE (op1
) == CONST_DOUBLE
)
3518 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3520 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3525 /* A - B == A + (-B). */
3526 neg_double (l2
, h2
, &lv
, &hv
);
3529 /* .. fall through ... */
3532 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3536 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3539 case DIV
: case MOD
: case UDIV
: case UMOD
:
3540 /* We'd need to include tree.h to do this and it doesn't seem worth
3545 lv
= l1
& l2
, hv
= h1
& h2
;
3549 lv
= l1
| l2
, hv
= h1
| h2
;
3553 lv
= l1
^ l2
, hv
= h1
^ h2
;
3559 && ((unsigned HOST_WIDE_INT
) l1
3560 < (unsigned HOST_WIDE_INT
) l2
)))
3569 && ((unsigned HOST_WIDE_INT
) l1
3570 > (unsigned HOST_WIDE_INT
) l2
)))
3577 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3579 && ((unsigned HOST_WIDE_INT
) l1
3580 < (unsigned HOST_WIDE_INT
) l2
)))
3587 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3589 && ((unsigned HOST_WIDE_INT
) l1
3590 > (unsigned HOST_WIDE_INT
) l2
)))
3596 case LSHIFTRT
: case ASHIFTRT
:
3598 case ROTATE
: case ROTATERT
:
3599 #ifdef SHIFT_COUNT_TRUNCATED
3600 if (SHIFT_COUNT_TRUNCATED
)
3601 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3604 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3607 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3608 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3610 else if (code
== ASHIFT
)
3611 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3612 else if (code
== ROTATE
)
3613 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3614 else /* code == ROTATERT */
3615 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3622 return immed_double_const (lv
, hv
, mode
);
3625 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3626 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3628 /* Even if we can't compute a constant result,
3629 there are some cases worth simplifying. */
3634 /* In IEEE floating point, x+0 is not the same as x. Similarly
3635 for the other optimizations below. */
3636 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3637 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3640 if (op1
== CONST0_RTX (mode
))
3643 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3644 if (GET_CODE (op0
) == NEG
)
3645 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3646 else if (GET_CODE (op1
) == NEG
)
3647 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3649 /* Handle both-operands-constant cases. We can only add
3650 CONST_INTs to constants since the sum of relocatable symbols
3651 can't be handled by most assemblers. Don't add CONST_INT
3652 to CONST_INT since overflow won't be computed properly if wider
3653 than HOST_BITS_PER_WIDE_INT. */
3655 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3656 && GET_CODE (op1
) == CONST_INT
)
3657 return plus_constant (op0
, INTVAL (op1
));
3658 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3659 && GET_CODE (op0
) == CONST_INT
)
3660 return plus_constant (op1
, INTVAL (op0
));
3662 /* See if this is something like X * C - X or vice versa or
3663 if the multiplication is written as a shift. If so, we can
3664 distribute and make a new multiply, shift, or maybe just
3665 have X (if C is 2 in the example above). But don't make
3666 real multiply if we didn't have one before. */
3668 if (! FLOAT_MODE_P (mode
))
3670 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3671 rtx lhs
= op0
, rhs
= op1
;
3674 if (GET_CODE (lhs
) == NEG
)
3675 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3676 else if (GET_CODE (lhs
) == MULT
3677 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3679 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3682 else if (GET_CODE (lhs
) == ASHIFT
3683 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3684 && INTVAL (XEXP (lhs
, 1)) >= 0
3685 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3687 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3688 lhs
= XEXP (lhs
, 0);
3691 if (GET_CODE (rhs
) == NEG
)
3692 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3693 else if (GET_CODE (rhs
) == MULT
3694 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3696 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3699 else if (GET_CODE (rhs
) == ASHIFT
3700 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3701 && INTVAL (XEXP (rhs
, 1)) >= 0
3702 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3704 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3705 rhs
= XEXP (rhs
, 0);
3708 if (rtx_equal_p (lhs
, rhs
))
3710 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3711 GEN_INT (coeff0
+ coeff1
));
3712 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3716 /* If one of the operands is a PLUS or a MINUS, see if we can
3717 simplify this by the associative law.
3718 Don't use the associative law for floating point.
3719 The inaccuracy makes it nonassociative,
3720 and subtle programs can break if operations are associated. */
3722 if (INTEGRAL_MODE_P (mode
)
3723 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3724 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3725 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3731 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3732 using cc0, in which case we want to leave it as a COMPARE
3733 so we can distinguish it from a register-register-copy.
3735 In IEEE floating point, x-0 is not the same as x. */
3737 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3738 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3739 && op1
== CONST0_RTX (mode
))
3742 /* Do nothing here. */
3747 /* None of these optimizations can be done for IEEE
3749 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3750 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3753 /* We can't assume x-x is 0 even with non-IEEE floating point,
3754 but since it is zero except in very strange circumstances, we
3755 will treat it as zero with -ffast-math. */
3756 if (rtx_equal_p (op0
, op1
)
3757 && ! side_effects_p (op0
)
3758 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3759 return CONST0_RTX (mode
);
3761 /* Change subtraction from zero into negation. */
3762 if (op0
== CONST0_RTX (mode
))
3763 return gen_rtx (NEG
, mode
, op1
);
3765 /* (-1 - a) is ~a. */
3766 if (op0
== constm1_rtx
)
3767 return gen_rtx (NOT
, mode
, op1
);
3769 /* Subtracting 0 has no effect. */
3770 if (op1
== CONST0_RTX (mode
))
3773 /* See if this is something like X * C - X or vice versa or
3774 if the multiplication is written as a shift. If so, we can
3775 distribute and make a new multiply, shift, or maybe just
3776 have X (if C is 2 in the example above). But don't make
3777 real multiply if we didn't have one before. */
3779 if (! FLOAT_MODE_P (mode
))
3781 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3782 rtx lhs
= op0
, rhs
= op1
;
3785 if (GET_CODE (lhs
) == NEG
)
3786 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3787 else if (GET_CODE (lhs
) == MULT
3788 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3790 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3793 else if (GET_CODE (lhs
) == ASHIFT
3794 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3795 && INTVAL (XEXP (lhs
, 1)) >= 0
3796 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3798 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3799 lhs
= XEXP (lhs
, 0);
3802 if (GET_CODE (rhs
) == NEG
)
3803 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3804 else if (GET_CODE (rhs
) == MULT
3805 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3807 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3810 else if (GET_CODE (rhs
) == ASHIFT
3811 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3812 && INTVAL (XEXP (rhs
, 1)) >= 0
3813 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3815 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3816 rhs
= XEXP (rhs
, 0);
3819 if (rtx_equal_p (lhs
, rhs
))
3821 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3822 GEN_INT (coeff0
- coeff1
));
3823 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3827 /* (a - (-b)) -> (a + b). */
3828 if (GET_CODE (op1
) == NEG
)
3829 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3831 /* If one of the operands is a PLUS or a MINUS, see if we can
3832 simplify this by the associative law.
3833 Don't use the associative law for floating point.
3834 The inaccuracy makes it nonassociative,
3835 and subtle programs can break if operations are associated. */
3837 if (INTEGRAL_MODE_P (mode
)
3838 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3839 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3840 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3843 /* Don't let a relocatable value get a negative coeff. */
3844 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3845 return plus_constant (op0
, - INTVAL (op1
));
3847 /* (x - (x & y)) -> (x & ~y) */
3848 if (GET_CODE (op1
) == AND
)
3850 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
3851 return cse_gen_binary (AND
, mode
, op0
, gen_rtx (NOT
, mode
, XEXP (op1
, 1)));
3852 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
3853 return cse_gen_binary (AND
, mode
, op0
, gen_rtx (NOT
, mode
, XEXP (op1
, 0)));
3858 if (op1
== constm1_rtx
)
3860 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3862 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3865 /* In IEEE floating point, x*0 is not always 0. */
3866 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3867 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3868 && op1
== CONST0_RTX (mode
)
3869 && ! side_effects_p (op0
))
3872 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3873 However, ANSI says we can drop signals,
3874 so we can do this anyway. */
3875 if (op1
== CONST1_RTX (mode
))
3878 /* Convert multiply by constant power of two into shift unless
3879 we are still generating RTL. This test is a kludge. */
3880 if (GET_CODE (op1
) == CONST_INT
3881 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3882 /* If the mode is larger than the host word size, and the
3883 uppermost bit is set, then this isn't a power of two due
3884 to implicit sign extension. */
3885 && (width
<= HOST_BITS_PER_WIDE_INT
3886 || val
!= HOST_BITS_PER_WIDE_INT
- 1)
3887 && ! rtx_equal_function_value_matters
)
3888 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3890 if (GET_CODE (op1
) == CONST_DOUBLE
3891 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3895 int op1is2
, op1ism1
;
3897 if (setjmp (handler
))
3900 set_float_handler (handler
);
3901 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3902 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3903 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3904 set_float_handler (NULL_PTR
);
3906 /* x*2 is x+x and x*(-1) is -x */
3907 if (op1is2
&& GET_MODE (op0
) == mode
)
3908 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3910 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3911 return gen_rtx (NEG
, mode
, op0
);
3916 if (op1
== const0_rtx
)
3918 if (GET_CODE (op1
) == CONST_INT
3919 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3921 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3923 /* A | (~A) -> -1 */
3924 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3925 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3926 && ! side_effects_p (op0
)
3927 && GET_MODE_CLASS (mode
) != MODE_CC
)
3932 if (op1
== const0_rtx
)
3934 if (GET_CODE (op1
) == CONST_INT
3935 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3936 return gen_rtx (NOT
, mode
, op0
);
3937 if (op0
== op1
&& ! side_effects_p (op0
)
3938 && GET_MODE_CLASS (mode
) != MODE_CC
)
3943 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3945 if (GET_CODE (op1
) == CONST_INT
3946 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3948 if (op0
== op1
&& ! side_effects_p (op0
)
3949 && GET_MODE_CLASS (mode
) != MODE_CC
)
3952 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3953 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3954 && ! side_effects_p (op0
)
3955 && GET_MODE_CLASS (mode
) != MODE_CC
)
3960 /* Convert divide by power of two into shift (divide by 1 handled
3962 if (GET_CODE (op1
) == CONST_INT
3963 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3964 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3966 /* ... fall through ... */
3969 if (op1
== CONST1_RTX (mode
))
3972 /* In IEEE floating point, 0/x is not always 0. */
3973 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3974 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3975 && op0
== CONST0_RTX (mode
)
3976 && ! side_effects_p (op1
))
3979 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3980 /* Change division by a constant into multiplication. Only do
3981 this with -ffast-math until an expert says it is safe in
3983 else if (GET_CODE (op1
) == CONST_DOUBLE
3984 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3985 && op1
!= CONST0_RTX (mode
)
3989 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3991 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3993 #if defined (REAL_ARITHMETIC)
3994 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3995 return gen_rtx (MULT
, mode
, op0
,
3996 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3998 return gen_rtx (MULT
, mode
, op0
,
3999 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
4007 /* Handle modulus by power of two (mod with 1 handled below). */
4008 if (GET_CODE (op1
) == CONST_INT
4009 && exact_log2 (INTVAL (op1
)) > 0)
4010 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
4012 /* ... fall through ... */
4015 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
4016 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
4022 /* Rotating ~0 always results in ~0. */
4023 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
4024 && INTVAL (op0
) == GET_MODE_MASK (mode
)
4025 && ! side_effects_p (op1
))
4028 /* ... fall through ... */
4033 if (op1
== const0_rtx
)
4035 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
4040 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4041 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
4042 && ! side_effects_p (op0
))
4044 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4049 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4051 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
4052 && ! side_effects_p (op0
))
4054 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4059 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4061 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4066 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
4068 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4079 /* Get the integer argument values in two forms:
4080 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4082 arg0
= INTVAL (op0
);
4083 arg1
= INTVAL (op1
);
4085 if (width
< HOST_BITS_PER_WIDE_INT
)
4087 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4088 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4091 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4092 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4095 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4096 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4104 /* Compute the value of the arithmetic. */
4109 val
= arg0s
+ arg1s
;
4113 val
= arg0s
- arg1s
;
4117 val
= arg0s
* arg1s
;
4123 val
= arg0s
/ arg1s
;
4129 val
= arg0s
% arg1s
;
4135 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4141 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4157 /* If shift count is undefined, don't fold it; let the machine do
4158 what it wants. But truncate it if the machine will do that. */
4162 #ifdef SHIFT_COUNT_TRUNCATED
4163 if (SHIFT_COUNT_TRUNCATED
)
4167 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4174 #ifdef SHIFT_COUNT_TRUNCATED
4175 if (SHIFT_COUNT_TRUNCATED
)
4179 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4186 #ifdef SHIFT_COUNT_TRUNCATED
4187 if (SHIFT_COUNT_TRUNCATED
)
4191 val
= arg0s
>> arg1
;
4193 /* Bootstrap compiler may not have sign extended the right shift.
4194 Manually extend the sign to insure bootstrap cc matches gcc. */
4195 if (arg0s
< 0 && arg1
> 0)
4196 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4205 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4206 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4214 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4215 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4219 /* Do nothing here. */
4223 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4227 val
= ((unsigned HOST_WIDE_INT
) arg0
4228 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4232 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4236 val
= ((unsigned HOST_WIDE_INT
) arg0
4237 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4244 /* Clear the bits that don't belong in our mode, unless they and our sign
4245 bit are all one. So we get either a reasonable negative value or a
4246 reasonable unsigned value for this mode. */
4247 if (width
< HOST_BITS_PER_WIDE_INT
4248 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4249 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4250 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4252 /* If this would be an entire word for the target, but is not for
4253 the host, then sign-extend on the host so that the number will look
4254 the same way on the host that it would on the target.
4256 For example, when building a 64 bit alpha hosted 32 bit sparc
4257 targeted compiler, then we want the 32 bit unsigned value -1 to be
4258 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4259 The later confuses the sparc backend. */
4261 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
4262 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
4263 val
|= ((HOST_WIDE_INT
) (-1) << width
);
4265 return GEN_INT (val
);
4268 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4271 Rather than test for specific case, we do this by a brute-force method
4272 and do all possible simplifications until no more changes occur. Then
4273 we rebuild the operation. */
4276 simplify_plus_minus (code
, mode
, op0
, op1
)
4278 enum machine_mode mode
;
4284 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4285 int first
= 1, negate
= 0, changed
;
4288 bzero ((char *) ops
, sizeof ops
);
4290 /* Set up the two operands and then expand them until nothing has been
4291 changed. If we run out of room in our array, give up; this should
4292 almost never happen. */
4294 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4301 for (i
= 0; i
< n_ops
; i
++)
4302 switch (GET_CODE (ops
[i
]))
4309 ops
[n_ops
] = XEXP (ops
[i
], 1);
4310 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4311 ops
[i
] = XEXP (ops
[i
], 0);
4317 ops
[i
] = XEXP (ops
[i
], 0);
4318 negs
[i
] = ! negs
[i
];
4323 ops
[i
] = XEXP (ops
[i
], 0);
4329 /* ~a -> (-a - 1) */
4332 ops
[n_ops
] = constm1_rtx
;
4333 negs
[n_ops
++] = negs
[i
];
4334 ops
[i
] = XEXP (ops
[i
], 0);
4335 negs
[i
] = ! negs
[i
];
4342 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4347 /* If we only have two operands, we can't do anything. */
4351 /* Now simplify each pair of operands until nothing changes. The first
4352 time through just simplify constants against each other. */
4359 for (i
= 0; i
< n_ops
- 1; i
++)
4360 for (j
= i
+ 1; j
< n_ops
; j
++)
4361 if (ops
[i
] != 0 && ops
[j
] != 0
4362 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4364 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4365 enum rtx_code ncode
= PLUS
;
4367 if (negs
[i
] && ! negs
[j
])
4368 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4369 else if (! negs
[i
] && negs
[j
])
4372 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4375 ops
[i
] = tem
, ops
[j
] = 0;
4376 negs
[i
] = negs
[i
] && negs
[j
];
4377 if (GET_CODE (tem
) == NEG
)
4378 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4380 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4381 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4389 /* Pack all the operands to the lower-numbered entries and give up if
4390 we didn't reduce the number of operands we had. Make sure we
4391 count a CONST as two operands. If we have the same number of
4392 operands, but have made more CONSTs than we had, this is also
4393 an improvement, so accept it. */
4395 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4398 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4399 if (GET_CODE (ops
[j
]) == CONST
)
4403 if (i
+ n_consts
> input_ops
4404 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4409 /* If we have a CONST_INT, put it last. */
4410 for (i
= 0; i
< n_ops
- 1; i
++)
4411 if (GET_CODE (ops
[i
]) == CONST_INT
)
4413 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4414 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4417 /* Put a non-negated operand first. If there aren't any, make all
4418 operands positive and negate the whole thing later. */
4419 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4424 for (i
= 0; i
< n_ops
; i
++)
4430 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4431 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4434 /* Now make the result by performing the requested operations. */
4436 for (i
= 1; i
< n_ops
; i
++)
4437 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4439 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4442 /* Make a binary operation by properly ordering the operands and
4443 seeing if the expression folds. */
4446 cse_gen_binary (code
, mode
, op0
, op1
)
4448 enum machine_mode mode
;
4453 /* Put complex operands first and constants second if commutative. */
4454 if (GET_RTX_CLASS (code
) == 'c'
4455 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4456 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4457 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4458 || (GET_CODE (op0
) == SUBREG
4459 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4460 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4461 tem
= op0
, op0
= op1
, op1
= tem
;
4463 /* If this simplifies, do it. */
4464 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4469 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4470 just form the operation. */
4472 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4473 && GET_MODE (op0
) != VOIDmode
)
4474 return plus_constant (op0
, INTVAL (op1
));
4475 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4476 && GET_MODE (op0
) != VOIDmode
)
4477 return plus_constant (op0
, - INTVAL (op1
));
4479 return gen_rtx (code
, mode
, op0
, op1
);
4482 /* Like simplify_binary_operation except used for relational operators.
4483 MODE is the mode of the operands, not that of the result. If MODE
4484 is VOIDmode, both operands must also be VOIDmode and we compare the
4485 operands in "infinite precision".
4487 If no simplification is possible, this function returns zero. Otherwise,
4488 it returns either const_true_rtx or const0_rtx. */
4491 simplify_relational_operation (code
, mode
, op0
, op1
)
4493 enum machine_mode mode
;
4496 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4499 /* If op0 is a compare, extract the comparison arguments from it. */
4500 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4501 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4503 /* We can't simplify MODE_CC values since we don't know what the
4504 actual comparison is. */
4505 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4512 /* For integer comparisons of A and B maybe we can simplify A - B and can
4513 then simplify a comparison of that with zero. If A and B are both either
4514 a register or a CONST_INT, this can't help; testing for these cases will
4515 prevent infinite recursion here and speed things up.
4517 If CODE is an unsigned comparison, then we can never do this optimization,
4518 because it gives an incorrect result if the subtraction wraps around zero.
4519 ANSI C defines unsigned operations such that they never overflow, and
4520 thus such cases can not be ignored. */
4522 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4523 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4524 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4525 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4526 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4527 return simplify_relational_operation (signed_condition (code
),
4528 mode
, tem
, const0_rtx
);
4530 /* For non-IEEE floating-point, if the two operands are equal, we know the
4532 if (rtx_equal_p (op0
, op1
)
4533 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4534 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4535 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4537 /* If the operands are floating-point constants, see if we can fold
4539 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4540 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4541 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4543 REAL_VALUE_TYPE d0
, d1
;
4546 if (setjmp (handler
))
4549 set_float_handler (handler
);
4550 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4551 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4552 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4553 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4554 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4555 set_float_handler (NULL_PTR
);
4557 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4559 /* Otherwise, see if the operands are both integers. */
4560 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4561 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4562 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4564 int width
= GET_MODE_BITSIZE (mode
);
4565 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4566 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4568 /* Get the two words comprising each integer constant. */
4569 if (GET_CODE (op0
) == CONST_DOUBLE
)
4571 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4572 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4576 l0u
= l0s
= INTVAL (op0
);
4577 h0u
= 0, h0s
= l0s
< 0 ? -1 : 0;
4580 if (GET_CODE (op1
) == CONST_DOUBLE
)
4582 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4583 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4587 l1u
= l1s
= INTVAL (op1
);
4588 h1u
= 0, h1s
= l1s
< 0 ? -1 : 0;
4591 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4592 we have to sign or zero-extend the values. */
4593 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4594 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4596 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4598 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4599 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4601 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4602 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4604 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4605 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4608 equal
= (h0u
== h1u
&& l0u
== l1u
);
4609 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4610 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4611 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4612 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4615 /* Otherwise, there are some code-specific tests we can make. */
4621 /* References to the frame plus a constant or labels cannot
4622 be zero, but a SYMBOL_REF can due to #pragma weak. */
4623 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4624 || GET_CODE (op0
) == LABEL_REF
)
4625 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4626 /* On some machines, the ap reg can be 0 sometimes. */
4627 && op0
!= arg_pointer_rtx
4634 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4635 || GET_CODE (op0
) == LABEL_REF
)
4636 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4637 && op0
!= arg_pointer_rtx
4640 return const_true_rtx
;
4644 /* Unsigned values are never negative. */
4645 if (op1
== const0_rtx
)
4646 return const_true_rtx
;
4650 if (op1
== const0_rtx
)
4655 /* Unsigned values are never greater than the largest
4657 if (GET_CODE (op1
) == CONST_INT
4658 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4659 && INTEGRAL_MODE_P (mode
))
4660 return const_true_rtx
;
4664 if (GET_CODE (op1
) == CONST_INT
4665 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4666 && INTEGRAL_MODE_P (mode
))
4674 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4679 return equal
? const_true_rtx
: const0_rtx
;
4681 return ! equal
? const_true_rtx
: const0_rtx
;
4683 return op0lt
? const_true_rtx
: const0_rtx
;
4685 return op1lt
? const_true_rtx
: const0_rtx
;
4687 return op0ltu
? const_true_rtx
: const0_rtx
;
4689 return op1ltu
? const_true_rtx
: const0_rtx
;
4691 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4693 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4695 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4697 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4703 /* Simplify CODE, an operation with result mode MODE and three operands,
4704 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4705 a constant. Return 0 if no simplifications is possible. */
4708 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4710 enum machine_mode mode
, op0_mode
;
4713 int width
= GET_MODE_BITSIZE (mode
);
4715 /* VOIDmode means "infinite" precision. */
4717 width
= HOST_BITS_PER_WIDE_INT
;
4723 if (GET_CODE (op0
) == CONST_INT
4724 && GET_CODE (op1
) == CONST_INT
4725 && GET_CODE (op2
) == CONST_INT
4726 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4727 && width
<= HOST_BITS_PER_WIDE_INT
)
4729 /* Extracting a bit-field from a constant */
4730 HOST_WIDE_INT val
= INTVAL (op0
);
4732 if (BITS_BIG_ENDIAN
)
4733 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4734 - INTVAL (op2
) - INTVAL (op1
));
4736 val
>>= INTVAL (op2
);
4738 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4740 /* First zero-extend. */
4741 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4742 /* If desired, propagate sign bit. */
4743 if (code
== SIGN_EXTRACT
4744 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4745 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4748 /* Clear the bits that don't belong in our mode,
4749 unless they and our sign bit are all one.
4750 So we get either a reasonable negative value or a reasonable
4751 unsigned value for this mode. */
4752 if (width
< HOST_BITS_PER_WIDE_INT
4753 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4754 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4755 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4757 return GEN_INT (val
);
4762 if (GET_CODE (op0
) == CONST_INT
)
4763 return op0
!= const0_rtx
? op1
: op2
;
4773 /* If X is a nontrivial arithmetic operation on an argument
4774 for which a constant value can be determined, return
4775 the result of operating on that value, as a constant.
4776 Otherwise, return X, possibly with one or more operands
4777 modified by recursive calls to this function.
4779 If X is a register whose contents are known, we do NOT
4780 return those contents here. equiv_constant is called to
4783 INSN is the insn that we may be modifying. If it is 0, make a copy
4784 of X before modifying it. */
4791 register enum rtx_code code
;
4792 register enum machine_mode mode
;
4799 /* Folded equivalents of first two operands of X. */
4803 /* Constant equivalents of first three operands of X;
4804 0 when no such equivalent is known. */
4809 /* The mode of the first operand of X. We need this for sign and zero
4811 enum machine_mode mode_arg0
;
4816 mode
= GET_MODE (x
);
4817 code
= GET_CODE (x
);
4826 /* No use simplifying an EXPR_LIST
4827 since they are used only for lists of args
4828 in a function call's REG_EQUAL note. */
4834 return prev_insn_cc0
;
4838 /* If the next insn is a CODE_LABEL followed by a jump table,
4839 PC's value is a LABEL_REF pointing to that label. That
4840 lets us fold switch statements on the Vax. */
4841 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4843 rtx next
= next_nonnote_insn (insn
);
4845 if (next
&& GET_CODE (next
) == CODE_LABEL
4846 && NEXT_INSN (next
) != 0
4847 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4848 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4849 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4850 return gen_rtx (LABEL_REF
, Pmode
, next
);
4855 /* See if we previously assigned a constant value to this SUBREG. */
4856 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4857 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4860 /* If this is a paradoxical SUBREG, we have no idea what value the
4861 extra bits would have. However, if the operand is equivalent
4862 to a SUBREG whose operand is the same as our mode, and all the
4863 modes are within a word, we can just use the inner operand
4864 because these SUBREGs just say how to treat the register.
4866 Similarly if we find an integer constant. */
4868 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4870 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4871 struct table_elt
*elt
;
4873 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4874 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4875 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4877 for (elt
= elt
->first_same_value
;
4878 elt
; elt
= elt
->next_same_value
)
4880 if (CONSTANT_P (elt
->exp
)
4881 && GET_MODE (elt
->exp
) == VOIDmode
)
4884 if (GET_CODE (elt
->exp
) == SUBREG
4885 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4886 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4887 return copy_rtx (SUBREG_REG (elt
->exp
));
4893 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4894 We might be able to if the SUBREG is extracting a single word in an
4895 integral mode or extracting the low part. */
4897 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4898 const_arg0
= equiv_constant (folded_arg0
);
4900 folded_arg0
= const_arg0
;
4902 if (folded_arg0
!= SUBREG_REG (x
))
4906 if (GET_MODE_CLASS (mode
) == MODE_INT
4907 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4908 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4909 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4910 GET_MODE (SUBREG_REG (x
)));
4911 if (new == 0 && subreg_lowpart_p (x
))
4912 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4917 /* If this is a narrowing SUBREG and our operand is a REG, see if
4918 we can find an equivalence for REG that is an arithmetic operation
4919 in a wider mode where both operands are paradoxical SUBREGs
4920 from objects of our result mode. In that case, we couldn't report
4921 an equivalent value for that operation, since we don't know what the
4922 extra bits will be. But we can find an equivalence for this SUBREG
4923 by folding that operation is the narrow mode. This allows us to
4924 fold arithmetic in narrow modes when the machine only supports
4925 word-sized arithmetic.
4927 Also look for a case where we have a SUBREG whose operand is the
4928 same as our result. If both modes are smaller than a word, we
4929 are simply interpreting a register in different modes and we
4930 can use the inner value. */
4932 if (GET_CODE (folded_arg0
) == REG
4933 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4934 && subreg_lowpart_p (x
))
4936 struct table_elt
*elt
;
4938 /* We can use HASH here since we know that canon_hash won't be
4940 elt
= lookup (folded_arg0
,
4941 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4942 GET_MODE (folded_arg0
));
4945 elt
= elt
->first_same_value
;
4947 for (; elt
; elt
= elt
->next_same_value
)
4949 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4951 /* Just check for unary and binary operations. */
4952 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4953 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4954 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4955 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4956 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4958 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4960 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4961 op0
= fold_rtx (op0
, NULL_RTX
);
4963 op0
= equiv_constant (op0
);
4965 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4968 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4969 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4970 && eltcode
!= DIV
&& eltcode
!= MOD
4971 && eltcode
!= UDIV
&& eltcode
!= UMOD
4972 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4973 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4974 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4975 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4977 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4978 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4979 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4981 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4983 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4984 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4986 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4987 op0
= fold_rtx (op0
, NULL_RTX
);
4990 op0
= equiv_constant (op0
);
4992 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4993 op1
= fold_rtx (op1
, NULL_RTX
);
4996 op1
= equiv_constant (op1
);
4998 /* If we are looking for the low SImode part of
4999 (ashift:DI c (const_int 32)), it doesn't work
5000 to compute that in SImode, because a 32-bit shift
5001 in SImode is unpredictable. We know the value is 0. */
5003 && GET_CODE (elt
->exp
) == ASHIFT
5004 && GET_CODE (op1
) == CONST_INT
5005 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
5007 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
5009 /* If the count fits in the inner mode's width,
5010 but exceeds the outer mode's width,
5011 the value will get truncated to 0
5015 /* If the count exceeds even the inner mode's width,
5016 don't fold this expression. */
5019 else if (op0
&& op1
)
5020 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
5024 else if (GET_CODE (elt
->exp
) == SUBREG
5025 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
5026 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
5028 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5029 new = copy_rtx (SUBREG_REG (elt
->exp
));
5040 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5041 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5042 new = lookup_as_function (XEXP (x
, 0), code
);
5044 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
5048 /* If we are not actually processing an insn, don't try to find the
5049 best address. Not only don't we care, but we could modify the
5050 MEM in an invalid way since we have no insn to validate against. */
5052 find_best_addr (insn
, &XEXP (x
, 0));
5055 /* Even if we don't fold in the insn itself,
5056 we can safely do so here, in hopes of getting a constant. */
5057 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5059 HOST_WIDE_INT offset
= 0;
5061 if (GET_CODE (addr
) == REG
5062 && REGNO_QTY_VALID_P (REGNO (addr
))
5063 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
5064 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
5065 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
5067 /* If address is constant, split it into a base and integer offset. */
5068 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5070 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5071 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5073 base
= XEXP (XEXP (addr
, 0), 0);
5074 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5076 else if (GET_CODE (addr
) == LO_SUM
5077 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5078 base
= XEXP (addr
, 1);
5080 /* If this is a constant pool reference, we can fold it into its
5081 constant to allow better value tracking. */
5082 if (base
&& GET_CODE (base
) == SYMBOL_REF
5083 && CONSTANT_POOL_ADDRESS_P (base
))
5085 rtx constant
= get_pool_constant (base
);
5086 enum machine_mode const_mode
= get_pool_mode (base
);
5089 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5090 constant_pool_entries_cost
= COST (constant
);
5092 /* If we are loading the full constant, we have an equivalence. */
5093 if (offset
== 0 && mode
== const_mode
)
5096 /* If this actually isn't a constant (weird!), we can't do
5097 anything. Otherwise, handle the two most common cases:
5098 extracting a word from a multi-word constant, and extracting
5099 the low-order bits. Other cases don't seem common enough to
5101 if (! CONSTANT_P (constant
))
5104 if (GET_MODE_CLASS (mode
) == MODE_INT
5105 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5106 && offset
% UNITS_PER_WORD
== 0
5107 && (new = operand_subword (constant
,
5108 offset
/ UNITS_PER_WORD
,
5109 0, const_mode
)) != 0)
5112 if (((BYTES_BIG_ENDIAN
5113 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5114 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5115 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5119 /* If this is a reference to a label at a known position in a jump
5120 table, we also know its value. */
5121 if (base
&& GET_CODE (base
) == LABEL_REF
)
5123 rtx label
= XEXP (base
, 0);
5124 rtx table_insn
= NEXT_INSN (label
);
5126 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5127 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5129 rtx table
= PATTERN (table_insn
);
5132 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5133 < XVECLEN (table
, 0)))
5134 return XVECEXP (table
, 0,
5135 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5137 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5138 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5140 rtx table
= PATTERN (table_insn
);
5143 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5144 < XVECLEN (table
, 1)))
5146 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5147 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
5150 if (GET_MODE (table
) != Pmode
)
5151 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
5153 /* Indicate this is a constant. This isn't a
5154 valid form of CONST, but it will only be used
5155 to fold the next insns and then discarded, so
5156 it should be safe. */
5157 return gen_rtx (CONST
, GET_MODE (new), new);
5166 for (i
= XVECLEN (x
, 3) - 1; i
>= 0; i
--)
5167 validate_change (insn
, &XVECEXP (x
, 3, i
),
5168 fold_rtx (XVECEXP (x
, 3, i
), insn
), 0);
5175 mode_arg0
= VOIDmode
;
5177 /* Try folding our operands.
5178 Then see which ones have constant values known. */
5180 fmt
= GET_RTX_FORMAT (code
);
5181 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5184 rtx arg
= XEXP (x
, i
);
5185 rtx folded_arg
= arg
, const_arg
= 0;
5186 enum machine_mode mode_arg
= GET_MODE (arg
);
5187 rtx cheap_arg
, expensive_arg
;
5188 rtx replacements
[2];
5191 /* Most arguments are cheap, so handle them specially. */
5192 switch (GET_CODE (arg
))
5195 /* This is the same as calling equiv_constant; it is duplicated
5197 if (REGNO_QTY_VALID_P (REGNO (arg
))
5198 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5199 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5200 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5202 = gen_lowpart_if_possible (GET_MODE (arg
),
5203 qty_const
[reg_qty
[REGNO (arg
)]]);
5216 folded_arg
= prev_insn_cc0
;
5217 mode_arg
= prev_insn_cc0_mode
;
5218 const_arg
= equiv_constant (folded_arg
);
5223 folded_arg
= fold_rtx (arg
, insn
);
5224 const_arg
= equiv_constant (folded_arg
);
5227 /* For the first three operands, see if the operand
5228 is constant or equivalent to a constant. */
5232 folded_arg0
= folded_arg
;
5233 const_arg0
= const_arg
;
5234 mode_arg0
= mode_arg
;
5237 folded_arg1
= folded_arg
;
5238 const_arg1
= const_arg
;
5241 const_arg2
= const_arg
;
5245 /* Pick the least expensive of the folded argument and an
5246 equivalent constant argument. */
5247 if (const_arg
== 0 || const_arg
== folded_arg
5248 || COST (const_arg
) > COST (folded_arg
))
5249 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5251 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5253 /* Try to replace the operand with the cheapest of the two
5254 possibilities. If it doesn't work and this is either of the first
5255 two operands of a commutative operation, try swapping them.
5256 If THAT fails, try the more expensive, provided it is cheaper
5257 than what is already there. */
5259 if (cheap_arg
== XEXP (x
, i
))
5262 if (insn
== 0 && ! copied
)
5268 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5270 j
< 2 && replacements
[j
]
5271 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5274 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5277 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5279 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5280 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5282 if (apply_change_group ())
5284 /* Swap them back to be invalid so that this loop can
5285 continue and flag them to be swapped back later. */
5288 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5297 else if (fmt
[i
] == 'E')
5298 /* Don't try to fold inside of a vector of expressions.
5299 Doing nothing is harmless. */
5302 /* If a commutative operation, place a constant integer as the second
5303 operand unless the first operand is also a constant integer. Otherwise,
5304 place any constant second unless the first operand is also a constant. */
5306 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5308 if (must_swap
|| (const_arg0
5310 || (GET_CODE (const_arg0
) == CONST_INT
5311 && GET_CODE (const_arg1
) != CONST_INT
))))
5313 register rtx tem
= XEXP (x
, 0);
5315 if (insn
== 0 && ! copied
)
5321 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5322 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5323 if (apply_change_group ())
5325 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5326 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5331 /* If X is an arithmetic operation, see if we can simplify it. */
5333 switch (GET_RTX_CLASS (code
))
5339 /* We can't simplify extension ops unless we know the
5341 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5342 && mode_arg0
== VOIDmode
)
5345 /* If we had a CONST, strip it off and put it back later if we
5347 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5348 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5350 new = simplify_unary_operation (code
, mode
,
5351 const_arg0
? const_arg0
: folded_arg0
,
5353 if (new != 0 && is_const
)
5354 new = gen_rtx (CONST
, mode
, new);
5359 /* See what items are actually being compared and set FOLDED_ARG[01]
5360 to those values and CODE to the actual comparison code. If any are
5361 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5362 do anything if both operands are already known to be constant. */
5364 if (const_arg0
== 0 || const_arg1
== 0)
5366 struct table_elt
*p0
, *p1
;
5367 rtx
true = const_true_rtx
, false = const0_rtx
;
5368 enum machine_mode mode_arg1
;
5370 #ifdef FLOAT_STORE_FLAG_VALUE
5371 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5373 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5375 false = CONST0_RTX (mode
);
5379 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5380 &mode_arg0
, &mode_arg1
);
5381 const_arg0
= equiv_constant (folded_arg0
);
5382 const_arg1
= equiv_constant (folded_arg1
);
5384 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5385 what kinds of things are being compared, so we can't do
5386 anything with this comparison. */
5388 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5391 /* If we do not now have two constants being compared, see
5392 if we can nevertheless deduce some things about the
5394 if (const_arg0
== 0 || const_arg1
== 0)
5396 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5397 non-explicit constant? These aren't zero, but we
5398 don't know their sign. */
5399 if (const_arg1
== const0_rtx
5400 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5401 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5403 || GET_CODE (folded_arg0
) == SYMBOL_REF
5405 || GET_CODE (folded_arg0
) == LABEL_REF
5406 || GET_CODE (folded_arg0
) == CONST
))
5410 else if (code
== NE
)
5414 /* See if the two operands are the same. We don't do this
5415 for IEEE floating-point since we can't assume x == x
5416 since x might be a NaN. */
5418 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5419 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5420 && (folded_arg0
== folded_arg1
5421 || (GET_CODE (folded_arg0
) == REG
5422 && GET_CODE (folded_arg1
) == REG
5423 && (reg_qty
[REGNO (folded_arg0
)]
5424 == reg_qty
[REGNO (folded_arg1
)]))
5425 || ((p0
= lookup (folded_arg0
,
5426 (safe_hash (folded_arg0
, mode_arg0
)
5427 % NBUCKETS
), mode_arg0
))
5428 && (p1
= lookup (folded_arg1
,
5429 (safe_hash (folded_arg1
, mode_arg0
)
5430 % NBUCKETS
), mode_arg0
))
5431 && p0
->first_same_value
== p1
->first_same_value
)))
5432 return ((code
== EQ
|| code
== LE
|| code
== GE
5433 || code
== LEU
|| code
== GEU
)
5436 /* If FOLDED_ARG0 is a register, see if the comparison we are
5437 doing now is either the same as we did before or the reverse
5438 (we only check the reverse if not floating-point). */
5439 else if (GET_CODE (folded_arg0
) == REG
)
5441 int qty
= reg_qty
[REGNO (folded_arg0
)];
5443 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5444 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5445 || (comparison_dominates_p (qty_comparison_code
[qty
],
5446 reverse_condition (code
))
5447 && ! FLOAT_MODE_P (mode_arg0
)))
5448 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5450 && rtx_equal_p (qty_comparison_const
[qty
],
5452 || (GET_CODE (folded_arg1
) == REG
5453 && (reg_qty
[REGNO (folded_arg1
)]
5454 == qty_comparison_qty
[qty
]))))
5455 return (comparison_dominates_p (qty_comparison_code
[qty
],
5462 /* If we are comparing against zero, see if the first operand is
5463 equivalent to an IOR with a constant. If so, we may be able to
5464 determine the result of this comparison. */
5466 if (const_arg1
== const0_rtx
)
5468 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5472 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5473 && GET_CODE (inner_const
) == CONST_INT
5474 && INTVAL (inner_const
) != 0)
5476 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5477 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5478 && (INTVAL (inner_const
)
5479 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5480 rtx
true = const_true_rtx
, false = const0_rtx
;
5482 #ifdef FLOAT_STORE_FLAG_VALUE
5483 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5485 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5487 false = CONST0_RTX (mode
);
5509 new = simplify_relational_operation (code
, mode_arg0
,
5510 const_arg0
? const_arg0
: folded_arg0
,
5511 const_arg1
? const_arg1
: folded_arg1
);
5512 #ifdef FLOAT_STORE_FLAG_VALUE
5513 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5514 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5515 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5524 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5525 with that LABEL_REF as its second operand. If so, the result is
5526 the first operand of that MINUS. This handles switches with an
5527 ADDR_DIFF_VEC table. */
5528 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5531 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5532 : lookup_as_function (folded_arg0
, MINUS
);
5534 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5535 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5538 /* Now try for a CONST of a MINUS like the above. */
5539 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5540 : lookup_as_function (folded_arg0
, CONST
))) != 0
5541 && GET_CODE (XEXP (y
, 0)) == MINUS
5542 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5543 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5544 return XEXP (XEXP (y
, 0), 0);
5547 /* Likewise if the operands are in the other order. */
5548 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5551 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5552 : lookup_as_function (folded_arg1
, MINUS
);
5554 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5555 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5558 /* Now try for a CONST of a MINUS like the above. */
5559 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5560 : lookup_as_function (folded_arg1
, CONST
))) != 0
5561 && GET_CODE (XEXP (y
, 0)) == MINUS
5562 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5563 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5564 return XEXP (XEXP (y
, 0), 0);
5567 /* If second operand is a register equivalent to a negative
5568 CONST_INT, see if we can find a register equivalent to the
5569 positive constant. Make a MINUS if so. Don't do this for
5570 a negative constant since we might then alternate between
5571 chosing positive and negative constants. Having the positive
5572 constant previously-used is the more common case. */
5573 if (const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
5574 && INTVAL (const_arg1
) < 0 && GET_CODE (folded_arg1
) == REG
)
5576 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5578 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5582 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5583 if (GET_CODE (p
->exp
) == REG
)
5584 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5585 canon_reg (p
->exp
, NULL_RTX
));
5590 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5591 If so, produce (PLUS Z C2-C). */
5592 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5594 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5595 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5596 return fold_rtx (plus_constant (copy_rtx (y
),
5597 -INTVAL (const_arg1
)),
5601 /* ... fall through ... */
5604 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5605 case IOR
: case AND
: case XOR
:
5606 case MULT
: case DIV
: case UDIV
:
5607 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5608 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5609 is known to be of similar form, we may be able to replace the
5610 operation with a combined operation. This may eliminate the
5611 intermediate operation if every use is simplified in this way.
5612 Note that the similar optimization done by combine.c only works
5613 if the intermediate operation's result has only one reference. */
5615 if (GET_CODE (folded_arg0
) == REG
5616 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5619 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5620 rtx y
= lookup_as_function (folded_arg0
, code
);
5622 enum rtx_code associate_code
;
5626 || 0 == (inner_const
5627 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5628 || GET_CODE (inner_const
) != CONST_INT
5629 /* If we have compiled a statement like
5630 "if (x == (x & mask1))", and now are looking at
5631 "x & mask2", we will have a case where the first operand
5632 of Y is the same as our first operand. Unless we detect
5633 this case, an infinite loop will result. */
5634 || XEXP (y
, 0) == folded_arg0
)
5637 /* Don't associate these operations if they are a PLUS with the
5638 same constant and it is a power of two. These might be doable
5639 with a pre- or post-increment. Similarly for two subtracts of
5640 identical powers of two with post decrement. */
5642 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5644 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5645 || exact_log2 (INTVAL (const_arg1
)) >= 0
5647 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5648 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5653 /* Compute the code used to compose the constants. For example,
5654 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5657 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5658 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5660 new_const
= simplify_binary_operation (associate_code
, mode
,
5661 const_arg1
, inner_const
);
5666 /* If we are associating shift operations, don't let this
5667 produce a shift of the size of the object or larger.
5668 This could occur when we follow a sign-extend by a right
5669 shift on a machine that does a sign-extend as a pair
5672 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5673 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5675 /* As an exception, we can turn an ASHIFTRT of this
5676 form into a shift of the number of bits - 1. */
5677 if (code
== ASHIFTRT
)
5678 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5683 y
= copy_rtx (XEXP (y
, 0));
5685 /* If Y contains our first operand (the most common way this
5686 can happen is if Y is a MEM), we would do into an infinite
5687 loop if we tried to fold it. So don't in that case. */
5689 if (! reg_mentioned_p (folded_arg0
, y
))
5690 y
= fold_rtx (y
, insn
);
5692 return cse_gen_binary (code
, mode
, y
, new_const
);
5696 new = simplify_binary_operation (code
, mode
,
5697 const_arg0
? const_arg0
: folded_arg0
,
5698 const_arg1
? const_arg1
: folded_arg1
);
5702 /* (lo_sum (high X) X) is simply X. */
5703 if (code
== LO_SUM
&& const_arg0
!= 0
5704 && GET_CODE (const_arg0
) == HIGH
5705 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5711 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5712 const_arg0
? const_arg0
: folded_arg0
,
5713 const_arg1
? const_arg1
: folded_arg1
,
5714 const_arg2
? const_arg2
: XEXP (x
, 2));
5718 return new ? new : x
;
5721 /* Return a constant value currently equivalent to X.
5722 Return 0 if we don't know one. */
5728 if (GET_CODE (x
) == REG
5729 && REGNO_QTY_VALID_P (REGNO (x
))
5730 && qty_const
[reg_qty
[REGNO (x
)]])
5731 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5733 if (x
!= 0 && CONSTANT_P (x
))
5736 /* If X is a MEM, try to fold it outside the context of any insn to see if
5737 it might be equivalent to a constant. That handles the case where it
5738 is a constant-pool reference. Then try to look it up in the hash table
5739 in case it is something whose value we have seen before. */
5741 if (GET_CODE (x
) == MEM
)
5743 struct table_elt
*elt
;
5745 x
= fold_rtx (x
, NULL_RTX
);
5749 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5753 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5754 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5761 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5762 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5763 least-significant part of X.
5764 MODE specifies how big a part of X to return.
5766 If the requested operation cannot be done, 0 is returned.
5768 This is similar to gen_lowpart in emit-rtl.c. */
5771 gen_lowpart_if_possible (mode
, x
)
5772 enum machine_mode mode
;
5775 rtx result
= gen_lowpart_common (mode
, x
);
5779 else if (GET_CODE (x
) == MEM
)
5781 /* This is the only other case we handle. */
5782 register int offset
= 0;
5785 if (WORDS_BIG_ENDIAN
)
5786 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5787 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5788 if (BYTES_BIG_ENDIAN
)
5789 /* Adjust the address so that the address-after-the-data is
5791 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5792 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5793 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5794 if (! memory_address_p (mode
, XEXP (new, 0)))
5796 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5797 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5798 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5805 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5806 branch. It will be zero if not.
5808 In certain cases, this can cause us to add an equivalence. For example,
5809 if we are following the taken case of
5811 we can add the fact that `i' and '2' are now equivalent.
5813 In any case, we can record that this comparison was passed. If the same
5814 comparison is seen later, we will know its value. */
5817 record_jump_equiv (insn
, taken
)
5821 int cond_known_true
;
5823 enum machine_mode mode
, mode0
, mode1
;
5824 int reversed_nonequality
= 0;
5827 /* Ensure this is the right kind of insn. */
5828 if (! condjump_p (insn
) || simplejump_p (insn
))
5831 /* See if this jump condition is known true or false. */
5833 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5835 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5837 /* Get the type of comparison being done and the operands being compared.
5838 If we had to reverse a non-equality condition, record that fact so we
5839 know that it isn't valid for floating-point. */
5840 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5841 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5842 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5844 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5845 if (! cond_known_true
)
5847 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5848 code
= reverse_condition (code
);
5851 /* The mode is the mode of the non-constant. */
5853 if (mode1
!= VOIDmode
)
5856 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5859 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5860 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5861 Make any useful entries we can with that information. Called from
5862 above function and called recursively. */
5865 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5867 enum machine_mode mode
;
5869 int reversed_nonequality
;
5871 unsigned op0_hash
, op1_hash
;
5872 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5873 struct table_elt
*op0_elt
, *op1_elt
;
5875 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5876 we know that they are also equal in the smaller mode (this is also
5877 true for all smaller modes whether or not there is a SUBREG, but
5878 is not worth testing for with no SUBREG. */
5880 /* Note that GET_MODE (op0) may not equal MODE. */
5881 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5882 && (GET_MODE_SIZE (GET_MODE (op0
))
5883 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5885 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5886 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5888 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5889 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5890 reversed_nonequality
);
5893 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5894 && (GET_MODE_SIZE (GET_MODE (op1
))
5895 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5897 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5898 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5900 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5901 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5902 reversed_nonequality
);
5905 /* Similarly, if this is an NE comparison, and either is a SUBREG
5906 making a smaller mode, we know the whole thing is also NE. */
5908 /* Note that GET_MODE (op0) may not equal MODE;
5909 if we test MODE instead, we can get an infinite recursion
5910 alternating between two modes each wider than MODE. */
5912 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5913 && subreg_lowpart_p (op0
)
5914 && (GET_MODE_SIZE (GET_MODE (op0
))
5915 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5917 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5918 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5920 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5921 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5922 reversed_nonequality
);
5925 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5926 && subreg_lowpart_p (op1
)
5927 && (GET_MODE_SIZE (GET_MODE (op1
))
5928 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5930 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5931 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5933 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5934 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5935 reversed_nonequality
);
5938 /* Hash both operands. */
5941 hash_arg_in_memory
= 0;
5942 hash_arg_in_struct
= 0;
5943 op0_hash
= HASH (op0
, mode
);
5944 op0_in_memory
= hash_arg_in_memory
;
5945 op0_in_struct
= hash_arg_in_struct
;
5951 hash_arg_in_memory
= 0;
5952 hash_arg_in_struct
= 0;
5953 op1_hash
= HASH (op1
, mode
);
5954 op1_in_memory
= hash_arg_in_memory
;
5955 op1_in_struct
= hash_arg_in_struct
;
5960 /* Look up both operands. */
5961 op0_elt
= lookup (op0
, op0_hash
, mode
);
5962 op1_elt
= lookup (op1
, op1_hash
, mode
);
5964 /* If both operands are already equivalent or if they are not in the
5965 table but are identical, do nothing. */
5966 if ((op0_elt
!= 0 && op1_elt
!= 0
5967 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
5968 || op0
== op1
|| rtx_equal_p (op0
, op1
))
5971 /* If we aren't setting two things equal all we can do is save this
5972 comparison. Similarly if this is floating-point. In the latter
5973 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5974 If we record the equality, we might inadvertently delete code
5975 whose intent was to change -0 to +0. */
5977 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5979 /* If we reversed a floating-point comparison, if OP0 is not a
5980 register, or if OP1 is neither a register or constant, we can't
5983 if (GET_CODE (op1
) != REG
)
5984 op1
= equiv_constant (op1
);
5986 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5987 || GET_CODE (op0
) != REG
|| op1
== 0)
5990 /* Put OP0 in the hash table if it isn't already. This gives it a
5991 new quantity number. */
5994 if (insert_regs (op0
, NULL_PTR
, 0))
5996 rehash_using_reg (op0
);
5997 op0_hash
= HASH (op0
, mode
);
5999 /* If OP0 is contained in OP1, this changes its hash code
6000 as well. Faster to rehash than to check, except
6001 for the simple case of a constant. */
6002 if (! CONSTANT_P (op1
))
6003 op1_hash
= HASH (op1
,mode
);
6006 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6007 op0_elt
->in_memory
= op0_in_memory
;
6008 op0_elt
->in_struct
= op0_in_struct
;
6011 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
6012 if (GET_CODE (op1
) == REG
)
6014 /* Look it up again--in case op0 and op1 are the same. */
6015 op1_elt
= lookup (op1
, op1_hash
, mode
);
6017 /* Put OP1 in the hash table so it gets a new quantity number. */
6020 if (insert_regs (op1
, NULL_PTR
, 0))
6022 rehash_using_reg (op1
);
6023 op1_hash
= HASH (op1
, mode
);
6026 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6027 op1_elt
->in_memory
= op1_in_memory
;
6028 op1_elt
->in_struct
= op1_in_struct
;
6031 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
6032 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
6036 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
6037 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
6043 /* If either side is still missing an equivalence, make it now,
6044 then merge the equivalences. */
6048 if (insert_regs (op0
, NULL_PTR
, 0))
6050 rehash_using_reg (op0
);
6051 op0_hash
= HASH (op0
, mode
);
6054 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6055 op0_elt
->in_memory
= op0_in_memory
;
6056 op0_elt
->in_struct
= op0_in_struct
;
6061 if (insert_regs (op1
, NULL_PTR
, 0))
6063 rehash_using_reg (op1
);
6064 op1_hash
= HASH (op1
, mode
);
6067 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6068 op1_elt
->in_memory
= op1_in_memory
;
6069 op1_elt
->in_struct
= op1_in_struct
;
6072 merge_equiv_classes (op0_elt
, op1_elt
);
6073 last_jump_equiv_class
= op0_elt
;
6076 /* CSE processing for one instruction.
6077 First simplify sources and addresses of all assignments
6078 in the instruction, using previously-computed equivalents values.
6079 Then install the new sources and destinations in the table
6080 of available values.
6082 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6085 /* Data on one SET contained in the instruction. */
6089 /* The SET rtx itself. */
6091 /* The SET_SRC of the rtx (the original value, if it is changing). */
6093 /* The hash-table element for the SET_SRC of the SET. */
6094 struct table_elt
*src_elt
;
6095 /* Hash value for the SET_SRC. */
6097 /* Hash value for the SET_DEST. */
6099 /* The SET_DEST, with SUBREG, etc., stripped. */
6101 /* Place where the pointer to the INNER_DEST was found. */
6102 rtx
*inner_dest_loc
;
6103 /* Nonzero if the SET_SRC is in memory. */
6105 /* Nonzero if the SET_SRC is in a structure. */
6107 /* Nonzero if the SET_SRC contains something
6108 whose value cannot be predicted and understood. */
6110 /* Original machine mode, in case it becomes a CONST_INT. */
6111 enum machine_mode mode
;
6112 /* A constant equivalent for SET_SRC, if any. */
6114 /* Hash value of constant equivalent for SET_SRC. */
6115 unsigned src_const_hash
;
6116 /* Table entry for constant equivalent for SET_SRC, if any. */
6117 struct table_elt
*src_const_elt
;
6121 cse_insn (insn
, in_libcall_block
)
6123 int in_libcall_block
;
6125 register rtx x
= PATTERN (insn
);
6128 register int n_sets
= 0;
6130 /* Records what this insn does to set CC0. */
6131 rtx this_insn_cc0
= 0;
6132 enum machine_mode this_insn_cc0_mode
;
6133 struct write_data writes_memory
;
6134 static struct write_data init
= {0, 0, 0, 0};
6137 struct table_elt
*src_eqv_elt
= 0;
6138 int src_eqv_volatile
;
6139 int src_eqv_in_memory
;
6140 int src_eqv_in_struct
;
6141 unsigned src_eqv_hash
;
6146 writes_memory
= init
;
6148 /* Find all the SETs and CLOBBERs in this instruction.
6149 Record all the SETs in the array `set' and count them.
6150 Also determine whether there is a CLOBBER that invalidates
6151 all memory references, or all references at varying addresses. */
6153 if (GET_CODE (insn
) == CALL_INSN
)
6155 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6156 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6157 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6160 if (GET_CODE (x
) == SET
)
6162 sets
= (struct set
*) alloca (sizeof (struct set
));
6165 /* Ignore SETs that are unconditional jumps.
6166 They never need cse processing, so this does not hurt.
6167 The reason is not efficiency but rather
6168 so that we can test at the end for instructions
6169 that have been simplified to unconditional jumps
6170 and not be misled by unchanged instructions
6171 that were unconditional jumps to begin with. */
6172 if (SET_DEST (x
) == pc_rtx
6173 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6176 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6177 The hard function value register is used only once, to copy to
6178 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6179 Ensure we invalidate the destination register. On the 80386 no
6180 other code would invalidate it since it is a fixed_reg.
6181 We need not check the return of apply_change_group; see canon_reg. */
6183 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6185 canon_reg (SET_SRC (x
), insn
);
6186 apply_change_group ();
6187 fold_rtx (SET_SRC (x
), insn
);
6188 invalidate (SET_DEST (x
), VOIDmode
);
6193 else if (GET_CODE (x
) == PARALLEL
)
6195 register int lim
= XVECLEN (x
, 0);
6197 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6199 /* Find all regs explicitly clobbered in this insn,
6200 and ensure they are not replaced with any other regs
6201 elsewhere in this insn.
6202 When a reg that is clobbered is also used for input,
6203 we should presume that that is for a reason,
6204 and we should not substitute some other register
6205 which is not supposed to be clobbered.
6206 Therefore, this loop cannot be merged into the one below
6207 because a CALL may precede a CLOBBER and refer to the
6208 value clobbered. We must not let a canonicalization do
6209 anything in that case. */
6210 for (i
= 0; i
< lim
; i
++)
6212 register rtx y
= XVECEXP (x
, 0, i
);
6213 if (GET_CODE (y
) == CLOBBER
)
6215 rtx clobbered
= XEXP (y
, 0);
6217 if (GET_CODE (clobbered
) == REG
6218 || GET_CODE (clobbered
) == SUBREG
)
6219 invalidate (clobbered
, VOIDmode
);
6220 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6221 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6222 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6226 for (i
= 0; i
< lim
; i
++)
6228 register rtx y
= XVECEXP (x
, 0, i
);
6229 if (GET_CODE (y
) == SET
)
6231 /* As above, we ignore unconditional jumps and call-insns and
6232 ignore the result of apply_change_group. */
6233 if (GET_CODE (SET_SRC (y
)) == CALL
)
6235 canon_reg (SET_SRC (y
), insn
);
6236 apply_change_group ();
6237 fold_rtx (SET_SRC (y
), insn
);
6238 invalidate (SET_DEST (y
), VOIDmode
);
6240 else if (SET_DEST (y
) == pc_rtx
6241 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6244 sets
[n_sets
++].rtl
= y
;
6246 else if (GET_CODE (y
) == CLOBBER
)
6248 /* If we clobber memory, take note of that,
6249 and canon the address.
6250 This does nothing when a register is clobbered
6251 because we have already invalidated the reg. */
6252 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6254 canon_reg (XEXP (y
, 0), NULL_RTX
);
6255 note_mem_written (XEXP (y
, 0), &writes_memory
);
6258 else if (GET_CODE (y
) == USE
6259 && ! (GET_CODE (XEXP (y
, 0)) == REG
6260 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6261 canon_reg (y
, NULL_RTX
);
6262 else if (GET_CODE (y
) == CALL
)
6264 /* The result of apply_change_group can be ignored; see
6266 canon_reg (y
, insn
);
6267 apply_change_group ();
6272 else if (GET_CODE (x
) == CLOBBER
)
6274 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6276 canon_reg (XEXP (x
, 0), NULL_RTX
);
6277 note_mem_written (XEXP (x
, 0), &writes_memory
);
6281 /* Canonicalize a USE of a pseudo register or memory location. */
6282 else if (GET_CODE (x
) == USE
6283 && ! (GET_CODE (XEXP (x
, 0)) == REG
6284 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6285 canon_reg (XEXP (x
, 0), NULL_RTX
);
6286 else if (GET_CODE (x
) == CALL
)
6288 /* The result of apply_change_group can be ignored; see canon_reg. */
6289 canon_reg (x
, insn
);
6290 apply_change_group ();
6294 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6295 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6296 is handled specially for this case, and if it isn't set, then there will
6297 be no equivalence for the destination. */
6298 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6299 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6300 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6301 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6302 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6304 /* Canonicalize sources and addresses of destinations.
6305 We do this in a separate pass to avoid problems when a MATCH_DUP is
6306 present in the insn pattern. In that case, we want to ensure that
6307 we don't break the duplicate nature of the pattern. So we will replace
6308 both operands at the same time. Otherwise, we would fail to find an
6309 equivalent substitution in the loop calling validate_change below.
6311 We used to suppress canonicalization of DEST if it appears in SRC,
6312 but we don't do this any more. */
6314 for (i
= 0; i
< n_sets
; i
++)
6316 rtx dest
= SET_DEST (sets
[i
].rtl
);
6317 rtx src
= SET_SRC (sets
[i
].rtl
);
6318 rtx
new = canon_reg (src
, insn
);
6320 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6321 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6322 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6323 || insn_n_dups
[recog_memoized (insn
)] > 0)
6324 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6326 SET_SRC (sets
[i
].rtl
) = new;
6328 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6330 validate_change (insn
, &XEXP (dest
, 1),
6331 canon_reg (XEXP (dest
, 1), insn
), 1);
6332 validate_change (insn
, &XEXP (dest
, 2),
6333 canon_reg (XEXP (dest
, 2), insn
), 1);
6336 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6337 || GET_CODE (dest
) == ZERO_EXTRACT
6338 || GET_CODE (dest
) == SIGN_EXTRACT
)
6339 dest
= XEXP (dest
, 0);
6341 if (GET_CODE (dest
) == MEM
)
6342 canon_reg (dest
, insn
);
6345 /* Now that we have done all the replacements, we can apply the change
6346 group and see if they all work. Note that this will cause some
6347 canonicalizations that would have worked individually not to be applied
6348 because some other canonicalization didn't work, but this should not
6351 The result of apply_change_group can be ignored; see canon_reg. */
6353 apply_change_group ();
6355 /* Set sets[i].src_elt to the class each source belongs to.
6356 Detect assignments from or to volatile things
6357 and set set[i] to zero so they will be ignored
6358 in the rest of this function.
6360 Nothing in this loop changes the hash table or the register chains. */
6362 for (i
= 0; i
< n_sets
; i
++)
6364 register rtx src
, dest
;
6365 register rtx src_folded
;
6366 register struct table_elt
*elt
= 0, *p
;
6367 enum machine_mode mode
;
6370 rtx src_related
= 0;
6371 struct table_elt
*src_const_elt
= 0;
6372 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6373 int src_related_cost
= 10000, src_elt_cost
= 10000;
6374 /* Set non-zero if we need to call force_const_mem on with the
6375 contents of src_folded before using it. */
6376 int src_folded_force_flag
= 0;
6378 dest
= SET_DEST (sets
[i
].rtl
);
6379 src
= SET_SRC (sets
[i
].rtl
);
6381 /* If SRC is a constant that has no machine mode,
6382 hash it with the destination's machine mode.
6383 This way we can keep different modes separate. */
6385 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6386 sets
[i
].mode
= mode
;
6390 enum machine_mode eqvmode
= mode
;
6391 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6392 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6394 hash_arg_in_memory
= 0;
6395 hash_arg_in_struct
= 0;
6396 src_eqv
= fold_rtx (src_eqv
, insn
);
6397 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6399 /* Find the equivalence class for the equivalent expression. */
6402 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6404 src_eqv_volatile
= do_not_record
;
6405 src_eqv_in_memory
= hash_arg_in_memory
;
6406 src_eqv_in_struct
= hash_arg_in_struct
;
6409 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6410 value of the INNER register, not the destination. So it is not
6411 a valid substitution for the source. But save it for later. */
6412 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6415 src_eqv_here
= src_eqv
;
6417 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6418 simplified result, which may not necessarily be valid. */
6419 src_folded
= fold_rtx (src
, insn
);
6422 /* ??? This caused bad code to be generated for the m68k port with -O2.
6423 Suppose src is (CONST_INT -1), and that after truncation src_folded
6424 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6425 At the end we will add src and src_const to the same equivalence
6426 class. We now have 3 and -1 on the same equivalence class. This
6427 causes later instructions to be mis-optimized. */
6428 /* If storing a constant in a bitfield, pre-truncate the constant
6429 so we will be able to record it later. */
6430 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6431 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6433 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6435 if (GET_CODE (src
) == CONST_INT
6436 && GET_CODE (width
) == CONST_INT
6437 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6438 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6440 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6441 << INTVAL (width
)) - 1));
6445 /* Compute SRC's hash code, and also notice if it
6446 should not be recorded at all. In that case,
6447 prevent any further processing of this assignment. */
6449 hash_arg_in_memory
= 0;
6450 hash_arg_in_struct
= 0;
6453 sets
[i
].src_hash
= HASH (src
, mode
);
6454 sets
[i
].src_volatile
= do_not_record
;
6455 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6456 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6459 /* It is no longer clear why we used to do this, but it doesn't
6460 appear to still be needed. So let's try without it since this
6461 code hurts cse'ing widened ops. */
6462 /* If source is a perverse subreg (such as QI treated as an SI),
6463 treat it as volatile. It may do the work of an SI in one context
6464 where the extra bits are not being used, but cannot replace an SI
6466 if (GET_CODE (src
) == SUBREG
6467 && (GET_MODE_SIZE (GET_MODE (src
))
6468 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6469 sets
[i
].src_volatile
= 1;
6472 /* Locate all possible equivalent forms for SRC. Try to replace
6473 SRC in the insn with each cheaper equivalent.
6475 We have the following types of equivalents: SRC itself, a folded
6476 version, a value given in a REG_EQUAL note, or a value related
6479 Each of these equivalents may be part of an additional class
6480 of equivalents (if more than one is in the table, they must be in
6481 the same class; we check for this).
6483 If the source is volatile, we don't do any table lookups.
6485 We note any constant equivalent for possible later use in a
6488 if (!sets
[i
].src_volatile
)
6489 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6491 sets
[i
].src_elt
= elt
;
6493 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6495 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6497 /* The REG_EQUAL is indicating that two formerly distinct
6498 classes are now equivalent. So merge them. */
6499 merge_equiv_classes (elt
, src_eqv_elt
);
6500 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6501 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6507 else if (src_eqv_elt
)
6510 /* Try to find a constant somewhere and record it in `src_const'.
6511 Record its table element, if any, in `src_const_elt'. Look in
6512 any known equivalences first. (If the constant is not in the
6513 table, also set `sets[i].src_const_hash'). */
6515 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6519 src_const_elt
= elt
;
6524 && (CONSTANT_P (src_folded
)
6525 /* Consider (minus (label_ref L1) (label_ref L2)) as
6526 "constant" here so we will record it. This allows us
6527 to fold switch statements when an ADDR_DIFF_VEC is used. */
6528 || (GET_CODE (src_folded
) == MINUS
6529 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6530 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6531 src_const
= src_folded
, src_const_elt
= elt
;
6532 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6533 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6535 /* If we don't know if the constant is in the table, get its
6536 hash code and look it up. */
6537 if (src_const
&& src_const_elt
== 0)
6539 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6540 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6543 sets
[i
].src_const
= src_const
;
6544 sets
[i
].src_const_elt
= src_const_elt
;
6546 /* If the constant and our source are both in the table, mark them as
6547 equivalent. Otherwise, if a constant is in the table but the source
6548 isn't, set ELT to it. */
6549 if (src_const_elt
&& elt
6550 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6551 merge_equiv_classes (elt
, src_const_elt
);
6552 else if (src_const_elt
&& elt
== 0)
6553 elt
= src_const_elt
;
6555 /* See if there is a register linearly related to a constant
6556 equivalent of SRC. */
6558 && (GET_CODE (src_const
) == CONST
6559 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6561 src_related
= use_related_value (src_const
, src_const_elt
);
6564 struct table_elt
*src_related_elt
6565 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6566 if (src_related_elt
&& elt
)
6568 if (elt
->first_same_value
6569 != src_related_elt
->first_same_value
)
6570 /* This can occur when we previously saw a CONST
6571 involving a SYMBOL_REF and then see the SYMBOL_REF
6572 twice. Merge the involved classes. */
6573 merge_equiv_classes (elt
, src_related_elt
);
6576 src_related_elt
= 0;
6578 else if (src_related_elt
&& elt
== 0)
6579 elt
= src_related_elt
;
6583 /* See if we have a CONST_INT that is already in a register in a
6586 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6587 && GET_MODE_CLASS (mode
) == MODE_INT
6588 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6590 enum machine_mode wider_mode
;
6592 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6593 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6594 && src_related
== 0;
6595 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6597 struct table_elt
*const_elt
6598 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6603 for (const_elt
= const_elt
->first_same_value
;
6604 const_elt
; const_elt
= const_elt
->next_same_value
)
6605 if (GET_CODE (const_elt
->exp
) == REG
)
6607 src_related
= gen_lowpart_if_possible (mode
,
6614 /* Another possibility is that we have an AND with a constant in
6615 a mode narrower than a word. If so, it might have been generated
6616 as part of an "if" which would narrow the AND. If we already
6617 have done the AND in a wider mode, we can use a SUBREG of that
6620 if (flag_expensive_optimizations
&& ! src_related
6621 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6622 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6624 enum machine_mode tmode
;
6625 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6627 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6628 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6629 tmode
= GET_MODE_WIDER_MODE (tmode
))
6631 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6632 struct table_elt
*larger_elt
;
6636 PUT_MODE (new_and
, tmode
);
6637 XEXP (new_and
, 0) = inner
;
6638 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6639 if (larger_elt
== 0)
6642 for (larger_elt
= larger_elt
->first_same_value
;
6643 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6644 if (GET_CODE (larger_elt
->exp
) == REG
)
6647 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6657 #ifdef LOAD_EXTEND_OP
6658 /* See if a MEM has already been loaded with a widening operation;
6659 if it has, we can use a subreg of that. Many CISC machines
6660 also have such operations, but this is only likely to be
6661 beneficial these machines. */
6663 if (flag_expensive_optimizations
&& src_related
== 0
6664 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6665 && GET_MODE_CLASS (mode
) == MODE_INT
6666 && GET_CODE (src
) == MEM
&& ! do_not_record
6667 && LOAD_EXTEND_OP (mode
) != NIL
)
6669 enum machine_mode tmode
;
6671 /* Set what we are trying to extend and the operation it might
6672 have been extended with. */
6673 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6674 XEXP (memory_extend_rtx
, 0) = src
;
6676 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6677 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6678 tmode
= GET_MODE_WIDER_MODE (tmode
))
6680 struct table_elt
*larger_elt
;
6682 PUT_MODE (memory_extend_rtx
, tmode
);
6683 larger_elt
= lookup (memory_extend_rtx
,
6684 HASH (memory_extend_rtx
, tmode
), tmode
);
6685 if (larger_elt
== 0)
6688 for (larger_elt
= larger_elt
->first_same_value
;
6689 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6690 if (GET_CODE (larger_elt
->exp
) == REG
)
6692 src_related
= gen_lowpart_if_possible (mode
,
6701 #endif /* LOAD_EXTEND_OP */
6703 if (src
== src_folded
)
6706 /* At this point, ELT, if non-zero, points to a class of expressions
6707 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6708 and SRC_RELATED, if non-zero, each contain additional equivalent
6709 expressions. Prune these latter expressions by deleting expressions
6710 already in the equivalence class.
6712 Check for an equivalent identical to the destination. If found,
6713 this is the preferred equivalent since it will likely lead to
6714 elimination of the insn. Indicate this by placing it in
6717 if (elt
) elt
= elt
->first_same_value
;
6718 for (p
= elt
; p
; p
= p
->next_same_value
)
6720 enum rtx_code code
= GET_CODE (p
->exp
);
6722 /* If the expression is not valid, ignore it. Then we do not
6723 have to check for validity below. In most cases, we can use
6724 `rtx_equal_p', since canonicalization has already been done. */
6725 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6728 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6730 else if (src_folded
&& GET_CODE (src_folded
) == code
6731 && rtx_equal_p (src_folded
, p
->exp
))
6733 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6734 && rtx_equal_p (src_eqv_here
, p
->exp
))
6736 else if (src_related
&& GET_CODE (src_related
) == code
6737 && rtx_equal_p (src_related
, p
->exp
))
6740 /* This is the same as the destination of the insns, we want
6741 to prefer it. Copy it to src_related. The code below will
6742 then give it a negative cost. */
6743 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6748 /* Find the cheapest valid equivalent, trying all the available
6749 possibilities. Prefer items not in the hash table to ones
6750 that are when they are equal cost. Note that we can never
6751 worsen an insn as the current contents will also succeed.
6752 If we find an equivalent identical to the destination, use it as best,
6753 since this insn will probably be eliminated in that case. */
6756 if (rtx_equal_p (src
, dest
))
6759 src_cost
= COST (src
);
6764 if (rtx_equal_p (src_eqv_here
, dest
))
6767 src_eqv_cost
= COST (src_eqv_here
);
6772 if (rtx_equal_p (src_folded
, dest
))
6773 src_folded_cost
= -1;
6775 src_folded_cost
= COST (src_folded
);
6780 if (rtx_equal_p (src_related
, dest
))
6781 src_related_cost
= -1;
6783 src_related_cost
= COST (src_related
);
6786 /* If this was an indirect jump insn, a known label will really be
6787 cheaper even though it looks more expensive. */
6788 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6789 src_folded
= src_const
, src_folded_cost
= -1;
6791 /* Terminate loop when replacement made. This must terminate since
6792 the current contents will be tested and will always be valid. */
6797 /* Skip invalid entries. */
6798 while (elt
&& GET_CODE (elt
->exp
) != REG
6799 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6800 elt
= elt
->next_same_value
;
6802 if (elt
) src_elt_cost
= elt
->cost
;
6804 /* Find cheapest and skip it for the next time. For items
6805 of equal cost, use this order:
6806 src_folded, src, src_eqv, src_related and hash table entry. */
6807 if (src_folded_cost
<= src_cost
6808 && src_folded_cost
<= src_eqv_cost
6809 && src_folded_cost
<= src_related_cost
6810 && src_folded_cost
<= src_elt_cost
)
6812 trial
= src_folded
, src_folded_cost
= 10000;
6813 if (src_folded_force_flag
)
6814 trial
= force_const_mem (mode
, trial
);
6816 else if (src_cost
<= src_eqv_cost
6817 && src_cost
<= src_related_cost
6818 && src_cost
<= src_elt_cost
)
6819 trial
= src
, src_cost
= 10000;
6820 else if (src_eqv_cost
<= src_related_cost
6821 && src_eqv_cost
<= src_elt_cost
)
6822 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6823 else if (src_related_cost
<= src_elt_cost
)
6824 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6827 trial
= copy_rtx (elt
->exp
);
6828 elt
= elt
->next_same_value
;
6829 src_elt_cost
= 10000;
6832 /* We don't normally have an insn matching (set (pc) (pc)), so
6833 check for this separately here. We will delete such an
6836 Tablejump insns contain a USE of the table, so simply replacing
6837 the operand with the constant won't match. This is simply an
6838 unconditional branch, however, and is therefore valid. Just
6839 insert the substitution here and we will delete and re-emit
6842 if (n_sets
== 1 && dest
== pc_rtx
6844 || (GET_CODE (trial
) == LABEL_REF
6845 && ! condjump_p (insn
))))
6847 /* If TRIAL is a label in front of a jump table, we are
6848 really falling through the switch (this is how casesi
6849 insns work), so we must branch around the table. */
6850 if (GET_CODE (trial
) == CODE_LABEL
6851 && NEXT_INSN (trial
) != 0
6852 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6853 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6854 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6856 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6858 SET_SRC (sets
[i
].rtl
) = trial
;
6859 cse_jumps_altered
= 1;
6863 /* Look for a substitution that makes a valid insn. */
6864 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6866 /* The result of apply_change_group can be ignored; see
6869 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6870 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6872 apply_change_group ();
6876 /* If we previously found constant pool entries for
6877 constants and this is a constant, try making a
6878 pool entry. Put it in src_folded unless we already have done
6879 this since that is where it likely came from. */
6881 else if (constant_pool_entries_cost
6882 && CONSTANT_P (trial
)
6883 && ! (GET_CODE (trial
) == CONST
6884 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
6886 || (GET_CODE (src_folded
) != MEM
6887 && ! src_folded_force_flag
))
6888 && GET_MODE_CLASS (mode
) != MODE_CC
)
6890 src_folded_force_flag
= 1;
6892 src_folded_cost
= constant_pool_entries_cost
;
6896 src
= SET_SRC (sets
[i
].rtl
);
6898 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6899 However, there is an important exception: If both are registers
6900 that are not the head of their equivalence class, replace SET_SRC
6901 with the head of the class. If we do not do this, we will have
6902 both registers live over a portion of the basic block. This way,
6903 their lifetimes will likely abut instead of overlapping. */
6904 if (GET_CODE (dest
) == REG
6905 && REGNO_QTY_VALID_P (REGNO (dest
))
6906 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6907 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6908 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6909 /* Don't do this if the original insn had a hard reg as
6911 && (GET_CODE (sets
[i
].src
) != REG
6912 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6913 /* We can't call canon_reg here because it won't do anything if
6914 SRC is a hard register. */
6916 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6918 src
= SET_SRC (sets
[i
].rtl
)
6919 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6920 : gen_rtx (REG
, GET_MODE (src
), first
);
6922 /* If we had a constant that is cheaper than what we are now
6923 setting SRC to, use that constant. We ignored it when we
6924 thought we could make this into a no-op. */
6925 if (src_const
&& COST (src_const
) < COST (src
)
6926 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6930 /* If we made a change, recompute SRC values. */
6931 if (src
!= sets
[i
].src
)
6934 hash_arg_in_memory
= 0;
6935 hash_arg_in_struct
= 0;
6937 sets
[i
].src_hash
= HASH (src
, mode
);
6938 sets
[i
].src_volatile
= do_not_record
;
6939 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6940 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6941 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6944 /* If this is a single SET, we are setting a register, and we have an
6945 equivalent constant, we want to add a REG_NOTE. We don't want
6946 to write a REG_EQUAL note for a constant pseudo since verifying that
6947 that pseudo hasn't been eliminated is a pain. Such a note also
6948 won't help anything. */
6949 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6950 && GET_CODE (src_const
) != REG
)
6952 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6954 /* Record the actual constant value in a REG_EQUAL note, making
6955 a new one if one does not already exist. */
6957 XEXP (tem
, 0) = src_const
;
6959 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6960 src_const
, REG_NOTES (insn
));
6962 /* If storing a constant value in a register that
6963 previously held the constant value 0,
6964 record this fact with a REG_WAS_0 note on this insn.
6966 Note that the *register* is required to have previously held 0,
6967 not just any register in the quantity and we must point to the
6968 insn that set that register to zero.
6970 Rather than track each register individually, we just see if
6971 the last set for this quantity was for this register. */
6973 if (REGNO_QTY_VALID_P (REGNO (dest
))
6974 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6976 /* See if we previously had a REG_WAS_0 note. */
6977 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6978 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6980 if ((tem
= single_set (const_insn
)) != 0
6981 && rtx_equal_p (SET_DEST (tem
), dest
))
6984 XEXP (note
, 0) = const_insn
;
6986 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6987 const_insn
, REG_NOTES (insn
));
6992 /* Now deal with the destination. */
6994 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6996 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6997 to the MEM or REG within it. */
6998 while (GET_CODE (dest
) == SIGN_EXTRACT
6999 || GET_CODE (dest
) == ZERO_EXTRACT
7000 || GET_CODE (dest
) == SUBREG
7001 || GET_CODE (dest
) == STRICT_LOW_PART
)
7003 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
7004 dest
= XEXP (dest
, 0);
7007 sets
[i
].inner_dest
= dest
;
7009 if (GET_CODE (dest
) == MEM
)
7011 dest
= fold_rtx (dest
, insn
);
7013 /* Decide whether we invalidate everything in memory,
7014 or just things at non-fixed places.
7015 Writing a large aggregate must invalidate everything
7016 because we don't know how long it is. */
7017 note_mem_written (dest
, &writes_memory
);
7020 /* Compute the hash code of the destination now,
7021 before the effects of this instruction are recorded,
7022 since the register values used in the address computation
7023 are those before this instruction. */
7024 sets
[i
].dest_hash
= HASH (dest
, mode
);
7026 /* Don't enter a bit-field in the hash table
7027 because the value in it after the store
7028 may not equal what was stored, due to truncation. */
7030 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
7031 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
7033 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
7035 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7036 && GET_CODE (width
) == CONST_INT
7037 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7038 && ! (INTVAL (src_const
)
7039 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7040 /* Exception: if the value is constant,
7041 and it won't be truncated, record it. */
7045 /* This is chosen so that the destination will be invalidated
7046 but no new value will be recorded.
7047 We must invalidate because sometimes constant
7048 values can be recorded for bitfields. */
7049 sets
[i
].src_elt
= 0;
7050 sets
[i
].src_volatile
= 1;
7056 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7058 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7060 PUT_CODE (insn
, NOTE
);
7061 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7062 NOTE_SOURCE_FILE (insn
) = 0;
7063 cse_jumps_altered
= 1;
7064 /* One less use of the label this insn used to jump to. */
7065 --LABEL_NUSES (JUMP_LABEL (insn
));
7066 /* No more processing for this set. */
7070 /* If this SET is now setting PC to a label, we know it used to
7071 be a conditional or computed branch. So we see if we can follow
7072 it. If it was a computed branch, delete it and re-emit. */
7073 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7077 /* If this is not in the format for a simple branch and
7078 we are the only SET in it, re-emit it. */
7079 if (! simplejump_p (insn
) && n_sets
== 1)
7081 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7082 JUMP_LABEL (new) = XEXP (src
, 0);
7083 LABEL_NUSES (XEXP (src
, 0))++;
7088 /* Otherwise, force rerecognition, since it probably had
7089 a different pattern before.
7090 This shouldn't really be necessary, since whatever
7091 changed the source value above should have done this.
7092 Until the right place is found, might as well do this here. */
7093 INSN_CODE (insn
) = -1;
7095 /* Now that we've converted this jump to an unconditional jump,
7096 there is dead code after it. Delete the dead code until we
7097 reach a BARRIER, the end of the function, or a label. Do
7098 not delete NOTEs except for NOTE_INSN_DELETED since later
7099 phases assume these notes are retained. */
7103 while (NEXT_INSN (p
) != 0
7104 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7105 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7107 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7108 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7109 delete_insn (NEXT_INSN (p
));
7114 /* If we don't have a BARRIER immediately after INSN, put one there.
7115 Much code assumes that there are no NOTEs between a JUMP_INSN and
7118 if (NEXT_INSN (insn
) == 0
7119 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7120 emit_barrier_before (NEXT_INSN (insn
));
7122 /* We might have two BARRIERs separated by notes. Delete the second
7125 if (p
!= insn
&& NEXT_INSN (p
) != 0
7126 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7127 delete_insn (NEXT_INSN (p
));
7129 cse_jumps_altered
= 1;
7133 /* If destination is volatile, invalidate it and then do no further
7134 processing for this assignment. */
7136 else if (do_not_record
)
7138 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7139 || GET_CODE (dest
) == MEM
)
7140 invalidate (dest
, VOIDmode
);
7141 else if (GET_CODE (dest
) == STRICT_LOW_PART
7142 || GET_CODE (dest
) == ZERO_EXTRACT
)
7143 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7147 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7148 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7151 /* If setting CC0, record what it was set to, or a constant, if it
7152 is equivalent to a constant. If it is being set to a floating-point
7153 value, make a COMPARE with the appropriate constant of 0. If we
7154 don't do this, later code can interpret this as a test against
7155 const0_rtx, which can cause problems if we try to put it into an
7156 insn as a floating-point operand. */
7157 if (dest
== cc0_rtx
)
7159 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7160 this_insn_cc0_mode
= mode
;
7161 if (FLOAT_MODE_P (mode
))
7162 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
7168 /* Now enter all non-volatile source expressions in the hash table
7169 if they are not already present.
7170 Record their equivalence classes in src_elt.
7171 This way we can insert the corresponding destinations into
7172 the same classes even if the actual sources are no longer in them
7173 (having been invalidated). */
7175 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7176 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7178 register struct table_elt
*elt
;
7179 register struct table_elt
*classp
= sets
[0].src_elt
;
7180 rtx dest
= SET_DEST (sets
[0].rtl
);
7181 enum machine_mode eqvmode
= GET_MODE (dest
);
7183 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7185 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7188 if (insert_regs (src_eqv
, classp
, 0))
7190 rehash_using_reg (src_eqv
);
7191 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7193 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7194 elt
->in_memory
= src_eqv_in_memory
;
7195 elt
->in_struct
= src_eqv_in_struct
;
7198 /* Check to see if src_eqv_elt is the same as a set source which
7199 does not yet have an elt, and if so set the elt of the set source
7201 for (i
= 0; i
< n_sets
; i
++)
7202 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7203 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7204 sets
[i
].src_elt
= src_eqv_elt
;
7207 for (i
= 0; i
< n_sets
; i
++)
7208 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7209 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7211 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7213 /* REG_EQUAL in setting a STRICT_LOW_PART
7214 gives an equivalent for the entire destination register,
7215 not just for the subreg being stored in now.
7216 This is a more interesting equivalence, so we arrange later
7217 to treat the entire reg as the destination. */
7218 sets
[i
].src_elt
= src_eqv_elt
;
7219 sets
[i
].src_hash
= src_eqv_hash
;
7223 /* Insert source and constant equivalent into hash table, if not
7225 register struct table_elt
*classp
= src_eqv_elt
;
7226 register rtx src
= sets
[i
].src
;
7227 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7228 enum machine_mode mode
7229 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7231 if (sets
[i
].src_elt
== 0)
7233 register struct table_elt
*elt
;
7235 /* Note that these insert_regs calls cannot remove
7236 any of the src_elt's, because they would have failed to
7237 match if not still valid. */
7238 if (insert_regs (src
, classp
, 0))
7240 rehash_using_reg (src
);
7241 sets
[i
].src_hash
= HASH (src
, mode
);
7243 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7244 elt
->in_memory
= sets
[i
].src_in_memory
;
7245 elt
->in_struct
= sets
[i
].src_in_struct
;
7246 sets
[i
].src_elt
= classp
= elt
;
7249 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7250 && src
!= sets
[i
].src_const
7251 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7252 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7253 sets
[i
].src_const_hash
, mode
);
7256 else if (sets
[i
].src_elt
== 0)
7257 /* If we did not insert the source into the hash table (e.g., it was
7258 volatile), note the equivalence class for the REG_EQUAL value, if any,
7259 so that the destination goes into that class. */
7260 sets
[i
].src_elt
= src_eqv_elt
;
7262 invalidate_from_clobbers (&writes_memory
, x
);
7264 /* Some registers are invalidated by subroutine calls. Memory is
7265 invalidated by non-constant calls. */
7267 if (GET_CODE (insn
) == CALL_INSN
)
7269 static struct write_data everything
= {0, 1, 1, 1};
7271 if (! CONST_CALL_P (insn
))
7272 invalidate_memory (&everything
);
7273 invalidate_for_call ();
7276 /* Now invalidate everything set by this instruction.
7277 If a SUBREG or other funny destination is being set,
7278 sets[i].rtl is still nonzero, so here we invalidate the reg
7279 a part of which is being set. */
7281 for (i
= 0; i
< n_sets
; i
++)
7284 /* We can't use the inner dest, because the mode associated with
7285 a ZERO_EXTRACT is significant. */
7286 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7288 /* Needed for registers to remove the register from its
7289 previous quantity's chain.
7290 Needed for memory if this is a nonvarying address, unless
7291 we have just done an invalidate_memory that covers even those. */
7292 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7293 || (GET_CODE (dest
) == MEM
&& ! writes_memory
.all
7294 && ! cse_rtx_addr_varies_p (dest
)))
7295 invalidate (dest
, VOIDmode
);
7296 else if (GET_CODE (dest
) == STRICT_LOW_PART
7297 || GET_CODE (dest
) == ZERO_EXTRACT
)
7298 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7301 /* Make sure registers mentioned in destinations
7302 are safe for use in an expression to be inserted.
7303 This removes from the hash table
7304 any invalid entry that refers to one of these registers.
7306 We don't care about the return value from mention_regs because
7307 we are going to hash the SET_DEST values unconditionally. */
7309 for (i
= 0; i
< n_sets
; i
++)
7310 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7311 mention_regs (SET_DEST (sets
[i
].rtl
));
7313 /* We may have just removed some of the src_elt's from the hash table.
7314 So replace each one with the current head of the same class. */
7316 for (i
= 0; i
< n_sets
; i
++)
7319 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7320 /* If elt was removed, find current head of same class,
7321 or 0 if nothing remains of that class. */
7323 register struct table_elt
*elt
= sets
[i
].src_elt
;
7325 while (elt
&& elt
->prev_same_value
)
7326 elt
= elt
->prev_same_value
;
7328 while (elt
&& elt
->first_same_value
== 0)
7329 elt
= elt
->next_same_value
;
7330 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7334 /* Now insert the destinations into their equivalence classes. */
7336 for (i
= 0; i
< n_sets
; i
++)
7339 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7340 register struct table_elt
*elt
;
7342 /* Don't record value if we are not supposed to risk allocating
7343 floating-point values in registers that might be wider than
7345 if ((flag_float_store
7346 && GET_CODE (dest
) == MEM
7347 && FLOAT_MODE_P (GET_MODE (dest
)))
7348 /* Don't record values of destinations set inside a libcall block
7349 since we might delete the libcall. Things should have been set
7350 up so we won't want to reuse such a value, but we play it safe
7353 /* If we didn't put a REG_EQUAL value or a source into the hash
7354 table, there is no point is recording DEST. */
7355 || sets
[i
].src_elt
== 0
7356 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7357 or SIGN_EXTEND, don't record DEST since it can cause
7358 some tracking to be wrong.
7360 ??? Think about this more later. */
7361 || (GET_CODE (dest
) == SUBREG
7362 && (GET_MODE_SIZE (GET_MODE (dest
))
7363 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7364 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7365 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7368 /* STRICT_LOW_PART isn't part of the value BEING set,
7369 and neither is the SUBREG inside it.
7370 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7371 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7372 dest
= SUBREG_REG (XEXP (dest
, 0));
7374 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7375 /* Registers must also be inserted into chains for quantities. */
7376 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7378 /* If `insert_regs' changes something, the hash code must be
7380 rehash_using_reg (dest
);
7381 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7384 elt
= insert (dest
, sets
[i
].src_elt
,
7385 sets
[i
].dest_hash
, GET_MODE (dest
));
7386 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7387 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
7388 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
7393 /* This implicitly assumes a whole struct
7394 need not have MEM_IN_STRUCT_P.
7395 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7396 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7397 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7400 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7401 narrower than M2, and both M1 and M2 are the same number of words,
7402 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7403 make that equivalence as well.
7405 However, BAR may have equivalences for which gen_lowpart_if_possible
7406 will produce a simpler value than gen_lowpart_if_possible applied to
7407 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7408 BAR's equivalences. If we don't get a simplified form, make
7409 the SUBREG. It will not be used in an equivalence, but will
7410 cause two similar assignments to be detected.
7412 Note the loop below will find SUBREG_REG (DEST) since we have
7413 already entered SRC and DEST of the SET in the table. */
7415 if (GET_CODE (dest
) == SUBREG
7416 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7418 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7419 && (GET_MODE_SIZE (GET_MODE (dest
))
7420 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7421 && sets
[i
].src_elt
!= 0)
7423 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7424 struct table_elt
*elt
, *classp
= 0;
7426 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7427 elt
= elt
->next_same_value
)
7431 struct table_elt
*src_elt
;
7433 /* Ignore invalid entries. */
7434 if (GET_CODE (elt
->exp
) != REG
7435 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7438 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7440 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
7442 src_hash
= HASH (new_src
, new_mode
);
7443 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7445 /* Put the new source in the hash table is if isn't
7449 if (insert_regs (new_src
, classp
, 0))
7451 rehash_using_reg (new_src
);
7452 src_hash
= HASH (new_src
, new_mode
);
7454 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7455 src_elt
->in_memory
= elt
->in_memory
;
7456 src_elt
->in_struct
= elt
->in_struct
;
7458 else if (classp
&& classp
!= src_elt
->first_same_value
)
7459 /* Show that two things that we've seen before are
7460 actually the same. */
7461 merge_equiv_classes (src_elt
, classp
);
7463 classp
= src_elt
->first_same_value
;
7468 /* Special handling for (set REG0 REG1)
7469 where REG0 is the "cheapest", cheaper than REG1.
7470 After cse, REG1 will probably not be used in the sequel,
7471 so (if easily done) change this insn to (set REG1 REG0) and
7472 replace REG1 with REG0 in the previous insn that computed their value.
7473 Then REG1 will become a dead store and won't cloud the situation
7474 for later optimizations.
7476 Do not make this change if REG1 is a hard register, because it will
7477 then be used in the sequel and we may be changing a two-operand insn
7478 into a three-operand insn.
7480 Also do not do this if we are operating on a copy of INSN. */
7482 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7483 && NEXT_INSN (PREV_INSN (insn
)) == insn
7484 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7485 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7486 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7487 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7488 == REGNO (SET_DEST (sets
[0].rtl
))))
7490 rtx prev
= PREV_INSN (insn
);
7491 while (prev
&& GET_CODE (prev
) == NOTE
)
7492 prev
= PREV_INSN (prev
);
7494 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7495 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7497 rtx dest
= SET_DEST (sets
[0].rtl
);
7498 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7500 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7501 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7502 SET_SRC (sets
[0].rtl
), 1);
7503 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7504 apply_change_group ();
7506 /* If REG1 was equivalent to a constant, REG0 is not. */
7508 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7510 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7511 any REG_WAS_0 note on INSN to PREV. */
7512 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7514 remove_note (prev
, note
);
7516 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7519 remove_note (insn
, note
);
7520 XEXP (note
, 1) = REG_NOTES (prev
);
7521 REG_NOTES (prev
) = note
;
7524 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7525 then we must delete it, because the value in REG0 has changed. */
7526 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7527 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7528 remove_note (insn
, note
);
7532 /* If this is a conditional jump insn, record any known equivalences due to
7533 the condition being tested. */
7535 last_jump_equiv_class
= 0;
7536 if (GET_CODE (insn
) == JUMP_INSN
7537 && n_sets
== 1 && GET_CODE (x
) == SET
7538 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7539 record_jump_equiv (insn
, 0);
7542 /* If the previous insn set CC0 and this insn no longer references CC0,
7543 delete the previous insn. Here we use the fact that nothing expects CC0
7544 to be valid over an insn, which is true until the final pass. */
7545 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7546 && (tem
= single_set (prev_insn
)) != 0
7547 && SET_DEST (tem
) == cc0_rtx
7548 && ! reg_mentioned_p (cc0_rtx
, x
))
7550 PUT_CODE (prev_insn
, NOTE
);
7551 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7552 NOTE_SOURCE_FILE (prev_insn
) = 0;
7555 prev_insn_cc0
= this_insn_cc0
;
7556 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7562 /* Store 1 in *WRITES_PTR for those categories of memory ref
7563 that must be invalidated when the expression WRITTEN is stored in.
7564 If WRITTEN is null, say everything must be invalidated. */
7567 note_mem_written (written
, writes_ptr
)
7569 struct write_data
*writes_ptr
;
7571 static struct write_data everything
= {0, 1, 1, 1};
7574 *writes_ptr
= everything
;
7575 else if (GET_CODE (written
) == MEM
)
7577 /* Pushing or popping the stack invalidates just the stack pointer. */
7578 rtx addr
= XEXP (written
, 0);
7579 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7580 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7581 && GET_CODE (XEXP (addr
, 0)) == REG
7582 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7587 else if (GET_MODE (written
) == BLKmode
)
7588 *writes_ptr
= everything
;
7589 else if (cse_rtx_addr_varies_p (written
))
7591 /* A varying address that is a sum indicates an array element,
7592 and that's just as good as a structure element
7593 in implying that we need not invalidate scalar variables.
7594 However, we must allow QImode aliasing of scalars, because the
7595 ANSI C standard allows character pointers to alias anything.
7596 We must also allow AND addresses, because they may generate
7597 accesses outside the object being referenced. This is used to
7598 generate aligned addresses from unaligned addresses, for instance,
7599 the alpha storeqi_unaligned pattern. */
7600 if (! ((MEM_IN_STRUCT_P (written
)
7601 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7602 && GET_MODE (written
) != QImode
7603 && GET_CODE (XEXP (written
, 0)) != AND
))
7604 writes_ptr
->all
= 1;
7605 writes_ptr
->nonscalar
= 1;
7607 writes_ptr
->var
= 1;
7611 /* Perform invalidation on the basis of everything about an insn
7612 except for invalidating the actual places that are SET in it.
7613 This includes the places CLOBBERed, and anything that might
7614 alias with something that is SET or CLOBBERed.
7616 W points to the writes_memory for this insn, a struct write_data
7617 saying which kinds of memory references must be invalidated.
7618 X is the pattern of the insn. */
7621 invalidate_from_clobbers (w
, x
)
7622 struct write_data
*w
;
7625 /* If W->var is not set, W specifies no action.
7626 If W->all is set, this step gets all memory refs
7627 so they can be ignored in the rest of this function. */
7629 invalidate_memory (w
);
7633 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7634 reg_tick
[STACK_POINTER_REGNUM
]++;
7636 /* This should be *very* rare. */
7637 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7638 invalidate (stack_pointer_rtx
, VOIDmode
);
7641 if (GET_CODE (x
) == CLOBBER
)
7643 rtx ref
= XEXP (x
, 0);
7646 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7647 || (GET_CODE (ref
) == MEM
&& ! w
->all
))
7648 invalidate (ref
, VOIDmode
);
7649 else if (GET_CODE (ref
) == STRICT_LOW_PART
7650 || GET_CODE (ref
) == ZERO_EXTRACT
)
7651 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7654 else if (GET_CODE (x
) == PARALLEL
)
7657 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7659 register rtx y
= XVECEXP (x
, 0, i
);
7660 if (GET_CODE (y
) == CLOBBER
)
7662 rtx ref
= XEXP (y
, 0);
7665 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7666 || (GET_CODE (ref
) == MEM
&& !w
->all
))
7667 invalidate (ref
, VOIDmode
);
7668 else if (GET_CODE (ref
) == STRICT_LOW_PART
7669 || GET_CODE (ref
) == ZERO_EXTRACT
)
7670 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7677 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7678 and replace any registers in them with either an equivalent constant
7679 or the canonical form of the register. If we are inside an address,
7680 only do this if the address remains valid.
7682 OBJECT is 0 except when within a MEM in which case it is the MEM.
7684 Return the replacement for X. */
7687 cse_process_notes (x
, object
)
7691 enum rtx_code code
= GET_CODE (x
);
7692 char *fmt
= GET_RTX_FORMAT (code
);
7708 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7713 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7714 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7716 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7723 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7724 /* We don't substitute VOIDmode constants into these rtx,
7725 since they would impede folding. */
7726 if (GET_MODE (new) != VOIDmode
)
7727 validate_change (object
, &XEXP (x
, 0), new, 0);
7732 i
= reg_qty
[REGNO (x
)];
7734 /* Return a constant or a constant register. */
7735 if (REGNO_QTY_VALID_P (REGNO (x
))
7736 && qty_const
[i
] != 0
7737 && (CONSTANT_P (qty_const
[i
])
7738 || GET_CODE (qty_const
[i
]) == REG
))
7740 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7745 /* Otherwise, canonicalize this register. */
7746 return canon_reg (x
, NULL_RTX
);
7749 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7751 validate_change (object
, &XEXP (x
, i
),
7752 cse_process_notes (XEXP (x
, i
), object
), 0);
7757 /* Find common subexpressions between the end test of a loop and the beginning
7758 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7760 Often we have a loop where an expression in the exit test is used
7761 in the body of the loop. For example "while (*p) *q++ = *p++;".
7762 Because of the way we duplicate the loop exit test in front of the loop,
7763 however, we don't detect that common subexpression. This will be caught
7764 when global cse is implemented, but this is a quite common case.
7766 This function handles the most common cases of these common expressions.
7767 It is called after we have processed the basic block ending with the
7768 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7769 jumps to a label used only once. */
7772 cse_around_loop (loop_start
)
7777 struct table_elt
*p
;
7779 /* If the jump at the end of the loop doesn't go to the start, we don't
7781 for (insn
= PREV_INSN (loop_start
);
7782 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7783 insn
= PREV_INSN (insn
))
7787 || GET_CODE (insn
) != NOTE
7788 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7791 /* If the last insn of the loop (the end test) was an NE comparison,
7792 we will interpret it as an EQ comparison, since we fell through
7793 the loop. Any equivalences resulting from that comparison are
7794 therefore not valid and must be invalidated. */
7795 if (last_jump_equiv_class
)
7796 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7797 p
= p
->next_same_value
)
7798 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7799 || (GET_CODE (p
->exp
) == SUBREG
7800 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
7801 invalidate (p
->exp
, VOIDmode
);
7802 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7803 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7804 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
7806 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7807 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7809 The only thing we do with SET_DEST is invalidate entries, so we
7810 can safely process each SET in order. It is slightly less efficient
7811 to do so, but we only want to handle the most common cases. */
7813 for (insn
= NEXT_INSN (loop_start
);
7814 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7815 && ! (GET_CODE (insn
) == NOTE
7816 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7817 insn
= NEXT_INSN (insn
))
7819 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7820 && (GET_CODE (PATTERN (insn
)) == SET
7821 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7822 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7823 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7824 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7825 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7826 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7827 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7828 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7833 /* Variable used for communications between the next two routines. */
7835 static struct write_data skipped_writes_memory
;
7837 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7838 since they are done elsewhere. This function is called via note_stores. */
7841 invalidate_skipped_set (dest
, set
)
7845 if (GET_CODE (dest
) == MEM
)
7846 note_mem_written (dest
, &skipped_writes_memory
);
7848 /* There are times when an address can appear varying and be a PLUS
7849 during this scan when it would be a fixed address were we to know
7850 the proper equivalences. So promote "nonscalar" to be "all". */
7851 if (skipped_writes_memory
.nonscalar
)
7852 skipped_writes_memory
.all
= 1;
7854 if (GET_CODE (set
) == CLOBBER
7861 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7862 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7863 invalidate (dest
, VOIDmode
);
7864 else if (GET_CODE (dest
) == STRICT_LOW_PART
7865 || GET_CODE (dest
) == ZERO_EXTRACT
)
7866 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7869 /* Invalidate all insns from START up to the end of the function or the
7870 next label. This called when we wish to CSE around a block that is
7871 conditionally executed. */
7874 invalidate_skipped_block (start
)
7878 static struct write_data init
= {0, 0, 0, 0};
7879 static struct write_data everything
= {0, 1, 1, 1};
7881 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7882 insn
= NEXT_INSN (insn
))
7884 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7887 skipped_writes_memory
= init
;
7889 if (GET_CODE (insn
) == CALL_INSN
)
7891 invalidate_for_call ();
7892 skipped_writes_memory
= everything
;
7895 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7896 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7900 /* Used for communication between the following two routines; contains a
7901 value to be checked for modification. */
7903 static rtx cse_check_loop_start_value
;
7905 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7906 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7909 cse_check_loop_start (x
, set
)
7913 if (cse_check_loop_start_value
== 0
7914 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7917 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7918 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7919 cse_check_loop_start_value
= 0;
7922 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7923 a loop that starts with the label at LOOP_START.
7925 If X is a SET, we see if its SET_SRC is currently in our hash table.
7926 If so, we see if it has a value equal to some register used only in the
7927 loop exit code (as marked by jump.c).
7929 If those two conditions are true, we search backwards from the start of
7930 the loop to see if that same value was loaded into a register that still
7931 retains its value at the start of the loop.
7933 If so, we insert an insn after the load to copy the destination of that
7934 load into the equivalent register and (try to) replace our SET_SRC with that
7937 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7940 cse_set_around_loop (x
, insn
, loop_start
)
7945 struct table_elt
*src_elt
;
7946 static struct write_data init
= {0, 0, 0, 0};
7947 struct write_data writes_memory
;
7949 writes_memory
= init
;
7951 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7952 are setting PC or CC0 or whose SET_SRC is already a register. */
7953 if (GET_CODE (x
) == SET
7954 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7955 && GET_CODE (SET_SRC (x
)) != REG
)
7957 src_elt
= lookup (SET_SRC (x
),
7958 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7959 GET_MODE (SET_DEST (x
)));
7962 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7963 src_elt
= src_elt
->next_same_value
)
7964 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7965 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7969 /* Look for an insn in front of LOOP_START that sets
7970 something in the desired mode to SET_SRC (x) before we hit
7971 a label or CALL_INSN. */
7973 for (p
= prev_nonnote_insn (loop_start
);
7974 p
&& GET_CODE (p
) != CALL_INSN
7975 && GET_CODE (p
) != CODE_LABEL
;
7976 p
= prev_nonnote_insn (p
))
7977 if ((set
= single_set (p
)) != 0
7978 && GET_CODE (SET_DEST (set
)) == REG
7979 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7980 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7982 /* We now have to ensure that nothing between P
7983 and LOOP_START modified anything referenced in
7984 SET_SRC (x). We know that nothing within the loop
7985 can modify it, or we would have invalidated it in
7989 cse_check_loop_start_value
= SET_SRC (x
);
7990 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7991 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7992 note_stores (PATTERN (q
), cse_check_loop_start
);
7994 /* If nothing was changed and we can replace our
7995 SET_SRC, add an insn after P to copy its destination
7996 to what we will be replacing SET_SRC with. */
7997 if (cse_check_loop_start_value
7998 && validate_change (insn
, &SET_SRC (x
),
8000 emit_insn_after (gen_move_insn (src_elt
->exp
,
8008 /* Now invalidate anything modified by X. */
8009 note_mem_written (SET_DEST (x
), &writes_memory
);
8011 if (writes_memory
.var
)
8012 invalidate_memory (&writes_memory
);
8014 /* See comment on similar code in cse_insn for explanation of these
8016 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
8017 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
8018 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
8019 invalidate (SET_DEST (x
), VOIDmode
);
8020 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
8021 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
8022 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
8025 /* Find the end of INSN's basic block and return its range,
8026 the total number of SETs in all the insns of the block, the last insn of the
8027 block, and the branch path.
8029 The branch path indicates which branches should be followed. If a non-zero
8030 path size is specified, the block should be rescanned and a different set
8031 of branches will be taken. The branch path is only used if
8032 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8034 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8035 used to describe the block. It is filled in with the information about
8036 the current block. The incoming structure's branch path, if any, is used
8037 to construct the output branch path. */
8040 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8042 struct cse_basic_block_data
*data
;
8049 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8050 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8051 int path_size
= data
->path_size
;
8055 /* Update the previous branch path, if any. If the last branch was
8056 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8057 shorten the path by one and look at the previous branch. We know that
8058 at least one branch must have been taken if PATH_SIZE is non-zero. */
8059 while (path_size
> 0)
8061 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8063 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8070 /* Scan to end of this basic block. */
8071 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8073 /* Don't cse out the end of a loop. This makes a difference
8074 only for the unusual loops that always execute at least once;
8075 all other loops have labels there so we will stop in any case.
8076 Cse'ing out the end of the loop is dangerous because it
8077 might cause an invariant expression inside the loop
8078 to be reused after the end of the loop. This would make it
8079 hard to move the expression out of the loop in loop.c,
8080 especially if it is one of several equivalent expressions
8081 and loop.c would like to eliminate it.
8083 If we are running after loop.c has finished, we can ignore
8084 the NOTE_INSN_LOOP_END. */
8086 if (! after_loop
&& GET_CODE (p
) == NOTE
8087 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8090 /* Don't cse over a call to setjmp; on some machines (eg vax)
8091 the regs restored by the longjmp come from
8092 a later time than the setjmp. */
8093 if (GET_CODE (p
) == NOTE
8094 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8097 /* A PARALLEL can have lots of SETs in it,
8098 especially if it is really an ASM_OPERANDS. */
8099 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8100 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8101 nsets
+= XVECLEN (PATTERN (p
), 0);
8102 else if (GET_CODE (p
) != NOTE
)
8105 /* Ignore insns made by CSE; they cannot affect the boundaries of
8108 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8109 high_cuid
= INSN_CUID (p
);
8110 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8111 low_cuid
= INSN_CUID (p
);
8113 /* See if this insn is in our branch path. If it is and we are to
8115 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8117 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8120 /* Point to next entry in path, if any. */
8124 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8125 was specified, we haven't reached our maximum path length, there are
8126 insns following the target of the jump, this is the only use of the
8127 jump label, and the target label is preceded by a BARRIER.
8129 Alternatively, we can follow the jump if it branches around a
8130 block of code and there are no other branches into the block.
8131 In this case invalidate_skipped_block will be called to invalidate any
8132 registers set in the block when following the jump. */
8134 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8135 && GET_CODE (p
) == JUMP_INSN
8136 && GET_CODE (PATTERN (p
)) == SET
8137 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8138 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8139 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8141 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8142 if ((GET_CODE (q
) != NOTE
8143 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8144 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8145 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8148 /* If we ran into a BARRIER, this code is an extension of the
8149 basic block when the branch is taken. */
8150 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8152 /* Don't allow ourself to keep walking around an
8153 always-executed loop. */
8154 if (next_real_insn (q
) == next
)
8160 /* Similarly, don't put a branch in our path more than once. */
8161 for (i
= 0; i
< path_entry
; i
++)
8162 if (data
->path
[i
].branch
== p
)
8165 if (i
!= path_entry
)
8168 data
->path
[path_entry
].branch
= p
;
8169 data
->path
[path_entry
++].status
= TAKEN
;
8171 /* This branch now ends our path. It was possible that we
8172 didn't see this branch the last time around (when the
8173 insn in front of the target was a JUMP_INSN that was
8174 turned into a no-op). */
8175 path_size
= path_entry
;
8178 /* Mark block so we won't scan it again later. */
8179 PUT_MODE (NEXT_INSN (p
), QImode
);
8181 /* Detect a branch around a block of code. */
8182 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8186 if (next_real_insn (q
) == next
)
8192 for (i
= 0; i
< path_entry
; i
++)
8193 if (data
->path
[i
].branch
== p
)
8196 if (i
!= path_entry
)
8199 /* This is no_labels_between_p (p, q) with an added check for
8200 reaching the end of a function (in case Q precedes P). */
8201 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8202 if (GET_CODE (tmp
) == CODE_LABEL
)
8207 data
->path
[path_entry
].branch
= p
;
8208 data
->path
[path_entry
++].status
= AROUND
;
8210 path_size
= path_entry
;
8213 /* Mark block so we won't scan it again later. */
8214 PUT_MODE (NEXT_INSN (p
), QImode
);
8221 data
->low_cuid
= low_cuid
;
8222 data
->high_cuid
= high_cuid
;
8223 data
->nsets
= nsets
;
8226 /* If all jumps in the path are not taken, set our path length to zero
8227 so a rescan won't be done. */
8228 for (i
= path_size
- 1; i
>= 0; i
--)
8229 if (data
->path
[i
].status
!= NOT_TAKEN
)
8233 data
->path_size
= 0;
8235 data
->path_size
= path_size
;
8237 /* End the current branch path. */
8238 data
->path
[path_size
].branch
= 0;
8241 /* Perform cse on the instructions of a function.
8242 F is the first instruction.
8243 NREGS is one plus the highest pseudo-reg number used in the instruction.
8245 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8246 (only if -frerun-cse-after-loop).
8248 Returns 1 if jump_optimize should be redone due to simplifications
8249 in conditional jump instructions. */
8252 cse_main (f
, nregs
, after_loop
, file
)
8258 struct cse_basic_block_data val
;
8259 register rtx insn
= f
;
8262 cse_jumps_altered
= 0;
8263 recorded_label_ref
= 0;
8264 constant_pool_entries_cost
= 0;
8271 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8272 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8274 for (i
= 0; i
< nregs
; i
++)
8276 all_minus_one
[i
] = -1;
8280 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8281 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8282 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8283 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8284 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8286 #ifdef LOAD_EXTEND_OP
8288 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8289 and change the code and mode as appropriate. */
8290 memory_extend_rtx
= gen_rtx (ZERO_EXTEND
, VOIDmode
, 0);
8293 /* Discard all the free elements of the previous function
8294 since they are allocated in the temporarily obstack. */
8295 bzero ((char *) table
, sizeof table
);
8296 free_element_chain
= 0;
8297 n_elements_made
= 0;
8299 /* Find the largest uid. */
8301 max_uid
= get_max_uid ();
8302 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8303 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8305 /* Compute the mapping from uids to cuids.
8306 CUIDs are numbers assigned to insns, like uids,
8307 except that cuids increase monotonically through the code.
8308 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8309 between two insns is not affected by -g. */
8311 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8313 if (GET_CODE (insn
) != NOTE
8314 || NOTE_LINE_NUMBER (insn
) < 0)
8315 INSN_CUID (insn
) = ++i
;
8317 /* Give a line number note the same cuid as preceding insn. */
8318 INSN_CUID (insn
) = i
;
8321 /* Initialize which registers are clobbered by calls. */
8323 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8325 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8326 if ((call_used_regs
[i
]
8327 /* Used to check !fixed_regs[i] here, but that isn't safe;
8328 fixed regs are still call-clobbered, and sched can get
8329 confused if they can "live across calls".
8331 The frame pointer is always preserved across calls. The arg
8332 pointer is if it is fixed. The stack pointer usually is, unless
8333 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8334 will be present. If we are generating PIC code, the PIC offset
8335 table register is preserved across calls. */
8337 && i
!= STACK_POINTER_REGNUM
8338 && i
!= FRAME_POINTER_REGNUM
8339 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8340 && i
!= HARD_FRAME_POINTER_REGNUM
8342 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8343 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8345 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8346 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8350 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8352 /* Loop over basic blocks.
8353 Compute the maximum number of qty's needed for each basic block
8354 (which is 2 for each SET). */
8358 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8359 flag_cse_skip_blocks
);
8361 /* If this basic block was already processed or has no sets, skip it. */
8362 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8364 PUT_MODE (insn
, VOIDmode
);
8365 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8370 cse_basic_block_start
= val
.low_cuid
;
8371 cse_basic_block_end
= val
.high_cuid
;
8372 max_qty
= val
.nsets
* 2;
8375 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8376 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8379 /* Make MAX_QTY bigger to give us room to optimize
8380 past the end of this basic block, if that should prove useful. */
8386 /* If this basic block is being extended by following certain jumps,
8387 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8388 Otherwise, we start after this basic block. */
8389 if (val
.path_size
> 0)
8390 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8393 int old_cse_jumps_altered
= cse_jumps_altered
;
8396 /* When cse changes a conditional jump to an unconditional
8397 jump, we want to reprocess the block, since it will give
8398 us a new branch path to investigate. */
8399 cse_jumps_altered
= 0;
8400 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8401 if (cse_jumps_altered
== 0
8402 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8405 cse_jumps_altered
|= old_cse_jumps_altered
;
8413 /* Tell refers_to_mem_p that qty_const info is not available. */
8416 if (max_elements_made
< n_elements_made
)
8417 max_elements_made
= n_elements_made
;
8419 return cse_jumps_altered
|| recorded_label_ref
;
8422 /* Process a single basic block. FROM and TO and the limits of the basic
8423 block. NEXT_BRANCH points to the branch path when following jumps or
8424 a null path when not following jumps.
8426 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8427 loop. This is true when we are being called for the last time on a
8428 block and this CSE pass is before loop.c. */
8431 cse_basic_block (from
, to
, next_branch
, around_loop
)
8432 register rtx from
, to
;
8433 struct branch_path
*next_branch
;
8438 int in_libcall_block
= 0;
8440 /* Each of these arrays is undefined before max_reg, so only allocate
8441 the space actually needed and adjust the start below. */
8443 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8444 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8445 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8446 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8447 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8449 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8450 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8451 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8453 qty_first_reg
-= max_reg
;
8454 qty_last_reg
-= max_reg
;
8455 qty_mode
-= max_reg
;
8456 qty_const
-= max_reg
;
8457 qty_const_insn
-= max_reg
;
8458 qty_comparison_code
-= max_reg
;
8459 qty_comparison_qty
-= max_reg
;
8460 qty_comparison_const
-= max_reg
;
8464 /* TO might be a label. If so, protect it from being deleted. */
8465 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8468 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8470 register enum rtx_code code
;
8472 /* See if this is a branch that is part of the path. If so, and it is
8473 to be taken, do so. */
8474 if (next_branch
->branch
== insn
)
8476 enum taken status
= next_branch
++->status
;
8477 if (status
!= NOT_TAKEN
)
8479 if (status
== TAKEN
)
8480 record_jump_equiv (insn
, 1);
8482 invalidate_skipped_block (NEXT_INSN (insn
));
8484 /* Set the last insn as the jump insn; it doesn't affect cc0.
8485 Then follow this branch. */
8490 insn
= JUMP_LABEL (insn
);
8495 code
= GET_CODE (insn
);
8496 if (GET_MODE (insn
) == QImode
)
8497 PUT_MODE (insn
, VOIDmode
);
8499 if (GET_RTX_CLASS (code
) == 'i')
8501 /* Process notes first so we have all notes in canonical forms when
8502 looking for duplicate operations. */
8504 if (REG_NOTES (insn
))
8505 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8507 /* Track when we are inside in LIBCALL block. Inside such a block,
8508 we do not want to record destinations. The last insn of a
8509 LIBCALL block is not considered to be part of the block, since
8510 its destination is the result of the block and hence should be
8513 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8514 in_libcall_block
= 1;
8515 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8516 in_libcall_block
= 0;
8518 cse_insn (insn
, in_libcall_block
);
8521 /* If INSN is now an unconditional jump, skip to the end of our
8522 basic block by pretending that we just did the last insn in the
8523 basic block. If we are jumping to the end of our block, show
8524 that we can have one usage of TO. */
8526 if (simplejump_p (insn
))
8531 if (JUMP_LABEL (insn
) == to
)
8534 /* Maybe TO was deleted because the jump is unconditional.
8535 If so, there is nothing left in this basic block. */
8536 /* ??? Perhaps it would be smarter to set TO
8537 to whatever follows this insn,
8538 and pretend the basic block had always ended here. */
8539 if (INSN_DELETED_P (to
))
8542 insn
= PREV_INSN (to
);
8545 /* See if it is ok to keep on going past the label
8546 which used to end our basic block. Remember that we incremented
8547 the count of that label, so we decrement it here. If we made
8548 a jump unconditional, TO_USAGE will be one; in that case, we don't
8549 want to count the use in that jump. */
8551 if (to
!= 0 && NEXT_INSN (insn
) == to
8552 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8554 struct cse_basic_block_data val
;
8557 insn
= NEXT_INSN (to
);
8559 if (LABEL_NUSES (to
) == 0)
8560 insn
= delete_insn (to
);
8562 /* If TO was the last insn in the function, we are done. */
8566 /* If TO was preceded by a BARRIER we are done with this block
8567 because it has no continuation. */
8568 prev
= prev_nonnote_insn (to
);
8569 if (prev
&& GET_CODE (prev
) == BARRIER
)
8572 /* Find the end of the following block. Note that we won't be
8573 following branches in this case. */
8576 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8578 /* If the tables we allocated have enough space left
8579 to handle all the SETs in the next basic block,
8580 continue through it. Otherwise, return,
8581 and that block will be scanned individually. */
8582 if (val
.nsets
* 2 + next_qty
> max_qty
)
8585 cse_basic_block_start
= val
.low_cuid
;
8586 cse_basic_block_end
= val
.high_cuid
;
8589 /* Prevent TO from being deleted if it is a label. */
8590 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8593 /* Back up so we process the first insn in the extension. */
8594 insn
= PREV_INSN (insn
);
8598 if (next_qty
> max_qty
)
8601 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8602 the previous insn is the only insn that branches to the head of a loop,
8603 we can cse into the loop. Don't do this if we changed the jump
8604 structure of a loop unless we aren't going to be following jumps. */
8606 if ((cse_jumps_altered
== 0
8607 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8608 && around_loop
&& to
!= 0
8609 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8610 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8611 && JUMP_LABEL (PREV_INSN (to
)) != 0
8612 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8613 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8615 return to
? NEXT_INSN (to
) : 0;
8618 /* Count the number of times registers are used (not set) in X.
8619 COUNTS is an array in which we accumulate the count, INCR is how much
8620 we count each register usage.
8622 Don't count a usage of DEST, which is the SET_DEST of a SET which
8623 contains X in its SET_SRC. This is because such a SET does not
8624 modify the liveness of DEST. */
8627 count_reg_usage (x
, counts
, dest
, incr
)
8640 switch (code
= GET_CODE (x
))
8644 counts
[REGNO (x
)] += incr
;
8658 /* Unless we are setting a REG, count everything in SET_DEST. */
8659 if (GET_CODE (SET_DEST (x
)) != REG
)
8660 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8662 /* If SRC has side-effects, then we can't delete this insn, so the
8663 usage of SET_DEST inside SRC counts.
8665 ??? Strictly-speaking, we might be preserving this insn
8666 because some other SET has side-effects, but that's hard
8667 to do and can't happen now. */
8668 count_reg_usage (SET_SRC (x
), counts
,
8669 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8674 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8676 /* ... falls through ... */
8679 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8681 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8684 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8689 if (REG_NOTE_KIND (x
) == REG_EQUAL
8690 || GET_CODE (XEXP (x
,0)) == USE
)
8691 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8692 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8696 fmt
= GET_RTX_FORMAT (code
);
8697 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8700 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8701 else if (fmt
[i
] == 'E')
8702 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8703 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8707 /* Scan all the insns and delete any that are dead; i.e., they store a register
8708 that is never used or they copy a register to itself.
8710 This is used to remove insns made obviously dead by cse. It improves the
8711 heuristics in loop since it won't try to move dead invariants out of loops
8712 or make givs for dead quantities. The remaining passes of the compilation
8713 are also sped up. */
8716 delete_dead_from_cse (insns
, nreg
)
8720 int *counts
= (int *) alloca (nreg
* sizeof (int));
8726 /* First count the number of times each register is used. */
8727 bzero ((char *) counts
, sizeof (int) * nreg
);
8728 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8729 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8731 /* Go from the last insn to the first and delete insns that only set unused
8732 registers or copy a register to itself. As we delete an insn, remove
8733 usage counts for registers it uses. */
8734 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8738 prev
= prev_real_insn (insn
);
8740 /* Don't delete any insns that are part of a libcall block.
8741 Flow or loop might get confused if we did that. Remember
8742 that we are scanning backwards. */
8743 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8748 else if (GET_CODE (PATTERN (insn
)) == SET
)
8750 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8751 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8755 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8756 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8757 && ((tem
= next_nonnote_insn (insn
)) == 0
8758 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8759 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8762 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8763 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8764 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8765 || side_effects_p (SET_SRC (PATTERN (insn
))))
8768 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8769 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8771 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8773 if (GET_CODE (elt
) == SET
)
8775 if (GET_CODE (SET_DEST (elt
)) == REG
8776 && SET_DEST (elt
) == SET_SRC (elt
))
8780 else if (GET_CODE (SET_DEST (elt
)) == CC0
8781 && ! side_effects_p (SET_SRC (elt
))
8782 && ((tem
= next_nonnote_insn (insn
)) == 0
8783 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8784 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8787 else if (GET_CODE (SET_DEST (elt
)) != REG
8788 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8789 || counts
[REGNO (SET_DEST (elt
))] != 0
8790 || side_effects_p (SET_SRC (elt
)))
8793 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8799 /* If this is a dead insn, delete it and show registers in it aren't
8804 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8808 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))