1 @c Copyright (C) 1988, 1989, 1992, 1994, 1997, 1998, 1999, 2000, 2001, 2002
2 @c Free Software Foundation, Inc.
3 @c This is part of the GCC manual.
4 @c For copying conditions, see the file gcc.texi.
7 @chapter RTL Representation
8 @cindex RTL representation
9 @cindex representation of RTL
10 @cindex Register Transfer Language (RTL)
12 Most of the work of the compiler is done on an intermediate representation
13 called register transfer language. In this language, the instructions to be
14 output are described, pretty much one by one, in an algebraic form that
15 describes what the instruction does.
17 RTL is inspired by Lisp lists. It has both an internal form, made up of
18 structures that point at other structures, and a textual form that is used
19 in the machine description and in printed debugging dumps. The textual
20 form uses nested parentheses to indicate the pointers in the internal form.
23 * RTL Objects:: Expressions vs vectors vs strings vs integers.
24 * RTL Classes:: Categories of RTL expression objects, and their structure.
25 * Accessors:: Macros to access expression operands or vector elts.
26 * Flags:: Other flags in an RTL expression.
27 * Machine Modes:: Describing the size and format of a datum.
28 * Constants:: Expressions with constant values.
29 * Regs and Memory:: Expressions representing register contents or memory.
30 * Arithmetic:: Expressions representing arithmetic on other expressions.
31 * Comparisons:: Expressions representing comparison of expressions.
32 * Bit-Fields:: Expressions representing bit-fields in memory or reg.
33 * Vector Operations:: Expressions involving vector datatypes.
34 * Conversions:: Extending, truncating, floating or fixing.
35 * RTL Declarations:: Declaring volatility, constancy, etc.
36 * Side Effects:: Expressions for storing in registers, etc.
37 * Incdec:: Embedded side-effects for autoincrement addressing.
38 * Assembler:: Representing @code{asm} with operands.
39 * Insns:: Expression types for entire insns.
40 * Calls:: RTL representation of function call insns.
41 * Sharing:: Some expressions are unique; others *must* be copied.
42 * Reading RTL:: Reading textual RTL from a file.
46 @section RTL Object Types
47 @cindex RTL object types
52 @cindex RTL expression
54 RTL uses five kinds of objects: expressions, integers, wide integers,
55 strings and vectors. Expressions are the most important ones. An RTL
56 expression (``RTX'', for short) is a C structure, but it is usually
57 referred to with a pointer; a type that is given the typedef name
60 An integer is simply an @code{int}; their written form uses decimal
61 digits. A wide integer is an integral object whose type is
62 @code{HOST_WIDE_INT}; their written form uses decimal digits.
64 A string is a sequence of characters. In core it is represented as a
65 @code{char *} in usual C fashion, and it is written in C syntax as well.
66 However, strings in RTL may never be null. If you write an empty string in
67 a machine description, it is represented in core as a null pointer rather
68 than as a pointer to a null character. In certain contexts, these null
69 pointers instead of strings are valid. Within RTL code, strings are most
70 commonly found inside @code{symbol_ref} expressions, but they appear in
71 other contexts in the RTL expressions that make up machine descriptions.
73 In a machine description, strings are normally written with double
74 quotes, as you would in C. However, strings in machine descriptions may
75 extend over many lines, which is invalid C, and adjacent string
76 constants are not concatenated as they are in C. Any string constant
77 may be surrounded with a single set of parentheses. Sometimes this
78 makes the machine description easier to read.
80 There is also a special syntax for strings, which can be useful when C
81 code is embedded in a machine description. Wherever a string can
82 appear, it is also valid to write a C-style brace block. The entire
83 brace block, including the outermost pair of braces, is considered to be
84 the string constant. Double quote characters inside the braces are not
85 special. Therefore, if you write string constants in the C code, you
86 need not escape each quote character with a backslash.
88 A vector contains an arbitrary number of pointers to expressions. The
89 number of elements in the vector is explicitly present in the vector.
90 The written form of a vector consists of square brackets
91 (@samp{[@dots{}]}) surrounding the elements, in sequence and with
92 whitespace separating them. Vectors of length zero are not created;
93 null pointers are used instead.
95 @cindex expression codes
96 @cindex codes, RTL expression
99 Expressions are classified by @dfn{expression codes} (also called RTX
100 codes). The expression code is a name defined in @file{rtl.def}, which is
101 also (in upper case) a C enumeration constant. The possible expression
102 codes and their meanings are machine-independent. The code of an RTX can
103 be extracted with the macro @code{GET_CODE (@var{x})} and altered with
104 @code{PUT_CODE (@var{x}, @var{newcode})}.
106 The expression code determines how many operands the expression contains,
107 and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
108 by looking at an operand what kind of object it is. Instead, you must know
109 from its context---from the expression code of the containing expression.
110 For example, in an expression of code @code{subreg}, the first operand is
111 to be regarded as an expression and the second operand as an integer. In
112 an expression of code @code{plus}, there are two operands, both of which
113 are to be regarded as expressions. In a @code{symbol_ref} expression,
114 there is one operand, which is to be regarded as a string.
116 Expressions are written as parentheses containing the name of the
117 expression type, its flags and machine mode if any, and then the operands
118 of the expression (separated by spaces).
120 Expression code names in the @samp{md} file are written in lower case,
121 but when they appear in C code they are written in upper case. In this
122 manual, they are shown as follows: @code{const_int}.
126 In a few contexts a null pointer is valid where an expression is normally
127 wanted. The written form of this is @code{(nil)}.
130 @section RTL Classes and Formats
132 @cindex classes of RTX codes
133 @cindex RTX codes, classes of
134 @findex GET_RTX_CLASS
136 The various expression codes are divided into several @dfn{classes},
137 which are represented by single characters. You can determine the class
138 of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
139 Currently, @file{rtx.def} defines these classes:
143 An RTX code that represents an actual object, such as a register
144 (@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
145 Constants and basic transforms on objects (@code{ADDRESSOF},
146 @code{HIGH}, @code{LO_SUM}) are also included. Note that @code{SUBREG}
147 and @code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
150 An RTX code for a comparison, such as @code{NE} or @code{LT}.
153 An RTX code for a unary arithmetic operation, such as @code{NEG},
154 @code{NOT}, or @code{ABS}. This category also includes value extension
155 (sign or zero) and conversions between integer and floating point.
158 An RTX code for a commutative binary operation, such as @code{PLUS} or
159 @code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class
163 An RTX code for a non-commutative binary operation, such as @code{MINUS},
164 @code{DIV}, or @code{ASHIFTRT}.
167 An RTX code for a bit-field operation. Currently only
168 @code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs
169 and are lvalues (so they can be used for insertion as well).
173 An RTX code for other three input operations. Currently only
177 An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and
178 @code{CALL_INSN}. @xref{Insns}.
181 An RTX code for something that matches in insns, such as
182 @code{MATCH_DUP}. These only occur in machine descriptions.
185 An RTX code for an auto-increment addressing mode, such as
189 All other RTX codes. This category includes the remaining codes used
190 only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
191 all the codes describing side effects (@code{SET}, @code{USE},
192 @code{CLOBBER}, etc.) and the non-insns that may appear on an insn
193 chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
197 For each expression code, @file{rtl.def} specifies the number of
198 contained objects and their kinds using a sequence of characters
199 called the @dfn{format} of the expression code. For example,
200 the format of @code{subreg} is @samp{ei}.
202 @cindex RTL format characters
203 These are the most commonly used format characters:
207 An expression (actually a pointer to an expression).
219 A vector of expressions.
222 A few other format characters are used occasionally:
226 @samp{u} is equivalent to @samp{e} except that it is printed differently
227 in debugging dumps. It is used for pointers to insns.
230 @samp{n} is equivalent to @samp{i} except that it is printed differently
231 in debugging dumps. It is used for the line number or code number of a
235 @samp{S} indicates a string which is optional. In the RTL objects in
236 core, @samp{S} is equivalent to @samp{s}, but when the object is read,
237 from an @samp{md} file, the string value of this operand may be omitted.
238 An omitted string is taken to be the null string.
241 @samp{V} indicates a vector which is optional. In the RTL objects in
242 core, @samp{V} is equivalent to @samp{E}, but when the object is read
243 from an @samp{md} file, the vector value of this operand may be omitted.
244 An omitted vector is effectively the same as a vector of no elements.
247 @samp{0} means a slot whose contents do not fit any normal category.
248 @samp{0} slots are not printed at all in dumps, and are often used in
249 special ways by small parts of the compiler.
252 There are macros to get the number of operands and the format
253 of an expression code:
256 @findex GET_RTX_LENGTH
257 @item GET_RTX_LENGTH (@var{code})
258 Number of operands of an RTX of code @var{code}.
260 @findex GET_RTX_FORMAT
261 @item GET_RTX_FORMAT (@var{code})
262 The format of an RTX of code @var{code}, as a C string.
265 Some classes of RTX codes always have the same format. For example, it
266 is safe to assume that all comparison operations have format @code{ee}.
270 All codes of this class have format @code{e}.
275 All codes of these classes have format @code{ee}.
279 All codes of these classes have format @code{eee}.
282 All codes of this class have formats that begin with @code{iuueiee}.
283 @xref{Insns}. Note that not all RTL objects linked onto an insn chain
284 are of class @code{i}.
289 You can make no assumptions about the format of these codes.
293 @section Access to Operands
295 @cindex access to operands
296 @cindex operand access
302 Operands of expressions are accessed using the macros @code{XEXP},
303 @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
304 two arguments: an expression-pointer (RTX) and an operand number
305 (counting from zero). Thus,
312 accesses operand 2 of expression @var{x}, as an expression.
319 accesses the same operand as an integer. @code{XSTR}, used in the same
320 fashion, would access it as a string.
322 Any operand can be accessed as an integer, as an expression or as a string.
323 You must choose the correct method of access for the kind of value actually
324 stored in the operand. You would do this based on the expression code of
325 the containing expression. That is also how you would know how many
328 For example, if @var{x} is a @code{subreg} expression, you know that it has
329 two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
330 and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
331 would get the address of the expression operand but cast as an integer;
332 that might occasionally be useful, but it would be cleaner to write
333 @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
334 compile without error, and would return the second, integer operand cast as
335 an expression pointer, which would probably result in a crash when
336 accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
337 but this will access memory past the end of the expression with
338 unpredictable results.
340 Access to operands which are vectors is more complicated. You can use the
341 macro @code{XVEC} to get the vector-pointer itself, or the macros
342 @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
347 @item XVEC (@var{exp}, @var{idx})
348 Access the vector-pointer which is operand number @var{idx} in @var{exp}.
351 @item XVECLEN (@var{exp}, @var{idx})
352 Access the length (number of elements) in the vector which is
353 in operand number @var{idx} in @var{exp}. This value is an @code{int}.
356 @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
357 Access element number @var{eltnum} in the vector which is
358 in operand number @var{idx} in @var{exp}. This value is an RTX@.
360 It is up to you to make sure that @var{eltnum} is not negative
361 and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
364 All the macros defined in this section expand into lvalues and therefore
365 can be used to assign the operands, lengths and vector elements as well as
369 @section Flags in an RTL Expression
370 @cindex flags in RTL expression
372 RTL expressions contain several flags (one-bit bit-fields)
373 that are used in certain types of expression. Most often they
374 are accessed with the following macros, which expand into lvalues.
377 @findex CONSTANT_POOL_ADDRESS_P
378 @cindex @code{symbol_ref} and @samp{/u}
379 @cindex @code{unchanging}, in @code{symbol_ref}
380 @item CONSTANT_POOL_ADDRESS_P (@var{x})
381 Nonzero in a @code{symbol_ref} if it refers to part of the current
382 function's constant pool. For most targets these addresses are in a
383 @code{.rodata} section entirely separate from the function, but for
384 some targets the addresses are close to the beginning of the function.
385 In either case GCC assumes these addresses can be addressed directly,
386 perhaps with the help of base registers.
387 Stored in the @code{unchanging} field and printed as @samp{/u}.
389 @findex CONST_OR_PURE_CALL_P
390 @cindex @code{call_insn} and @samp{/u}
391 @cindex @code{unchanging}, in @code{call_insn}
392 @item CONST_OR_PURE_CALL_P (@var{x})
393 In a @code{call_insn}, @code{note}, or an @code{expr_list} for notes,
394 indicates that the insn represents a call to a const or pure function.
395 Stored in the @code{unchanging} field and printed as @samp{/u}.
397 @findex INSN_ANNULLED_BRANCH_P
398 @cindex @code{insn} and @samp{/u}
399 @cindex @code{unchanging}, in @code{insn}
400 @item INSN_ANNULLED_BRANCH_P (@var{x})
401 In an @code{insn} in the delay slot of a branch insn, indicates that an
402 annulling branch should be used. See the discussion under
403 @code{sequence} below. Stored in the @code{unchanging} field and printed
406 @findex INSN_DEAD_CODE_P
407 @cindex @code{insn} and @samp{/s}
408 @cindex @code{in_struct}, in @code{insn}
409 @item INSN_DEAD_CODE_P (@var{x})
410 In an @code{insn} during the dead-code elimination pass, nonzero if the
412 Stored in the @code{in_struct} field and printed as @samp{/s}.
414 @findex INSN_DELETED_P
415 @cindex @code{insn} and @samp{/v}
416 @cindex @code{call_insn} and @samp{/v}
417 @cindex @code{jump_insn} and @samp{/v}
418 @cindex @code{code_label} and @samp{/v}
419 @cindex @code{barrier} and @samp{/v}
420 @cindex @code{note} and @samp{/v}
421 @cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{barrier}, and @code{note}
422 @item INSN_DELETED_P (@var{x})
423 In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
424 @code{barrier}, or @code{note},
425 nonzero if the insn has been deleted. Stored in the
426 @code{volatil} field and printed as @samp{/v}.
428 @findex INSN_FROM_TARGET_P
429 @cindex @code{insn} and @samp{/s}
430 @cindex @code{in_struct}, in @code{insn}
431 @item INSN_FROM_TARGET_P (@var{x})
432 In an @code{insn} in a delay slot of a branch, indicates that the insn
433 is from the target of the branch. If the branch insn has
434 @code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
435 the branch is taken. For annulled branches with
436 @code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
437 branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set,
438 this insn will always be executed. Stored in the @code{in_struct}
439 field and printed as @samp{/s}.
441 @findex LABEL_OUTSIDE_LOOP_P
442 @cindex @code{label_ref} and @samp{/s}
443 @cindex @code{in_struct}, in @code{label_ref}
444 @item LABEL_OUTSIDE_LOOP_P (@var{x})
445 In @code{label_ref} expressions, nonzero if this is a reference to a
446 label that is outside the innermost loop containing the reference to the
447 label. Stored in the @code{in_struct} field and printed as @samp{/s}.
449 @findex LABEL_PRESERVE_P
450 @cindex @code{code_label} and @samp{/i}
451 @cindex @code{note} and @samp{/i}
452 @cindex @code{in_struct}, in @code{code_label} and @code{note}
453 @item LABEL_PRESERVE_P (@var{x})
454 In a @code{code_label} or @code{note}, indicates that the label is referenced by
455 code or data not visible to the RTL of a given function.
456 Labels referenced by a non-local goto will have this bit set. Stored
457 in the @code{in_struct} field and printed as @samp{/s}.
459 @findex LABEL_REF_NONLOCAL_P
460 @cindex @code{label_ref} and @samp{/v}
461 @cindex @code{reg_label} and @samp{/v}
462 @cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
463 @item LABEL_REF_NONLOCAL_P (@var{x})
464 In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
465 a reference to a non-local label.
466 Stored in the @code{volatil} field and printed as @samp{/v}.
468 @findex MEM_IN_STRUCT_P
469 @cindex @code{mem} and @samp{/s}
470 @cindex @code{in_struct}, in @code{mem}
471 @item MEM_IN_STRUCT_P (@var{x})
472 In @code{mem} expressions, nonzero for reference to an entire structure,
473 union or array, or to a component of one. Zero for references to a
474 scalar variable or through a pointer to a scalar. If both this flag and
475 @code{MEM_SCALAR_P} are clear, then we don't know whether this @code{mem}
476 is in a structure or not. Both flags should never be simultaneously set.
477 Stored in the @code{in_struct} field and printed as @samp{/s}.
479 @findex MEM_KEEP_ALIAS_SET_P
480 @cindex @code{mem} and @samp{/j}
481 @cindex @code{jump}, in @code{mem}
482 @item MEM_KEEP_ALIAS_SET_P (@var{x})
483 In @code{mem} expressions, 1 if we should keep the alias set for this
484 mem unchanged when we access a component. Set to 1, for example, when we
485 are already in a non-addressable component of an aggregate.
486 Stored in the @code{jump} field and printed as @samp{/j}.
489 @cindex @code{mem} and @samp{/f}
490 @cindex @code{frame_related}, in @code{mem}
491 @item MEM_SCALAR_P (@var{x})
492 In @code{mem} expressions, nonzero for reference to a scalar known not
493 to be a member of a structure, union, or array. Zero for such
494 references and for indirections through pointers, even pointers pointing
495 to scalar types. If both this flag and @code{MEM_IN_STRUCT_P} are clear,
496 then we don't know whether this @code{mem} is in a structure or not.
497 Both flags should never be simultaneously set.
498 Stored in the @code{frame_related} field and printed as @samp{/f}.
500 @findex MEM_VOLATILE_P
501 @cindex @code{mem} and @samp{/v}
502 @cindex @code{asm_operands} and @samp{/v}
503 @cindex @code{volatil}, in @code{mem} and @code{asm_operands}
504 @item MEM_VOLATILE_P (@var{x})
505 In @code{mem} and @code{asm_operands} expressions, nonzero for volatile
507 Stored in the @code{volatil} field and printed as @samp{/v}.
509 @findex REG_FUNCTION_VALUE_P
510 @cindex @code{reg} and @samp{/i}
511 @cindex @code{integrated}, in @code{reg}
512 @item REG_FUNCTION_VALUE_P (@var{x})
513 Nonzero in a @code{reg} if it is the place in which this function's
514 value is going to be returned. (This happens only in a hard
515 register.) Stored in the @code{integrated} field and printed as
518 @findex REG_LOOP_TEST_P
519 @cindex @code{reg} and @samp{/s}
520 @cindex @code{in_struct}, in @code{reg}
521 @item REG_LOOP_TEST_P (@var{x})
522 In @code{reg} expressions, nonzero if this register's entire life is
523 contained in the exit test code for some loop. Stored in the
524 @code{in_struct} field and printed as @samp{/s}.
527 @cindex @code{reg} and @samp{/f}
528 @cindex @code{frame_related}, in @code{reg}
529 @item REG_POINTER (@var{x})
530 Nonzero in a @code{reg} if the register holds a pointer. Stored in the
531 @code{frame_related} field and printed as @samp{/f}.
533 @findex REG_USERVAR_P
534 @cindex @code{reg} and @samp{/v}
535 @cindex @code{volatil}, in @code{reg}
536 @item REG_USERVAR_P (@var{x})
537 In a @code{reg}, nonzero if it corresponds to a variable present in
538 the user's source code. Zero for temporaries generated internally by
539 the compiler. Stored in the @code{volatil} field and printed as
542 The same hard register may be used also for collecting the values of
543 functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
546 @findex RTX_FRAME_RELATED_P
547 @cindex @code{insn} and @samp{/f}
548 @cindex @code{call_insn} and @samp{/f}
549 @cindex @code{jump_insn} and @samp{/f}
550 @cindex @code{barrier} and @samp{/f}
551 @cindex @code{set} and @samp{/f}
552 @cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set}
553 @item RTX_FRAME_RELATED_P (@var{x})
554 Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
555 @code{barrier}, or @code{set} which is part of a function prologue
556 and sets the stack pointer, sets the frame pointer, or saves a register.
557 This flag should also be set on an instruction that sets up a temporary
558 register to use in place of the frame pointer.
559 Stored in the @code{frame_related} field and printed as @samp{/f}.
561 In particular, on RISC targets where there are limits on the sizes of
562 immediate constants, it is sometimes impossible to reach the register
563 save area directly from the stack pointer. In that case, a temporary
564 register is used that is near enough to the register save area, and the
565 Canonical Frame Address, i.e., DWARF2's logical frame pointer, register
566 must (temporarily) be changed to be this temporary register. So, the
567 instruction that sets this temporary register must be marked as
568 @code{RTX_FRAME_RELATED_P}.
570 If the marked instruction is overly complex (defined in terms of what
571 @code{dwarf2out_frame_debug_expr} can handle), you will also have to
572 create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
573 instruction. This note should contain a simple expression of the
574 computation performed by this instruction, i.e., one that
575 @code{dwarf2out_frame_debug_expr} can handle.
577 This flag is required for exception handling support on targets with RTL
580 @findex RTX_INTEGRATED_P
581 @cindex @code{insn} and @samp{/i}
582 @cindex @code{call_insn} and @samp{/i}
583 @cindex @code{jump_insn} and @samp{/i}
584 @cindex @code{barrier} and @samp{/i}
585 @cindex @code{code_label} and @samp{/i}
586 @cindex @code{insn_list} and @samp{/i}
587 @cindex @code{const} and @samp{/i}
588 @cindex @code{note} and @samp{/i}
589 @cindex @code{integrated}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, @code{code_label}, @code{insn_list}, @code{const}, and @code{note}
590 @item RTX_INTEGRATED_P (@var{x})
591 Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier},
592 @code{code_label}, @code{insn_list}, @code{const}, or @code{note} if it
593 resulted from an in-line function call.
594 Stored in the @code{integrated} field and printed as @samp{/i}.
596 @findex RTX_UNCHANGING_P
597 @cindex @code{reg} and @samp{/u}
598 @cindex @code{mem} and @samp{/u}
599 @cindex @code{concat} and @samp{/u}
600 @cindex @code{unchanging}, in @code{reg} and @code{mem}
601 @item RTX_UNCHANGING_P (@var{x})
602 Nonzero in a @code{reg}, @code{mem}, or @code{concat} if the memory
604 anywhere. This does not mean that it is function invariant.
605 Stored in the @code{unchanging} field and printed as @samp{/u}.
607 @findex SCHED_GROUP_P
608 @cindex @code{insn} and @samp{/i}
609 @cindex @code{call_insn} and @samp{/i}
610 @cindex @code{jump_insn} and @samp{/i}
611 @cindex @code{code_label} and @samp{/i}
612 @cindex @code{barrier} and @samp{/i}
613 @cindex @code{note} and @samp{/i}
614 @cindex @code{in_struct}, in @code{insn}, @code{jump_insn}, @code{call_insn}, @code{code_label}, @code{barrier}, and @code{note}
615 @item SCHED_GROUP_P (@var{x})
616 During instruction scheduling, in an @code{insn}, @code{call_insn},
617 @code{jump_insn}, @code{code_label}, @code{barrier}, or
618 @code{note}, indicates that the
619 previous insn must be scheduled together with this insn. This is used to
620 ensure that certain groups of instructions will not be split up by the
621 instruction scheduling pass, for example, @code{use} insns before
622 a @code{call_insn} may not be separated from the @code{call_insn}.
623 Stored in the @code{in_struct} field and printed as @samp{/s}.
625 @findex SET_IS_RETURN_P
626 @cindex @code{insn} and @samp{/j}
627 @cindex @code{jump}, in @code{insn}
628 @item SET_IS_RETURN_P (@var{x})
629 For a @code{set}, nonzero if it is for a return.
630 Stored in the @code{jump} field and printed as @samp{/j}.
632 @findex SIBLING_CALL_P
633 @cindex @code{call_insn} and @samp{/j}
634 @cindex @code{jump}, in @code{call_insn}
635 @item SIBLING_CALL_P (@var{x})
636 For a @code{call_insn}, nonzero if the insn is a sibling call.
637 Stored in the @code{jump} field and printed as @samp{/j}.
639 @findex STRING_POOL_ADDRESS_P
640 @cindex @code{symbol_ref} and @samp{/f}
641 @cindex @code{frame_related}, in @code{symbol_ref}
642 @item STRING_POOL_ADDRESS_P (@var{x})
643 For a @code{symbol_ref} expression, nonzero if it addresses this function's
644 string constant pool.
645 Stored in the @code{frame_related} field and printed as @samp{/f}.
647 @findex SUBREG_PROMOTED_UNSIGNED_P
648 @cindex @code{subreg} and @samp{/u} and @samp{/v}
649 @cindex @code{unchanging}, in @code{subreg}
650 @cindex @code{volatil}, in @code{subreg}
651 @item SUBREG_PROMOTED_UNSIGNED_P (@var{x})
652 Returns a value greater then zero for a @code{subreg} that has
653 @code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
654 zero-extended, zero if it is kept sign-extended, and less then zero if it is
655 extended some other way via the @code{ptr_extend} instruction.
656 Stored in the @code{unchanging}
657 field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
658 This macro may only be used to get the value it may not be used to change
659 the value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
661 @findex SUBREG_PROMOTED_UNSIGNED_SET
662 @cindex @code{subreg} and @samp{/u}
663 @cindex @code{unchanging}, in @code{subreg}
664 @cindex @code{volatil}, in @code{subreg}
665 @item SUBREG_PROMOTED_UNSIGNED_SET (@var{x})
666 Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
667 to reflect zero, sign, or other extension. If @code{volatil} is
668 zero, then @code{unchanging} as nonzero means zero extension and as
669 zero means sign extension. If @code{volatil} is nonzero then some
670 other type of extension was done via the @code{ptr_extend} instruction.
672 @findex SUBREG_PROMOTED_VAR_P
673 @cindex @code{subreg} and @samp{/s}
674 @cindex @code{in_struct}, in @code{subreg}
675 @item SUBREG_PROMOTED_VAR_P (@var{x})
676 Nonzero in a @code{subreg} if it was made when accessing an object that
677 was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
678 description macro (@pxref{Storage Layout}). In this case, the mode of
679 the @code{subreg} is the declared mode of the object and the mode of
680 @code{SUBREG_REG} is the mode of the register that holds the object.
681 Promoted variables are always either sign- or zero-extended to the wider
682 mode on every assignment. Stored in the @code{in_struct} field and
683 printed as @samp{/s}.
685 @findex SYMBOL_REF_FLAG
686 @cindex @code{symbol_ref} and @samp{/v}
687 @cindex @code{volatil}, in @code{symbol_ref}
688 @item SYMBOL_REF_FLAG (@var{x})
689 In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
690 Stored in the @code{volatil} field and printed as @samp{/v}.
692 @findex SYMBOL_REF_USED
693 @cindex @code{used}, in @code{symbol_ref}
694 @item SYMBOL_REF_USED (@var{x})
695 In a @code{symbol_ref}, indicates that @var{x} has been used. This is
696 normally only used to ensure that @var{x} is only declared external
697 once. Stored in the @code{used} field.
699 @findex SYMBOL_REF_WEAK
700 @cindex @code{symbol_ref} and @samp{/i}
701 @cindex @code{integrated}, in @code{symbol_ref}
702 @item SYMBOL_REF_WEAK (@var{x})
703 In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
704 Stored in the @code{integrated} field and printed as @samp{/i}.
707 These are the fields to which the above macros refer:
711 @cindex @samp{/c} in RTL dump
713 This flag is currently unused.
715 In an RTL dump, this flag is represented as @samp{/c}.
717 @findex frame_related
718 @cindex @samp{/f} in RTL dump
720 In an @code{insn} or @code{set} expression, 1 means that it is part of
721 a function prologue and sets the stack pointer, sets the frame pointer,
722 saves a register, or sets up a temporary register to use in place of the
725 In @code{reg} expressions, 1 means that the register holds a pointer.
727 In @code{symbol_ref} expressions, 1 means that the reference addresses
728 this function's string constant pool.
730 In @code{mem} expressions, 1 means that the reference is to a scalar.
732 In an RTL dump, this flag is represented as @samp{/f}.
735 @cindex @samp{/s} in RTL dump
737 In @code{mem} expressions, it is 1 if the memory datum referred to is
738 all or part of a structure or array; 0 if it is (or might be) a scalar
739 variable. A reference through a C pointer has 0 because the pointer
740 might point to a scalar variable. This information allows the compiler
741 to determine something about possible cases of aliasing.
743 In @code{reg} expressions, it is 1 if the register has its entire life
744 contained within the test expression of some loop.
746 In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
747 an object that has had its mode promoted from a wider mode.
749 In @code{label_ref} expressions, 1 means that the referenced label is
750 outside the innermost loop containing the insn in which the @code{label_ref}
753 In @code{code_label} expressions, it is 1 if the label may never be deleted.
754 This is used for labels which are the target of non-local gotos. Such a
755 label that would have been deleted is replaced with a @code{note} of type
756 @code{NOTE_INSN_DELETED_LABEL}.
758 In an @code{insn} during dead-code elimination, 1 means that the insn is
761 In an @code{insn} during reorg for an insn in the delay slot of a branch,
762 1 means that this insn is from the target of the branch.
764 In an @code{insn} during instruction scheduling, 1 means that this insn
765 must be scheduled as part of a group together with the previous insn.
767 In an RTL dump, this flag is represented as @samp{/s}.
770 @cindex @samp{/i} in RTL dump
772 In an @code{insn}, @code{insn_list}, or @code{const}, 1 means the RTL was
773 produced by procedure integration.
775 In @code{reg} expressions, 1 means the register contains
776 the value to be returned by the current function. On
777 machines that pass parameters in registers, the same register number
778 may be used for parameters as well, but this flag is not set on such
781 In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
783 In an RTL dump, this flag is represented as @samp{/i}.
786 @cindex @samp{/j} in RTL dump
788 In a @code{mem} expression, 1 means we should keep the alias set for this
789 mem unchanged when we access a component.
791 In a @code{set}, 1 means it is for a return.
793 In a @code{call_insn}, 1 means it is a sibling call.
795 In an RTL dump, this flag is represented as @samp{/j}.
798 @cindex @samp{/u} in RTL dump
800 In @code{reg} and @code{mem} expressions, 1 means
801 that the value of the expression never changes.
803 In @code{subreg} expressions, it is 1 if the @code{subreg} references an
804 unsigned object whose mode has been promoted to a wider mode.
806 In an @code{insn} in the delay slot of a branch instruction, 1 means
807 an annulling branch should be used.
809 In a @code{symbol_ref} expression, 1 means that this symbol addresses
810 something in the per-function constant pool.
812 In a @code{call_insn}, @code{note}, or an @code{expr_list} of notes,
813 1 means that this instruction is a call to a const or pure function.
815 In an RTL dump, this flag is represented as @samp{/u}.
819 This flag is used directly (without an access macro) at the end of RTL
820 generation for a function, to count the number of times an expression
821 appears in insns. Expressions that appear more than once are copied,
822 according to the rules for shared structure (@pxref{Sharing}).
824 For a @code{reg}, it is used directly (without an access macro) by the
825 leaf register renumbering code to ensure that each register is only
828 In a @code{symbol_ref}, it indicates that an external declaration for
829 the symbol has already been written.
832 @cindex @samp{/v} in RTL dump
834 @cindex volatile memory references
835 In a @code{mem} or @code{asm_operands} expression, it is 1 if the memory
836 reference is volatile. Volatile memory references may not be deleted,
837 reordered or combined.
839 In a @code{symbol_ref} expression, it is used for machine-specific
842 In a @code{reg} expression, it is 1 if the value is a user-level variable.
843 0 indicates an internal compiler temporary.
845 In an @code{insn}, 1 means the insn has been deleted.
847 In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
848 to a non-local label.
850 In an RTL dump, this flag is represented as @samp{/v}.
854 @section Machine Modes
855 @cindex machine modes
857 @findex enum machine_mode
858 A machine mode describes a size of data object and the representation used
859 for it. In the C code, machine modes are represented by an enumeration
860 type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
861 expression has room for a machine mode and so do certain kinds of tree
862 expressions (declarations and types, to be precise).
864 In debugging dumps and machine descriptions, the machine mode of an RTL
865 expression is written after the expression code with a colon to separate
866 them. The letters @samp{mode} which appear at the end of each machine mode
867 name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
868 expression with machine mode @code{SImode}. If the mode is
869 @code{VOIDmode}, it is not written at all.
871 Here is a table of machine modes. The term ``byte'' below refers to an
872 object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
877 ``Bit'' mode represents a single bit, for predicate registers.
881 ``Quarter-Integer'' mode represents a single byte treated as an integer.
885 ``Half-Integer'' mode represents a two-byte integer.
889 ``Partial Single Integer'' mode represents an integer which occupies
890 four bytes but which doesn't really use all four. On some machines,
891 this is the right mode to use for pointers.
895 ``Single Integer'' mode represents a four-byte integer.
899 ``Partial Double Integer'' mode represents an integer which occupies
900 eight bytes but which doesn't really use all eight. On some machines,
901 this is the right mode to use for certain pointers.
905 ``Double Integer'' mode represents an eight-byte integer.
909 ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
913 ``Octa Integer'' (?) mode represents a thirty-two-byte integer.
917 ``Quarter-Floating'' mode represents a quarter-precision (single byte)
918 floating point number.
922 ``Half-Floating'' mode represents a half-precision (two byte) floating
927 ``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision
928 (three byte) floating point number.
932 ``Single Floating'' mode represents a four byte floating point number.
933 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
934 this is a single-precision IEEE floating point number; it can also be
935 used for double-precision (on processors with 16-bit bytes) and
936 single-precision VAX and IBM types.
940 ``Double Floating'' mode represents an eight byte floating point number.
941 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
942 this is a double-precision IEEE floating point number.
946 ``Extended Floating'' mode represents a twelve byte floating point
947 number. This mode is used for IEEE extended floating point. On some
948 systems not all bits within these bytes will actually be used.
952 ``Tetra Floating'' mode represents a sixteen byte floating point number.
953 This gets used for both the 96-bit extended IEEE floating-point types
954 padded to 128 bits, and true 128-bit extended IEEE floating-point types.
958 ``Condition Code'' mode represents the value of a condition code, which
959 is a machine-specific set of bits used to represent the result of a
960 comparison operation. Other machine-specific modes may also be used for
961 the condition code. These modes are not used on machines that use
962 @code{cc0} (see @pxref{Condition Code}).
966 ``Block'' mode represents values that are aggregates to which none of
967 the other modes apply. In RTL, only memory references can have this mode,
968 and only if they appear in string-move or vector instructions. On machines
969 which have no such instructions, @code{BLKmode} will not appear in RTL@.
973 Void mode means the absence of a mode or an unspecified mode.
974 For example, RTL expressions of code @code{const_int} have mode
975 @code{VOIDmode} because they can be taken to have whatever mode the context
976 requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
977 the absence of any mode.
985 @item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode
986 These modes stand for a complex number represented as a pair of floating
987 point values. The floating point values are in @code{QFmode},
988 @code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
989 @code{TFmode}, respectively.
997 @item CQImode, CHImode, CSImode, CDImode, CTImode, COImode
998 These modes stand for a complex number represented as a pair of integer
999 values. The integer values are in @code{QImode}, @code{HImode},
1000 @code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
1004 The machine description defines @code{Pmode} as a C macro which expands
1005 into the machine mode used for addresses. Normally this is the mode
1006 whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
1008 The only modes which a machine description @i{must} support are
1009 @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
1010 @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
1011 The compiler will attempt to use @code{DImode} for 8-byte structures and
1012 unions, but this can be prevented by overriding the definition of
1013 @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
1014 use @code{TImode} for 16-byte structures and unions. Likewise, you can
1015 arrange for the C type @code{short int} to avoid using @code{HImode}.
1017 @cindex mode classes
1018 Very few explicit references to machine modes remain in the compiler and
1019 these few references will soon be removed. Instead, the machine modes
1020 are divided into mode classes. These are represented by the enumeration
1021 type @code{enum mode_class} defined in @file{machmode.h}. The possible
1027 Integer modes. By default these are @code{BImode}, @code{QImode},
1028 @code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
1031 @findex MODE_PARTIAL_INT
1032 @item MODE_PARTIAL_INT
1033 The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
1034 @code{PSImode} and @code{PDImode}.
1038 Floating point modes. By default these are @code{QFmode},
1039 @code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
1040 @code{XFmode} and @code{TFmode}.
1042 @findex MODE_COMPLEX_INT
1043 @item MODE_COMPLEX_INT
1044 Complex integer modes. (These are not currently implemented).
1046 @findex MODE_COMPLEX_FLOAT
1047 @item MODE_COMPLEX_FLOAT
1048 Complex floating point modes. By default these are @code{QCmode},
1049 @code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
1052 @findex MODE_FUNCTION
1054 Algol or Pascal function variables including a static chain.
1055 (These are not currently implemented).
1059 Modes representing condition code values. These are @code{CCmode} plus
1060 any modes listed in the @code{EXTRA_CC_MODES} macro. @xref{Jump Patterns},
1061 also see @ref{Condition Code}.
1065 This is a catchall mode class for modes which don't fit into the above
1066 classes. Currently @code{VOIDmode} and @code{BLKmode} are in
1070 Here are some C macros that relate to machine modes:
1074 @item GET_MODE (@var{x})
1075 Returns the machine mode of the RTX @var{x}.
1078 @item PUT_MODE (@var{x}, @var{newmode})
1079 Alters the machine mode of the RTX @var{x} to be @var{newmode}.
1081 @findex NUM_MACHINE_MODES
1082 @item NUM_MACHINE_MODES
1083 Stands for the number of machine modes available on the target
1084 machine. This is one greater than the largest numeric value of any
1087 @findex GET_MODE_NAME
1088 @item GET_MODE_NAME (@var{m})
1089 Returns the name of mode @var{m} as a string.
1091 @findex GET_MODE_CLASS
1092 @item GET_MODE_CLASS (@var{m})
1093 Returns the mode class of mode @var{m}.
1095 @findex GET_MODE_WIDER_MODE
1096 @item GET_MODE_WIDER_MODE (@var{m})
1097 Returns the next wider natural mode. For example, the expression
1098 @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
1100 @findex GET_MODE_SIZE
1101 @item GET_MODE_SIZE (@var{m})
1102 Returns the size in bytes of a datum of mode @var{m}.
1104 @findex GET_MODE_BITSIZE
1105 @item GET_MODE_BITSIZE (@var{m})
1106 Returns the size in bits of a datum of mode @var{m}.
1108 @findex GET_MODE_MASK
1109 @item GET_MODE_MASK (@var{m})
1110 Returns a bitmask containing 1 for all bits in a word that fit within
1111 mode @var{m}. This macro can only be used for modes whose bitsize is
1112 less than or equal to @code{HOST_BITS_PER_INT}.
1114 @findex GET_MODE_ALIGNMENT
1115 @item GET_MODE_ALIGNMENT (@var{m})
1116 Return the required alignment, in bits, for an object of mode @var{m}.
1118 @findex GET_MODE_UNIT_SIZE
1119 @item GET_MODE_UNIT_SIZE (@var{m})
1120 Returns the size in bytes of the subunits of a datum of mode @var{m}.
1121 This is the same as @code{GET_MODE_SIZE} except in the case of complex
1122 modes. For them, the unit size is the size of the real or imaginary
1125 @findex GET_MODE_NUNITS
1126 @item GET_MODE_NUNITS (@var{m})
1127 Returns the number of units contained in a mode, i.e.,
1128 @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
1130 @findex GET_CLASS_NARROWEST_MODE
1131 @item GET_CLASS_NARROWEST_MODE (@var{c})
1132 Returns the narrowest mode in mode class @var{c}.
1137 The global variables @code{byte_mode} and @code{word_mode} contain modes
1138 whose classes are @code{MODE_INT} and whose bitsizes are either
1139 @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
1140 machines, these are @code{QImode} and @code{SImode}, respectively.
1143 @section Constant Expression Types
1144 @cindex RTL constants
1145 @cindex RTL constant expression types
1147 The simplest RTL expressions are those that represent constant values.
1151 @item (const_int @var{i})
1152 This type of expression represents the integer value @var{i}. @var{i}
1153 is customarily accessed with the macro @code{INTVAL} as in
1154 @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1160 There is only one expression object for the integer value zero; it is
1161 the value of the variable @code{const0_rtx}. Likewise, the only
1162 expression for integer value one is found in @code{const1_rtx}, the only
1163 expression for integer value two is found in @code{const2_rtx}, and the
1164 only expression for integer value negative one is found in
1165 @code{constm1_rtx}. Any attempt to create an expression of code
1166 @code{const_int} and value zero, one, two or negative one will return
1167 @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
1168 @code{constm1_rtx} as appropriate.
1170 @findex const_true_rtx
1171 Similarly, there is only one object for the integer whose value is
1172 @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
1173 @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
1174 @code{const1_rtx} will point to the same object. If
1175 @code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
1176 @code{constm1_rtx} will point to the same object.
1178 @findex const_double
1179 @item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{})
1180 Represents either a floating-point constant of mode @var{m} or an
1181 integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
1182 bits but small enough to fit within twice that number of bits (GCC
1183 does not provide a mechanism to represent even larger constants). In
1184 the latter case, @var{m} will be @code{VOIDmode}.
1186 @findex const_vector
1187 @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
1188 Represents a vector constant. The square brackets stand for the vector
1189 containing the constant elements. @var{x0}, @var{x1} and so on are
1190 the @code{const_int} or @code{const_double} elements.
1192 The number of units in a @code{const_vector} is obtained with the macro
1193 @code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
1195 Individual elements in a vector constant are accessed with the macro
1196 @code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
1197 where @var{v} is the vector constant and @var{n} is the element
1200 @findex CONST_DOUBLE_MEM
1201 @findex CONST_DOUBLE_CHAIN
1202 @var{addr} is used to contain the @code{mem} expression that corresponds
1203 to the location in memory that at which the constant can be found. If
1204 it has not been allocated a memory location, but is on the chain of all
1205 @code{const_double} expressions in this compilation (maintained using an
1206 undisplayed field), @var{addr} contains @code{const0_rtx}. If it is not
1207 on the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is
1208 customarily accessed with the macro @code{CONST_DOUBLE_MEM} and the
1209 chain field via @code{CONST_DOUBLE_CHAIN}.
1211 @findex CONST_DOUBLE_LOW
1212 If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1213 @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
1214 @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
1216 If the constant is floating point (regardless of its precision), then
1217 the number of integers used to store the value depends on the size of
1218 @code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers
1219 represent a floating point number, but not precisely in the target
1220 machine's or host machine's floating point format. To convert them to
1221 the precise bit pattern used by the target machine, use the macro
1222 @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
1227 The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
1228 value 0 in mode @var{mode}. If mode @var{mode} is of mode class
1229 @code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of
1230 mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
1231 expression in mode @var{mode}. Otherwise, it returns a
1232 @code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro
1233 @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
1234 mode @var{mode} and similarly for @code{CONST2_RTX}. The
1235 @code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
1238 @findex const_string
1239 @item (const_string @var{str})
1240 Represents a constant string with value @var{str}. Currently this is
1241 used only for insn attributes (@pxref{Insn Attributes}) since constant
1242 strings in C are placed in memory.
1245 @item (symbol_ref:@var{mode} @var{symbol})
1246 Represents the value of an assembler label for data. @var{symbol} is
1247 a string that describes the name of the assembler label. If it starts
1248 with a @samp{*}, the label is the rest of @var{symbol} not including
1249 the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
1252 The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
1253 Usually that is the only mode for which a symbol is directly valid.
1256 @item (label_ref @var{label})
1257 Represents the value of an assembler label for code. It contains one
1258 operand, an expression, which must be a @code{code_label} or a @code{note}
1259 of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
1260 sequence to identify the place where the label should go.
1262 The reason for using a distinct expression type for code label
1263 references is so that jump optimization can distinguish them.
1265 @item (const:@var{m} @var{exp})
1266 Represents a constant that is the result of an assembly-time
1267 arithmetic computation. The operand, @var{exp}, is an expression that
1268 contains only constants (@code{const_int}, @code{symbol_ref} and
1269 @code{label_ref} expressions) combined with @code{plus} and
1270 @code{minus}. However, not all combinations are valid, since the
1271 assembler cannot do arbitrary arithmetic on relocatable symbols.
1273 @var{m} should be @code{Pmode}.
1276 @item (high:@var{m} @var{exp})
1277 Represents the high-order bits of @var{exp}, usually a
1278 @code{symbol_ref}. The number of bits is machine-dependent and is
1279 normally the number of bits specified in an instruction that initializes
1280 the high order bits of a register. It is used with @code{lo_sum} to
1281 represent the typical two-instruction sequence used in RISC machines to
1282 reference a global memory location.
1284 @var{m} should be @code{Pmode}.
1287 @node Regs and Memory
1288 @section Registers and Memory
1289 @cindex RTL register expressions
1290 @cindex RTL memory expressions
1292 Here are the RTL expression types for describing access to machine
1293 registers and to main memory.
1297 @cindex hard registers
1298 @cindex pseudo registers
1299 @item (reg:@var{m} @var{n})
1300 For small values of the integer @var{n} (those that are less than
1301 @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
1302 register number @var{n}: a @dfn{hard register}. For larger values of
1303 @var{n}, it stands for a temporary value or @dfn{pseudo register}.
1304 The compiler's strategy is to generate code assuming an unlimited
1305 number of such pseudo registers, and later convert them into hard
1306 registers or into memory references.
1308 @var{m} is the machine mode of the reference. It is necessary because
1309 machines can generally refer to each register in more than one mode.
1310 For example, a register may contain a full word but there may be
1311 instructions to refer to it as a half word or as a single byte, as
1312 well as instructions to refer to it as a floating point number of
1315 Even for a register that the machine can access in only one mode,
1316 the mode must always be specified.
1318 The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
1319 description, since the number of hard registers on the machine is an
1320 invariant characteristic of the machine. Note, however, that not
1321 all of the machine registers must be general registers. All the
1322 machine registers that can be used for storage of data are given
1323 hard register numbers, even those that can be used only in certain
1324 instructions or can hold only certain types of data.
1326 A hard register may be accessed in various modes throughout one
1327 function, but each pseudo register is given a natural mode
1328 and is accessed only in that mode. When it is necessary to describe
1329 an access to a pseudo register using a nonnatural mode, a @code{subreg}
1332 A @code{reg} expression with a machine mode that specifies more than
1333 one word of data may actually stand for several consecutive registers.
1334 If in addition the register number specifies a hardware register, then
1335 it actually represents several consecutive hardware registers starting
1336 with the specified one.
1338 Each pseudo register number used in a function's RTL code is
1339 represented by a unique @code{reg} expression.
1341 @findex FIRST_VIRTUAL_REGISTER
1342 @findex LAST_VIRTUAL_REGISTER
1343 Some pseudo register numbers, those within the range of
1344 @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
1345 appear during the RTL generation phase and are eliminated before the
1346 optimization phases. These represent locations in the stack frame that
1347 cannot be determined until RTL generation for the function has been
1348 completed. The following virtual register numbers are defined:
1351 @findex VIRTUAL_INCOMING_ARGS_REGNUM
1352 @item VIRTUAL_INCOMING_ARGS_REGNUM
1353 This points to the first word of the incoming arguments passed on the
1354 stack. Normally these arguments are placed there by the caller, but the
1355 callee may have pushed some arguments that were previously passed in
1358 @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1359 @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1360 When RTL generation is complete, this virtual register is replaced
1361 by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1362 value of @code{FIRST_PARM_OFFSET}.
1364 @findex VIRTUAL_STACK_VARS_REGNUM
1365 @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1366 @item VIRTUAL_STACK_VARS_REGNUM
1367 If @code{FRAME_GROWS_DOWNWARD} is defined, this points to immediately
1368 above the first variable on the stack. Otherwise, it points to the
1369 first variable on the stack.
1371 @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1372 @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1373 @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
1374 register given by @code{FRAME_POINTER_REGNUM} and the value
1375 @code{STARTING_FRAME_OFFSET}.
1377 @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1378 @item VIRTUAL_STACK_DYNAMIC_REGNUM
1379 This points to the location of dynamically allocated memory on the stack
1380 immediately after the stack pointer has been adjusted by the amount of
1383 @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1384 @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1385 This virtual register is replaced by the sum of the register given by
1386 @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1388 @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1389 @item VIRTUAL_OUTGOING_ARGS_REGNUM
1390 This points to the location in the stack at which outgoing arguments
1391 should be written when the stack is pre-pushed (arguments pushed using
1392 push insns should always use @code{STACK_POINTER_REGNUM}).
1394 @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1395 This virtual register is replaced by the sum of the register given by
1396 @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1400 @item (subreg:@var{m} @var{reg} @var{bytenum})
1401 @code{subreg} expressions are used to refer to a register in a machine
1402 mode other than its natural one, or to refer to one register of
1403 a multi-part @code{reg} that actually refers to several registers.
1405 Each pseudo-register has a natural mode. If it is necessary to
1406 operate on it in a different mode---for example, to perform a fullword
1407 move instruction on a pseudo-register that contains a single
1408 byte---the pseudo-register must be enclosed in a @code{subreg}. In
1409 such a case, @var{bytenum} is zero.
1411 Usually @var{m} is at least as narrow as the mode of @var{reg}, in which
1412 case it is restricting consideration to only the bits of @var{reg} that
1415 Sometimes @var{m} is wider than the mode of @var{reg}. These
1416 @code{subreg} expressions are often called @dfn{paradoxical}. They are
1417 used in cases where we want to refer to an object in a wider mode but do
1418 not care what value the additional bits have. The reload pass ensures
1419 that paradoxical references are only made to hard registers.
1421 The other use of @code{subreg} is to extract the individual registers of
1422 a multi-register value. Machine modes such as @code{DImode} and
1423 @code{TImode} can indicate values longer than a word, values which
1424 usually require two or more consecutive registers. To access one of the
1425 registers, use a @code{subreg} with mode @code{SImode} and a
1426 @var{bytenum} offset that says which register.
1428 Storing in a non-paradoxical @code{subreg} has undefined results for
1429 bits belonging to the same word as the @code{subreg}. This laxity makes
1430 it easier to generate efficient code for such instructions. To
1431 represent an instruction that preserves all the bits outside of those in
1432 the @code{subreg}, use @code{strict_low_part} around the @code{subreg}.
1434 @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1435 The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says
1436 that byte number zero is part of the most significant word; otherwise,
1437 it is part of the least significant word.
1439 @cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
1440 The compilation parameter @code{BYTES_BIG_ENDIAN}, if set to 1, says
1441 that byte number zero is the most significant byte within a word;
1442 otherwise, it is the least significant byte within a word.
1444 @cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
1445 On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
1446 @code{WORDS_BIG_ENDIAN}.
1447 However, most parts of the compiler treat floating point values as if
1448 they had the same endianness as integer values. This works because
1449 they handle them solely as a collection of integer values, with no
1450 particular numerical value. Only real.c and the runtime libraries
1451 care about @code{FLOAT_WORDS_BIG_ENDIAN}.
1453 @cindex combiner pass
1455 @cindex @code{subreg}, special reload handling
1456 Between the combiner pass and the reload pass, it is possible to have a
1457 paradoxical @code{subreg} which contains a @code{mem} instead of a
1458 @code{reg} as its first operand. After the reload pass, it is also
1459 possible to have a non-paradoxical @code{subreg} which contains a
1460 @code{mem}; this usually occurs when the @code{mem} is a stack slot
1461 which replaced a pseudo register.
1463 Note that it is not valid to access a @code{DFmode} value in @code{SFmode}
1464 using a @code{subreg}. On some machines the most significant part of a
1465 @code{DFmode} value does not have the same format as a single-precision
1468 It is also not valid to access a single word of a multi-word value in a
1469 hard register when less registers can hold the value than would be
1470 expected from its size. For example, some 32-bit machines have
1471 floating-point registers that can hold an entire @code{DFmode} value.
1472 If register 10 were such a register @code{(subreg:SI (reg:DF 10) 1)}
1473 would be invalid because there is no way to convert that reference to
1474 a single machine register. The reload pass prevents @code{subreg}
1475 expressions such as these from being formed.
1479 The first operand of a @code{subreg} expression is customarily accessed
1480 with the @code{SUBREG_REG} macro and the second operand is customarily
1481 accessed with the @code{SUBREG_BYTE} macro.
1484 @cindex scratch operands
1485 @item (scratch:@var{m})
1486 This represents a scratch register that will be required for the
1487 execution of a single instruction and not used subsequently. It is
1488 converted into a @code{reg} by either the local register allocator or
1491 @code{scratch} is usually present inside a @code{clobber} operation
1492 (@pxref{Side Effects}).
1495 @cindex condition code register
1497 This refers to the machine's condition code register. It has no
1498 operands and may not have a machine mode. There are two ways to use it:
1502 To stand for a complete set of condition code flags. This is best on
1503 most machines, where each comparison sets the entire series of flags.
1505 With this technique, @code{(cc0)} may be validly used in only two
1506 contexts: as the destination of an assignment (in test and compare
1507 instructions) and in comparison operators comparing against zero
1508 (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
1511 To stand for a single flag that is the result of a single condition.
1512 This is useful on machines that have only a single flag bit, and in
1513 which comparison instructions must specify the condition to test.
1515 With this technique, @code{(cc0)} may be validly used in only two
1516 contexts: as the destination of an assignment (in test and compare
1517 instructions) where the source is a comparison operator, and as the
1518 first operand of @code{if_then_else} (in a conditional branch).
1522 There is only one expression object of code @code{cc0}; it is the
1523 value of the variable @code{cc0_rtx}. Any attempt to create an
1524 expression of code @code{cc0} will return @code{cc0_rtx}.
1526 Instructions can set the condition code implicitly. On many machines,
1527 nearly all instructions set the condition code based on the value that
1528 they compute or store. It is not necessary to record these actions
1529 explicitly in the RTL because the machine description includes a
1530 prescription for recognizing the instructions that do so (by means of
1531 the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
1532 instructions whose sole purpose is to set the condition code, and
1533 instructions that use the condition code, need mention @code{(cc0)}.
1535 On some machines, the condition code register is given a register number
1536 and a @code{reg} is used instead of @code{(cc0)}. This is usually the
1537 preferable approach if only a small subset of instructions modify the
1538 condition code. Other machines store condition codes in general
1539 registers; in such cases a pseudo register should be used.
1541 Some machines, such as the Sparc and RS/6000, have two sets of
1542 arithmetic instructions, one that sets and one that does not set the
1543 condition code. This is best handled by normally generating the
1544 instruction that does not set the condition code, and making a pattern
1545 that both performs the arithmetic and sets the condition code register
1546 (which would not be @code{(cc0)} in this case). For examples, search
1547 for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
1551 @cindex program counter
1552 This represents the machine's program counter. It has no operands and
1553 may not have a machine mode. @code{(pc)} may be validly used only in
1554 certain specific contexts in jump instructions.
1557 There is only one expression object of code @code{pc}; it is the value
1558 of the variable @code{pc_rtx}. Any attempt to create an expression of
1559 code @code{pc} will return @code{pc_rtx}.
1561 All instructions that do not jump alter the program counter implicitly
1562 by incrementing it, but there is no need to mention this in the RTL@.
1565 @item (mem:@var{m} @var{addr} @var{alias})
1566 This RTX represents a reference to main memory at an address
1567 represented by the expression @var{addr}. @var{m} specifies how large
1568 a unit of memory is accessed. @var{alias} specifies an alias set for the
1569 reference. In general two items are in different alias sets if they cannot
1570 reference the same memory address.
1572 The construct @code{(mem:BLK (scratch))} is considered to alias all
1573 other memories. Thus it may be used as a memory barrier in epilogue
1574 stack deallocation patterns.
1577 @item (addressof:@var{m} @var{reg})
1578 This RTX represents a request for the address of register @var{reg}. Its mode
1579 is always @code{Pmode}. If there are any @code{addressof}
1580 expressions left in the function after CSE, @var{reg} is forced into the
1581 stack and the @code{addressof} expression is replaced with a @code{plus}
1582 expression for the address of its stack slot.
1586 @section RTL Expressions for Arithmetic
1587 @cindex arithmetic, in RTL
1588 @cindex math, in RTL
1589 @cindex RTL expressions for arithmetic
1591 Unless otherwise specified, all the operands of arithmetic expressions
1592 must be valid for mode @var{m}. An operand is valid for mode @var{m}
1593 if it has mode @var{m}, or if it is a @code{const_int} or
1594 @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
1596 For commutative binary operations, constants should be placed in the
1601 @cindex RTL addition
1603 @item (plus:@var{m} @var{x} @var{y})
1604 Represents the sum of the values represented by @var{x} and @var{y}
1605 carried out in machine mode @var{m}.
1608 @item (lo_sum:@var{m} @var{x} @var{y})
1609 Like @code{plus}, except that it represents that sum of @var{x} and the
1610 low-order bits of @var{y}. The number of low order bits is
1611 machine-dependent but is normally the number of bits in a @code{Pmode}
1612 item minus the number of bits set by the @code{high} code
1613 (@pxref{Constants}).
1615 @var{m} should be @code{Pmode}.
1618 @cindex RTL subtraction
1619 @cindex RTL difference
1620 @item (minus:@var{m} @var{x} @var{y})
1621 Like @code{plus} but represents subtraction.
1624 @cindex RTL addition with signed saturation
1625 @item (ss_plus:@var{m} @var{x} @var{y})
1627 Like @code{plus}, but using signed saturation in case of an overflow.
1630 @cindex RTL addition with unsigned saturation
1631 @item (us_plus:@var{m} @var{x} @var{y})
1633 Like @code{plus}, but using unsigned saturation in case of an overflow.
1636 @cindex RTL addition with signed saturation
1637 @item (ss_minus:@var{m} @var{x} @var{y})
1639 Like @code{minus}, but using signed saturation in case of an overflow.
1642 @cindex RTL addition with unsigned saturation
1643 @item (us_minus:@var{m} @var{x} @var{y})
1645 Like @code{minus}, but using unsigned saturation in case of an overflow.
1648 @cindex RTL comparison
1649 @item (compare:@var{m} @var{x} @var{y})
1650 Represents the result of subtracting @var{y} from @var{x} for purposes
1651 of comparison. The result is computed without overflow, as if with
1654 Of course, machines can't really subtract with infinite precision.
1655 However, they can pretend to do so when only the sign of the result will
1656 be used, which is the case when the result is stored in the condition
1657 code. And that is the @emph{only} way this kind of expression may
1658 validly be used: as a value to be stored in the condition codes, either
1659 @code{(cc0)} or a register. @xref{Comparisons}.
1661 The mode @var{m} is not related to the modes of @var{x} and @var{y}, but
1662 instead is the mode of the condition code value. If @code{(cc0)} is
1663 used, it is @code{VOIDmode}. Otherwise it is some mode in class
1664 @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m}
1665 is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
1666 information (in an unspecified format) so that any comparison operator
1667 can be applied to the result of the @code{COMPARE} operation. For other
1668 modes in class @code{MODE_CC}, the operation only returns a subset of
1671 Normally, @var{x} and @var{y} must have the same mode. Otherwise,
1672 @code{compare} is valid only if the mode of @var{x} is in class
1673 @code{MODE_INT} and @var{y} is a @code{const_int} or
1674 @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
1675 determines what mode the comparison is to be done in; thus it must not
1678 If one of the operands is a constant, it should be placed in the
1679 second operand and the comparison code adjusted as appropriate.
1681 A @code{compare} specifying two @code{VOIDmode} constants is not valid
1682 since there is no way to know in what mode the comparison is to be
1683 performed; the comparison must either be folded during the compilation
1684 or the first operand must be loaded into a register while its mode is
1688 @item (neg:@var{m} @var{x})
1689 Represents the negation (subtraction from zero) of the value represented
1690 by @var{x}, carried out in mode @var{m}.
1693 @cindex multiplication
1695 @item (mult:@var{m} @var{x} @var{y})
1696 Represents the signed product of the values represented by @var{x} and
1697 @var{y} carried out in machine mode @var{m}.
1699 Some machines support a multiplication that generates a product wider
1700 than the operands. Write the pattern for this as
1703 (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
1706 where @var{m} is wider than the modes of @var{x} and @var{y}, which need
1709 For unsigned widening multiplication, use the same idiom, but with
1710 @code{zero_extend} instead of @code{sign_extend}.
1714 @cindex signed division
1716 @item (div:@var{m} @var{x} @var{y})
1717 Represents the quotient in signed division of @var{x} by @var{y},
1718 carried out in machine mode @var{m}. If @var{m} is a floating point
1719 mode, it represents the exact quotient; otherwise, the integerized
1722 Some machines have division instructions in which the operands and
1723 quotient widths are not all the same; you should represent
1724 such instructions using @code{truncate} and @code{sign_extend} as in,
1727 (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
1731 @cindex unsigned division
1733 @item (udiv:@var{m} @var{x} @var{y})
1734 Like @code{div} but represents unsigned division.
1740 @item (mod:@var{m} @var{x} @var{y})
1741 @itemx (umod:@var{m} @var{x} @var{y})
1742 Like @code{div} and @code{udiv} but represent the remainder instead of
1747 @cindex signed minimum
1748 @cindex signed maximum
1749 @item (smin:@var{m} @var{x} @var{y})
1750 @itemx (smax:@var{m} @var{x} @var{y})
1751 Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
1752 @var{x} and @var{y}, interpreted as signed integers in mode @var{m}.
1756 @cindex unsigned minimum and maximum
1757 @item (umin:@var{m} @var{x} @var{y})
1758 @itemx (umax:@var{m} @var{x} @var{y})
1759 Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
1763 @cindex complement, bitwise
1764 @cindex bitwise complement
1765 @item (not:@var{m} @var{x})
1766 Represents the bitwise complement of the value represented by @var{x},
1767 carried out in mode @var{m}, which must be a fixed-point machine mode.
1770 @cindex logical-and, bitwise
1771 @cindex bitwise logical-and
1772 @item (and:@var{m} @var{x} @var{y})
1773 Represents the bitwise logical-and of the values represented by
1774 @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
1775 a fixed-point machine mode.
1778 @cindex inclusive-or, bitwise
1779 @cindex bitwise inclusive-or
1780 @item (ior:@var{m} @var{x} @var{y})
1781 Represents the bitwise inclusive-or of the values represented by @var{x}
1782 and @var{y}, carried out in machine mode @var{m}, which must be a
1786 @cindex exclusive-or, bitwise
1787 @cindex bitwise exclusive-or
1788 @item (xor:@var{m} @var{x} @var{y})
1789 Represents the bitwise exclusive-or of the values represented by @var{x}
1790 and @var{y}, carried out in machine mode @var{m}, which must be a
1796 @cindex arithmetic shift
1797 @item (ashift:@var{m} @var{x} @var{c})
1798 Represents the result of arithmetically shifting @var{x} left by @var{c}
1799 places. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
1800 be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
1801 mode is determined by the mode called for in the machine description
1802 entry for the left-shift instruction. For example, on the VAX, the mode
1803 of @var{c} is @code{QImode} regardless of @var{m}.
1808 @item (lshiftrt:@var{m} @var{x} @var{c})
1809 @itemx (ashiftrt:@var{m} @var{x} @var{c})
1810 Like @code{ashift} but for right shift. Unlike the case for left shift,
1811 these two operations are distinct.
1817 @cindex right rotate
1818 @item (rotate:@var{m} @var{x} @var{c})
1819 @itemx (rotatert:@var{m} @var{x} @var{c})
1820 Similar but represent left and right rotate. If @var{c} is a constant,
1824 @cindex absolute value
1825 @item (abs:@var{m} @var{x})
1826 Represents the absolute value of @var{x}, computed in mode @var{m}.
1830 @item (sqrt:@var{m} @var{x})
1831 Represents the square root of @var{x}, computed in mode @var{m}.
1832 Most often @var{m} will be a floating point mode.
1835 @item (ffs:@var{m} @var{x})
1836 Represents one plus the index of the least significant 1-bit in
1837 @var{x}, represented as an integer of mode @var{m}. (The value is
1838 zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
1839 depending on the target machine, various mode combinations may be
1844 @section Comparison Operations
1845 @cindex RTL comparison operations
1847 Comparison operators test a relation on two operands and are considered
1848 to represent a machine-dependent nonzero value described by, but not
1849 necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
1850 if the relation holds, or zero if it does not. The mode of the
1851 comparison operation is independent of the mode of the data being
1852 compared. If the comparison operation is being tested (e.g., the first
1853 operand of an @code{if_then_else}), the mode must be @code{VOIDmode}.
1854 If the comparison operation is producing data to be stored in some
1855 variable, the mode must be in class @code{MODE_INT}. All comparison
1856 operations producing data must use the same mode, which is
1859 @cindex condition codes
1860 There are two ways that comparison operations may be used. The
1861 comparison operators may be used to compare the condition codes
1862 @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
1863 a construct actually refers to the result of the preceding instruction
1864 in which the condition codes were set. The instruction setting the
1865 condition code must be adjacent to the instruction using the condition
1866 code; only @code{note} insns may separate them.
1868 Alternatively, a comparison operation may directly compare two data
1869 objects. The mode of the comparison is determined by the operands; they
1870 must both be valid for a common machine mode. A comparison with both
1871 operands constant would be invalid as the machine mode could not be
1872 deduced from it, but such a comparison should never exist in RTL due to
1875 In the example above, if @code{(cc0)} were last set to
1876 @code{(compare @var{x} @var{y})}, the comparison operation is
1877 identical to @code{(eq @var{x} @var{y})}. Usually only one style
1878 of comparisons is supported on a particular machine, but the combine
1879 pass will try to merge the operations to produce the @code{eq} shown
1880 in case it exists in the context of the particular insn involved.
1882 Inequality comparisons come in two flavors, signed and unsigned. Thus,
1883 there are distinct expression codes @code{gt} and @code{gtu} for signed and
1884 unsigned greater-than. These can produce different results for the same
1885 pair of integer values: for example, 1 is signed greater-than @minus{}1 but not
1886 unsigned greater-than, because @minus{}1 when regarded as unsigned is actually
1887 @code{0xffffffff} which is greater than 1.
1889 The signed comparisons are also used for floating point values. Floating
1890 point comparisons are distinguished by the machine modes of the operands.
1895 @item (eq:@var{m} @var{x} @var{y})
1896 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
1897 are equal, otherwise 0.
1901 @item (ne:@var{m} @var{x} @var{y})
1902 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
1903 are not equal, otherwise 0.
1906 @cindex greater than
1907 @item (gt:@var{m} @var{x} @var{y})
1908 @code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they
1909 are fixed-point, the comparison is done in a signed sense.
1912 @cindex greater than
1913 @cindex unsigned greater than
1914 @item (gtu:@var{m} @var{x} @var{y})
1915 Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
1920 @cindex unsigned less than
1921 @item (lt:@var{m} @var{x} @var{y})
1922 @itemx (ltu:@var{m} @var{x} @var{y})
1923 Like @code{gt} and @code{gtu} but test for ``less than''.
1926 @cindex greater than
1928 @cindex unsigned greater than
1929 @item (ge:@var{m} @var{x} @var{y})
1930 @itemx (geu:@var{m} @var{x} @var{y})
1931 Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
1934 @cindex less than or equal
1936 @cindex unsigned less than
1937 @item (le:@var{m} @var{x} @var{y})
1938 @itemx (leu:@var{m} @var{x} @var{y})
1939 Like @code{gt} and @code{gtu} but test for ``less than or equal''.
1941 @findex if_then_else
1942 @item (if_then_else @var{cond} @var{then} @var{else})
1943 This is not a comparison operation but is listed here because it is
1944 always used in conjunction with a comparison operation. To be
1945 precise, @var{cond} is a comparison expression. This expression
1946 represents a choice, according to @var{cond}, between the value
1947 represented by @var{then} and the one represented by @var{else}.
1949 On most machines, @code{if_then_else} expressions are valid only
1950 to express conditional jumps.
1953 @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
1954 Similar to @code{if_then_else}, but more general. Each of @var{test1},
1955 @var{test2}, @dots{} is performed in turn. The result of this expression is
1956 the @var{value} corresponding to the first nonzero test, or @var{default} if
1957 none of the tests are nonzero expressions.
1959 This is currently not valid for instruction patterns and is supported only
1960 for insn attributes. @xref{Insn Attributes}.
1967 Special expression codes exist to represent bit-field instructions.
1968 These types of expressions are lvalues in RTL; they may appear
1969 on the left side of an assignment, indicating insertion of a value
1970 into the specified bit-field.
1973 @findex sign_extract
1974 @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
1975 @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
1976 This represents a reference to a sign-extended bit-field contained or
1977 starting in @var{loc} (a memory or register reference). The bit-field
1978 is @var{size} bits wide and starts at bit @var{pos}. The compilation
1979 option @code{BITS_BIG_ENDIAN} says which end of the memory unit
1980 @var{pos} counts from.
1982 If @var{loc} is in memory, its mode must be a single-byte integer mode.
1983 If @var{loc} is in a register, the mode to use is specified by the
1984 operand of the @code{insv} or @code{extv} pattern
1985 (@pxref{Standard Names}) and is usually a full-word integer mode,
1986 which is the default if none is specified.
1988 The mode of @var{pos} is machine-specific and is also specified
1989 in the @code{insv} or @code{extv} pattern.
1991 The mode @var{m} is the same as the mode that would be used for
1992 @var{loc} if it were a register.
1994 @findex zero_extract
1995 @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
1996 Like @code{sign_extract} but refers to an unsigned or zero-extended
1997 bit-field. The same sequence of bits are extracted, but they
1998 are filled to an entire word with zeros instead of by sign-extension.
2001 @node Vector Operations
2002 @section Vector Operations
2003 @cindex vector operations
2005 All normal RTL expressions can be used with vector modes; they are
2006 interpreted as operating on each part of the vector independently.
2007 Additionally, there are a few new expressions to describe specific vector
2012 @item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
2013 This describes a merge operation between two vectors. The result is a vector
2014 of mode @var{m}; its elements are selected from either @var{vec1} or
2015 @var{vec2}. Which elements are selected is described by @var{items}, which
2016 is a bit mask represented by a @code{const_int}; a zero bit indicates the
2017 corresponding element in the result vector is taken from @var{vec2} while
2018 a set bit indicates it is taken from @var{vec1}.
2021 @item (vec_select:@var{m} @var{vec1} @var{selection})
2022 This describes an operation that selects parts of a vector. @var{vec1} is
2023 the source vector, @var{selection} is a @code{parallel} that contains a
2024 @code{const_int} for each of the subparts of the result vector, giving the
2025 number of the source subpart that should be stored into it.
2028 @item (vec_concat:@var{m} @var{vec1} @var{vec2})
2029 Describes a vector concat operation. The result is a concatenation of the
2030 vectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of
2034 @item (vec_const:@var{m} @var{subparts})
2035 This describes a constant vector. @var{subparts} is a @code{parallel} that
2036 contains a constant for each of the subparts of the vector.
2038 @findex vec_duplicate
2039 @item (vec_duplicate:@var{m} @var{vec})
2040 This operation converts a small vector into a larger one by duplicating the
2041 input values. The output vector mode must have the same submodes as the
2042 input vector mode, and the number of output parts must be an integer multiple
2043 of the number of input parts.
2048 @section Conversions
2050 @cindex machine mode conversions
2052 All conversions between machine modes must be represented by
2053 explicit conversion operations. For example, an expression
2054 which is the sum of a byte and a full word cannot be written as
2055 @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
2056 operation requires two operands of the same machine mode.
2057 Therefore, the byte-sized operand is enclosed in a conversion
2061 (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
2064 The conversion operation is not a mere placeholder, because there
2065 may be more than one way of converting from a given starting mode
2066 to the desired final mode. The conversion operation code says how
2069 For all conversion operations, @var{x} must not be @code{VOIDmode}
2070 because the mode in which to do the conversion would not be known.
2071 The conversion must either be done at compile-time or @var{x}
2072 must be placed into a register.
2076 @item (sign_extend:@var{m} @var{x})
2077 Represents the result of sign-extending the value @var{x}
2078 to machine mode @var{m}. @var{m} must be a fixed-point mode
2079 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2082 @item (zero_extend:@var{m} @var{x})
2083 Represents the result of zero-extending the value @var{x}
2084 to machine mode @var{m}. @var{m} must be a fixed-point mode
2085 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2087 @findex float_extend
2088 @item (float_extend:@var{m} @var{x})
2089 Represents the result of extending the value @var{x}
2090 to machine mode @var{m}. @var{m} must be a floating point mode
2091 and @var{x} a floating point value of a mode narrower than @var{m}.
2094 @item (truncate:@var{m} @var{x})
2095 Represents the result of truncating the value @var{x}
2096 to machine mode @var{m}. @var{m} must be a fixed-point mode
2097 and @var{x} a fixed-point value of a mode wider than @var{m}.
2100 @item (ss_truncate:@var{m} @var{x})
2101 Represents the result of truncating the value @var{x}
2102 to machine mode @var{m}, using signed saturation in the case of
2103 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2107 @item (us_truncate:@var{m} @var{x})
2108 Represents the result of truncating the value @var{x}
2109 to machine mode @var{m}, using unsigned saturation in the case of
2110 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2113 @findex float_truncate
2114 @item (float_truncate:@var{m} @var{x})
2115 Represents the result of truncating the value @var{x}
2116 to machine mode @var{m}. @var{m} must be a floating point mode
2117 and @var{x} a floating point value of a mode wider than @var{m}.
2120 @item (float:@var{m} @var{x})
2121 Represents the result of converting fixed point value @var{x},
2122 regarded as signed, to floating point mode @var{m}.
2124 @findex unsigned_float
2125 @item (unsigned_float:@var{m} @var{x})
2126 Represents the result of converting fixed point value @var{x},
2127 regarded as unsigned, to floating point mode @var{m}.
2130 @item (fix:@var{m} @var{x})
2131 When @var{m} is a fixed point mode, represents the result of
2132 converting floating point value @var{x} to mode @var{m}, regarded as
2133 signed. How rounding is done is not specified, so this operation may
2134 be used validly in compiling C code only for integer-valued operands.
2136 @findex unsigned_fix
2137 @item (unsigned_fix:@var{m} @var{x})
2138 Represents the result of converting floating point value @var{x} to
2139 fixed point mode @var{m}, regarded as unsigned. How rounding is done
2143 @item (fix:@var{m} @var{x})
2144 When @var{m} is a floating point mode, represents the result of
2145 converting floating point value @var{x} (valid for mode @var{m}) to an
2146 integer, still represented in floating point mode @var{m}, by rounding
2150 @node RTL Declarations
2151 @section Declarations
2152 @cindex RTL declarations
2153 @cindex declarations, RTL
2155 Declaration expression codes do not represent arithmetic operations
2156 but rather state assertions about their operands.
2159 @findex strict_low_part
2160 @cindex @code{subreg}, in @code{strict_low_part}
2161 @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
2162 This expression code is used in only one context: as the destination operand of a
2163 @code{set} expression. In addition, the operand of this expression
2164 must be a non-paradoxical @code{subreg} expression.
2166 The presence of @code{strict_low_part} says that the part of the
2167 register which is meaningful in mode @var{n}, but is not part of
2168 mode @var{m}, is not to be altered. Normally, an assignment to such
2169 a subreg is allowed to have undefined effects on the rest of the
2170 register when @var{m} is less than a word.
2174 @section Side Effect Expressions
2175 @cindex RTL side effect expressions
2177 The expression codes described so far represent values, not actions.
2178 But machine instructions never produce values; they are meaningful
2179 only for their side effects on the state of the machine. Special
2180 expression codes are used to represent side effects.
2182 The body of an instruction is always one of these side effect codes;
2183 the codes described above, which represent values, appear only as
2184 the operands of these.
2188 @item (set @var{lval} @var{x})
2189 Represents the action of storing the value of @var{x} into the place
2190 represented by @var{lval}. @var{lval} must be an expression
2191 representing a place that can be stored in: @code{reg} (or @code{subreg}
2192 or @code{strict_low_part}), @code{mem}, @code{pc}, @code{parallel}, or
2195 If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
2196 machine mode; then @var{x} must be valid for that mode.
2198 If @var{lval} is a @code{reg} whose machine mode is less than the full
2199 width of the register, then it means that the part of the register
2200 specified by the machine mode is given the specified value and the
2201 rest of the register receives an undefined value. Likewise, if
2202 @var{lval} is a @code{subreg} whose machine mode is narrower than
2203 the mode of the register, the rest of the register can be changed in
2206 If @var{lval} is a @code{strict_low_part} of a @code{subreg}, then the
2207 part of the register specified by the machine mode of the
2208 @code{subreg} is given the value @var{x} and the rest of the register
2211 If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
2212 be either a @code{compare} expression or a value that may have any mode.
2213 The latter case represents a ``test'' instruction. The expression
2214 @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
2215 @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
2216 Use the former expression to save space during the compilation.
2218 If @var{lval} is a @code{parallel}, it is used to represent the case of
2219 a function returning a structure in multiple registers. Each element
2220 of the @code{parallel} is an @code{expr_list} whose first operand is a
2221 @code{reg} and whose second operand is a @code{const_int} representing the
2222 offset (in bytes) into the structure at which the data in that register
2223 corresponds. The first element may be null to indicate that the structure
2224 is also passed partly in memory.
2226 @cindex jump instructions and @code{set}
2227 @cindex @code{if_then_else} usage
2228 If @var{lval} is @code{(pc)}, we have a jump instruction, and the
2229 possibilities for @var{x} are very limited. It may be a
2230 @code{label_ref} expression (unconditional jump). It may be an
2231 @code{if_then_else} (conditional jump), in which case either the
2232 second or the third operand must be @code{(pc)} (for the case which
2233 does not jump) and the other of the two must be a @code{label_ref}
2234 (for the case which does jump). @var{x} may also be a @code{mem} or
2235 @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
2236 @code{mem}; these unusual patterns are used to represent jumps through
2239 If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
2240 @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
2241 valid for the mode of @var{lval}.
2245 @var{lval} is customarily accessed with the @code{SET_DEST} macro and
2246 @var{x} with the @code{SET_SRC} macro.
2250 As the sole expression in a pattern, represents a return from the
2251 current function, on machines where this can be done with one
2252 instruction, such as VAXen. On machines where a multi-instruction
2253 ``epilogue'' must be executed in order to return from the function,
2254 returning is done by jumping to a label which precedes the epilogue, and
2255 the @code{return} expression code is never used.
2257 Inside an @code{if_then_else} expression, represents the value to be
2258 placed in @code{pc} to return to the caller.
2260 Note that an insn pattern of @code{(return)} is logically equivalent to
2261 @code{(set (pc) (return))}, but the latter form is never used.
2264 @item (call @var{function} @var{nargs})
2265 Represents a function call. @var{function} is a @code{mem} expression
2266 whose address is the address of the function to be called.
2267 @var{nargs} is an expression which can be used for two purposes: on
2268 some machines it represents the number of bytes of stack argument; on
2269 others, it represents the number of argument registers.
2271 Each machine has a standard machine mode which @var{function} must
2272 have. The machine description defines macro @code{FUNCTION_MODE} to
2273 expand into the requisite mode name. The purpose of this mode is to
2274 specify what kind of addressing is allowed, on machines where the
2275 allowed kinds of addressing depend on the machine mode being
2279 @item (clobber @var{x})
2280 Represents the storing or possible storing of an unpredictable,
2281 undescribed value into @var{x}, which must be a @code{reg},
2282 @code{scratch}, @code{parallel} or @code{mem} expression.
2284 One place this is used is in string instructions that store standard
2285 values into particular hard registers. It may not be worth the
2286 trouble to describe the values that are stored, but it is essential to
2287 inform the compiler that the registers will be altered, lest it
2288 attempt to keep data in them across the string instruction.
2290 If @var{x} is @code{(mem:BLK (const_int 0))}, it means that all memory
2291 locations must be presumed clobbered. If @var{x} is a @code{parallel},
2292 it has the same meaning as a @code{parallel} in a @code{set} expression.
2294 Note that the machine description classifies certain hard registers as
2295 ``call-clobbered''. All function call instructions are assumed by
2296 default to clobber these registers, so there is no need to use
2297 @code{clobber} expressions to indicate this fact. Also, each function
2298 call is assumed to have the potential to alter any memory location,
2299 unless the function is declared @code{const}.
2301 If the last group of expressions in a @code{parallel} are each a
2302 @code{clobber} expression whose arguments are @code{reg} or
2303 @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
2304 phase can add the appropriate @code{clobber} expressions to an insn it
2305 has constructed when doing so will cause a pattern to be matched.
2307 This feature can be used, for example, on a machine that whose multiply
2308 and add instructions don't use an MQ register but which has an
2309 add-accumulate instruction that does clobber the MQ register. Similarly,
2310 a combined instruction might require a temporary register while the
2311 constituent instructions might not.
2313 When a @code{clobber} expression for a register appears inside a
2314 @code{parallel} with other side effects, the register allocator
2315 guarantees that the register is unoccupied both before and after that
2316 insn. However, the reload phase may allocate a register used for one of
2317 the inputs unless the @samp{&} constraint is specified for the selected
2318 alternative (@pxref{Modifiers}). You can clobber either a specific hard
2319 register, a pseudo register, or a @code{scratch} expression; in the
2320 latter two cases, GCC will allocate a hard register that is available
2321 there for use as a temporary.
2323 For instructions that require a temporary register, you should use
2324 @code{scratch} instead of a pseudo-register because this will allow the
2325 combiner phase to add the @code{clobber} when required. You do this by
2326 coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
2327 clobber a pseudo register, use one which appears nowhere else---generate
2328 a new one each time. Otherwise, you may confuse CSE@.
2330 There is one other known use for clobbering a pseudo register in a
2331 @code{parallel}: when one of the input operands of the insn is also
2332 clobbered by the insn. In this case, using the same pseudo register in
2333 the clobber and elsewhere in the insn produces the expected results.
2337 Represents the use of the value of @var{x}. It indicates that the
2338 value in @var{x} at this point in the program is needed, even though
2339 it may not be apparent why this is so. Therefore, the compiler will
2340 not attempt to delete previous instructions whose only effect is to
2341 store a value in @var{x}. @var{x} must be a @code{reg} expression.
2343 In some situations, it may be tempting to add a @code{use} of a
2344 register in a @code{parallel} to describe a situation where the value
2345 of a special register will modify the behavior of the instruction.
2346 An hypothetical example might be a pattern for an addition that can
2347 either wrap around or use saturating addition depending on the value
2348 of a special control register:
2351 (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
2358 This will not work, several of the optimizers only look at expressions
2359 locally; it is very likely that if you have multiple insns with
2360 identical inputs to the @code{unspec}, they will be optimized away even
2361 if register 1 changes in between.
2363 This means that @code{use} can @emph{only} be used to describe
2364 that the register is live. You should think twice before adding
2365 @code{use} statements, more often you will want to use @code{unspec}
2366 instead. The @code{use} RTX is most commonly useful to describe that
2367 a fixed register is implicitly used in an insn. It is also safe to use
2368 in patterns where the compiler knows for other reasons that the result
2369 of the whole pattern is variable, such as @samp{movstr@var{m}} or
2370 @samp{call} patterns.
2372 During the reload phase, an insn that has a @code{use} as pattern
2373 can carry a reg_equal note. These @code{use} insns will be deleted
2374 before the reload phase exits.
2376 During the delayed branch scheduling phase, @var{x} may be an insn.
2377 This indicates that @var{x} previously was located at this place in the
2378 code and its data dependencies need to be taken into account. These
2379 @code{use} insns will be deleted before the delayed branch scheduling
2383 @item (parallel [@var{x0} @var{x1} @dots{}])
2384 Represents several side effects performed in parallel. The square
2385 brackets stand for a vector; the operand of @code{parallel} is a
2386 vector of expressions. @var{x0}, @var{x1} and so on are individual
2387 side effect expressions---expressions of code @code{set}, @code{call},
2388 @code{return}, @code{clobber} or @code{use}.
2390 ``In parallel'' means that first all the values used in the individual
2391 side-effects are computed, and second all the actual side-effects are
2392 performed. For example,
2395 (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
2396 (set (mem:SI (reg:SI 1)) (reg:SI 1))])
2400 says unambiguously that the values of hard register 1 and the memory
2401 location addressed by it are interchanged. In both places where
2402 @code{(reg:SI 1)} appears as a memory address it refers to the value
2403 in register 1 @emph{before} the execution of the insn.
2405 It follows that it is @emph{incorrect} to use @code{parallel} and
2406 expect the result of one @code{set} to be available for the next one.
2407 For example, people sometimes attempt to represent a jump-if-zero
2408 instruction this way:
2411 (parallel [(set (cc0) (reg:SI 34))
2412 (set (pc) (if_then_else
2413 (eq (cc0) (const_int 0))
2419 But this is incorrect, because it says that the jump condition depends
2420 on the condition code value @emph{before} this instruction, not on the
2421 new value that is set by this instruction.
2423 @cindex peephole optimization, RTL representation
2424 Peephole optimization, which takes place together with final assembly
2425 code output, can produce insns whose patterns consist of a @code{parallel}
2426 whose elements are the operands needed to output the resulting
2427 assembler code---often @code{reg}, @code{mem} or constant expressions.
2428 This would not be well-formed RTL at any other stage in compilation,
2429 but it is ok then because no further optimization remains to be done.
2430 However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
2431 any, must deal with such insns if you define any peephole optimizations.
2434 @item (cond_exec [@var{cond} @var{expr}])
2435 Represents a conditionally executed expression. The @var{expr} is
2436 executed only if the @var{cond} is nonzero. The @var{cond} expression
2437 must not have side-effects, but the @var{expr} may very well have
2441 @item (sequence [@var{insns} @dots{}])
2442 Represents a sequence of insns. Each of the @var{insns} that appears
2443 in the vector is suitable for appearing in the chain of insns, so it
2444 must be an @code{insn}, @code{jump_insn}, @code{call_insn},
2445 @code{code_label}, @code{barrier} or @code{note}.
2447 A @code{sequence} RTX is never placed in an actual insn during RTL
2448 generation. It represents the sequence of insns that result from a
2449 @code{define_expand} @emph{before} those insns are passed to
2450 @code{emit_insn} to insert them in the chain of insns. When actually
2451 inserted, the individual sub-insns are separated out and the
2452 @code{sequence} is forgotten.
2454 After delay-slot scheduling is completed, an insn and all the insns that
2455 reside in its delay slots are grouped together into a @code{sequence}.
2456 The insn requiring the delay slot is the first insn in the vector;
2457 subsequent insns are to be placed in the delay slot.
2459 @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
2460 indicate that a branch insn should be used that will conditionally annul
2461 the effect of the insns in the delay slots. In such a case,
2462 @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
2463 the branch and should be executed only if the branch is taken; otherwise
2464 the insn should be executed only if the branch is not taken.
2468 These expression codes appear in place of a side effect, as the body of
2469 an insn, though strictly speaking they do not always describe side
2474 @item (asm_input @var{s})
2475 Represents literal assembler code as described by the string @var{s}.
2478 @findex unspec_volatile
2479 @item (unspec [@var{operands} @dots{}] @var{index})
2480 @itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
2481 Represents a machine-specific operation on @var{operands}. @var{index}
2482 selects between multiple machine-specific operations.
2483 @code{unspec_volatile} is used for volatile operations and operations
2484 that may trap; @code{unspec} is used for other operations.
2486 These codes may appear inside a @code{pattern} of an
2487 insn, inside a @code{parallel}, or inside an expression.
2490 @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
2491 Represents a table of jump addresses. The vector elements @var{lr0},
2492 etc., are @code{label_ref} expressions. The mode @var{m} specifies
2493 how much space is given to each address; normally @var{m} would be
2496 @findex addr_diff_vec
2497 @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
2498 Represents a table of jump addresses expressed as offsets from
2499 @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
2500 expressions and so is @var{base}. The mode @var{m} specifies how much
2501 space is given to each address-difference. @var{min} and @var{max}
2502 are set up by branch shortening and hold a label with a minimum and a
2503 maximum address, respectively. @var{flags} indicates the relative
2504 position of @var{base}, @var{min} and @var{max} to the containing insn
2505 and of @var{min} and @var{max} to @var{base}. See rtl.def for details.
2508 @item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
2509 Represents prefetch of memory at address @var{addr}.
2510 Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
2511 targets that do not support write prefetches should treat this as a normal
2513 Operand @var{locality} specifies the amount of temporal locality; 0 if there
2514 is none or 1, 2, or 3 for increasing levels of temporal locality;
2515 targets that do not support locality hints should ignore this.
2517 This insn is used to minimize cache-miss latency by moving data into a
2518 cache before it is accessed. It should use only non-faulting data prefetch
2523 @section Embedded Side-Effects on Addresses
2524 @cindex RTL preincrement
2525 @cindex RTL postincrement
2526 @cindex RTL predecrement
2527 @cindex RTL postdecrement
2529 Six special side-effect expression codes appear as memory addresses.
2533 @item (pre_dec:@var{m} @var{x})
2534 Represents the side effect of decrementing @var{x} by a standard
2535 amount and represents also the value that @var{x} has after being
2536 decremented. @var{x} must be a @code{reg} or @code{mem}, but most
2537 machines allow only a @code{reg}. @var{m} must be the machine mode
2538 for pointers on the machine in use. The amount @var{x} is decremented
2539 by is the length in bytes of the machine mode of the containing memory
2540 reference of which this expression serves as the address. Here is an
2544 (mem:DF (pre_dec:SI (reg:SI 39)))
2548 This says to decrement pseudo register 39 by the length of a @code{DFmode}
2549 value and use the result to address a @code{DFmode} value.
2552 @item (pre_inc:@var{m} @var{x})
2553 Similar, but specifies incrementing @var{x} instead of decrementing it.
2556 @item (post_dec:@var{m} @var{x})
2557 Represents the same side effect as @code{pre_dec} but a different
2558 value. The value represented here is the value @var{x} has @i{before}
2562 @item (post_inc:@var{m} @var{x})
2563 Similar, but specifies incrementing @var{x} instead of decrementing it.
2566 @item (post_modify:@var{m} @var{x} @var{y})
2568 Represents the side effect of setting @var{x} to @var{y} and
2569 represents @var{x} before @var{x} is modified. @var{x} must be a
2570 @code{reg} or @code{mem}, but most machines allow only a @code{reg}.
2571 @var{m} must be the machine mode for pointers on the machine in use.
2572 The amount @var{x} is decremented by is the length in bytes of the
2573 machine mode of the containing memory reference of which this expression
2574 serves as the address. Note that this is not currently implemented.
2576 The expression @var{y} must be one of three forms:
2578 @code{(plus:@var{m} @var{x} @var{z})},
2579 @code{(minus:@var{m} @var{x} @var{z})}, or
2580 @code{(plus:@var{m} @var{x} @var{i})},
2582 where @var{z} is an index register and @var{i} is a constant.
2584 Here is an example of its use:
2587 (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
2591 This says to modify pseudo register 42 by adding the contents of pseudo
2592 register 48 to it, after the use of what ever 42 points to.
2595 @item (pre_modify:@var{m} @var{x} @var{expr})
2596 Similar except side effects happen before the use.
2599 These embedded side effect expressions must be used with care. Instruction
2600 patterns may not use them. Until the @samp{flow} pass of the compiler,
2601 they may occur only to represent pushes onto the stack. The @samp{flow}
2602 pass finds cases where registers are incremented or decremented in one
2603 instruction and used as an address shortly before or after; these cases are
2604 then transformed to use pre- or post-increment or -decrement.
2606 If a register used as the operand of these expressions is used in
2607 another address in an insn, the original value of the register is used.
2608 Uses of the register outside of an address are not permitted within the
2609 same insn as a use in an embedded side effect expression because such
2610 insns behave differently on different machines and hence must be treated
2611 as ambiguous and disallowed.
2613 An instruction that can be represented with an embedded side effect
2614 could also be represented using @code{parallel} containing an additional
2615 @code{set} to describe how the address register is altered. This is not
2616 done because machines that allow these operations at all typically
2617 allow them wherever a memory address is called for. Describing them as
2618 additional parallel stores would require doubling the number of entries
2619 in the machine description.
2622 @section Assembler Instructions as Expressions
2623 @cindex assembler instructions in RTL
2625 @cindex @code{asm_operands}, usage
2626 The RTX code @code{asm_operands} represents a value produced by a
2627 user-specified assembler instruction. It is used to represent
2628 an @code{asm} statement with arguments. An @code{asm} statement with
2629 a single output operand, like this:
2632 asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
2636 is represented using a single @code{asm_operands} RTX which represents
2637 the value that is stored in @code{outputvar}:
2640 (set @var{rtx-for-outputvar}
2641 (asm_operands "foo %1,%2,%0" "a" 0
2642 [@var{rtx-for-addition-result} @var{rtx-for-*z}]
2643 [(asm_input:@var{m1} "g")
2644 (asm_input:@var{m2} "di")]))
2648 Here the operands of the @code{asm_operands} RTX are the assembler
2649 template string, the output-operand's constraint, the index-number of the
2650 output operand among the output operands specified, a vector of input
2651 operand RTX's, and a vector of input-operand modes and constraints. The
2652 mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
2655 When an @code{asm} statement has multiple output values, its insn has
2656 several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
2657 contains a @code{asm_operands}; all of these share the same assembler
2658 template and vectors, but each contains the constraint for the respective
2659 output operand. They are also distinguished by the output-operand index
2660 number, which is 0, 1, @dots{} for successive output operands.
2666 The RTL representation of the code for a function is a doubly-linked
2667 chain of objects called @dfn{insns}. Insns are expressions with
2668 special codes that are used for no other purpose. Some insns are
2669 actual instructions; others represent dispatch tables for @code{switch}
2670 statements; others represent labels to jump to or various sorts of
2671 declarative information.
2673 In addition to its own specific data, each insn must have a unique
2674 id-number that distinguishes it from all other insns in the current
2675 function (after delayed branch scheduling, copies of an insn with the
2676 same id-number may be present in multiple places in a function, but
2677 these copies will always be identical and will only appear inside a
2678 @code{sequence}), and chain pointers to the preceding and following
2679 insns. These three fields occupy the same position in every insn,
2680 independent of the expression code of the insn. They could be accessed
2681 with @code{XEXP} and @code{XINT}, but instead three special macros are
2686 @item INSN_UID (@var{i})
2687 Accesses the unique id of insn @var{i}.
2690 @item PREV_INSN (@var{i})
2691 Accesses the chain pointer to the insn preceding @var{i}.
2692 If @var{i} is the first insn, this is a null pointer.
2695 @item NEXT_INSN (@var{i})
2696 Accesses the chain pointer to the insn following @var{i}.
2697 If @var{i} is the last insn, this is a null pointer.
2701 @findex get_last_insn
2702 The first insn in the chain is obtained by calling @code{get_insns}; the
2703 last insn is the result of calling @code{get_last_insn}. Within the
2704 chain delimited by these insns, the @code{NEXT_INSN} and
2705 @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
2709 NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
2713 is always true and if @var{insn} is not the last insn,
2716 PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
2722 After delay slot scheduling, some of the insns in the chain might be
2723 @code{sequence} expressions, which contain a vector of insns. The value
2724 of @code{NEXT_INSN} in all but the last of these insns is the next insn
2725 in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
2726 is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
2727 which it is contained. Similar rules apply for @code{PREV_INSN}.
2729 This means that the above invariants are not necessarily true for insns
2730 inside @code{sequence} expressions. Specifically, if @var{insn} is the
2731 first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
2732 is the insn containing the @code{sequence} expression, as is the value
2733 of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
2734 insn in the @code{sequence} expression. You can use these expressions
2735 to find the containing @code{sequence} expression.
2737 Every insn has one of the following six expression codes:
2742 The expression code @code{insn} is used for instructions that do not jump
2743 and do not do function calls. @code{sequence} expressions are always
2744 contained in insns with code @code{insn} even if one of those insns
2745 should jump or do function calls.
2747 Insns with code @code{insn} have four additional fields beyond the three
2748 mandatory ones listed above. These four are described in a table below.
2752 The expression code @code{jump_insn} is used for instructions that may
2753 jump (or, more generally, may contain @code{label_ref} expressions). If
2754 there is an instruction to return from the current function, it is
2755 recorded as a @code{jump_insn}.
2758 @code{jump_insn} insns have the same extra fields as @code{insn} insns,
2759 accessed in the same way and in addition contain a field
2760 @code{JUMP_LABEL} which is defined once jump optimization has completed.
2762 For simple conditional and unconditional jumps, this field contains
2763 the @code{code_label} to which this insn will (possibly conditionally)
2764 branch. In a more complex jump, @code{JUMP_LABEL} records one of the
2765 labels that the insn refers to; the only way to find the others is to
2766 scan the entire body of the insn. In an @code{addr_vec},
2767 @code{JUMP_LABEL} is @code{NULL_RTX}.
2769 Return insns count as jumps, but since they do not refer to any
2770 labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
2774 The expression code @code{call_insn} is used for instructions that may do
2775 function calls. It is important to distinguish these instructions because
2776 they imply that certain registers and memory locations may be altered
2779 @findex CALL_INSN_FUNCTION_USAGE
2780 @code{call_insn} insns have the same extra fields as @code{insn} insns,
2781 accessed in the same way and in addition contain a field
2782 @code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
2783 @code{expr_list} expressions) containing @code{use} and @code{clobber}
2784 expressions that denote hard registers and @code{MEM}s used or
2785 clobbered by the called function.
2787 A @code{MEM} generally points to a stack slots in which arguments passed
2788 to the libcall by reference (@pxref{Register Arguments,
2789 FUNCTION_ARG_PASS_BY_REFERENCE}) are stored. If the argument is
2790 caller-copied (@pxref{Register Arguments, FUNCTION_ARG_CALLEE_COPIES}),
2791 the stack slot will be mentioned in @code{CLOBBER} and @code{USE}
2792 entries; if it's callee-copied, only a @code{USE} will appear, and the
2793 @code{MEM} may point to addresses that are not stack slots. These
2794 @code{MEM}s are used only in libcalls, because, unlike regular function
2795 calls, @code{CONST_CALL}s (which libcalls generally are, @pxref{Flags,
2796 CONST_CALL_P}) aren't assumed to read and write all memory, so flow
2797 would consider the stores dead and remove them. Note that, since a
2798 libcall must never return values in memory (@pxref{Aggregate Return,
2799 RETURN_IN_MEMORY}), there will never be a @code{CLOBBER} for a memory
2800 address holding a return value.
2802 @code{CLOBBER}ed registers in this list augment registers specified in
2803 @code{CALL_USED_REGISTERS} (@pxref{Register Basics}).
2806 @findex CODE_LABEL_NUMBER
2808 A @code{code_label} insn represents a label that a jump insn can jump
2809 to. It contains two special fields of data in addition to the three
2810 standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
2811 number}, a number that identifies this label uniquely among all the
2812 labels in the compilation (not just in the current function).
2813 Ultimately, the label is represented in the assembler output as an
2814 assembler label, usually of the form @samp{L@var{n}} where @var{n} is
2817 When a @code{code_label} appears in an RTL expression, it normally
2818 appears within a @code{label_ref} which represents the address of
2819 the label, as a number.
2821 Besides as a @code{code_label}, a label can also be represented as a
2822 @code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
2825 The field @code{LABEL_NUSES} is only defined once the jump optimization
2826 phase is completed and contains the number of times this label is
2827 referenced in the current function.
2829 @findex LABEL_ALTERNATE_NAME
2830 The field @code{LABEL_ALTERNATE_NAME} is used to associate a name with
2831 a @code{code_label}. If this field is defined, the alternate name will
2832 be emitted instead of an internally generated label name.
2836 Barriers are placed in the instruction stream when control cannot flow
2837 past them. They are placed after unconditional jump instructions to
2838 indicate that the jumps are unconditional and after calls to
2839 @code{volatile} functions, which do not return (e.g., @code{exit}).
2840 They contain no information beyond the three standard fields.
2843 @findex NOTE_LINE_NUMBER
2844 @findex NOTE_SOURCE_FILE
2846 @code{note} insns are used to represent additional debugging and
2847 declarative information. They contain two nonstandard fields, an
2848 integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
2849 string accessed with @code{NOTE_SOURCE_FILE}.
2851 If @code{NOTE_LINE_NUMBER} is positive, the note represents the
2852 position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
2853 that the line came from. These notes control generation of line
2854 number data in the assembler output.
2856 Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
2857 code with one of the following values (and @code{NOTE_SOURCE_FILE}
2858 must contain a null pointer):
2861 @findex NOTE_INSN_DELETED
2862 @item NOTE_INSN_DELETED
2863 Such a note is completely ignorable. Some passes of the compiler
2864 delete insns by altering them into notes of this kind.
2866 @findex NOTE_INSN_DELETED_LABEL
2867 @item NOTE_INSN_DELETED_LABEL
2868 This marks what used to be a @code{code_label}, but was not used for other
2869 purposes than taking its address and was transformed to mark that no
2872 @findex NOTE_INSN_BLOCK_BEG
2873 @findex NOTE_INSN_BLOCK_END
2874 @item NOTE_INSN_BLOCK_BEG
2875 @itemx NOTE_INSN_BLOCK_END
2876 These types of notes indicate the position of the beginning and end
2877 of a level of scoping of variable names. They control the output
2878 of debugging information.
2880 @findex NOTE_INSN_EH_REGION_BEG
2881 @findex NOTE_INSN_EH_REGION_END
2882 @item NOTE_INSN_EH_REGION_BEG
2883 @itemx NOTE_INSN_EH_REGION_END
2884 These types of notes indicate the position of the beginning and end of a
2885 level of scoping for exception handling. @code{NOTE_BLOCK_NUMBER}
2886 identifies which @code{CODE_LABEL} or @code{note} of type
2887 @code{NOTE_INSN_DELETED_LABEL} is associated with the given region.
2889 @findex NOTE_INSN_LOOP_BEG
2890 @findex NOTE_INSN_LOOP_END
2891 @item NOTE_INSN_LOOP_BEG
2892 @itemx NOTE_INSN_LOOP_END
2893 These types of notes indicate the position of the beginning and end
2894 of a @code{while} or @code{for} loop. They enable the loop optimizer
2895 to find loops quickly.
2897 @findex NOTE_INSN_LOOP_CONT
2898 @item NOTE_INSN_LOOP_CONT
2899 Appears at the place in a loop that @code{continue} statements jump to.
2901 @findex NOTE_INSN_LOOP_VTOP
2902 @item NOTE_INSN_LOOP_VTOP
2903 This note indicates the place in a loop where the exit test begins for
2904 those loops in which the exit test has been duplicated. This position
2905 becomes another virtual start of the loop when considering loop
2908 @findex NOTE_INSN_FUNCTION_END
2909 @item NOTE_INSN_FUNCTION_END
2910 Appears near the end of the function body, just before the label that
2911 @code{return} statements jump to (on machine where a single instruction
2912 does not suffice for returning). This note may be deleted by jump
2915 @findex NOTE_INSN_SETJMP
2916 @item NOTE_INSN_SETJMP
2917 Appears following each call to @code{setjmp} or a related function.
2920 These codes are printed symbolically when they appear in debugging dumps.
2923 @cindex @code{TImode}, in @code{insn}
2924 @cindex @code{HImode}, in @code{insn}
2925 @cindex @code{QImode}, in @code{insn}
2926 The machine mode of an insn is normally @code{VOIDmode}, but some
2927 phases use the mode for various purposes.
2929 The common subexpression elimination pass sets the mode of an insn to
2930 @code{QImode} when it is the first insn in a block that has already
2933 The second Haifa scheduling pass, for targets that can multiple issue,
2934 sets the mode of an insn to @code{TImode} when it is believed that the
2935 instruction begins an issue group. That is, when the instruction
2936 cannot issue simultaneously with the previous. This may be relied on
2937 by later passes, in particular machine-dependent reorg.
2939 Here is a table of the extra fields of @code{insn}, @code{jump_insn}
2940 and @code{call_insn} insns:
2944 @item PATTERN (@var{i})
2945 An expression for the side effect performed by this insn. This must be
2946 one of the following codes: @code{set}, @code{call}, @code{use},
2947 @code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
2948 @code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
2949 @code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a @code{parallel},
2950 each element of the @code{parallel} must be one these codes, except that
2951 @code{parallel} expressions cannot be nested and @code{addr_vec} and
2952 @code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
2955 @item INSN_CODE (@var{i})
2956 An integer that says which pattern in the machine description matches
2957 this insn, or @minus{}1 if the matching has not yet been attempted.
2959 Such matching is never attempted and this field remains @minus{}1 on an insn
2960 whose pattern consists of a single @code{use}, @code{clobber},
2961 @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
2963 @findex asm_noperands
2964 Matching is also never attempted on insns that result from an @code{asm}
2965 statement. These contain at least one @code{asm_operands} expression.
2966 The function @code{asm_noperands} returns a non-negative value for
2969 In the debugging output, this field is printed as a number followed by
2970 a symbolic representation that locates the pattern in the @file{md}
2971 file as some small positive or negative offset from a named pattern.
2974 @item LOG_LINKS (@var{i})
2975 A list (chain of @code{insn_list} expressions) giving information about
2976 dependencies between instructions within a basic block. Neither a jump
2977 nor a label may come between the related insns.
2980 @item REG_NOTES (@var{i})
2981 A list (chain of @code{expr_list} and @code{insn_list} expressions)
2982 giving miscellaneous information about the insn. It is often
2983 information pertaining to the registers used in this insn.
2986 The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
2987 expressions. Each of these has two operands: the first is an insn,
2988 and the second is another @code{insn_list} expression (the next one in
2989 the chain). The last @code{insn_list} in the chain has a null pointer
2990 as second operand. The significant thing about the chain is which
2991 insns appear in it (as first operands of @code{insn_list}
2992 expressions). Their order is not significant.
2994 This list is originally set up by the flow analysis pass; it is a null
2995 pointer until then. Flow only adds links for those data dependencies
2996 which can be used for instruction combination. For each insn, the flow
2997 analysis pass adds a link to insns which store into registers values
2998 that are used for the first time in this insn. The instruction
2999 scheduling pass adds extra links so that every dependence will be
3000 represented. Links represent data dependencies, antidependencies and
3001 output dependencies; the machine mode of the link distinguishes these
3002 three types: antidependencies have mode @code{REG_DEP_ANTI}, output
3003 dependencies have mode @code{REG_DEP_OUTPUT}, and data dependencies have
3004 mode @code{VOIDmode}.
3006 The @code{REG_NOTES} field of an insn is a chain similar to the
3007 @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
3008 addition to @code{insn_list} expressions. There are several kinds of
3009 register notes, which are distinguished by the machine mode, which in a
3010 register note is really understood as being an @code{enum reg_note}.
3011 The first operand @var{op} of the note is data whose meaning depends on
3014 @findex REG_NOTE_KIND
3015 @findex PUT_REG_NOTE_KIND
3016 The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
3017 register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
3018 (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
3021 Register notes are of three classes: They may say something about an
3022 input to an insn, they may say something about an output of an insn, or
3023 they may create a linkage between two insns. There are also a set
3024 of values that are only used in @code{LOG_LINKS}.
3026 These register notes annotate inputs to an insn:
3031 The value in @var{op} dies in this insn; that is to say, altering the
3032 value immediately after this insn would not affect the future behavior
3035 It does not follow that the register @var{op} has no useful value after
3036 this insn since @var{op} is not necessarily modified by this insn.
3037 Rather, no subsequent instruction uses the contents of @var{op}.
3041 The register @var{op} being set by this insn will not be used in a
3042 subsequent insn. This differs from a @code{REG_DEAD} note, which
3043 indicates that the value in an input will not be used subsequently.
3044 These two notes are independent; both may be present for the same
3049 The register @var{op} is incremented (or decremented; at this level
3050 there is no distinction) by an embedded side effect inside this insn.
3051 This means it appears in a @code{post_inc}, @code{pre_inc},
3052 @code{post_dec} or @code{pre_dec} expression.
3056 The register @var{op} is known to have a nonnegative value when this
3057 insn is reached. This is used so that decrement and branch until zero
3058 instructions, such as the m68k dbra, can be matched.
3060 The @code{REG_NONNEG} note is added to insns only if the machine
3061 description has a @samp{decrement_and_branch_until_zero} pattern.
3063 @findex REG_NO_CONFLICT
3064 @item REG_NO_CONFLICT
3065 This insn does not cause a conflict between @var{op} and the item
3066 being set by this insn even though it might appear that it does.
3067 In other words, if the destination register and @var{op} could
3068 otherwise be assigned the same register, this insn does not
3069 prevent that assignment.
3071 Insns with this note are usually part of a block that begins with a
3072 @code{clobber} insn specifying a multi-word pseudo register (which will
3073 be the output of the block), a group of insns that each set one word of
3074 the value and have the @code{REG_NO_CONFLICT} note attached, and a final
3075 insn that copies the output to itself with an attached @code{REG_EQUAL}
3076 note giving the expression being computed. This block is encapsulated
3077 with @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and
3078 last insns, respectively.
3082 This insn uses @var{op}, a @code{code_label} or a @code{note} of type
3083 @code{NOTE_INSN_DELETED_LABEL}, but is not a
3084 @code{jump_insn}, or it is a @code{jump_insn} that required the label to
3085 be held in a register. The presence of this note allows jump
3086 optimization to be aware that @var{op} is, in fact, being used, and flow
3087 optimization to build an accurate flow graph.
3090 The following notes describe attributes of outputs of an insn:
3097 This note is only valid on an insn that sets only one register and
3098 indicates that that register will be equal to @var{op} at run time; the
3099 scope of this equivalence differs between the two types of notes. The
3100 value which the insn explicitly copies into the register may look
3101 different from @var{op}, but they will be equal at run time. If the
3102 output of the single @code{set} is a @code{strict_low_part} expression,
3103 the note refers to the register that is contained in @code{SUBREG_REG}
3104 of the @code{subreg} expression.
3106 For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
3107 the entire function, and could validly be replaced in all its
3108 occurrences by @var{op}. (``Validly'' here refers to the data flow of
3109 the program; simple replacement may make some insns invalid.) For
3110 example, when a constant is loaded into a register that is never
3111 assigned any other value, this kind of note is used.
3113 When a parameter is copied into a pseudo-register at entry to a function,
3114 a note of this kind records that the register is equivalent to the stack
3115 slot where the parameter was passed. Although in this case the register
3116 may be set by other insns, it is still valid to replace the register
3117 by the stack slot throughout the function.
3119 A @code{REG_EQUIV} note is also used on an instruction which copies a
3120 register parameter into a pseudo-register at entry to a function, if
3121 there is a stack slot where that parameter could be stored. Although
3122 other insns may set the pseudo-register, it is valid for the compiler to
3123 replace the pseudo-register by stack slot throughout the function,
3124 provided the compiler ensures that the stack slot is properly
3125 initialized by making the replacement in the initial copy instruction as
3126 well. This is used on machines for which the calling convention
3127 allocates stack space for register parameters. See
3128 @code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
3130 In the case of @code{REG_EQUAL}, the register that is set by this insn
3131 will be equal to @var{op} at run time at the end of this insn but not
3132 necessarily elsewhere in the function. In this case, @var{op}
3133 is typically an arithmetic expression. For example, when a sequence of
3134 insns such as a library call is used to perform an arithmetic operation,
3135 this kind of note is attached to the insn that produces or copies the
3138 These two notes are used in different ways by the compiler passes.
3139 @code{REG_EQUAL} is used by passes prior to register allocation (such as
3140 common subexpression elimination and loop optimization) to tell them how
3141 to think of that value. @code{REG_EQUIV} notes are used by register
3142 allocation to indicate that there is an available substitute expression
3143 (either a constant or a @code{mem} expression for the location of a
3144 parameter on the stack) that may be used in place of a register if
3145 insufficient registers are available.
3147 Except for stack homes for parameters, which are indicated by a
3148 @code{REG_EQUIV} note and are not useful to the early optimization
3149 passes and pseudo registers that are equivalent to a memory location
3150 throughout their entire life, which is not detected until later in
3151 the compilation, all equivalences are initially indicated by an attached
3152 @code{REG_EQUAL} note. In the early stages of register allocation, a
3153 @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
3154 @var{op} is a constant and the insn represents the only set of its
3155 destination register.
3157 Thus, compiler passes prior to register allocation need only check for
3158 @code{REG_EQUAL} notes and passes subsequent to register allocation
3159 need only check for @code{REG_EQUIV} notes.
3163 The single output of this insn contained zero before this insn.
3164 @var{op} is the insn that set it to zero. You can rely on this note if
3165 it is present and @var{op} has not been deleted or turned into a @code{note};
3166 its absence implies nothing.
3169 These notes describe linkages between insns. They occur in pairs: one
3170 insn has one of a pair of notes that points to a second insn, which has
3171 the inverse note pointing back to the first insn.
3176 This insn copies the value of a multi-insn sequence (for example, a
3177 library call), and @var{op} is the first insn of the sequence (for a
3178 library call, the first insn that was generated to set up the arguments
3179 for the library call).
3181 Loop optimization uses this note to treat such a sequence as a single
3182 operation for code motion purposes and flow analysis uses this note to
3183 delete such sequences whose results are dead.
3185 A @code{REG_EQUAL} note will also usually be attached to this insn to
3186 provide the expression being computed by the sequence.
3188 These notes will be deleted after reload, since they are no longer
3193 This is the inverse of @code{REG_RETVAL}: it is placed on the first
3194 insn of a multi-insn sequence, and it points to the last one.
3196 These notes are deleted after reload, since they are no longer useful or
3199 @findex REG_CC_SETTER
3203 On machines that use @code{cc0}, the insns which set and use @code{cc0}
3204 set and use @code{cc0} are adjacent. However, when branch delay slot
3205 filling is done, this may no longer be true. In this case a
3206 @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
3207 point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
3208 be placed on the insn using @code{cc0} to point to the insn setting
3212 These values are only used in the @code{LOG_LINKS} field, and indicate
3213 the type of dependency that each link represents. Links which indicate
3214 a data dependence (a read after write dependence) do not use any code,
3215 they simply have mode @code{VOIDmode}, and are printed without any
3219 @findex REG_DEP_ANTI
3221 This indicates an anti dependence (a write after read dependence).
3223 @findex REG_DEP_OUTPUT
3224 @item REG_DEP_OUTPUT
3225 This indicates an output dependence (a write after write dependence).
3228 These notes describe information gathered from gcov profile data. They
3229 are stored in the @code{REG_NOTES} field of an insn as an
3233 @findex REG_EXEC_COUNT
3234 @item REG_EXEC_COUNT
3235 This is used to indicate the number of times a basic block was executed
3236 according to the profile data. The note is attached to the first insn in
3241 This is used to specify the ratio of branches to non-branches of a
3242 branch insn according to the profile data. The value is stored as a
3243 value between 0 and REG_BR_PROB_BASE; larger values indicate a higher
3244 probability that the branch will be taken.
3248 These notes are found in JUMP insns after delayed branch scheduling
3249 has taken place. They indicate both the direction and the likelihood
3250 of the JUMP@. The format is a bitmask of ATTR_FLAG_* values.
3252 @findex REG_FRAME_RELATED_EXPR
3253 @item REG_FRAME_RELATED_EXPR
3254 This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
3255 is used in place of the actual insn pattern. This is done in cases where
3256 the pattern is either complex or misleading.
3259 For convenience, the machine mode in an @code{insn_list} or
3260 @code{expr_list} is printed using these symbolic codes in debugging dumps.
3264 The only difference between the expression codes @code{insn_list} and
3265 @code{expr_list} is that the first operand of an @code{insn_list} is
3266 assumed to be an insn and is printed in debugging dumps as the insn's
3267 unique id; the first operand of an @code{expr_list} is printed in the
3268 ordinary way as an expression.
3271 @section RTL Representation of Function-Call Insns
3272 @cindex calling functions in RTL
3273 @cindex RTL function-call insns
3274 @cindex function-call insns
3276 Insns that call subroutines have the RTL expression code @code{call_insn}.
3277 These insns must satisfy special rules, and their bodies must use a special
3278 RTL expression code, @code{call}.
3280 @cindex @code{call} usage
3281 A @code{call} expression has two operands, as follows:
3284 (call (mem:@var{fm} @var{addr}) @var{nbytes})
3288 Here @var{nbytes} is an operand that represents the number of bytes of
3289 argument data being passed to the subroutine, @var{fm} is a machine mode
3290 (which must equal as the definition of the @code{FUNCTION_MODE} macro in
3291 the machine description) and @var{addr} represents the address of the
3294 For a subroutine that returns no value, the @code{call} expression as
3295 shown above is the entire body of the insn, except that the insn might
3296 also contain @code{use} or @code{clobber} expressions.
3298 @cindex @code{BLKmode}, and function return values
3299 For a subroutine that returns a value whose mode is not @code{BLKmode},
3300 the value is returned in a hard register. If this register's number is
3301 @var{r}, then the body of the call insn looks like this:
3304 (set (reg:@var{m} @var{r})
3305 (call (mem:@var{fm} @var{addr}) @var{nbytes}))
3309 This RTL expression makes it clear (to the optimizer passes) that the
3310 appropriate register receives a useful value in this insn.
3312 When a subroutine returns a @code{BLKmode} value, it is handled by
3313 passing to the subroutine the address of a place to store the value.
3314 So the call insn itself does not ``return'' any value, and it has the
3315 same RTL form as a call that returns nothing.
3317 On some machines, the call instruction itself clobbers some register,
3318 for example to contain the return address. @code{call_insn} insns
3319 on these machines should have a body which is a @code{parallel}
3320 that contains both the @code{call} expression and @code{clobber}
3321 expressions that indicate which registers are destroyed. Similarly,
3322 if the call instruction requires some register other than the stack
3323 pointer that is not explicitly mentioned it its RTL, a @code{use}
3324 subexpression should mention that register.
3326 Functions that are called are assumed to modify all registers listed in
3327 the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
3328 Basics}) and, with the exception of @code{const} functions and library
3329 calls, to modify all of memory.
3331 Insns containing just @code{use} expressions directly precede the
3332 @code{call_insn} insn to indicate which registers contain inputs to the
3333 function. Similarly, if registers other than those in
3334 @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
3335 containing a single @code{clobber} follow immediately after the call to
3336 indicate which registers.
3339 @section Structure Sharing Assumptions
3340 @cindex sharing of RTL components
3341 @cindex RTL structure sharing assumptions
3343 The compiler assumes that certain kinds of RTL expressions are unique;
3344 there do not exist two distinct objects representing the same value.
3345 In other cases, it makes an opposite assumption: that no RTL expression
3346 object of a certain kind appears in more than one place in the
3347 containing structure.
3349 These assumptions refer to a single function; except for the RTL
3350 objects that describe global variables and external functions,
3351 and a few standard objects such as small integer constants,
3352 no RTL objects are common to two functions.
3355 @cindex @code{reg}, RTL sharing
3357 Each pseudo-register has only a single @code{reg} object to represent it,
3358 and therefore only a single machine mode.
3360 @cindex symbolic label
3361 @cindex @code{symbol_ref}, RTL sharing
3363 For any symbolic label, there is only one @code{symbol_ref} object
3366 @cindex @code{const_int}, RTL sharing
3368 All @code{const_int} expressions with equal values are shared.
3370 @cindex @code{pc}, RTL sharing
3372 There is only one @code{pc} expression.
3374 @cindex @code{cc0}, RTL sharing
3376 There is only one @code{cc0} expression.
3378 @cindex @code{const_double}, RTL sharing
3380 There is only one @code{const_double} expression with value 0 for
3381 each floating point mode. Likewise for values 1 and 2.
3383 @cindex @code{const_vector}, RTL sharing
3385 There is only one @code{const_vector} expression with value 0 for
3386 each vector mode, be it an integer or a double constant vector.
3388 @cindex @code{label_ref}, RTL sharing
3389 @cindex @code{scratch}, RTL sharing
3391 No @code{label_ref} or @code{scratch} appears in more than one place in
3392 the RTL structure; in other words, it is safe to do a tree-walk of all
3393 the insns in the function and assume that each time a @code{label_ref}
3394 or @code{scratch} is seen it is distinct from all others that are seen.
3396 @cindex @code{mem}, RTL sharing
3398 Only one @code{mem} object is normally created for each static
3399 variable or stack slot, so these objects are frequently shared in all
3400 the places they appear. However, separate but equal objects for these
3401 variables are occasionally made.
3403 @cindex @code{asm_operands}, RTL sharing
3405 When a single @code{asm} statement has multiple output operands, a
3406 distinct @code{asm_operands} expression is made for each output operand.
3407 However, these all share the vector which contains the sequence of input
3408 operands. This sharing is used later on to test whether two
3409 @code{asm_operands} expressions come from the same statement, so all
3410 optimizations must carefully preserve the sharing if they copy the
3414 No RTL object appears in more than one place in the RTL structure
3415 except as described above. Many passes of the compiler rely on this
3416 by assuming that they can modify RTL objects in place without unwanted
3417 side-effects on other insns.
3419 @findex unshare_all_rtl
3421 During initial RTL generation, shared structure is freely introduced.
3422 After all the RTL for a function has been generated, all shared
3423 structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
3424 after which the above rules are guaranteed to be followed.
3426 @findex copy_rtx_if_shared
3428 During the combiner pass, shared structure within an insn can exist
3429 temporarily. However, the shared structure is copied before the
3430 combiner is finished with the insn. This is done by calling
3431 @code{copy_rtx_if_shared}, which is a subroutine of
3432 @code{unshare_all_rtl}.
3436 @section Reading RTL
3438 To read an RTL object from a file, call @code{read_rtx}. It takes one
3439 argument, a stdio stream, and returns a single RTL object. This routine
3440 is defined in @file{read-rtl.c}. It is not available in the compiler
3441 itself, only the various programs that generate the compiler back end
3442 from the machine description.
3444 People frequently have the idea of using RTL stored as text in a file as
3445 an interface between a language front end and the bulk of GCC@. This
3446 idea is not feasible.
3448 GCC was designed to use RTL internally only. Correct RTL for a given
3449 program is very dependent on the particular target machine. And the RTL
3450 does not contain all the information about the program.
3452 The proper way to interface GCC to a new language front end is with
3453 the ``tree'' data structure, described in the files @file{tree.h} and
3454 @file{tree.def}. The documentation for this structure (@pxref{Trees})