1 @c Copyright (C) 1988, 1989, 1992, 1994, 1997, 1998, 1999, 2000, 2001, 2002,
2 @c 2003, 2004, 2005, 2006, 2007
3 @c Free Software Foundation, Inc.
4 @c This is part of the GCC manual.
5 @c For copying conditions, see the file gcc.texi.
8 @chapter RTL Representation
9 @cindex RTL representation
10 @cindex representation of RTL
11 @cindex Register Transfer Language (RTL)
13 Most of the work of the compiler is done on an intermediate representation
14 called register transfer language. In this language, the instructions to be
15 output are described, pretty much one by one, in an algebraic form that
16 describes what the instruction does.
18 RTL is inspired by Lisp lists. It has both an internal form, made up of
19 structures that point at other structures, and a textual form that is used
20 in the machine description and in printed debugging dumps. The textual
21 form uses nested parentheses to indicate the pointers in the internal form.
24 * RTL Objects:: Expressions vs vectors vs strings vs integers.
25 * RTL Classes:: Categories of RTL expression objects, and their structure.
26 * Accessors:: Macros to access expression operands or vector elts.
27 * Special Accessors:: Macros to access specific annotations on RTL.
28 * Flags:: Other flags in an RTL expression.
29 * Machine Modes:: Describing the size and format of a datum.
30 * Constants:: Expressions with constant values.
31 * Regs and Memory:: Expressions representing register contents or memory.
32 * Arithmetic:: Expressions representing arithmetic on other expressions.
33 * Comparisons:: Expressions representing comparison of expressions.
34 * Bit-Fields:: Expressions representing bit-fields in memory or reg.
35 * Vector Operations:: Expressions involving vector datatypes.
36 * Conversions:: Extending, truncating, floating or fixing.
37 * RTL Declarations:: Declaring volatility, constancy, etc.
38 * Side Effects:: Expressions for storing in registers, etc.
39 * Incdec:: Embedded side-effects for autoincrement addressing.
40 * Assembler:: Representing @code{asm} with operands.
41 * Insns:: Expression types for entire insns.
42 * Calls:: RTL representation of function call insns.
43 * Sharing:: Some expressions are unique; others *must* be copied.
44 * Reading RTL:: Reading textual RTL from a file.
48 @section RTL Object Types
49 @cindex RTL object types
54 @cindex RTL expression
56 RTL uses five kinds of objects: expressions, integers, wide integers,
57 strings and vectors. Expressions are the most important ones. An RTL
58 expression (``RTX'', for short) is a C structure, but it is usually
59 referred to with a pointer; a type that is given the typedef name
62 An integer is simply an @code{int}; their written form uses decimal
63 digits. A wide integer is an integral object whose type is
64 @code{HOST_WIDE_INT}; their written form uses decimal digits.
66 A string is a sequence of characters. In core it is represented as a
67 @code{char *} in usual C fashion, and it is written in C syntax as well.
68 However, strings in RTL may never be null. If you write an empty string in
69 a machine description, it is represented in core as a null pointer rather
70 than as a pointer to a null character. In certain contexts, these null
71 pointers instead of strings are valid. Within RTL code, strings are most
72 commonly found inside @code{symbol_ref} expressions, but they appear in
73 other contexts in the RTL expressions that make up machine descriptions.
75 In a machine description, strings are normally written with double
76 quotes, as you would in C@. However, strings in machine descriptions may
77 extend over many lines, which is invalid C, and adjacent string
78 constants are not concatenated as they are in C@. Any string constant
79 may be surrounded with a single set of parentheses. Sometimes this
80 makes the machine description easier to read.
82 There is also a special syntax for strings, which can be useful when C
83 code is embedded in a machine description. Wherever a string can
84 appear, it is also valid to write a C-style brace block. The entire
85 brace block, including the outermost pair of braces, is considered to be
86 the string constant. Double quote characters inside the braces are not
87 special. Therefore, if you write string constants in the C code, you
88 need not escape each quote character with a backslash.
90 A vector contains an arbitrary number of pointers to expressions. The
91 number of elements in the vector is explicitly present in the vector.
92 The written form of a vector consists of square brackets
93 (@samp{[@dots{}]}) surrounding the elements, in sequence and with
94 whitespace separating them. Vectors of length zero are not created;
95 null pointers are used instead.
97 @cindex expression codes
98 @cindex codes, RTL expression
101 Expressions are classified by @dfn{expression codes} (also called RTX
102 codes). The expression code is a name defined in @file{rtl.def}, which is
103 also (in uppercase) a C enumeration constant. The possible expression
104 codes and their meanings are machine-independent. The code of an RTX can
105 be extracted with the macro @code{GET_CODE (@var{x})} and altered with
106 @code{PUT_CODE (@var{x}, @var{newcode})}.
108 The expression code determines how many operands the expression contains,
109 and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
110 by looking at an operand what kind of object it is. Instead, you must know
111 from its context---from the expression code of the containing expression.
112 For example, in an expression of code @code{subreg}, the first operand is
113 to be regarded as an expression and the second operand as an integer. In
114 an expression of code @code{plus}, there are two operands, both of which
115 are to be regarded as expressions. In a @code{symbol_ref} expression,
116 there is one operand, which is to be regarded as a string.
118 Expressions are written as parentheses containing the name of the
119 expression type, its flags and machine mode if any, and then the operands
120 of the expression (separated by spaces).
122 Expression code names in the @samp{md} file are written in lowercase,
123 but when they appear in C code they are written in uppercase. In this
124 manual, they are shown as follows: @code{const_int}.
128 In a few contexts a null pointer is valid where an expression is normally
129 wanted. The written form of this is @code{(nil)}.
132 @section RTL Classes and Formats
134 @cindex classes of RTX codes
135 @cindex RTX codes, classes of
136 @findex GET_RTX_CLASS
138 The various expression codes are divided into several @dfn{classes},
139 which are represented by single characters. You can determine the class
140 of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
141 Currently, @file{rtl.def} defines these classes:
145 An RTX code that represents an actual object, such as a register
146 (@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
147 @code{LO_SUM}) is also included; instead, @code{SUBREG} and
148 @code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
151 An RTX code that represents a constant object. @code{HIGH} is also
152 included in this class.
155 An RTX code for a non-symmetric comparison, such as @code{GEU} or
158 @item RTX_COMM_COMPARE
159 An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
163 An RTX code for a unary arithmetic operation, such as @code{NEG},
164 @code{NOT}, or @code{ABS}. This category also includes value extension
165 (sign or zero) and conversions between integer and floating point.
168 An RTX code for a commutative binary operation, such as @code{PLUS} or
169 @code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class
173 An RTX code for a non-commutative binary operation, such as @code{MINUS},
174 @code{DIV}, or @code{ASHIFTRT}.
176 @item RTX_BITFIELD_OPS
177 An RTX code for a bit-field operation. Currently only
178 @code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs
179 and are lvalues (so they can be used for insertion as well).
183 An RTX code for other three input operations. Currently only
184 @code{IF_THEN_ELSE} and @code{VEC_MERGE}.
187 An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and
188 @code{CALL_INSN}. @xref{Insns}.
191 An RTX code for something that matches in insns, such as
192 @code{MATCH_DUP}. These only occur in machine descriptions.
195 An RTX code for an auto-increment addressing mode, such as
199 All other RTX codes. This category includes the remaining codes used
200 only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
201 all the codes describing side effects (@code{SET}, @code{USE},
202 @code{CLOBBER}, etc.) and the non-insns that may appear on an insn
203 chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
204 @code{SUBREG} is also part of this class.
208 For each expression code, @file{rtl.def} specifies the number of
209 contained objects and their kinds using a sequence of characters
210 called the @dfn{format} of the expression code. For example,
211 the format of @code{subreg} is @samp{ei}.
213 @cindex RTL format characters
214 These are the most commonly used format characters:
218 An expression (actually a pointer to an expression).
230 A vector of expressions.
233 A few other format characters are used occasionally:
237 @samp{u} is equivalent to @samp{e} except that it is printed differently
238 in debugging dumps. It is used for pointers to insns.
241 @samp{n} is equivalent to @samp{i} except that it is printed differently
242 in debugging dumps. It is used for the line number or code number of a
246 @samp{S} indicates a string which is optional. In the RTL objects in
247 core, @samp{S} is equivalent to @samp{s}, but when the object is read,
248 from an @samp{md} file, the string value of this operand may be omitted.
249 An omitted string is taken to be the null string.
252 @samp{V} indicates a vector which is optional. In the RTL objects in
253 core, @samp{V} is equivalent to @samp{E}, but when the object is read
254 from an @samp{md} file, the vector value of this operand may be omitted.
255 An omitted vector is effectively the same as a vector of no elements.
258 @samp{B} indicates a pointer to basic block structure.
261 @samp{0} means a slot whose contents do not fit any normal category.
262 @samp{0} slots are not printed at all in dumps, and are often used in
263 special ways by small parts of the compiler.
266 There are macros to get the number of operands and the format
267 of an expression code:
270 @findex GET_RTX_LENGTH
271 @item GET_RTX_LENGTH (@var{code})
272 Number of operands of an RTX of code @var{code}.
274 @findex GET_RTX_FORMAT
275 @item GET_RTX_FORMAT (@var{code})
276 The format of an RTX of code @var{code}, as a C string.
279 Some classes of RTX codes always have the same format. For example, it
280 is safe to assume that all comparison operations have format @code{ee}.
284 All codes of this class have format @code{e}.
289 All codes of these classes have format @code{ee}.
293 All codes of these classes have format @code{eee}.
296 All codes of this class have formats that begin with @code{iuueiee}.
297 @xref{Insns}. Note that not all RTL objects linked onto an insn chain
298 are of class @code{i}.
303 You can make no assumptions about the format of these codes.
307 @section Access to Operands
309 @cindex access to operands
310 @cindex operand access
316 Operands of expressions are accessed using the macros @code{XEXP},
317 @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
318 two arguments: an expression-pointer (RTX) and an operand number
319 (counting from zero). Thus,
326 accesses operand 2 of expression @var{x}, as an expression.
333 accesses the same operand as an integer. @code{XSTR}, used in the same
334 fashion, would access it as a string.
336 Any operand can be accessed as an integer, as an expression or as a string.
337 You must choose the correct method of access for the kind of value actually
338 stored in the operand. You would do this based on the expression code of
339 the containing expression. That is also how you would know how many
342 For example, if @var{x} is a @code{subreg} expression, you know that it has
343 two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
344 and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
345 would get the address of the expression operand but cast as an integer;
346 that might occasionally be useful, but it would be cleaner to write
347 @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
348 compile without error, and would return the second, integer operand cast as
349 an expression pointer, which would probably result in a crash when
350 accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
351 but this will access memory past the end of the expression with
352 unpredictable results.
354 Access to operands which are vectors is more complicated. You can use the
355 macro @code{XVEC} to get the vector-pointer itself, or the macros
356 @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
361 @item XVEC (@var{exp}, @var{idx})
362 Access the vector-pointer which is operand number @var{idx} in @var{exp}.
365 @item XVECLEN (@var{exp}, @var{idx})
366 Access the length (number of elements) in the vector which is
367 in operand number @var{idx} in @var{exp}. This value is an @code{int}.
370 @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
371 Access element number @var{eltnum} in the vector which is
372 in operand number @var{idx} in @var{exp}. This value is an RTX@.
374 It is up to you to make sure that @var{eltnum} is not negative
375 and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
378 All the macros defined in this section expand into lvalues and therefore
379 can be used to assign the operands, lengths and vector elements as well as
382 @node Special Accessors
383 @section Access to Special Operands
384 @cindex access to special operands
386 Some RTL nodes have special annotations associated with them.
391 @findex MEM_ALIAS_SET
392 @item MEM_ALIAS_SET (@var{x})
393 If 0, @var{x} is not in any alias set, and may alias anything. Otherwise,
394 @var{x} can only alias @code{MEM}s in a conflicting alias set. This value
395 is set in a language-dependent manner in the front-end, and should not be
396 altered in the back-end. In some front-ends, these numbers may correspond
397 in some way to types, or other language-level entities, but they need not,
398 and the back-end makes no such assumptions.
399 These set numbers are tested with @code{alias_sets_conflict_p}.
402 @item MEM_EXPR (@var{x})
403 If this register is known to hold the value of some user-level
404 declaration, this is that tree node. It may also be a
405 @code{COMPONENT_REF}, in which case this is some field reference,
406 and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration,
407 or another @code{COMPONENT_REF}, or null if there is no compile-time
408 object associated with the reference.
411 @item MEM_OFFSET (@var{x})
412 The offset from the start of @code{MEM_EXPR} as a @code{CONST_INT} rtx.
415 @item MEM_SIZE (@var{x})
416 The size in bytes of the memory reference as a @code{CONST_INT} rtx.
417 This is mostly relevant for @code{BLKmode} references as otherwise
418 the size is implied by the mode.
421 @item MEM_ALIGN (@var{x})
422 The known alignment in bits of the memory reference.
427 @findex ORIGINAL_REGNO
428 @item ORIGINAL_REGNO (@var{x})
429 This field holds the number the register ``originally'' had; for a
430 pseudo register turned into a hard reg this will hold the old pseudo
434 @item REG_EXPR (@var{x})
435 If this register is known to hold the value of some user-level
436 declaration, this is that tree node.
439 @item REG_OFFSET (@var{x})
440 If this register is known to hold the value of some user-level
441 declaration, this is the offset into that logical storage.
446 @findex SYMBOL_REF_DECL
447 @item SYMBOL_REF_DECL (@var{x})
448 If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or
449 a @code{FUNCTION_DECL}, that tree is recorded here. If this value is
450 null, then @var{x} was created by back end code generation routines,
451 and there is no associated front end symbol table entry.
453 @code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'},
454 that is, some sort of constant. In this case, the @code{symbol_ref}
455 is an entry in the per-file constant pool; again, there is no associated
456 front end symbol table entry.
458 @findex SYMBOL_REF_CONSTANT
459 @item SYMBOL_REF_CONSTANT (@var{x})
460 If @samp{CONSTANT_POOL_ADDRESS_P (@var{x})} is true, this is the constant
461 pool entry for @var{x}. It is null otherwise.
463 @findex SYMBOL_REF_DATA
464 @item SYMBOL_REF_DATA (@var{x})
465 A field of opaque type used to store @code{SYMBOL_REF_DECL} or
466 @code{SYMBOL_REF_CONSTANT}.
468 @findex SYMBOL_REF_FLAGS
469 @item SYMBOL_REF_FLAGS (@var{x})
470 In a @code{symbol_ref}, this is used to communicate various predicates
471 about the symbol. Some of these are common enough to be computed by
472 common code, some are specific to the target. The common bits are:
475 @findex SYMBOL_REF_FUNCTION_P
476 @findex SYMBOL_FLAG_FUNCTION
477 @item SYMBOL_FLAG_FUNCTION
478 Set if the symbol refers to a function.
480 @findex SYMBOL_REF_LOCAL_P
481 @findex SYMBOL_FLAG_LOCAL
482 @item SYMBOL_FLAG_LOCAL
483 Set if the symbol is local to this ``module''.
484 See @code{TARGET_BINDS_LOCAL_P}.
486 @findex SYMBOL_REF_EXTERNAL_P
487 @findex SYMBOL_FLAG_EXTERNAL
488 @item SYMBOL_FLAG_EXTERNAL
489 Set if this symbol is not defined in this translation unit.
490 Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}.
492 @findex SYMBOL_REF_SMALL_P
493 @findex SYMBOL_FLAG_SMALL
494 @item SYMBOL_FLAG_SMALL
495 Set if the symbol is located in the small data section.
496 See @code{TARGET_IN_SMALL_DATA_P}.
498 @findex SYMBOL_FLAG_TLS_SHIFT
499 @findex SYMBOL_REF_TLS_MODEL
500 @item SYMBOL_REF_TLS_MODEL (@var{x})
501 This is a multi-bit field accessor that returns the @code{tls_model}
502 to be used for a thread-local storage symbol. It returns zero for
503 non-thread-local symbols.
505 @findex SYMBOL_REF_HAS_BLOCK_INFO_P
506 @findex SYMBOL_FLAG_HAS_BLOCK_INFO
507 @item SYMBOL_FLAG_HAS_BLOCK_INFO
508 Set if the symbol has @code{SYMBOL_REF_BLOCK} and
509 @code{SYMBOL_REF_BLOCK_OFFSET} fields.
511 @findex SYMBOL_REF_ANCHOR_P
512 @findex SYMBOL_FLAG_ANCHOR
513 @cindex @option{-fsection-anchors}
514 @item SYMBOL_FLAG_ANCHOR
515 Set if the symbol is used as a section anchor. ``Section anchors''
516 are symbols that have a known position within an @code{object_block}
517 and that can be used to access nearby members of that block.
518 They are used to implement @option{-fsection-anchors}.
520 If this flag is set, then @code{SYMBOL_FLAG_HAS_BLOCK_INFO} will be too.
523 Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for
527 @findex SYMBOL_REF_BLOCK
528 @item SYMBOL_REF_BLOCK (@var{x})
529 If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the
530 @samp{object_block} structure to which the symbol belongs,
531 or @code{NULL} if it has not been assigned a block.
533 @findex SYMBOL_REF_BLOCK_OFFSET
534 @item SYMBOL_REF_BLOCK_OFFSET (@var{x})
535 If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the offset of @var{x}
536 from the first object in @samp{SYMBOL_REF_BLOCK (@var{x})}. The value is
537 negative if @var{x} has not yet been assigned to a block, or it has not
538 been given an offset within that block.
542 @section Flags in an RTL Expression
543 @cindex flags in RTL expression
545 RTL expressions contain several flags (one-bit bit-fields)
546 that are used in certain types of expression. Most often they
547 are accessed with the following macros, which expand into lvalues.
550 @findex CONSTANT_POOL_ADDRESS_P
551 @cindex @code{symbol_ref} and @samp{/u}
552 @cindex @code{unchanging}, in @code{symbol_ref}
553 @item CONSTANT_POOL_ADDRESS_P (@var{x})
554 Nonzero in a @code{symbol_ref} if it refers to part of the current
555 function's constant pool. For most targets these addresses are in a
556 @code{.rodata} section entirely separate from the function, but for
557 some targets the addresses are close to the beginning of the function.
558 In either case GCC assumes these addresses can be addressed directly,
559 perhaps with the help of base registers.
560 Stored in the @code{unchanging} field and printed as @samp{/u}.
562 @findex CONST_OR_PURE_CALL_P
563 @cindex @code{call_insn} and @samp{/u}
564 @cindex @code{unchanging}, in @code{call_insn}
565 @item CONST_OR_PURE_CALL_P (@var{x})
566 In a @code{call_insn}, @code{note}, or an @code{expr_list} for notes,
567 indicates that the insn represents a call to a const or pure function.
568 Stored in the @code{unchanging} field and printed as @samp{/u}.
570 @findex INSN_ANNULLED_BRANCH_P
571 @cindex @code{jump_insn} and @samp{/u}
572 @cindex @code{call_insn} and @samp{/u}
573 @cindex @code{insn} and @samp{/u}
574 @cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn}
575 @item INSN_ANNULLED_BRANCH_P (@var{x})
576 In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates
577 that the branch is an annulling one. See the discussion under
578 @code{sequence} below. Stored in the @code{unchanging} field and
579 printed as @samp{/u}.
581 @findex INSN_DELETED_P
582 @cindex @code{insn} and @samp{/v}
583 @cindex @code{call_insn} and @samp{/v}
584 @cindex @code{jump_insn} and @samp{/v}
585 @cindex @code{code_label} and @samp{/v}
586 @cindex @code{barrier} and @samp{/v}
587 @cindex @code{note} and @samp{/v}
588 @cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{barrier}, and @code{note}
589 @item INSN_DELETED_P (@var{x})
590 In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
591 @code{barrier}, or @code{note},
592 nonzero if the insn has been deleted. Stored in the
593 @code{volatil} field and printed as @samp{/v}.
595 @findex INSN_FROM_TARGET_P
596 @cindex @code{insn} and @samp{/s}
597 @cindex @code{jump_insn} and @samp{/s}
598 @cindex @code{call_insn} and @samp{/s}
599 @cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn}
600 @item INSN_FROM_TARGET_P (@var{x})
601 In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay
602 slot of a branch, indicates that the insn
603 is from the target of the branch. If the branch insn has
604 @code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
605 the branch is taken. For annulled branches with
606 @code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
607 branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set,
608 this insn will always be executed. Stored in the @code{in_struct}
609 field and printed as @samp{/s}.
611 @findex LABEL_PRESERVE_P
612 @cindex @code{code_label} and @samp{/i}
613 @cindex @code{note} and @samp{/i}
614 @cindex @code{in_struct}, in @code{code_label} and @code{note}
615 @item LABEL_PRESERVE_P (@var{x})
616 In a @code{code_label} or @code{note}, indicates that the label is referenced by
617 code or data not visible to the RTL of a given function.
618 Labels referenced by a non-local goto will have this bit set. Stored
619 in the @code{in_struct} field and printed as @samp{/s}.
621 @findex LABEL_REF_NONLOCAL_P
622 @cindex @code{label_ref} and @samp{/v}
623 @cindex @code{reg_label} and @samp{/v}
624 @cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
625 @item LABEL_REF_NONLOCAL_P (@var{x})
626 In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
627 a reference to a non-local label.
628 Stored in the @code{volatil} field and printed as @samp{/v}.
630 @findex MEM_IN_STRUCT_P
631 @cindex @code{mem} and @samp{/s}
632 @cindex @code{in_struct}, in @code{mem}
633 @item MEM_IN_STRUCT_P (@var{x})
634 In @code{mem} expressions, nonzero for reference to an entire structure,
635 union or array, or to a component of one. Zero for references to a
636 scalar variable or through a pointer to a scalar. If both this flag and
637 @code{MEM_SCALAR_P} are clear, then we don't know whether this @code{mem}
638 is in a structure or not. Both flags should never be simultaneously set.
639 Stored in the @code{in_struct} field and printed as @samp{/s}.
641 @findex MEM_KEEP_ALIAS_SET_P
642 @cindex @code{mem} and @samp{/j}
643 @cindex @code{jump}, in @code{mem}
644 @item MEM_KEEP_ALIAS_SET_P (@var{x})
645 In @code{mem} expressions, 1 if we should keep the alias set for this
646 mem unchanged when we access a component. Set to 1, for example, when we
647 are already in a non-addressable component of an aggregate.
648 Stored in the @code{jump} field and printed as @samp{/j}.
651 @cindex @code{mem} and @samp{/f}
652 @cindex @code{frame_related}, in @code{mem}
653 @item MEM_SCALAR_P (@var{x})
654 In @code{mem} expressions, nonzero for reference to a scalar known not
655 to be a member of a structure, union, or array. Zero for such
656 references and for indirections through pointers, even pointers pointing
657 to scalar types. If both this flag and @code{MEM_IN_STRUCT_P} are clear,
658 then we don't know whether this @code{mem} is in a structure or not.
659 Both flags should never be simultaneously set.
660 Stored in the @code{frame_related} field and printed as @samp{/f}.
662 @findex MEM_VOLATILE_P
663 @cindex @code{mem} and @samp{/v}
664 @cindex @code{asm_input} and @samp{/v}
665 @cindex @code{asm_operands} and @samp{/v}
666 @cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input}
667 @item MEM_VOLATILE_P (@var{x})
668 In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions,
669 nonzero for volatile memory references.
670 Stored in the @code{volatil} field and printed as @samp{/v}.
673 @cindex @code{mem} and @samp{/c}
674 @cindex @code{call}, in @code{mem}
675 @item MEM_NOTRAP_P (@var{x})
676 In @code{mem}, nonzero for memory references that will not trap.
677 Stored in the @code{call} field and printed as @samp{/c}.
679 @findex REG_FUNCTION_VALUE_P
680 @cindex @code{reg} and @samp{/i}
681 @cindex @code{integrated}, in @code{reg}
682 @item REG_FUNCTION_VALUE_P (@var{x})
683 Nonzero in a @code{reg} if it is the place in which this function's
684 value is going to be returned. (This happens only in a hard
685 register.) Stored in the @code{integrated} field and printed as
689 @cindex @code{reg} and @samp{/f}
690 @cindex @code{frame_related}, in @code{reg}
691 @item REG_POINTER (@var{x})
692 Nonzero in a @code{reg} if the register holds a pointer. Stored in the
693 @code{frame_related} field and printed as @samp{/f}.
695 @findex REG_USERVAR_P
696 @cindex @code{reg} and @samp{/v}
697 @cindex @code{volatil}, in @code{reg}
698 @item REG_USERVAR_P (@var{x})
699 In a @code{reg}, nonzero if it corresponds to a variable present in
700 the user's source code. Zero for temporaries generated internally by
701 the compiler. Stored in the @code{volatil} field and printed as
704 The same hard register may be used also for collecting the values of
705 functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
708 @findex RTX_FRAME_RELATED_P
709 @cindex @code{insn} and @samp{/f}
710 @cindex @code{call_insn} and @samp{/f}
711 @cindex @code{jump_insn} and @samp{/f}
712 @cindex @code{barrier} and @samp{/f}
713 @cindex @code{set} and @samp{/f}
714 @cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set}
715 @item RTX_FRAME_RELATED_P (@var{x})
716 Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
717 @code{barrier}, or @code{set} which is part of a function prologue
718 and sets the stack pointer, sets the frame pointer, or saves a register.
719 This flag should also be set on an instruction that sets up a temporary
720 register to use in place of the frame pointer.
721 Stored in the @code{frame_related} field and printed as @samp{/f}.
723 In particular, on RISC targets where there are limits on the sizes of
724 immediate constants, it is sometimes impossible to reach the register
725 save area directly from the stack pointer. In that case, a temporary
726 register is used that is near enough to the register save area, and the
727 Canonical Frame Address, i.e., DWARF2's logical frame pointer, register
728 must (temporarily) be changed to be this temporary register. So, the
729 instruction that sets this temporary register must be marked as
730 @code{RTX_FRAME_RELATED_P}.
732 If the marked instruction is overly complex (defined in terms of what
733 @code{dwarf2out_frame_debug_expr} can handle), you will also have to
734 create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
735 instruction. This note should contain a simple expression of the
736 computation performed by this instruction, i.e., one that
737 @code{dwarf2out_frame_debug_expr} can handle.
739 This flag is required for exception handling support on targets with RTL
742 @cindex @code{insn} and @samp{/i}
743 @cindex @code{call_insn} and @samp{/i}
744 @cindex @code{jump_insn} and @samp{/i}
745 @cindex @code{barrier} and @samp{/i}
746 @cindex @code{code_label} and @samp{/i}
747 @cindex @code{insn_list} and @samp{/i}
748 @cindex @code{const} and @samp{/i}
749 @cindex @code{note} and @samp{/i}
750 @cindex @code{integrated}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, @code{code_label}, @code{insn_list}, @code{const}, and @code{note}
751 @code{code_label}, @code{insn_list}, @code{const}, or @code{note} if it
752 resulted from an in-line function call.
753 Stored in the @code{integrated} field and printed as @samp{/i}.
755 @findex MEM_READONLY_P
756 @cindex @code{mem} and @samp{/u}
757 @cindex @code{unchanging}, in @code{mem}
758 @item MEM_READONLY_P (@var{x})
759 Nonzero in a @code{mem}, if the memory is statically allocated and read-only.
761 Read-only in this context means never modified during the lifetime of the
762 program, not necessarily in ROM or in write-disabled pages. A common
763 example of the later is a shared library's global offset table. This
764 table is initialized by the runtime loader, so the memory is technically
765 writable, but after control is transfered from the runtime loader to the
766 application, this memory will never be subsequently modified.
768 Stored in the @code{unchanging} field and printed as @samp{/u}.
770 @findex SCHED_GROUP_P
771 @cindex @code{insn} and @samp{/s}
772 @cindex @code{call_insn} and @samp{/s}
773 @cindex @code{jump_insn} and @samp{/s}
774 @cindex @code{in_struct}, in @code{insn}, @code{jump_insn} and @code{call_insn}
775 @item SCHED_GROUP_P (@var{x})
776 During instruction scheduling, in an @code{insn}, @code{call_insn} or
777 @code{jump_insn}, indicates that the
778 previous insn must be scheduled together with this insn. This is used to
779 ensure that certain groups of instructions will not be split up by the
780 instruction scheduling pass, for example, @code{use} insns before
781 a @code{call_insn} may not be separated from the @code{call_insn}.
782 Stored in the @code{in_struct} field and printed as @samp{/s}.
784 @findex SET_IS_RETURN_P
785 @cindex @code{insn} and @samp{/j}
786 @cindex @code{jump}, in @code{insn}
787 @item SET_IS_RETURN_P (@var{x})
788 For a @code{set}, nonzero if it is for a return.
789 Stored in the @code{jump} field and printed as @samp{/j}.
791 @findex SIBLING_CALL_P
792 @cindex @code{call_insn} and @samp{/j}
793 @cindex @code{jump}, in @code{call_insn}
794 @item SIBLING_CALL_P (@var{x})
795 For a @code{call_insn}, nonzero if the insn is a sibling call.
796 Stored in the @code{jump} field and printed as @samp{/j}.
798 @findex STRING_POOL_ADDRESS_P
799 @cindex @code{symbol_ref} and @samp{/f}
800 @cindex @code{frame_related}, in @code{symbol_ref}
801 @item STRING_POOL_ADDRESS_P (@var{x})
802 For a @code{symbol_ref} expression, nonzero if it addresses this function's
803 string constant pool.
804 Stored in the @code{frame_related} field and printed as @samp{/f}.
806 @findex SUBREG_PROMOTED_UNSIGNED_P
807 @cindex @code{subreg} and @samp{/u} and @samp{/v}
808 @cindex @code{unchanging}, in @code{subreg}
809 @cindex @code{volatil}, in @code{subreg}
810 @item SUBREG_PROMOTED_UNSIGNED_P (@var{x})
811 Returns a value greater then zero for a @code{subreg} that has
812 @code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
813 zero-extended, zero if it is kept sign-extended, and less then zero if it is
814 extended some other way via the @code{ptr_extend} instruction.
815 Stored in the @code{unchanging}
816 field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
817 This macro may only be used to get the value it may not be used to change
818 the value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
820 @findex SUBREG_PROMOTED_UNSIGNED_SET
821 @cindex @code{subreg} and @samp{/u}
822 @cindex @code{unchanging}, in @code{subreg}
823 @cindex @code{volatil}, in @code{subreg}
824 @item SUBREG_PROMOTED_UNSIGNED_SET (@var{x})
825 Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
826 to reflect zero, sign, or other extension. If @code{volatil} is
827 zero, then @code{unchanging} as nonzero means zero extension and as
828 zero means sign extension. If @code{volatil} is nonzero then some
829 other type of extension was done via the @code{ptr_extend} instruction.
831 @findex SUBREG_PROMOTED_VAR_P
832 @cindex @code{subreg} and @samp{/s}
833 @cindex @code{in_struct}, in @code{subreg}
834 @item SUBREG_PROMOTED_VAR_P (@var{x})
835 Nonzero in a @code{subreg} if it was made when accessing an object that
836 was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
837 description macro (@pxref{Storage Layout}). In this case, the mode of
838 the @code{subreg} is the declared mode of the object and the mode of
839 @code{SUBREG_REG} is the mode of the register that holds the object.
840 Promoted variables are always either sign- or zero-extended to the wider
841 mode on every assignment. Stored in the @code{in_struct} field and
842 printed as @samp{/s}.
844 @findex SYMBOL_REF_USED
845 @cindex @code{used}, in @code{symbol_ref}
846 @item SYMBOL_REF_USED (@var{x})
847 In a @code{symbol_ref}, indicates that @var{x} has been used. This is
848 normally only used to ensure that @var{x} is only declared external
849 once. Stored in the @code{used} field.
851 @findex SYMBOL_REF_WEAK
852 @cindex @code{symbol_ref} and @samp{/i}
853 @cindex @code{integrated}, in @code{symbol_ref}
854 @item SYMBOL_REF_WEAK (@var{x})
855 In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
856 Stored in the @code{integrated} field and printed as @samp{/i}.
858 @findex SYMBOL_REF_FLAG
859 @cindex @code{symbol_ref} and @samp{/v}
860 @cindex @code{volatil}, in @code{symbol_ref}
861 @item SYMBOL_REF_FLAG (@var{x})
862 In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
863 Stored in the @code{volatil} field and printed as @samp{/v}.
865 Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
866 by @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS}
867 is mandatory if the target requires more than one bit of storage.
870 These are the fields to which the above macros refer:
874 @cindex @samp{/c} in RTL dump
876 In a @code{mem}, 1 means that the memory reference will not trap.
878 In an RTL dump, this flag is represented as @samp{/c}.
880 @findex frame_related
881 @cindex @samp{/f} in RTL dump
883 In an @code{insn} or @code{set} expression, 1 means that it is part of
884 a function prologue and sets the stack pointer, sets the frame pointer,
885 saves a register, or sets up a temporary register to use in place of the
888 In @code{reg} expressions, 1 means that the register holds a pointer.
890 In @code{symbol_ref} expressions, 1 means that the reference addresses
891 this function's string constant pool.
893 In @code{mem} expressions, 1 means that the reference is to a scalar.
895 In an RTL dump, this flag is represented as @samp{/f}.
898 @cindex @samp{/s} in RTL dump
900 In @code{mem} expressions, it is 1 if the memory datum referred to is
901 all or part of a structure or array; 0 if it is (or might be) a scalar
902 variable. A reference through a C pointer has 0 because the pointer
903 might point to a scalar variable. This information allows the compiler
904 to determine something about possible cases of aliasing.
906 In @code{reg} expressions, it is 1 if the register has its entire life
907 contained within the test expression of some loop.
909 In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
910 an object that has had its mode promoted from a wider mode.
912 In @code{label_ref} expressions, 1 means that the referenced label is
913 outside the innermost loop containing the insn in which the @code{label_ref}
916 In @code{code_label} expressions, it is 1 if the label may never be deleted.
917 This is used for labels which are the target of non-local gotos. Such a
918 label that would have been deleted is replaced with a @code{note} of type
919 @code{NOTE_INSN_DELETED_LABEL}.
921 In an @code{insn} during dead-code elimination, 1 means that the insn is
924 In an @code{insn} or @code{jump_insn} during reorg for an insn in the
925 delay slot of a branch,
926 1 means that this insn is from the target of the branch.
928 In an @code{insn} during instruction scheduling, 1 means that this insn
929 must be scheduled as part of a group together with the previous insn.
931 In an RTL dump, this flag is represented as @samp{/s}.
934 @cindex @samp{/i} in RTL dump
936 In an @code{insn}, @code{insn_list}, or @code{const}, 1 means the RTL was
937 produced by procedure integration.
939 In @code{reg} expressions, 1 means the register contains
940 the value to be returned by the current function. On
941 machines that pass parameters in registers, the same register number
942 may be used for parameters as well, but this flag is not set on such
945 In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
947 In an RTL dump, this flag is represented as @samp{/i}.
950 @cindex @samp{/j} in RTL dump
952 In a @code{mem} expression, 1 means we should keep the alias set for this
953 mem unchanged when we access a component.
955 In a @code{set}, 1 means it is for a return.
957 In a @code{call_insn}, 1 means it is a sibling call.
959 In an RTL dump, this flag is represented as @samp{/j}.
962 @cindex @samp{/u} in RTL dump
964 In @code{reg} and @code{mem} expressions, 1 means
965 that the value of the expression never changes.
967 In @code{subreg} expressions, it is 1 if the @code{subreg} references an
968 unsigned object whose mode has been promoted to a wider mode.
970 In an @code{insn} or @code{jump_insn} in the delay slot of a branch
971 instruction, 1 means an annulling branch should be used.
973 In a @code{symbol_ref} expression, 1 means that this symbol addresses
974 something in the per-function constant pool.
976 In a @code{call_insn}, @code{note}, or an @code{expr_list} of notes,
977 1 means that this instruction is a call to a const or pure function.
979 In an RTL dump, this flag is represented as @samp{/u}.
983 This flag is used directly (without an access macro) at the end of RTL
984 generation for a function, to count the number of times an expression
985 appears in insns. Expressions that appear more than once are copied,
986 according to the rules for shared structure (@pxref{Sharing}).
988 For a @code{reg}, it is used directly (without an access macro) by the
989 leaf register renumbering code to ensure that each register is only
992 In a @code{symbol_ref}, it indicates that an external declaration for
993 the symbol has already been written.
996 @cindex @samp{/v} in RTL dump
998 @cindex volatile memory references
999 In a @code{mem}, @code{asm_operands}, or @code{asm_input}
1000 expression, it is 1 if the memory
1001 reference is volatile. Volatile memory references may not be deleted,
1002 reordered or combined.
1004 In a @code{symbol_ref} expression, it is used for machine-specific
1007 In a @code{reg} expression, it is 1 if the value is a user-level variable.
1008 0 indicates an internal compiler temporary.
1010 In an @code{insn}, 1 means the insn has been deleted.
1012 In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
1013 to a non-local label.
1015 In an RTL dump, this flag is represented as @samp{/v}.
1019 @section Machine Modes
1020 @cindex machine modes
1022 @findex enum machine_mode
1023 A machine mode describes a size of data object and the representation used
1024 for it. In the C code, machine modes are represented by an enumeration
1025 type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
1026 expression has room for a machine mode and so do certain kinds of tree
1027 expressions (declarations and types, to be precise).
1029 In debugging dumps and machine descriptions, the machine mode of an RTL
1030 expression is written after the expression code with a colon to separate
1031 them. The letters @samp{mode} which appear at the end of each machine mode
1032 name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
1033 expression with machine mode @code{SImode}. If the mode is
1034 @code{VOIDmode}, it is not written at all.
1036 Here is a table of machine modes. The term ``byte'' below refers to an
1037 object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
1042 ``Bit'' mode represents a single bit, for predicate registers.
1046 ``Quarter-Integer'' mode represents a single byte treated as an integer.
1050 ``Half-Integer'' mode represents a two-byte integer.
1054 ``Partial Single Integer'' mode represents an integer which occupies
1055 four bytes but which doesn't really use all four. On some machines,
1056 this is the right mode to use for pointers.
1060 ``Single Integer'' mode represents a four-byte integer.
1064 ``Partial Double Integer'' mode represents an integer which occupies
1065 eight bytes but which doesn't really use all eight. On some machines,
1066 this is the right mode to use for certain pointers.
1070 ``Double Integer'' mode represents an eight-byte integer.
1074 ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
1078 ``Octa Integer'' (?) mode represents a thirty-two-byte integer.
1082 ``Quarter-Floating'' mode represents a quarter-precision (single byte)
1083 floating point number.
1087 ``Half-Floating'' mode represents a half-precision (two byte) floating
1092 ``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision
1093 (three byte) floating point number.
1097 ``Single Floating'' mode represents a four byte floating point number.
1098 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1099 this is a single-precision IEEE floating point number; it can also be
1100 used for double-precision (on processors with 16-bit bytes) and
1101 single-precision VAX and IBM types.
1105 ``Double Floating'' mode represents an eight byte floating point number.
1106 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1107 this is a double-precision IEEE floating point number.
1111 ``Extended Floating'' mode represents an IEEE extended floating point
1112 number. This mode only has 80 meaningful bits (ten bytes). Some
1113 processors require such numbers to be padded to twelve bytes, others
1114 to sixteen; this mode is used for either.
1118 ``Single Decimal Floating'' mode represents a four byte decimal
1119 floating point number (as distinct from conventional binary floating
1124 ``Double Decimal Floating'' mode represents an eight byte decimal
1125 floating point number.
1129 ``Tetra Decimal Floating'' mode represents a sixteen byte decimal
1130 floating point number all 128 of whose bits are meaningful.
1134 ``Tetra Floating'' mode represents a sixteen byte floating point number
1135 all 128 of whose bits are meaningful. One common use is the
1136 IEEE quad-precision format.
1140 ``Quarter-Fractional'' mode represents a single byte treated as a signed
1141 fractional number. The default format is ``s.7''.
1145 ``Half-Fractional'' mode represents a two-byte signed fractional number.
1146 The default format is ``s.15''.
1150 ``Single Fractional'' mode represents a four-byte signed fractional number.
1151 The default format is ``s.31''.
1155 ``Double Fractional'' mode represents an eight-byte signed fractional number.
1156 The default format is ``s.63''.
1160 ``Tetra Fractional'' mode represents a sixteen-byte signed fractional number.
1161 The default format is ``s.127''.
1165 ``Unsigned Quarter-Fractional'' mode represents a single byte treated as an
1166 unsigned fractional number. The default format is ``.8''.
1170 ``Unsigned Half-Fractional'' mode represents a two-byte unsigned fractional
1171 number. The default format is ``.16''.
1175 ``Unsigned Single Fractional'' mode represents a four-byte unsigned fractional
1176 number. The default format is ``.32''.
1180 ``Unsigned Double Fractional'' mode represents an eight-byte unsigned
1181 fractional number. The default format is ``.64''.
1185 ``Unsigned Tetra Fractional'' mode represents a sixteen-byte unsigned
1186 fractional number. The default format is ``.128''.
1190 ``Half-Accumulator'' mode represents a two-byte signed accumulator.
1191 The default format is ``s8.7''.
1195 ``Single Accumulator'' mode represents a four-byte signed accumulator.
1196 The default format is ``s16.15''.
1200 ``Double Accumulator'' mode represents an eight-byte signed accumulator.
1201 The default format is ``s32.31''.
1205 ``Tetra Accumulator'' mode represents a sixteen-byte signed accumulator.
1206 The default format is ``s64.63''.
1210 ``Unsigned Half-Accumulator'' mode represents a two-byte unsigned accumulator.
1211 The default format is ``8.8''.
1215 ``Unsigned Single Accumulator'' mode represents a four-byte unsigned
1216 accumulator. The default format is ``16.16''.
1220 ``Unsigned Double Accumulator'' mode represents an eight-byte unsigned
1221 accumulator. The default format is ``32.32''.
1225 ``Unsigned Tetra Accumulator'' mode represents a sixteen-byte unsigned
1226 accumulator. The default format is ``64.64''.
1230 ``Condition Code'' mode represents the value of a condition code, which
1231 is a machine-specific set of bits used to represent the result of a
1232 comparison operation. Other machine-specific modes may also be used for
1233 the condition code. These modes are not used on machines that use
1234 @code{cc0} (see @pxref{Condition Code}).
1238 ``Block'' mode represents values that are aggregates to which none of
1239 the other modes apply. In RTL, only memory references can have this mode,
1240 and only if they appear in string-move or vector instructions. On machines
1241 which have no such instructions, @code{BLKmode} will not appear in RTL@.
1245 Void mode means the absence of a mode or an unspecified mode.
1246 For example, RTL expressions of code @code{const_int} have mode
1247 @code{VOIDmode} because they can be taken to have whatever mode the context
1248 requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
1249 the absence of any mode.
1257 @item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode
1258 These modes stand for a complex number represented as a pair of floating
1259 point values. The floating point values are in @code{QFmode},
1260 @code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
1261 @code{TFmode}, respectively.
1269 @item CQImode, CHImode, CSImode, CDImode, CTImode, COImode
1270 These modes stand for a complex number represented as a pair of integer
1271 values. The integer values are in @code{QImode}, @code{HImode},
1272 @code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
1276 The machine description defines @code{Pmode} as a C macro which expands
1277 into the machine mode used for addresses. Normally this is the mode
1278 whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
1280 The only modes which a machine description @i{must} support are
1281 @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
1282 @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
1283 The compiler will attempt to use @code{DImode} for 8-byte structures and
1284 unions, but this can be prevented by overriding the definition of
1285 @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
1286 use @code{TImode} for 16-byte structures and unions. Likewise, you can
1287 arrange for the C type @code{short int} to avoid using @code{HImode}.
1289 @cindex mode classes
1290 Very few explicit references to machine modes remain in the compiler and
1291 these few references will soon be removed. Instead, the machine modes
1292 are divided into mode classes. These are represented by the enumeration
1293 type @code{enum mode_class} defined in @file{machmode.h}. The possible
1299 Integer modes. By default these are @code{BImode}, @code{QImode},
1300 @code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
1303 @findex MODE_PARTIAL_INT
1304 @item MODE_PARTIAL_INT
1305 The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
1306 @code{PSImode} and @code{PDImode}.
1310 Floating point modes. By default these are @code{QFmode},
1311 @code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
1312 @code{XFmode} and @code{TFmode}.
1314 @findex MODE_DECIMAL_FLOAT
1315 @item MODE_DECIMAL_FLOAT
1316 Decimal floating point modes. By default these are @code{SDmode},
1317 @code{DDmode} and @code{TDmode}.
1321 Signed fractional modes. By default these are @code{QQmode}, @code{HQmode},
1322 @code{SQmode}, @code{DQmode} and @code{TQmode}.
1326 Unsigned fractional modes. By default these are @code{UQQmode}, @code{UHQmode},
1327 @code{USQmode}, @code{UDQmode} and @code{UTQmode}.
1331 Signed accumulator modes. By default these are @code{HAmode},
1332 @code{SAmode}, @code{DAmode} and @code{TAmode}.
1336 Unsigned accumulator modes. By default these are @code{UHAmode},
1337 @code{USAmode}, @code{UDAmode} and @code{UTAmode}.
1339 @findex MODE_COMPLEX_INT
1340 @item MODE_COMPLEX_INT
1341 Complex integer modes. (These are not currently implemented).
1343 @findex MODE_COMPLEX_FLOAT
1344 @item MODE_COMPLEX_FLOAT
1345 Complex floating point modes. By default these are @code{QCmode},
1346 @code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
1349 @findex MODE_FUNCTION
1351 Algol or Pascal function variables including a static chain.
1352 (These are not currently implemented).
1356 Modes representing condition code values. These are @code{CCmode} plus
1357 any @code{CC_MODE} modes listed in the @file{@var{machine}-modes.def}.
1358 @xref{Jump Patterns},
1359 also see @ref{Condition Code}.
1363 This is a catchall mode class for modes which don't fit into the above
1364 classes. Currently @code{VOIDmode} and @code{BLKmode} are in
1368 Here are some C macros that relate to machine modes:
1372 @item GET_MODE (@var{x})
1373 Returns the machine mode of the RTX @var{x}.
1376 @item PUT_MODE (@var{x}, @var{newmode})
1377 Alters the machine mode of the RTX @var{x} to be @var{newmode}.
1379 @findex NUM_MACHINE_MODES
1380 @item NUM_MACHINE_MODES
1381 Stands for the number of machine modes available on the target
1382 machine. This is one greater than the largest numeric value of any
1385 @findex GET_MODE_NAME
1386 @item GET_MODE_NAME (@var{m})
1387 Returns the name of mode @var{m} as a string.
1389 @findex GET_MODE_CLASS
1390 @item GET_MODE_CLASS (@var{m})
1391 Returns the mode class of mode @var{m}.
1393 @findex GET_MODE_WIDER_MODE
1394 @item GET_MODE_WIDER_MODE (@var{m})
1395 Returns the next wider natural mode. For example, the expression
1396 @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
1398 @findex GET_MODE_SIZE
1399 @item GET_MODE_SIZE (@var{m})
1400 Returns the size in bytes of a datum of mode @var{m}.
1402 @findex GET_MODE_BITSIZE
1403 @item GET_MODE_BITSIZE (@var{m})
1404 Returns the size in bits of a datum of mode @var{m}.
1406 @findex GET_MODE_IBIT
1407 @item GET_MODE_IBIT (@var{m})
1408 Returns the number of integral bits of a datum of fixed-point mode @var{m}.
1410 @findex GET_MODE_FBIT
1411 @item GET_MODE_FBIT (@var{m})
1412 Returns the number of fractional bits of a datum of fixed-point mode @var{m}.
1414 @findex GET_MODE_MASK
1415 @item GET_MODE_MASK (@var{m})
1416 Returns a bitmask containing 1 for all bits in a word that fit within
1417 mode @var{m}. This macro can only be used for modes whose bitsize is
1418 less than or equal to @code{HOST_BITS_PER_INT}.
1420 @findex GET_MODE_ALIGNMENT
1421 @item GET_MODE_ALIGNMENT (@var{m})
1422 Return the required alignment, in bits, for an object of mode @var{m}.
1424 @findex GET_MODE_UNIT_SIZE
1425 @item GET_MODE_UNIT_SIZE (@var{m})
1426 Returns the size in bytes of the subunits of a datum of mode @var{m}.
1427 This is the same as @code{GET_MODE_SIZE} except in the case of complex
1428 modes. For them, the unit size is the size of the real or imaginary
1431 @findex GET_MODE_NUNITS
1432 @item GET_MODE_NUNITS (@var{m})
1433 Returns the number of units contained in a mode, i.e.,
1434 @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
1436 @findex GET_CLASS_NARROWEST_MODE
1437 @item GET_CLASS_NARROWEST_MODE (@var{c})
1438 Returns the narrowest mode in mode class @var{c}.
1443 The global variables @code{byte_mode} and @code{word_mode} contain modes
1444 whose classes are @code{MODE_INT} and whose bitsizes are either
1445 @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
1446 machines, these are @code{QImode} and @code{SImode}, respectively.
1449 @section Constant Expression Types
1450 @cindex RTL constants
1451 @cindex RTL constant expression types
1453 The simplest RTL expressions are those that represent constant values.
1457 @item (const_int @var{i})
1458 This type of expression represents the integer value @var{i}. @var{i}
1459 is customarily accessed with the macro @code{INTVAL} as in
1460 @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1462 Constants generated for modes with fewer bits than @code{HOST_WIDE_INT}
1463 must be sign extended to full width (e.g., with @code{gen_int_mode}).
1469 There is only one expression object for the integer value zero; it is
1470 the value of the variable @code{const0_rtx}. Likewise, the only
1471 expression for integer value one is found in @code{const1_rtx}, the only
1472 expression for integer value two is found in @code{const2_rtx}, and the
1473 only expression for integer value negative one is found in
1474 @code{constm1_rtx}. Any attempt to create an expression of code
1475 @code{const_int} and value zero, one, two or negative one will return
1476 @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
1477 @code{constm1_rtx} as appropriate.
1479 @findex const_true_rtx
1480 Similarly, there is only one object for the integer whose value is
1481 @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
1482 @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
1483 @code{const1_rtx} will point to the same object. If
1484 @code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
1485 @code{constm1_rtx} will point to the same object.
1487 @findex const_double
1488 @item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{})
1489 Represents either a floating-point constant of mode @var{m} or an
1490 integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
1491 bits but small enough to fit within twice that number of bits (GCC
1492 does not provide a mechanism to represent even larger constants). In
1493 the latter case, @var{m} will be @code{VOIDmode}.
1495 @findex const_vector
1496 @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
1497 Represents a vector constant. The square brackets stand for the vector
1498 containing the constant elements. @var{x0}, @var{x1} and so on are
1499 the @code{const_int} or @code{const_double} elements.
1501 The number of units in a @code{const_vector} is obtained with the macro
1502 @code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
1504 Individual elements in a vector constant are accessed with the macro
1505 @code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
1506 where @var{v} is the vector constant and @var{n} is the element
1509 @findex CONST_DOUBLE_MEM
1510 @findex CONST_DOUBLE_CHAIN
1511 @var{addr} is used to contain the @code{mem} expression that corresponds
1512 to the location in memory that at which the constant can be found. If
1513 it has not been allocated a memory location, but is on the chain of all
1514 @code{const_double} expressions in this compilation (maintained using an
1515 undisplayed field), @var{addr} contains @code{const0_rtx}. If it is not
1516 on the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is
1517 customarily accessed with the macro @code{CONST_DOUBLE_MEM} and the
1518 chain field via @code{CONST_DOUBLE_CHAIN}.
1520 @findex CONST_DOUBLE_LOW
1521 If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1522 @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
1523 @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
1525 If the constant is floating point (regardless of its precision), then
1526 the number of integers used to store the value depends on the size of
1527 @code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers
1528 represent a floating point number, but not precisely in the target
1529 machine's or host machine's floating point format. To convert them to
1530 the precise bit pattern used by the target machine, use the macro
1531 @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
1536 The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
1537 value 0 in mode @var{mode}. If mode @var{mode} is of mode class
1538 @code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of
1539 mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
1540 expression in mode @var{mode}. Otherwise, it returns a
1541 @code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro
1542 @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
1543 mode @var{mode} and similarly for @code{CONST2_RTX}. The
1544 @code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
1547 @findex const_string
1548 @item (const_string @var{str})
1549 Represents a constant string with value @var{str}. Currently this is
1550 used only for insn attributes (@pxref{Insn Attributes}) since constant
1551 strings in C are placed in memory.
1554 @item (symbol_ref:@var{mode} @var{symbol})
1555 Represents the value of an assembler label for data. @var{symbol} is
1556 a string that describes the name of the assembler label. If it starts
1557 with a @samp{*}, the label is the rest of @var{symbol} not including
1558 the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
1561 The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
1562 Usually that is the only mode for which a symbol is directly valid.
1565 @item (label_ref:@var{mode} @var{label})
1566 Represents the value of an assembler label for code. It contains one
1567 operand, an expression, which must be a @code{code_label} or a @code{note}
1568 of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
1569 sequence to identify the place where the label should go.
1571 The reason for using a distinct expression type for code label
1572 references is so that jump optimization can distinguish them.
1574 The @code{label_ref} contains a mode, which is usually @code{Pmode}.
1575 Usually that is the only mode for which a label is directly valid.
1577 @item (const:@var{m} @var{exp})
1578 Represents a constant that is the result of an assembly-time
1579 arithmetic computation. The operand, @var{exp}, is an expression that
1580 contains only constants (@code{const_int}, @code{symbol_ref} and
1581 @code{label_ref} expressions) combined with @code{plus} and
1582 @code{minus}. However, not all combinations are valid, since the
1583 assembler cannot do arbitrary arithmetic on relocatable symbols.
1585 @var{m} should be @code{Pmode}.
1588 @item (high:@var{m} @var{exp})
1589 Represents the high-order bits of @var{exp}, usually a
1590 @code{symbol_ref}. The number of bits is machine-dependent and is
1591 normally the number of bits specified in an instruction that initializes
1592 the high order bits of a register. It is used with @code{lo_sum} to
1593 represent the typical two-instruction sequence used in RISC machines to
1594 reference a global memory location.
1596 @var{m} should be @code{Pmode}.
1599 @node Regs and Memory
1600 @section Registers and Memory
1601 @cindex RTL register expressions
1602 @cindex RTL memory expressions
1604 Here are the RTL expression types for describing access to machine
1605 registers and to main memory.
1609 @cindex hard registers
1610 @cindex pseudo registers
1611 @item (reg:@var{m} @var{n})
1612 For small values of the integer @var{n} (those that are less than
1613 @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
1614 register number @var{n}: a @dfn{hard register}. For larger values of
1615 @var{n}, it stands for a temporary value or @dfn{pseudo register}.
1616 The compiler's strategy is to generate code assuming an unlimited
1617 number of such pseudo registers, and later convert them into hard
1618 registers or into memory references.
1620 @var{m} is the machine mode of the reference. It is necessary because
1621 machines can generally refer to each register in more than one mode.
1622 For example, a register may contain a full word but there may be
1623 instructions to refer to it as a half word or as a single byte, as
1624 well as instructions to refer to it as a floating point number of
1627 Even for a register that the machine can access in only one mode,
1628 the mode must always be specified.
1630 The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
1631 description, since the number of hard registers on the machine is an
1632 invariant characteristic of the machine. Note, however, that not
1633 all of the machine registers must be general registers. All the
1634 machine registers that can be used for storage of data are given
1635 hard register numbers, even those that can be used only in certain
1636 instructions or can hold only certain types of data.
1638 A hard register may be accessed in various modes throughout one
1639 function, but each pseudo register is given a natural mode
1640 and is accessed only in that mode. When it is necessary to describe
1641 an access to a pseudo register using a nonnatural mode, a @code{subreg}
1644 A @code{reg} expression with a machine mode that specifies more than
1645 one word of data may actually stand for several consecutive registers.
1646 If in addition the register number specifies a hardware register, then
1647 it actually represents several consecutive hardware registers starting
1648 with the specified one.
1650 Each pseudo register number used in a function's RTL code is
1651 represented by a unique @code{reg} expression.
1653 @findex FIRST_VIRTUAL_REGISTER
1654 @findex LAST_VIRTUAL_REGISTER
1655 Some pseudo register numbers, those within the range of
1656 @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
1657 appear during the RTL generation phase and are eliminated before the
1658 optimization phases. These represent locations in the stack frame that
1659 cannot be determined until RTL generation for the function has been
1660 completed. The following virtual register numbers are defined:
1663 @findex VIRTUAL_INCOMING_ARGS_REGNUM
1664 @item VIRTUAL_INCOMING_ARGS_REGNUM
1665 This points to the first word of the incoming arguments passed on the
1666 stack. Normally these arguments are placed there by the caller, but the
1667 callee may have pushed some arguments that were previously passed in
1670 @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1671 @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1672 When RTL generation is complete, this virtual register is replaced
1673 by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1674 value of @code{FIRST_PARM_OFFSET}.
1676 @findex VIRTUAL_STACK_VARS_REGNUM
1677 @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1678 @item VIRTUAL_STACK_VARS_REGNUM
1679 If @code{FRAME_GROWS_DOWNWARD} is defined to a nonzero value, this points
1680 to immediately above the first variable on the stack. Otherwise, it points
1681 to the first variable on the stack.
1683 @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1684 @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1685 @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
1686 register given by @code{FRAME_POINTER_REGNUM} and the value
1687 @code{STARTING_FRAME_OFFSET}.
1689 @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1690 @item VIRTUAL_STACK_DYNAMIC_REGNUM
1691 This points to the location of dynamically allocated memory on the stack
1692 immediately after the stack pointer has been adjusted by the amount of
1695 @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1696 @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1697 This virtual register is replaced by the sum of the register given by
1698 @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1700 @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1701 @item VIRTUAL_OUTGOING_ARGS_REGNUM
1702 This points to the location in the stack at which outgoing arguments
1703 should be written when the stack is pre-pushed (arguments pushed using
1704 push insns should always use @code{STACK_POINTER_REGNUM}).
1706 @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1707 This virtual register is replaced by the sum of the register given by
1708 @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1712 @item (subreg:@var{m} @var{reg} @var{bytenum})
1713 @code{subreg} expressions are used to refer to a register in a machine
1714 mode other than its natural one, or to refer to one register of
1715 a multi-part @code{reg} that actually refers to several registers.
1717 Each pseudo-register has a natural mode. If it is necessary to
1718 operate on it in a different mode---for example, to perform a fullword
1719 move instruction on a pseudo-register that contains a single
1720 byte---the pseudo-register must be enclosed in a @code{subreg}. In
1721 such a case, @var{bytenum} is zero.
1723 Usually @var{m} is at least as narrow as the mode of @var{reg}, in which
1724 case it is restricting consideration to only the bits of @var{reg} that
1727 Sometimes @var{m} is wider than the mode of @var{reg}. These
1728 @code{subreg} expressions are often called @dfn{paradoxical}. They are
1729 used in cases where we want to refer to an object in a wider mode but do
1730 not care what value the additional bits have. The reload pass ensures
1731 that paradoxical references are only made to hard registers.
1733 The other use of @code{subreg} is to extract the individual registers of
1734 a multi-register value. Machine modes such as @code{DImode} and
1735 @code{TImode} can indicate values longer than a word, values which
1736 usually require two or more consecutive registers. To access one of the
1737 registers, use a @code{subreg} with mode @code{SImode} and a
1738 @var{bytenum} offset that says which register.
1740 Storing in a non-paradoxical @code{subreg} has undefined results for
1741 bits belonging to the same word as the @code{subreg}. This laxity makes
1742 it easier to generate efficient code for such instructions. To
1743 represent an instruction that preserves all the bits outside of those in
1744 the @code{subreg}, use @code{strict_low_part} around the @code{subreg}.
1746 @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1747 The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says
1748 that byte number zero is part of the most significant word; otherwise,
1749 it is part of the least significant word.
1751 @cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
1752 The compilation parameter @code{BYTES_BIG_ENDIAN}, if set to 1, says
1753 that byte number zero is the most significant byte within a word;
1754 otherwise, it is the least significant byte within a word.
1756 @cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
1757 On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
1758 @code{WORDS_BIG_ENDIAN}.
1759 However, most parts of the compiler treat floating point values as if
1760 they had the same endianness as integer values. This works because
1761 they handle them solely as a collection of integer values, with no
1762 particular numerical value. Only real.c and the runtime libraries
1763 care about @code{FLOAT_WORDS_BIG_ENDIAN}.
1765 @cindex combiner pass
1767 @cindex @code{subreg}, special reload handling
1768 Between the combiner pass and the reload pass, it is possible to have a
1769 paradoxical @code{subreg} which contains a @code{mem} instead of a
1770 @code{reg} as its first operand. After the reload pass, it is also
1771 possible to have a non-paradoxical @code{subreg} which contains a
1772 @code{mem}; this usually occurs when the @code{mem} is a stack slot
1773 which replaced a pseudo register.
1775 Note that it is not valid to access a @code{DFmode} value in @code{SFmode}
1776 using a @code{subreg}. On some machines the most significant part of a
1777 @code{DFmode} value does not have the same format as a single-precision
1780 It is also not valid to access a single word of a multi-word value in a
1781 hard register when less registers can hold the value than would be
1782 expected from its size. For example, some 32-bit machines have
1783 floating-point registers that can hold an entire @code{DFmode} value.
1784 If register 10 were such a register @code{(subreg:SI (reg:DF 10) 4)}
1785 would be invalid because there is no way to convert that reference to
1786 a single machine register. The reload pass prevents @code{subreg}
1787 expressions such as these from being formed.
1791 The first operand of a @code{subreg} expression is customarily accessed
1792 with the @code{SUBREG_REG} macro and the second operand is customarily
1793 accessed with the @code{SUBREG_BYTE} macro.
1796 @cindex scratch operands
1797 @item (scratch:@var{m})
1798 This represents a scratch register that will be required for the
1799 execution of a single instruction and not used subsequently. It is
1800 converted into a @code{reg} by either the local register allocator or
1803 @code{scratch} is usually present inside a @code{clobber} operation
1804 (@pxref{Side Effects}).
1807 @cindex condition code register
1809 This refers to the machine's condition code register. It has no
1810 operands and may not have a machine mode. There are two ways to use it:
1814 To stand for a complete set of condition code flags. This is best on
1815 most machines, where each comparison sets the entire series of flags.
1817 With this technique, @code{(cc0)} may be validly used in only two
1818 contexts: as the destination of an assignment (in test and compare
1819 instructions) and in comparison operators comparing against zero
1820 (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
1823 To stand for a single flag that is the result of a single condition.
1824 This is useful on machines that have only a single flag bit, and in
1825 which comparison instructions must specify the condition to test.
1827 With this technique, @code{(cc0)} may be validly used in only two
1828 contexts: as the destination of an assignment (in test and compare
1829 instructions) where the source is a comparison operator, and as the
1830 first operand of @code{if_then_else} (in a conditional branch).
1834 There is only one expression object of code @code{cc0}; it is the
1835 value of the variable @code{cc0_rtx}. Any attempt to create an
1836 expression of code @code{cc0} will return @code{cc0_rtx}.
1838 Instructions can set the condition code implicitly. On many machines,
1839 nearly all instructions set the condition code based on the value that
1840 they compute or store. It is not necessary to record these actions
1841 explicitly in the RTL because the machine description includes a
1842 prescription for recognizing the instructions that do so (by means of
1843 the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
1844 instructions whose sole purpose is to set the condition code, and
1845 instructions that use the condition code, need mention @code{(cc0)}.
1847 On some machines, the condition code register is given a register number
1848 and a @code{reg} is used instead of @code{(cc0)}. This is usually the
1849 preferable approach if only a small subset of instructions modify the
1850 condition code. Other machines store condition codes in general
1851 registers; in such cases a pseudo register should be used.
1853 Some machines, such as the SPARC and RS/6000, have two sets of
1854 arithmetic instructions, one that sets and one that does not set the
1855 condition code. This is best handled by normally generating the
1856 instruction that does not set the condition code, and making a pattern
1857 that both performs the arithmetic and sets the condition code register
1858 (which would not be @code{(cc0)} in this case). For examples, search
1859 for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
1863 @cindex program counter
1864 This represents the machine's program counter. It has no operands and
1865 may not have a machine mode. @code{(pc)} may be validly used only in
1866 certain specific contexts in jump instructions.
1869 There is only one expression object of code @code{pc}; it is the value
1870 of the variable @code{pc_rtx}. Any attempt to create an expression of
1871 code @code{pc} will return @code{pc_rtx}.
1873 All instructions that do not jump alter the program counter implicitly
1874 by incrementing it, but there is no need to mention this in the RTL@.
1877 @item (mem:@var{m} @var{addr} @var{alias})
1878 This RTX represents a reference to main memory at an address
1879 represented by the expression @var{addr}. @var{m} specifies how large
1880 a unit of memory is accessed. @var{alias} specifies an alias set for the
1881 reference. In general two items are in different alias sets if they cannot
1882 reference the same memory address.
1884 The construct @code{(mem:BLK (scratch))} is considered to alias all
1885 other memories. Thus it may be used as a memory barrier in epilogue
1886 stack deallocation patterns.
1889 @item (addressof:@var{m} @var{reg})
1890 This RTX represents a request for the address of register @var{reg}. Its mode
1891 is always @code{Pmode}. If there are any @code{addressof}
1892 expressions left in the function after CSE, @var{reg} is forced into the
1893 stack and the @code{addressof} expression is replaced with a @code{plus}
1894 expression for the address of its stack slot.
1897 @item (concat@var{m} @var{rtx} @var{rtx})
1898 This RTX represents the concatenation of two other RTXs. This is used
1899 for complex values. It should only appear in the RTL attached to
1900 declarations and during RTL generation. It should not appear in the
1901 ordinary insn chain.
1904 @item (concatn@var{m} [@var{rtx} ...])
1905 This RTX represents the concatenation of all the @var{rtx} to make a
1906 single value. Like @code{concat}, this should only appear in
1907 declarations, and not in the insn chain.
1911 @section RTL Expressions for Arithmetic
1912 @cindex arithmetic, in RTL
1913 @cindex math, in RTL
1914 @cindex RTL expressions for arithmetic
1916 Unless otherwise specified, all the operands of arithmetic expressions
1917 must be valid for mode @var{m}. An operand is valid for mode @var{m}
1918 if it has mode @var{m}, or if it is a @code{const_int} or
1919 @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
1921 For commutative binary operations, constants should be placed in the
1929 @cindex RTL addition
1930 @cindex RTL addition with signed saturation
1931 @cindex RTL addition with unsigned saturation
1932 @item (plus:@var{m} @var{x} @var{y})
1933 @itemx (ss_plus:@var{m} @var{x} @var{y})
1934 @itemx (us_plus:@var{m} @var{x} @var{y})
1936 These three expressions all represent the sum of the values
1937 represented by @var{x} and @var{y} carried out in machine mode
1938 @var{m}. They differ in their behavior on overflow of integer modes.
1939 @code{plus} wraps round modulo the width of @var{m}; @code{ss_plus}
1940 saturates at the maximum signed value representable in @var{m};
1941 @code{us_plus} saturates at the maximum unsigned value.
1943 @c ??? What happens on overflow of floating point modes?
1946 @item (lo_sum:@var{m} @var{x} @var{y})
1948 This expression represents the sum of @var{x} and the low-order bits
1949 of @var{y}. It is used with @code{high} (@pxref{Constants}) to
1950 represent the typical two-instruction sequence used in RISC machines
1951 to reference a global memory location.
1953 The number of low order bits is machine-dependent but is
1954 normally the number of bits in a @code{Pmode} item minus the number of
1955 bits set by @code{high}.
1957 @var{m} should be @code{Pmode}.
1962 @cindex RTL difference
1963 @cindex RTL subtraction
1964 @cindex RTL subtraction with signed saturation
1965 @cindex RTL subtraction with unsigned saturation
1966 @item (minus:@var{m} @var{x} @var{y})
1967 @itemx (ss_minus:@var{m} @var{x} @var{y})
1968 @itemx (us_minus:@var{m} @var{x} @var{y})
1970 These three expressions represent the result of subtracting @var{y}
1971 from @var{x}, carried out in mode @var{M}. Behavior on overflow is
1972 the same as for the three variants of @code{plus} (see above).
1975 @cindex RTL comparison
1976 @item (compare:@var{m} @var{x} @var{y})
1977 Represents the result of subtracting @var{y} from @var{x} for purposes
1978 of comparison. The result is computed without overflow, as if with
1981 Of course, machines can't really subtract with infinite precision.
1982 However, they can pretend to do so when only the sign of the result will
1983 be used, which is the case when the result is stored in the condition
1984 code. And that is the @emph{only} way this kind of expression may
1985 validly be used: as a value to be stored in the condition codes, either
1986 @code{(cc0)} or a register. @xref{Comparisons}.
1988 The mode @var{m} is not related to the modes of @var{x} and @var{y}, but
1989 instead is the mode of the condition code value. If @code{(cc0)} is
1990 used, it is @code{VOIDmode}. Otherwise it is some mode in class
1991 @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m}
1992 is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
1993 information (in an unspecified format) so that any comparison operator
1994 can be applied to the result of the @code{COMPARE} operation. For other
1995 modes in class @code{MODE_CC}, the operation only returns a subset of
1998 Normally, @var{x} and @var{y} must have the same mode. Otherwise,
1999 @code{compare} is valid only if the mode of @var{x} is in class
2000 @code{MODE_INT} and @var{y} is a @code{const_int} or
2001 @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
2002 determines what mode the comparison is to be done in; thus it must not
2005 If one of the operands is a constant, it should be placed in the
2006 second operand and the comparison code adjusted as appropriate.
2008 A @code{compare} specifying two @code{VOIDmode} constants is not valid
2009 since there is no way to know in what mode the comparison is to be
2010 performed; the comparison must either be folded during the compilation
2011 or the first operand must be loaded into a register while its mode is
2017 @cindex negation with signed saturation
2018 @item (neg:@var{m} @var{x})
2019 @itemx (ss_neg:@var{m} @var{x})
2020 These two expressions represent the negation (subtraction from zero) of
2021 the value represented by @var{x}, carried out in mode @var{m}. They
2022 differ in the behavior on overflow of integer modes. In the case of
2023 @code{neg}, the negation of the operand may be a number not representable
2024 in mode @var{m}, in which case it is truncated to @var{m}. @code{ss_neg}
2025 ensures that an out-of-bounds result saturates to the maximum or minimum
2026 representable value.
2029 @cindex multiplication
2031 @item (mult:@var{m} @var{x} @var{y})
2032 Represents the signed product of the values represented by @var{x} and
2033 @var{y} carried out in machine mode @var{m}.
2035 Some machines support a multiplication that generates a product wider
2036 than the operands. Write the pattern for this as
2039 (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
2042 where @var{m} is wider than the modes of @var{x} and @var{y}, which need
2045 For unsigned widening multiplication, use the same idiom, but with
2046 @code{zero_extend} instead of @code{sign_extend}.
2050 @cindex signed division
2052 @item (div:@var{m} @var{x} @var{y})
2053 Represents the quotient in signed division of @var{x} by @var{y},
2054 carried out in machine mode @var{m}. If @var{m} is a floating point
2055 mode, it represents the exact quotient; otherwise, the integerized
2058 Some machines have division instructions in which the operands and
2059 quotient widths are not all the same; you should represent
2060 such instructions using @code{truncate} and @code{sign_extend} as in,
2063 (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
2067 @cindex unsigned division
2069 @item (udiv:@var{m} @var{x} @var{y})
2070 Like @code{div} but represents unsigned division.
2076 @item (mod:@var{m} @var{x} @var{y})
2077 @itemx (umod:@var{m} @var{x} @var{y})
2078 Like @code{div} and @code{udiv} but represent the remainder instead of
2083 @cindex signed minimum
2084 @cindex signed maximum
2085 @item (smin:@var{m} @var{x} @var{y})
2086 @itemx (smax:@var{m} @var{x} @var{y})
2087 Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
2088 @var{x} and @var{y}, interpreted as signed values in mode @var{m}.
2089 When used with floating point, if both operands are zeros, or if either
2090 operand is @code{NaN}, then it is unspecified which of the two operands
2091 is returned as the result.
2095 @cindex unsigned minimum and maximum
2096 @item (umin:@var{m} @var{x} @var{y})
2097 @itemx (umax:@var{m} @var{x} @var{y})
2098 Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
2102 @cindex complement, bitwise
2103 @cindex bitwise complement
2104 @item (not:@var{m} @var{x})
2105 Represents the bitwise complement of the value represented by @var{x},
2106 carried out in mode @var{m}, which must be a fixed-point machine mode.
2109 @cindex logical-and, bitwise
2110 @cindex bitwise logical-and
2111 @item (and:@var{m} @var{x} @var{y})
2112 Represents the bitwise logical-and of the values represented by
2113 @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
2114 a fixed-point machine mode.
2117 @cindex inclusive-or, bitwise
2118 @cindex bitwise inclusive-or
2119 @item (ior:@var{m} @var{x} @var{y})
2120 Represents the bitwise inclusive-or of the values represented by @var{x}
2121 and @var{y}, carried out in machine mode @var{m}, which must be a
2125 @cindex exclusive-or, bitwise
2126 @cindex bitwise exclusive-or
2127 @item (xor:@var{m} @var{x} @var{y})
2128 Represents the bitwise exclusive-or of the values represented by @var{x}
2129 and @var{y}, carried out in machine mode @var{m}, which must be a
2136 @cindex arithmetic shift
2137 @cindex arithmetic shift with signed saturation
2138 @item (ashift:@var{m} @var{x} @var{c})
2139 @itemx (ss_ashift:@var{m} @var{x} @var{c})
2140 These two expressions represent the result of arithmetically shifting @var{x}
2141 left by @var{c} places. They differ in their behavior on overflow of integer
2142 modes. An @code{ashift} operation is a plain shift with no special behavior
2143 in case of a change in the sign bit; @code{ss_ashift} saturates to the minimum
2144 or maximum representable value if any of the bits shifted out differs from the
2147 @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
2148 be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
2149 mode is determined by the mode called for in the machine description
2150 entry for the left-shift instruction. For example, on the VAX, the mode
2151 of @var{c} is @code{QImode} regardless of @var{m}.
2156 @item (lshiftrt:@var{m} @var{x} @var{c})
2157 @itemx (ashiftrt:@var{m} @var{x} @var{c})
2158 Like @code{ashift} but for right shift. Unlike the case for left shift,
2159 these two operations are distinct.
2165 @cindex right rotate
2166 @item (rotate:@var{m} @var{x} @var{c})
2167 @itemx (rotatert:@var{m} @var{x} @var{c})
2168 Similar but represent left and right rotate. If @var{c} is a constant,
2172 @cindex absolute value
2173 @item (abs:@var{m} @var{x})
2174 Represents the absolute value of @var{x}, computed in mode @var{m}.
2178 @item (sqrt:@var{m} @var{x})
2179 Represents the square root of @var{x}, computed in mode @var{m}.
2180 Most often @var{m} will be a floating point mode.
2183 @item (ffs:@var{m} @var{x})
2184 Represents one plus the index of the least significant 1-bit in
2185 @var{x}, represented as an integer of mode @var{m}. (The value is
2186 zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
2187 depending on the target machine, various mode combinations may be
2191 @item (clz:@var{m} @var{x})
2192 Represents the number of leading 0-bits in @var{x}, represented as an
2193 integer of mode @var{m}, starting at the most significant bit position.
2194 If @var{x} is zero, the value is determined by
2195 @code{CLZ_DEFINED_VALUE_AT_ZERO}. Note that this is one of
2196 the few expressions that is not invariant under widening. The mode of
2197 @var{x} will usually be an integer mode.
2200 @item (ctz:@var{m} @var{x})
2201 Represents the number of trailing 0-bits in @var{x}, represented as an
2202 integer of mode @var{m}, starting at the least significant bit position.
2203 If @var{x} is zero, the value is determined by
2204 @code{CTZ_DEFINED_VALUE_AT_ZERO}. Except for this case,
2205 @code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}. The mode of
2206 @var{x} will usually be an integer mode.
2209 @item (popcount:@var{m} @var{x})
2210 Represents the number of 1-bits in @var{x}, represented as an integer of
2211 mode @var{m}. The mode of @var{x} will usually be an integer mode.
2214 @item (parity:@var{m} @var{x})
2215 Represents the number of 1-bits modulo 2 in @var{x}, represented as an
2216 integer of mode @var{m}. The mode of @var{x} will usually be an integer
2220 @item (bswap:@var{m} @var{x})
2221 Represents the value @var{x} with the order of bytes reversed, carried out
2222 in mode @var{m}, which must be a fixed-point machine mode.
2226 @section Comparison Operations
2227 @cindex RTL comparison operations
2229 Comparison operators test a relation on two operands and are considered
2230 to represent a machine-dependent nonzero value described by, but not
2231 necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
2232 if the relation holds, or zero if it does not, for comparison operators
2233 whose results have a `MODE_INT' mode,
2234 @code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or
2235 zero if it does not, for comparison operators that return floating-point
2236 values, and a vector of either @code{VECTOR_STORE_FLAG_VALUE} (@pxref{Misc})
2237 if the relation holds, or of zeros if it does not, for comparison operators
2238 that return vector results.
2239 The mode of the comparison operation is independent of the mode
2240 of the data being compared. If the comparison operation is being tested
2241 (e.g., the first operand of an @code{if_then_else}), the mode must be
2244 @cindex condition codes
2245 There are two ways that comparison operations may be used. The
2246 comparison operators may be used to compare the condition codes
2247 @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
2248 a construct actually refers to the result of the preceding instruction
2249 in which the condition codes were set. The instruction setting the
2250 condition code must be adjacent to the instruction using the condition
2251 code; only @code{note} insns may separate them.
2253 Alternatively, a comparison operation may directly compare two data
2254 objects. The mode of the comparison is determined by the operands; they
2255 must both be valid for a common machine mode. A comparison with both
2256 operands constant would be invalid as the machine mode could not be
2257 deduced from it, but such a comparison should never exist in RTL due to
2260 In the example above, if @code{(cc0)} were last set to
2261 @code{(compare @var{x} @var{y})}, the comparison operation is
2262 identical to @code{(eq @var{x} @var{y})}. Usually only one style
2263 of comparisons is supported on a particular machine, but the combine
2264 pass will try to merge the operations to produce the @code{eq} shown
2265 in case it exists in the context of the particular insn involved.
2267 Inequality comparisons come in two flavors, signed and unsigned. Thus,
2268 there are distinct expression codes @code{gt} and @code{gtu} for signed and
2269 unsigned greater-than. These can produce different results for the same
2270 pair of integer values: for example, 1 is signed greater-than @minus{}1 but not
2271 unsigned greater-than, because @minus{}1 when regarded as unsigned is actually
2272 @code{0xffffffff} which is greater than 1.
2274 The signed comparisons are also used for floating point values. Floating
2275 point comparisons are distinguished by the machine modes of the operands.
2280 @item (eq:@var{m} @var{x} @var{y})
2281 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2282 are equal, otherwise 0.
2286 @item (ne:@var{m} @var{x} @var{y})
2287 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2288 are not equal, otherwise 0.
2291 @cindex greater than
2292 @item (gt:@var{m} @var{x} @var{y})
2293 @code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they
2294 are fixed-point, the comparison is done in a signed sense.
2297 @cindex greater than
2298 @cindex unsigned greater than
2299 @item (gtu:@var{m} @var{x} @var{y})
2300 Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
2305 @cindex unsigned less than
2306 @item (lt:@var{m} @var{x} @var{y})
2307 @itemx (ltu:@var{m} @var{x} @var{y})
2308 Like @code{gt} and @code{gtu} but test for ``less than''.
2311 @cindex greater than
2313 @cindex unsigned greater than
2314 @item (ge:@var{m} @var{x} @var{y})
2315 @itemx (geu:@var{m} @var{x} @var{y})
2316 Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
2319 @cindex less than or equal
2321 @cindex unsigned less than
2322 @item (le:@var{m} @var{x} @var{y})
2323 @itemx (leu:@var{m} @var{x} @var{y})
2324 Like @code{gt} and @code{gtu} but test for ``less than or equal''.
2326 @findex if_then_else
2327 @item (if_then_else @var{cond} @var{then} @var{else})
2328 This is not a comparison operation but is listed here because it is
2329 always used in conjunction with a comparison operation. To be
2330 precise, @var{cond} is a comparison expression. This expression
2331 represents a choice, according to @var{cond}, between the value
2332 represented by @var{then} and the one represented by @var{else}.
2334 On most machines, @code{if_then_else} expressions are valid only
2335 to express conditional jumps.
2338 @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
2339 Similar to @code{if_then_else}, but more general. Each of @var{test1},
2340 @var{test2}, @dots{} is performed in turn. The result of this expression is
2341 the @var{value} corresponding to the first nonzero test, or @var{default} if
2342 none of the tests are nonzero expressions.
2344 This is currently not valid for instruction patterns and is supported only
2345 for insn attributes. @xref{Insn Attributes}.
2352 Special expression codes exist to represent bit-field instructions.
2355 @findex sign_extract
2356 @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
2357 @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
2358 This represents a reference to a sign-extended bit-field contained or
2359 starting in @var{loc} (a memory or register reference). The bit-field
2360 is @var{size} bits wide and starts at bit @var{pos}. The compilation
2361 option @code{BITS_BIG_ENDIAN} says which end of the memory unit
2362 @var{pos} counts from.
2364 If @var{loc} is in memory, its mode must be a single-byte integer mode.
2365 If @var{loc} is in a register, the mode to use is specified by the
2366 operand of the @code{insv} or @code{extv} pattern
2367 (@pxref{Standard Names}) and is usually a full-word integer mode,
2368 which is the default if none is specified.
2370 The mode of @var{pos} is machine-specific and is also specified
2371 in the @code{insv} or @code{extv} pattern.
2373 The mode @var{m} is the same as the mode that would be used for
2374 @var{loc} if it were a register.
2376 A @code{sign_extract} can not appear as an lvalue, or part thereof,
2379 @findex zero_extract
2380 @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
2381 Like @code{sign_extract} but refers to an unsigned or zero-extended
2382 bit-field. The same sequence of bits are extracted, but they
2383 are filled to an entire word with zeros instead of by sign-extension.
2385 Unlike @code{sign_extract}, this type of expressions can be lvalues
2386 in RTL; they may appear on the left side of an assignment, indicating
2387 insertion of a value into the specified bit-field.
2390 @node Vector Operations
2391 @section Vector Operations
2392 @cindex vector operations
2394 All normal RTL expressions can be used with vector modes; they are
2395 interpreted as operating on each part of the vector independently.
2396 Additionally, there are a few new expressions to describe specific vector
2401 @item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
2402 This describes a merge operation between two vectors. The result is a vector
2403 of mode @var{m}; its elements are selected from either @var{vec1} or
2404 @var{vec2}. Which elements are selected is described by @var{items}, which
2405 is a bit mask represented by a @code{const_int}; a zero bit indicates the
2406 corresponding element in the result vector is taken from @var{vec2} while
2407 a set bit indicates it is taken from @var{vec1}.
2410 @item (vec_select:@var{m} @var{vec1} @var{selection})
2411 This describes an operation that selects parts of a vector. @var{vec1} is
2412 the source vector, @var{selection} is a @code{parallel} that contains a
2413 @code{const_int} for each of the subparts of the result vector, giving the
2414 number of the source subpart that should be stored into it.
2417 @item (vec_concat:@var{m} @var{vec1} @var{vec2})
2418 Describes a vector concat operation. The result is a concatenation of the
2419 vectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of
2422 @findex vec_duplicate
2423 @item (vec_duplicate:@var{m} @var{vec})
2424 This operation converts a small vector into a larger one by duplicating the
2425 input values. The output vector mode must have the same submodes as the
2426 input vector mode, and the number of output parts must be an integer multiple
2427 of the number of input parts.
2432 @section Conversions
2434 @cindex machine mode conversions
2436 All conversions between machine modes must be represented by
2437 explicit conversion operations. For example, an expression
2438 which is the sum of a byte and a full word cannot be written as
2439 @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
2440 operation requires two operands of the same machine mode.
2441 Therefore, the byte-sized operand is enclosed in a conversion
2445 (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
2448 The conversion operation is not a mere placeholder, because there
2449 may be more than one way of converting from a given starting mode
2450 to the desired final mode. The conversion operation code says how
2453 For all conversion operations, @var{x} must not be @code{VOIDmode}
2454 because the mode in which to do the conversion would not be known.
2455 The conversion must either be done at compile-time or @var{x}
2456 must be placed into a register.
2460 @item (sign_extend:@var{m} @var{x})
2461 Represents the result of sign-extending the value @var{x}
2462 to machine mode @var{m}. @var{m} must be a fixed-point mode
2463 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2466 @item (zero_extend:@var{m} @var{x})
2467 Represents the result of zero-extending the value @var{x}
2468 to machine mode @var{m}. @var{m} must be a fixed-point mode
2469 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2471 @findex float_extend
2472 @item (float_extend:@var{m} @var{x})
2473 Represents the result of extending the value @var{x}
2474 to machine mode @var{m}. @var{m} must be a floating point mode
2475 and @var{x} a floating point value of a mode narrower than @var{m}.
2478 @item (truncate:@var{m} @var{x})
2479 Represents the result of truncating the value @var{x}
2480 to machine mode @var{m}. @var{m} must be a fixed-point mode
2481 and @var{x} a fixed-point value of a mode wider than @var{m}.
2484 @item (ss_truncate:@var{m} @var{x})
2485 Represents the result of truncating the value @var{x}
2486 to machine mode @var{m}, using signed saturation in the case of
2487 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2491 @item (us_truncate:@var{m} @var{x})
2492 Represents the result of truncating the value @var{x}
2493 to machine mode @var{m}, using unsigned saturation in the case of
2494 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2497 @findex float_truncate
2498 @item (float_truncate:@var{m} @var{x})
2499 Represents the result of truncating the value @var{x}
2500 to machine mode @var{m}. @var{m} must be a floating point mode
2501 and @var{x} a floating point value of a mode wider than @var{m}.
2504 @item (float:@var{m} @var{x})
2505 Represents the result of converting fixed point value @var{x},
2506 regarded as signed, to floating point mode @var{m}.
2508 @findex unsigned_float
2509 @item (unsigned_float:@var{m} @var{x})
2510 Represents the result of converting fixed point value @var{x},
2511 regarded as unsigned, to floating point mode @var{m}.
2514 @item (fix:@var{m} @var{x})
2515 When @var{m} is a fixed point mode, represents the result of
2516 converting floating point value @var{x} to mode @var{m}, regarded as
2517 signed. How rounding is done is not specified, so this operation may
2518 be used validly in compiling C code only for integer-valued operands.
2520 @findex unsigned_fix
2521 @item (unsigned_fix:@var{m} @var{x})
2522 Represents the result of converting floating point value @var{x} to
2523 fixed point mode @var{m}, regarded as unsigned. How rounding is done
2527 @item (fix:@var{m} @var{x})
2528 When @var{m} is a floating point mode, represents the result of
2529 converting floating point value @var{x} (valid for mode @var{m}) to an
2530 integer, still represented in floating point mode @var{m}, by rounding
2534 @node RTL Declarations
2535 @section Declarations
2536 @cindex RTL declarations
2537 @cindex declarations, RTL
2539 Declaration expression codes do not represent arithmetic operations
2540 but rather state assertions about their operands.
2543 @findex strict_low_part
2544 @cindex @code{subreg}, in @code{strict_low_part}
2545 @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
2546 This expression code is used in only one context: as the destination operand of a
2547 @code{set} expression. In addition, the operand of this expression
2548 must be a non-paradoxical @code{subreg} expression.
2550 The presence of @code{strict_low_part} says that the part of the
2551 register which is meaningful in mode @var{n}, but is not part of
2552 mode @var{m}, is not to be altered. Normally, an assignment to such
2553 a subreg is allowed to have undefined effects on the rest of the
2554 register when @var{m} is less than a word.
2558 @section Side Effect Expressions
2559 @cindex RTL side effect expressions
2561 The expression codes described so far represent values, not actions.
2562 But machine instructions never produce values; they are meaningful
2563 only for their side effects on the state of the machine. Special
2564 expression codes are used to represent side effects.
2566 The body of an instruction is always one of these side effect codes;
2567 the codes described above, which represent values, appear only as
2568 the operands of these.
2572 @item (set @var{lval} @var{x})
2573 Represents the action of storing the value of @var{x} into the place
2574 represented by @var{lval}. @var{lval} must be an expression
2575 representing a place that can be stored in: @code{reg} (or @code{subreg},
2576 @code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc},
2577 @code{parallel}, or @code{cc0}.
2579 If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
2580 machine mode; then @var{x} must be valid for that mode.
2582 If @var{lval} is a @code{reg} whose machine mode is less than the full
2583 width of the register, then it means that the part of the register
2584 specified by the machine mode is given the specified value and the
2585 rest of the register receives an undefined value. Likewise, if
2586 @var{lval} is a @code{subreg} whose machine mode is narrower than
2587 the mode of the register, the rest of the register can be changed in
2590 If @var{lval} is a @code{strict_low_part} of a subreg, then the part
2591 of the register specified by the machine mode of the @code{subreg} is
2592 given the value @var{x} and the rest of the register is not changed.
2594 If @var{lval} is a @code{zero_extract}, then the referenced part of
2595 the bit-field (a memory or register reference) specified by the
2596 @code{zero_extract} is given the value @var{x} and the rest of the
2597 bit-field is not changed. Note that @code{sign_extract} can not
2598 appear in @var{lval}.
2600 If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
2601 be either a @code{compare} expression or a value that may have any mode.
2602 The latter case represents a ``test'' instruction. The expression
2603 @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
2604 @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
2605 Use the former expression to save space during the compilation.
2607 If @var{lval} is a @code{parallel}, it is used to represent the case of
2608 a function returning a structure in multiple registers. Each element
2609 of the @code{parallel} is an @code{expr_list} whose first operand is a
2610 @code{reg} and whose second operand is a @code{const_int} representing the
2611 offset (in bytes) into the structure at which the data in that register
2612 corresponds. The first element may be null to indicate that the structure
2613 is also passed partly in memory.
2615 @cindex jump instructions and @code{set}
2616 @cindex @code{if_then_else} usage
2617 If @var{lval} is @code{(pc)}, we have a jump instruction, and the
2618 possibilities for @var{x} are very limited. It may be a
2619 @code{label_ref} expression (unconditional jump). It may be an
2620 @code{if_then_else} (conditional jump), in which case either the
2621 second or the third operand must be @code{(pc)} (for the case which
2622 does not jump) and the other of the two must be a @code{label_ref}
2623 (for the case which does jump). @var{x} may also be a @code{mem} or
2624 @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
2625 @code{mem}; these unusual patterns are used to represent jumps through
2628 If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
2629 @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
2630 valid for the mode of @var{lval}.
2634 @var{lval} is customarily accessed with the @code{SET_DEST} macro and
2635 @var{x} with the @code{SET_SRC} macro.
2639 As the sole expression in a pattern, represents a return from the
2640 current function, on machines where this can be done with one
2641 instruction, such as VAXen. On machines where a multi-instruction
2642 ``epilogue'' must be executed in order to return from the function,
2643 returning is done by jumping to a label which precedes the epilogue, and
2644 the @code{return} expression code is never used.
2646 Inside an @code{if_then_else} expression, represents the value to be
2647 placed in @code{pc} to return to the caller.
2649 Note that an insn pattern of @code{(return)} is logically equivalent to
2650 @code{(set (pc) (return))}, but the latter form is never used.
2653 @item (call @var{function} @var{nargs})
2654 Represents a function call. @var{function} is a @code{mem} expression
2655 whose address is the address of the function to be called.
2656 @var{nargs} is an expression which can be used for two purposes: on
2657 some machines it represents the number of bytes of stack argument; on
2658 others, it represents the number of argument registers.
2660 Each machine has a standard machine mode which @var{function} must
2661 have. The machine description defines macro @code{FUNCTION_MODE} to
2662 expand into the requisite mode name. The purpose of this mode is to
2663 specify what kind of addressing is allowed, on machines where the
2664 allowed kinds of addressing depend on the machine mode being
2668 @item (clobber @var{x})
2669 Represents the storing or possible storing of an unpredictable,
2670 undescribed value into @var{x}, which must be a @code{reg},
2671 @code{scratch}, @code{parallel} or @code{mem} expression.
2673 One place this is used is in string instructions that store standard
2674 values into particular hard registers. It may not be worth the
2675 trouble to describe the values that are stored, but it is essential to
2676 inform the compiler that the registers will be altered, lest it
2677 attempt to keep data in them across the string instruction.
2679 If @var{x} is @code{(mem:BLK (const_int 0))} or
2680 @code{(mem:BLK (scratch))}, it means that all memory
2681 locations must be presumed clobbered. If @var{x} is a @code{parallel},
2682 it has the same meaning as a @code{parallel} in a @code{set} expression.
2684 Note that the machine description classifies certain hard registers as
2685 ``call-clobbered''. All function call instructions are assumed by
2686 default to clobber these registers, so there is no need to use
2687 @code{clobber} expressions to indicate this fact. Also, each function
2688 call is assumed to have the potential to alter any memory location,
2689 unless the function is declared @code{const}.
2691 If the last group of expressions in a @code{parallel} are each a
2692 @code{clobber} expression whose arguments are @code{reg} or
2693 @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
2694 phase can add the appropriate @code{clobber} expressions to an insn it
2695 has constructed when doing so will cause a pattern to be matched.
2697 This feature can be used, for example, on a machine that whose multiply
2698 and add instructions don't use an MQ register but which has an
2699 add-accumulate instruction that does clobber the MQ register. Similarly,
2700 a combined instruction might require a temporary register while the
2701 constituent instructions might not.
2703 When a @code{clobber} expression for a register appears inside a
2704 @code{parallel} with other side effects, the register allocator
2705 guarantees that the register is unoccupied both before and after that
2706 insn. However, the reload phase may allocate a register used for one of
2707 the inputs unless the @samp{&} constraint is specified for the selected
2708 alternative (@pxref{Modifiers}). You can clobber either a specific hard
2709 register, a pseudo register, or a @code{scratch} expression; in the
2710 latter two cases, GCC will allocate a hard register that is available
2711 there for use as a temporary.
2713 For instructions that require a temporary register, you should use
2714 @code{scratch} instead of a pseudo-register because this will allow the
2715 combiner phase to add the @code{clobber} when required. You do this by
2716 coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
2717 clobber a pseudo register, use one which appears nowhere else---generate
2718 a new one each time. Otherwise, you may confuse CSE@.
2720 There is one other known use for clobbering a pseudo register in a
2721 @code{parallel}: when one of the input operands of the insn is also
2722 clobbered by the insn. In this case, using the same pseudo register in
2723 the clobber and elsewhere in the insn produces the expected results.
2727 Represents the use of the value of @var{x}. It indicates that the
2728 value in @var{x} at this point in the program is needed, even though
2729 it may not be apparent why this is so. Therefore, the compiler will
2730 not attempt to delete previous instructions whose only effect is to
2731 store a value in @var{x}. @var{x} must be a @code{reg} expression.
2733 In some situations, it may be tempting to add a @code{use} of a
2734 register in a @code{parallel} to describe a situation where the value
2735 of a special register will modify the behavior of the instruction.
2736 An hypothetical example might be a pattern for an addition that can
2737 either wrap around or use saturating addition depending on the value
2738 of a special control register:
2741 (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
2748 This will not work, several of the optimizers only look at expressions
2749 locally; it is very likely that if you have multiple insns with
2750 identical inputs to the @code{unspec}, they will be optimized away even
2751 if register 1 changes in between.
2753 This means that @code{use} can @emph{only} be used to describe
2754 that the register is live. You should think twice before adding
2755 @code{use} statements, more often you will want to use @code{unspec}
2756 instead. The @code{use} RTX is most commonly useful to describe that
2757 a fixed register is implicitly used in an insn. It is also safe to use
2758 in patterns where the compiler knows for other reasons that the result
2759 of the whole pattern is variable, such as @samp{movmem@var{m}} or
2760 @samp{call} patterns.
2762 During the reload phase, an insn that has a @code{use} as pattern
2763 can carry a reg_equal note. These @code{use} insns will be deleted
2764 before the reload phase exits.
2766 During the delayed branch scheduling phase, @var{x} may be an insn.
2767 This indicates that @var{x} previously was located at this place in the
2768 code and its data dependencies need to be taken into account. These
2769 @code{use} insns will be deleted before the delayed branch scheduling
2773 @item (parallel [@var{x0} @var{x1} @dots{}])
2774 Represents several side effects performed in parallel. The square
2775 brackets stand for a vector; the operand of @code{parallel} is a
2776 vector of expressions. @var{x0}, @var{x1} and so on are individual
2777 side effect expressions---expressions of code @code{set}, @code{call},
2778 @code{return}, @code{clobber} or @code{use}.
2780 ``In parallel'' means that first all the values used in the individual
2781 side-effects are computed, and second all the actual side-effects are
2782 performed. For example,
2785 (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
2786 (set (mem:SI (reg:SI 1)) (reg:SI 1))])
2790 says unambiguously that the values of hard register 1 and the memory
2791 location addressed by it are interchanged. In both places where
2792 @code{(reg:SI 1)} appears as a memory address it refers to the value
2793 in register 1 @emph{before} the execution of the insn.
2795 It follows that it is @emph{incorrect} to use @code{parallel} and
2796 expect the result of one @code{set} to be available for the next one.
2797 For example, people sometimes attempt to represent a jump-if-zero
2798 instruction this way:
2801 (parallel [(set (cc0) (reg:SI 34))
2802 (set (pc) (if_then_else
2803 (eq (cc0) (const_int 0))
2809 But this is incorrect, because it says that the jump condition depends
2810 on the condition code value @emph{before} this instruction, not on the
2811 new value that is set by this instruction.
2813 @cindex peephole optimization, RTL representation
2814 Peephole optimization, which takes place together with final assembly
2815 code output, can produce insns whose patterns consist of a @code{parallel}
2816 whose elements are the operands needed to output the resulting
2817 assembler code---often @code{reg}, @code{mem} or constant expressions.
2818 This would not be well-formed RTL at any other stage in compilation,
2819 but it is ok then because no further optimization remains to be done.
2820 However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
2821 any, must deal with such insns if you define any peephole optimizations.
2824 @item (cond_exec [@var{cond} @var{expr}])
2825 Represents a conditionally executed expression. The @var{expr} is
2826 executed only if the @var{cond} is nonzero. The @var{cond} expression
2827 must not have side-effects, but the @var{expr} may very well have
2831 @item (sequence [@var{insns} @dots{}])
2832 Represents a sequence of insns. Each of the @var{insns} that appears
2833 in the vector is suitable for appearing in the chain of insns, so it
2834 must be an @code{insn}, @code{jump_insn}, @code{call_insn},
2835 @code{code_label}, @code{barrier} or @code{note}.
2837 A @code{sequence} RTX is never placed in an actual insn during RTL
2838 generation. It represents the sequence of insns that result from a
2839 @code{define_expand} @emph{before} those insns are passed to
2840 @code{emit_insn} to insert them in the chain of insns. When actually
2841 inserted, the individual sub-insns are separated out and the
2842 @code{sequence} is forgotten.
2844 After delay-slot scheduling is completed, an insn and all the insns that
2845 reside in its delay slots are grouped together into a @code{sequence}.
2846 The insn requiring the delay slot is the first insn in the vector;
2847 subsequent insns are to be placed in the delay slot.
2849 @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
2850 indicate that a branch insn should be used that will conditionally annul
2851 the effect of the insns in the delay slots. In such a case,
2852 @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
2853 the branch and should be executed only if the branch is taken; otherwise
2854 the insn should be executed only if the branch is not taken.
2858 These expression codes appear in place of a side effect, as the body of
2859 an insn, though strictly speaking they do not always describe side
2864 @item (asm_input @var{s})
2865 Represents literal assembler code as described by the string @var{s}.
2868 @findex unspec_volatile
2869 @item (unspec [@var{operands} @dots{}] @var{index})
2870 @itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
2871 Represents a machine-specific operation on @var{operands}. @var{index}
2872 selects between multiple machine-specific operations.
2873 @code{unspec_volatile} is used for volatile operations and operations
2874 that may trap; @code{unspec} is used for other operations.
2876 These codes may appear inside a @code{pattern} of an
2877 insn, inside a @code{parallel}, or inside an expression.
2880 @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
2881 Represents a table of jump addresses. The vector elements @var{lr0},
2882 etc., are @code{label_ref} expressions. The mode @var{m} specifies
2883 how much space is given to each address; normally @var{m} would be
2886 @findex addr_diff_vec
2887 @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
2888 Represents a table of jump addresses expressed as offsets from
2889 @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
2890 expressions and so is @var{base}. The mode @var{m} specifies how much
2891 space is given to each address-difference. @var{min} and @var{max}
2892 are set up by branch shortening and hold a label with a minimum and a
2893 maximum address, respectively. @var{flags} indicates the relative
2894 position of @var{base}, @var{min} and @var{max} to the containing insn
2895 and of @var{min} and @var{max} to @var{base}. See rtl.def for details.
2898 @item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
2899 Represents prefetch of memory at address @var{addr}.
2900 Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
2901 targets that do not support write prefetches should treat this as a normal
2903 Operand @var{locality} specifies the amount of temporal locality; 0 if there
2904 is none or 1, 2, or 3 for increasing levels of temporal locality;
2905 targets that do not support locality hints should ignore this.
2907 This insn is used to minimize cache-miss latency by moving data into a
2908 cache before it is accessed. It should use only non-faulting data prefetch
2913 @section Embedded Side-Effects on Addresses
2914 @cindex RTL preincrement
2915 @cindex RTL postincrement
2916 @cindex RTL predecrement
2917 @cindex RTL postdecrement
2919 Six special side-effect expression codes appear as memory addresses.
2923 @item (pre_dec:@var{m} @var{x})
2924 Represents the side effect of decrementing @var{x} by a standard
2925 amount and represents also the value that @var{x} has after being
2926 decremented. @var{x} must be a @code{reg} or @code{mem}, but most
2927 machines allow only a @code{reg}. @var{m} must be the machine mode
2928 for pointers on the machine in use. The amount @var{x} is decremented
2929 by is the length in bytes of the machine mode of the containing memory
2930 reference of which this expression serves as the address. Here is an
2934 (mem:DF (pre_dec:SI (reg:SI 39)))
2938 This says to decrement pseudo register 39 by the length of a @code{DFmode}
2939 value and use the result to address a @code{DFmode} value.
2942 @item (pre_inc:@var{m} @var{x})
2943 Similar, but specifies incrementing @var{x} instead of decrementing it.
2946 @item (post_dec:@var{m} @var{x})
2947 Represents the same side effect as @code{pre_dec} but a different
2948 value. The value represented here is the value @var{x} has @i{before}
2952 @item (post_inc:@var{m} @var{x})
2953 Similar, but specifies incrementing @var{x} instead of decrementing it.
2956 @item (post_modify:@var{m} @var{x} @var{y})
2958 Represents the side effect of setting @var{x} to @var{y} and
2959 represents @var{x} before @var{x} is modified. @var{x} must be a
2960 @code{reg} or @code{mem}, but most machines allow only a @code{reg}.
2961 @var{m} must be the machine mode for pointers on the machine in use.
2963 The expression @var{y} must be one of three forms:
2965 @code{(plus:@var{m} @var{x} @var{z})},
2966 @code{(minus:@var{m} @var{x} @var{z})}, or
2967 @code{(plus:@var{m} @var{x} @var{i})},
2969 where @var{z} is an index register and @var{i} is a constant.
2971 Here is an example of its use:
2974 (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
2978 This says to modify pseudo register 42 by adding the contents of pseudo
2979 register 48 to it, after the use of what ever 42 points to.
2982 @item (pre_modify:@var{m} @var{x} @var{expr})
2983 Similar except side effects happen before the use.
2986 These embedded side effect expressions must be used with care. Instruction
2987 patterns may not use them. Until the @samp{flow} pass of the compiler,
2988 they may occur only to represent pushes onto the stack. The @samp{flow}
2989 pass finds cases where registers are incremented or decremented in one
2990 instruction and used as an address shortly before or after; these cases are
2991 then transformed to use pre- or post-increment or -decrement.
2993 If a register used as the operand of these expressions is used in
2994 another address in an insn, the original value of the register is used.
2995 Uses of the register outside of an address are not permitted within the
2996 same insn as a use in an embedded side effect expression because such
2997 insns behave differently on different machines and hence must be treated
2998 as ambiguous and disallowed.
3000 An instruction that can be represented with an embedded side effect
3001 could also be represented using @code{parallel} containing an additional
3002 @code{set} to describe how the address register is altered. This is not
3003 done because machines that allow these operations at all typically
3004 allow them wherever a memory address is called for. Describing them as
3005 additional parallel stores would require doubling the number of entries
3006 in the machine description.
3009 @section Assembler Instructions as Expressions
3010 @cindex assembler instructions in RTL
3012 @cindex @code{asm_operands}, usage
3013 The RTX code @code{asm_operands} represents a value produced by a
3014 user-specified assembler instruction. It is used to represent
3015 an @code{asm} statement with arguments. An @code{asm} statement with
3016 a single output operand, like this:
3019 asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
3023 is represented using a single @code{asm_operands} RTX which represents
3024 the value that is stored in @code{outputvar}:
3027 (set @var{rtx-for-outputvar}
3028 (asm_operands "foo %1,%2,%0" "a" 0
3029 [@var{rtx-for-addition-result} @var{rtx-for-*z}]
3030 [(asm_input:@var{m1} "g")
3031 (asm_input:@var{m2} "di")]))
3035 Here the operands of the @code{asm_operands} RTX are the assembler
3036 template string, the output-operand's constraint, the index-number of the
3037 output operand among the output operands specified, a vector of input
3038 operand RTX's, and a vector of input-operand modes and constraints. The
3039 mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
3042 When an @code{asm} statement has multiple output values, its insn has
3043 several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
3044 contains a @code{asm_operands}; all of these share the same assembler
3045 template and vectors, but each contains the constraint for the respective
3046 output operand. They are also distinguished by the output-operand index
3047 number, which is 0, 1, @dots{} for successive output operands.
3053 The RTL representation of the code for a function is a doubly-linked
3054 chain of objects called @dfn{insns}. Insns are expressions with
3055 special codes that are used for no other purpose. Some insns are
3056 actual instructions; others represent dispatch tables for @code{switch}
3057 statements; others represent labels to jump to or various sorts of
3058 declarative information.
3060 In addition to its own specific data, each insn must have a unique
3061 id-number that distinguishes it from all other insns in the current
3062 function (after delayed branch scheduling, copies of an insn with the
3063 same id-number may be present in multiple places in a function, but
3064 these copies will always be identical and will only appear inside a
3065 @code{sequence}), and chain pointers to the preceding and following
3066 insns. These three fields occupy the same position in every insn,
3067 independent of the expression code of the insn. They could be accessed
3068 with @code{XEXP} and @code{XINT}, but instead three special macros are
3073 @item INSN_UID (@var{i})
3074 Accesses the unique id of insn @var{i}.
3077 @item PREV_INSN (@var{i})
3078 Accesses the chain pointer to the insn preceding @var{i}.
3079 If @var{i} is the first insn, this is a null pointer.
3082 @item NEXT_INSN (@var{i})
3083 Accesses the chain pointer to the insn following @var{i}.
3084 If @var{i} is the last insn, this is a null pointer.
3088 @findex get_last_insn
3089 The first insn in the chain is obtained by calling @code{get_insns}; the
3090 last insn is the result of calling @code{get_last_insn}. Within the
3091 chain delimited by these insns, the @code{NEXT_INSN} and
3092 @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
3096 NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
3100 is always true and if @var{insn} is not the last insn,
3103 PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
3109 After delay slot scheduling, some of the insns in the chain might be
3110 @code{sequence} expressions, which contain a vector of insns. The value
3111 of @code{NEXT_INSN} in all but the last of these insns is the next insn
3112 in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
3113 is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
3114 which it is contained. Similar rules apply for @code{PREV_INSN}.
3116 This means that the above invariants are not necessarily true for insns
3117 inside @code{sequence} expressions. Specifically, if @var{insn} is the
3118 first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
3119 is the insn containing the @code{sequence} expression, as is the value
3120 of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
3121 insn in the @code{sequence} expression. You can use these expressions
3122 to find the containing @code{sequence} expression.
3124 Every insn has one of the following six expression codes:
3129 The expression code @code{insn} is used for instructions that do not jump
3130 and do not do function calls. @code{sequence} expressions are always
3131 contained in insns with code @code{insn} even if one of those insns
3132 should jump or do function calls.
3134 Insns with code @code{insn} have four additional fields beyond the three
3135 mandatory ones listed above. These four are described in a table below.
3139 The expression code @code{jump_insn} is used for instructions that may
3140 jump (or, more generally, may contain @code{label_ref} expressions). If
3141 there is an instruction to return from the current function, it is
3142 recorded as a @code{jump_insn}.
3145 @code{jump_insn} insns have the same extra fields as @code{insn} insns,
3146 accessed in the same way and in addition contain a field
3147 @code{JUMP_LABEL} which is defined once jump optimization has completed.
3149 For simple conditional and unconditional jumps, this field contains
3150 the @code{code_label} to which this insn will (possibly conditionally)
3151 branch. In a more complex jump, @code{JUMP_LABEL} records one of the
3152 labels that the insn refers to; the only way to find the others is to
3153 scan the entire body of the insn. In an @code{addr_vec},
3154 @code{JUMP_LABEL} is @code{NULL_RTX}.
3156 Return insns count as jumps, but since they do not refer to any
3157 labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
3161 The expression code @code{call_insn} is used for instructions that may do
3162 function calls. It is important to distinguish these instructions because
3163 they imply that certain registers and memory locations may be altered
3166 @findex CALL_INSN_FUNCTION_USAGE
3167 @code{call_insn} insns have the same extra fields as @code{insn} insns,
3168 accessed in the same way and in addition contain a field
3169 @code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
3170 @code{expr_list} expressions) containing @code{use} and @code{clobber}
3171 expressions that denote hard registers and @code{MEM}s used or
3172 clobbered by the called function.
3174 A @code{MEM} generally points to a stack slots in which arguments passed
3175 to the libcall by reference (@pxref{Register Arguments,
3176 TARGET_PASS_BY_REFERENCE}) are stored. If the argument is
3177 caller-copied (@pxref{Register Arguments, TARGET_CALLEE_COPIES}),
3178 the stack slot will be mentioned in @code{CLOBBER} and @code{USE}
3179 entries; if it's callee-copied, only a @code{USE} will appear, and the
3180 @code{MEM} may point to addresses that are not stack slots.
3182 @code{CLOBBER}ed registers in this list augment registers specified in
3183 @code{CALL_USED_REGISTERS} (@pxref{Register Basics}).
3186 @findex CODE_LABEL_NUMBER
3188 A @code{code_label} insn represents a label that a jump insn can jump
3189 to. It contains two special fields of data in addition to the three
3190 standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
3191 number}, a number that identifies this label uniquely among all the
3192 labels in the compilation (not just in the current function).
3193 Ultimately, the label is represented in the assembler output as an
3194 assembler label, usually of the form @samp{L@var{n}} where @var{n} is
3197 When a @code{code_label} appears in an RTL expression, it normally
3198 appears within a @code{label_ref} which represents the address of
3199 the label, as a number.
3201 Besides as a @code{code_label}, a label can also be represented as a
3202 @code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
3205 The field @code{LABEL_NUSES} is only defined once the jump optimization
3206 phase is completed. It contains the number of times this label is
3207 referenced in the current function.
3210 @findex SET_LABEL_KIND
3211 @findex LABEL_ALT_ENTRY_P
3212 @cindex alternate entry points
3213 The field @code{LABEL_KIND} differentiates four different types of
3214 labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY},
3215 @code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}. The only labels
3216 that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry
3217 points} to the current function. These may be static (visible only in
3218 the containing translation unit), global (exposed to all translation
3219 units), or weak (global, but can be overridden by another symbol with the
3222 Much of the compiler treats all four kinds of label identically. Some
3223 of it needs to know whether or not a label is an alternate entry point;
3224 for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided. It is
3225 equivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}.
3226 The only place that cares about the distinction between static, global,
3227 and weak alternate entry points, besides the front-end code that creates
3228 them, is the function @code{output_alternate_entry_point}, in
3231 To set the kind of a label, use the @code{SET_LABEL_KIND} macro.
3235 Barriers are placed in the instruction stream when control cannot flow
3236 past them. They are placed after unconditional jump instructions to
3237 indicate that the jumps are unconditional and after calls to
3238 @code{volatile} functions, which do not return (e.g., @code{exit}).
3239 They contain no information beyond the three standard fields.
3242 @findex NOTE_LINE_NUMBER
3243 @findex NOTE_SOURCE_FILE
3245 @code{note} insns are used to represent additional debugging and
3246 declarative information. They contain two nonstandard fields, an
3247 integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
3248 string accessed with @code{NOTE_SOURCE_FILE}.
3250 If @code{NOTE_LINE_NUMBER} is positive, the note represents the
3251 position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
3252 that the line came from. These notes control generation of line
3253 number data in the assembler output.
3255 Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
3256 code with one of the following values (and @code{NOTE_SOURCE_FILE}
3257 must contain a null pointer):
3260 @findex NOTE_INSN_DELETED
3261 @item NOTE_INSN_DELETED
3262 Such a note is completely ignorable. Some passes of the compiler
3263 delete insns by altering them into notes of this kind.
3265 @findex NOTE_INSN_DELETED_LABEL
3266 @item NOTE_INSN_DELETED_LABEL
3267 This marks what used to be a @code{code_label}, but was not used for other
3268 purposes than taking its address and was transformed to mark that no
3271 @findex NOTE_INSN_BLOCK_BEG
3272 @findex NOTE_INSN_BLOCK_END
3273 @item NOTE_INSN_BLOCK_BEG
3274 @itemx NOTE_INSN_BLOCK_END
3275 These types of notes indicate the position of the beginning and end
3276 of a level of scoping of variable names. They control the output
3277 of debugging information.
3279 @findex NOTE_INSN_EH_REGION_BEG
3280 @findex NOTE_INSN_EH_REGION_END
3281 @item NOTE_INSN_EH_REGION_BEG
3282 @itemx NOTE_INSN_EH_REGION_END
3283 These types of notes indicate the position of the beginning and end of a
3284 level of scoping for exception handling. @code{NOTE_BLOCK_NUMBER}
3285 identifies which @code{CODE_LABEL} or @code{note} of type
3286 @code{NOTE_INSN_DELETED_LABEL} is associated with the given region.
3288 @findex NOTE_INSN_LOOP_BEG
3289 @findex NOTE_INSN_LOOP_END
3290 @item NOTE_INSN_LOOP_BEG
3291 @itemx NOTE_INSN_LOOP_END
3292 These types of notes indicate the position of the beginning and end
3293 of a @code{while} or @code{for} loop. They enable the loop optimizer
3294 to find loops quickly.
3296 @findex NOTE_INSN_LOOP_CONT
3297 @item NOTE_INSN_LOOP_CONT
3298 Appears at the place in a loop that @code{continue} statements jump to.
3300 @findex NOTE_INSN_LOOP_VTOP
3301 @item NOTE_INSN_LOOP_VTOP
3302 This note indicates the place in a loop where the exit test begins for
3303 those loops in which the exit test has been duplicated. This position
3304 becomes another virtual start of the loop when considering loop
3307 @findex NOTE_INSN_FUNCTION_BEG
3308 @item NOTE_INSN_FUNCTION_BEG
3309 Appears at the start of the function body, after the function
3314 These codes are printed symbolically when they appear in debugging dumps.
3317 @cindex @code{TImode}, in @code{insn}
3318 @cindex @code{HImode}, in @code{insn}
3319 @cindex @code{QImode}, in @code{insn}
3320 The machine mode of an insn is normally @code{VOIDmode}, but some
3321 phases use the mode for various purposes.
3323 The common subexpression elimination pass sets the mode of an insn to
3324 @code{QImode} when it is the first insn in a block that has already
3327 The second Haifa scheduling pass, for targets that can multiple issue,
3328 sets the mode of an insn to @code{TImode} when it is believed that the
3329 instruction begins an issue group. That is, when the instruction
3330 cannot issue simultaneously with the previous. This may be relied on
3331 by later passes, in particular machine-dependent reorg.
3333 Here is a table of the extra fields of @code{insn}, @code{jump_insn}
3334 and @code{call_insn} insns:
3338 @item PATTERN (@var{i})
3339 An expression for the side effect performed by this insn. This must be
3340 one of the following codes: @code{set}, @code{call}, @code{use},
3341 @code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
3342 @code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
3343 @code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a @code{parallel},
3344 each element of the @code{parallel} must be one these codes, except that
3345 @code{parallel} expressions cannot be nested and @code{addr_vec} and
3346 @code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
3349 @item INSN_CODE (@var{i})
3350 An integer that says which pattern in the machine description matches
3351 this insn, or @minus{}1 if the matching has not yet been attempted.
3353 Such matching is never attempted and this field remains @minus{}1 on an insn
3354 whose pattern consists of a single @code{use}, @code{clobber},
3355 @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
3357 @findex asm_noperands
3358 Matching is also never attempted on insns that result from an @code{asm}
3359 statement. These contain at least one @code{asm_operands} expression.
3360 The function @code{asm_noperands} returns a non-negative value for
3363 In the debugging output, this field is printed as a number followed by
3364 a symbolic representation that locates the pattern in the @file{md}
3365 file as some small positive or negative offset from a named pattern.
3368 @item LOG_LINKS (@var{i})
3369 A list (chain of @code{insn_list} expressions) giving information about
3370 dependencies between instructions within a basic block. Neither a jump
3371 nor a label may come between the related insns. These are only used by
3372 the schedulers and by combine. This is a deprecated data structure.
3373 Def-use and use-def chains are now preferred.
3376 @item REG_NOTES (@var{i})
3377 A list (chain of @code{expr_list} and @code{insn_list} expressions)
3378 giving miscellaneous information about the insn. It is often
3379 information pertaining to the registers used in this insn.
3382 The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
3383 expressions. Each of these has two operands: the first is an insn,
3384 and the second is another @code{insn_list} expression (the next one in
3385 the chain). The last @code{insn_list} in the chain has a null pointer
3386 as second operand. The significant thing about the chain is which
3387 insns appear in it (as first operands of @code{insn_list}
3388 expressions). Their order is not significant.
3390 This list is originally set up by the flow analysis pass; it is a null
3391 pointer until then. Flow only adds links for those data dependencies
3392 which can be used for instruction combination. For each insn, the flow
3393 analysis pass adds a link to insns which store into registers values
3394 that are used for the first time in this insn.
3396 The @code{REG_NOTES} field of an insn is a chain similar to the
3397 @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
3398 addition to @code{insn_list} expressions. There are several kinds of
3399 register notes, which are distinguished by the machine mode, which in a
3400 register note is really understood as being an @code{enum reg_note}.
3401 The first operand @var{op} of the note is data whose meaning depends on
3404 @findex REG_NOTE_KIND
3405 @findex PUT_REG_NOTE_KIND
3406 The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
3407 register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
3408 (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
3411 Register notes are of three classes: They may say something about an
3412 input to an insn, they may say something about an output of an insn, or
3413 they may create a linkage between two insns. There are also a set
3414 of values that are only used in @code{LOG_LINKS}.
3416 These register notes annotate inputs to an insn:
3421 The value in @var{op} dies in this insn; that is to say, altering the
3422 value immediately after this insn would not affect the future behavior
3425 It does not follow that the register @var{op} has no useful value after
3426 this insn since @var{op} is not necessarily modified by this insn.
3427 Rather, no subsequent instruction uses the contents of @var{op}.
3431 The register @var{op} being set by this insn will not be used in a
3432 subsequent insn. This differs from a @code{REG_DEAD} note, which
3433 indicates that the value in an input will not be used subsequently.
3434 These two notes are independent; both may be present for the same
3439 The register @var{op} is incremented (or decremented; at this level
3440 there is no distinction) by an embedded side effect inside this insn.
3441 This means it appears in a @code{post_inc}, @code{pre_inc},
3442 @code{post_dec} or @code{pre_dec} expression.
3446 The register @var{op} is known to have a nonnegative value when this
3447 insn is reached. This is used so that decrement and branch until zero
3448 instructions, such as the m68k dbra, can be matched.
3450 The @code{REG_NONNEG} note is added to insns only if the machine
3451 description has a @samp{decrement_and_branch_until_zero} pattern.
3453 @findex REG_NO_CONFLICT
3454 @item REG_NO_CONFLICT
3455 This insn does not cause a conflict between @var{op} and the item
3456 being set by this insn even though it might appear that it does.
3457 In other words, if the destination register and @var{op} could
3458 otherwise be assigned the same register, this insn does not
3459 prevent that assignment.
3461 Insns with this note are usually part of a block that begins with a
3462 @code{clobber} insn specifying a multi-word pseudo register (which will
3463 be the output of the block), a group of insns that each set one word of
3464 the value and have the @code{REG_NO_CONFLICT} note attached, and a final
3465 insn that copies the output to itself with an attached @code{REG_EQUAL}
3466 note giving the expression being computed. This block is encapsulated
3467 with @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and
3468 last insns, respectively.
3472 This insn uses @var{op}, a @code{code_label} or a @code{note} of type
3473 @code{NOTE_INSN_DELETED_LABEL}, but is not a
3474 @code{jump_insn}, or it is a @code{jump_insn} that required the label to
3475 be held in a register. The presence of this note allows jump
3476 optimization to be aware that @var{op} is, in fact, being used, and flow
3477 optimization to build an accurate flow graph.
3479 @findex REG_CROSSING_JUMP
3480 @item REG_CROSSING_JUMP
3481 This insn is an branching instruction (either an unconditional jump or
3482 an indirect jump) which crosses between hot and cold sections, which
3483 could potentially be very far apart in the executable. The presence
3484 of this note indicates to other optimizations that this this branching
3485 instruction should not be ``collapsed'' into a simpler branching
3486 construct. It is used when the optimization to partition basic blocks
3487 into hot and cold sections is turned on.
3491 Appears attached to each @code{CALL_INSN} to @code{setjmp} or a
3495 The following notes describe attributes of outputs of an insn:
3502 This note is only valid on an insn that sets only one register and
3503 indicates that that register will be equal to @var{op} at run time; the
3504 scope of this equivalence differs between the two types of notes. The
3505 value which the insn explicitly copies into the register may look
3506 different from @var{op}, but they will be equal at run time. If the
3507 output of the single @code{set} is a @code{strict_low_part} expression,
3508 the note refers to the register that is contained in @code{SUBREG_REG}
3509 of the @code{subreg} expression.
3511 For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
3512 the entire function, and could validly be replaced in all its
3513 occurrences by @var{op}. (``Validly'' here refers to the data flow of
3514 the program; simple replacement may make some insns invalid.) For
3515 example, when a constant is loaded into a register that is never
3516 assigned any other value, this kind of note is used.
3518 When a parameter is copied into a pseudo-register at entry to a function,
3519 a note of this kind records that the register is equivalent to the stack
3520 slot where the parameter was passed. Although in this case the register
3521 may be set by other insns, it is still valid to replace the register
3522 by the stack slot throughout the function.
3524 A @code{REG_EQUIV} note is also used on an instruction which copies a
3525 register parameter into a pseudo-register at entry to a function, if
3526 there is a stack slot where that parameter could be stored. Although
3527 other insns may set the pseudo-register, it is valid for the compiler to
3528 replace the pseudo-register by stack slot throughout the function,
3529 provided the compiler ensures that the stack slot is properly
3530 initialized by making the replacement in the initial copy instruction as
3531 well. This is used on machines for which the calling convention
3532 allocates stack space for register parameters. See
3533 @code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
3535 In the case of @code{REG_EQUAL}, the register that is set by this insn
3536 will be equal to @var{op} at run time at the end of this insn but not
3537 necessarily elsewhere in the function. In this case, @var{op}
3538 is typically an arithmetic expression. For example, when a sequence of
3539 insns such as a library call is used to perform an arithmetic operation,
3540 this kind of note is attached to the insn that produces or copies the
3543 These two notes are used in different ways by the compiler passes.
3544 @code{REG_EQUAL} is used by passes prior to register allocation (such as
3545 common subexpression elimination and loop optimization) to tell them how
3546 to think of that value. @code{REG_EQUIV} notes are used by register
3547 allocation to indicate that there is an available substitute expression
3548 (either a constant or a @code{mem} expression for the location of a
3549 parameter on the stack) that may be used in place of a register if
3550 insufficient registers are available.
3552 Except for stack homes for parameters, which are indicated by a
3553 @code{REG_EQUIV} note and are not useful to the early optimization
3554 passes and pseudo registers that are equivalent to a memory location
3555 throughout their entire life, which is not detected until later in
3556 the compilation, all equivalences are initially indicated by an attached
3557 @code{REG_EQUAL} note. In the early stages of register allocation, a
3558 @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
3559 @var{op} is a constant and the insn represents the only set of its
3560 destination register.
3562 Thus, compiler passes prior to register allocation need only check for
3563 @code{REG_EQUAL} notes and passes subsequent to register allocation
3564 need only check for @code{REG_EQUIV} notes.
3567 These notes describe linkages between insns. They occur in pairs: one
3568 insn has one of a pair of notes that points to a second insn, which has
3569 the inverse note pointing back to the first insn.
3574 This insn copies the value of a multi-insn sequence (for example, a
3575 library call), and @var{op} is the first insn of the sequence (for a
3576 library call, the first insn that was generated to set up the arguments
3577 for the library call).
3579 Loop optimization uses this note to treat such a sequence as a single
3580 operation for code motion purposes and flow analysis uses this note to
3581 delete such sequences whose results are dead.
3583 A @code{REG_EQUAL} note will also usually be attached to this insn to
3584 provide the expression being computed by the sequence.
3586 These notes will be deleted after reload, since they are no longer
3591 This is the inverse of @code{REG_RETVAL}: it is placed on the first
3592 insn of a multi-insn sequence, and it points to the last one.
3594 These notes are deleted after reload, since they are no longer useful or
3597 @findex REG_CC_SETTER
3601 On machines that use @code{cc0}, the insns which set and use @code{cc0}
3602 set and use @code{cc0} are adjacent. However, when branch delay slot
3603 filling is done, this may no longer be true. In this case a
3604 @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
3605 point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
3606 be placed on the insn using @code{cc0} to point to the insn setting
3610 These values are only used in the @code{LOG_LINKS} field, and indicate
3611 the type of dependency that each link represents. Links which indicate
3612 a data dependence (a read after write dependence) do not use any code,
3613 they simply have mode @code{VOIDmode}, and are printed without any
3617 @findex REG_DEP_TRUE
3619 This indicates a true dependence (a read after write dependence).
3621 @findex REG_DEP_OUTPUT
3622 @item REG_DEP_OUTPUT
3623 This indicates an output dependence (a write after write dependence).
3625 @findex REG_DEP_ANTI
3627 This indicates an anti dependence (a write after read dependence).
3631 These notes describe information gathered from gcov profile data. They
3632 are stored in the @code{REG_NOTES} field of an insn as an
3638 This is used to specify the ratio of branches to non-branches of a
3639 branch insn according to the profile data. The value is stored as a
3640 value between 0 and REG_BR_PROB_BASE; larger values indicate a higher
3641 probability that the branch will be taken.
3645 These notes are found in JUMP insns after delayed branch scheduling
3646 has taken place. They indicate both the direction and the likelihood
3647 of the JUMP@. The format is a bitmask of ATTR_FLAG_* values.
3649 @findex REG_FRAME_RELATED_EXPR
3650 @item REG_FRAME_RELATED_EXPR
3651 This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
3652 is used in place of the actual insn pattern. This is done in cases where
3653 the pattern is either complex or misleading.
3655 @findex REG_LIBCALL_ID
3656 @item REG_LIBCALL_ID
3657 This is used to specify that an insn is part of a libcall. Each libcall
3658 in a function has a unique id, and all the insns that are part of that
3659 libcall will have a REG_LIBCALL_ID note attached with the same ID.
3662 For convenience, the machine mode in an @code{insn_list} or
3663 @code{expr_list} is printed using these symbolic codes in debugging dumps.
3667 The only difference between the expression codes @code{insn_list} and
3668 @code{expr_list} is that the first operand of an @code{insn_list} is
3669 assumed to be an insn and is printed in debugging dumps as the insn's
3670 unique id; the first operand of an @code{expr_list} is printed in the
3671 ordinary way as an expression.
3674 @section RTL Representation of Function-Call Insns
3675 @cindex calling functions in RTL
3676 @cindex RTL function-call insns
3677 @cindex function-call insns
3679 Insns that call subroutines have the RTL expression code @code{call_insn}.
3680 These insns must satisfy special rules, and their bodies must use a special
3681 RTL expression code, @code{call}.
3683 @cindex @code{call} usage
3684 A @code{call} expression has two operands, as follows:
3687 (call (mem:@var{fm} @var{addr}) @var{nbytes})
3691 Here @var{nbytes} is an operand that represents the number of bytes of
3692 argument data being passed to the subroutine, @var{fm} is a machine mode
3693 (which must equal as the definition of the @code{FUNCTION_MODE} macro in
3694 the machine description) and @var{addr} represents the address of the
3697 For a subroutine that returns no value, the @code{call} expression as
3698 shown above is the entire body of the insn, except that the insn might
3699 also contain @code{use} or @code{clobber} expressions.
3701 @cindex @code{BLKmode}, and function return values
3702 For a subroutine that returns a value whose mode is not @code{BLKmode},
3703 the value is returned in a hard register. If this register's number is
3704 @var{r}, then the body of the call insn looks like this:
3707 (set (reg:@var{m} @var{r})
3708 (call (mem:@var{fm} @var{addr}) @var{nbytes}))
3712 This RTL expression makes it clear (to the optimizer passes) that the
3713 appropriate register receives a useful value in this insn.
3715 When a subroutine returns a @code{BLKmode} value, it is handled by
3716 passing to the subroutine the address of a place to store the value.
3717 So the call insn itself does not ``return'' any value, and it has the
3718 same RTL form as a call that returns nothing.
3720 On some machines, the call instruction itself clobbers some register,
3721 for example to contain the return address. @code{call_insn} insns
3722 on these machines should have a body which is a @code{parallel}
3723 that contains both the @code{call} expression and @code{clobber}
3724 expressions that indicate which registers are destroyed. Similarly,
3725 if the call instruction requires some register other than the stack
3726 pointer that is not explicitly mentioned in its RTL, a @code{use}
3727 subexpression should mention that register.
3729 Functions that are called are assumed to modify all registers listed in
3730 the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
3731 Basics}) and, with the exception of @code{const} functions and library
3732 calls, to modify all of memory.
3734 Insns containing just @code{use} expressions directly precede the
3735 @code{call_insn} insn to indicate which registers contain inputs to the
3736 function. Similarly, if registers other than those in
3737 @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
3738 containing a single @code{clobber} follow immediately after the call to
3739 indicate which registers.
3742 @section Structure Sharing Assumptions
3743 @cindex sharing of RTL components
3744 @cindex RTL structure sharing assumptions
3746 The compiler assumes that certain kinds of RTL expressions are unique;
3747 there do not exist two distinct objects representing the same value.
3748 In other cases, it makes an opposite assumption: that no RTL expression
3749 object of a certain kind appears in more than one place in the
3750 containing structure.
3752 These assumptions refer to a single function; except for the RTL
3753 objects that describe global variables and external functions,
3754 and a few standard objects such as small integer constants,
3755 no RTL objects are common to two functions.
3758 @cindex @code{reg}, RTL sharing
3760 Each pseudo-register has only a single @code{reg} object to represent it,
3761 and therefore only a single machine mode.
3763 @cindex symbolic label
3764 @cindex @code{symbol_ref}, RTL sharing
3766 For any symbolic label, there is only one @code{symbol_ref} object
3769 @cindex @code{const_int}, RTL sharing
3771 All @code{const_int} expressions with equal values are shared.
3773 @cindex @code{pc}, RTL sharing
3775 There is only one @code{pc} expression.
3777 @cindex @code{cc0}, RTL sharing
3779 There is only one @code{cc0} expression.
3781 @cindex @code{const_double}, RTL sharing
3783 There is only one @code{const_double} expression with value 0 for
3784 each floating point mode. Likewise for values 1 and 2.
3786 @cindex @code{const_vector}, RTL sharing
3788 There is only one @code{const_vector} expression with value 0 for
3789 each vector mode, be it an integer or a double constant vector.
3791 @cindex @code{label_ref}, RTL sharing
3792 @cindex @code{scratch}, RTL sharing
3794 No @code{label_ref} or @code{scratch} appears in more than one place in
3795 the RTL structure; in other words, it is safe to do a tree-walk of all
3796 the insns in the function and assume that each time a @code{label_ref}
3797 or @code{scratch} is seen it is distinct from all others that are seen.
3799 @cindex @code{mem}, RTL sharing
3801 Only one @code{mem} object is normally created for each static
3802 variable or stack slot, so these objects are frequently shared in all
3803 the places they appear. However, separate but equal objects for these
3804 variables are occasionally made.
3806 @cindex @code{asm_operands}, RTL sharing
3808 When a single @code{asm} statement has multiple output operands, a
3809 distinct @code{asm_operands} expression is made for each output operand.
3810 However, these all share the vector which contains the sequence of input
3811 operands. This sharing is used later on to test whether two
3812 @code{asm_operands} expressions come from the same statement, so all
3813 optimizations must carefully preserve the sharing if they copy the
3817 No RTL object appears in more than one place in the RTL structure
3818 except as described above. Many passes of the compiler rely on this
3819 by assuming that they can modify RTL objects in place without unwanted
3820 side-effects on other insns.
3822 @findex unshare_all_rtl
3824 During initial RTL generation, shared structure is freely introduced.
3825 After all the RTL for a function has been generated, all shared
3826 structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
3827 after which the above rules are guaranteed to be followed.
3829 @findex copy_rtx_if_shared
3831 During the combiner pass, shared structure within an insn can exist
3832 temporarily. However, the shared structure is copied before the
3833 combiner is finished with the insn. This is done by calling
3834 @code{copy_rtx_if_shared}, which is a subroutine of
3835 @code{unshare_all_rtl}.
3839 @section Reading RTL
3841 To read an RTL object from a file, call @code{read_rtx}. It takes one
3842 argument, a stdio stream, and returns a single RTL object. This routine
3843 is defined in @file{read-rtl.c}. It is not available in the compiler
3844 itself, only the various programs that generate the compiler back end
3845 from the machine description.
3847 People frequently have the idea of using RTL stored as text in a file as
3848 an interface between a language front end and the bulk of GCC@. This
3849 idea is not feasible.
3851 GCC was designed to use RTL internally only. Correct RTL for a given
3852 program is very dependent on the particular target machine. And the RTL
3853 does not contain all the information about the program.
3855 The proper way to interface GCC to a new language front end is with
3856 the ``tree'' data structure, described in the files @file{tree.h} and
3857 @file{tree.def}. The documentation for this structure (@pxref{Trees})