1 @c Copyright (C) 1988, 1989, 1992, 1994, 1997, 1998, 1999, 2000, 2001, 2002,
2 @c 2003, 2004, 2005, 2006, 2007, 2008
3 @c Free Software Foundation, Inc.
4 @c This is part of the GCC manual.
5 @c For copying conditions, see the file gcc.texi.
8 @chapter RTL Representation
9 @cindex RTL representation
10 @cindex representation of RTL
11 @cindex Register Transfer Language (RTL)
13 The last part of the compiler work is done on a low-level intermediate
14 representation called Register Transfer Language. In this language, the
15 instructions to be output are described, pretty much one by one, in an
16 algebraic form that describes what the instruction does.
18 RTL is inspired by Lisp lists. It has both an internal form, made up of
19 structures that point at other structures, and a textual form that is used
20 in the machine description and in printed debugging dumps. The textual
21 form uses nested parentheses to indicate the pointers in the internal form.
24 * RTL Objects:: Expressions vs vectors vs strings vs integers.
25 * RTL Classes:: Categories of RTL expression objects, and their structure.
26 * Accessors:: Macros to access expression operands or vector elts.
27 * Special Accessors:: Macros to access specific annotations on RTL.
28 * Flags:: Other flags in an RTL expression.
29 * Machine Modes:: Describing the size and format of a datum.
30 * Constants:: Expressions with constant values.
31 * Regs and Memory:: Expressions representing register contents or memory.
32 * Arithmetic:: Expressions representing arithmetic on other expressions.
33 * Comparisons:: Expressions representing comparison of expressions.
34 * Bit-Fields:: Expressions representing bit-fields in memory or reg.
35 * Vector Operations:: Expressions involving vector datatypes.
36 * Conversions:: Extending, truncating, floating or fixing.
37 * RTL Declarations:: Declaring volatility, constancy, etc.
38 * Side Effects:: Expressions for storing in registers, etc.
39 * Incdec:: Embedded side-effects for autoincrement addressing.
40 * Assembler:: Representing @code{asm} with operands.
41 * Insns:: Expression types for entire insns.
42 * Calls:: RTL representation of function call insns.
43 * Sharing:: Some expressions are unique; others *must* be copied.
44 * Reading RTL:: Reading textual RTL from a file.
48 @section RTL Object Types
49 @cindex RTL object types
54 @cindex RTL expression
56 RTL uses five kinds of objects: expressions, integers, wide integers,
57 strings and vectors. Expressions are the most important ones. An RTL
58 expression (``RTX'', for short) is a C structure, but it is usually
59 referred to with a pointer; a type that is given the typedef name
62 An integer is simply an @code{int}; their written form uses decimal
63 digits. A wide integer is an integral object whose type is
64 @code{HOST_WIDE_INT}; their written form uses decimal digits.
66 A string is a sequence of characters. In core it is represented as a
67 @code{char *} in usual C fashion, and it is written in C syntax as well.
68 However, strings in RTL may never be null. If you write an empty string in
69 a machine description, it is represented in core as a null pointer rather
70 than as a pointer to a null character. In certain contexts, these null
71 pointers instead of strings are valid. Within RTL code, strings are most
72 commonly found inside @code{symbol_ref} expressions, but they appear in
73 other contexts in the RTL expressions that make up machine descriptions.
75 In a machine description, strings are normally written with double
76 quotes, as you would in C@. However, strings in machine descriptions may
77 extend over many lines, which is invalid C, and adjacent string
78 constants are not concatenated as they are in C@. Any string constant
79 may be surrounded with a single set of parentheses. Sometimes this
80 makes the machine description easier to read.
82 There is also a special syntax for strings, which can be useful when C
83 code is embedded in a machine description. Wherever a string can
84 appear, it is also valid to write a C-style brace block. The entire
85 brace block, including the outermost pair of braces, is considered to be
86 the string constant. Double quote characters inside the braces are not
87 special. Therefore, if you write string constants in the C code, you
88 need not escape each quote character with a backslash.
90 A vector contains an arbitrary number of pointers to expressions. The
91 number of elements in the vector is explicitly present in the vector.
92 The written form of a vector consists of square brackets
93 (@samp{[@dots{}]}) surrounding the elements, in sequence and with
94 whitespace separating them. Vectors of length zero are not created;
95 null pointers are used instead.
97 @cindex expression codes
98 @cindex codes, RTL expression
101 Expressions are classified by @dfn{expression codes} (also called RTX
102 codes). The expression code is a name defined in @file{rtl.def}, which is
103 also (in uppercase) a C enumeration constant. The possible expression
104 codes and their meanings are machine-independent. The code of an RTX can
105 be extracted with the macro @code{GET_CODE (@var{x})} and altered with
106 @code{PUT_CODE (@var{x}, @var{newcode})}.
108 The expression code determines how many operands the expression contains,
109 and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
110 by looking at an operand what kind of object it is. Instead, you must know
111 from its context---from the expression code of the containing expression.
112 For example, in an expression of code @code{subreg}, the first operand is
113 to be regarded as an expression and the second operand as an integer. In
114 an expression of code @code{plus}, there are two operands, both of which
115 are to be regarded as expressions. In a @code{symbol_ref} expression,
116 there is one operand, which is to be regarded as a string.
118 Expressions are written as parentheses containing the name of the
119 expression type, its flags and machine mode if any, and then the operands
120 of the expression (separated by spaces).
122 Expression code names in the @samp{md} file are written in lowercase,
123 but when they appear in C code they are written in uppercase. In this
124 manual, they are shown as follows: @code{const_int}.
128 In a few contexts a null pointer is valid where an expression is normally
129 wanted. The written form of this is @code{(nil)}.
132 @section RTL Classes and Formats
134 @cindex classes of RTX codes
135 @cindex RTX codes, classes of
136 @findex GET_RTX_CLASS
138 The various expression codes are divided into several @dfn{classes},
139 which are represented by single characters. You can determine the class
140 of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
141 Currently, @file{rtl.def} defines these classes:
145 An RTX code that represents an actual object, such as a register
146 (@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
147 @code{LO_SUM}) is also included; instead, @code{SUBREG} and
148 @code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
151 An RTX code that represents a constant object. @code{HIGH} is also
152 included in this class.
155 An RTX code for a non-symmetric comparison, such as @code{GEU} or
158 @item RTX_COMM_COMPARE
159 An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
163 An RTX code for a unary arithmetic operation, such as @code{NEG},
164 @code{NOT}, or @code{ABS}. This category also includes value extension
165 (sign or zero) and conversions between integer and floating point.
168 An RTX code for a commutative binary operation, such as @code{PLUS} or
169 @code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class
173 An RTX code for a non-commutative binary operation, such as @code{MINUS},
174 @code{DIV}, or @code{ASHIFTRT}.
176 @item RTX_BITFIELD_OPS
177 An RTX code for a bit-field operation. Currently only
178 @code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs
179 and are lvalues (so they can be used for insertion as well).
183 An RTX code for other three input operations. Currently only
184 @code{IF_THEN_ELSE} and @code{VEC_MERGE}.
187 An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and
188 @code{CALL_INSN}. @xref{Insns}.
191 An RTX code for something that matches in insns, such as
192 @code{MATCH_DUP}. These only occur in machine descriptions.
195 An RTX code for an auto-increment addressing mode, such as
199 All other RTX codes. This category includes the remaining codes used
200 only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
201 all the codes describing side effects (@code{SET}, @code{USE},
202 @code{CLOBBER}, etc.) and the non-insns that may appear on an insn
203 chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
204 @code{SUBREG} is also part of this class.
208 For each expression code, @file{rtl.def} specifies the number of
209 contained objects and their kinds using a sequence of characters
210 called the @dfn{format} of the expression code. For example,
211 the format of @code{subreg} is @samp{ei}.
213 @cindex RTL format characters
214 These are the most commonly used format characters:
218 An expression (actually a pointer to an expression).
230 A vector of expressions.
233 A few other format characters are used occasionally:
237 @samp{u} is equivalent to @samp{e} except that it is printed differently
238 in debugging dumps. It is used for pointers to insns.
241 @samp{n} is equivalent to @samp{i} except that it is printed differently
242 in debugging dumps. It is used for the line number or code number of a
246 @samp{S} indicates a string which is optional. In the RTL objects in
247 core, @samp{S} is equivalent to @samp{s}, but when the object is read,
248 from an @samp{md} file, the string value of this operand may be omitted.
249 An omitted string is taken to be the null string.
252 @samp{V} indicates a vector which is optional. In the RTL objects in
253 core, @samp{V} is equivalent to @samp{E}, but when the object is read
254 from an @samp{md} file, the vector value of this operand may be omitted.
255 An omitted vector is effectively the same as a vector of no elements.
258 @samp{B} indicates a pointer to basic block structure.
261 @samp{0} means a slot whose contents do not fit any normal category.
262 @samp{0} slots are not printed at all in dumps, and are often used in
263 special ways by small parts of the compiler.
266 There are macros to get the number of operands and the format
267 of an expression code:
270 @findex GET_RTX_LENGTH
271 @item GET_RTX_LENGTH (@var{code})
272 Number of operands of an RTX of code @var{code}.
274 @findex GET_RTX_FORMAT
275 @item GET_RTX_FORMAT (@var{code})
276 The format of an RTX of code @var{code}, as a C string.
279 Some classes of RTX codes always have the same format. For example, it
280 is safe to assume that all comparison operations have format @code{ee}.
284 All codes of this class have format @code{e}.
289 All codes of these classes have format @code{ee}.
293 All codes of these classes have format @code{eee}.
296 All codes of this class have formats that begin with @code{iuueiee}.
297 @xref{Insns}. Note that not all RTL objects linked onto an insn chain
298 are of class @code{i}.
303 You can make no assumptions about the format of these codes.
307 @section Access to Operands
309 @cindex access to operands
310 @cindex operand access
316 Operands of expressions are accessed using the macros @code{XEXP},
317 @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
318 two arguments: an expression-pointer (RTX) and an operand number
319 (counting from zero). Thus,
326 accesses operand 2 of expression @var{x}, as an expression.
333 accesses the same operand as an integer. @code{XSTR}, used in the same
334 fashion, would access it as a string.
336 Any operand can be accessed as an integer, as an expression or as a string.
337 You must choose the correct method of access for the kind of value actually
338 stored in the operand. You would do this based on the expression code of
339 the containing expression. That is also how you would know how many
342 For example, if @var{x} is a @code{subreg} expression, you know that it has
343 two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
344 and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
345 would get the address of the expression operand but cast as an integer;
346 that might occasionally be useful, but it would be cleaner to write
347 @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
348 compile without error, and would return the second, integer operand cast as
349 an expression pointer, which would probably result in a crash when
350 accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
351 but this will access memory past the end of the expression with
352 unpredictable results.
354 Access to operands which are vectors is more complicated. You can use the
355 macro @code{XVEC} to get the vector-pointer itself, or the macros
356 @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
361 @item XVEC (@var{exp}, @var{idx})
362 Access the vector-pointer which is operand number @var{idx} in @var{exp}.
365 @item XVECLEN (@var{exp}, @var{idx})
366 Access the length (number of elements) in the vector which is
367 in operand number @var{idx} in @var{exp}. This value is an @code{int}.
370 @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
371 Access element number @var{eltnum} in the vector which is
372 in operand number @var{idx} in @var{exp}. This value is an RTX@.
374 It is up to you to make sure that @var{eltnum} is not negative
375 and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
378 All the macros defined in this section expand into lvalues and therefore
379 can be used to assign the operands, lengths and vector elements as well as
382 @node Special Accessors
383 @section Access to Special Operands
384 @cindex access to special operands
386 Some RTL nodes have special annotations associated with them.
391 @findex MEM_ALIAS_SET
392 @item MEM_ALIAS_SET (@var{x})
393 If 0, @var{x} is not in any alias set, and may alias anything. Otherwise,
394 @var{x} can only alias @code{MEM}s in a conflicting alias set. This value
395 is set in a language-dependent manner in the front-end, and should not be
396 altered in the back-end. In some front-ends, these numbers may correspond
397 in some way to types, or other language-level entities, but they need not,
398 and the back-end makes no such assumptions.
399 These set numbers are tested with @code{alias_sets_conflict_p}.
402 @item MEM_EXPR (@var{x})
403 If this register is known to hold the value of some user-level
404 declaration, this is that tree node. It may also be a
405 @code{COMPONENT_REF}, in which case this is some field reference,
406 and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration,
407 or another @code{COMPONENT_REF}, or null if there is no compile-time
408 object associated with the reference.
411 @item MEM_OFFSET (@var{x})
412 The offset from the start of @code{MEM_EXPR} as a @code{CONST_INT} rtx.
415 @item MEM_SIZE (@var{x})
416 The size in bytes of the memory reference as a @code{CONST_INT} rtx.
417 This is mostly relevant for @code{BLKmode} references as otherwise
418 the size is implied by the mode.
421 @item MEM_ALIGN (@var{x})
422 The known alignment in bits of the memory reference.
427 @findex ORIGINAL_REGNO
428 @item ORIGINAL_REGNO (@var{x})
429 This field holds the number the register ``originally'' had; for a
430 pseudo register turned into a hard reg this will hold the old pseudo
434 @item REG_EXPR (@var{x})
435 If this register is known to hold the value of some user-level
436 declaration, this is that tree node.
439 @item REG_OFFSET (@var{x})
440 If this register is known to hold the value of some user-level
441 declaration, this is the offset into that logical storage.
446 @findex SYMBOL_REF_DECL
447 @item SYMBOL_REF_DECL (@var{x})
448 If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or
449 a @code{FUNCTION_DECL}, that tree is recorded here. If this value is
450 null, then @var{x} was created by back end code generation routines,
451 and there is no associated front end symbol table entry.
453 @code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'},
454 that is, some sort of constant. In this case, the @code{symbol_ref}
455 is an entry in the per-file constant pool; again, there is no associated
456 front end symbol table entry.
458 @findex SYMBOL_REF_CONSTANT
459 @item SYMBOL_REF_CONSTANT (@var{x})
460 If @samp{CONSTANT_POOL_ADDRESS_P (@var{x})} is true, this is the constant
461 pool entry for @var{x}. It is null otherwise.
463 @findex SYMBOL_REF_DATA
464 @item SYMBOL_REF_DATA (@var{x})
465 A field of opaque type used to store @code{SYMBOL_REF_DECL} or
466 @code{SYMBOL_REF_CONSTANT}.
468 @findex SYMBOL_REF_FLAGS
469 @item SYMBOL_REF_FLAGS (@var{x})
470 In a @code{symbol_ref}, this is used to communicate various predicates
471 about the symbol. Some of these are common enough to be computed by
472 common code, some are specific to the target. The common bits are:
475 @findex SYMBOL_REF_FUNCTION_P
476 @findex SYMBOL_FLAG_FUNCTION
477 @item SYMBOL_FLAG_FUNCTION
478 Set if the symbol refers to a function.
480 @findex SYMBOL_REF_LOCAL_P
481 @findex SYMBOL_FLAG_LOCAL
482 @item SYMBOL_FLAG_LOCAL
483 Set if the symbol is local to this ``module''.
484 See @code{TARGET_BINDS_LOCAL_P}.
486 @findex SYMBOL_REF_EXTERNAL_P
487 @findex SYMBOL_FLAG_EXTERNAL
488 @item SYMBOL_FLAG_EXTERNAL
489 Set if this symbol is not defined in this translation unit.
490 Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}.
492 @findex SYMBOL_REF_SMALL_P
493 @findex SYMBOL_FLAG_SMALL
494 @item SYMBOL_FLAG_SMALL
495 Set if the symbol is located in the small data section.
496 See @code{TARGET_IN_SMALL_DATA_P}.
498 @findex SYMBOL_FLAG_TLS_SHIFT
499 @findex SYMBOL_REF_TLS_MODEL
500 @item SYMBOL_REF_TLS_MODEL (@var{x})
501 This is a multi-bit field accessor that returns the @code{tls_model}
502 to be used for a thread-local storage symbol. It returns zero for
503 non-thread-local symbols.
505 @findex SYMBOL_REF_HAS_BLOCK_INFO_P
506 @findex SYMBOL_FLAG_HAS_BLOCK_INFO
507 @item SYMBOL_FLAG_HAS_BLOCK_INFO
508 Set if the symbol has @code{SYMBOL_REF_BLOCK} and
509 @code{SYMBOL_REF_BLOCK_OFFSET} fields.
511 @findex SYMBOL_REF_ANCHOR_P
512 @findex SYMBOL_FLAG_ANCHOR
513 @cindex @option{-fsection-anchors}
514 @item SYMBOL_FLAG_ANCHOR
515 Set if the symbol is used as a section anchor. ``Section anchors''
516 are symbols that have a known position within an @code{object_block}
517 and that can be used to access nearby members of that block.
518 They are used to implement @option{-fsection-anchors}.
520 If this flag is set, then @code{SYMBOL_FLAG_HAS_BLOCK_INFO} will be too.
523 Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for
527 @findex SYMBOL_REF_BLOCK
528 @item SYMBOL_REF_BLOCK (@var{x})
529 If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the
530 @samp{object_block} structure to which the symbol belongs,
531 or @code{NULL} if it has not been assigned a block.
533 @findex SYMBOL_REF_BLOCK_OFFSET
534 @item SYMBOL_REF_BLOCK_OFFSET (@var{x})
535 If @samp{SYMBOL_REF_HAS_BLOCK_INFO_P (@var{x})}, this is the offset of @var{x}
536 from the first object in @samp{SYMBOL_REF_BLOCK (@var{x})}. The value is
537 negative if @var{x} has not yet been assigned to a block, or it has not
538 been given an offset within that block.
542 @section Flags in an RTL Expression
543 @cindex flags in RTL expression
545 RTL expressions contain several flags (one-bit bit-fields)
546 that are used in certain types of expression. Most often they
547 are accessed with the following macros, which expand into lvalues.
550 @findex CONSTANT_POOL_ADDRESS_P
551 @cindex @code{symbol_ref} and @samp{/u}
552 @cindex @code{unchanging}, in @code{symbol_ref}
553 @item CONSTANT_POOL_ADDRESS_P (@var{x})
554 Nonzero in a @code{symbol_ref} if it refers to part of the current
555 function's constant pool. For most targets these addresses are in a
556 @code{.rodata} section entirely separate from the function, but for
557 some targets the addresses are close to the beginning of the function.
558 In either case GCC assumes these addresses can be addressed directly,
559 perhaps with the help of base registers.
560 Stored in the @code{unchanging} field and printed as @samp{/u}.
562 @findex RTL_CONST_CALL_P
563 @cindex @code{call_insn} and @samp{/u}
564 @cindex @code{unchanging}, in @code{call_insn}
565 @item RTL_CONST_CALL_P (@var{x})
566 In a @code{call_insn} indicates that the insn represents a call to a
567 const function. Stored in the @code{unchanging} field and printed as
570 @findex RTL_PURE_CALL_P
571 @cindex @code{call_insn} and @samp{/i}
572 @cindex @code{return_val}, in @code{call_insn}
573 @item RTL_PURE_CALL_P (@var{x})
574 In a @code{call_insn} indicates that the insn represents a call to a
575 pure function. Stored in the @code{return_val} field and printed as
578 @findex RTL_CONST_OR_PURE_CALL_P
579 @cindex @code{call_insn} and @samp{/u} or @samp{/i}
580 @item RTL_CONST_OR_PURE_CALL_P (@var{x})
581 In a @code{call_insn}, true if @code{RTL_CONST_CALL_P} or
582 @code{RTL_PURE_CALL_P} is true.
584 @findex RTL_LOOPING_CONST_OR_PURE_CALL_P
585 @cindex @code{call_insn} and @samp{/c}
586 @cindex @code{call}, in @code{call_insn}
587 @item RTL_LOOPING_CONST_OR_PURE_CALL_P (@var{x})
588 In a @code{call_insn} indicates that the insn represents a possibly
589 infinite looping call to a const or pure function. Stored in the
590 @code{call} field and printed as @samp{/c}. Only true if one of
591 @code{RTL_CONST_CALL_P} or @code{RTL_PURE_CALL_P} is true.
593 @findex INSN_ANNULLED_BRANCH_P
594 @cindex @code{jump_insn} and @samp{/u}
595 @cindex @code{call_insn} and @samp{/u}
596 @cindex @code{insn} and @samp{/u}
597 @cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn}
598 @item INSN_ANNULLED_BRANCH_P (@var{x})
599 In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates
600 that the branch is an annulling one. See the discussion under
601 @code{sequence} below. Stored in the @code{unchanging} field and
602 printed as @samp{/u}.
604 @findex INSN_DELETED_P
605 @cindex @code{insn} and @samp{/v}
606 @cindex @code{call_insn} and @samp{/v}
607 @cindex @code{jump_insn} and @samp{/v}
608 @cindex @code{code_label} and @samp{/v}
609 @cindex @code{barrier} and @samp{/v}
610 @cindex @code{note} and @samp{/v}
611 @cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{barrier}, and @code{note}
612 @item INSN_DELETED_P (@var{x})
613 In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
614 @code{barrier}, or @code{note},
615 nonzero if the insn has been deleted. Stored in the
616 @code{volatil} field and printed as @samp{/v}.
618 @findex INSN_FROM_TARGET_P
619 @cindex @code{insn} and @samp{/s}
620 @cindex @code{jump_insn} and @samp{/s}
621 @cindex @code{call_insn} and @samp{/s}
622 @cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn}
623 @item INSN_FROM_TARGET_P (@var{x})
624 In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay
625 slot of a branch, indicates that the insn
626 is from the target of the branch. If the branch insn has
627 @code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
628 the branch is taken. For annulled branches with
629 @code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
630 branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set,
631 this insn will always be executed. Stored in the @code{in_struct}
632 field and printed as @samp{/s}.
634 @findex LABEL_PRESERVE_P
635 @cindex @code{code_label} and @samp{/i}
636 @cindex @code{note} and @samp{/i}
637 @cindex @code{in_struct}, in @code{code_label} and @code{note}
638 @item LABEL_PRESERVE_P (@var{x})
639 In a @code{code_label} or @code{note}, indicates that the label is referenced by
640 code or data not visible to the RTL of a given function.
641 Labels referenced by a non-local goto will have this bit set. Stored
642 in the @code{in_struct} field and printed as @samp{/s}.
644 @findex LABEL_REF_NONLOCAL_P
645 @cindex @code{label_ref} and @samp{/v}
646 @cindex @code{reg_label} and @samp{/v}
647 @cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
648 @item LABEL_REF_NONLOCAL_P (@var{x})
649 In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
650 a reference to a non-local label.
651 Stored in the @code{volatil} field and printed as @samp{/v}.
653 @findex MEM_IN_STRUCT_P
654 @cindex @code{mem} and @samp{/s}
655 @cindex @code{in_struct}, in @code{mem}
656 @item MEM_IN_STRUCT_P (@var{x})
657 In @code{mem} expressions, nonzero for reference to an entire structure,
658 union or array, or to a component of one. Zero for references to a
659 scalar variable or through a pointer to a scalar. If both this flag and
660 @code{MEM_SCALAR_P} are clear, then we don't know whether this @code{mem}
661 is in a structure or not. Both flags should never be simultaneously set.
662 Stored in the @code{in_struct} field and printed as @samp{/s}.
664 @findex MEM_KEEP_ALIAS_SET_P
665 @cindex @code{mem} and @samp{/j}
666 @cindex @code{jump}, in @code{mem}
667 @item MEM_KEEP_ALIAS_SET_P (@var{x})
668 In @code{mem} expressions, 1 if we should keep the alias set for this
669 mem unchanged when we access a component. Set to 1, for example, when we
670 are already in a non-addressable component of an aggregate.
671 Stored in the @code{jump} field and printed as @samp{/j}.
674 @cindex @code{mem} and @samp{/i}
675 @cindex @code{return_val}, in @code{mem}
676 @item MEM_SCALAR_P (@var{x})
677 In @code{mem} expressions, nonzero for reference to a scalar known not
678 to be a member of a structure, union, or array. Zero for such
679 references and for indirections through pointers, even pointers pointing
680 to scalar types. If both this flag and @code{MEM_IN_STRUCT_P} are clear,
681 then we don't know whether this @code{mem} is in a structure or not.
682 Both flags should never be simultaneously set.
683 Stored in the @code{return_val} field and printed as @samp{/i}.
685 @findex MEM_VOLATILE_P
686 @cindex @code{mem} and @samp{/v}
687 @cindex @code{asm_input} and @samp{/v}
688 @cindex @code{asm_operands} and @samp{/v}
689 @cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input}
690 @item MEM_VOLATILE_P (@var{x})
691 In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions,
692 nonzero for volatile memory references.
693 Stored in the @code{volatil} field and printed as @samp{/v}.
696 @cindex @code{mem} and @samp{/c}
697 @cindex @code{call}, in @code{mem}
698 @item MEM_NOTRAP_P (@var{x})
699 In @code{mem}, nonzero for memory references that will not trap.
700 Stored in the @code{call} field and printed as @samp{/c}.
703 @cindex @code{mem} and @samp{/f}
704 @cindex @code{frame_related}, in @code{mem}
705 @item MEM_POINTER (@var{x})
706 Nonzero in a @code{mem} if the memory reference holds a pointer.
707 Stored in the @code{frame_related} field and printed as @samp{/f}.
709 @findex REG_FUNCTION_VALUE_P
710 @cindex @code{reg} and @samp{/i}
711 @cindex @code{return_val}, in @code{reg}
712 @item REG_FUNCTION_VALUE_P (@var{x})
713 Nonzero in a @code{reg} if it is the place in which this function's
714 value is going to be returned. (This happens only in a hard
715 register.) Stored in the @code{return_val} field and printed as
719 @cindex @code{reg} and @samp{/f}
720 @cindex @code{frame_related}, in @code{reg}
721 @item REG_POINTER (@var{x})
722 Nonzero in a @code{reg} if the register holds a pointer. Stored in the
723 @code{frame_related} field and printed as @samp{/f}.
725 @findex REG_USERVAR_P
726 @cindex @code{reg} and @samp{/v}
727 @cindex @code{volatil}, in @code{reg}
728 @item REG_USERVAR_P (@var{x})
729 In a @code{reg}, nonzero if it corresponds to a variable present in
730 the user's source code. Zero for temporaries generated internally by
731 the compiler. Stored in the @code{volatil} field and printed as
734 The same hard register may be used also for collecting the values of
735 functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
738 @findex RTX_FRAME_RELATED_P
739 @cindex @code{insn} and @samp{/f}
740 @cindex @code{call_insn} and @samp{/f}
741 @cindex @code{jump_insn} and @samp{/f}
742 @cindex @code{barrier} and @samp{/f}
743 @cindex @code{set} and @samp{/f}
744 @cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set}
745 @item RTX_FRAME_RELATED_P (@var{x})
746 Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
747 @code{barrier}, or @code{set} which is part of a function prologue
748 and sets the stack pointer, sets the frame pointer, or saves a register.
749 This flag should also be set on an instruction that sets up a temporary
750 register to use in place of the frame pointer.
751 Stored in the @code{frame_related} field and printed as @samp{/f}.
753 In particular, on RISC targets where there are limits on the sizes of
754 immediate constants, it is sometimes impossible to reach the register
755 save area directly from the stack pointer. In that case, a temporary
756 register is used that is near enough to the register save area, and the
757 Canonical Frame Address, i.e., DWARF2's logical frame pointer, register
758 must (temporarily) be changed to be this temporary register. So, the
759 instruction that sets this temporary register must be marked as
760 @code{RTX_FRAME_RELATED_P}.
762 If the marked instruction is overly complex (defined in terms of what
763 @code{dwarf2out_frame_debug_expr} can handle), you will also have to
764 create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
765 instruction. This note should contain a simple expression of the
766 computation performed by this instruction, i.e., one that
767 @code{dwarf2out_frame_debug_expr} can handle.
769 This flag is required for exception handling support on targets with RTL
772 @findex MEM_READONLY_P
773 @cindex @code{mem} and @samp{/u}
774 @cindex @code{unchanging}, in @code{mem}
775 @item MEM_READONLY_P (@var{x})
776 Nonzero in a @code{mem}, if the memory is statically allocated and read-only.
778 Read-only in this context means never modified during the lifetime of the
779 program, not necessarily in ROM or in write-disabled pages. A common
780 example of the later is a shared library's global offset table. This
781 table is initialized by the runtime loader, so the memory is technically
782 writable, but after control is transfered from the runtime loader to the
783 application, this memory will never be subsequently modified.
785 Stored in the @code{unchanging} field and printed as @samp{/u}.
787 @findex SCHED_GROUP_P
788 @cindex @code{insn} and @samp{/s}
789 @cindex @code{call_insn} and @samp{/s}
790 @cindex @code{jump_insn} and @samp{/s}
791 @cindex @code{in_struct}, in @code{insn}, @code{jump_insn} and @code{call_insn}
792 @item SCHED_GROUP_P (@var{x})
793 During instruction scheduling, in an @code{insn}, @code{call_insn} or
794 @code{jump_insn}, indicates that the
795 previous insn must be scheduled together with this insn. This is used to
796 ensure that certain groups of instructions will not be split up by the
797 instruction scheduling pass, for example, @code{use} insns before
798 a @code{call_insn} may not be separated from the @code{call_insn}.
799 Stored in the @code{in_struct} field and printed as @samp{/s}.
801 @findex SET_IS_RETURN_P
802 @cindex @code{insn} and @samp{/j}
803 @cindex @code{jump}, in @code{insn}
804 @item SET_IS_RETURN_P (@var{x})
805 For a @code{set}, nonzero if it is for a return.
806 Stored in the @code{jump} field and printed as @samp{/j}.
808 @findex SIBLING_CALL_P
809 @cindex @code{call_insn} and @samp{/j}
810 @cindex @code{jump}, in @code{call_insn}
811 @item SIBLING_CALL_P (@var{x})
812 For a @code{call_insn}, nonzero if the insn is a sibling call.
813 Stored in the @code{jump} field and printed as @samp{/j}.
815 @findex STRING_POOL_ADDRESS_P
816 @cindex @code{symbol_ref} and @samp{/f}
817 @cindex @code{frame_related}, in @code{symbol_ref}
818 @item STRING_POOL_ADDRESS_P (@var{x})
819 For a @code{symbol_ref} expression, nonzero if it addresses this function's
820 string constant pool.
821 Stored in the @code{frame_related} field and printed as @samp{/f}.
823 @findex SUBREG_PROMOTED_UNSIGNED_P
824 @cindex @code{subreg} and @samp{/u} and @samp{/v}
825 @cindex @code{unchanging}, in @code{subreg}
826 @cindex @code{volatil}, in @code{subreg}
827 @item SUBREG_PROMOTED_UNSIGNED_P (@var{x})
828 Returns a value greater then zero for a @code{subreg} that has
829 @code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
830 zero-extended, zero if it is kept sign-extended, and less then zero if it is
831 extended some other way via the @code{ptr_extend} instruction.
832 Stored in the @code{unchanging}
833 field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
834 This macro may only be used to get the value it may not be used to change
835 the value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
837 @findex SUBREG_PROMOTED_UNSIGNED_SET
838 @cindex @code{subreg} and @samp{/u}
839 @cindex @code{unchanging}, in @code{subreg}
840 @cindex @code{volatil}, in @code{subreg}
841 @item SUBREG_PROMOTED_UNSIGNED_SET (@var{x})
842 Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
843 to reflect zero, sign, or other extension. If @code{volatil} is
844 zero, then @code{unchanging} as nonzero means zero extension and as
845 zero means sign extension. If @code{volatil} is nonzero then some
846 other type of extension was done via the @code{ptr_extend} instruction.
848 @findex SUBREG_PROMOTED_VAR_P
849 @cindex @code{subreg} and @samp{/s}
850 @cindex @code{in_struct}, in @code{subreg}
851 @item SUBREG_PROMOTED_VAR_P (@var{x})
852 Nonzero in a @code{subreg} if it was made when accessing an object that
853 was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
854 description macro (@pxref{Storage Layout}). In this case, the mode of
855 the @code{subreg} is the declared mode of the object and the mode of
856 @code{SUBREG_REG} is the mode of the register that holds the object.
857 Promoted variables are always either sign- or zero-extended to the wider
858 mode on every assignment. Stored in the @code{in_struct} field and
859 printed as @samp{/s}.
861 @findex SYMBOL_REF_USED
862 @cindex @code{used}, in @code{symbol_ref}
863 @item SYMBOL_REF_USED (@var{x})
864 In a @code{symbol_ref}, indicates that @var{x} has been used. This is
865 normally only used to ensure that @var{x} is only declared external
866 once. Stored in the @code{used} field.
868 @findex SYMBOL_REF_WEAK
869 @cindex @code{symbol_ref} and @samp{/i}
870 @cindex @code{return_val}, in @code{symbol_ref}
871 @item SYMBOL_REF_WEAK (@var{x})
872 In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
873 Stored in the @code{return_val} field and printed as @samp{/i}.
875 @findex SYMBOL_REF_FLAG
876 @cindex @code{symbol_ref} and @samp{/v}
877 @cindex @code{volatil}, in @code{symbol_ref}
878 @item SYMBOL_REF_FLAG (@var{x})
879 In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
880 Stored in the @code{volatil} field and printed as @samp{/v}.
882 Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
883 by @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS}
884 is mandatory if the target requires more than one bit of storage.
886 @findex PREFETCH_SCHEDULE_BARRIER_P
887 @cindex @code{prefetch} and @samp{/v}
888 @cindex @code{volatile}, in @code{prefetch}
889 @item PREFETCH_SCHEDULE_BARRIER_P (@var{x})
890 In a @code{prefetch}, indicates that the prefetch is a scheduling barrier.
891 No other INSNs will be moved over it.
892 Stored in the @code{volatil} field and printed as @samp{/v}.
895 These are the fields to which the above macros refer:
899 @cindex @samp{/c} in RTL dump
901 In a @code{mem}, 1 means that the memory reference will not trap.
903 In a @code{call}, 1 means that this pure or const call may possibly
906 In an RTL dump, this flag is represented as @samp{/c}.
908 @findex frame_related
909 @cindex @samp{/f} in RTL dump
911 In an @code{insn} or @code{set} expression, 1 means that it is part of
912 a function prologue and sets the stack pointer, sets the frame pointer,
913 saves a register, or sets up a temporary register to use in place of the
916 In @code{reg} expressions, 1 means that the register holds a pointer.
918 In @code{mem} expressions, 1 means that the memory reference holds a pointer.
920 In @code{symbol_ref} expressions, 1 means that the reference addresses
921 this function's string constant pool.
923 In an RTL dump, this flag is represented as @samp{/f}.
926 @cindex @samp{/s} in RTL dump
928 In @code{mem} expressions, it is 1 if the memory datum referred to is
929 all or part of a structure or array; 0 if it is (or might be) a scalar
930 variable. A reference through a C pointer has 0 because the pointer
931 might point to a scalar variable. This information allows the compiler
932 to determine something about possible cases of aliasing.
934 In @code{reg} expressions, it is 1 if the register has its entire life
935 contained within the test expression of some loop.
937 In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
938 an object that has had its mode promoted from a wider mode.
940 In @code{label_ref} expressions, 1 means that the referenced label is
941 outside the innermost loop containing the insn in which the @code{label_ref}
944 In @code{code_label} expressions, it is 1 if the label may never be deleted.
945 This is used for labels which are the target of non-local gotos. Such a
946 label that would have been deleted is replaced with a @code{note} of type
947 @code{NOTE_INSN_DELETED_LABEL}.
949 In an @code{insn} during dead-code elimination, 1 means that the insn is
952 In an @code{insn} or @code{jump_insn} during reorg for an insn in the
953 delay slot of a branch,
954 1 means that this insn is from the target of the branch.
956 In an @code{insn} during instruction scheduling, 1 means that this insn
957 must be scheduled as part of a group together with the previous insn.
959 In an RTL dump, this flag is represented as @samp{/s}.
962 @cindex @samp{/i} in RTL dump
964 In @code{reg} expressions, 1 means the register contains
965 the value to be returned by the current function. On
966 machines that pass parameters in registers, the same register number
967 may be used for parameters as well, but this flag is not set on such
970 In @code{mem} expressions, 1 means the memory reference is to a scalar
971 known not to be a member of a structure, union, or array.
973 In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
975 In @code{call} expressions, 1 means the call is pure.
977 In an RTL dump, this flag is represented as @samp{/i}.
980 @cindex @samp{/j} in RTL dump
982 In a @code{mem} expression, 1 means we should keep the alias set for this
983 mem unchanged when we access a component.
985 In a @code{set}, 1 means it is for a return.
987 In a @code{call_insn}, 1 means it is a sibling call.
989 In an RTL dump, this flag is represented as @samp{/j}.
992 @cindex @samp{/u} in RTL dump
994 In @code{reg} and @code{mem} expressions, 1 means
995 that the value of the expression never changes.
997 In @code{subreg} expressions, it is 1 if the @code{subreg} references an
998 unsigned object whose mode has been promoted to a wider mode.
1000 In an @code{insn} or @code{jump_insn} in the delay slot of a branch
1001 instruction, 1 means an annulling branch should be used.
1003 In a @code{symbol_ref} expression, 1 means that this symbol addresses
1004 something in the per-function constant pool.
1006 In a @code{call_insn} 1 means that this instruction is a call to a const
1009 In an RTL dump, this flag is represented as @samp{/u}.
1013 This flag is used directly (without an access macro) at the end of RTL
1014 generation for a function, to count the number of times an expression
1015 appears in insns. Expressions that appear more than once are copied,
1016 according to the rules for shared structure (@pxref{Sharing}).
1018 For a @code{reg}, it is used directly (without an access macro) by the
1019 leaf register renumbering code to ensure that each register is only
1022 In a @code{symbol_ref}, it indicates that an external declaration for
1023 the symbol has already been written.
1026 @cindex @samp{/v} in RTL dump
1028 @cindex volatile memory references
1029 In a @code{mem}, @code{asm_operands}, or @code{asm_input}
1030 expression, it is 1 if the memory
1031 reference is volatile. Volatile memory references may not be deleted,
1032 reordered or combined.
1034 In a @code{symbol_ref} expression, it is used for machine-specific
1037 In a @code{reg} expression, it is 1 if the value is a user-level variable.
1038 0 indicates an internal compiler temporary.
1040 In an @code{insn}, 1 means the insn has been deleted.
1042 In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
1043 to a non-local label.
1045 In @code{prefetch} expressions, 1 means that the containing insn is a
1048 In an RTL dump, this flag is represented as @samp{/v}.
1052 @section Machine Modes
1053 @cindex machine modes
1055 @findex enum machine_mode
1056 A machine mode describes a size of data object and the representation used
1057 for it. In the C code, machine modes are represented by an enumeration
1058 type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
1059 expression has room for a machine mode and so do certain kinds of tree
1060 expressions (declarations and types, to be precise).
1062 In debugging dumps and machine descriptions, the machine mode of an RTL
1063 expression is written after the expression code with a colon to separate
1064 them. The letters @samp{mode} which appear at the end of each machine mode
1065 name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
1066 expression with machine mode @code{SImode}. If the mode is
1067 @code{VOIDmode}, it is not written at all.
1069 Here is a table of machine modes. The term ``byte'' below refers to an
1070 object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
1075 ``Bit'' mode represents a single bit, for predicate registers.
1079 ``Quarter-Integer'' mode represents a single byte treated as an integer.
1083 ``Half-Integer'' mode represents a two-byte integer.
1087 ``Partial Single Integer'' mode represents an integer which occupies
1088 four bytes but which doesn't really use all four. On some machines,
1089 this is the right mode to use for pointers.
1093 ``Single Integer'' mode represents a four-byte integer.
1097 ``Partial Double Integer'' mode represents an integer which occupies
1098 eight bytes but which doesn't really use all eight. On some machines,
1099 this is the right mode to use for certain pointers.
1103 ``Double Integer'' mode represents an eight-byte integer.
1107 ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
1111 ``Octa Integer'' (?) mode represents a thirty-two-byte integer.
1115 ``Quarter-Floating'' mode represents a quarter-precision (single byte)
1116 floating point number.
1120 ``Half-Floating'' mode represents a half-precision (two byte) floating
1125 ``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision
1126 (three byte) floating point number.
1130 ``Single Floating'' mode represents a four byte floating point number.
1131 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1132 this is a single-precision IEEE floating point number; it can also be
1133 used for double-precision (on processors with 16-bit bytes) and
1134 single-precision VAX and IBM types.
1138 ``Double Floating'' mode represents an eight byte floating point number.
1139 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1140 this is a double-precision IEEE floating point number.
1144 ``Extended Floating'' mode represents an IEEE extended floating point
1145 number. This mode only has 80 meaningful bits (ten bytes). Some
1146 processors require such numbers to be padded to twelve bytes, others
1147 to sixteen; this mode is used for either.
1151 ``Single Decimal Floating'' mode represents a four byte decimal
1152 floating point number (as distinct from conventional binary floating
1157 ``Double Decimal Floating'' mode represents an eight byte decimal
1158 floating point number.
1162 ``Tetra Decimal Floating'' mode represents a sixteen byte decimal
1163 floating point number all 128 of whose bits are meaningful.
1167 ``Tetra Floating'' mode represents a sixteen byte floating point number
1168 all 128 of whose bits are meaningful. One common use is the
1169 IEEE quad-precision format.
1173 ``Quarter-Fractional'' mode represents a single byte treated as a signed
1174 fractional number. The default format is ``s.7''.
1178 ``Half-Fractional'' mode represents a two-byte signed fractional number.
1179 The default format is ``s.15''.
1183 ``Single Fractional'' mode represents a four-byte signed fractional number.
1184 The default format is ``s.31''.
1188 ``Double Fractional'' mode represents an eight-byte signed fractional number.
1189 The default format is ``s.63''.
1193 ``Tetra Fractional'' mode represents a sixteen-byte signed fractional number.
1194 The default format is ``s.127''.
1198 ``Unsigned Quarter-Fractional'' mode represents a single byte treated as an
1199 unsigned fractional number. The default format is ``.8''.
1203 ``Unsigned Half-Fractional'' mode represents a two-byte unsigned fractional
1204 number. The default format is ``.16''.
1208 ``Unsigned Single Fractional'' mode represents a four-byte unsigned fractional
1209 number. The default format is ``.32''.
1213 ``Unsigned Double Fractional'' mode represents an eight-byte unsigned
1214 fractional number. The default format is ``.64''.
1218 ``Unsigned Tetra Fractional'' mode represents a sixteen-byte unsigned
1219 fractional number. The default format is ``.128''.
1223 ``Half-Accumulator'' mode represents a two-byte signed accumulator.
1224 The default format is ``s8.7''.
1228 ``Single Accumulator'' mode represents a four-byte signed accumulator.
1229 The default format is ``s16.15''.
1233 ``Double Accumulator'' mode represents an eight-byte signed accumulator.
1234 The default format is ``s32.31''.
1238 ``Tetra Accumulator'' mode represents a sixteen-byte signed accumulator.
1239 The default format is ``s64.63''.
1243 ``Unsigned Half-Accumulator'' mode represents a two-byte unsigned accumulator.
1244 The default format is ``8.8''.
1248 ``Unsigned Single Accumulator'' mode represents a four-byte unsigned
1249 accumulator. The default format is ``16.16''.
1253 ``Unsigned Double Accumulator'' mode represents an eight-byte unsigned
1254 accumulator. The default format is ``32.32''.
1258 ``Unsigned Tetra Accumulator'' mode represents a sixteen-byte unsigned
1259 accumulator. The default format is ``64.64''.
1263 ``Condition Code'' mode represents the value of a condition code, which
1264 is a machine-specific set of bits used to represent the result of a
1265 comparison operation. Other machine-specific modes may also be used for
1266 the condition code. These modes are not used on machines that use
1267 @code{cc0} (see @pxref{Condition Code}).
1271 ``Block'' mode represents values that are aggregates to which none of
1272 the other modes apply. In RTL, only memory references can have this mode,
1273 and only if they appear in string-move or vector instructions. On machines
1274 which have no such instructions, @code{BLKmode} will not appear in RTL@.
1278 Void mode means the absence of a mode or an unspecified mode.
1279 For example, RTL expressions of code @code{const_int} have mode
1280 @code{VOIDmode} because they can be taken to have whatever mode the context
1281 requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
1282 the absence of any mode.
1290 @item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode
1291 These modes stand for a complex number represented as a pair of floating
1292 point values. The floating point values are in @code{QFmode},
1293 @code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
1294 @code{TFmode}, respectively.
1302 @item CQImode, CHImode, CSImode, CDImode, CTImode, COImode
1303 These modes stand for a complex number represented as a pair of integer
1304 values. The integer values are in @code{QImode}, @code{HImode},
1305 @code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
1309 The machine description defines @code{Pmode} as a C macro which expands
1310 into the machine mode used for addresses. Normally this is the mode
1311 whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
1313 The only modes which a machine description @i{must} support are
1314 @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
1315 @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
1316 The compiler will attempt to use @code{DImode} for 8-byte structures and
1317 unions, but this can be prevented by overriding the definition of
1318 @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
1319 use @code{TImode} for 16-byte structures and unions. Likewise, you can
1320 arrange for the C type @code{short int} to avoid using @code{HImode}.
1322 @cindex mode classes
1323 Very few explicit references to machine modes remain in the compiler and
1324 these few references will soon be removed. Instead, the machine modes
1325 are divided into mode classes. These are represented by the enumeration
1326 type @code{enum mode_class} defined in @file{machmode.h}. The possible
1332 Integer modes. By default these are @code{BImode}, @code{QImode},
1333 @code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
1336 @findex MODE_PARTIAL_INT
1337 @item MODE_PARTIAL_INT
1338 The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
1339 @code{PSImode} and @code{PDImode}.
1343 Floating point modes. By default these are @code{QFmode},
1344 @code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
1345 @code{XFmode} and @code{TFmode}.
1347 @findex MODE_DECIMAL_FLOAT
1348 @item MODE_DECIMAL_FLOAT
1349 Decimal floating point modes. By default these are @code{SDmode},
1350 @code{DDmode} and @code{TDmode}.
1354 Signed fractional modes. By default these are @code{QQmode}, @code{HQmode},
1355 @code{SQmode}, @code{DQmode} and @code{TQmode}.
1359 Unsigned fractional modes. By default these are @code{UQQmode}, @code{UHQmode},
1360 @code{USQmode}, @code{UDQmode} and @code{UTQmode}.
1364 Signed accumulator modes. By default these are @code{HAmode},
1365 @code{SAmode}, @code{DAmode} and @code{TAmode}.
1369 Unsigned accumulator modes. By default these are @code{UHAmode},
1370 @code{USAmode}, @code{UDAmode} and @code{UTAmode}.
1372 @findex MODE_COMPLEX_INT
1373 @item MODE_COMPLEX_INT
1374 Complex integer modes. (These are not currently implemented).
1376 @findex MODE_COMPLEX_FLOAT
1377 @item MODE_COMPLEX_FLOAT
1378 Complex floating point modes. By default these are @code{QCmode},
1379 @code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
1382 @findex MODE_FUNCTION
1384 Algol or Pascal function variables including a static chain.
1385 (These are not currently implemented).
1389 Modes representing condition code values. These are @code{CCmode} plus
1390 any @code{CC_MODE} modes listed in the @file{@var{machine}-modes.def}.
1391 @xref{Jump Patterns},
1392 also see @ref{Condition Code}.
1396 This is a catchall mode class for modes which don't fit into the above
1397 classes. Currently @code{VOIDmode} and @code{BLKmode} are in
1401 Here are some C macros that relate to machine modes:
1405 @item GET_MODE (@var{x})
1406 Returns the machine mode of the RTX @var{x}.
1409 @item PUT_MODE (@var{x}, @var{newmode})
1410 Alters the machine mode of the RTX @var{x} to be @var{newmode}.
1412 @findex NUM_MACHINE_MODES
1413 @item NUM_MACHINE_MODES
1414 Stands for the number of machine modes available on the target
1415 machine. This is one greater than the largest numeric value of any
1418 @findex GET_MODE_NAME
1419 @item GET_MODE_NAME (@var{m})
1420 Returns the name of mode @var{m} as a string.
1422 @findex GET_MODE_CLASS
1423 @item GET_MODE_CLASS (@var{m})
1424 Returns the mode class of mode @var{m}.
1426 @findex GET_MODE_WIDER_MODE
1427 @item GET_MODE_WIDER_MODE (@var{m})
1428 Returns the next wider natural mode. For example, the expression
1429 @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
1431 @findex GET_MODE_SIZE
1432 @item GET_MODE_SIZE (@var{m})
1433 Returns the size in bytes of a datum of mode @var{m}.
1435 @findex GET_MODE_BITSIZE
1436 @item GET_MODE_BITSIZE (@var{m})
1437 Returns the size in bits of a datum of mode @var{m}.
1439 @findex GET_MODE_IBIT
1440 @item GET_MODE_IBIT (@var{m})
1441 Returns the number of integral bits of a datum of fixed-point mode @var{m}.
1443 @findex GET_MODE_FBIT
1444 @item GET_MODE_FBIT (@var{m})
1445 Returns the number of fractional bits of a datum of fixed-point mode @var{m}.
1447 @findex GET_MODE_MASK
1448 @item GET_MODE_MASK (@var{m})
1449 Returns a bitmask containing 1 for all bits in a word that fit within
1450 mode @var{m}. This macro can only be used for modes whose bitsize is
1451 less than or equal to @code{HOST_BITS_PER_INT}.
1453 @findex GET_MODE_ALIGNMENT
1454 @item GET_MODE_ALIGNMENT (@var{m})
1455 Return the required alignment, in bits, for an object of mode @var{m}.
1457 @findex GET_MODE_UNIT_SIZE
1458 @item GET_MODE_UNIT_SIZE (@var{m})
1459 Returns the size in bytes of the subunits of a datum of mode @var{m}.
1460 This is the same as @code{GET_MODE_SIZE} except in the case of complex
1461 modes. For them, the unit size is the size of the real or imaginary
1464 @findex GET_MODE_NUNITS
1465 @item GET_MODE_NUNITS (@var{m})
1466 Returns the number of units contained in a mode, i.e.,
1467 @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
1469 @findex GET_CLASS_NARROWEST_MODE
1470 @item GET_CLASS_NARROWEST_MODE (@var{c})
1471 Returns the narrowest mode in mode class @var{c}.
1476 The global variables @code{byte_mode} and @code{word_mode} contain modes
1477 whose classes are @code{MODE_INT} and whose bitsizes are either
1478 @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
1479 machines, these are @code{QImode} and @code{SImode}, respectively.
1482 @section Constant Expression Types
1483 @cindex RTL constants
1484 @cindex RTL constant expression types
1486 The simplest RTL expressions are those that represent constant values.
1490 @item (const_int @var{i})
1491 This type of expression represents the integer value @var{i}. @var{i}
1492 is customarily accessed with the macro @code{INTVAL} as in
1493 @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1495 Constants generated for modes with fewer bits than @code{HOST_WIDE_INT}
1496 must be sign extended to full width (e.g., with @code{gen_int_mode}).
1502 There is only one expression object for the integer value zero; it is
1503 the value of the variable @code{const0_rtx}. Likewise, the only
1504 expression for integer value one is found in @code{const1_rtx}, the only
1505 expression for integer value two is found in @code{const2_rtx}, and the
1506 only expression for integer value negative one is found in
1507 @code{constm1_rtx}. Any attempt to create an expression of code
1508 @code{const_int} and value zero, one, two or negative one will return
1509 @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
1510 @code{constm1_rtx} as appropriate.
1512 @findex const_true_rtx
1513 Similarly, there is only one object for the integer whose value is
1514 @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
1515 @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
1516 @code{const1_rtx} will point to the same object. If
1517 @code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
1518 @code{constm1_rtx} will point to the same object.
1520 @findex const_double
1521 @item (const_double:@var{m} @var{i0} @var{i1} @dots{})
1522 Represents either a floating-point constant of mode @var{m} or an
1523 integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
1524 bits but small enough to fit within twice that number of bits (GCC
1525 does not provide a mechanism to represent even larger constants). In
1526 the latter case, @var{m} will be @code{VOIDmode}.
1528 @findex CONST_DOUBLE_LOW
1529 If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1530 @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
1531 @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
1533 If the constant is floating point (regardless of its precision), then
1534 the number of integers used to store the value depends on the size of
1535 @code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers
1536 represent a floating point number, but not precisely in the target
1537 machine's or host machine's floating point format. To convert them to
1538 the precise bit pattern used by the target machine, use the macro
1539 @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
1542 @item (const_fixed:@var{m} @dots{})
1543 Represents a fixed-point constant of mode @var{m}.
1544 The operand is a data structure of type @code{struct fixed_value} and
1545 is accessed with the macro @code{CONST_FIXED_VALUE}. The high part of
1546 data is accessed with @code{CONST_FIXED_VALUE_HIGH}; the low part is
1547 accessed with @code{CONST_FIXED_VALUE_LOW}.
1549 @findex const_vector
1550 @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
1551 Represents a vector constant. The square brackets stand for the vector
1552 containing the constant elements. @var{x0}, @var{x1} and so on are
1553 the @code{const_int}, @code{const_double} or @code{const_fixed} elements.
1555 The number of units in a @code{const_vector} is obtained with the macro
1556 @code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
1558 Individual elements in a vector constant are accessed with the macro
1559 @code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
1560 where @var{v} is the vector constant and @var{n} is the element
1563 @findex const_string
1564 @item (const_string @var{str})
1565 Represents a constant string with value @var{str}. Currently this is
1566 used only for insn attributes (@pxref{Insn Attributes}) since constant
1567 strings in C are placed in memory.
1570 @item (symbol_ref:@var{mode} @var{symbol})
1571 Represents the value of an assembler label for data. @var{symbol} is
1572 a string that describes the name of the assembler label. If it starts
1573 with a @samp{*}, the label is the rest of @var{symbol} not including
1574 the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
1577 The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
1578 Usually that is the only mode for which a symbol is directly valid.
1581 @item (label_ref:@var{mode} @var{label})
1582 Represents the value of an assembler label for code. It contains one
1583 operand, an expression, which must be a @code{code_label} or a @code{note}
1584 of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
1585 sequence to identify the place where the label should go.
1587 The reason for using a distinct expression type for code label
1588 references is so that jump optimization can distinguish them.
1590 The @code{label_ref} contains a mode, which is usually @code{Pmode}.
1591 Usually that is the only mode for which a label is directly valid.
1594 @item (const:@var{m} @var{exp})
1595 Represents a constant that is the result of an assembly-time
1596 arithmetic computation. The operand, @var{exp}, is an expression that
1597 contains only constants (@code{const_int}, @code{symbol_ref} and
1598 @code{label_ref} expressions) combined with @code{plus} and
1599 @code{minus}. However, not all combinations are valid, since the
1600 assembler cannot do arbitrary arithmetic on relocatable symbols.
1602 @var{m} should be @code{Pmode}.
1605 @item (high:@var{m} @var{exp})
1606 Represents the high-order bits of @var{exp}, usually a
1607 @code{symbol_ref}. The number of bits is machine-dependent and is
1608 normally the number of bits specified in an instruction that initializes
1609 the high order bits of a register. It is used with @code{lo_sum} to
1610 represent the typical two-instruction sequence used in RISC machines to
1611 reference a global memory location.
1613 @var{m} should be @code{Pmode}.
1619 The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
1620 value 0 in mode @var{mode}. If mode @var{mode} is of mode class
1621 @code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of
1622 mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
1623 expression in mode @var{mode}. Otherwise, it returns a
1624 @code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro
1625 @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
1626 mode @var{mode} and similarly for @code{CONST2_RTX}. The
1627 @code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
1630 @node Regs and Memory
1631 @section Registers and Memory
1632 @cindex RTL register expressions
1633 @cindex RTL memory expressions
1635 Here are the RTL expression types for describing access to machine
1636 registers and to main memory.
1640 @cindex hard registers
1641 @cindex pseudo registers
1642 @item (reg:@var{m} @var{n})
1643 For small values of the integer @var{n} (those that are less than
1644 @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
1645 register number @var{n}: a @dfn{hard register}. For larger values of
1646 @var{n}, it stands for a temporary value or @dfn{pseudo register}.
1647 The compiler's strategy is to generate code assuming an unlimited
1648 number of such pseudo registers, and later convert them into hard
1649 registers or into memory references.
1651 @var{m} is the machine mode of the reference. It is necessary because
1652 machines can generally refer to each register in more than one mode.
1653 For example, a register may contain a full word but there may be
1654 instructions to refer to it as a half word or as a single byte, as
1655 well as instructions to refer to it as a floating point number of
1658 Even for a register that the machine can access in only one mode,
1659 the mode must always be specified.
1661 The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
1662 description, since the number of hard registers on the machine is an
1663 invariant characteristic of the machine. Note, however, that not
1664 all of the machine registers must be general registers. All the
1665 machine registers that can be used for storage of data are given
1666 hard register numbers, even those that can be used only in certain
1667 instructions or can hold only certain types of data.
1669 A hard register may be accessed in various modes throughout one
1670 function, but each pseudo register is given a natural mode
1671 and is accessed only in that mode. When it is necessary to describe
1672 an access to a pseudo register using a nonnatural mode, a @code{subreg}
1675 A @code{reg} expression with a machine mode that specifies more than
1676 one word of data may actually stand for several consecutive registers.
1677 If in addition the register number specifies a hardware register, then
1678 it actually represents several consecutive hardware registers starting
1679 with the specified one.
1681 Each pseudo register number used in a function's RTL code is
1682 represented by a unique @code{reg} expression.
1684 @findex FIRST_VIRTUAL_REGISTER
1685 @findex LAST_VIRTUAL_REGISTER
1686 Some pseudo register numbers, those within the range of
1687 @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
1688 appear during the RTL generation phase and are eliminated before the
1689 optimization phases. These represent locations in the stack frame that
1690 cannot be determined until RTL generation for the function has been
1691 completed. The following virtual register numbers are defined:
1694 @findex VIRTUAL_INCOMING_ARGS_REGNUM
1695 @item VIRTUAL_INCOMING_ARGS_REGNUM
1696 This points to the first word of the incoming arguments passed on the
1697 stack. Normally these arguments are placed there by the caller, but the
1698 callee may have pushed some arguments that were previously passed in
1701 @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1702 @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1703 When RTL generation is complete, this virtual register is replaced
1704 by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1705 value of @code{FIRST_PARM_OFFSET}.
1707 @findex VIRTUAL_STACK_VARS_REGNUM
1708 @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1709 @item VIRTUAL_STACK_VARS_REGNUM
1710 If @code{FRAME_GROWS_DOWNWARD} is defined to a nonzero value, this points
1711 to immediately above the first variable on the stack. Otherwise, it points
1712 to the first variable on the stack.
1714 @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1715 @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1716 @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
1717 register given by @code{FRAME_POINTER_REGNUM} and the value
1718 @code{STARTING_FRAME_OFFSET}.
1720 @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1721 @item VIRTUAL_STACK_DYNAMIC_REGNUM
1722 This points to the location of dynamically allocated memory on the stack
1723 immediately after the stack pointer has been adjusted by the amount of
1726 @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1727 @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1728 This virtual register is replaced by the sum of the register given by
1729 @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1731 @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1732 @item VIRTUAL_OUTGOING_ARGS_REGNUM
1733 This points to the location in the stack at which outgoing arguments
1734 should be written when the stack is pre-pushed (arguments pushed using
1735 push insns should always use @code{STACK_POINTER_REGNUM}).
1737 @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1738 This virtual register is replaced by the sum of the register given by
1739 @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1743 @item (subreg:@var{m1} @var{reg:m2} @var{bytenum})
1745 @code{subreg} expressions are used to refer to a register in a machine
1746 mode other than its natural one, or to refer to one register of
1747 a multi-part @code{reg} that actually refers to several registers.
1749 Each pseudo register has a natural mode. If it is necessary to
1750 operate on it in a different mode, the register must be
1751 enclosed in a @code{subreg}.
1753 There are currently three supported types for the first operand of a
1756 @item pseudo registers
1757 This is the most common case. Most @code{subreg}s have pseudo
1758 @code{reg}s as their first operand.
1761 @code{subreg}s of @code{mem} were common in earlier versions of GCC and
1762 are still supported. During the reload pass these are replaced by plain
1763 @code{mem}s. On machines that do not do instruction scheduling, use of
1764 @code{subreg}s of @code{mem} are still used, but this is no longer
1765 recommended. Such @code{subreg}s are considered to be
1766 @code{register_operand}s rather than @code{memory_operand}s before and
1767 during reload. Because of this, the scheduling passes cannot properly
1768 schedule instructions with @code{subreg}s of @code{mem}, so for machines
1769 that do scheduling, @code{subreg}s of @code{mem} should never be used.
1770 To support this, the combine and recog passes have explicit code to
1771 inhibit the creation of @code{subreg}s of @code{mem} when
1772 @code{INSN_SCHEDULING} is defined.
1774 The use of @code{subreg}s of @code{mem} after the reload pass is an area
1775 that is not well understood and should be avoided. There is still some
1776 code in the compiler to support this, but this code has possibly rotted.
1777 This use of @code{subreg}s is discouraged and will most likely not be
1778 supported in the future.
1780 @item hard registers
1781 It is seldom necessary to wrap hard registers in @code{subreg}s; such
1782 registers would normally reduce to a single @code{reg} rtx. This use of
1783 @code{subreg}s is discouraged and may not be supported in the future.
1787 @code{subreg}s of @code{subreg}s are not supported. Using
1788 @code{simplify_gen_subreg} is the recommended way to avoid this problem.
1790 @code{subreg}s come in two distinct flavors, each having its own
1794 @item Paradoxical subregs
1795 When @var{m1} is strictly wider than @var{m2}, the @code{subreg}
1796 expression is called @dfn{paradoxical}. The canonical test for this
1797 class of @code{subreg} is:
1800 GET_MODE_SIZE (@var{m1}) > GET_MODE_SIZE (@var{m2})
1803 Paradoxical @code{subreg}s can be used as both lvalues and rvalues.
1804 When used as an lvalue, the low-order bits of the source value
1805 are stored in @var{reg} and the high-order bits are discarded.
1806 When used as an rvalue, the low-order bits of the @code{subreg} are
1807 taken from @var{reg} while the high-order bits may or may not be
1810 The high-order bits of rvalues are in the following circumstances:
1813 @item @code{subreg}s of @code{mem}
1814 When @var{m2} is smaller than a word, the macro @code{LOAD_EXTEND_OP},
1815 can control how the high-order bits are defined.
1817 @item @code{subreg} of @code{reg}s
1818 The upper bits are defined when @code{SUBREG_PROMOTED_VAR_P} is true.
1819 @code{SUBREG_PROMOTED_UNSIGNED_P} describes what the upper bits hold.
1820 Such subregs usually represent local variables, register variables
1821 and parameter pseudo variables that have been promoted to a wider mode.
1825 @var{bytenum} is always zero for a paradoxical @code{subreg}, even on
1828 For example, the paradoxical @code{subreg}:
1831 (set (subreg:SI (reg:HI @var{x}) 0) @var{y})
1834 stores the lower 2 bytes of @var{y} in @var{x} and discards the upper
1835 2 bytes. A subsequent:
1838 (set @var{z} (subreg:SI (reg:HI @var{x}) 0))
1841 would set the lower two bytes of @var{z} to @var{y} and set the upper
1842 two bytes to an unknown value assuming @code{SUBREG_PROMOTED_VAR_P} is
1845 @item Normal subregs
1846 When @var{m1} is at least as narrow as @var{m2} the @code{subreg}
1847 expression is called @dfn{normal}.
1849 Normal @code{subreg}s restrict consideration to certain bits of
1850 @var{reg}. There are two cases. If @var{m1} is smaller than a word,
1851 the @code{subreg} refers to the least-significant part (or
1852 @dfn{lowpart}) of one word of @var{reg}. If @var{m1} is word-sized or
1853 greater, the @code{subreg} refers to one or more complete words.
1855 When used as an lvalue, @code{subreg} is a word-based accessor.
1856 Storing to a @code{subreg} modifies all the words of @var{reg} that
1857 overlap the @code{subreg}, but it leaves the other words of @var{reg}
1860 When storing to a normal @code{subreg} that is smaller than a word,
1861 the other bits of the referenced word are usually left in an undefined
1862 state. This laxity makes it easier to generate efficient code for
1863 such instructions. To represent an instruction that preserves all the
1864 bits outside of those in the @code{subreg}, use @code{strict_low_part}
1865 or @code{zero_extract} around the @code{subreg}.
1867 @var{bytenum} must identify the offset of the first byte of the
1868 @code{subreg} from the start of @var{reg}, assuming that @var{reg} is
1869 laid out in memory order. The memory order of bytes is defined by
1870 two target macros, @code{WORDS_BIG_ENDIAN} and @code{BYTES_BIG_ENDIAN}:
1874 @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1875 @code{WORDS_BIG_ENDIAN}, if set to 1, says that byte number zero is
1876 part of the most significant word; otherwise, it is part of the least
1880 @cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
1881 @code{BYTES_BIG_ENDIAN}, if set to 1, says that byte number zero is
1882 the most significant byte within a word; otherwise, it is the least
1883 significant byte within a word.
1886 @cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
1887 On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
1888 @code{WORDS_BIG_ENDIAN}. However, most parts of the compiler treat
1889 floating point values as if they had the same endianness as integer
1890 values. This works because they handle them solely as a collection of
1891 integer values, with no particular numerical value. Only real.c and
1892 the runtime libraries care about @code{FLOAT_WORDS_BIG_ENDIAN}.
1897 (subreg:HI (reg:SI @var{x}) 2)
1900 on a @code{BYTES_BIG_ENDIAN}, @samp{UNITS_PER_WORD == 4} target is the same as
1903 (subreg:HI (reg:SI @var{x}) 0)
1906 on a little-endian, @samp{UNITS_PER_WORD == 4} target. Both
1907 @code{subreg}s access the lower two bytes of register @var{x}.
1911 A @code{MODE_PARTIAL_INT} mode behaves as if it were as wide as the
1912 corresponding @code{MODE_INT} mode, except that it has an unknown
1913 number of undefined bits. For example:
1916 (subreg:PSI (reg:SI 0) 0)
1919 accesses the whole of @samp{(reg:SI 0)}, but the exact relationship
1920 between the @code{PSImode} value and the @code{SImode} value is not
1921 defined. If we assume @samp{UNITS_PER_WORD <= 4}, then the following
1925 (subreg:PSI (reg:DI 0) 0)
1926 (subreg:PSI (reg:DI 0) 4)
1929 represent independent 4-byte accesses to the two halves of
1930 @samp{(reg:DI 0)}. Both @code{subreg}s have an unknown number
1933 If @samp{UNITS_PER_WORD <= 2} then these two @code{subreg}s:
1936 (subreg:HI (reg:PSI 0) 0)
1937 (subreg:HI (reg:PSI 0) 2)
1940 represent independent 2-byte accesses that together span the whole
1941 of @samp{(reg:PSI 0)}. Storing to the first @code{subreg} does not
1942 affect the value of the second, and vice versa. @samp{(reg:PSI 0)}
1943 has an unknown number of undefined bits, so the assignment:
1946 (set (subreg:HI (reg:PSI 0) 0) (reg:HI 4))
1949 does not guarantee that @samp{(subreg:HI (reg:PSI 0) 0)} has the
1950 value @samp{(reg:HI 4)}.
1952 @cindex @code{CANNOT_CHANGE_MODE_CLASS} and subreg semantics
1953 The rules above apply to both pseudo @var{reg}s and hard @var{reg}s.
1954 If the semantics are not correct for particular combinations of
1955 @var{m1}, @var{m2} and hard @var{reg}, the target-specific code
1956 must ensure that those combinations are never used. For example:
1959 CANNOT_CHANGE_MODE_CLASS (@var{m2}, @var{m1}, @var{class})
1962 must be true for every class @var{class} that includes @var{reg}.
1966 The first operand of a @code{subreg} expression is customarily accessed
1967 with the @code{SUBREG_REG} macro and the second operand is customarily
1968 accessed with the @code{SUBREG_BYTE} macro.
1970 It has been several years since a platform in which
1971 @code{BYTES_BIG_ENDIAN} not equal to @code{WORDS_BIG_ENDIAN} has
1972 been tested. Anyone wishing to support such a platform in the future
1973 may be confronted with code rot.
1976 @cindex scratch operands
1977 @item (scratch:@var{m})
1978 This represents a scratch register that will be required for the
1979 execution of a single instruction and not used subsequently. It is
1980 converted into a @code{reg} by either the local register allocator or
1983 @code{scratch} is usually present inside a @code{clobber} operation
1984 (@pxref{Side Effects}).
1987 @cindex condition code register
1989 This refers to the machine's condition code register. It has no
1990 operands and may not have a machine mode. There are two ways to use it:
1994 To stand for a complete set of condition code flags. This is best on
1995 most machines, where each comparison sets the entire series of flags.
1997 With this technique, @code{(cc0)} may be validly used in only two
1998 contexts: as the destination of an assignment (in test and compare
1999 instructions) and in comparison operators comparing against zero
2000 (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
2003 To stand for a single flag that is the result of a single condition.
2004 This is useful on machines that have only a single flag bit, and in
2005 which comparison instructions must specify the condition to test.
2007 With this technique, @code{(cc0)} may be validly used in only two
2008 contexts: as the destination of an assignment (in test and compare
2009 instructions) where the source is a comparison operator, and as the
2010 first operand of @code{if_then_else} (in a conditional branch).
2014 There is only one expression object of code @code{cc0}; it is the
2015 value of the variable @code{cc0_rtx}. Any attempt to create an
2016 expression of code @code{cc0} will return @code{cc0_rtx}.
2018 Instructions can set the condition code implicitly. On many machines,
2019 nearly all instructions set the condition code based on the value that
2020 they compute or store. It is not necessary to record these actions
2021 explicitly in the RTL because the machine description includes a
2022 prescription for recognizing the instructions that do so (by means of
2023 the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
2024 instructions whose sole purpose is to set the condition code, and
2025 instructions that use the condition code, need mention @code{(cc0)}.
2027 On some machines, the condition code register is given a register number
2028 and a @code{reg} is used instead of @code{(cc0)}. This is usually the
2029 preferable approach if only a small subset of instructions modify the
2030 condition code. Other machines store condition codes in general
2031 registers; in such cases a pseudo register should be used.
2033 Some machines, such as the SPARC and RS/6000, have two sets of
2034 arithmetic instructions, one that sets and one that does not set the
2035 condition code. This is best handled by normally generating the
2036 instruction that does not set the condition code, and making a pattern
2037 that both performs the arithmetic and sets the condition code register
2038 (which would not be @code{(cc0)} in this case). For examples, search
2039 for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
2043 @cindex program counter
2044 This represents the machine's program counter. It has no operands and
2045 may not have a machine mode. @code{(pc)} may be validly used only in
2046 certain specific contexts in jump instructions.
2049 There is only one expression object of code @code{pc}; it is the value
2050 of the variable @code{pc_rtx}. Any attempt to create an expression of
2051 code @code{pc} will return @code{pc_rtx}.
2053 All instructions that do not jump alter the program counter implicitly
2054 by incrementing it, but there is no need to mention this in the RTL@.
2057 @item (mem:@var{m} @var{addr} @var{alias})
2058 This RTX represents a reference to main memory at an address
2059 represented by the expression @var{addr}. @var{m} specifies how large
2060 a unit of memory is accessed. @var{alias} specifies an alias set for the
2061 reference. In general two items are in different alias sets if they cannot
2062 reference the same memory address.
2064 The construct @code{(mem:BLK (scratch))} is considered to alias all
2065 other memories. Thus it may be used as a memory barrier in epilogue
2066 stack deallocation patterns.
2069 @item (concat@var{m} @var{rtx} @var{rtx})
2070 This RTX represents the concatenation of two other RTXs. This is used
2071 for complex values. It should only appear in the RTL attached to
2072 declarations and during RTL generation. It should not appear in the
2073 ordinary insn chain.
2076 @item (concatn@var{m} [@var{rtx} @dots{}])
2077 This RTX represents the concatenation of all the @var{rtx} to make a
2078 single value. Like @code{concat}, this should only appear in
2079 declarations, and not in the insn chain.
2083 @section RTL Expressions for Arithmetic
2084 @cindex arithmetic, in RTL
2085 @cindex math, in RTL
2086 @cindex RTL expressions for arithmetic
2088 Unless otherwise specified, all the operands of arithmetic expressions
2089 must be valid for mode @var{m}. An operand is valid for mode @var{m}
2090 if it has mode @var{m}, or if it is a @code{const_int} or
2091 @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
2093 For commutative binary operations, constants should be placed in the
2101 @cindex RTL addition
2102 @cindex RTL addition with signed saturation
2103 @cindex RTL addition with unsigned saturation
2104 @item (plus:@var{m} @var{x} @var{y})
2105 @itemx (ss_plus:@var{m} @var{x} @var{y})
2106 @itemx (us_plus:@var{m} @var{x} @var{y})
2108 These three expressions all represent the sum of the values
2109 represented by @var{x} and @var{y} carried out in machine mode
2110 @var{m}. They differ in their behavior on overflow of integer modes.
2111 @code{plus} wraps round modulo the width of @var{m}; @code{ss_plus}
2112 saturates at the maximum signed value representable in @var{m};
2113 @code{us_plus} saturates at the maximum unsigned value.
2115 @c ??? What happens on overflow of floating point modes?
2118 @item (lo_sum:@var{m} @var{x} @var{y})
2120 This expression represents the sum of @var{x} and the low-order bits
2121 of @var{y}. It is used with @code{high} (@pxref{Constants}) to
2122 represent the typical two-instruction sequence used in RISC machines
2123 to reference a global memory location.
2125 The number of low order bits is machine-dependent but is
2126 normally the number of bits in a @code{Pmode} item minus the number of
2127 bits set by @code{high}.
2129 @var{m} should be @code{Pmode}.
2134 @cindex RTL difference
2135 @cindex RTL subtraction
2136 @cindex RTL subtraction with signed saturation
2137 @cindex RTL subtraction with unsigned saturation
2138 @item (minus:@var{m} @var{x} @var{y})
2139 @itemx (ss_minus:@var{m} @var{x} @var{y})
2140 @itemx (us_minus:@var{m} @var{x} @var{y})
2142 These three expressions represent the result of subtracting @var{y}
2143 from @var{x}, carried out in mode @var{M}. Behavior on overflow is
2144 the same as for the three variants of @code{plus} (see above).
2147 @cindex RTL comparison
2148 @item (compare:@var{m} @var{x} @var{y})
2149 Represents the result of subtracting @var{y} from @var{x} for purposes
2150 of comparison. The result is computed without overflow, as if with
2153 Of course, machines can't really subtract with infinite precision.
2154 However, they can pretend to do so when only the sign of the result will
2155 be used, which is the case when the result is stored in the condition
2156 code. And that is the @emph{only} way this kind of expression may
2157 validly be used: as a value to be stored in the condition codes, either
2158 @code{(cc0)} or a register. @xref{Comparisons}.
2160 The mode @var{m} is not related to the modes of @var{x} and @var{y}, but
2161 instead is the mode of the condition code value. If @code{(cc0)} is
2162 used, it is @code{VOIDmode}. Otherwise it is some mode in class
2163 @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m}
2164 is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
2165 information (in an unspecified format) so that any comparison operator
2166 can be applied to the result of the @code{COMPARE} operation. For other
2167 modes in class @code{MODE_CC}, the operation only returns a subset of
2170 Normally, @var{x} and @var{y} must have the same mode. Otherwise,
2171 @code{compare} is valid only if the mode of @var{x} is in class
2172 @code{MODE_INT} and @var{y} is a @code{const_int} or
2173 @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
2174 determines what mode the comparison is to be done in; thus it must not
2177 If one of the operands is a constant, it should be placed in the
2178 second operand and the comparison code adjusted as appropriate.
2180 A @code{compare} specifying two @code{VOIDmode} constants is not valid
2181 since there is no way to know in what mode the comparison is to be
2182 performed; the comparison must either be folded during the compilation
2183 or the first operand must be loaded into a register while its mode is
2190 @cindex negation with signed saturation
2191 @cindex negation with unsigned saturation
2192 @item (neg:@var{m} @var{x})
2193 @itemx (ss_neg:@var{m} @var{x})
2194 @itemx (us_neg:@var{m} @var{x})
2195 These two expressions represent the negation (subtraction from zero) of
2196 the value represented by @var{x}, carried out in mode @var{m}. They
2197 differ in the behavior on overflow of integer modes. In the case of
2198 @code{neg}, the negation of the operand may be a number not representable
2199 in mode @var{m}, in which case it is truncated to @var{m}. @code{ss_neg}
2200 and @code{us_neg} ensure that an out-of-bounds result saturates to the
2201 maximum or minimum signed or unsigned value.
2206 @cindex multiplication
2208 @cindex multiplication with signed saturation
2209 @cindex multiplication with unsigned saturation
2210 @item (mult:@var{m} @var{x} @var{y})
2211 @itemx (ss_mult:@var{m} @var{x} @var{y})
2212 @itemx (us_mult:@var{m} @var{x} @var{y})
2213 Represents the signed product of the values represented by @var{x} and
2214 @var{y} carried out in machine mode @var{m}.
2215 @code{ss_mult} and @code{us_mult} ensure that an out-of-bounds result
2216 saturates to the maximum or minimum signed or unsigned value.
2218 Some machines support a multiplication that generates a product wider
2219 than the operands. Write the pattern for this as
2222 (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
2225 where @var{m} is wider than the modes of @var{x} and @var{y}, which need
2228 For unsigned widening multiplication, use the same idiom, but with
2229 @code{zero_extend} instead of @code{sign_extend}.
2234 @cindex signed division
2235 @cindex signed division with signed saturation
2237 @item (div:@var{m} @var{x} @var{y})
2238 @itemx (ss_div:@var{m} @var{x} @var{y})
2239 Represents the quotient in signed division of @var{x} by @var{y},
2240 carried out in machine mode @var{m}. If @var{m} is a floating point
2241 mode, it represents the exact quotient; otherwise, the integerized
2243 @code{ss_div} ensures that an out-of-bounds result saturates to the maximum
2244 or minimum signed value.
2246 Some machines have division instructions in which the operands and
2247 quotient widths are not all the same; you should represent
2248 such instructions using @code{truncate} and @code{sign_extend} as in,
2251 (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
2255 @cindex unsigned division
2256 @cindex unsigned division with unsigned saturation
2258 @item (udiv:@var{m} @var{x} @var{y})
2259 @itemx (us_div:@var{m} @var{x} @var{y})
2260 Like @code{div} but represents unsigned division.
2261 @code{us_div} ensures that an out-of-bounds result saturates to the maximum
2262 or minimum unsigned value.
2268 @item (mod:@var{m} @var{x} @var{y})
2269 @itemx (umod:@var{m} @var{x} @var{y})
2270 Like @code{div} and @code{udiv} but represent the remainder instead of
2275 @cindex signed minimum
2276 @cindex signed maximum
2277 @item (smin:@var{m} @var{x} @var{y})
2278 @itemx (smax:@var{m} @var{x} @var{y})
2279 Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
2280 @var{x} and @var{y}, interpreted as signed values in mode @var{m}.
2281 When used with floating point, if both operands are zeros, or if either
2282 operand is @code{NaN}, then it is unspecified which of the two operands
2283 is returned as the result.
2287 @cindex unsigned minimum and maximum
2288 @item (umin:@var{m} @var{x} @var{y})
2289 @itemx (umax:@var{m} @var{x} @var{y})
2290 Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
2294 @cindex complement, bitwise
2295 @cindex bitwise complement
2296 @item (not:@var{m} @var{x})
2297 Represents the bitwise complement of the value represented by @var{x},
2298 carried out in mode @var{m}, which must be a fixed-point machine mode.
2301 @cindex logical-and, bitwise
2302 @cindex bitwise logical-and
2303 @item (and:@var{m} @var{x} @var{y})
2304 Represents the bitwise logical-and of the values represented by
2305 @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
2306 a fixed-point machine mode.
2309 @cindex inclusive-or, bitwise
2310 @cindex bitwise inclusive-or
2311 @item (ior:@var{m} @var{x} @var{y})
2312 Represents the bitwise inclusive-or of the values represented by @var{x}
2313 and @var{y}, carried out in machine mode @var{m}, which must be a
2317 @cindex exclusive-or, bitwise
2318 @cindex bitwise exclusive-or
2319 @item (xor:@var{m} @var{x} @var{y})
2320 Represents the bitwise exclusive-or of the values represented by @var{x}
2321 and @var{y}, carried out in machine mode @var{m}, which must be a
2329 @cindex arithmetic shift
2330 @cindex arithmetic shift with signed saturation
2331 @cindex arithmetic shift with unsigned saturation
2332 @item (ashift:@var{m} @var{x} @var{c})
2333 @itemx (ss_ashift:@var{m} @var{x} @var{c})
2334 @itemx (us_ashift:@var{m} @var{x} @var{c})
2335 These three expressions represent the result of arithmetically shifting @var{x}
2336 left by @var{c} places. They differ in their behavior on overflow of integer
2337 modes. An @code{ashift} operation is a plain shift with no special behavior
2338 in case of a change in the sign bit; @code{ss_ashift} and @code{us_ashift}
2339 saturates to the minimum or maximum representable value if any of the bits
2340 shifted out differs from the final sign bit.
2342 @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
2343 be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
2344 mode is determined by the mode called for in the machine description
2345 entry for the left-shift instruction. For example, on the VAX, the mode
2346 of @var{c} is @code{QImode} regardless of @var{m}.
2351 @item (lshiftrt:@var{m} @var{x} @var{c})
2352 @itemx (ashiftrt:@var{m} @var{x} @var{c})
2353 Like @code{ashift} but for right shift. Unlike the case for left shift,
2354 these two operations are distinct.
2360 @cindex right rotate
2361 @item (rotate:@var{m} @var{x} @var{c})
2362 @itemx (rotatert:@var{m} @var{x} @var{c})
2363 Similar but represent left and right rotate. If @var{c} is a constant,
2368 @cindex absolute value
2369 @item (abs:@var{m} @var{x})
2370 @item (ss_abs:@var{m} @var{x})
2371 Represents the absolute value of @var{x}, computed in mode @var{m}.
2372 @code{ss_abs} ensures that an out-of-bounds result saturates to the
2373 maximum signed value.
2378 @item (sqrt:@var{m} @var{x})
2379 Represents the square root of @var{x}, computed in mode @var{m}.
2380 Most often @var{m} will be a floating point mode.
2383 @item (ffs:@var{m} @var{x})
2384 Represents one plus the index of the least significant 1-bit in
2385 @var{x}, represented as an integer of mode @var{m}. (The value is
2386 zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
2387 depending on the target machine, various mode combinations may be
2391 @item (clz:@var{m} @var{x})
2392 Represents the number of leading 0-bits in @var{x}, represented as an
2393 integer of mode @var{m}, starting at the most significant bit position.
2394 If @var{x} is zero, the value is determined by
2395 @code{CLZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}). Note that this is one of
2396 the few expressions that is not invariant under widening. The mode of
2397 @var{x} will usually be an integer mode.
2400 @item (ctz:@var{m} @var{x})
2401 Represents the number of trailing 0-bits in @var{x}, represented as an
2402 integer of mode @var{m}, starting at the least significant bit position.
2403 If @var{x} is zero, the value is determined by
2404 @code{CTZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}). Except for this case,
2405 @code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}. The mode of
2406 @var{x} will usually be an integer mode.
2409 @item (popcount:@var{m} @var{x})
2410 Represents the number of 1-bits in @var{x}, represented as an integer of
2411 mode @var{m}. The mode of @var{x} will usually be an integer mode.
2414 @item (parity:@var{m} @var{x})
2415 Represents the number of 1-bits modulo 2 in @var{x}, represented as an
2416 integer of mode @var{m}. The mode of @var{x} will usually be an integer
2420 @item (bswap:@var{m} @var{x})
2421 Represents the value @var{x} with the order of bytes reversed, carried out
2422 in mode @var{m}, which must be a fixed-point machine mode.
2426 @section Comparison Operations
2427 @cindex RTL comparison operations
2429 Comparison operators test a relation on two operands and are considered
2430 to represent a machine-dependent nonzero value described by, but not
2431 necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
2432 if the relation holds, or zero if it does not, for comparison operators
2433 whose results have a `MODE_INT' mode,
2434 @code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or
2435 zero if it does not, for comparison operators that return floating-point
2436 values, and a vector of either @code{VECTOR_STORE_FLAG_VALUE} (@pxref{Misc})
2437 if the relation holds, or of zeros if it does not, for comparison operators
2438 that return vector results.
2439 The mode of the comparison operation is independent of the mode
2440 of the data being compared. If the comparison operation is being tested
2441 (e.g., the first operand of an @code{if_then_else}), the mode must be
2444 @cindex condition codes
2445 There are two ways that comparison operations may be used. The
2446 comparison operators may be used to compare the condition codes
2447 @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
2448 a construct actually refers to the result of the preceding instruction
2449 in which the condition codes were set. The instruction setting the
2450 condition code must be adjacent to the instruction using the condition
2451 code; only @code{note} insns may separate them.
2453 Alternatively, a comparison operation may directly compare two data
2454 objects. The mode of the comparison is determined by the operands; they
2455 must both be valid for a common machine mode. A comparison with both
2456 operands constant would be invalid as the machine mode could not be
2457 deduced from it, but such a comparison should never exist in RTL due to
2460 In the example above, if @code{(cc0)} were last set to
2461 @code{(compare @var{x} @var{y})}, the comparison operation is
2462 identical to @code{(eq @var{x} @var{y})}. Usually only one style
2463 of comparisons is supported on a particular machine, but the combine
2464 pass will try to merge the operations to produce the @code{eq} shown
2465 in case it exists in the context of the particular insn involved.
2467 Inequality comparisons come in two flavors, signed and unsigned. Thus,
2468 there are distinct expression codes @code{gt} and @code{gtu} for signed and
2469 unsigned greater-than. These can produce different results for the same
2470 pair of integer values: for example, 1 is signed greater-than @minus{}1 but not
2471 unsigned greater-than, because @minus{}1 when regarded as unsigned is actually
2472 @code{0xffffffff} which is greater than 1.
2474 The signed comparisons are also used for floating point values. Floating
2475 point comparisons are distinguished by the machine modes of the operands.
2480 @item (eq:@var{m} @var{x} @var{y})
2481 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2482 are equal, otherwise 0.
2486 @item (ne:@var{m} @var{x} @var{y})
2487 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2488 are not equal, otherwise 0.
2491 @cindex greater than
2492 @item (gt:@var{m} @var{x} @var{y})
2493 @code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they
2494 are fixed-point, the comparison is done in a signed sense.
2497 @cindex greater than
2498 @cindex unsigned greater than
2499 @item (gtu:@var{m} @var{x} @var{y})
2500 Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
2505 @cindex unsigned less than
2506 @item (lt:@var{m} @var{x} @var{y})
2507 @itemx (ltu:@var{m} @var{x} @var{y})
2508 Like @code{gt} and @code{gtu} but test for ``less than''.
2511 @cindex greater than
2513 @cindex unsigned greater than
2514 @item (ge:@var{m} @var{x} @var{y})
2515 @itemx (geu:@var{m} @var{x} @var{y})
2516 Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
2519 @cindex less than or equal
2521 @cindex unsigned less than
2522 @item (le:@var{m} @var{x} @var{y})
2523 @itemx (leu:@var{m} @var{x} @var{y})
2524 Like @code{gt} and @code{gtu} but test for ``less than or equal''.
2526 @findex if_then_else
2527 @item (if_then_else @var{cond} @var{then} @var{else})
2528 This is not a comparison operation but is listed here because it is
2529 always used in conjunction with a comparison operation. To be
2530 precise, @var{cond} is a comparison expression. This expression
2531 represents a choice, according to @var{cond}, between the value
2532 represented by @var{then} and the one represented by @var{else}.
2534 On most machines, @code{if_then_else} expressions are valid only
2535 to express conditional jumps.
2538 @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
2539 Similar to @code{if_then_else}, but more general. Each of @var{test1},
2540 @var{test2}, @dots{} is performed in turn. The result of this expression is
2541 the @var{value} corresponding to the first nonzero test, or @var{default} if
2542 none of the tests are nonzero expressions.
2544 This is currently not valid for instruction patterns and is supported only
2545 for insn attributes. @xref{Insn Attributes}.
2552 Special expression codes exist to represent bit-field instructions.
2555 @findex sign_extract
2556 @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
2557 @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
2558 This represents a reference to a sign-extended bit-field contained or
2559 starting in @var{loc} (a memory or register reference). The bit-field
2560 is @var{size} bits wide and starts at bit @var{pos}. The compilation
2561 option @code{BITS_BIG_ENDIAN} says which end of the memory unit
2562 @var{pos} counts from.
2564 If @var{loc} is in memory, its mode must be a single-byte integer mode.
2565 If @var{loc} is in a register, the mode to use is specified by the
2566 operand of the @code{insv} or @code{extv} pattern
2567 (@pxref{Standard Names}) and is usually a full-word integer mode,
2568 which is the default if none is specified.
2570 The mode of @var{pos} is machine-specific and is also specified
2571 in the @code{insv} or @code{extv} pattern.
2573 The mode @var{m} is the same as the mode that would be used for
2574 @var{loc} if it were a register.
2576 A @code{sign_extract} can not appear as an lvalue, or part thereof,
2579 @findex zero_extract
2580 @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
2581 Like @code{sign_extract} but refers to an unsigned or zero-extended
2582 bit-field. The same sequence of bits are extracted, but they
2583 are filled to an entire word with zeros instead of by sign-extension.
2585 Unlike @code{sign_extract}, this type of expressions can be lvalues
2586 in RTL; they may appear on the left side of an assignment, indicating
2587 insertion of a value into the specified bit-field.
2590 @node Vector Operations
2591 @section Vector Operations
2592 @cindex vector operations
2594 All normal RTL expressions can be used with vector modes; they are
2595 interpreted as operating on each part of the vector independently.
2596 Additionally, there are a few new expressions to describe specific vector
2601 @item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
2602 This describes a merge operation between two vectors. The result is a vector
2603 of mode @var{m}; its elements are selected from either @var{vec1} or
2604 @var{vec2}. Which elements are selected is described by @var{items}, which
2605 is a bit mask represented by a @code{const_int}; a zero bit indicates the
2606 corresponding element in the result vector is taken from @var{vec2} while
2607 a set bit indicates it is taken from @var{vec1}.
2610 @item (vec_select:@var{m} @var{vec1} @var{selection})
2611 This describes an operation that selects parts of a vector. @var{vec1} is
2612 the source vector, @var{selection} is a @code{parallel} that contains a
2613 @code{const_int} for each of the subparts of the result vector, giving the
2614 number of the source subpart that should be stored into it.
2617 @item (vec_concat:@var{m} @var{vec1} @var{vec2})
2618 Describes a vector concat operation. The result is a concatenation of the
2619 vectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of
2622 @findex vec_duplicate
2623 @item (vec_duplicate:@var{m} @var{vec})
2624 This operation converts a small vector into a larger one by duplicating the
2625 input values. The output vector mode must have the same submodes as the
2626 input vector mode, and the number of output parts must be an integer multiple
2627 of the number of input parts.
2632 @section Conversions
2634 @cindex machine mode conversions
2636 All conversions between machine modes must be represented by
2637 explicit conversion operations. For example, an expression
2638 which is the sum of a byte and a full word cannot be written as
2639 @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
2640 operation requires two operands of the same machine mode.
2641 Therefore, the byte-sized operand is enclosed in a conversion
2645 (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
2648 The conversion operation is not a mere placeholder, because there
2649 may be more than one way of converting from a given starting mode
2650 to the desired final mode. The conversion operation code says how
2653 For all conversion operations, @var{x} must not be @code{VOIDmode}
2654 because the mode in which to do the conversion would not be known.
2655 The conversion must either be done at compile-time or @var{x}
2656 must be placed into a register.
2660 @item (sign_extend:@var{m} @var{x})
2661 Represents the result of sign-extending the value @var{x}
2662 to machine mode @var{m}. @var{m} must be a fixed-point mode
2663 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2666 @item (zero_extend:@var{m} @var{x})
2667 Represents the result of zero-extending the value @var{x}
2668 to machine mode @var{m}. @var{m} must be a fixed-point mode
2669 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2671 @findex float_extend
2672 @item (float_extend:@var{m} @var{x})
2673 Represents the result of extending the value @var{x}
2674 to machine mode @var{m}. @var{m} must be a floating point mode
2675 and @var{x} a floating point value of a mode narrower than @var{m}.
2678 @item (truncate:@var{m} @var{x})
2679 Represents the result of truncating the value @var{x}
2680 to machine mode @var{m}. @var{m} must be a fixed-point mode
2681 and @var{x} a fixed-point value of a mode wider than @var{m}.
2684 @item (ss_truncate:@var{m} @var{x})
2685 Represents the result of truncating the value @var{x}
2686 to machine mode @var{m}, using signed saturation in the case of
2687 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2691 @item (us_truncate:@var{m} @var{x})
2692 Represents the result of truncating the value @var{x}
2693 to machine mode @var{m}, using unsigned saturation in the case of
2694 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2697 @findex float_truncate
2698 @item (float_truncate:@var{m} @var{x})
2699 Represents the result of truncating the value @var{x}
2700 to machine mode @var{m}. @var{m} must be a floating point mode
2701 and @var{x} a floating point value of a mode wider than @var{m}.
2704 @item (float:@var{m} @var{x})
2705 Represents the result of converting fixed point value @var{x},
2706 regarded as signed, to floating point mode @var{m}.
2708 @findex unsigned_float
2709 @item (unsigned_float:@var{m} @var{x})
2710 Represents the result of converting fixed point value @var{x},
2711 regarded as unsigned, to floating point mode @var{m}.
2714 @item (fix:@var{m} @var{x})
2715 When @var{m} is a floating-point mode, represents the result of
2716 converting floating point value @var{x} (valid for mode @var{m}) to an
2717 integer, still represented in floating point mode @var{m}, by rounding
2720 When @var{m} is a fixed-point mode, represents the result of
2721 converting floating point value @var{x} to mode @var{m}, regarded as
2722 signed. How rounding is done is not specified, so this operation may
2723 be used validly in compiling C code only for integer-valued operands.
2725 @findex unsigned_fix
2726 @item (unsigned_fix:@var{m} @var{x})
2727 Represents the result of converting floating point value @var{x} to
2728 fixed point mode @var{m}, regarded as unsigned. How rounding is done
2731 @findex fract_convert
2732 @item (fract_convert:@var{m} @var{x})
2733 Represents the result of converting fixed-point value @var{x} to
2734 fixed-point mode @var{m}, signed integer value @var{x} to
2735 fixed-point mode @var{m}, floating-point value @var{x} to
2736 fixed-point mode @var{m}, fixed-point value @var{x} to integer mode @var{m}
2737 regarded as signed, or fixed-point value @var{x} to floating-point mode @var{m}.
2738 When overflows or underflows happen, the results are undefined.
2741 @item (sat_fract:@var{m} @var{x})
2742 Represents the result of converting fixed-point value @var{x} to
2743 fixed-point mode @var{m}, signed integer value @var{x} to
2744 fixed-point mode @var{m}, or floating-point value @var{x} to
2745 fixed-point mode @var{m}.
2746 When overflows or underflows happen, the results are saturated to the
2747 maximum or the minimum.
2749 @findex unsigned_fract_convert
2750 @item (unsigned_fract_convert:@var{m} @var{x})
2751 Represents the result of converting fixed-point value @var{x} to
2752 integer mode @var{m} regarded as unsigned, or unsigned integer value @var{x} to
2753 fixed-point mode @var{m}.
2754 When overflows or underflows happen, the results are undefined.
2756 @findex unsigned_sat_fract
2757 @item (unsigned_sat_fract:@var{m} @var{x})
2758 Represents the result of converting unsigned integer value @var{x} to
2759 fixed-point mode @var{m}.
2760 When overflows or underflows happen, the results are saturated to the
2761 maximum or the minimum.
2764 @node RTL Declarations
2765 @section Declarations
2766 @cindex RTL declarations
2767 @cindex declarations, RTL
2769 Declaration expression codes do not represent arithmetic operations
2770 but rather state assertions about their operands.
2773 @findex strict_low_part
2774 @cindex @code{subreg}, in @code{strict_low_part}
2775 @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
2776 This expression code is used in only one context: as the destination operand of a
2777 @code{set} expression. In addition, the operand of this expression
2778 must be a non-paradoxical @code{subreg} expression.
2780 The presence of @code{strict_low_part} says that the part of the
2781 register which is meaningful in mode @var{n}, but is not part of
2782 mode @var{m}, is not to be altered. Normally, an assignment to such
2783 a subreg is allowed to have undefined effects on the rest of the
2784 register when @var{m} is less than a word.
2788 @section Side Effect Expressions
2789 @cindex RTL side effect expressions
2791 The expression codes described so far represent values, not actions.
2792 But machine instructions never produce values; they are meaningful
2793 only for their side effects on the state of the machine. Special
2794 expression codes are used to represent side effects.
2796 The body of an instruction is always one of these side effect codes;
2797 the codes described above, which represent values, appear only as
2798 the operands of these.
2802 @item (set @var{lval} @var{x})
2803 Represents the action of storing the value of @var{x} into the place
2804 represented by @var{lval}. @var{lval} must be an expression
2805 representing a place that can be stored in: @code{reg} (or @code{subreg},
2806 @code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc},
2807 @code{parallel}, or @code{cc0}.
2809 If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
2810 machine mode; then @var{x} must be valid for that mode.
2812 If @var{lval} is a @code{reg} whose machine mode is less than the full
2813 width of the register, then it means that the part of the register
2814 specified by the machine mode is given the specified value and the
2815 rest of the register receives an undefined value. Likewise, if
2816 @var{lval} is a @code{subreg} whose machine mode is narrower than
2817 the mode of the register, the rest of the register can be changed in
2820 If @var{lval} is a @code{strict_low_part} of a subreg, then the part
2821 of the register specified by the machine mode of the @code{subreg} is
2822 given the value @var{x} and the rest of the register is not changed.
2824 If @var{lval} is a @code{zero_extract}, then the referenced part of
2825 the bit-field (a memory or register reference) specified by the
2826 @code{zero_extract} is given the value @var{x} and the rest of the
2827 bit-field is not changed. Note that @code{sign_extract} can not
2828 appear in @var{lval}.
2830 If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
2831 be either a @code{compare} expression or a value that may have any mode.
2832 The latter case represents a ``test'' instruction. The expression
2833 @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
2834 @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
2835 Use the former expression to save space during the compilation.
2837 If @var{lval} is a @code{parallel}, it is used to represent the case of
2838 a function returning a structure in multiple registers. Each element
2839 of the @code{parallel} is an @code{expr_list} whose first operand is a
2840 @code{reg} and whose second operand is a @code{const_int} representing the
2841 offset (in bytes) into the structure at which the data in that register
2842 corresponds. The first element may be null to indicate that the structure
2843 is also passed partly in memory.
2845 @cindex jump instructions and @code{set}
2846 @cindex @code{if_then_else} usage
2847 If @var{lval} is @code{(pc)}, we have a jump instruction, and the
2848 possibilities for @var{x} are very limited. It may be a
2849 @code{label_ref} expression (unconditional jump). It may be an
2850 @code{if_then_else} (conditional jump), in which case either the
2851 second or the third operand must be @code{(pc)} (for the case which
2852 does not jump) and the other of the two must be a @code{label_ref}
2853 (for the case which does jump). @var{x} may also be a @code{mem} or
2854 @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
2855 @code{mem}; these unusual patterns are used to represent jumps through
2858 If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
2859 @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
2860 valid for the mode of @var{lval}.
2864 @var{lval} is customarily accessed with the @code{SET_DEST} macro and
2865 @var{x} with the @code{SET_SRC} macro.
2869 As the sole expression in a pattern, represents a return from the
2870 current function, on machines where this can be done with one
2871 instruction, such as VAXen. On machines where a multi-instruction
2872 ``epilogue'' must be executed in order to return from the function,
2873 returning is done by jumping to a label which precedes the epilogue, and
2874 the @code{return} expression code is never used.
2876 Inside an @code{if_then_else} expression, represents the value to be
2877 placed in @code{pc} to return to the caller.
2879 Note that an insn pattern of @code{(return)} is logically equivalent to
2880 @code{(set (pc) (return))}, but the latter form is never used.
2883 @item (call @var{function} @var{nargs})
2884 Represents a function call. @var{function} is a @code{mem} expression
2885 whose address is the address of the function to be called.
2886 @var{nargs} is an expression which can be used for two purposes: on
2887 some machines it represents the number of bytes of stack argument; on
2888 others, it represents the number of argument registers.
2890 Each machine has a standard machine mode which @var{function} must
2891 have. The machine description defines macro @code{FUNCTION_MODE} to
2892 expand into the requisite mode name. The purpose of this mode is to
2893 specify what kind of addressing is allowed, on machines where the
2894 allowed kinds of addressing depend on the machine mode being
2898 @item (clobber @var{x})
2899 Represents the storing or possible storing of an unpredictable,
2900 undescribed value into @var{x}, which must be a @code{reg},
2901 @code{scratch}, @code{parallel} or @code{mem} expression.
2903 One place this is used is in string instructions that store standard
2904 values into particular hard registers. It may not be worth the
2905 trouble to describe the values that are stored, but it is essential to
2906 inform the compiler that the registers will be altered, lest it
2907 attempt to keep data in them across the string instruction.
2909 If @var{x} is @code{(mem:BLK (const_int 0))} or
2910 @code{(mem:BLK (scratch))}, it means that all memory
2911 locations must be presumed clobbered. If @var{x} is a @code{parallel},
2912 it has the same meaning as a @code{parallel} in a @code{set} expression.
2914 Note that the machine description classifies certain hard registers as
2915 ``call-clobbered''. All function call instructions are assumed by
2916 default to clobber these registers, so there is no need to use
2917 @code{clobber} expressions to indicate this fact. Also, each function
2918 call is assumed to have the potential to alter any memory location,
2919 unless the function is declared @code{const}.
2921 If the last group of expressions in a @code{parallel} are each a
2922 @code{clobber} expression whose arguments are @code{reg} or
2923 @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
2924 phase can add the appropriate @code{clobber} expressions to an insn it
2925 has constructed when doing so will cause a pattern to be matched.
2927 This feature can be used, for example, on a machine that whose multiply
2928 and add instructions don't use an MQ register but which has an
2929 add-accumulate instruction that does clobber the MQ register. Similarly,
2930 a combined instruction might require a temporary register while the
2931 constituent instructions might not.
2933 When a @code{clobber} expression for a register appears inside a
2934 @code{parallel} with other side effects, the register allocator
2935 guarantees that the register is unoccupied both before and after that
2936 insn if it is a hard register clobber. For pseudo-register clobber,
2937 the register allocator and the reload pass do not assign the same hard
2938 register to the clobber and the input operands if there is an insn
2939 alternative containing the @samp{&} constraint (@pxref{Modifiers}) for
2940 the clobber and the hard register is in register classes of the
2941 clobber in the alternative. You can clobber either a specific hard
2942 register, a pseudo register, or a @code{scratch} expression; in the
2943 latter two cases, GCC will allocate a hard register that is available
2944 there for use as a temporary.
2946 For instructions that require a temporary register, you should use
2947 @code{scratch} instead of a pseudo-register because this will allow the
2948 combiner phase to add the @code{clobber} when required. You do this by
2949 coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
2950 clobber a pseudo register, use one which appears nowhere else---generate
2951 a new one each time. Otherwise, you may confuse CSE@.
2953 There is one other known use for clobbering a pseudo register in a
2954 @code{parallel}: when one of the input operands of the insn is also
2955 clobbered by the insn. In this case, using the same pseudo register in
2956 the clobber and elsewhere in the insn produces the expected results.
2960 Represents the use of the value of @var{x}. It indicates that the
2961 value in @var{x} at this point in the program is needed, even though
2962 it may not be apparent why this is so. Therefore, the compiler will
2963 not attempt to delete previous instructions whose only effect is to
2964 store a value in @var{x}. @var{x} must be a @code{reg} expression.
2966 In some situations, it may be tempting to add a @code{use} of a
2967 register in a @code{parallel} to describe a situation where the value
2968 of a special register will modify the behavior of the instruction.
2969 A hypothetical example might be a pattern for an addition that can
2970 either wrap around or use saturating addition depending on the value
2971 of a special control register:
2974 (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
2981 This will not work, several of the optimizers only look at expressions
2982 locally; it is very likely that if you have multiple insns with
2983 identical inputs to the @code{unspec}, they will be optimized away even
2984 if register 1 changes in between.
2986 This means that @code{use} can @emph{only} be used to describe
2987 that the register is live. You should think twice before adding
2988 @code{use} statements, more often you will want to use @code{unspec}
2989 instead. The @code{use} RTX is most commonly useful to describe that
2990 a fixed register is implicitly used in an insn. It is also safe to use
2991 in patterns where the compiler knows for other reasons that the result
2992 of the whole pattern is variable, such as @samp{movmem@var{m}} or
2993 @samp{call} patterns.
2995 During the reload phase, an insn that has a @code{use} as pattern
2996 can carry a reg_equal note. These @code{use} insns will be deleted
2997 before the reload phase exits.
2999 During the delayed branch scheduling phase, @var{x} may be an insn.
3000 This indicates that @var{x} previously was located at this place in the
3001 code and its data dependencies need to be taken into account. These
3002 @code{use} insns will be deleted before the delayed branch scheduling
3006 @item (parallel [@var{x0} @var{x1} @dots{}])
3007 Represents several side effects performed in parallel. The square
3008 brackets stand for a vector; the operand of @code{parallel} is a
3009 vector of expressions. @var{x0}, @var{x1} and so on are individual
3010 side effect expressions---expressions of code @code{set}, @code{call},
3011 @code{return}, @code{clobber} or @code{use}.
3013 ``In parallel'' means that first all the values used in the individual
3014 side-effects are computed, and second all the actual side-effects are
3015 performed. For example,
3018 (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
3019 (set (mem:SI (reg:SI 1)) (reg:SI 1))])
3023 says unambiguously that the values of hard register 1 and the memory
3024 location addressed by it are interchanged. In both places where
3025 @code{(reg:SI 1)} appears as a memory address it refers to the value
3026 in register 1 @emph{before} the execution of the insn.
3028 It follows that it is @emph{incorrect} to use @code{parallel} and
3029 expect the result of one @code{set} to be available for the next one.
3030 For example, people sometimes attempt to represent a jump-if-zero
3031 instruction this way:
3034 (parallel [(set (cc0) (reg:SI 34))
3035 (set (pc) (if_then_else
3036 (eq (cc0) (const_int 0))
3042 But this is incorrect, because it says that the jump condition depends
3043 on the condition code value @emph{before} this instruction, not on the
3044 new value that is set by this instruction.
3046 @cindex peephole optimization, RTL representation
3047 Peephole optimization, which takes place together with final assembly
3048 code output, can produce insns whose patterns consist of a @code{parallel}
3049 whose elements are the operands needed to output the resulting
3050 assembler code---often @code{reg}, @code{mem} or constant expressions.
3051 This would not be well-formed RTL at any other stage in compilation,
3052 but it is ok then because no further optimization remains to be done.
3053 However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
3054 any, must deal with such insns if you define any peephole optimizations.
3057 @item (cond_exec [@var{cond} @var{expr}])
3058 Represents a conditionally executed expression. The @var{expr} is
3059 executed only if the @var{cond} is nonzero. The @var{cond} expression
3060 must not have side-effects, but the @var{expr} may very well have
3064 @item (sequence [@var{insns} @dots{}])
3065 Represents a sequence of insns. Each of the @var{insns} that appears
3066 in the vector is suitable for appearing in the chain of insns, so it
3067 must be an @code{insn}, @code{jump_insn}, @code{call_insn},
3068 @code{code_label}, @code{barrier} or @code{note}.
3070 A @code{sequence} RTX is never placed in an actual insn during RTL
3071 generation. It represents the sequence of insns that result from a
3072 @code{define_expand} @emph{before} those insns are passed to
3073 @code{emit_insn} to insert them in the chain of insns. When actually
3074 inserted, the individual sub-insns are separated out and the
3075 @code{sequence} is forgotten.
3077 After delay-slot scheduling is completed, an insn and all the insns that
3078 reside in its delay slots are grouped together into a @code{sequence}.
3079 The insn requiring the delay slot is the first insn in the vector;
3080 subsequent insns are to be placed in the delay slot.
3082 @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
3083 indicate that a branch insn should be used that will conditionally annul
3084 the effect of the insns in the delay slots. In such a case,
3085 @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
3086 the branch and should be executed only if the branch is taken; otherwise
3087 the insn should be executed only if the branch is not taken.
3091 These expression codes appear in place of a side effect, as the body of
3092 an insn, though strictly speaking they do not always describe side
3097 @item (asm_input @var{s})
3098 Represents literal assembler code as described by the string @var{s}.
3101 @findex unspec_volatile
3102 @item (unspec [@var{operands} @dots{}] @var{index})
3103 @itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
3104 Represents a machine-specific operation on @var{operands}. @var{index}
3105 selects between multiple machine-specific operations.
3106 @code{unspec_volatile} is used for volatile operations and operations
3107 that may trap; @code{unspec} is used for other operations.
3109 These codes may appear inside a @code{pattern} of an
3110 insn, inside a @code{parallel}, or inside an expression.
3113 @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
3114 Represents a table of jump addresses. The vector elements @var{lr0},
3115 etc., are @code{label_ref} expressions. The mode @var{m} specifies
3116 how much space is given to each address; normally @var{m} would be
3119 @findex addr_diff_vec
3120 @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
3121 Represents a table of jump addresses expressed as offsets from
3122 @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
3123 expressions and so is @var{base}. The mode @var{m} specifies how much
3124 space is given to each address-difference. @var{min} and @var{max}
3125 are set up by branch shortening and hold a label with a minimum and a
3126 maximum address, respectively. @var{flags} indicates the relative
3127 position of @var{base}, @var{min} and @var{max} to the containing insn
3128 and of @var{min} and @var{max} to @var{base}. See rtl.def for details.
3131 @item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
3132 Represents prefetch of memory at address @var{addr}.
3133 Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
3134 targets that do not support write prefetches should treat this as a normal
3136 Operand @var{locality} specifies the amount of temporal locality; 0 if there
3137 is none or 1, 2, or 3 for increasing levels of temporal locality;
3138 targets that do not support locality hints should ignore this.
3140 This insn is used to minimize cache-miss latency by moving data into a
3141 cache before it is accessed. It should use only non-faulting data prefetch
3146 @section Embedded Side-Effects on Addresses
3147 @cindex RTL preincrement
3148 @cindex RTL postincrement
3149 @cindex RTL predecrement
3150 @cindex RTL postdecrement
3152 Six special side-effect expression codes appear as memory addresses.
3156 @item (pre_dec:@var{m} @var{x})
3157 Represents the side effect of decrementing @var{x} by a standard
3158 amount and represents also the value that @var{x} has after being
3159 decremented. @var{x} must be a @code{reg} or @code{mem}, but most
3160 machines allow only a @code{reg}. @var{m} must be the machine mode
3161 for pointers on the machine in use. The amount @var{x} is decremented
3162 by is the length in bytes of the machine mode of the containing memory
3163 reference of which this expression serves as the address. Here is an
3167 (mem:DF (pre_dec:SI (reg:SI 39)))
3171 This says to decrement pseudo register 39 by the length of a @code{DFmode}
3172 value and use the result to address a @code{DFmode} value.
3175 @item (pre_inc:@var{m} @var{x})
3176 Similar, but specifies incrementing @var{x} instead of decrementing it.
3179 @item (post_dec:@var{m} @var{x})
3180 Represents the same side effect as @code{pre_dec} but a different
3181 value. The value represented here is the value @var{x} has @i{before}
3185 @item (post_inc:@var{m} @var{x})
3186 Similar, but specifies incrementing @var{x} instead of decrementing it.
3189 @item (post_modify:@var{m} @var{x} @var{y})
3191 Represents the side effect of setting @var{x} to @var{y} and
3192 represents @var{x} before @var{x} is modified. @var{x} must be a
3193 @code{reg} or @code{mem}, but most machines allow only a @code{reg}.
3194 @var{m} must be the machine mode for pointers on the machine in use.
3196 The expression @var{y} must be one of three forms:
3197 @code{(plus:@var{m} @var{x} @var{z})},
3198 @code{(minus:@var{m} @var{x} @var{z})}, or
3199 @code{(plus:@var{m} @var{x} @var{i})},
3200 where @var{z} is an index register and @var{i} is a constant.
3202 Here is an example of its use:
3205 (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
3209 This says to modify pseudo register 42 by adding the contents of pseudo
3210 register 48 to it, after the use of what ever 42 points to.
3213 @item (pre_modify:@var{m} @var{x} @var{expr})
3214 Similar except side effects happen before the use.
3217 These embedded side effect expressions must be used with care. Instruction
3218 patterns may not use them. Until the @samp{flow} pass of the compiler,
3219 they may occur only to represent pushes onto the stack. The @samp{flow}
3220 pass finds cases where registers are incremented or decremented in one
3221 instruction and used as an address shortly before or after; these cases are
3222 then transformed to use pre- or post-increment or -decrement.
3224 If a register used as the operand of these expressions is used in
3225 another address in an insn, the original value of the register is used.
3226 Uses of the register outside of an address are not permitted within the
3227 same insn as a use in an embedded side effect expression because such
3228 insns behave differently on different machines and hence must be treated
3229 as ambiguous and disallowed.
3231 An instruction that can be represented with an embedded side effect
3232 could also be represented using @code{parallel} containing an additional
3233 @code{set} to describe how the address register is altered. This is not
3234 done because machines that allow these operations at all typically
3235 allow them wherever a memory address is called for. Describing them as
3236 additional parallel stores would require doubling the number of entries
3237 in the machine description.
3240 @section Assembler Instructions as Expressions
3241 @cindex assembler instructions in RTL
3243 @cindex @code{asm_operands}, usage
3244 The RTX code @code{asm_operands} represents a value produced by a
3245 user-specified assembler instruction. It is used to represent
3246 an @code{asm} statement with arguments. An @code{asm} statement with
3247 a single output operand, like this:
3250 asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
3254 is represented using a single @code{asm_operands} RTX which represents
3255 the value that is stored in @code{outputvar}:
3258 (set @var{rtx-for-outputvar}
3259 (asm_operands "foo %1,%2,%0" "a" 0
3260 [@var{rtx-for-addition-result} @var{rtx-for-*z}]
3261 [(asm_input:@var{m1} "g")
3262 (asm_input:@var{m2} "di")]))
3266 Here the operands of the @code{asm_operands} RTX are the assembler
3267 template string, the output-operand's constraint, the index-number of the
3268 output operand among the output operands specified, a vector of input
3269 operand RTX's, and a vector of input-operand modes and constraints. The
3270 mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
3273 When an @code{asm} statement has multiple output values, its insn has
3274 several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
3275 contains an @code{asm_operands}; all of these share the same assembler
3276 template and vectors, but each contains the constraint for the respective
3277 output operand. They are also distinguished by the output-operand index
3278 number, which is 0, 1, @dots{} for successive output operands.
3284 The RTL representation of the code for a function is a doubly-linked
3285 chain of objects called @dfn{insns}. Insns are expressions with
3286 special codes that are used for no other purpose. Some insns are
3287 actual instructions; others represent dispatch tables for @code{switch}
3288 statements; others represent labels to jump to or various sorts of
3289 declarative information.
3291 In addition to its own specific data, each insn must have a unique
3292 id-number that distinguishes it from all other insns in the current
3293 function (after delayed branch scheduling, copies of an insn with the
3294 same id-number may be present in multiple places in a function, but
3295 these copies will always be identical and will only appear inside a
3296 @code{sequence}), and chain pointers to the preceding and following
3297 insns. These three fields occupy the same position in every insn,
3298 independent of the expression code of the insn. They could be accessed
3299 with @code{XEXP} and @code{XINT}, but instead three special macros are
3304 @item INSN_UID (@var{i})
3305 Accesses the unique id of insn @var{i}.
3308 @item PREV_INSN (@var{i})
3309 Accesses the chain pointer to the insn preceding @var{i}.
3310 If @var{i} is the first insn, this is a null pointer.
3313 @item NEXT_INSN (@var{i})
3314 Accesses the chain pointer to the insn following @var{i}.
3315 If @var{i} is the last insn, this is a null pointer.
3319 @findex get_last_insn
3320 The first insn in the chain is obtained by calling @code{get_insns}; the
3321 last insn is the result of calling @code{get_last_insn}. Within the
3322 chain delimited by these insns, the @code{NEXT_INSN} and
3323 @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
3327 NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
3331 is always true and if @var{insn} is not the last insn,
3334 PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
3340 After delay slot scheduling, some of the insns in the chain might be
3341 @code{sequence} expressions, which contain a vector of insns. The value
3342 of @code{NEXT_INSN} in all but the last of these insns is the next insn
3343 in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
3344 is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
3345 which it is contained. Similar rules apply for @code{PREV_INSN}.
3347 This means that the above invariants are not necessarily true for insns
3348 inside @code{sequence} expressions. Specifically, if @var{insn} is the
3349 first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
3350 is the insn containing the @code{sequence} expression, as is the value
3351 of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
3352 insn in the @code{sequence} expression. You can use these expressions
3353 to find the containing @code{sequence} expression.
3355 Every insn has one of the following six expression codes:
3360 The expression code @code{insn} is used for instructions that do not jump
3361 and do not do function calls. @code{sequence} expressions are always
3362 contained in insns with code @code{insn} even if one of those insns
3363 should jump or do function calls.
3365 Insns with code @code{insn} have four additional fields beyond the three
3366 mandatory ones listed above. These four are described in a table below.
3370 The expression code @code{jump_insn} is used for instructions that may
3371 jump (or, more generally, may contain @code{label_ref} expressions to
3372 which @code{pc} can be set in that instruction). If there is an
3373 instruction to return from the current function, it is recorded as a
3377 @code{jump_insn} insns have the same extra fields as @code{insn} insns,
3378 accessed in the same way and in addition contain a field
3379 @code{JUMP_LABEL} which is defined once jump optimization has completed.
3381 For simple conditional and unconditional jumps, this field contains
3382 the @code{code_label} to which this insn will (possibly conditionally)
3383 branch. In a more complex jump, @code{JUMP_LABEL} records one of the
3384 labels that the insn refers to; other jump target labels are recorded
3385 as @code{REG_LABEL_TARGET} notes. The exception is @code{addr_vec}
3386 and @code{addr_diff_vec}, where @code{JUMP_LABEL} is @code{NULL_RTX}
3387 and the only way to find the labels is to scan the entire body of the
3390 Return insns count as jumps, but since they do not refer to any
3391 labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
3395 The expression code @code{call_insn} is used for instructions that may do
3396 function calls. It is important to distinguish these instructions because
3397 they imply that certain registers and memory locations may be altered
3400 @findex CALL_INSN_FUNCTION_USAGE
3401 @code{call_insn} insns have the same extra fields as @code{insn} insns,
3402 accessed in the same way and in addition contain a field
3403 @code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
3404 @code{expr_list} expressions) containing @code{use} and @code{clobber}
3405 expressions that denote hard registers and @code{MEM}s used or
3406 clobbered by the called function.
3408 A @code{MEM} generally points to a stack slots in which arguments passed
3409 to the libcall by reference (@pxref{Register Arguments,
3410 TARGET_PASS_BY_REFERENCE}) are stored. If the argument is
3411 caller-copied (@pxref{Register Arguments, TARGET_CALLEE_COPIES}),
3412 the stack slot will be mentioned in @code{CLOBBER} and @code{USE}
3413 entries; if it's callee-copied, only a @code{USE} will appear, and the
3414 @code{MEM} may point to addresses that are not stack slots.
3416 @code{CLOBBER}ed registers in this list augment registers specified in
3417 @code{CALL_USED_REGISTERS} (@pxref{Register Basics}).
3420 @findex CODE_LABEL_NUMBER
3422 A @code{code_label} insn represents a label that a jump insn can jump
3423 to. It contains two special fields of data in addition to the three
3424 standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
3425 number}, a number that identifies this label uniquely among all the
3426 labels in the compilation (not just in the current function).
3427 Ultimately, the label is represented in the assembler output as an
3428 assembler label, usually of the form @samp{L@var{n}} where @var{n} is
3431 When a @code{code_label} appears in an RTL expression, it normally
3432 appears within a @code{label_ref} which represents the address of
3433 the label, as a number.
3435 Besides as a @code{code_label}, a label can also be represented as a
3436 @code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
3439 The field @code{LABEL_NUSES} is only defined once the jump optimization
3440 phase is completed. It contains the number of times this label is
3441 referenced in the current function.
3444 @findex SET_LABEL_KIND
3445 @findex LABEL_ALT_ENTRY_P
3446 @cindex alternate entry points
3447 The field @code{LABEL_KIND} differentiates four different types of
3448 labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY},
3449 @code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}. The only labels
3450 that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry
3451 points} to the current function. These may be static (visible only in
3452 the containing translation unit), global (exposed to all translation
3453 units), or weak (global, but can be overridden by another symbol with the
3456 Much of the compiler treats all four kinds of label identically. Some
3457 of it needs to know whether or not a label is an alternate entry point;
3458 for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided. It is
3459 equivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}.
3460 The only place that cares about the distinction between static, global,
3461 and weak alternate entry points, besides the front-end code that creates
3462 them, is the function @code{output_alternate_entry_point}, in
3465 To set the kind of a label, use the @code{SET_LABEL_KIND} macro.
3469 Barriers are placed in the instruction stream when control cannot flow
3470 past them. They are placed after unconditional jump instructions to
3471 indicate that the jumps are unconditional and after calls to
3472 @code{volatile} functions, which do not return (e.g., @code{exit}).
3473 They contain no information beyond the three standard fields.
3476 @findex NOTE_LINE_NUMBER
3477 @findex NOTE_SOURCE_FILE
3479 @code{note} insns are used to represent additional debugging and
3480 declarative information. They contain two nonstandard fields, an
3481 integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
3482 string accessed with @code{NOTE_SOURCE_FILE}.
3484 If @code{NOTE_LINE_NUMBER} is positive, the note represents the
3485 position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
3486 that the line came from. These notes control generation of line
3487 number data in the assembler output.
3489 Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
3490 code with one of the following values (and @code{NOTE_SOURCE_FILE}
3491 must contain a null pointer):
3494 @findex NOTE_INSN_DELETED
3495 @item NOTE_INSN_DELETED
3496 Such a note is completely ignorable. Some passes of the compiler
3497 delete insns by altering them into notes of this kind.
3499 @findex NOTE_INSN_DELETED_LABEL
3500 @item NOTE_INSN_DELETED_LABEL
3501 This marks what used to be a @code{code_label}, but was not used for other
3502 purposes than taking its address and was transformed to mark that no
3505 @findex NOTE_INSN_BLOCK_BEG
3506 @findex NOTE_INSN_BLOCK_END
3507 @item NOTE_INSN_BLOCK_BEG
3508 @itemx NOTE_INSN_BLOCK_END
3509 These types of notes indicate the position of the beginning and end
3510 of a level of scoping of variable names. They control the output
3511 of debugging information.
3513 @findex NOTE_INSN_EH_REGION_BEG
3514 @findex NOTE_INSN_EH_REGION_END
3515 @item NOTE_INSN_EH_REGION_BEG
3516 @itemx NOTE_INSN_EH_REGION_END
3517 These types of notes indicate the position of the beginning and end of a
3518 level of scoping for exception handling. @code{NOTE_BLOCK_NUMBER}
3519 identifies which @code{CODE_LABEL} or @code{note} of type
3520 @code{NOTE_INSN_DELETED_LABEL} is associated with the given region.
3522 @findex NOTE_INSN_LOOP_BEG
3523 @findex NOTE_INSN_LOOP_END
3524 @item NOTE_INSN_LOOP_BEG
3525 @itemx NOTE_INSN_LOOP_END
3526 These types of notes indicate the position of the beginning and end
3527 of a @code{while} or @code{for} loop. They enable the loop optimizer
3528 to find loops quickly.
3530 @findex NOTE_INSN_LOOP_CONT
3531 @item NOTE_INSN_LOOP_CONT
3532 Appears at the place in a loop that @code{continue} statements jump to.
3534 @findex NOTE_INSN_LOOP_VTOP
3535 @item NOTE_INSN_LOOP_VTOP
3536 This note indicates the place in a loop where the exit test begins for
3537 those loops in which the exit test has been duplicated. This position
3538 becomes another virtual start of the loop when considering loop
3541 @findex NOTE_INSN_FUNCTION_BEG
3542 @item NOTE_INSN_FUNCTION_BEG
3543 Appears at the start of the function body, after the function
3548 These codes are printed symbolically when they appear in debugging dumps.
3551 @cindex @code{TImode}, in @code{insn}
3552 @cindex @code{HImode}, in @code{insn}
3553 @cindex @code{QImode}, in @code{insn}
3554 The machine mode of an insn is normally @code{VOIDmode}, but some
3555 phases use the mode for various purposes.
3557 The common subexpression elimination pass sets the mode of an insn to
3558 @code{QImode} when it is the first insn in a block that has already
3561 The second Haifa scheduling pass, for targets that can multiple issue,
3562 sets the mode of an insn to @code{TImode} when it is believed that the
3563 instruction begins an issue group. That is, when the instruction
3564 cannot issue simultaneously with the previous. This may be relied on
3565 by later passes, in particular machine-dependent reorg.
3567 Here is a table of the extra fields of @code{insn}, @code{jump_insn}
3568 and @code{call_insn} insns:
3572 @item PATTERN (@var{i})
3573 An expression for the side effect performed by this insn. This must be
3574 one of the following codes: @code{set}, @code{call}, @code{use},
3575 @code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
3576 @code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
3577 @code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a @code{parallel},
3578 each element of the @code{parallel} must be one these codes, except that
3579 @code{parallel} expressions cannot be nested and @code{addr_vec} and
3580 @code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
3583 @item INSN_CODE (@var{i})
3584 An integer that says which pattern in the machine description matches
3585 this insn, or @minus{}1 if the matching has not yet been attempted.
3587 Such matching is never attempted and this field remains @minus{}1 on an insn
3588 whose pattern consists of a single @code{use}, @code{clobber},
3589 @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
3591 @findex asm_noperands
3592 Matching is also never attempted on insns that result from an @code{asm}
3593 statement. These contain at least one @code{asm_operands} expression.
3594 The function @code{asm_noperands} returns a non-negative value for
3597 In the debugging output, this field is printed as a number followed by
3598 a symbolic representation that locates the pattern in the @file{md}
3599 file as some small positive or negative offset from a named pattern.
3602 @item LOG_LINKS (@var{i})
3603 A list (chain of @code{insn_list} expressions) giving information about
3604 dependencies between instructions within a basic block. Neither a jump
3605 nor a label may come between the related insns. These are only used by
3606 the schedulers and by combine. This is a deprecated data structure.
3607 Def-use and use-def chains are now preferred.
3610 @item REG_NOTES (@var{i})
3611 A list (chain of @code{expr_list} and @code{insn_list} expressions)
3612 giving miscellaneous information about the insn. It is often
3613 information pertaining to the registers used in this insn.
3616 The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
3617 expressions. Each of these has two operands: the first is an insn,
3618 and the second is another @code{insn_list} expression (the next one in
3619 the chain). The last @code{insn_list} in the chain has a null pointer
3620 as second operand. The significant thing about the chain is which
3621 insns appear in it (as first operands of @code{insn_list}
3622 expressions). Their order is not significant.
3624 This list is originally set up by the flow analysis pass; it is a null
3625 pointer until then. Flow only adds links for those data dependencies
3626 which can be used for instruction combination. For each insn, the flow
3627 analysis pass adds a link to insns which store into registers values
3628 that are used for the first time in this insn.
3630 The @code{REG_NOTES} field of an insn is a chain similar to the
3631 @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
3632 addition to @code{insn_list} expressions. There are several kinds of
3633 register notes, which are distinguished by the machine mode, which in a
3634 register note is really understood as being an @code{enum reg_note}.
3635 The first operand @var{op} of the note is data whose meaning depends on
3638 @findex REG_NOTE_KIND
3639 @findex PUT_REG_NOTE_KIND
3640 The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
3641 register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
3642 (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
3645 Register notes are of three classes: They may say something about an
3646 input to an insn, they may say something about an output of an insn, or
3647 they may create a linkage between two insns. There are also a set
3648 of values that are only used in @code{LOG_LINKS}.
3650 These register notes annotate inputs to an insn:
3655 The value in @var{op} dies in this insn; that is to say, altering the
3656 value immediately after this insn would not affect the future behavior
3659 It does not follow that the register @var{op} has no useful value after
3660 this insn since @var{op} is not necessarily modified by this insn.
3661 Rather, no subsequent instruction uses the contents of @var{op}.
3665 The register @var{op} being set by this insn will not be used in a
3666 subsequent insn. This differs from a @code{REG_DEAD} note, which
3667 indicates that the value in an input will not be used subsequently.
3668 These two notes are independent; both may be present for the same
3673 The register @var{op} is incremented (or decremented; at this level
3674 there is no distinction) by an embedded side effect inside this insn.
3675 This means it appears in a @code{post_inc}, @code{pre_inc},
3676 @code{post_dec} or @code{pre_dec} expression.
3680 The register @var{op} is known to have a nonnegative value when this
3681 insn is reached. This is used so that decrement and branch until zero
3682 instructions, such as the m68k dbra, can be matched.
3684 The @code{REG_NONNEG} note is added to insns only if the machine
3685 description has a @samp{decrement_and_branch_until_zero} pattern.
3687 @findex REG_LABEL_OPERAND
3688 @item REG_LABEL_OPERAND
3689 This insn uses @var{op}, a @code{code_label} or a @code{note} of type
3690 @code{NOTE_INSN_DELETED_LABEL}, but is not a @code{jump_insn}, or it
3691 is a @code{jump_insn} that refers to the operand as an ordinary
3692 operand. The label may still eventually be a jump target, but if so
3693 in an indirect jump in a subsequent insn. The presence of this note
3694 allows jump optimization to be aware that @var{op} is, in fact, being
3695 used, and flow optimization to build an accurate flow graph.
3697 @findex REG_LABEL_TARGET
3698 @item REG_LABEL_TARGET
3699 This insn is a @code{jump_insn} but not an @code{addr_vec} or
3700 @code{addr_diff_vec}. It uses @var{op}, a @code{code_label} as a
3701 direct or indirect jump target. Its purpose is similar to that of
3702 @code{REG_LABEL_OPERAND}. This note is only present if the insn has
3703 multiple targets; the last label in the insn (in the highest numbered
3704 insn-field) goes into the @code{JUMP_LABEL} field and does not have a
3705 @code{REG_LABEL_TARGET} note. @xref{Insns, JUMP_LABEL}.
3707 @findex REG_CROSSING_JUMP
3708 @item REG_CROSSING_JUMP
3709 This insn is a branching instruction (either an unconditional jump or
3710 an indirect jump) which crosses between hot and cold sections, which
3711 could potentially be very far apart in the executable. The presence
3712 of this note indicates to other optimizations that this branching
3713 instruction should not be ``collapsed'' into a simpler branching
3714 construct. It is used when the optimization to partition basic blocks
3715 into hot and cold sections is turned on.
3719 Appears attached to each @code{CALL_INSN} to @code{setjmp} or a
3723 The following notes describe attributes of outputs of an insn:
3730 This note is only valid on an insn that sets only one register and
3731 indicates that that register will be equal to @var{op} at run time; the
3732 scope of this equivalence differs between the two types of notes. The
3733 value which the insn explicitly copies into the register may look
3734 different from @var{op}, but they will be equal at run time. If the
3735 output of the single @code{set} is a @code{strict_low_part} expression,
3736 the note refers to the register that is contained in @code{SUBREG_REG}
3737 of the @code{subreg} expression.
3739 For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
3740 the entire function, and could validly be replaced in all its
3741 occurrences by @var{op}. (``Validly'' here refers to the data flow of
3742 the program; simple replacement may make some insns invalid.) For
3743 example, when a constant is loaded into a register that is never
3744 assigned any other value, this kind of note is used.
3746 When a parameter is copied into a pseudo-register at entry to a function,
3747 a note of this kind records that the register is equivalent to the stack
3748 slot where the parameter was passed. Although in this case the register
3749 may be set by other insns, it is still valid to replace the register
3750 by the stack slot throughout the function.
3752 A @code{REG_EQUIV} note is also used on an instruction which copies a
3753 register parameter into a pseudo-register at entry to a function, if
3754 there is a stack slot where that parameter could be stored. Although
3755 other insns may set the pseudo-register, it is valid for the compiler to
3756 replace the pseudo-register by stack slot throughout the function,
3757 provided the compiler ensures that the stack slot is properly
3758 initialized by making the replacement in the initial copy instruction as
3759 well. This is used on machines for which the calling convention
3760 allocates stack space for register parameters. See
3761 @code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
3763 In the case of @code{REG_EQUAL}, the register that is set by this insn
3764 will be equal to @var{op} at run time at the end of this insn but not
3765 necessarily elsewhere in the function. In this case, @var{op}
3766 is typically an arithmetic expression. For example, when a sequence of
3767 insns such as a library call is used to perform an arithmetic operation,
3768 this kind of note is attached to the insn that produces or copies the
3771 These two notes are used in different ways by the compiler passes.
3772 @code{REG_EQUAL} is used by passes prior to register allocation (such as
3773 common subexpression elimination and loop optimization) to tell them how
3774 to think of that value. @code{REG_EQUIV} notes are used by register
3775 allocation to indicate that there is an available substitute expression
3776 (either a constant or a @code{mem} expression for the location of a
3777 parameter on the stack) that may be used in place of a register if
3778 insufficient registers are available.
3780 Except for stack homes for parameters, which are indicated by a
3781 @code{REG_EQUIV} note and are not useful to the early optimization
3782 passes and pseudo registers that are equivalent to a memory location
3783 throughout their entire life, which is not detected until later in
3784 the compilation, all equivalences are initially indicated by an attached
3785 @code{REG_EQUAL} note. In the early stages of register allocation, a
3786 @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
3787 @var{op} is a constant and the insn represents the only set of its
3788 destination register.
3790 Thus, compiler passes prior to register allocation need only check for
3791 @code{REG_EQUAL} notes and passes subsequent to register allocation
3792 need only check for @code{REG_EQUIV} notes.
3795 These notes describe linkages between insns. They occur in pairs: one
3796 insn has one of a pair of notes that points to a second insn, which has
3797 the inverse note pointing back to the first insn.
3800 @findex REG_CC_SETTER
3804 On machines that use @code{cc0}, the insns which set and use @code{cc0}
3805 set and use @code{cc0} are adjacent. However, when branch delay slot
3806 filling is done, this may no longer be true. In this case a
3807 @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
3808 point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
3809 be placed on the insn using @code{cc0} to point to the insn setting
3813 These values are only used in the @code{LOG_LINKS} field, and indicate
3814 the type of dependency that each link represents. Links which indicate
3815 a data dependence (a read after write dependence) do not use any code,
3816 they simply have mode @code{VOIDmode}, and are printed without any
3820 @findex REG_DEP_TRUE
3822 This indicates a true dependence (a read after write dependence).
3824 @findex REG_DEP_OUTPUT
3825 @item REG_DEP_OUTPUT
3826 This indicates an output dependence (a write after write dependence).
3828 @findex REG_DEP_ANTI
3830 This indicates an anti dependence (a write after read dependence).
3834 These notes describe information gathered from gcov profile data. They
3835 are stored in the @code{REG_NOTES} field of an insn as an
3841 This is used to specify the ratio of branches to non-branches of a
3842 branch insn according to the profile data. The value is stored as a
3843 value between 0 and REG_BR_PROB_BASE; larger values indicate a higher
3844 probability that the branch will be taken.
3848 These notes are found in JUMP insns after delayed branch scheduling
3849 has taken place. They indicate both the direction and the likelihood
3850 of the JUMP@. The format is a bitmask of ATTR_FLAG_* values.
3852 @findex REG_FRAME_RELATED_EXPR
3853 @item REG_FRAME_RELATED_EXPR
3854 This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
3855 is used in place of the actual insn pattern. This is done in cases where
3856 the pattern is either complex or misleading.
3859 For convenience, the machine mode in an @code{insn_list} or
3860 @code{expr_list} is printed using these symbolic codes in debugging dumps.
3864 The only difference between the expression codes @code{insn_list} and
3865 @code{expr_list} is that the first operand of an @code{insn_list} is
3866 assumed to be an insn and is printed in debugging dumps as the insn's
3867 unique id; the first operand of an @code{expr_list} is printed in the
3868 ordinary way as an expression.
3871 @section RTL Representation of Function-Call Insns
3872 @cindex calling functions in RTL
3873 @cindex RTL function-call insns
3874 @cindex function-call insns
3876 Insns that call subroutines have the RTL expression code @code{call_insn}.
3877 These insns must satisfy special rules, and their bodies must use a special
3878 RTL expression code, @code{call}.
3880 @cindex @code{call} usage
3881 A @code{call} expression has two operands, as follows:
3884 (call (mem:@var{fm} @var{addr}) @var{nbytes})
3888 Here @var{nbytes} is an operand that represents the number of bytes of
3889 argument data being passed to the subroutine, @var{fm} is a machine mode
3890 (which must equal as the definition of the @code{FUNCTION_MODE} macro in
3891 the machine description) and @var{addr} represents the address of the
3894 For a subroutine that returns no value, the @code{call} expression as
3895 shown above is the entire body of the insn, except that the insn might
3896 also contain @code{use} or @code{clobber} expressions.
3898 @cindex @code{BLKmode}, and function return values
3899 For a subroutine that returns a value whose mode is not @code{BLKmode},
3900 the value is returned in a hard register. If this register's number is
3901 @var{r}, then the body of the call insn looks like this:
3904 (set (reg:@var{m} @var{r})
3905 (call (mem:@var{fm} @var{addr}) @var{nbytes}))
3909 This RTL expression makes it clear (to the optimizer passes) that the
3910 appropriate register receives a useful value in this insn.
3912 When a subroutine returns a @code{BLKmode} value, it is handled by
3913 passing to the subroutine the address of a place to store the value.
3914 So the call insn itself does not ``return'' any value, and it has the
3915 same RTL form as a call that returns nothing.
3917 On some machines, the call instruction itself clobbers some register,
3918 for example to contain the return address. @code{call_insn} insns
3919 on these machines should have a body which is a @code{parallel}
3920 that contains both the @code{call} expression and @code{clobber}
3921 expressions that indicate which registers are destroyed. Similarly,
3922 if the call instruction requires some register other than the stack
3923 pointer that is not explicitly mentioned in its RTL, a @code{use}
3924 subexpression should mention that register.
3926 Functions that are called are assumed to modify all registers listed in
3927 the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
3928 Basics}) and, with the exception of @code{const} functions and library
3929 calls, to modify all of memory.
3931 Insns containing just @code{use} expressions directly precede the
3932 @code{call_insn} insn to indicate which registers contain inputs to the
3933 function. Similarly, if registers other than those in
3934 @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
3935 containing a single @code{clobber} follow immediately after the call to
3936 indicate which registers.
3939 @section Structure Sharing Assumptions
3940 @cindex sharing of RTL components
3941 @cindex RTL structure sharing assumptions
3943 The compiler assumes that certain kinds of RTL expressions are unique;
3944 there do not exist two distinct objects representing the same value.
3945 In other cases, it makes an opposite assumption: that no RTL expression
3946 object of a certain kind appears in more than one place in the
3947 containing structure.
3949 These assumptions refer to a single function; except for the RTL
3950 objects that describe global variables and external functions,
3951 and a few standard objects such as small integer constants,
3952 no RTL objects are common to two functions.
3955 @cindex @code{reg}, RTL sharing
3957 Each pseudo-register has only a single @code{reg} object to represent it,
3958 and therefore only a single machine mode.
3960 @cindex symbolic label
3961 @cindex @code{symbol_ref}, RTL sharing
3963 For any symbolic label, there is only one @code{symbol_ref} object
3966 @cindex @code{const_int}, RTL sharing
3968 All @code{const_int} expressions with equal values are shared.
3970 @cindex @code{pc}, RTL sharing
3972 There is only one @code{pc} expression.
3974 @cindex @code{cc0}, RTL sharing
3976 There is only one @code{cc0} expression.
3978 @cindex @code{const_double}, RTL sharing
3980 There is only one @code{const_double} expression with value 0 for
3981 each floating point mode. Likewise for values 1 and 2.
3983 @cindex @code{const_vector}, RTL sharing
3985 There is only one @code{const_vector} expression with value 0 for
3986 each vector mode, be it an integer or a double constant vector.
3988 @cindex @code{label_ref}, RTL sharing
3989 @cindex @code{scratch}, RTL sharing
3991 No @code{label_ref} or @code{scratch} appears in more than one place in
3992 the RTL structure; in other words, it is safe to do a tree-walk of all
3993 the insns in the function and assume that each time a @code{label_ref}
3994 or @code{scratch} is seen it is distinct from all others that are seen.
3996 @cindex @code{mem}, RTL sharing
3998 Only one @code{mem} object is normally created for each static
3999 variable or stack slot, so these objects are frequently shared in all
4000 the places they appear. However, separate but equal objects for these
4001 variables are occasionally made.
4003 @cindex @code{asm_operands}, RTL sharing
4005 When a single @code{asm} statement has multiple output operands, a
4006 distinct @code{asm_operands} expression is made for each output operand.
4007 However, these all share the vector which contains the sequence of input
4008 operands. This sharing is used later on to test whether two
4009 @code{asm_operands} expressions come from the same statement, so all
4010 optimizations must carefully preserve the sharing if they copy the
4014 No RTL object appears in more than one place in the RTL structure
4015 except as described above. Many passes of the compiler rely on this
4016 by assuming that they can modify RTL objects in place without unwanted
4017 side-effects on other insns.
4019 @findex unshare_all_rtl
4021 During initial RTL generation, shared structure is freely introduced.
4022 After all the RTL for a function has been generated, all shared
4023 structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
4024 after which the above rules are guaranteed to be followed.
4026 @findex copy_rtx_if_shared
4028 During the combiner pass, shared structure within an insn can exist
4029 temporarily. However, the shared structure is copied before the
4030 combiner is finished with the insn. This is done by calling
4031 @code{copy_rtx_if_shared}, which is a subroutine of
4032 @code{unshare_all_rtl}.
4036 @section Reading RTL
4038 To read an RTL object from a file, call @code{read_rtx}. It takes one
4039 argument, a stdio stream, and returns a single RTL object. This routine
4040 is defined in @file{read-rtl.c}. It is not available in the compiler
4041 itself, only the various programs that generate the compiler back end
4042 from the machine description.
4044 People frequently have the idea of using RTL stored as text in a file as
4045 an interface between a language front end and the bulk of GCC@. This
4046 idea is not feasible.
4048 GCC was designed to use RTL internally only. Correct RTL for a given
4049 program is very dependent on the particular target machine. And the RTL
4050 does not contain all the information about the program.
4052 The proper way to interface GCC to a new language front end is with
4053 the ``tree'' data structure, described in the files @file{tree.h} and
4054 @file{tree.def}. The documentation for this structure (@pxref{Trees})