1 @c Copyright (C) 1988, 1989, 1992, 1994, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
2 @c Free Software Foundation, Inc.
3 @c This is part of the GCC manual.
4 @c For copying conditions, see the file gcc.texi.
7 @chapter RTL Representation
8 @cindex RTL representation
9 @cindex representation of RTL
10 @cindex Register Transfer Language (RTL)
12 Most of the work of the compiler is done on an intermediate representation
13 called register transfer language. In this language, the instructions to be
14 output are described, pretty much one by one, in an algebraic form that
15 describes what the instruction does.
17 RTL is inspired by Lisp lists. It has both an internal form, made up of
18 structures that point at other structures, and a textual form that is used
19 in the machine description and in printed debugging dumps. The textual
20 form uses nested parentheses to indicate the pointers in the internal form.
23 * RTL Objects:: Expressions vs vectors vs strings vs integers.
24 * RTL Classes:: Categories of RTL expression objects, and their structure.
25 * Accessors:: Macros to access expression operands or vector elts.
26 * Special Accessors:: Macros to access specific annotations on RTL.
27 * Flags:: Other flags in an RTL expression.
28 * Machine Modes:: Describing the size and format of a datum.
29 * Constants:: Expressions with constant values.
30 * Regs and Memory:: Expressions representing register contents or memory.
31 * Arithmetic:: Expressions representing arithmetic on other expressions.
32 * Comparisons:: Expressions representing comparison of expressions.
33 * Bit-Fields:: Expressions representing bit-fields in memory or reg.
34 * Vector Operations:: Expressions involving vector datatypes.
35 * Conversions:: Extending, truncating, floating or fixing.
36 * RTL Declarations:: Declaring volatility, constancy, etc.
37 * Side Effects:: Expressions for storing in registers, etc.
38 * Incdec:: Embedded side-effects for autoincrement addressing.
39 * Assembler:: Representing @code{asm} with operands.
40 * Insns:: Expression types for entire insns.
41 * Calls:: RTL representation of function call insns.
42 * Sharing:: Some expressions are unique; others *must* be copied.
43 * Reading RTL:: Reading textual RTL from a file.
47 @section RTL Object Types
48 @cindex RTL object types
53 @cindex RTL expression
55 RTL uses five kinds of objects: expressions, integers, wide integers,
56 strings and vectors. Expressions are the most important ones. An RTL
57 expression (``RTX'', for short) is a C structure, but it is usually
58 referred to with a pointer; a type that is given the typedef name
61 An integer is simply an @code{int}; their written form uses decimal
62 digits. A wide integer is an integral object whose type is
63 @code{HOST_WIDE_INT}; their written form uses decimal digits.
65 A string is a sequence of characters. In core it is represented as a
66 @code{char *} in usual C fashion, and it is written in C syntax as well.
67 However, strings in RTL may never be null. If you write an empty string in
68 a machine description, it is represented in core as a null pointer rather
69 than as a pointer to a null character. In certain contexts, these null
70 pointers instead of strings are valid. Within RTL code, strings are most
71 commonly found inside @code{symbol_ref} expressions, but they appear in
72 other contexts in the RTL expressions that make up machine descriptions.
74 In a machine description, strings are normally written with double
75 quotes, as you would in C. However, strings in machine descriptions may
76 extend over many lines, which is invalid C, and adjacent string
77 constants are not concatenated as they are in C. Any string constant
78 may be surrounded with a single set of parentheses. Sometimes this
79 makes the machine description easier to read.
81 There is also a special syntax for strings, which can be useful when C
82 code is embedded in a machine description. Wherever a string can
83 appear, it is also valid to write a C-style brace block. The entire
84 brace block, including the outermost pair of braces, is considered to be
85 the string constant. Double quote characters inside the braces are not
86 special. Therefore, if you write string constants in the C code, you
87 need not escape each quote character with a backslash.
89 A vector contains an arbitrary number of pointers to expressions. The
90 number of elements in the vector is explicitly present in the vector.
91 The written form of a vector consists of square brackets
92 (@samp{[@dots{}]}) surrounding the elements, in sequence and with
93 whitespace separating them. Vectors of length zero are not created;
94 null pointers are used instead.
96 @cindex expression codes
97 @cindex codes, RTL expression
100 Expressions are classified by @dfn{expression codes} (also called RTX
101 codes). The expression code is a name defined in @file{rtl.def}, which is
102 also (in uppercase) a C enumeration constant. The possible expression
103 codes and their meanings are machine-independent. The code of an RTX can
104 be extracted with the macro @code{GET_CODE (@var{x})} and altered with
105 @code{PUT_CODE (@var{x}, @var{newcode})}.
107 The expression code determines how many operands the expression contains,
108 and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
109 by looking at an operand what kind of object it is. Instead, you must know
110 from its context---from the expression code of the containing expression.
111 For example, in an expression of code @code{subreg}, the first operand is
112 to be regarded as an expression and the second operand as an integer. In
113 an expression of code @code{plus}, there are two operands, both of which
114 are to be regarded as expressions. In a @code{symbol_ref} expression,
115 there is one operand, which is to be regarded as a string.
117 Expressions are written as parentheses containing the name of the
118 expression type, its flags and machine mode if any, and then the operands
119 of the expression (separated by spaces).
121 Expression code names in the @samp{md} file are written in lowercase,
122 but when they appear in C code they are written in uppercase. In this
123 manual, they are shown as follows: @code{const_int}.
127 In a few contexts a null pointer is valid where an expression is normally
128 wanted. The written form of this is @code{(nil)}.
131 @section RTL Classes and Formats
133 @cindex classes of RTX codes
134 @cindex RTX codes, classes of
135 @findex GET_RTX_CLASS
137 The various expression codes are divided into several @dfn{classes},
138 which are represented by single characters. You can determine the class
139 of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
140 Currently, @file{rtx.def} defines these classes:
144 An RTX code that represents an actual object, such as a register
145 (@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
146 @code{LO_SUM}) is also included; instead, @code{SUBREG} and
147 @code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
150 An RTX code that represents a constant object. @code{HIGH} is also
151 included in this class.
154 An RTX code for a non-symmetric comparison, such as @code{GEU} or
157 @item RTX_COMM_COMPARE
158 An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
162 An RTX code for a unary arithmetic operation, such as @code{NEG},
163 @code{NOT}, or @code{ABS}. This category also includes value extension
164 (sign or zero) and conversions between integer and floating point.
167 An RTX code for a commutative binary operation, such as @code{PLUS} or
168 @code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class
172 An RTX code for a non-commutative binary operation, such as @code{MINUS},
173 @code{DIV}, or @code{ASHIFTRT}.
175 @item RTX_BITFIELD_OPS
176 An RTX code for a bit-field operation. Currently only
177 @code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs
178 and are lvalues (so they can be used for insertion as well).
182 An RTX code for other three input operations. Currently only
183 @code{IF_THEN_ELSE} and @code{VEC_MERGE}.
186 An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and
187 @code{CALL_INSN}. @xref{Insns}.
190 An RTX code for something that matches in insns, such as
191 @code{MATCH_DUP}. These only occur in machine descriptions.
194 An RTX code for an auto-increment addressing mode, such as
198 All other RTX codes. This category includes the remaining codes used
199 only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
200 all the codes describing side effects (@code{SET}, @code{USE},
201 @code{CLOBBER}, etc.) and the non-insns that may appear on an insn
202 chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
203 @code{SUBREG} is also part of this class.
207 For each expression code, @file{rtl.def} specifies the number of
208 contained objects and their kinds using a sequence of characters
209 called the @dfn{format} of the expression code. For example,
210 the format of @code{subreg} is @samp{ei}.
212 @cindex RTL format characters
213 These are the most commonly used format characters:
217 An expression (actually a pointer to an expression).
229 A vector of expressions.
232 A few other format characters are used occasionally:
236 @samp{u} is equivalent to @samp{e} except that it is printed differently
237 in debugging dumps. It is used for pointers to insns.
240 @samp{n} is equivalent to @samp{i} except that it is printed differently
241 in debugging dumps. It is used for the line number or code number of a
245 @samp{S} indicates a string which is optional. In the RTL objects in
246 core, @samp{S} is equivalent to @samp{s}, but when the object is read,
247 from an @samp{md} file, the string value of this operand may be omitted.
248 An omitted string is taken to be the null string.
251 @samp{V} indicates a vector which is optional. In the RTL objects in
252 core, @samp{V} is equivalent to @samp{E}, but when the object is read
253 from an @samp{md} file, the vector value of this operand may be omitted.
254 An omitted vector is effectively the same as a vector of no elements.
257 @samp{B} indicates a pointer to basic block structure.
260 @samp{0} means a slot whose contents do not fit any normal category.
261 @samp{0} slots are not printed at all in dumps, and are often used in
262 special ways by small parts of the compiler.
265 There are macros to get the number of operands and the format
266 of an expression code:
269 @findex GET_RTX_LENGTH
270 @item GET_RTX_LENGTH (@var{code})
271 Number of operands of an RTX of code @var{code}.
273 @findex GET_RTX_FORMAT
274 @item GET_RTX_FORMAT (@var{code})
275 The format of an RTX of code @var{code}, as a C string.
278 Some classes of RTX codes always have the same format. For example, it
279 is safe to assume that all comparison operations have format @code{ee}.
283 All codes of this class have format @code{e}.
288 All codes of these classes have format @code{ee}.
292 All codes of these classes have format @code{eee}.
295 All codes of this class have formats that begin with @code{iuueiee}.
296 @xref{Insns}. Note that not all RTL objects linked onto an insn chain
297 are of class @code{i}.
302 You can make no assumptions about the format of these codes.
306 @section Access to Operands
308 @cindex access to operands
309 @cindex operand access
315 Operands of expressions are accessed using the macros @code{XEXP},
316 @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
317 two arguments: an expression-pointer (RTX) and an operand number
318 (counting from zero). Thus,
325 accesses operand 2 of expression @var{x}, as an expression.
332 accesses the same operand as an integer. @code{XSTR}, used in the same
333 fashion, would access it as a string.
335 Any operand can be accessed as an integer, as an expression or as a string.
336 You must choose the correct method of access for the kind of value actually
337 stored in the operand. You would do this based on the expression code of
338 the containing expression. That is also how you would know how many
341 For example, if @var{x} is a @code{subreg} expression, you know that it has
342 two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
343 and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
344 would get the address of the expression operand but cast as an integer;
345 that might occasionally be useful, but it would be cleaner to write
346 @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
347 compile without error, and would return the second, integer operand cast as
348 an expression pointer, which would probably result in a crash when
349 accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
350 but this will access memory past the end of the expression with
351 unpredictable results.
353 Access to operands which are vectors is more complicated. You can use the
354 macro @code{XVEC} to get the vector-pointer itself, or the macros
355 @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
360 @item XVEC (@var{exp}, @var{idx})
361 Access the vector-pointer which is operand number @var{idx} in @var{exp}.
364 @item XVECLEN (@var{exp}, @var{idx})
365 Access the length (number of elements) in the vector which is
366 in operand number @var{idx} in @var{exp}. This value is an @code{int}.
369 @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
370 Access element number @var{eltnum} in the vector which is
371 in operand number @var{idx} in @var{exp}. This value is an RTX@.
373 It is up to you to make sure that @var{eltnum} is not negative
374 and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
377 All the macros defined in this section expand into lvalues and therefore
378 can be used to assign the operands, lengths and vector elements as well as
381 @node Special Accessors
382 @section Access to Special Operands
383 @cindex access to special operands
385 Some RTL nodes have special annotations associated with them.
390 @findex MEM_ALIAS_SET
391 @item MEM_ALIAS_SET (@var{x})
392 If 0, @var{x} is not in any alias set, and may alias anything. Otherwise,
393 @var{x} can only alias @code{MEM}s in a conflicting alias set. This value
394 is set in a language-dependent manner in the front-end, and should not be
395 altered in the back-end. In some front-ends, these numbers may correspond
396 in some way to types, or other language-level entities, but they need not,
397 and the back-end makes no such assumptions.
398 These set numbers are tested with @code{alias_sets_conflict_p}.
401 @item MEM_EXPR (@var{x})
402 If this register is known to hold the value of some user-level
403 declaration, this is that tree node. It may also be a
404 @code{COMPONENT_REF}, in which case this is some field reference,
405 and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration,
406 or another @code{COMPONENT_REF}, or null if there is no compile-time
407 object associated with the reference.
410 @item MEM_OFFSET (@var{x})
411 The offset from the start of @code{MEM_EXPR} as a @code{CONST_INT} rtx.
414 @item MEM_SIZE (@var{x})
415 The size in bytes of the memory reference as a @code{CONST_INT} rtx.
416 This is mostly relevant for @code{BLKmode} references as otherwise
417 the size is implied by the mode.
420 @item MEM_ALIGN (@var{x})
421 The known alignment in bits of the memory reference.
426 @findex ORIGINAL_REGNO
427 @item ORIGINAL_REGNO (@var{x})
428 This field holds the number the register ``originally'' had; for a
429 pseudo register turned into a hard reg this will hold the old pseudo
433 @item REG_EXPR (@var{x})
434 If this register is known to hold the value of some user-level
435 declaration, this is that tree node.
438 @item REG_OFFSET (@var{x})
439 If this register is known to hold the value of some user-level
440 declaration, this is the offset into that logical storage.
445 @findex SYMBOL_REF_DECL
446 @item SYMBOL_REF_DECL (@var{x})
447 If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or
448 a @code{FUNCTION_DECL}, that tree is recorded here. If this value is
449 null, then @var{x} was created by back end code generation routines,
450 and there is no associated front end symbol table entry.
452 @code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'},
453 that is, some sort of constant. In this case, the @code{symbol_ref}
454 is an entry in the per-file constant pool; again, there is no associated
455 front end symbol table entry.
457 @findex SYMBOL_REF_FLAGS
458 @item SYMBOL_REF_FLAGS (@var{x})
459 In a @code{symbol_ref}, this is used to communicate various predicates
460 about the symbol. Some of these are common enough to be computed by
461 common code, some are specific to the target. The common bits are:
464 @findex SYMBOL_REF_FUNCTION_P
465 @findex SYMBOL_FLAG_FUNCTION
466 @item SYMBOL_FLAG_FUNCTION
467 Set if the symbol refers to a function.
469 @findex SYMBOL_REF_LOCAL_P
470 @findex SYMBOL_FLAG_LOCAL
471 @item SYMBOL_FLAG_LOCAL
472 Set if the symbol is local to this ``module''.
473 See @code{TARGET_BINDS_LOCAL_P}.
475 @findex SYMBOL_REF_EXTERNAL_P
476 @findex SYMBOL_FLAG_EXTERNAL
477 @item SYMBOL_FLAG_EXTERNAL
478 Set if this symbol is not defined in this translation unit.
479 Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}.
481 @findex SYMBOL_REF_SMALL_P
482 @findex SYMBOL_FLAG_SMALL
483 @item SYMBOL_FLAG_SMALL
484 Set if the symbol is located in the small data section.
485 See @code{TARGET_IN_SMALL_DATA_P}.
487 @findex SYMBOL_FLAG_TLS_SHIFT
488 @findex SYMBOL_REF_TLS_MODEL
489 @item SYMBOL_REF_TLS_MODEL (@var{x})
490 This is a multi-bit field accessor that returns the @code{tls_model}
491 to be used for a thread-local storage symbol. It returns zero for
492 non-thread-local symbols.
495 Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for
501 @section Flags in an RTL Expression
502 @cindex flags in RTL expression
504 RTL expressions contain several flags (one-bit bit-fields)
505 that are used in certain types of expression. Most often they
506 are accessed with the following macros, which expand into lvalues.
509 @findex CONSTANT_POOL_ADDRESS_P
510 @cindex @code{symbol_ref} and @samp{/u}
511 @cindex @code{unchanging}, in @code{symbol_ref}
512 @item CONSTANT_POOL_ADDRESS_P (@var{x})
513 Nonzero in a @code{symbol_ref} if it refers to part of the current
514 function's constant pool. For most targets these addresses are in a
515 @code{.rodata} section entirely separate from the function, but for
516 some targets the addresses are close to the beginning of the function.
517 In either case GCC assumes these addresses can be addressed directly,
518 perhaps with the help of base registers.
519 Stored in the @code{unchanging} field and printed as @samp{/u}.
521 @findex CONST_OR_PURE_CALL_P
522 @cindex @code{call_insn} and @samp{/u}
523 @cindex @code{unchanging}, in @code{call_insn}
524 @item CONST_OR_PURE_CALL_P (@var{x})
525 In a @code{call_insn}, @code{note}, or an @code{expr_list} for notes,
526 indicates that the insn represents a call to a const or pure function.
527 Stored in the @code{unchanging} field and printed as @samp{/u}.
529 @findex INSN_ANNULLED_BRANCH_P
530 @cindex @code{jump_insn} and @samp{/u}
531 @cindex @code{call_insn} and @samp{/u}
532 @cindex @code{insn} and @samp{/u}
533 @cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn}
534 @item INSN_ANNULLED_BRANCH_P (@var{x})
535 In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates
536 that the branch is an annulling one. See the discussion under
537 @code{sequence} below. Stored in the @code{unchanging} field and
538 printed as @samp{/u}.
540 @findex INSN_DEAD_CODE_P
541 @cindex @code{insn} and @samp{/s}
542 @cindex @code{in_struct}, in @code{insn}
543 @item INSN_DEAD_CODE_P (@var{x})
544 In an @code{insn} during the dead-code elimination pass, nonzero if the
546 Stored in the @code{in_struct} field and printed as @samp{/s}.
548 @findex INSN_DELETED_P
549 @cindex @code{insn} and @samp{/v}
550 @cindex @code{call_insn} and @samp{/v}
551 @cindex @code{jump_insn} and @samp{/v}
552 @cindex @code{code_label} and @samp{/v}
553 @cindex @code{barrier} and @samp{/v}
554 @cindex @code{note} and @samp{/v}
555 @cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{barrier}, and @code{note}
556 @item INSN_DELETED_P (@var{x})
557 In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
558 @code{barrier}, or @code{note},
559 nonzero if the insn has been deleted. Stored in the
560 @code{volatil} field and printed as @samp{/v}.
562 @findex INSN_FROM_TARGET_P
563 @cindex @code{insn} and @samp{/s}
564 @cindex @code{jump_insn} and @samp{/s}
565 @cindex @code{call_insn} and @samp{/s}
566 @cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn}
567 @item INSN_FROM_TARGET_P (@var{x})
568 In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay
569 slot of a branch, indicates that the insn
570 is from the target of the branch. If the branch insn has
571 @code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
572 the branch is taken. For annulled branches with
573 @code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
574 branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set,
575 this insn will always be executed. Stored in the @code{in_struct}
576 field and printed as @samp{/s}.
578 @findex LABEL_OUTSIDE_LOOP_P
579 @cindex @code{label_ref} and @samp{/s}
580 @cindex @code{in_struct}, in @code{label_ref}
581 @item LABEL_OUTSIDE_LOOP_P (@var{x})
582 In @code{label_ref} expressions, nonzero if this is a reference to a
583 label that is outside the innermost loop containing the reference to the
584 label. Stored in the @code{in_struct} field and printed as @samp{/s}.
586 @findex LABEL_PRESERVE_P
587 @cindex @code{code_label} and @samp{/i}
588 @cindex @code{note} and @samp{/i}
589 @cindex @code{in_struct}, in @code{code_label} and @code{note}
590 @item LABEL_PRESERVE_P (@var{x})
591 In a @code{code_label} or @code{note}, indicates that the label is referenced by
592 code or data not visible to the RTL of a given function.
593 Labels referenced by a non-local goto will have this bit set. Stored
594 in the @code{in_struct} field and printed as @samp{/s}.
596 @findex LABEL_REF_NONLOCAL_P
597 @cindex @code{label_ref} and @samp{/v}
598 @cindex @code{reg_label} and @samp{/v}
599 @cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
600 @item LABEL_REF_NONLOCAL_P (@var{x})
601 In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
602 a reference to a non-local label.
603 Stored in the @code{volatil} field and printed as @samp{/v}.
605 @findex MEM_IN_STRUCT_P
606 @cindex @code{mem} and @samp{/s}
607 @cindex @code{in_struct}, in @code{mem}
608 @item MEM_IN_STRUCT_P (@var{x})
609 In @code{mem} expressions, nonzero for reference to an entire structure,
610 union or array, or to a component of one. Zero for references to a
611 scalar variable or through a pointer to a scalar. If both this flag and
612 @code{MEM_SCALAR_P} are clear, then we don't know whether this @code{mem}
613 is in a structure or not. Both flags should never be simultaneously set.
614 Stored in the @code{in_struct} field and printed as @samp{/s}.
616 @findex MEM_KEEP_ALIAS_SET_P
617 @cindex @code{mem} and @samp{/j}
618 @cindex @code{jump}, in @code{mem}
619 @item MEM_KEEP_ALIAS_SET_P (@var{x})
620 In @code{mem} expressions, 1 if we should keep the alias set for this
621 mem unchanged when we access a component. Set to 1, for example, when we
622 are already in a non-addressable component of an aggregate.
623 Stored in the @code{jump} field and printed as @samp{/j}.
626 @cindex @code{mem} and @samp{/f}
627 @cindex @code{frame_related}, in @code{mem}
628 @item MEM_SCALAR_P (@var{x})
629 In @code{mem} expressions, nonzero for reference to a scalar known not
630 to be a member of a structure, union, or array. Zero for such
631 references and for indirections through pointers, even pointers pointing
632 to scalar types. If both this flag and @code{MEM_IN_STRUCT_P} are clear,
633 then we don't know whether this @code{mem} is in a structure or not.
634 Both flags should never be simultaneously set.
635 Stored in the @code{frame_related} field and printed as @samp{/f}.
637 @findex MEM_VOLATILE_P
638 @cindex @code{mem} and @samp{/v}
639 @cindex @code{asm_input} and @samp{/v}
640 @cindex @code{asm_operands} and @samp{/v}
641 @cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input}
642 @item MEM_VOLATILE_P (@var{x})
643 In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions,
644 nonzero for volatile memory references.
645 Stored in the @code{volatil} field and printed as @samp{/v}.
648 @cindex @code{mem} and @samp{/c}
649 @cindex @code{call}, in @code{mem}
650 @item MEM_NOTRAP_P (@var{x})
651 In @code{mem}, nonzero for memory references that will not trap.
652 Stored in the @code{call} field and printed as @samp{/c}.
654 @findex REG_FUNCTION_VALUE_P
655 @cindex @code{reg} and @samp{/i}
656 @cindex @code{integrated}, in @code{reg}
657 @item REG_FUNCTION_VALUE_P (@var{x})
658 Nonzero in a @code{reg} if it is the place in which this function's
659 value is going to be returned. (This happens only in a hard
660 register.) Stored in the @code{integrated} field and printed as
663 @findex REG_LOOP_TEST_P
664 @cindex @code{reg} and @samp{/s}
665 @cindex @code{in_struct}, in @code{reg}
666 @item REG_LOOP_TEST_P (@var{x})
667 In @code{reg} expressions, nonzero if this register's entire life is
668 contained in the exit test code for some loop. Stored in the
669 @code{in_struct} field and printed as @samp{/s}.
672 @cindex @code{reg} and @samp{/f}
673 @cindex @code{frame_related}, in @code{reg}
674 @item REG_POINTER (@var{x})
675 Nonzero in a @code{reg} if the register holds a pointer. Stored in the
676 @code{frame_related} field and printed as @samp{/f}.
678 @findex REG_USERVAR_P
679 @cindex @code{reg} and @samp{/v}
680 @cindex @code{volatil}, in @code{reg}
681 @item REG_USERVAR_P (@var{x})
682 In a @code{reg}, nonzero if it corresponds to a variable present in
683 the user's source code. Zero for temporaries generated internally by
684 the compiler. Stored in the @code{volatil} field and printed as
687 The same hard register may be used also for collecting the values of
688 functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
691 @findex RTX_FRAME_RELATED_P
692 @cindex @code{insn} and @samp{/f}
693 @cindex @code{call_insn} and @samp{/f}
694 @cindex @code{jump_insn} and @samp{/f}
695 @cindex @code{barrier} and @samp{/f}
696 @cindex @code{set} and @samp{/f}
697 @cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set}
698 @item RTX_FRAME_RELATED_P (@var{x})
699 Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
700 @code{barrier}, or @code{set} which is part of a function prologue
701 and sets the stack pointer, sets the frame pointer, or saves a register.
702 This flag should also be set on an instruction that sets up a temporary
703 register to use in place of the frame pointer.
704 Stored in the @code{frame_related} field and printed as @samp{/f}.
706 In particular, on RISC targets where there are limits on the sizes of
707 immediate constants, it is sometimes impossible to reach the register
708 save area directly from the stack pointer. In that case, a temporary
709 register is used that is near enough to the register save area, and the
710 Canonical Frame Address, i.e., DWARF2's logical frame pointer, register
711 must (temporarily) be changed to be this temporary register. So, the
712 instruction that sets this temporary register must be marked as
713 @code{RTX_FRAME_RELATED_P}.
715 If the marked instruction is overly complex (defined in terms of what
716 @code{dwarf2out_frame_debug_expr} can handle), you will also have to
717 create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
718 instruction. This note should contain a simple expression of the
719 computation performed by this instruction, i.e., one that
720 @code{dwarf2out_frame_debug_expr} can handle.
722 This flag is required for exception handling support on targets with RTL
725 @cindex @code{insn} and @samp{/i}
726 @cindex @code{call_insn} and @samp{/i}
727 @cindex @code{jump_insn} and @samp{/i}
728 @cindex @code{barrier} and @samp{/i}
729 @cindex @code{code_label} and @samp{/i}
730 @cindex @code{insn_list} and @samp{/i}
731 @cindex @code{const} and @samp{/i}
732 @cindex @code{note} and @samp{/i}
733 @cindex @code{integrated}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, @code{code_label}, @code{insn_list}, @code{const}, and @code{note}
734 @code{code_label}, @code{insn_list}, @code{const}, or @code{note} if it
735 resulted from an in-line function call.
736 Stored in the @code{integrated} field and printed as @samp{/i}.
738 @findex RTX_UNCHANGING_P
739 @cindex @code{reg} and @samp{/u}
740 @cindex @code{mem} and @samp{/u}
741 @cindex @code{concat} and @samp{/u}
742 @cindex @code{unchanging}, in @code{reg} and @code{mem}
743 @item RTX_UNCHANGING_P (@var{x})
744 Nonzero in a @code{reg}, @code{mem}, or @code{concat} if the register or
745 memory is set at most once, anywhere. This does not mean that it is
748 GCC uses this flag to determine whether two references conflict. As
749 implemented by @code{true_dependence} in @file{alias.c} for memory
750 references, unchanging memory can't conflict with non-unchanging memory;
751 a non-unchanging read can conflict with a non-unchanging write; an
752 unchanging read can conflict with an unchanging write (since there may
753 be a single store to this address to initialize it); and an unchanging
754 store can conflict with a non-unchanging read. This means we must make
755 conservative assumptions when choosing the value of this flag for a
756 memory reference to an object containing both unchanging and
757 non-unchanging fields: we must set the flag when writing to the object
758 and clear it when reading from the object.
760 Stored in the @code{unchanging} field and printed as @samp{/u}.
762 @findex SCHED_GROUP_P
763 @cindex @code{insn} and @samp{/s}
764 @cindex @code{call_insn} and @samp{/s}
765 @cindex @code{jump_insn} and @samp{/s}
766 @cindex @code{in_struct}, in @code{insn}, @code{jump_insn} and @code{call_insn}
767 @item SCHED_GROUP_P (@var{x})
768 During instruction scheduling, in an @code{insn}, @code{call_insn} or
769 @code{jump_insn}, indicates that the
770 previous insn must be scheduled together with this insn. This is used to
771 ensure that certain groups of instructions will not be split up by the
772 instruction scheduling pass, for example, @code{use} insns before
773 a @code{call_insn} may not be separated from the @code{call_insn}.
774 Stored in the @code{in_struct} field and printed as @samp{/s}.
776 @findex SET_IS_RETURN_P
777 @cindex @code{insn} and @samp{/j}
778 @cindex @code{jump}, in @code{insn}
779 @item SET_IS_RETURN_P (@var{x})
780 For a @code{set}, nonzero if it is for a return.
781 Stored in the @code{jump} field and printed as @samp{/j}.
783 @findex SIBLING_CALL_P
784 @cindex @code{call_insn} and @samp{/j}
785 @cindex @code{jump}, in @code{call_insn}
786 @item SIBLING_CALL_P (@var{x})
787 For a @code{call_insn}, nonzero if the insn is a sibling call.
788 Stored in the @code{jump} field and printed as @samp{/j}.
790 @findex STRING_POOL_ADDRESS_P
791 @cindex @code{symbol_ref} and @samp{/f}
792 @cindex @code{frame_related}, in @code{symbol_ref}
793 @item STRING_POOL_ADDRESS_P (@var{x})
794 For a @code{symbol_ref} expression, nonzero if it addresses this function's
795 string constant pool.
796 Stored in the @code{frame_related} field and printed as @samp{/f}.
798 @findex SUBREG_PROMOTED_UNSIGNED_P
799 @cindex @code{subreg} and @samp{/u} and @samp{/v}
800 @cindex @code{unchanging}, in @code{subreg}
801 @cindex @code{volatil}, in @code{subreg}
802 @item SUBREG_PROMOTED_UNSIGNED_P (@var{x})
803 Returns a value greater then zero for a @code{subreg} that has
804 @code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
805 zero-extended, zero if it is kept sign-extended, and less then zero if it is
806 extended some other way via the @code{ptr_extend} instruction.
807 Stored in the @code{unchanging}
808 field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
809 This macro may only be used to get the value it may not be used to change
810 the value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
812 @findex SUBREG_PROMOTED_UNSIGNED_SET
813 @cindex @code{subreg} and @samp{/u}
814 @cindex @code{unchanging}, in @code{subreg}
815 @cindex @code{volatil}, in @code{subreg}
816 @item SUBREG_PROMOTED_UNSIGNED_SET (@var{x})
817 Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
818 to reflect zero, sign, or other extension. If @code{volatil} is
819 zero, then @code{unchanging} as nonzero means zero extension and as
820 zero means sign extension. If @code{volatil} is nonzero then some
821 other type of extension was done via the @code{ptr_extend} instruction.
823 @findex SUBREG_PROMOTED_VAR_P
824 @cindex @code{subreg} and @samp{/s}
825 @cindex @code{in_struct}, in @code{subreg}
826 @item SUBREG_PROMOTED_VAR_P (@var{x})
827 Nonzero in a @code{subreg} if it was made when accessing an object that
828 was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
829 description macro (@pxref{Storage Layout}). In this case, the mode of
830 the @code{subreg} is the declared mode of the object and the mode of
831 @code{SUBREG_REG} is the mode of the register that holds the object.
832 Promoted variables are always either sign- or zero-extended to the wider
833 mode on every assignment. Stored in the @code{in_struct} field and
834 printed as @samp{/s}.
836 @findex SYMBOL_REF_USED
837 @cindex @code{used}, in @code{symbol_ref}
838 @item SYMBOL_REF_USED (@var{x})
839 In a @code{symbol_ref}, indicates that @var{x} has been used. This is
840 normally only used to ensure that @var{x} is only declared external
841 once. Stored in the @code{used} field.
843 @findex SYMBOL_REF_WEAK
844 @cindex @code{symbol_ref} and @samp{/i}
845 @cindex @code{integrated}, in @code{symbol_ref}
846 @item SYMBOL_REF_WEAK (@var{x})
847 In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
848 Stored in the @code{integrated} field and printed as @samp{/i}.
850 @findex SYMBOL_REF_FLAG
851 @cindex @code{symbol_ref} and @samp{/v}
852 @cindex @code{volatil}, in @code{symbol_ref}
853 @item SYMBOL_REF_FLAG (@var{x})
854 In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
855 Stored in the @code{volatil} field and printed as @samp{/v}.
857 Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
858 by @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS}
859 is mandatory if the target requires more than one bit of storage.
862 These are the fields to which the above macros refer:
866 @cindex @samp{/c} in RTL dump
868 In a @code{mem}, 1 means that the memory reference will not trap.
870 In an RTL dump, this flag is represented as @samp{/c}.
872 @findex frame_related
873 @cindex @samp{/f} in RTL dump
875 In an @code{insn} or @code{set} expression, 1 means that it is part of
876 a function prologue and sets the stack pointer, sets the frame pointer,
877 saves a register, or sets up a temporary register to use in place of the
880 In @code{reg} expressions, 1 means that the register holds a pointer.
882 In @code{symbol_ref} expressions, 1 means that the reference addresses
883 this function's string constant pool.
885 In @code{mem} expressions, 1 means that the reference is to a scalar.
887 In an RTL dump, this flag is represented as @samp{/f}.
890 @cindex @samp{/s} in RTL dump
892 In @code{mem} expressions, it is 1 if the memory datum referred to is
893 all or part of a structure or array; 0 if it is (or might be) a scalar
894 variable. A reference through a C pointer has 0 because the pointer
895 might point to a scalar variable. This information allows the compiler
896 to determine something about possible cases of aliasing.
898 In @code{reg} expressions, it is 1 if the register has its entire life
899 contained within the test expression of some loop.
901 In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
902 an object that has had its mode promoted from a wider mode.
904 In @code{label_ref} expressions, 1 means that the referenced label is
905 outside the innermost loop containing the insn in which the @code{label_ref}
908 In @code{code_label} expressions, it is 1 if the label may never be deleted.
909 This is used for labels which are the target of non-local gotos. Such a
910 label that would have been deleted is replaced with a @code{note} of type
911 @code{NOTE_INSN_DELETED_LABEL}.
913 In an @code{insn} during dead-code elimination, 1 means that the insn is
916 In an @code{insn} or @code{jump_insn} during reorg for an insn in the
917 delay slot of a branch,
918 1 means that this insn is from the target of the branch.
920 In an @code{insn} during instruction scheduling, 1 means that this insn
921 must be scheduled as part of a group together with the previous insn.
923 In an RTL dump, this flag is represented as @samp{/s}.
926 @cindex @samp{/i} in RTL dump
928 In an @code{insn}, @code{insn_list}, or @code{const}, 1 means the RTL was
929 produced by procedure integration.
931 In @code{reg} expressions, 1 means the register contains
932 the value to be returned by the current function. On
933 machines that pass parameters in registers, the same register number
934 may be used for parameters as well, but this flag is not set on such
937 In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
939 In an RTL dump, this flag is represented as @samp{/i}.
942 @cindex @samp{/j} in RTL dump
944 In a @code{mem} expression, 1 means we should keep the alias set for this
945 mem unchanged when we access a component.
947 In a @code{set}, 1 means it is for a return.
949 In a @code{call_insn}, 1 means it is a sibling call.
951 In an RTL dump, this flag is represented as @samp{/j}.
954 @cindex @samp{/u} in RTL dump
956 In @code{reg} and @code{mem} expressions, 1 means
957 that the value of the expression never changes.
959 In @code{subreg} expressions, it is 1 if the @code{subreg} references an
960 unsigned object whose mode has been promoted to a wider mode.
962 In an @code{insn} or @code{jump_insn} in the delay slot of a branch
963 instruction, 1 means an annulling branch should be used.
965 In a @code{symbol_ref} expression, 1 means that this symbol addresses
966 something in the per-function constant pool.
968 In a @code{call_insn}, @code{note}, or an @code{expr_list} of notes,
969 1 means that this instruction is a call to a const or pure function.
971 In an RTL dump, this flag is represented as @samp{/u}.
975 This flag is used directly (without an access macro) at the end of RTL
976 generation for a function, to count the number of times an expression
977 appears in insns. Expressions that appear more than once are copied,
978 according to the rules for shared structure (@pxref{Sharing}).
980 For a @code{reg}, it is used directly (without an access macro) by the
981 leaf register renumbering code to ensure that each register is only
984 In a @code{symbol_ref}, it indicates that an external declaration for
985 the symbol has already been written.
988 @cindex @samp{/v} in RTL dump
990 @cindex volatile memory references
991 In a @code{mem}, @code{asm_operands}, or @code{asm_input}
992 expression, it is 1 if the memory
993 reference is volatile. Volatile memory references may not be deleted,
994 reordered or combined.
996 In a @code{symbol_ref} expression, it is used for machine-specific
999 In a @code{reg} expression, it is 1 if the value is a user-level variable.
1000 0 indicates an internal compiler temporary.
1002 In an @code{insn}, 1 means the insn has been deleted.
1004 In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
1005 to a non-local label.
1007 In an RTL dump, this flag is represented as @samp{/v}.
1011 @section Machine Modes
1012 @cindex machine modes
1014 @findex enum machine_mode
1015 A machine mode describes a size of data object and the representation used
1016 for it. In the C code, machine modes are represented by an enumeration
1017 type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
1018 expression has room for a machine mode and so do certain kinds of tree
1019 expressions (declarations and types, to be precise).
1021 In debugging dumps and machine descriptions, the machine mode of an RTL
1022 expression is written after the expression code with a colon to separate
1023 them. The letters @samp{mode} which appear at the end of each machine mode
1024 name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
1025 expression with machine mode @code{SImode}. If the mode is
1026 @code{VOIDmode}, it is not written at all.
1028 Here is a table of machine modes. The term ``byte'' below refers to an
1029 object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
1034 ``Bit'' mode represents a single bit, for predicate registers.
1038 ``Quarter-Integer'' mode represents a single byte treated as an integer.
1042 ``Half-Integer'' mode represents a two-byte integer.
1046 ``Partial Single Integer'' mode represents an integer which occupies
1047 four bytes but which doesn't really use all four. On some machines,
1048 this is the right mode to use for pointers.
1052 ``Single Integer'' mode represents a four-byte integer.
1056 ``Partial Double Integer'' mode represents an integer which occupies
1057 eight bytes but which doesn't really use all eight. On some machines,
1058 this is the right mode to use for certain pointers.
1062 ``Double Integer'' mode represents an eight-byte integer.
1066 ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
1070 ``Octa Integer'' (?) mode represents a thirty-two-byte integer.
1074 ``Quarter-Floating'' mode represents a quarter-precision (single byte)
1075 floating point number.
1079 ``Half-Floating'' mode represents a half-precision (two byte) floating
1084 ``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision
1085 (three byte) floating point number.
1089 ``Single Floating'' mode represents a four byte floating point number.
1090 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1091 this is a single-precision IEEE floating point number; it can also be
1092 used for double-precision (on processors with 16-bit bytes) and
1093 single-precision VAX and IBM types.
1097 ``Double Floating'' mode represents an eight byte floating point number.
1098 In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
1099 this is a double-precision IEEE floating point number.
1103 ``Extended Floating'' mode represents an IEEE extended floating point
1104 number. This mode only has 80 meaningful bits (ten bytes). Some
1105 processors require such numbers to be padded to twelve bytes, others
1106 to sixteen; this mode is used for either.
1110 ``Tetra Floating'' mode represents a sixteen byte floating point number
1111 all 128 of whose bits are meaningful. One common use is the
1112 IEEE quad-precision format.
1116 ``Condition Code'' mode represents the value of a condition code, which
1117 is a machine-specific set of bits used to represent the result of a
1118 comparison operation. Other machine-specific modes may also be used for
1119 the condition code. These modes are not used on machines that use
1120 @code{cc0} (see @pxref{Condition Code}).
1124 ``Block'' mode represents values that are aggregates to which none of
1125 the other modes apply. In RTL, only memory references can have this mode,
1126 and only if they appear in string-move or vector instructions. On machines
1127 which have no such instructions, @code{BLKmode} will not appear in RTL@.
1131 Void mode means the absence of a mode or an unspecified mode.
1132 For example, RTL expressions of code @code{const_int} have mode
1133 @code{VOIDmode} because they can be taken to have whatever mode the context
1134 requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
1135 the absence of any mode.
1143 @item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode
1144 These modes stand for a complex number represented as a pair of floating
1145 point values. The floating point values are in @code{QFmode},
1146 @code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
1147 @code{TFmode}, respectively.
1155 @item CQImode, CHImode, CSImode, CDImode, CTImode, COImode
1156 These modes stand for a complex number represented as a pair of integer
1157 values. The integer values are in @code{QImode}, @code{HImode},
1158 @code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
1162 The machine description defines @code{Pmode} as a C macro which expands
1163 into the machine mode used for addresses. Normally this is the mode
1164 whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
1166 The only modes which a machine description @i{must} support are
1167 @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
1168 @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
1169 The compiler will attempt to use @code{DImode} for 8-byte structures and
1170 unions, but this can be prevented by overriding the definition of
1171 @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
1172 use @code{TImode} for 16-byte structures and unions. Likewise, you can
1173 arrange for the C type @code{short int} to avoid using @code{HImode}.
1175 @cindex mode classes
1176 Very few explicit references to machine modes remain in the compiler and
1177 these few references will soon be removed. Instead, the machine modes
1178 are divided into mode classes. These are represented by the enumeration
1179 type @code{enum mode_class} defined in @file{machmode.h}. The possible
1185 Integer modes. By default these are @code{BImode}, @code{QImode},
1186 @code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
1189 @findex MODE_PARTIAL_INT
1190 @item MODE_PARTIAL_INT
1191 The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
1192 @code{PSImode} and @code{PDImode}.
1196 Floating point modes. By default these are @code{QFmode},
1197 @code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
1198 @code{XFmode} and @code{TFmode}.
1200 @findex MODE_COMPLEX_INT
1201 @item MODE_COMPLEX_INT
1202 Complex integer modes. (These are not currently implemented).
1204 @findex MODE_COMPLEX_FLOAT
1205 @item MODE_COMPLEX_FLOAT
1206 Complex floating point modes. By default these are @code{QCmode},
1207 @code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
1210 @findex MODE_FUNCTION
1212 Algol or Pascal function variables including a static chain.
1213 (These are not currently implemented).
1217 Modes representing condition code values. These are @code{CCmode} plus
1218 any modes listed in the @code{EXTRA_CC_MODES} macro. @xref{Jump Patterns},
1219 also see @ref{Condition Code}.
1223 This is a catchall mode class for modes which don't fit into the above
1224 classes. Currently @code{VOIDmode} and @code{BLKmode} are in
1228 Here are some C macros that relate to machine modes:
1232 @item GET_MODE (@var{x})
1233 Returns the machine mode of the RTX @var{x}.
1236 @item PUT_MODE (@var{x}, @var{newmode})
1237 Alters the machine mode of the RTX @var{x} to be @var{newmode}.
1239 @findex NUM_MACHINE_MODES
1240 @item NUM_MACHINE_MODES
1241 Stands for the number of machine modes available on the target
1242 machine. This is one greater than the largest numeric value of any
1245 @findex GET_MODE_NAME
1246 @item GET_MODE_NAME (@var{m})
1247 Returns the name of mode @var{m} as a string.
1249 @findex GET_MODE_CLASS
1250 @item GET_MODE_CLASS (@var{m})
1251 Returns the mode class of mode @var{m}.
1253 @findex GET_MODE_WIDER_MODE
1254 @item GET_MODE_WIDER_MODE (@var{m})
1255 Returns the next wider natural mode. For example, the expression
1256 @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
1258 @findex GET_MODE_SIZE
1259 @item GET_MODE_SIZE (@var{m})
1260 Returns the size in bytes of a datum of mode @var{m}.
1262 @findex GET_MODE_BITSIZE
1263 @item GET_MODE_BITSIZE (@var{m})
1264 Returns the size in bits of a datum of mode @var{m}.
1266 @findex GET_MODE_MASK
1267 @item GET_MODE_MASK (@var{m})
1268 Returns a bitmask containing 1 for all bits in a word that fit within
1269 mode @var{m}. This macro can only be used for modes whose bitsize is
1270 less than or equal to @code{HOST_BITS_PER_INT}.
1272 @findex GET_MODE_ALIGNMENT
1273 @item GET_MODE_ALIGNMENT (@var{m})
1274 Return the required alignment, in bits, for an object of mode @var{m}.
1276 @findex GET_MODE_UNIT_SIZE
1277 @item GET_MODE_UNIT_SIZE (@var{m})
1278 Returns the size in bytes of the subunits of a datum of mode @var{m}.
1279 This is the same as @code{GET_MODE_SIZE} except in the case of complex
1280 modes. For them, the unit size is the size of the real or imaginary
1283 @findex GET_MODE_NUNITS
1284 @item GET_MODE_NUNITS (@var{m})
1285 Returns the number of units contained in a mode, i.e.,
1286 @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
1288 @findex GET_CLASS_NARROWEST_MODE
1289 @item GET_CLASS_NARROWEST_MODE (@var{c})
1290 Returns the narrowest mode in mode class @var{c}.
1295 The global variables @code{byte_mode} and @code{word_mode} contain modes
1296 whose classes are @code{MODE_INT} and whose bitsizes are either
1297 @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
1298 machines, these are @code{QImode} and @code{SImode}, respectively.
1301 @section Constant Expression Types
1302 @cindex RTL constants
1303 @cindex RTL constant expression types
1305 The simplest RTL expressions are those that represent constant values.
1309 @item (const_int @var{i})
1310 This type of expression represents the integer value @var{i}. @var{i}
1311 is customarily accessed with the macro @code{INTVAL} as in
1312 @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1318 There is only one expression object for the integer value zero; it is
1319 the value of the variable @code{const0_rtx}. Likewise, the only
1320 expression for integer value one is found in @code{const1_rtx}, the only
1321 expression for integer value two is found in @code{const2_rtx}, and the
1322 only expression for integer value negative one is found in
1323 @code{constm1_rtx}. Any attempt to create an expression of code
1324 @code{const_int} and value zero, one, two or negative one will return
1325 @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
1326 @code{constm1_rtx} as appropriate.
1328 @findex const_true_rtx
1329 Similarly, there is only one object for the integer whose value is
1330 @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
1331 @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
1332 @code{const1_rtx} will point to the same object. If
1333 @code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
1334 @code{constm1_rtx} will point to the same object.
1336 @findex const_double
1337 @item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{})
1338 Represents either a floating-point constant of mode @var{m} or an
1339 integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
1340 bits but small enough to fit within twice that number of bits (GCC
1341 does not provide a mechanism to represent even larger constants). In
1342 the latter case, @var{m} will be @code{VOIDmode}.
1344 @findex const_vector
1345 @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
1346 Represents a vector constant. The square brackets stand for the vector
1347 containing the constant elements. @var{x0}, @var{x1} and so on are
1348 the @code{const_int} or @code{const_double} elements.
1350 The number of units in a @code{const_vector} is obtained with the macro
1351 @code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
1353 Individual elements in a vector constant are accessed with the macro
1354 @code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
1355 where @var{v} is the vector constant and @var{n} is the element
1358 @findex CONST_DOUBLE_MEM
1359 @findex CONST_DOUBLE_CHAIN
1360 @var{addr} is used to contain the @code{mem} expression that corresponds
1361 to the location in memory that at which the constant can be found. If
1362 it has not been allocated a memory location, but is on the chain of all
1363 @code{const_double} expressions in this compilation (maintained using an
1364 undisplayed field), @var{addr} contains @code{const0_rtx}. If it is not
1365 on the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is
1366 customarily accessed with the macro @code{CONST_DOUBLE_MEM} and the
1367 chain field via @code{CONST_DOUBLE_CHAIN}.
1369 @findex CONST_DOUBLE_LOW
1370 If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1371 @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
1372 @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
1374 If the constant is floating point (regardless of its precision), then
1375 the number of integers used to store the value depends on the size of
1376 @code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers
1377 represent a floating point number, but not precisely in the target
1378 machine's or host machine's floating point format. To convert them to
1379 the precise bit pattern used by the target machine, use the macro
1380 @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
1385 The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
1386 value 0 in mode @var{mode}. If mode @var{mode} is of mode class
1387 @code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of
1388 mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
1389 expression in mode @var{mode}. Otherwise, it returns a
1390 @code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro
1391 @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
1392 mode @var{mode} and similarly for @code{CONST2_RTX}. The
1393 @code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
1396 @findex const_string
1397 @item (const_string @var{str})
1398 Represents a constant string with value @var{str}. Currently this is
1399 used only for insn attributes (@pxref{Insn Attributes}) since constant
1400 strings in C are placed in memory.
1403 @item (symbol_ref:@var{mode} @var{symbol})
1404 Represents the value of an assembler label for data. @var{symbol} is
1405 a string that describes the name of the assembler label. If it starts
1406 with a @samp{*}, the label is the rest of @var{symbol} not including
1407 the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
1410 The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
1411 Usually that is the only mode for which a symbol is directly valid.
1414 @item (label_ref @var{label})
1415 Represents the value of an assembler label for code. It contains one
1416 operand, an expression, which must be a @code{code_label} or a @code{note}
1417 of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
1418 sequence to identify the place where the label should go.
1420 The reason for using a distinct expression type for code label
1421 references is so that jump optimization can distinguish them.
1423 @item (const:@var{m} @var{exp})
1424 Represents a constant that is the result of an assembly-time
1425 arithmetic computation. The operand, @var{exp}, is an expression that
1426 contains only constants (@code{const_int}, @code{symbol_ref} and
1427 @code{label_ref} expressions) combined with @code{plus} and
1428 @code{minus}. However, not all combinations are valid, since the
1429 assembler cannot do arbitrary arithmetic on relocatable symbols.
1431 @var{m} should be @code{Pmode}.
1434 @item (high:@var{m} @var{exp})
1435 Represents the high-order bits of @var{exp}, usually a
1436 @code{symbol_ref}. The number of bits is machine-dependent and is
1437 normally the number of bits specified in an instruction that initializes
1438 the high order bits of a register. It is used with @code{lo_sum} to
1439 represent the typical two-instruction sequence used in RISC machines to
1440 reference a global memory location.
1442 @var{m} should be @code{Pmode}.
1445 @node Regs and Memory
1446 @section Registers and Memory
1447 @cindex RTL register expressions
1448 @cindex RTL memory expressions
1450 Here are the RTL expression types for describing access to machine
1451 registers and to main memory.
1455 @cindex hard registers
1456 @cindex pseudo registers
1457 @item (reg:@var{m} @var{n})
1458 For small values of the integer @var{n} (those that are less than
1459 @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
1460 register number @var{n}: a @dfn{hard register}. For larger values of
1461 @var{n}, it stands for a temporary value or @dfn{pseudo register}.
1462 The compiler's strategy is to generate code assuming an unlimited
1463 number of such pseudo registers, and later convert them into hard
1464 registers or into memory references.
1466 @var{m} is the machine mode of the reference. It is necessary because
1467 machines can generally refer to each register in more than one mode.
1468 For example, a register may contain a full word but there may be
1469 instructions to refer to it as a half word or as a single byte, as
1470 well as instructions to refer to it as a floating point number of
1473 Even for a register that the machine can access in only one mode,
1474 the mode must always be specified.
1476 The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
1477 description, since the number of hard registers on the machine is an
1478 invariant characteristic of the machine. Note, however, that not
1479 all of the machine registers must be general registers. All the
1480 machine registers that can be used for storage of data are given
1481 hard register numbers, even those that can be used only in certain
1482 instructions or can hold only certain types of data.
1484 A hard register may be accessed in various modes throughout one
1485 function, but each pseudo register is given a natural mode
1486 and is accessed only in that mode. When it is necessary to describe
1487 an access to a pseudo register using a nonnatural mode, a @code{subreg}
1490 A @code{reg} expression with a machine mode that specifies more than
1491 one word of data may actually stand for several consecutive registers.
1492 If in addition the register number specifies a hardware register, then
1493 it actually represents several consecutive hardware registers starting
1494 with the specified one.
1496 Each pseudo register number used in a function's RTL code is
1497 represented by a unique @code{reg} expression.
1499 @findex FIRST_VIRTUAL_REGISTER
1500 @findex LAST_VIRTUAL_REGISTER
1501 Some pseudo register numbers, those within the range of
1502 @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
1503 appear during the RTL generation phase and are eliminated before the
1504 optimization phases. These represent locations in the stack frame that
1505 cannot be determined until RTL generation for the function has been
1506 completed. The following virtual register numbers are defined:
1509 @findex VIRTUAL_INCOMING_ARGS_REGNUM
1510 @item VIRTUAL_INCOMING_ARGS_REGNUM
1511 This points to the first word of the incoming arguments passed on the
1512 stack. Normally these arguments are placed there by the caller, but the
1513 callee may have pushed some arguments that were previously passed in
1516 @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1517 @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1518 When RTL generation is complete, this virtual register is replaced
1519 by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1520 value of @code{FIRST_PARM_OFFSET}.
1522 @findex VIRTUAL_STACK_VARS_REGNUM
1523 @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1524 @item VIRTUAL_STACK_VARS_REGNUM
1525 If @code{FRAME_GROWS_DOWNWARD} is defined, this points to immediately
1526 above the first variable on the stack. Otherwise, it points to the
1527 first variable on the stack.
1529 @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1530 @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1531 @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
1532 register given by @code{FRAME_POINTER_REGNUM} and the value
1533 @code{STARTING_FRAME_OFFSET}.
1535 @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1536 @item VIRTUAL_STACK_DYNAMIC_REGNUM
1537 This points to the location of dynamically allocated memory on the stack
1538 immediately after the stack pointer has been adjusted by the amount of
1541 @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1542 @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1543 This virtual register is replaced by the sum of the register given by
1544 @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1546 @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1547 @item VIRTUAL_OUTGOING_ARGS_REGNUM
1548 This points to the location in the stack at which outgoing arguments
1549 should be written when the stack is pre-pushed (arguments pushed using
1550 push insns should always use @code{STACK_POINTER_REGNUM}).
1552 @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1553 This virtual register is replaced by the sum of the register given by
1554 @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1558 @item (subreg:@var{m} @var{reg} @var{bytenum})
1559 @code{subreg} expressions are used to refer to a register in a machine
1560 mode other than its natural one, or to refer to one register of
1561 a multi-part @code{reg} that actually refers to several registers.
1563 Each pseudo-register has a natural mode. If it is necessary to
1564 operate on it in a different mode---for example, to perform a fullword
1565 move instruction on a pseudo-register that contains a single
1566 byte---the pseudo-register must be enclosed in a @code{subreg}. In
1567 such a case, @var{bytenum} is zero.
1569 Usually @var{m} is at least as narrow as the mode of @var{reg}, in which
1570 case it is restricting consideration to only the bits of @var{reg} that
1573 Sometimes @var{m} is wider than the mode of @var{reg}. These
1574 @code{subreg} expressions are often called @dfn{paradoxical}. They are
1575 used in cases where we want to refer to an object in a wider mode but do
1576 not care what value the additional bits have. The reload pass ensures
1577 that paradoxical references are only made to hard registers.
1579 The other use of @code{subreg} is to extract the individual registers of
1580 a multi-register value. Machine modes such as @code{DImode} and
1581 @code{TImode} can indicate values longer than a word, values which
1582 usually require two or more consecutive registers. To access one of the
1583 registers, use a @code{subreg} with mode @code{SImode} and a
1584 @var{bytenum} offset that says which register.
1586 Storing in a non-paradoxical @code{subreg} has undefined results for
1587 bits belonging to the same word as the @code{subreg}. This laxity makes
1588 it easier to generate efficient code for such instructions. To
1589 represent an instruction that preserves all the bits outside of those in
1590 the @code{subreg}, use @code{strict_low_part} around the @code{subreg}.
1592 @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1593 The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says
1594 that byte number zero is part of the most significant word; otherwise,
1595 it is part of the least significant word.
1597 @cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
1598 The compilation parameter @code{BYTES_BIG_ENDIAN}, if set to 1, says
1599 that byte number zero is the most significant byte within a word;
1600 otherwise, it is the least significant byte within a word.
1602 @cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
1603 On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
1604 @code{WORDS_BIG_ENDIAN}.
1605 However, most parts of the compiler treat floating point values as if
1606 they had the same endianness as integer values. This works because
1607 they handle them solely as a collection of integer values, with no
1608 particular numerical value. Only real.c and the runtime libraries
1609 care about @code{FLOAT_WORDS_BIG_ENDIAN}.
1611 @cindex combiner pass
1613 @cindex @code{subreg}, special reload handling
1614 Between the combiner pass and the reload pass, it is possible to have a
1615 paradoxical @code{subreg} which contains a @code{mem} instead of a
1616 @code{reg} as its first operand. After the reload pass, it is also
1617 possible to have a non-paradoxical @code{subreg} which contains a
1618 @code{mem}; this usually occurs when the @code{mem} is a stack slot
1619 which replaced a pseudo register.
1621 Note that it is not valid to access a @code{DFmode} value in @code{SFmode}
1622 using a @code{subreg}. On some machines the most significant part of a
1623 @code{DFmode} value does not have the same format as a single-precision
1626 It is also not valid to access a single word of a multi-word value in a
1627 hard register when less registers can hold the value than would be
1628 expected from its size. For example, some 32-bit machines have
1629 floating-point registers that can hold an entire @code{DFmode} value.
1630 If register 10 were such a register @code{(subreg:SI (reg:DF 10) 1)}
1631 would be invalid because there is no way to convert that reference to
1632 a single machine register. The reload pass prevents @code{subreg}
1633 expressions such as these from being formed.
1637 The first operand of a @code{subreg} expression is customarily accessed
1638 with the @code{SUBREG_REG} macro and the second operand is customarily
1639 accessed with the @code{SUBREG_BYTE} macro.
1642 @cindex scratch operands
1643 @item (scratch:@var{m})
1644 This represents a scratch register that will be required for the
1645 execution of a single instruction and not used subsequently. It is
1646 converted into a @code{reg} by either the local register allocator or
1649 @code{scratch} is usually present inside a @code{clobber} operation
1650 (@pxref{Side Effects}).
1653 @cindex condition code register
1655 This refers to the machine's condition code register. It has no
1656 operands and may not have a machine mode. There are two ways to use it:
1660 To stand for a complete set of condition code flags. This is best on
1661 most machines, where each comparison sets the entire series of flags.
1663 With this technique, @code{(cc0)} may be validly used in only two
1664 contexts: as the destination of an assignment (in test and compare
1665 instructions) and in comparison operators comparing against zero
1666 (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
1669 To stand for a single flag that is the result of a single condition.
1670 This is useful on machines that have only a single flag bit, and in
1671 which comparison instructions must specify the condition to test.
1673 With this technique, @code{(cc0)} may be validly used in only two
1674 contexts: as the destination of an assignment (in test and compare
1675 instructions) where the source is a comparison operator, and as the
1676 first operand of @code{if_then_else} (in a conditional branch).
1680 There is only one expression object of code @code{cc0}; it is the
1681 value of the variable @code{cc0_rtx}. Any attempt to create an
1682 expression of code @code{cc0} will return @code{cc0_rtx}.
1684 Instructions can set the condition code implicitly. On many machines,
1685 nearly all instructions set the condition code based on the value that
1686 they compute or store. It is not necessary to record these actions
1687 explicitly in the RTL because the machine description includes a
1688 prescription for recognizing the instructions that do so (by means of
1689 the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
1690 instructions whose sole purpose is to set the condition code, and
1691 instructions that use the condition code, need mention @code{(cc0)}.
1693 On some machines, the condition code register is given a register number
1694 and a @code{reg} is used instead of @code{(cc0)}. This is usually the
1695 preferable approach if only a small subset of instructions modify the
1696 condition code. Other machines store condition codes in general
1697 registers; in such cases a pseudo register should be used.
1699 Some machines, such as the SPARC and RS/6000, have two sets of
1700 arithmetic instructions, one that sets and one that does not set the
1701 condition code. This is best handled by normally generating the
1702 instruction that does not set the condition code, and making a pattern
1703 that both performs the arithmetic and sets the condition code register
1704 (which would not be @code{(cc0)} in this case). For examples, search
1705 for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
1709 @cindex program counter
1710 This represents the machine's program counter. It has no operands and
1711 may not have a machine mode. @code{(pc)} may be validly used only in
1712 certain specific contexts in jump instructions.
1715 There is only one expression object of code @code{pc}; it is the value
1716 of the variable @code{pc_rtx}. Any attempt to create an expression of
1717 code @code{pc} will return @code{pc_rtx}.
1719 All instructions that do not jump alter the program counter implicitly
1720 by incrementing it, but there is no need to mention this in the RTL@.
1723 @item (mem:@var{m} @var{addr} @var{alias})
1724 This RTX represents a reference to main memory at an address
1725 represented by the expression @var{addr}. @var{m} specifies how large
1726 a unit of memory is accessed. @var{alias} specifies an alias set for the
1727 reference. In general two items are in different alias sets if they cannot
1728 reference the same memory address.
1730 The construct @code{(mem:BLK (scratch))} is considered to alias all
1731 other memories. Thus it may be used as a memory barrier in epilogue
1732 stack deallocation patterns.
1735 @item (addressof:@var{m} @var{reg})
1736 This RTX represents a request for the address of register @var{reg}. Its mode
1737 is always @code{Pmode}. If there are any @code{addressof}
1738 expressions left in the function after CSE, @var{reg} is forced into the
1739 stack and the @code{addressof} expression is replaced with a @code{plus}
1740 expression for the address of its stack slot.
1744 @section RTL Expressions for Arithmetic
1745 @cindex arithmetic, in RTL
1746 @cindex math, in RTL
1747 @cindex RTL expressions for arithmetic
1749 Unless otherwise specified, all the operands of arithmetic expressions
1750 must be valid for mode @var{m}. An operand is valid for mode @var{m}
1751 if it has mode @var{m}, or if it is a @code{const_int} or
1752 @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
1754 For commutative binary operations, constants should be placed in the
1762 @cindex RTL addition
1763 @cindex RTL addition with signed saturation
1764 @cindex RTL addition with unsigned saturation
1765 @item (plus:@var{m} @var{x} @var{y})
1766 @itemx (ss_plus:@var{m} @var{x} @var{y})
1767 @itemx (us_plus:@var{m} @var{x} @var{y})
1769 These three expressions all represent the sum of the values
1770 represented by @var{x} and @var{y} carried out in machine mode
1771 @var{m}. They differ in their behavior on overflow of integer modes.
1772 @code{plus} wraps round modulo the width of @var{m}; @code{ss_plus}
1773 saturates at the maximum signed value representable in @var{m};
1774 @code{us_plus} saturates at the maximum unsigned value.
1776 @c ??? What happens on overflow of floating point modes?
1779 @item (lo_sum:@var{m} @var{x} @var{y})
1781 This expression represents the sum of @var{x} and the low-order bits
1782 of @var{y}. It is used with @code{high} (@pxref{Constants}) to
1783 represent the typical two-instruction sequence used in RISC machines
1784 to reference a global memory location.
1786 The number of low order bits is machine-dependent but is
1787 normally the number of bits in a @code{Pmode} item minus the number of
1788 bits set by @code{high}.
1790 @var{m} should be @code{Pmode}.
1795 @cindex RTL difference
1796 @cindex RTL subtraction
1797 @cindex RTL subtraction with signed saturation
1798 @cindex RTL subtraction with unsigned saturation
1799 @item (minus:@var{m} @var{x} @var{y})
1800 @itemx (ss_minus:@var{m} @var{x} @var{y})
1801 @itemx (us_minus:@var{m} @var{x} @var{y})
1803 These three expressions represent the result of subtracting @var{y}
1804 from @var{x}, carried out in mode @var{M}. Behavior on overflow is
1805 the same as for the three variants of @code{plus} (see above).
1808 @cindex RTL comparison
1809 @item (compare:@var{m} @var{x} @var{y})
1810 Represents the result of subtracting @var{y} from @var{x} for purposes
1811 of comparison. The result is computed without overflow, as if with
1814 Of course, machines can't really subtract with infinite precision.
1815 However, they can pretend to do so when only the sign of the result will
1816 be used, which is the case when the result is stored in the condition
1817 code. And that is the @emph{only} way this kind of expression may
1818 validly be used: as a value to be stored in the condition codes, either
1819 @code{(cc0)} or a register. @xref{Comparisons}.
1821 The mode @var{m} is not related to the modes of @var{x} and @var{y}, but
1822 instead is the mode of the condition code value. If @code{(cc0)} is
1823 used, it is @code{VOIDmode}. Otherwise it is some mode in class
1824 @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m}
1825 is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
1826 information (in an unspecified format) so that any comparison operator
1827 can be applied to the result of the @code{COMPARE} operation. For other
1828 modes in class @code{MODE_CC}, the operation only returns a subset of
1831 Normally, @var{x} and @var{y} must have the same mode. Otherwise,
1832 @code{compare} is valid only if the mode of @var{x} is in class
1833 @code{MODE_INT} and @var{y} is a @code{const_int} or
1834 @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
1835 determines what mode the comparison is to be done in; thus it must not
1838 If one of the operands is a constant, it should be placed in the
1839 second operand and the comparison code adjusted as appropriate.
1841 A @code{compare} specifying two @code{VOIDmode} constants is not valid
1842 since there is no way to know in what mode the comparison is to be
1843 performed; the comparison must either be folded during the compilation
1844 or the first operand must be loaded into a register while its mode is
1848 @item (neg:@var{m} @var{x})
1849 Represents the negation (subtraction from zero) of the value represented
1850 by @var{x}, carried out in mode @var{m}.
1853 @cindex multiplication
1855 @item (mult:@var{m} @var{x} @var{y})
1856 Represents the signed product of the values represented by @var{x} and
1857 @var{y} carried out in machine mode @var{m}.
1859 Some machines support a multiplication that generates a product wider
1860 than the operands. Write the pattern for this as
1863 (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
1866 where @var{m} is wider than the modes of @var{x} and @var{y}, which need
1869 For unsigned widening multiplication, use the same idiom, but with
1870 @code{zero_extend} instead of @code{sign_extend}.
1874 @cindex signed division
1876 @item (div:@var{m} @var{x} @var{y})
1877 Represents the quotient in signed division of @var{x} by @var{y},
1878 carried out in machine mode @var{m}. If @var{m} is a floating point
1879 mode, it represents the exact quotient; otherwise, the integerized
1882 Some machines have division instructions in which the operands and
1883 quotient widths are not all the same; you should represent
1884 such instructions using @code{truncate} and @code{sign_extend} as in,
1887 (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
1891 @cindex unsigned division
1893 @item (udiv:@var{m} @var{x} @var{y})
1894 Like @code{div} but represents unsigned division.
1900 @item (mod:@var{m} @var{x} @var{y})
1901 @itemx (umod:@var{m} @var{x} @var{y})
1902 Like @code{div} and @code{udiv} but represent the remainder instead of
1907 @cindex signed minimum
1908 @cindex signed maximum
1909 @item (smin:@var{m} @var{x} @var{y})
1910 @itemx (smax:@var{m} @var{x} @var{y})
1911 Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
1912 @var{x} and @var{y}, interpreted as signed integers in mode @var{m}.
1916 @cindex unsigned minimum and maximum
1917 @item (umin:@var{m} @var{x} @var{y})
1918 @itemx (umax:@var{m} @var{x} @var{y})
1919 Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
1923 @cindex complement, bitwise
1924 @cindex bitwise complement
1925 @item (not:@var{m} @var{x})
1926 Represents the bitwise complement of the value represented by @var{x},
1927 carried out in mode @var{m}, which must be a fixed-point machine mode.
1930 @cindex logical-and, bitwise
1931 @cindex bitwise logical-and
1932 @item (and:@var{m} @var{x} @var{y})
1933 Represents the bitwise logical-and of the values represented by
1934 @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
1935 a fixed-point machine mode.
1938 @cindex inclusive-or, bitwise
1939 @cindex bitwise inclusive-or
1940 @item (ior:@var{m} @var{x} @var{y})
1941 Represents the bitwise inclusive-or of the values represented by @var{x}
1942 and @var{y}, carried out in machine mode @var{m}, which must be a
1946 @cindex exclusive-or, bitwise
1947 @cindex bitwise exclusive-or
1948 @item (xor:@var{m} @var{x} @var{y})
1949 Represents the bitwise exclusive-or of the values represented by @var{x}
1950 and @var{y}, carried out in machine mode @var{m}, which must be a
1956 @cindex arithmetic shift
1957 @item (ashift:@var{m} @var{x} @var{c})
1958 Represents the result of arithmetically shifting @var{x} left by @var{c}
1959 places. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
1960 be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
1961 mode is determined by the mode called for in the machine description
1962 entry for the left-shift instruction. For example, on the VAX, the mode
1963 of @var{c} is @code{QImode} regardless of @var{m}.
1968 @item (lshiftrt:@var{m} @var{x} @var{c})
1969 @itemx (ashiftrt:@var{m} @var{x} @var{c})
1970 Like @code{ashift} but for right shift. Unlike the case for left shift,
1971 these two operations are distinct.
1977 @cindex right rotate
1978 @item (rotate:@var{m} @var{x} @var{c})
1979 @itemx (rotatert:@var{m} @var{x} @var{c})
1980 Similar but represent left and right rotate. If @var{c} is a constant,
1984 @cindex absolute value
1985 @item (abs:@var{m} @var{x})
1986 Represents the absolute value of @var{x}, computed in mode @var{m}.
1990 @item (sqrt:@var{m} @var{x})
1991 Represents the square root of @var{x}, computed in mode @var{m}.
1992 Most often @var{m} will be a floating point mode.
1995 @item (ffs:@var{m} @var{x})
1996 Represents one plus the index of the least significant 1-bit in
1997 @var{x}, represented as an integer of mode @var{m}. (The value is
1998 zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
1999 depending on the target machine, various mode combinations may be
2003 @item (clz:@var{m} @var{x})
2004 Represents the number of leading 0-bits in @var{x}, represented as an
2005 integer of mode @var{m}, starting at the most significant bit position.
2006 If @var{x} is zero, the value is determined by
2007 @code{CLZ_DEFINED_VALUE_AT_ZERO}. Note that this is one of
2008 the few expressions that is not invariant under widening. The mode of
2009 @var{x} will usually be an integer mode.
2012 @item (ctz:@var{m} @var{x})
2013 Represents the number of trailing 0-bits in @var{x}, represented as an
2014 integer of mode @var{m}, starting at the least significant bit position.
2015 If @var{x} is zero, the value is determined by
2016 @code{CTZ_DEFINED_VALUE_AT_ZERO}. Except for this case,
2017 @code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}. The mode of
2018 @var{x} will usually be an integer mode.
2021 @item (popcount:@var{m} @var{x})
2022 Represents the number of 1-bits in @var{x}, represented as an integer of
2023 mode @var{m}. The mode of @var{x} will usually be an integer mode.
2026 @item (parity:@var{m} @var{x})
2027 Represents the number of 1-bits modulo 2 in @var{x}, represented as an
2028 integer of mode @var{m}. The mode of @var{x} will usually be an integer
2033 @section Comparison Operations
2034 @cindex RTL comparison operations
2036 Comparison operators test a relation on two operands and are considered
2037 to represent a machine-dependent nonzero value described by, but not
2038 necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
2039 if the relation holds, or zero if it does not, for comparison operators
2040 whose results have a `MODE_INT' mode, and
2041 @code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or
2042 zero if it does not, for comparison operators that return floating-point
2043 values. The mode of the comparison operation is independent of the mode
2044 of the data being compared. If the comparison operation is being tested
2045 (e.g., the first operand of an @code{if_then_else}), the mode must be
2048 @cindex condition codes
2049 There are two ways that comparison operations may be used. The
2050 comparison operators may be used to compare the condition codes
2051 @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
2052 a construct actually refers to the result of the preceding instruction
2053 in which the condition codes were set. The instruction setting the
2054 condition code must be adjacent to the instruction using the condition
2055 code; only @code{note} insns may separate them.
2057 Alternatively, a comparison operation may directly compare two data
2058 objects. The mode of the comparison is determined by the operands; they
2059 must both be valid for a common machine mode. A comparison with both
2060 operands constant would be invalid as the machine mode could not be
2061 deduced from it, but such a comparison should never exist in RTL due to
2064 In the example above, if @code{(cc0)} were last set to
2065 @code{(compare @var{x} @var{y})}, the comparison operation is
2066 identical to @code{(eq @var{x} @var{y})}. Usually only one style
2067 of comparisons is supported on a particular machine, but the combine
2068 pass will try to merge the operations to produce the @code{eq} shown
2069 in case it exists in the context of the particular insn involved.
2071 Inequality comparisons come in two flavors, signed and unsigned. Thus,
2072 there are distinct expression codes @code{gt} and @code{gtu} for signed and
2073 unsigned greater-than. These can produce different results for the same
2074 pair of integer values: for example, 1 is signed greater-than @minus{}1 but not
2075 unsigned greater-than, because @minus{}1 when regarded as unsigned is actually
2076 @code{0xffffffff} which is greater than 1.
2078 The signed comparisons are also used for floating point values. Floating
2079 point comparisons are distinguished by the machine modes of the operands.
2084 @item (eq:@var{m} @var{x} @var{y})
2085 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2086 are equal, otherwise 0.
2090 @item (ne:@var{m} @var{x} @var{y})
2091 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2092 are not equal, otherwise 0.
2095 @cindex greater than
2096 @item (gt:@var{m} @var{x} @var{y})
2097 @code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they
2098 are fixed-point, the comparison is done in a signed sense.
2101 @cindex greater than
2102 @cindex unsigned greater than
2103 @item (gtu:@var{m} @var{x} @var{y})
2104 Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
2109 @cindex unsigned less than
2110 @item (lt:@var{m} @var{x} @var{y})
2111 @itemx (ltu:@var{m} @var{x} @var{y})
2112 Like @code{gt} and @code{gtu} but test for ``less than''.
2115 @cindex greater than
2117 @cindex unsigned greater than
2118 @item (ge:@var{m} @var{x} @var{y})
2119 @itemx (geu:@var{m} @var{x} @var{y})
2120 Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
2123 @cindex less than or equal
2125 @cindex unsigned less than
2126 @item (le:@var{m} @var{x} @var{y})
2127 @itemx (leu:@var{m} @var{x} @var{y})
2128 Like @code{gt} and @code{gtu} but test for ``less than or equal''.
2130 @findex if_then_else
2131 @item (if_then_else @var{cond} @var{then} @var{else})
2132 This is not a comparison operation but is listed here because it is
2133 always used in conjunction with a comparison operation. To be
2134 precise, @var{cond} is a comparison expression. This expression
2135 represents a choice, according to @var{cond}, between the value
2136 represented by @var{then} and the one represented by @var{else}.
2138 On most machines, @code{if_then_else} expressions are valid only
2139 to express conditional jumps.
2142 @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
2143 Similar to @code{if_then_else}, but more general. Each of @var{test1},
2144 @var{test2}, @dots{} is performed in turn. The result of this expression is
2145 the @var{value} corresponding to the first nonzero test, or @var{default} if
2146 none of the tests are nonzero expressions.
2148 This is currently not valid for instruction patterns and is supported only
2149 for insn attributes. @xref{Insn Attributes}.
2156 Special expression codes exist to represent bit-field instructions.
2157 These types of expressions are lvalues in RTL; they may appear
2158 on the left side of an assignment, indicating insertion of a value
2159 into the specified bit-field.
2162 @findex sign_extract
2163 @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
2164 @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
2165 This represents a reference to a sign-extended bit-field contained or
2166 starting in @var{loc} (a memory or register reference). The bit-field
2167 is @var{size} bits wide and starts at bit @var{pos}. The compilation
2168 option @code{BITS_BIG_ENDIAN} says which end of the memory unit
2169 @var{pos} counts from.
2171 If @var{loc} is in memory, its mode must be a single-byte integer mode.
2172 If @var{loc} is in a register, the mode to use is specified by the
2173 operand of the @code{insv} or @code{extv} pattern
2174 (@pxref{Standard Names}) and is usually a full-word integer mode,
2175 which is the default if none is specified.
2177 The mode of @var{pos} is machine-specific and is also specified
2178 in the @code{insv} or @code{extv} pattern.
2180 The mode @var{m} is the same as the mode that would be used for
2181 @var{loc} if it were a register.
2183 @findex zero_extract
2184 @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
2185 Like @code{sign_extract} but refers to an unsigned or zero-extended
2186 bit-field. The same sequence of bits are extracted, but they
2187 are filled to an entire word with zeros instead of by sign-extension.
2190 @node Vector Operations
2191 @section Vector Operations
2192 @cindex vector operations
2194 All normal RTL expressions can be used with vector modes; they are
2195 interpreted as operating on each part of the vector independently.
2196 Additionally, there are a few new expressions to describe specific vector
2201 @item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
2202 This describes a merge operation between two vectors. The result is a vector
2203 of mode @var{m}; its elements are selected from either @var{vec1} or
2204 @var{vec2}. Which elements are selected is described by @var{items}, which
2205 is a bit mask represented by a @code{const_int}; a zero bit indicates the
2206 corresponding element in the result vector is taken from @var{vec2} while
2207 a set bit indicates it is taken from @var{vec1}.
2210 @item (vec_select:@var{m} @var{vec1} @var{selection})
2211 This describes an operation that selects parts of a vector. @var{vec1} is
2212 the source vector, @var{selection} is a @code{parallel} that contains a
2213 @code{const_int} for each of the subparts of the result vector, giving the
2214 number of the source subpart that should be stored into it.
2217 @item (vec_concat:@var{m} @var{vec1} @var{vec2})
2218 Describes a vector concat operation. The result is a concatenation of the
2219 vectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of
2222 @findex vec_duplicate
2223 @item (vec_duplicate:@var{m} @var{vec})
2224 This operation converts a small vector into a larger one by duplicating the
2225 input values. The output vector mode must have the same submodes as the
2226 input vector mode, and the number of output parts must be an integer multiple
2227 of the number of input parts.
2232 @section Conversions
2234 @cindex machine mode conversions
2236 All conversions between machine modes must be represented by
2237 explicit conversion operations. For example, an expression
2238 which is the sum of a byte and a full word cannot be written as
2239 @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
2240 operation requires two operands of the same machine mode.
2241 Therefore, the byte-sized operand is enclosed in a conversion
2245 (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
2248 The conversion operation is not a mere placeholder, because there
2249 may be more than one way of converting from a given starting mode
2250 to the desired final mode. The conversion operation code says how
2253 For all conversion operations, @var{x} must not be @code{VOIDmode}
2254 because the mode in which to do the conversion would not be known.
2255 The conversion must either be done at compile-time or @var{x}
2256 must be placed into a register.
2260 @item (sign_extend:@var{m} @var{x})
2261 Represents the result of sign-extending the value @var{x}
2262 to machine mode @var{m}. @var{m} must be a fixed-point mode
2263 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2266 @item (zero_extend:@var{m} @var{x})
2267 Represents the result of zero-extending the value @var{x}
2268 to machine mode @var{m}. @var{m} must be a fixed-point mode
2269 and @var{x} a fixed-point value of a mode narrower than @var{m}.
2271 @findex float_extend
2272 @item (float_extend:@var{m} @var{x})
2273 Represents the result of extending the value @var{x}
2274 to machine mode @var{m}. @var{m} must be a floating point mode
2275 and @var{x} a floating point value of a mode narrower than @var{m}.
2278 @item (truncate:@var{m} @var{x})
2279 Represents the result of truncating the value @var{x}
2280 to machine mode @var{m}. @var{m} must be a fixed-point mode
2281 and @var{x} a fixed-point value of a mode wider than @var{m}.
2284 @item (ss_truncate:@var{m} @var{x})
2285 Represents the result of truncating the value @var{x}
2286 to machine mode @var{m}, using signed saturation in the case of
2287 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2291 @item (us_truncate:@var{m} @var{x})
2292 Represents the result of truncating the value @var{x}
2293 to machine mode @var{m}, using unsigned saturation in the case of
2294 overflow. Both @var{m} and the mode of @var{x} must be fixed-point
2297 @findex float_truncate
2298 @item (float_truncate:@var{m} @var{x})
2299 Represents the result of truncating the value @var{x}
2300 to machine mode @var{m}. @var{m} must be a floating point mode
2301 and @var{x} a floating point value of a mode wider than @var{m}.
2304 @item (float:@var{m} @var{x})
2305 Represents the result of converting fixed point value @var{x},
2306 regarded as signed, to floating point mode @var{m}.
2308 @findex unsigned_float
2309 @item (unsigned_float:@var{m} @var{x})
2310 Represents the result of converting fixed point value @var{x},
2311 regarded as unsigned, to floating point mode @var{m}.
2314 @item (fix:@var{m} @var{x})
2315 When @var{m} is a fixed point mode, represents the result of
2316 converting floating point value @var{x} to mode @var{m}, regarded as
2317 signed. How rounding is done is not specified, so this operation may
2318 be used validly in compiling C code only for integer-valued operands.
2320 @findex unsigned_fix
2321 @item (unsigned_fix:@var{m} @var{x})
2322 Represents the result of converting floating point value @var{x} to
2323 fixed point mode @var{m}, regarded as unsigned. How rounding is done
2327 @item (fix:@var{m} @var{x})
2328 When @var{m} is a floating point mode, represents the result of
2329 converting floating point value @var{x} (valid for mode @var{m}) to an
2330 integer, still represented in floating point mode @var{m}, by rounding
2334 @node RTL Declarations
2335 @section Declarations
2336 @cindex RTL declarations
2337 @cindex declarations, RTL
2339 Declaration expression codes do not represent arithmetic operations
2340 but rather state assertions about their operands.
2343 @findex strict_low_part
2344 @cindex @code{subreg}, in @code{strict_low_part}
2345 @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
2346 This expression code is used in only one context: as the destination operand of a
2347 @code{set} expression. In addition, the operand of this expression
2348 must be a non-paradoxical @code{subreg} expression.
2350 The presence of @code{strict_low_part} says that the part of the
2351 register which is meaningful in mode @var{n}, but is not part of
2352 mode @var{m}, is not to be altered. Normally, an assignment to such
2353 a subreg is allowed to have undefined effects on the rest of the
2354 register when @var{m} is less than a word.
2358 @section Side Effect Expressions
2359 @cindex RTL side effect expressions
2361 The expression codes described so far represent values, not actions.
2362 But machine instructions never produce values; they are meaningful
2363 only for their side effects on the state of the machine. Special
2364 expression codes are used to represent side effects.
2366 The body of an instruction is always one of these side effect codes;
2367 the codes described above, which represent values, appear only as
2368 the operands of these.
2372 @item (set @var{lval} @var{x})
2373 Represents the action of storing the value of @var{x} into the place
2374 represented by @var{lval}. @var{lval} must be an expression
2375 representing a place that can be stored in: @code{reg} (or @code{subreg},
2376 @code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc},
2377 @code{parallel}, or @code{cc0}.
2379 If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
2380 machine mode; then @var{x} must be valid for that mode.
2382 If @var{lval} is a @code{reg} whose machine mode is less than the full
2383 width of the register, then it means that the part of the register
2384 specified by the machine mode is given the specified value and the
2385 rest of the register receives an undefined value. Likewise, if
2386 @var{lval} is a @code{subreg} whose machine mode is narrower than
2387 the mode of the register, the rest of the register can be changed in
2390 If @var{lval} is a @code{strict_low_part} or @code{zero_extract}
2391 of a @code{subreg}, then the part of the register specified by the
2392 machine mode of the @code{subreg} is given the value @var{x} and
2393 the rest of the register is not changed.
2395 If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
2396 be either a @code{compare} expression or a value that may have any mode.
2397 The latter case represents a ``test'' instruction. The expression
2398 @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
2399 @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
2400 Use the former expression to save space during the compilation.
2402 If @var{lval} is a @code{parallel}, it is used to represent the case of
2403 a function returning a structure in multiple registers. Each element
2404 of the @code{parallel} is an @code{expr_list} whose first operand is a
2405 @code{reg} and whose second operand is a @code{const_int} representing the
2406 offset (in bytes) into the structure at which the data in that register
2407 corresponds. The first element may be null to indicate that the structure
2408 is also passed partly in memory.
2410 @cindex jump instructions and @code{set}
2411 @cindex @code{if_then_else} usage
2412 If @var{lval} is @code{(pc)}, we have a jump instruction, and the
2413 possibilities for @var{x} are very limited. It may be a
2414 @code{label_ref} expression (unconditional jump). It may be an
2415 @code{if_then_else} (conditional jump), in which case either the
2416 second or the third operand must be @code{(pc)} (for the case which
2417 does not jump) and the other of the two must be a @code{label_ref}
2418 (for the case which does jump). @var{x} may also be a @code{mem} or
2419 @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
2420 @code{mem}; these unusual patterns are used to represent jumps through
2423 If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
2424 @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
2425 valid for the mode of @var{lval}.
2429 @var{lval} is customarily accessed with the @code{SET_DEST} macro and
2430 @var{x} with the @code{SET_SRC} macro.
2434 As the sole expression in a pattern, represents a return from the
2435 current function, on machines where this can be done with one
2436 instruction, such as VAXen. On machines where a multi-instruction
2437 ``epilogue'' must be executed in order to return from the function,
2438 returning is done by jumping to a label which precedes the epilogue, and
2439 the @code{return} expression code is never used.
2441 Inside an @code{if_then_else} expression, represents the value to be
2442 placed in @code{pc} to return to the caller.
2444 Note that an insn pattern of @code{(return)} is logically equivalent to
2445 @code{(set (pc) (return))}, but the latter form is never used.
2448 @item (call @var{function} @var{nargs})
2449 Represents a function call. @var{function} is a @code{mem} expression
2450 whose address is the address of the function to be called.
2451 @var{nargs} is an expression which can be used for two purposes: on
2452 some machines it represents the number of bytes of stack argument; on
2453 others, it represents the number of argument registers.
2455 Each machine has a standard machine mode which @var{function} must
2456 have. The machine description defines macro @code{FUNCTION_MODE} to
2457 expand into the requisite mode name. The purpose of this mode is to
2458 specify what kind of addressing is allowed, on machines where the
2459 allowed kinds of addressing depend on the machine mode being
2463 @item (clobber @var{x})
2464 Represents the storing or possible storing of an unpredictable,
2465 undescribed value into @var{x}, which must be a @code{reg},
2466 @code{scratch}, @code{parallel} or @code{mem} expression.
2468 One place this is used is in string instructions that store standard
2469 values into particular hard registers. It may not be worth the
2470 trouble to describe the values that are stored, but it is essential to
2471 inform the compiler that the registers will be altered, lest it
2472 attempt to keep data in them across the string instruction.
2474 If @var{x} is @code{(mem:BLK (const_int 0))} or
2475 @code{(mem:BLK (scratch))}, it means that all memory
2476 locations must be presumed clobbered. If @var{x} is a @code{parallel},
2477 it has the same meaning as a @code{parallel} in a @code{set} expression.
2479 Note that the machine description classifies certain hard registers as
2480 ``call-clobbered''. All function call instructions are assumed by
2481 default to clobber these registers, so there is no need to use
2482 @code{clobber} expressions to indicate this fact. Also, each function
2483 call is assumed to have the potential to alter any memory location,
2484 unless the function is declared @code{const}.
2486 If the last group of expressions in a @code{parallel} are each a
2487 @code{clobber} expression whose arguments are @code{reg} or
2488 @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
2489 phase can add the appropriate @code{clobber} expressions to an insn it
2490 has constructed when doing so will cause a pattern to be matched.
2492 This feature can be used, for example, on a machine that whose multiply
2493 and add instructions don't use an MQ register but which has an
2494 add-accumulate instruction that does clobber the MQ register. Similarly,
2495 a combined instruction might require a temporary register while the
2496 constituent instructions might not.
2498 When a @code{clobber} expression for a register appears inside a
2499 @code{parallel} with other side effects, the register allocator
2500 guarantees that the register is unoccupied both before and after that
2501 insn. However, the reload phase may allocate a register used for one of
2502 the inputs unless the @samp{&} constraint is specified for the selected
2503 alternative (@pxref{Modifiers}). You can clobber either a specific hard
2504 register, a pseudo register, or a @code{scratch} expression; in the
2505 latter two cases, GCC will allocate a hard register that is available
2506 there for use as a temporary.
2508 For instructions that require a temporary register, you should use
2509 @code{scratch} instead of a pseudo-register because this will allow the
2510 combiner phase to add the @code{clobber} when required. You do this by
2511 coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
2512 clobber a pseudo register, use one which appears nowhere else---generate
2513 a new one each time. Otherwise, you may confuse CSE@.
2515 There is one other known use for clobbering a pseudo register in a
2516 @code{parallel}: when one of the input operands of the insn is also
2517 clobbered by the insn. In this case, using the same pseudo register in
2518 the clobber and elsewhere in the insn produces the expected results.
2522 Represents the use of the value of @var{x}. It indicates that the
2523 value in @var{x} at this point in the program is needed, even though
2524 it may not be apparent why this is so. Therefore, the compiler will
2525 not attempt to delete previous instructions whose only effect is to
2526 store a value in @var{x}. @var{x} must be a @code{reg} expression.
2528 In some situations, it may be tempting to add a @code{use} of a
2529 register in a @code{parallel} to describe a situation where the value
2530 of a special register will modify the behavior of the instruction.
2531 An hypothetical example might be a pattern for an addition that can
2532 either wrap around or use saturating addition depending on the value
2533 of a special control register:
2536 (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
2543 This will not work, several of the optimizers only look at expressions
2544 locally; it is very likely that if you have multiple insns with
2545 identical inputs to the @code{unspec}, they will be optimized away even
2546 if register 1 changes in between.
2548 This means that @code{use} can @emph{only} be used to describe
2549 that the register is live. You should think twice before adding
2550 @code{use} statements, more often you will want to use @code{unspec}
2551 instead. The @code{use} RTX is most commonly useful to describe that
2552 a fixed register is implicitly used in an insn. It is also safe to use
2553 in patterns where the compiler knows for other reasons that the result
2554 of the whole pattern is variable, such as @samp{movmem@var{m}} or
2555 @samp{call} patterns.
2557 During the reload phase, an insn that has a @code{use} as pattern
2558 can carry a reg_equal note. These @code{use} insns will be deleted
2559 before the reload phase exits.
2561 During the delayed branch scheduling phase, @var{x} may be an insn.
2562 This indicates that @var{x} previously was located at this place in the
2563 code and its data dependencies need to be taken into account. These
2564 @code{use} insns will be deleted before the delayed branch scheduling
2568 @item (parallel [@var{x0} @var{x1} @dots{}])
2569 Represents several side effects performed in parallel. The square
2570 brackets stand for a vector; the operand of @code{parallel} is a
2571 vector of expressions. @var{x0}, @var{x1} and so on are individual
2572 side effect expressions---expressions of code @code{set}, @code{call},
2573 @code{return}, @code{clobber} or @code{use}.
2575 ``In parallel'' means that first all the values used in the individual
2576 side-effects are computed, and second all the actual side-effects are
2577 performed. For example,
2580 (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
2581 (set (mem:SI (reg:SI 1)) (reg:SI 1))])
2585 says unambiguously that the values of hard register 1 and the memory
2586 location addressed by it are interchanged. In both places where
2587 @code{(reg:SI 1)} appears as a memory address it refers to the value
2588 in register 1 @emph{before} the execution of the insn.
2590 It follows that it is @emph{incorrect} to use @code{parallel} and
2591 expect the result of one @code{set} to be available for the next one.
2592 For example, people sometimes attempt to represent a jump-if-zero
2593 instruction this way:
2596 (parallel [(set (cc0) (reg:SI 34))
2597 (set (pc) (if_then_else
2598 (eq (cc0) (const_int 0))
2604 But this is incorrect, because it says that the jump condition depends
2605 on the condition code value @emph{before} this instruction, not on the
2606 new value that is set by this instruction.
2608 @cindex peephole optimization, RTL representation
2609 Peephole optimization, which takes place together with final assembly
2610 code output, can produce insns whose patterns consist of a @code{parallel}
2611 whose elements are the operands needed to output the resulting
2612 assembler code---often @code{reg}, @code{mem} or constant expressions.
2613 This would not be well-formed RTL at any other stage in compilation,
2614 but it is ok then because no further optimization remains to be done.
2615 However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
2616 any, must deal with such insns if you define any peephole optimizations.
2619 @item (cond_exec [@var{cond} @var{expr}])
2620 Represents a conditionally executed expression. The @var{expr} is
2621 executed only if the @var{cond} is nonzero. The @var{cond} expression
2622 must not have side-effects, but the @var{expr} may very well have
2626 @item (sequence [@var{insns} @dots{}])
2627 Represents a sequence of insns. Each of the @var{insns} that appears
2628 in the vector is suitable for appearing in the chain of insns, so it
2629 must be an @code{insn}, @code{jump_insn}, @code{call_insn},
2630 @code{code_label}, @code{barrier} or @code{note}.
2632 A @code{sequence} RTX is never placed in an actual insn during RTL
2633 generation. It represents the sequence of insns that result from a
2634 @code{define_expand} @emph{before} those insns are passed to
2635 @code{emit_insn} to insert them in the chain of insns. When actually
2636 inserted, the individual sub-insns are separated out and the
2637 @code{sequence} is forgotten.
2639 After delay-slot scheduling is completed, an insn and all the insns that
2640 reside in its delay slots are grouped together into a @code{sequence}.
2641 The insn requiring the delay slot is the first insn in the vector;
2642 subsequent insns are to be placed in the delay slot.
2644 @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
2645 indicate that a branch insn should be used that will conditionally annul
2646 the effect of the insns in the delay slots. In such a case,
2647 @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
2648 the branch and should be executed only if the branch is taken; otherwise
2649 the insn should be executed only if the branch is not taken.
2653 These expression codes appear in place of a side effect, as the body of
2654 an insn, though strictly speaking they do not always describe side
2659 @item (asm_input @var{s})
2660 Represents literal assembler code as described by the string @var{s}.
2663 @findex unspec_volatile
2664 @item (unspec [@var{operands} @dots{}] @var{index})
2665 @itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
2666 Represents a machine-specific operation on @var{operands}. @var{index}
2667 selects between multiple machine-specific operations.
2668 @code{unspec_volatile} is used for volatile operations and operations
2669 that may trap; @code{unspec} is used for other operations.
2671 These codes may appear inside a @code{pattern} of an
2672 insn, inside a @code{parallel}, or inside an expression.
2675 @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
2676 Represents a table of jump addresses. The vector elements @var{lr0},
2677 etc., are @code{label_ref} expressions. The mode @var{m} specifies
2678 how much space is given to each address; normally @var{m} would be
2681 @findex addr_diff_vec
2682 @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
2683 Represents a table of jump addresses expressed as offsets from
2684 @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
2685 expressions and so is @var{base}. The mode @var{m} specifies how much
2686 space is given to each address-difference. @var{min} and @var{max}
2687 are set up by branch shortening and hold a label with a minimum and a
2688 maximum address, respectively. @var{flags} indicates the relative
2689 position of @var{base}, @var{min} and @var{max} to the containing insn
2690 and of @var{min} and @var{max} to @var{base}. See rtl.def for details.
2693 @item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
2694 Represents prefetch of memory at address @var{addr}.
2695 Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
2696 targets that do not support write prefetches should treat this as a normal
2698 Operand @var{locality} specifies the amount of temporal locality; 0 if there
2699 is none or 1, 2, or 3 for increasing levels of temporal locality;
2700 targets that do not support locality hints should ignore this.
2702 This insn is used to minimize cache-miss latency by moving data into a
2703 cache before it is accessed. It should use only non-faulting data prefetch
2708 @section Embedded Side-Effects on Addresses
2709 @cindex RTL preincrement
2710 @cindex RTL postincrement
2711 @cindex RTL predecrement
2712 @cindex RTL postdecrement
2714 Six special side-effect expression codes appear as memory addresses.
2718 @item (pre_dec:@var{m} @var{x})
2719 Represents the side effect of decrementing @var{x} by a standard
2720 amount and represents also the value that @var{x} has after being
2721 decremented. @var{x} must be a @code{reg} or @code{mem}, but most
2722 machines allow only a @code{reg}. @var{m} must be the machine mode
2723 for pointers on the machine in use. The amount @var{x} is decremented
2724 by is the length in bytes of the machine mode of the containing memory
2725 reference of which this expression serves as the address. Here is an
2729 (mem:DF (pre_dec:SI (reg:SI 39)))
2733 This says to decrement pseudo register 39 by the length of a @code{DFmode}
2734 value and use the result to address a @code{DFmode} value.
2737 @item (pre_inc:@var{m} @var{x})
2738 Similar, but specifies incrementing @var{x} instead of decrementing it.
2741 @item (post_dec:@var{m} @var{x})
2742 Represents the same side effect as @code{pre_dec} but a different
2743 value. The value represented here is the value @var{x} has @i{before}
2747 @item (post_inc:@var{m} @var{x})
2748 Similar, but specifies incrementing @var{x} instead of decrementing it.
2751 @item (post_modify:@var{m} @var{x} @var{y})
2753 Represents the side effect of setting @var{x} to @var{y} and
2754 represents @var{x} before @var{x} is modified. @var{x} must be a
2755 @code{reg} or @code{mem}, but most machines allow only a @code{reg}.
2756 @var{m} must be the machine mode for pointers on the machine in use.
2758 The expression @var{y} must be one of three forms:
2760 @code{(plus:@var{m} @var{x} @var{z})},
2761 @code{(minus:@var{m} @var{x} @var{z})}, or
2762 @code{(plus:@var{m} @var{x} @var{i})},
2764 where @var{z} is an index register and @var{i} is a constant.
2766 Here is an example of its use:
2769 (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
2773 This says to modify pseudo register 42 by adding the contents of pseudo
2774 register 48 to it, after the use of what ever 42 points to.
2777 @item (pre_modify:@var{m} @var{x} @var{expr})
2778 Similar except side effects happen before the use.
2781 These embedded side effect expressions must be used with care. Instruction
2782 patterns may not use them. Until the @samp{flow} pass of the compiler,
2783 they may occur only to represent pushes onto the stack. The @samp{flow}
2784 pass finds cases where registers are incremented or decremented in one
2785 instruction and used as an address shortly before or after; these cases are
2786 then transformed to use pre- or post-increment or -decrement.
2788 If a register used as the operand of these expressions is used in
2789 another address in an insn, the original value of the register is used.
2790 Uses of the register outside of an address are not permitted within the
2791 same insn as a use in an embedded side effect expression because such
2792 insns behave differently on different machines and hence must be treated
2793 as ambiguous and disallowed.
2795 An instruction that can be represented with an embedded side effect
2796 could also be represented using @code{parallel} containing an additional
2797 @code{set} to describe how the address register is altered. This is not
2798 done because machines that allow these operations at all typically
2799 allow them wherever a memory address is called for. Describing them as
2800 additional parallel stores would require doubling the number of entries
2801 in the machine description.
2804 @section Assembler Instructions as Expressions
2805 @cindex assembler instructions in RTL
2807 @cindex @code{asm_operands}, usage
2808 The RTX code @code{asm_operands} represents a value produced by a
2809 user-specified assembler instruction. It is used to represent
2810 an @code{asm} statement with arguments. An @code{asm} statement with
2811 a single output operand, like this:
2814 asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
2818 is represented using a single @code{asm_operands} RTX which represents
2819 the value that is stored in @code{outputvar}:
2822 (set @var{rtx-for-outputvar}
2823 (asm_operands "foo %1,%2,%0" "a" 0
2824 [@var{rtx-for-addition-result} @var{rtx-for-*z}]
2825 [(asm_input:@var{m1} "g")
2826 (asm_input:@var{m2} "di")]))
2830 Here the operands of the @code{asm_operands} RTX are the assembler
2831 template string, the output-operand's constraint, the index-number of the
2832 output operand among the output operands specified, a vector of input
2833 operand RTX's, and a vector of input-operand modes and constraints. The
2834 mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
2837 When an @code{asm} statement has multiple output values, its insn has
2838 several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
2839 contains a @code{asm_operands}; all of these share the same assembler
2840 template and vectors, but each contains the constraint for the respective
2841 output operand. They are also distinguished by the output-operand index
2842 number, which is 0, 1, @dots{} for successive output operands.
2848 The RTL representation of the code for a function is a doubly-linked
2849 chain of objects called @dfn{insns}. Insns are expressions with
2850 special codes that are used for no other purpose. Some insns are
2851 actual instructions; others represent dispatch tables for @code{switch}
2852 statements; others represent labels to jump to or various sorts of
2853 declarative information.
2855 In addition to its own specific data, each insn must have a unique
2856 id-number that distinguishes it from all other insns in the current
2857 function (after delayed branch scheduling, copies of an insn with the
2858 same id-number may be present in multiple places in a function, but
2859 these copies will always be identical and will only appear inside a
2860 @code{sequence}), and chain pointers to the preceding and following
2861 insns. These three fields occupy the same position in every insn,
2862 independent of the expression code of the insn. They could be accessed
2863 with @code{XEXP} and @code{XINT}, but instead three special macros are
2868 @item INSN_UID (@var{i})
2869 Accesses the unique id of insn @var{i}.
2872 @item PREV_INSN (@var{i})
2873 Accesses the chain pointer to the insn preceding @var{i}.
2874 If @var{i} is the first insn, this is a null pointer.
2877 @item NEXT_INSN (@var{i})
2878 Accesses the chain pointer to the insn following @var{i}.
2879 If @var{i} is the last insn, this is a null pointer.
2883 @findex get_last_insn
2884 The first insn in the chain is obtained by calling @code{get_insns}; the
2885 last insn is the result of calling @code{get_last_insn}. Within the
2886 chain delimited by these insns, the @code{NEXT_INSN} and
2887 @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
2891 NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
2895 is always true and if @var{insn} is not the last insn,
2898 PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
2904 After delay slot scheduling, some of the insns in the chain might be
2905 @code{sequence} expressions, which contain a vector of insns. The value
2906 of @code{NEXT_INSN} in all but the last of these insns is the next insn
2907 in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
2908 is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
2909 which it is contained. Similar rules apply for @code{PREV_INSN}.
2911 This means that the above invariants are not necessarily true for insns
2912 inside @code{sequence} expressions. Specifically, if @var{insn} is the
2913 first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
2914 is the insn containing the @code{sequence} expression, as is the value
2915 of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
2916 insn in the @code{sequence} expression. You can use these expressions
2917 to find the containing @code{sequence} expression.
2919 Every insn has one of the following six expression codes:
2924 The expression code @code{insn} is used for instructions that do not jump
2925 and do not do function calls. @code{sequence} expressions are always
2926 contained in insns with code @code{insn} even if one of those insns
2927 should jump or do function calls.
2929 Insns with code @code{insn} have four additional fields beyond the three
2930 mandatory ones listed above. These four are described in a table below.
2934 The expression code @code{jump_insn} is used for instructions that may
2935 jump (or, more generally, may contain @code{label_ref} expressions). If
2936 there is an instruction to return from the current function, it is
2937 recorded as a @code{jump_insn}.
2940 @code{jump_insn} insns have the same extra fields as @code{insn} insns,
2941 accessed in the same way and in addition contain a field
2942 @code{JUMP_LABEL} which is defined once jump optimization has completed.
2944 For simple conditional and unconditional jumps, this field contains
2945 the @code{code_label} to which this insn will (possibly conditionally)
2946 branch. In a more complex jump, @code{JUMP_LABEL} records one of the
2947 labels that the insn refers to; the only way to find the others is to
2948 scan the entire body of the insn. In an @code{addr_vec},
2949 @code{JUMP_LABEL} is @code{NULL_RTX}.
2951 Return insns count as jumps, but since they do not refer to any
2952 labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
2956 The expression code @code{call_insn} is used for instructions that may do
2957 function calls. It is important to distinguish these instructions because
2958 they imply that certain registers and memory locations may be altered
2961 @findex CALL_INSN_FUNCTION_USAGE
2962 @code{call_insn} insns have the same extra fields as @code{insn} insns,
2963 accessed in the same way and in addition contain a field
2964 @code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
2965 @code{expr_list} expressions) containing @code{use} and @code{clobber}
2966 expressions that denote hard registers and @code{MEM}s used or
2967 clobbered by the called function.
2969 A @code{MEM} generally points to a stack slots in which arguments passed
2970 to the libcall by reference (@pxref{Register Arguments,
2971 FUNCTION_ARG_PASS_BY_REFERENCE}) are stored. If the argument is
2972 caller-copied (@pxref{Register Arguments, FUNCTION_ARG_CALLEE_COPIES}),
2973 the stack slot will be mentioned in @code{CLOBBER} and @code{USE}
2974 entries; if it's callee-copied, only a @code{USE} will appear, and the
2975 @code{MEM} may point to addresses that are not stack slots. These
2976 @code{MEM}s are used only in libcalls, because, unlike regular function
2977 calls, @code{CONST_CALL}s (which libcalls generally are, @pxref{Flags,
2978 CONST_CALL_P}) aren't assumed to read and write all memory, so flow
2979 would consider the stores dead and remove them. Note that, since a
2980 libcall must never return values in memory (@pxref{Aggregate Return,
2981 RETURN_IN_MEMORY}), there will never be a @code{CLOBBER} for a memory
2982 address holding a return value.
2984 @code{CLOBBER}ed registers in this list augment registers specified in
2985 @code{CALL_USED_REGISTERS} (@pxref{Register Basics}).
2988 @findex CODE_LABEL_NUMBER
2990 A @code{code_label} insn represents a label that a jump insn can jump
2991 to. It contains two special fields of data in addition to the three
2992 standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
2993 number}, a number that identifies this label uniquely among all the
2994 labels in the compilation (not just in the current function).
2995 Ultimately, the label is represented in the assembler output as an
2996 assembler label, usually of the form @samp{L@var{n}} where @var{n} is
2999 When a @code{code_label} appears in an RTL expression, it normally
3000 appears within a @code{label_ref} which represents the address of
3001 the label, as a number.
3003 Besides as a @code{code_label}, a label can also be represented as a
3004 @code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
3007 The field @code{LABEL_NUSES} is only defined once the jump optimization
3008 phase is completed. It contains the number of times this label is
3009 referenced in the current function.
3012 @findex SET_LABEL_KIND
3013 @findex LABEL_ALT_ENTRY_P
3014 @cindex alternate entry points
3015 The field @code{LABEL_KIND} differentiates four different types of
3016 labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY},
3017 @code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}. The only labels
3018 that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry
3019 points} to the current function. These may be static (visible only in
3020 the containing translation unit), global (exposed to all translation
3021 units), or weak (global, but can be overridden by another symbol with the
3024 Much of the compiler treats all four kinds of label identically. Some
3025 of it needs to know whether or not a label is an alternate entry point;
3026 for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided. It is
3027 equivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}.
3028 The only place that cares about the distinction between static, global,
3029 and weak alternate entry points, besides the front-end code that creates
3030 them, is the function @code{output_alternate_entry_point}, in
3033 To set the kind of a label, use the @code{SET_LABEL_KIND} macro.
3037 Barriers are placed in the instruction stream when control cannot flow
3038 past them. They are placed after unconditional jump instructions to
3039 indicate that the jumps are unconditional and after calls to
3040 @code{volatile} functions, which do not return (e.g., @code{exit}).
3041 They contain no information beyond the three standard fields.
3044 @findex NOTE_LINE_NUMBER
3045 @findex NOTE_SOURCE_FILE
3047 @code{note} insns are used to represent additional debugging and
3048 declarative information. They contain two nonstandard fields, an
3049 integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
3050 string accessed with @code{NOTE_SOURCE_FILE}.
3052 If @code{NOTE_LINE_NUMBER} is positive, the note represents the
3053 position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
3054 that the line came from. These notes control generation of line
3055 number data in the assembler output.
3057 Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
3058 code with one of the following values (and @code{NOTE_SOURCE_FILE}
3059 must contain a null pointer):
3062 @findex NOTE_INSN_DELETED
3063 @item NOTE_INSN_DELETED
3064 Such a note is completely ignorable. Some passes of the compiler
3065 delete insns by altering them into notes of this kind.
3067 @findex NOTE_INSN_DELETED_LABEL
3068 @item NOTE_INSN_DELETED_LABEL
3069 This marks what used to be a @code{code_label}, but was not used for other
3070 purposes than taking its address and was transformed to mark that no
3073 @findex NOTE_INSN_BLOCK_BEG
3074 @findex NOTE_INSN_BLOCK_END
3075 @item NOTE_INSN_BLOCK_BEG
3076 @itemx NOTE_INSN_BLOCK_END
3077 These types of notes indicate the position of the beginning and end
3078 of a level of scoping of variable names. They control the output
3079 of debugging information.
3081 @findex NOTE_INSN_EH_REGION_BEG
3082 @findex NOTE_INSN_EH_REGION_END
3083 @item NOTE_INSN_EH_REGION_BEG
3084 @itemx NOTE_INSN_EH_REGION_END
3085 These types of notes indicate the position of the beginning and end of a
3086 level of scoping for exception handling. @code{NOTE_BLOCK_NUMBER}
3087 identifies which @code{CODE_LABEL} or @code{note} of type
3088 @code{NOTE_INSN_DELETED_LABEL} is associated with the given region.
3090 @findex NOTE_INSN_LOOP_BEG
3091 @findex NOTE_INSN_LOOP_END
3092 @item NOTE_INSN_LOOP_BEG
3093 @itemx NOTE_INSN_LOOP_END
3094 These types of notes indicate the position of the beginning and end
3095 of a @code{while} or @code{for} loop. They enable the loop optimizer
3096 to find loops quickly.
3098 @findex NOTE_INSN_LOOP_CONT
3099 @item NOTE_INSN_LOOP_CONT
3100 Appears at the place in a loop that @code{continue} statements jump to.
3102 @findex NOTE_INSN_LOOP_VTOP
3103 @item NOTE_INSN_LOOP_VTOP
3104 This note indicates the place in a loop where the exit test begins for
3105 those loops in which the exit test has been duplicated. This position
3106 becomes another virtual start of the loop when considering loop
3109 @findex NOTE_INSN_FUNCTION_END
3110 @item NOTE_INSN_FUNCTION_END
3111 Appears near the end of the function body, just before the label that
3112 @code{return} statements jump to (on machine where a single instruction
3113 does not suffice for returning). This note may be deleted by jump
3116 @findex NOTE_INSN_SETJMP
3117 @item NOTE_INSN_SETJMP
3118 Appears following each call to @code{setjmp} or a related function.
3121 These codes are printed symbolically when they appear in debugging dumps.
3124 @cindex @code{TImode}, in @code{insn}
3125 @cindex @code{HImode}, in @code{insn}
3126 @cindex @code{QImode}, in @code{insn}
3127 The machine mode of an insn is normally @code{VOIDmode}, but some
3128 phases use the mode for various purposes.
3130 The common subexpression elimination pass sets the mode of an insn to
3131 @code{QImode} when it is the first insn in a block that has already
3134 The second Haifa scheduling pass, for targets that can multiple issue,
3135 sets the mode of an insn to @code{TImode} when it is believed that the
3136 instruction begins an issue group. That is, when the instruction
3137 cannot issue simultaneously with the previous. This may be relied on
3138 by later passes, in particular machine-dependent reorg.
3140 Here is a table of the extra fields of @code{insn}, @code{jump_insn}
3141 and @code{call_insn} insns:
3145 @item PATTERN (@var{i})
3146 An expression for the side effect performed by this insn. This must be
3147 one of the following codes: @code{set}, @code{call}, @code{use},
3148 @code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
3149 @code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
3150 @code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a @code{parallel},
3151 each element of the @code{parallel} must be one these codes, except that
3152 @code{parallel} expressions cannot be nested and @code{addr_vec} and
3153 @code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
3156 @item INSN_CODE (@var{i})
3157 An integer that says which pattern in the machine description matches
3158 this insn, or @minus{}1 if the matching has not yet been attempted.
3160 Such matching is never attempted and this field remains @minus{}1 on an insn
3161 whose pattern consists of a single @code{use}, @code{clobber},
3162 @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
3164 @findex asm_noperands
3165 Matching is also never attempted on insns that result from an @code{asm}
3166 statement. These contain at least one @code{asm_operands} expression.
3167 The function @code{asm_noperands} returns a non-negative value for
3170 In the debugging output, this field is printed as a number followed by
3171 a symbolic representation that locates the pattern in the @file{md}
3172 file as some small positive or negative offset from a named pattern.
3175 @item LOG_LINKS (@var{i})
3176 A list (chain of @code{insn_list} expressions) giving information about
3177 dependencies between instructions within a basic block. Neither a jump
3178 nor a label may come between the related insns.
3181 @item REG_NOTES (@var{i})
3182 A list (chain of @code{expr_list} and @code{insn_list} expressions)
3183 giving miscellaneous information about the insn. It is often
3184 information pertaining to the registers used in this insn.
3187 The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
3188 expressions. Each of these has two operands: the first is an insn,
3189 and the second is another @code{insn_list} expression (the next one in
3190 the chain). The last @code{insn_list} in the chain has a null pointer
3191 as second operand. The significant thing about the chain is which
3192 insns appear in it (as first operands of @code{insn_list}
3193 expressions). Their order is not significant.
3195 This list is originally set up by the flow analysis pass; it is a null
3196 pointer until then. Flow only adds links for those data dependencies
3197 which can be used for instruction combination. For each insn, the flow
3198 analysis pass adds a link to insns which store into registers values
3199 that are used for the first time in this insn. The instruction
3200 scheduling pass adds extra links so that every dependence will be
3201 represented. Links represent data dependencies, antidependencies and
3202 output dependencies; the machine mode of the link distinguishes these
3203 three types: antidependencies have mode @code{REG_DEP_ANTI}, output
3204 dependencies have mode @code{REG_DEP_OUTPUT}, and data dependencies have
3205 mode @code{VOIDmode}.
3207 The @code{REG_NOTES} field of an insn is a chain similar to the
3208 @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
3209 addition to @code{insn_list} expressions. There are several kinds of
3210 register notes, which are distinguished by the machine mode, which in a
3211 register note is really understood as being an @code{enum reg_note}.
3212 The first operand @var{op} of the note is data whose meaning depends on
3215 @findex REG_NOTE_KIND
3216 @findex PUT_REG_NOTE_KIND
3217 The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
3218 register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
3219 (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
3222 Register notes are of three classes: They may say something about an
3223 input to an insn, they may say something about an output of an insn, or
3224 they may create a linkage between two insns. There are also a set
3225 of values that are only used in @code{LOG_LINKS}.
3227 These register notes annotate inputs to an insn:
3232 The value in @var{op} dies in this insn; that is to say, altering the
3233 value immediately after this insn would not affect the future behavior
3236 It does not follow that the register @var{op} has no useful value after
3237 this insn since @var{op} is not necessarily modified by this insn.
3238 Rather, no subsequent instruction uses the contents of @var{op}.
3242 The register @var{op} being set by this insn will not be used in a
3243 subsequent insn. This differs from a @code{REG_DEAD} note, which
3244 indicates that the value in an input will not be used subsequently.
3245 These two notes are independent; both may be present for the same
3250 The register @var{op} is incremented (or decremented; at this level
3251 there is no distinction) by an embedded side effect inside this insn.
3252 This means it appears in a @code{post_inc}, @code{pre_inc},
3253 @code{post_dec} or @code{pre_dec} expression.
3257 The register @var{op} is known to have a nonnegative value when this
3258 insn is reached. This is used so that decrement and branch until zero
3259 instructions, such as the m68k dbra, can be matched.
3261 The @code{REG_NONNEG} note is added to insns only if the machine
3262 description has a @samp{decrement_and_branch_until_zero} pattern.
3264 @findex REG_NO_CONFLICT
3265 @item REG_NO_CONFLICT
3266 This insn does not cause a conflict between @var{op} and the item
3267 being set by this insn even though it might appear that it does.
3268 In other words, if the destination register and @var{op} could
3269 otherwise be assigned the same register, this insn does not
3270 prevent that assignment.
3272 Insns with this note are usually part of a block that begins with a
3273 @code{clobber} insn specifying a multi-word pseudo register (which will
3274 be the output of the block), a group of insns that each set one word of
3275 the value and have the @code{REG_NO_CONFLICT} note attached, and a final
3276 insn that copies the output to itself with an attached @code{REG_EQUAL}
3277 note giving the expression being computed. This block is encapsulated
3278 with @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and
3279 last insns, respectively.
3283 This insn uses @var{op}, a @code{code_label} or a @code{note} of type
3284 @code{NOTE_INSN_DELETED_LABEL}, but is not a
3285 @code{jump_insn}, or it is a @code{jump_insn} that required the label to
3286 be held in a register. The presence of this note allows jump
3287 optimization to be aware that @var{op} is, in fact, being used, and flow
3288 optimization to build an accurate flow graph.
3290 @findex REG_CROSSING_JUMP
3291 @item REG_CROSSING_JUMP
3292 This insn is an branching instruction (either an unconditional jump or
3293 an indirect jump) which crosses between hot and cold sections, which
3294 could potentially be very far apart in the executable. The presence
3295 of this note indicates to other optimizations that this this branching
3296 instruction should not be ``collapsed'' into a simpler branching
3297 construct. It is used when the optimization to partition basic blocks
3298 into hot and cold sections is turned on.
3301 The following notes describe attributes of outputs of an insn:
3308 This note is only valid on an insn that sets only one register and
3309 indicates that that register will be equal to @var{op} at run time; the
3310 scope of this equivalence differs between the two types of notes. The
3311 value which the insn explicitly copies into the register may look
3312 different from @var{op}, but they will be equal at run time. If the
3313 output of the single @code{set} is a @code{strict_low_part} expression,
3314 the note refers to the register that is contained in @code{SUBREG_REG}
3315 of the @code{subreg} expression.
3317 For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
3318 the entire function, and could validly be replaced in all its
3319 occurrences by @var{op}. (``Validly'' here refers to the data flow of
3320 the program; simple replacement may make some insns invalid.) For
3321 example, when a constant is loaded into a register that is never
3322 assigned any other value, this kind of note is used.
3324 When a parameter is copied into a pseudo-register at entry to a function,
3325 a note of this kind records that the register is equivalent to the stack
3326 slot where the parameter was passed. Although in this case the register
3327 may be set by other insns, it is still valid to replace the register
3328 by the stack slot throughout the function.
3330 A @code{REG_EQUIV} note is also used on an instruction which copies a
3331 register parameter into a pseudo-register at entry to a function, if
3332 there is a stack slot where that parameter could be stored. Although
3333 other insns may set the pseudo-register, it is valid for the compiler to
3334 replace the pseudo-register by stack slot throughout the function,
3335 provided the compiler ensures that the stack slot is properly
3336 initialized by making the replacement in the initial copy instruction as
3337 well. This is used on machines for which the calling convention
3338 allocates stack space for register parameters. See
3339 @code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
3341 In the case of @code{REG_EQUAL}, the register that is set by this insn
3342 will be equal to @var{op} at run time at the end of this insn but not
3343 necessarily elsewhere in the function. In this case, @var{op}
3344 is typically an arithmetic expression. For example, when a sequence of
3345 insns such as a library call is used to perform an arithmetic operation,
3346 this kind of note is attached to the insn that produces or copies the
3349 These two notes are used in different ways by the compiler passes.
3350 @code{REG_EQUAL} is used by passes prior to register allocation (such as
3351 common subexpression elimination and loop optimization) to tell them how
3352 to think of that value. @code{REG_EQUIV} notes are used by register
3353 allocation to indicate that there is an available substitute expression
3354 (either a constant or a @code{mem} expression for the location of a
3355 parameter on the stack) that may be used in place of a register if
3356 insufficient registers are available.
3358 Except for stack homes for parameters, which are indicated by a
3359 @code{REG_EQUIV} note and are not useful to the early optimization
3360 passes and pseudo registers that are equivalent to a memory location
3361 throughout their entire life, which is not detected until later in
3362 the compilation, all equivalences are initially indicated by an attached
3363 @code{REG_EQUAL} note. In the early stages of register allocation, a
3364 @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
3365 @var{op} is a constant and the insn represents the only set of its
3366 destination register.
3368 Thus, compiler passes prior to register allocation need only check for
3369 @code{REG_EQUAL} notes and passes subsequent to register allocation
3370 need only check for @code{REG_EQUIV} notes.
3373 These notes describe linkages between insns. They occur in pairs: one
3374 insn has one of a pair of notes that points to a second insn, which has
3375 the inverse note pointing back to the first insn.
3380 This insn copies the value of a multi-insn sequence (for example, a
3381 library call), and @var{op} is the first insn of the sequence (for a
3382 library call, the first insn that was generated to set up the arguments
3383 for the library call).
3385 Loop optimization uses this note to treat such a sequence as a single
3386 operation for code motion purposes and flow analysis uses this note to
3387 delete such sequences whose results are dead.
3389 A @code{REG_EQUAL} note will also usually be attached to this insn to
3390 provide the expression being computed by the sequence.
3392 These notes will be deleted after reload, since they are no longer
3397 This is the inverse of @code{REG_RETVAL}: it is placed on the first
3398 insn of a multi-insn sequence, and it points to the last one.
3400 These notes are deleted after reload, since they are no longer useful or
3403 @findex REG_CC_SETTER
3407 On machines that use @code{cc0}, the insns which set and use @code{cc0}
3408 set and use @code{cc0} are adjacent. However, when branch delay slot
3409 filling is done, this may no longer be true. In this case a
3410 @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
3411 point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
3412 be placed on the insn using @code{cc0} to point to the insn setting
3416 These values are only used in the @code{LOG_LINKS} field, and indicate
3417 the type of dependency that each link represents. Links which indicate
3418 a data dependence (a read after write dependence) do not use any code,
3419 they simply have mode @code{VOIDmode}, and are printed without any
3423 @findex REG_DEP_ANTI
3425 This indicates an anti dependence (a write after read dependence).
3427 @findex REG_DEP_OUTPUT
3428 @item REG_DEP_OUTPUT
3429 This indicates an output dependence (a write after write dependence).
3432 These notes describe information gathered from gcov profile data. They
3433 are stored in the @code{REG_NOTES} field of an insn as an
3439 This is used to specify the ratio of branches to non-branches of a
3440 branch insn according to the profile data. The value is stored as a
3441 value between 0 and REG_BR_PROB_BASE; larger values indicate a higher
3442 probability that the branch will be taken.
3446 These notes are found in JUMP insns after delayed branch scheduling
3447 has taken place. They indicate both the direction and the likelihood
3448 of the JUMP@. The format is a bitmask of ATTR_FLAG_* values.
3450 @findex REG_FRAME_RELATED_EXPR
3451 @item REG_FRAME_RELATED_EXPR
3452 This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
3453 is used in place of the actual insn pattern. This is done in cases where
3454 the pattern is either complex or misleading.
3457 For convenience, the machine mode in an @code{insn_list} or
3458 @code{expr_list} is printed using these symbolic codes in debugging dumps.
3462 The only difference between the expression codes @code{insn_list} and
3463 @code{expr_list} is that the first operand of an @code{insn_list} is
3464 assumed to be an insn and is printed in debugging dumps as the insn's
3465 unique id; the first operand of an @code{expr_list} is printed in the
3466 ordinary way as an expression.
3469 @section RTL Representation of Function-Call Insns
3470 @cindex calling functions in RTL
3471 @cindex RTL function-call insns
3472 @cindex function-call insns
3474 Insns that call subroutines have the RTL expression code @code{call_insn}.
3475 These insns must satisfy special rules, and their bodies must use a special
3476 RTL expression code, @code{call}.
3478 @cindex @code{call} usage
3479 A @code{call} expression has two operands, as follows:
3482 (call (mem:@var{fm} @var{addr}) @var{nbytes})
3486 Here @var{nbytes} is an operand that represents the number of bytes of
3487 argument data being passed to the subroutine, @var{fm} is a machine mode
3488 (which must equal as the definition of the @code{FUNCTION_MODE} macro in
3489 the machine description) and @var{addr} represents the address of the
3492 For a subroutine that returns no value, the @code{call} expression as
3493 shown above is the entire body of the insn, except that the insn might
3494 also contain @code{use} or @code{clobber} expressions.
3496 @cindex @code{BLKmode}, and function return values
3497 For a subroutine that returns a value whose mode is not @code{BLKmode},
3498 the value is returned in a hard register. If this register's number is
3499 @var{r}, then the body of the call insn looks like this:
3502 (set (reg:@var{m} @var{r})
3503 (call (mem:@var{fm} @var{addr}) @var{nbytes}))
3507 This RTL expression makes it clear (to the optimizer passes) that the
3508 appropriate register receives a useful value in this insn.
3510 When a subroutine returns a @code{BLKmode} value, it is handled by
3511 passing to the subroutine the address of a place to store the value.
3512 So the call insn itself does not ``return'' any value, and it has the
3513 same RTL form as a call that returns nothing.
3515 On some machines, the call instruction itself clobbers some register,
3516 for example to contain the return address. @code{call_insn} insns
3517 on these machines should have a body which is a @code{parallel}
3518 that contains both the @code{call} expression and @code{clobber}
3519 expressions that indicate which registers are destroyed. Similarly,
3520 if the call instruction requires some register other than the stack
3521 pointer that is not explicitly mentioned it its RTL, a @code{use}
3522 subexpression should mention that register.
3524 Functions that are called are assumed to modify all registers listed in
3525 the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
3526 Basics}) and, with the exception of @code{const} functions and library
3527 calls, to modify all of memory.
3529 Insns containing just @code{use} expressions directly precede the
3530 @code{call_insn} insn to indicate which registers contain inputs to the
3531 function. Similarly, if registers other than those in
3532 @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
3533 containing a single @code{clobber} follow immediately after the call to
3534 indicate which registers.
3537 @section Structure Sharing Assumptions
3538 @cindex sharing of RTL components
3539 @cindex RTL structure sharing assumptions
3541 The compiler assumes that certain kinds of RTL expressions are unique;
3542 there do not exist two distinct objects representing the same value.
3543 In other cases, it makes an opposite assumption: that no RTL expression
3544 object of a certain kind appears in more than one place in the
3545 containing structure.
3547 These assumptions refer to a single function; except for the RTL
3548 objects that describe global variables and external functions,
3549 and a few standard objects such as small integer constants,
3550 no RTL objects are common to two functions.
3553 @cindex @code{reg}, RTL sharing
3555 Each pseudo-register has only a single @code{reg} object to represent it,
3556 and therefore only a single machine mode.
3558 @cindex symbolic label
3559 @cindex @code{symbol_ref}, RTL sharing
3561 For any symbolic label, there is only one @code{symbol_ref} object
3564 @cindex @code{const_int}, RTL sharing
3566 All @code{const_int} expressions with equal values are shared.
3568 @cindex @code{pc}, RTL sharing
3570 There is only one @code{pc} expression.
3572 @cindex @code{cc0}, RTL sharing
3574 There is only one @code{cc0} expression.
3576 @cindex @code{const_double}, RTL sharing
3578 There is only one @code{const_double} expression with value 0 for
3579 each floating point mode. Likewise for values 1 and 2.
3581 @cindex @code{const_vector}, RTL sharing
3583 There is only one @code{const_vector} expression with value 0 for
3584 each vector mode, be it an integer or a double constant vector.
3586 @cindex @code{label_ref}, RTL sharing
3587 @cindex @code{scratch}, RTL sharing
3589 No @code{label_ref} or @code{scratch} appears in more than one place in
3590 the RTL structure; in other words, it is safe to do a tree-walk of all
3591 the insns in the function and assume that each time a @code{label_ref}
3592 or @code{scratch} is seen it is distinct from all others that are seen.
3594 @cindex @code{mem}, RTL sharing
3596 Only one @code{mem} object is normally created for each static
3597 variable or stack slot, so these objects are frequently shared in all
3598 the places they appear. However, separate but equal objects for these
3599 variables are occasionally made.
3601 @cindex @code{asm_operands}, RTL sharing
3603 When a single @code{asm} statement has multiple output operands, a
3604 distinct @code{asm_operands} expression is made for each output operand.
3605 However, these all share the vector which contains the sequence of input
3606 operands. This sharing is used later on to test whether two
3607 @code{asm_operands} expressions come from the same statement, so all
3608 optimizations must carefully preserve the sharing if they copy the
3612 No RTL object appears in more than one place in the RTL structure
3613 except as described above. Many passes of the compiler rely on this
3614 by assuming that they can modify RTL objects in place without unwanted
3615 side-effects on other insns.
3617 @findex unshare_all_rtl
3619 During initial RTL generation, shared structure is freely introduced.
3620 After all the RTL for a function has been generated, all shared
3621 structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
3622 after which the above rules are guaranteed to be followed.
3624 @findex copy_rtx_if_shared
3626 During the combiner pass, shared structure within an insn can exist
3627 temporarily. However, the shared structure is copied before the
3628 combiner is finished with the insn. This is done by calling
3629 @code{copy_rtx_if_shared}, which is a subroutine of
3630 @code{unshare_all_rtl}.
3634 @section Reading RTL
3636 To read an RTL object from a file, call @code{read_rtx}. It takes one
3637 argument, a stdio stream, and returns a single RTL object. This routine
3638 is defined in @file{read-rtl.c}. It is not available in the compiler
3639 itself, only the various programs that generate the compiler back end
3640 from the machine description.
3642 People frequently have the idea of using RTL stored as text in a file as
3643 an interface between a language front end and the bulk of GCC@. This
3644 idea is not feasible.
3646 GCC was designed to use RTL internally only. Correct RTL for a given
3647 program is very dependent on the particular target machine. And the RTL
3648 does not contain all the information about the program.
3650 The proper way to interface GCC to a new language front end is with
3651 the ``tree'' data structure, described in the files @file{tree.h} and
3652 @file{tree.def}. The documentation for this structure (@pxref{Trees})