1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
30 #include "basic-block.h"
32 #include "dwarf2out.h"
33 #include "dwarf2asm.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "expr.h" /* init_return_column_size */
42 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
43 #include "output.h" /* asm_out_file */
44 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
47 /* ??? Poison these here until it can be done generically. They've been
48 totally replaced in this file; make sure it stays that way. */
49 #undef DWARF2_UNWIND_INFO
50 #undef DWARF2_FRAME_INFO
51 #if (GCC_VERSION >= 3000)
52 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
55 #ifndef INCOMING_RETURN_ADDR_RTX
56 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
59 /* Maximum size (in bytes) of an artificially generated label. */
60 #define MAX_ARTIFICIAL_LABEL_BYTES 30
62 /* A collected description of an entire row of the abstract CFI table. */
63 typedef struct GTY(()) dw_cfi_row_struct
65 /* The expression that computes the CFA, expressed in two different ways.
66 The CFA member for the simple cases, and the full CFI expression for
67 the complex cases. The later will be a DW_CFA_cfa_expression. */
71 /* The expressions for any register column that is saved. */
74 /* The value of any DW_CFA_GNU_args_size. */
75 HOST_WIDE_INT args_size
;
78 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
79 typedef struct GTY(()) reg_saved_in_data_struct
{
84 DEF_VEC_O (reg_saved_in_data
);
85 DEF_VEC_ALLOC_O (reg_saved_in_data
, heap
);
87 /* Since we no longer have a proper CFG, we're going to create a facsimile
88 of one on the fly while processing the frame-related insns.
90 We create dw_trace_info structures for each extended basic block beginning
91 and ending at a "save point". Save points are labels, barriers, certain
92 notes, and of course the beginning and end of the function.
94 As we encounter control transfer insns, we propagate the "current"
95 row state across the edges to the starts of traces. When checking is
96 enabled, we validate that we propagate the same data from all sources.
98 All traces are members of the TRACE_INFO array, in the order in which
99 they appear in the instruction stream.
101 All save points are present in the TRACE_INDEX hash, mapping the insn
102 starting a trace to the dw_trace_info describing the trace. */
106 /* The insn that begins the trace. */
109 /* The row state at the beginning and end of the trace. */
110 dw_cfi_row
*beg_row
, *end_row
;
112 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
113 bool switch_sections
;
115 /* The following variables contain data used in interpreting frame related
116 expressions. These are not part of the "real" row state as defined by
117 Dwarf, but it seems like they need to be propagated into a trace in case
118 frame related expressions have been sunk. */
119 /* ??? This seems fragile. These variables are fragments of a larger
120 expression. If we do not keep the entire expression together, we risk
121 not being able to put it together properly. Consider forcing targets
122 to generate self-contained expressions and dropping all of the magic
123 interpretation code in this file. Or at least refusing to shrink wrap
124 any frame related insn that doesn't contain a complete expression. */
126 /* The register used for saving registers to the stack, and its offset
128 dw_cfa_location cfa_store
;
130 /* A temporary register holding an integral value used in adjusting SP
131 or setting up the store_reg. The "offset" field holds the integer
132 value, not an offset. */
133 dw_cfa_location cfa_temp
;
135 /* A set of registers saved in other registers. This is the inverse of
136 the row->reg_save info, if the entry is a DW_CFA_register. This is
137 implemented as a flat array because it normally contains zero or 1
138 entry, depending on the target. IA-64 is the big spender here, using
139 a maximum of 5 entries. */
140 VEC(reg_saved_in_data
, heap
) *regs_saved_in_regs
;
144 DEF_VEC_O (dw_trace_info
);
145 DEF_VEC_ALLOC_O (dw_trace_info
, heap
);
147 typedef dw_trace_info
*dw_trace_info_ref
;
149 DEF_VEC_P (dw_trace_info_ref
);
150 DEF_VEC_ALLOC_P (dw_trace_info_ref
, heap
);
152 /* The variables making up the pseudo-cfg, as described above. */
153 static VEC (dw_trace_info
, heap
) *trace_info
;
154 static VEC (dw_trace_info_ref
, heap
) *trace_work_list
;
155 static htab_t trace_index
;
157 /* A vector of call frame insns for the CIE. */
160 /* The state of the first row of the FDE table, which includes the
161 state provided by the CIE. */
162 static GTY(()) dw_cfi_row
*cie_cfi_row
;
164 static GTY(()) reg_saved_in_data
*cie_return_save
;
166 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
168 /* The insn after which a new CFI note should be emitted. */
169 static rtx add_cfi_insn
;
171 /* When non-null, add_cfi will add the CFI to this vector. */
172 static cfi_vec
*add_cfi_vec
;
174 /* The current instruction trace. */
175 static dw_trace_info
*cur_trace
;
177 /* The current, i.e. most recently generated, row of the CFI table. */
178 static dw_cfi_row
*cur_row
;
180 /* We delay emitting a register save until either (a) we reach the end
181 of the prologue or (b) the register is clobbered. This clusters
182 register saves so that there are fewer pc advances. */
187 HOST_WIDE_INT cfa_offset
;
190 DEF_VEC_O (queued_reg_save
);
191 DEF_VEC_ALLOC_O (queued_reg_save
, heap
);
193 static VEC(queued_reg_save
, heap
) *queued_reg_saves
;
195 /* The (really) current value for DW_CFA_GNU_args_size. We delay actually
196 emitting this data, i.e. updating CUR_ROW, without async unwind. */
197 static HOST_WIDE_INT queued_args_size
;
199 /* True if any CFI directives were emitted at the current insn. */
200 static bool any_cfis_emitted
;
202 /* Short-hand for commonly used register numbers. */
203 static unsigned dw_stack_pointer_regnum
;
204 static unsigned dw_frame_pointer_regnum
;
206 /* Hook used by __throw. */
209 expand_builtin_dwarf_sp_column (void)
211 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
212 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
215 /* MEM is a memory reference for the register size table, each element of
216 which has mode MODE. Initialize column C as a return address column. */
219 init_return_column_size (enum machine_mode mode
, rtx mem
, unsigned int c
)
221 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
222 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
223 emit_move_insn (adjust_address (mem
, mode
, offset
), GEN_INT (size
));
226 /* Generate code to initialize the register size table. */
229 expand_builtin_init_dwarf_reg_sizes (tree address
)
232 enum machine_mode mode
= TYPE_MODE (char_type_node
);
233 rtx addr
= expand_normal (address
);
234 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
235 bool wrote_return_column
= false;
237 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
239 unsigned int dnum
= DWARF_FRAME_REGNUM (i
);
240 unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
242 if (rnum
< DWARF_FRAME_REGISTERS
)
244 HOST_WIDE_INT offset
= rnum
* GET_MODE_SIZE (mode
);
245 enum machine_mode save_mode
= reg_raw_mode
[i
];
248 if (HARD_REGNO_CALL_PART_CLOBBERED (i
, save_mode
))
249 save_mode
= choose_hard_reg_mode (i
, 1, true);
250 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
252 if (save_mode
== VOIDmode
)
254 wrote_return_column
= true;
256 size
= GET_MODE_SIZE (save_mode
);
260 emit_move_insn (adjust_address (mem
, mode
, offset
),
261 gen_int_mode (size
, mode
));
265 if (!wrote_return_column
)
266 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
268 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
269 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
272 targetm
.init_dwarf_reg_sizes_extra (address
);
277 dw_trace_info_hash (const void *ptr
)
279 const dw_trace_info
*ti
= (const dw_trace_info
*) ptr
;
280 return INSN_UID (ti
->head
);
284 dw_trace_info_eq (const void *ptr_a
, const void *ptr_b
)
286 const dw_trace_info
*a
= (const dw_trace_info
*) ptr_a
;
287 const dw_trace_info
*b
= (const dw_trace_info
*) ptr_b
;
288 return a
->head
== b
->head
;
292 get_trace_index (dw_trace_info
*trace
)
294 return trace
- VEC_address (dw_trace_info
, trace_info
);
297 static dw_trace_info
*
298 get_trace_info (rtx insn
)
302 return (dw_trace_info
*)
303 htab_find_with_hash (trace_index
, &dummy
, INSN_UID (insn
));
307 save_point_p (rtx insn
)
309 /* Labels, except those that are really jump tables. */
311 return inside_basic_block_p (insn
);
313 /* We split traces at the prologue/epilogue notes because those
314 are points at which the unwind info is usually stable. This
315 makes it easier to find spots with identical unwind info so
316 that we can use remember/restore_state opcodes. */
318 switch (NOTE_KIND (insn
))
320 case NOTE_INSN_PROLOGUE_END
:
321 case NOTE_INSN_EPILOGUE_BEG
:
328 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
330 static inline HOST_WIDE_INT
331 div_data_align (HOST_WIDE_INT off
)
333 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
334 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
338 /* Return true if we need a signed version of a given opcode
339 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
342 need_data_align_sf_opcode (HOST_WIDE_INT off
)
344 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
347 /* Return a pointer to a newly allocated Call Frame Instruction. */
349 static inline dw_cfi_ref
352 dw_cfi_ref cfi
= ggc_alloc_dw_cfi_node ();
354 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
355 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
360 /* Return a newly allocated CFI row, with no defined data. */
365 dw_cfi_row
*row
= ggc_alloc_cleared_dw_cfi_row ();
367 row
->cfa
.reg
= INVALID_REGNUM
;
372 /* Return a copy of an existing CFI row. */
375 copy_cfi_row (dw_cfi_row
*src
)
377 dw_cfi_row
*dst
= ggc_alloc_dw_cfi_row ();
380 dst
->reg_save
= VEC_copy (dw_cfi_ref
, gc
, src
->reg_save
);
385 /* Generate a new label for the CFI info to refer to. */
388 dwarf2out_cfi_label (void)
390 int num
= dwarf2out_cfi_label_num
++;
393 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
395 return xstrdup (label
);
398 /* Add CFI either to the current insn stream or to a vector, or both. */
401 add_cfi (dw_cfi_ref cfi
)
403 any_cfis_emitted
= true;
405 if (add_cfi_insn
!= NULL
)
407 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
408 NOTE_CFI (add_cfi_insn
) = cfi
;
411 if (add_cfi_vec
!= NULL
)
412 VEC_safe_push (dw_cfi_ref
, gc
, *add_cfi_vec
, cfi
);
416 add_cfi_args_size (HOST_WIDE_INT size
)
418 dw_cfi_ref cfi
= new_cfi ();
420 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
421 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
427 add_cfi_restore (unsigned reg
)
429 dw_cfi_ref cfi
= new_cfi ();
431 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
432 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
437 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
438 that the register column is no longer saved. */
441 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
443 if (VEC_length (dw_cfi_ref
, row
->reg_save
) <= column
)
444 VEC_safe_grow_cleared (dw_cfi_ref
, gc
, row
->reg_save
, column
+ 1);
445 VEC_replace (dw_cfi_ref
, row
->reg_save
, column
, cfi
);
448 /* This function fills in aa dw_cfa_location structure from a dwarf location
449 descriptor sequence. */
452 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_struct
*loc
)
454 struct dw_loc_descr_struct
*ptr
;
456 cfa
->base_offset
= 0;
460 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
462 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
498 cfa
->reg
= op
- DW_OP_reg0
;
501 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
535 cfa
->reg
= op
- DW_OP_breg0
;
536 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
539 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
540 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
545 case DW_OP_plus_uconst
:
546 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
554 /* Find the previous value for the CFA, iteratively. CFI is the opcode
555 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
556 one level of remember/restore state processing. */
559 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
561 switch (cfi
->dw_cfi_opc
)
563 case DW_CFA_def_cfa_offset
:
564 case DW_CFA_def_cfa_offset_sf
:
565 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
567 case DW_CFA_def_cfa_register
:
568 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
571 case DW_CFA_def_cfa_sf
:
572 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
573 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
575 case DW_CFA_def_cfa_expression
:
576 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
579 case DW_CFA_remember_state
:
580 gcc_assert (!remember
->in_use
);
582 remember
->in_use
= 1;
584 case DW_CFA_restore_state
:
585 gcc_assert (remember
->in_use
);
587 remember
->in_use
= 0;
595 /* Determine if two dw_cfa_location structures define the same data. */
598 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
600 return (loc1
->reg
== loc2
->reg
601 && loc1
->offset
== loc2
->offset
602 && loc1
->indirect
== loc2
->indirect
603 && (loc1
->indirect
== 0
604 || loc1
->base_offset
== loc2
->base_offset
));
607 /* Determine if two CFI operands are identical. */
610 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
614 case dw_cfi_oprnd_unused
:
616 case dw_cfi_oprnd_reg_num
:
617 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
618 case dw_cfi_oprnd_offset
:
619 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
620 case dw_cfi_oprnd_addr
:
621 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
622 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
623 case dw_cfi_oprnd_loc
:
624 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
629 /* Determine if two CFI entries are identical. */
632 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
634 enum dwarf_call_frame_info opc
;
636 /* Make things easier for our callers, including missing operands. */
639 if (a
== NULL
|| b
== NULL
)
642 /* Obviously, the opcodes must match. */
644 if (opc
!= b
->dw_cfi_opc
)
647 /* Compare the two operands, re-using the type of the operands as
648 already exposed elsewhere. */
649 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
650 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
651 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
652 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
655 /* Determine if two CFI_ROW structures are identical. */
658 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
660 size_t i
, n_a
, n_b
, n_max
;
664 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
667 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
670 /* Logic suggests that we compare args_size here. However, if
671 EXIT_IGNORE_STACK we don't bother tracking the args_size after
672 the last time it really matters within the function. This does
673 in fact lead to paths with differing arg_size, but in cases for
674 which it doesn't matter. */
675 /* ??? If we really want to sanity check the output of the optimizers,
676 find a way to backtrack from epilogues to the last EH site. This
677 would allow us to distinguish regions with garbage args_size and
678 regions where paths ought to agree. */
680 n_a
= VEC_length (dw_cfi_ref
, a
->reg_save
);
681 n_b
= VEC_length (dw_cfi_ref
, b
->reg_save
);
682 n_max
= MAX (n_a
, n_b
);
684 for (i
= 0; i
< n_max
; ++i
)
686 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
689 r_a
= VEC_index (dw_cfi_ref
, a
->reg_save
, i
);
691 r_b
= VEC_index (dw_cfi_ref
, b
->reg_save
, i
);
693 if (!cfi_equal_p (r_a
, r_b
))
700 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
701 what opcode to emit. Returns the CFI opcode to effect the change, or
702 NULL if NEW_CFA == OLD_CFA. */
705 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
709 /* If nothing changed, no need to issue any call frame instructions. */
710 if (cfa_equal_p (old_cfa
, new_cfa
))
715 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
717 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
718 the CFA register did not change but the offset did. The data
719 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
720 in the assembler via the .cfi_def_cfa_offset directive. */
721 if (new_cfa
->offset
< 0)
722 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
724 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
725 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
728 #ifndef MIPS_DEBUGGING_INFO /* SGI dbx thinks this means no offset. */
729 else if (new_cfa
->offset
== old_cfa
->offset
730 && old_cfa
->reg
!= INVALID_REGNUM
731 && !new_cfa
->indirect
732 && !old_cfa
->indirect
)
734 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
735 indicating the CFA register has changed to <register> but the
736 offset has not changed. */
737 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
738 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
742 else if (new_cfa
->indirect
== 0)
744 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
745 indicating the CFA register has changed to <register> with
746 the specified offset. The data factoring for DW_CFA_def_cfa_sf
747 happens in output_cfi, or in the assembler via the .cfi_def_cfa
749 if (new_cfa
->offset
< 0)
750 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
752 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
753 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
754 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
758 /* Construct a DW_CFA_def_cfa_expression instruction to
759 calculate the CFA using a full location expression since no
760 register-offset pair is available. */
761 struct dw_loc_descr_struct
*loc_list
;
763 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
764 loc_list
= build_cfa_loc (new_cfa
, 0);
765 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
771 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
774 def_cfa_1 (dw_cfa_location
*new_cfa
)
778 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
779 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
781 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
784 cur_row
->cfa
= *new_cfa
;
785 if (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
)
786 cur_row
->cfa_cfi
= cfi
;
792 /* Add the CFI for saving a register. REG is the CFA column number.
793 If SREG is -1, the register is saved at OFFSET from the CFA;
794 otherwise it is saved in SREG. */
797 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
799 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
800 dw_cfi_ref cfi
= new_cfi ();
802 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
804 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
806 && fde
->stack_realign
807 && sreg
== INVALID_REGNUM
)
809 cfi
->dw_cfi_opc
= DW_CFA_expression
;
810 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
811 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
812 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
813 fde
->stack_realignment
);
815 else if (sreg
== INVALID_REGNUM
)
817 if (need_data_align_sf_opcode (offset
))
818 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
819 else if (reg
& ~0x3f)
820 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
822 cfi
->dw_cfi_opc
= DW_CFA_offset
;
823 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
825 else if (sreg
== reg
)
827 /* While we could emit something like DW_CFA_same_value or
828 DW_CFA_restore, we never expect to see something like that
829 in a prologue. This is more likely to be a bug. A backend
830 can always bypass this by using REG_CFA_RESTORE directly. */
835 cfi
->dw_cfi_opc
= DW_CFA_register
;
836 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
840 update_row_reg_save (cur_row
, reg
, cfi
);
843 /* Given a SET, calculate the amount of stack adjustment it
847 stack_adjust_offset (const_rtx pattern
, HOST_WIDE_INT cur_args_size
,
848 HOST_WIDE_INT cur_offset
)
850 const_rtx src
= SET_SRC (pattern
);
851 const_rtx dest
= SET_DEST (pattern
);
852 HOST_WIDE_INT offset
= 0;
855 if (dest
== stack_pointer_rtx
)
857 code
= GET_CODE (src
);
859 /* Assume (set (reg sp) (reg whatever)) sets args_size
861 if (code
== REG
&& src
!= stack_pointer_rtx
)
863 offset
= -cur_args_size
;
864 #ifndef STACK_GROWS_DOWNWARD
867 return offset
- cur_offset
;
870 if (! (code
== PLUS
|| code
== MINUS
)
871 || XEXP (src
, 0) != stack_pointer_rtx
872 || !CONST_INT_P (XEXP (src
, 1)))
875 /* (set (reg sp) (plus (reg sp) (const_int))) */
876 offset
= INTVAL (XEXP (src
, 1));
882 if (MEM_P (src
) && !MEM_P (dest
))
886 /* (set (mem (pre_dec (reg sp))) (foo)) */
887 src
= XEXP (dest
, 0);
888 code
= GET_CODE (src
);
894 if (XEXP (src
, 0) == stack_pointer_rtx
)
896 rtx val
= XEXP (XEXP (src
, 1), 1);
897 /* We handle only adjustments by constant amount. */
898 gcc_assert (GET_CODE (XEXP (src
, 1)) == PLUS
899 && CONST_INT_P (val
));
900 offset
= -INTVAL (val
);
907 if (XEXP (src
, 0) == stack_pointer_rtx
)
909 offset
= GET_MODE_SIZE (GET_MODE (dest
));
916 if (XEXP (src
, 0) == stack_pointer_rtx
)
918 offset
= -GET_MODE_SIZE (GET_MODE (dest
));
933 /* Add a CFI to update the running total of the size of arguments
934 pushed onto the stack. */
937 dwarf2out_args_size (HOST_WIDE_INT size
)
939 if (size
== cur_row
->args_size
)
942 cur_row
->args_size
= size
;
943 add_cfi_args_size (size
);
946 /* Record a stack adjustment of OFFSET bytes. */
949 dwarf2out_stack_adjust (HOST_WIDE_INT offset
)
951 dw_cfa_location loc
= cur_row
->cfa
;
953 if (loc
.reg
== dw_stack_pointer_regnum
)
954 loc
.offset
+= offset
;
956 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
957 cur_trace
->cfa_store
.offset
+= offset
;
959 #ifndef STACK_GROWS_DOWNWARD
963 queued_args_size
+= offset
;
964 if (queued_args_size
< 0)
965 queued_args_size
= 0;
967 /* ??? The assumption seems to be that if A_O_A, the only CFA adjustments
968 involving the stack pointer are inside the prologue and marked as
969 RTX_FRAME_RELATED_P. That said, should we not verify this assumption
970 by *asserting* A_O_A at this point? Why else would we have a change
971 to the stack pointer? */
972 if (ACCUMULATE_OUTGOING_ARGS
)
976 if (flag_asynchronous_unwind_tables
)
977 dwarf2out_args_size (queued_args_size
);
980 /* Check INSN to see if it looks like a push or a stack adjustment, and
981 make a note of it if it does. EH uses this information to find out
982 how much extra space it needs to pop off the stack. */
985 dwarf2out_notice_stack_adjust (rtx insn
, bool after_p
)
987 HOST_WIDE_INT offset
;
990 /* Don't handle epilogues at all. Certainly it would be wrong to do so
991 with this function. Proper support would require all frame-related
992 insns to be marked, and to be able to handle saving state around
993 epilogues textually in the middle of the function. */
994 if (prologue_epilogue_contains (insn
))
997 /* If INSN is an instruction from target of an annulled branch, the
998 effects are for the target only and so current argument size
999 shouldn't change at all. */
1001 && INSN_ANNULLED_BRANCH_P (XVECEXP (final_sequence
, 0, 0))
1002 && INSN_FROM_TARGET_P (insn
))
1005 /* If only calls can throw, and we have a frame pointer,
1006 save up adjustments until we see the CALL_INSN. */
1007 if (!flag_asynchronous_unwind_tables
1008 && cur_row
->cfa
.reg
!= dw_stack_pointer_regnum
)
1010 if (CALL_P (insn
) && !after_p
)
1012 /* Extract the size of the args from the CALL rtx itself. */
1013 insn
= PATTERN (insn
);
1014 if (GET_CODE (insn
) == PARALLEL
)
1015 insn
= XVECEXP (insn
, 0, 0);
1016 if (GET_CODE (insn
) == SET
)
1017 insn
= SET_SRC (insn
);
1018 gcc_assert (GET_CODE (insn
) == CALL
);
1019 gcc_assert (queued_args_size
== INTVAL (XEXP (insn
, 1)));
1020 dwarf2out_args_size (queued_args_size
);
1025 if (CALL_P (insn
) && !after_p
)
1027 if (!flag_asynchronous_unwind_tables
)
1028 dwarf2out_args_size (queued_args_size
);
1031 else if (BARRIER_P (insn
))
1033 else if (GET_CODE (PATTERN (insn
)) == SET
)
1034 offset
= stack_adjust_offset (PATTERN (insn
), queued_args_size
, 0);
1035 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
1036 || GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1038 /* There may be stack adjustments inside compound insns. Search
1040 for (offset
= 0, i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
1041 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1042 offset
+= stack_adjust_offset (XVECEXP (PATTERN (insn
), 0, i
),
1043 queued_args_size
, offset
);
1051 dwarf2out_stack_adjust (offset
);
1054 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
1055 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
1056 used in places where rtl is prohibited. */
1058 static inline unsigned
1059 dwf_regno (const_rtx reg
)
1061 return DWARF_FRAME_REGNUM (REGNO (reg
));
1064 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
1067 compare_reg_or_pc (rtx x
, rtx y
)
1069 if (REG_P (x
) && REG_P (y
))
1070 return REGNO (x
) == REGNO (y
);
1074 /* Record SRC as being saved in DEST. DEST may be null to delete an
1075 existing entry. SRC may be a register or PC_RTX. */
1078 record_reg_saved_in_reg (rtx dest
, rtx src
)
1080 reg_saved_in_data
*elt
;
1083 FOR_EACH_VEC_ELT (reg_saved_in_data
, cur_trace
->regs_saved_in_regs
, i
, elt
)
1084 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1087 VEC_unordered_remove (reg_saved_in_data
,
1088 cur_trace
->regs_saved_in_regs
, i
);
1090 elt
->saved_in_reg
= dest
;
1097 elt
= VEC_safe_push (reg_saved_in_data
, heap
,
1098 cur_trace
->regs_saved_in_regs
, NULL
);
1099 elt
->orig_reg
= src
;
1100 elt
->saved_in_reg
= dest
;
1103 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1104 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1107 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
1112 /* Duplicates waste space, but it's also necessary to remove them
1113 for correctness, since the queue gets output in reverse order. */
1114 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
1115 if (compare_reg_or_pc (q
->reg
, reg
))
1118 q
= VEC_safe_push (queued_reg_save
, heap
, queued_reg_saves
, NULL
);
1122 q
->saved_reg
= sreg
;
1123 q
->cfa_offset
= offset
;
1126 /* Output all the entries in QUEUED_REG_SAVES. */
1129 dwarf2out_flush_queued_reg_saves (void)
1134 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
1136 unsigned int reg
, sreg
;
1138 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1140 if (q
->reg
== pc_rtx
)
1141 reg
= DWARF_FRAME_RETURN_COLUMN
;
1143 reg
= dwf_regno (q
->reg
);
1145 sreg
= dwf_regno (q
->saved_reg
);
1147 sreg
= INVALID_REGNUM
;
1148 reg_save (reg
, sreg
, q
->cfa_offset
);
1151 VEC_truncate (queued_reg_save
, queued_reg_saves
, 0);
1154 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1155 location for? Or, does it clobber a register which we've previously
1156 said that some other register is saved in, and for which we now
1157 have a new location for? */
1160 clobbers_queued_reg_save (const_rtx insn
)
1165 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, iq
, q
)
1168 reg_saved_in_data
*rir
;
1170 if (modified_in_p (q
->reg
, insn
))
1173 FOR_EACH_VEC_ELT (reg_saved_in_data
,
1174 cur_trace
->regs_saved_in_regs
, ir
, rir
)
1175 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1176 && modified_in_p (rir
->saved_in_reg
, insn
))
1183 /* What register, if any, is currently saved in REG? */
1186 reg_saved_in (rtx reg
)
1188 unsigned int regn
= REGNO (reg
);
1190 reg_saved_in_data
*rir
;
1193 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
1194 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1197 FOR_EACH_VEC_ELT (reg_saved_in_data
, cur_trace
->regs_saved_in_regs
, i
, rir
)
1198 if (regn
== REGNO (rir
->saved_in_reg
))
1199 return rir
->orig_reg
;
1204 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1207 dwarf2out_frame_debug_def_cfa (rtx pat
)
1209 dw_cfa_location loc
;
1211 memset (&loc
, 0, sizeof (loc
));
1213 switch (GET_CODE (pat
))
1216 loc
.reg
= dwf_regno (XEXP (pat
, 0));
1217 loc
.offset
= INTVAL (XEXP (pat
, 1));
1221 loc
.reg
= dwf_regno (pat
);
1226 pat
= XEXP (pat
, 0);
1227 if (GET_CODE (pat
) == PLUS
)
1229 loc
.base_offset
= INTVAL (XEXP (pat
, 1));
1230 pat
= XEXP (pat
, 0);
1232 loc
.reg
= dwf_regno (pat
);
1236 /* Recurse and define an expression. */
1243 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1246 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1248 dw_cfa_location loc
= cur_row
->cfa
;
1251 gcc_assert (GET_CODE (pat
) == SET
);
1252 dest
= XEXP (pat
, 0);
1253 src
= XEXP (pat
, 1);
1255 switch (GET_CODE (src
))
1258 gcc_assert (dwf_regno (XEXP (src
, 0)) == loc
.reg
);
1259 loc
.offset
-= INTVAL (XEXP (src
, 1));
1269 loc
.reg
= dwf_regno (dest
);
1270 gcc_assert (loc
.indirect
== 0);
1275 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1278 dwarf2out_frame_debug_cfa_offset (rtx set
)
1280 HOST_WIDE_INT offset
;
1281 rtx src
, addr
, span
;
1282 unsigned int sregno
;
1284 src
= XEXP (set
, 1);
1285 addr
= XEXP (set
, 0);
1286 gcc_assert (MEM_P (addr
));
1287 addr
= XEXP (addr
, 0);
1289 /* As documented, only consider extremely simple addresses. */
1290 switch (GET_CODE (addr
))
1293 gcc_assert (dwf_regno (addr
) == cur_row
->cfa
.reg
);
1294 offset
= -cur_row
->cfa
.offset
;
1297 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_row
->cfa
.reg
);
1298 offset
= INTVAL (XEXP (addr
, 1)) - cur_row
->cfa
.offset
;
1307 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1311 span
= targetm
.dwarf_register_span (src
);
1312 sregno
= dwf_regno (src
);
1315 /* ??? We'd like to use queue_reg_save, but we need to come up with
1316 a different flushing heuristic for epilogues. */
1318 reg_save (sregno
, INVALID_REGNUM
, offset
);
1321 /* We have a PARALLEL describing where the contents of SRC live.
1322 Queue register saves for each piece of the PARALLEL. */
1325 HOST_WIDE_INT span_offset
= offset
;
1327 gcc_assert (GET_CODE (span
) == PARALLEL
);
1329 limit
= XVECLEN (span
, 0);
1330 for (par_index
= 0; par_index
< limit
; par_index
++)
1332 rtx elem
= XVECEXP (span
, 0, par_index
);
1334 sregno
= dwf_regno (src
);
1335 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1336 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1341 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1344 dwarf2out_frame_debug_cfa_register (rtx set
)
1347 unsigned sregno
, dregno
;
1349 src
= XEXP (set
, 1);
1350 dest
= XEXP (set
, 0);
1352 record_reg_saved_in_reg (dest
, src
);
1354 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1356 sregno
= dwf_regno (src
);
1358 dregno
= dwf_regno (dest
);
1360 /* ??? We'd like to use queue_reg_save, but we need to come up with
1361 a different flushing heuristic for epilogues. */
1362 reg_save (sregno
, dregno
, 0);
1365 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1368 dwarf2out_frame_debug_cfa_expression (rtx set
)
1370 rtx src
, dest
, span
;
1371 dw_cfi_ref cfi
= new_cfi ();
1374 dest
= SET_DEST (set
);
1375 src
= SET_SRC (set
);
1377 gcc_assert (REG_P (src
));
1378 gcc_assert (MEM_P (dest
));
1380 span
= targetm
.dwarf_register_span (src
);
1383 regno
= dwf_regno (src
);
1385 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1386 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1387 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1388 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1389 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1391 /* ??? We'd like to use queue_reg_save, were the interface different,
1392 and, as above, we could manage flushing for epilogues. */
1394 update_row_reg_save (cur_row
, regno
, cfi
);
1397 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1400 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1402 unsigned int regno
= dwf_regno (reg
);
1404 add_cfi_restore (regno
);
1405 update_row_reg_save (cur_row
, regno
, NULL
);
1408 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1409 ??? Perhaps we should note in the CIE where windows are saved (instead of
1410 assuming 0(cfa)) and what registers are in the window. */
1413 dwarf2out_frame_debug_cfa_window_save (void)
1415 dw_cfi_ref cfi
= new_cfi ();
1417 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1421 /* Record call frame debugging information for an expression EXPR,
1422 which either sets SP or FP (adjusting how we calculate the frame
1423 address) or saves a register to the stack or another register.
1424 LABEL indicates the address of EXPR.
1426 This function encodes a state machine mapping rtxes to actions on
1427 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1428 users need not read the source code.
1430 The High-Level Picture
1432 Changes in the register we use to calculate the CFA: Currently we
1433 assume that if you copy the CFA register into another register, we
1434 should take the other one as the new CFA register; this seems to
1435 work pretty well. If it's wrong for some target, it's simple
1436 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1438 Changes in the register we use for saving registers to the stack:
1439 This is usually SP, but not always. Again, we deduce that if you
1440 copy SP into another register (and SP is not the CFA register),
1441 then the new register is the one we will be using for register
1442 saves. This also seems to work.
1444 Register saves: There's not much guesswork about this one; if
1445 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1446 register save, and the register used to calculate the destination
1447 had better be the one we think we're using for this purpose.
1448 It's also assumed that a copy from a call-saved register to another
1449 register is saving that register if RTX_FRAME_RELATED_P is set on
1450 that instruction. If the copy is from a call-saved register to
1451 the *same* register, that means that the register is now the same
1452 value as in the caller.
1454 Except: If the register being saved is the CFA register, and the
1455 offset is nonzero, we are saving the CFA, so we assume we have to
1456 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1457 the intent is to save the value of SP from the previous frame.
1459 In addition, if a register has previously been saved to a different
1462 Invariants / Summaries of Rules
1464 cfa current rule for calculating the CFA. It usually
1465 consists of a register and an offset. This is
1466 actually stored in cur_row->cfa, but abbreviated
1467 for the purposes of this documentation.
1468 cfa_store register used by prologue code to save things to the stack
1469 cfa_store.offset is the offset from the value of
1470 cfa_store.reg to the actual CFA
1471 cfa_temp register holding an integral value. cfa_temp.offset
1472 stores the value, which will be used to adjust the
1473 stack pointer. cfa_temp is also used like cfa_store,
1474 to track stores to the stack via fp or a temp reg.
1476 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1477 with cfa.reg as the first operand changes the cfa.reg and its
1478 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1481 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1482 expression yielding a constant. This sets cfa_temp.reg
1483 and cfa_temp.offset.
1485 Rule 5: Create a new register cfa_store used to save items to the
1488 Rules 10-14: Save a register to the stack. Define offset as the
1489 difference of the original location and cfa_store's
1490 location (or cfa_temp's location if cfa_temp is used).
1492 Rules 16-20: If AND operation happens on sp in prologue, we assume
1493 stack is realigned. We will use a group of DW_OP_XXX
1494 expressions to represent the location of the stored
1495 register instead of CFA+offset.
1499 "{a,b}" indicates a choice of a xor b.
1500 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1503 (set <reg1> <reg2>:cfa.reg)
1504 effects: cfa.reg = <reg1>
1505 cfa.offset unchanged
1506 cfa_temp.reg = <reg1>
1507 cfa_temp.offset = cfa.offset
1510 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1511 {<const_int>,<reg>:cfa_temp.reg}))
1512 effects: cfa.reg = sp if fp used
1513 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1514 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1515 if cfa_store.reg==sp
1518 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1519 effects: cfa.reg = fp
1520 cfa_offset += +/- <const_int>
1523 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1524 constraints: <reg1> != fp
1526 effects: cfa.reg = <reg1>
1527 cfa_temp.reg = <reg1>
1528 cfa_temp.offset = cfa.offset
1531 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1532 constraints: <reg1> != fp
1534 effects: cfa_store.reg = <reg1>
1535 cfa_store.offset = cfa.offset - cfa_temp.offset
1538 (set <reg> <const_int>)
1539 effects: cfa_temp.reg = <reg>
1540 cfa_temp.offset = <const_int>
1543 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1544 effects: cfa_temp.reg = <reg1>
1545 cfa_temp.offset |= <const_int>
1548 (set <reg> (high <exp>))
1552 (set <reg> (lo_sum <exp> <const_int>))
1553 effects: cfa_temp.reg = <reg>
1554 cfa_temp.offset = <const_int>
1557 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1558 effects: cfa_store.offset -= <const_int>
1559 cfa.offset = cfa_store.offset if cfa.reg == sp
1561 cfa.base_offset = -cfa_store.offset
1564 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1565 effects: cfa_store.offset += -/+ mode_size(mem)
1566 cfa.offset = cfa_store.offset if cfa.reg == sp
1568 cfa.base_offset = -cfa_store.offset
1571 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1574 effects: cfa.reg = <reg1>
1575 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1578 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1579 effects: cfa.reg = <reg1>
1580 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1583 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1584 effects: cfa.reg = <reg1>
1585 cfa.base_offset = -cfa_temp.offset
1586 cfa_temp.offset -= mode_size(mem)
1589 (set <reg> {unspec, unspec_volatile})
1590 effects: target-dependent
1593 (set sp (and: sp <const_int>))
1594 constraints: cfa_store.reg == sp
1595 effects: cfun->fde.stack_realign = 1
1596 cfa_store.offset = 0
1597 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1600 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1601 effects: cfa_store.offset += -/+ mode_size(mem)
1604 (set (mem ({pre_inc, pre_dec} sp)) fp)
1605 constraints: fde->stack_realign == 1
1606 effects: cfa_store.offset = 0
1607 cfa.reg != HARD_FRAME_POINTER_REGNUM
1610 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1611 constraints: fde->stack_realign == 1
1613 && cfa.indirect == 0
1614 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1615 effects: Use DW_CFA_def_cfa_expression to define cfa
1616 cfa.reg == fde->drap_reg */
1619 dwarf2out_frame_debug_expr (rtx expr
)
1621 dw_cfa_location cfa
= cur_row
->cfa
;
1622 rtx src
, dest
, span
;
1623 HOST_WIDE_INT offset
;
1626 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1627 the PARALLEL independently. The first element is always processed if
1628 it is a SET. This is for backward compatibility. Other elements
1629 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1630 flag is set in them. */
1631 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1634 int limit
= XVECLEN (expr
, 0);
1637 /* PARALLELs have strict read-modify-write semantics, so we
1638 ought to evaluate every rvalue before changing any lvalue.
1639 It's cumbersome to do that in general, but there's an
1640 easy approximation that is enough for all current users:
1641 handle register saves before register assignments. */
1642 if (GET_CODE (expr
) == PARALLEL
)
1643 for (par_index
= 0; par_index
< limit
; par_index
++)
1645 elem
= XVECEXP (expr
, 0, par_index
);
1646 if (GET_CODE (elem
) == SET
1647 && MEM_P (SET_DEST (elem
))
1648 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1649 dwarf2out_frame_debug_expr (elem
);
1652 for (par_index
= 0; par_index
< limit
; par_index
++)
1654 elem
= XVECEXP (expr
, 0, par_index
);
1655 if (GET_CODE (elem
) == SET
1656 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1657 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1658 dwarf2out_frame_debug_expr (elem
);
1659 else if (GET_CODE (elem
) == SET
1661 && !RTX_FRAME_RELATED_P (elem
))
1663 /* Stack adjustment combining might combine some post-prologue
1664 stack adjustment into a prologue stack adjustment. */
1665 HOST_WIDE_INT offset
1666 = stack_adjust_offset (elem
, queued_args_size
, 0);
1669 dwarf2out_stack_adjust (offset
);
1675 gcc_assert (GET_CODE (expr
) == SET
);
1677 src
= SET_SRC (expr
);
1678 dest
= SET_DEST (expr
);
1682 rtx rsi
= reg_saved_in (src
);
1689 switch (GET_CODE (dest
))
1692 switch (GET_CODE (src
))
1694 /* Setting FP from SP. */
1696 if (cfa
.reg
== dwf_regno (src
))
1699 /* Update the CFA rule wrt SP or FP. Make sure src is
1700 relative to the current CFA register.
1702 We used to require that dest be either SP or FP, but the
1703 ARM copies SP to a temporary register, and from there to
1704 FP. So we just rely on the backends to only set
1705 RTX_FRAME_RELATED_P on appropriate insns. */
1706 cfa
.reg
= dwf_regno (dest
);
1707 cur_trace
->cfa_temp
.reg
= cfa
.reg
;
1708 cur_trace
->cfa_temp
.offset
= cfa
.offset
;
1712 /* Saving a register in a register. */
1713 gcc_assert (!fixed_regs
[REGNO (dest
)]
1714 /* For the SPARC and its register window. */
1715 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1717 /* After stack is aligned, we can only save SP in FP
1718 if drap register is used. In this case, we have
1719 to restore stack pointer with the CFA value and we
1720 don't generate this DWARF information. */
1722 && fde
->stack_realign
1723 && REGNO (src
) == STACK_POINTER_REGNUM
)
1724 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1725 && fde
->drap_reg
!= INVALID_REGNUM
1726 && cfa
.reg
!= dwf_regno (src
));
1728 queue_reg_save (src
, dest
, 0);
1735 if (dest
== stack_pointer_rtx
)
1739 switch (GET_CODE (XEXP (src
, 1)))
1742 offset
= INTVAL (XEXP (src
, 1));
1745 gcc_assert (dwf_regno (XEXP (src
, 1))
1746 == cur_trace
->cfa_temp
.reg
);
1747 offset
= cur_trace
->cfa_temp
.offset
;
1753 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1755 /* Restoring SP from FP in the epilogue. */
1756 gcc_assert (cfa
.reg
== dw_frame_pointer_regnum
);
1757 cfa
.reg
= dw_stack_pointer_regnum
;
1759 else if (GET_CODE (src
) == LO_SUM
)
1760 /* Assume we've set the source reg of the LO_SUM from sp. */
1763 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1765 if (GET_CODE (src
) != MINUS
)
1767 if (cfa
.reg
== dw_stack_pointer_regnum
)
1768 cfa
.offset
+= offset
;
1769 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1770 cur_trace
->cfa_store
.offset
+= offset
;
1772 else if (dest
== hard_frame_pointer_rtx
)
1775 /* Either setting the FP from an offset of the SP,
1776 or adjusting the FP */
1777 gcc_assert (frame_pointer_needed
);
1779 gcc_assert (REG_P (XEXP (src
, 0))
1780 && dwf_regno (XEXP (src
, 0)) == cfa
.reg
1781 && CONST_INT_P (XEXP (src
, 1)));
1782 offset
= INTVAL (XEXP (src
, 1));
1783 if (GET_CODE (src
) != MINUS
)
1785 cfa
.offset
+= offset
;
1786 cfa
.reg
= dw_frame_pointer_regnum
;
1790 gcc_assert (GET_CODE (src
) != MINUS
);
1793 if (REG_P (XEXP (src
, 0))
1794 && dwf_regno (XEXP (src
, 0)) == cfa
.reg
1795 && CONST_INT_P (XEXP (src
, 1)))
1797 /* Setting a temporary CFA register that will be copied
1798 into the FP later on. */
1799 offset
= - INTVAL (XEXP (src
, 1));
1800 cfa
.offset
+= offset
;
1801 cfa
.reg
= dwf_regno (dest
);
1802 /* Or used to save regs to the stack. */
1803 cur_trace
->cfa_temp
.reg
= cfa
.reg
;
1804 cur_trace
->cfa_temp
.offset
= cfa
.offset
;
1808 else if (REG_P (XEXP (src
, 0))
1809 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1810 && XEXP (src
, 1) == stack_pointer_rtx
)
1812 /* Setting a scratch register that we will use instead
1813 of SP for saving registers to the stack. */
1814 gcc_assert (cfa
.reg
== dw_stack_pointer_regnum
);
1815 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1816 cur_trace
->cfa_store
.offset
1817 = cfa
.offset
- cur_trace
->cfa_temp
.offset
;
1821 else if (GET_CODE (src
) == LO_SUM
1822 && CONST_INT_P (XEXP (src
, 1)))
1824 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1825 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1834 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1835 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1840 gcc_assert (REG_P (XEXP (src
, 0))
1841 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1842 && CONST_INT_P (XEXP (src
, 1)));
1844 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1845 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1848 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1849 which will fill in all of the bits. */
1856 case UNSPEC_VOLATILE
:
1857 /* All unspecs should be represented by REG_CFA_* notes. */
1863 /* If this AND operation happens on stack pointer in prologue,
1864 we assume the stack is realigned and we extract the
1866 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1868 /* We interpret reg_save differently with stack_realign set.
1869 Thus we must flush whatever we have queued first. */
1870 dwarf2out_flush_queued_reg_saves ();
1872 gcc_assert (cur_trace
->cfa_store
.reg
1873 == dwf_regno (XEXP (src
, 0)));
1874 fde
->stack_realign
= 1;
1875 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1876 cur_trace
->cfa_store
.offset
= 0;
1878 if (cfa
.reg
!= dw_stack_pointer_regnum
1879 && cfa
.reg
!= dw_frame_pointer_regnum
)
1880 fde
->drap_reg
= cfa
.reg
;
1893 /* Saving a register to the stack. Make sure dest is relative to the
1895 switch (GET_CODE (XEXP (dest
, 0)))
1901 /* We can't handle variable size modifications. */
1902 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1904 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1906 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1907 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1909 cur_trace
->cfa_store
.offset
+= offset
;
1910 if (cfa
.reg
== dw_stack_pointer_regnum
)
1911 cfa
.offset
= cur_trace
->cfa_store
.offset
;
1913 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1914 offset
-= cur_trace
->cfa_store
.offset
;
1916 offset
= -cur_trace
->cfa_store
.offset
;
1923 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1924 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1927 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1928 == STACK_POINTER_REGNUM
)
1929 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1931 cur_trace
->cfa_store
.offset
+= offset
;
1933 /* Rule 18: If stack is aligned, we will use FP as a
1934 reference to represent the address of the stored
1937 && fde
->stack_realign
1938 && src
== hard_frame_pointer_rtx
)
1940 gcc_assert (cfa
.reg
!= dw_frame_pointer_regnum
);
1941 cur_trace
->cfa_store
.offset
= 0;
1944 if (cfa
.reg
== dw_stack_pointer_regnum
)
1945 cfa
.offset
= cur_trace
->cfa_store
.offset
;
1947 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1948 offset
+= -cur_trace
->cfa_store
.offset
;
1950 offset
= -cur_trace
->cfa_store
.offset
;
1954 /* With an offset. */
1961 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1962 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1963 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1964 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1967 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1969 if (cfa
.reg
== regno
)
1970 offset
-= cfa
.offset
;
1971 else if (cur_trace
->cfa_store
.reg
== regno
)
1972 offset
-= cur_trace
->cfa_store
.offset
;
1975 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1976 offset
-= cur_trace
->cfa_temp
.offset
;
1982 /* Without an offset. */
1985 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1987 if (cfa
.reg
== regno
)
1988 offset
= -cfa
.offset
;
1989 else if (cur_trace
->cfa_store
.reg
== regno
)
1990 offset
= -cur_trace
->cfa_store
.offset
;
1993 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1994 offset
= -cur_trace
->cfa_temp
.offset
;
2001 gcc_assert (cur_trace
->cfa_temp
.reg
2002 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
2003 offset
= -cur_trace
->cfa_temp
.offset
;
2004 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
2012 /* If the source operand of this MEM operation is a memory,
2013 we only care how much stack grew. */
2018 && REGNO (src
) != STACK_POINTER_REGNUM
2019 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
2020 && dwf_regno (src
) == cfa
.reg
)
2022 /* We're storing the current CFA reg into the stack. */
2024 if (cfa
.offset
== 0)
2027 /* If stack is aligned, putting CFA reg into stack means
2028 we can no longer use reg + offset to represent CFA.
2029 Here we use DW_CFA_def_cfa_expression instead. The
2030 result of this expression equals to the original CFA
2033 && fde
->stack_realign
2034 && cfa
.indirect
== 0
2035 && cfa
.reg
!= dw_frame_pointer_regnum
)
2037 dw_cfa_location cfa_exp
;
2039 gcc_assert (fde
->drap_reg
== cfa
.reg
);
2041 cfa_exp
.indirect
= 1;
2042 cfa_exp
.reg
= dw_frame_pointer_regnum
;
2043 cfa_exp
.base_offset
= offset
;
2046 fde
->drap_reg_saved
= 1;
2048 def_cfa_1 (&cfa_exp
);
2052 /* If the source register is exactly the CFA, assume
2053 we're saving SP like any other register; this happens
2056 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
2061 /* Otherwise, we'll need to look in the stack to
2062 calculate the CFA. */
2063 rtx x
= XEXP (dest
, 0);
2067 gcc_assert (REG_P (x
));
2069 cfa
.reg
= dwf_regno (x
);
2070 cfa
.base_offset
= offset
;
2081 span
= targetm
.dwarf_register_span (src
);
2083 queue_reg_save (src
, NULL_RTX
, offset
);
2086 /* We have a PARALLEL describing where the contents of SRC live.
2087 Queue register saves for each piece of the PARALLEL. */
2090 HOST_WIDE_INT span_offset
= offset
;
2092 gcc_assert (GET_CODE (span
) == PARALLEL
);
2094 limit
= XVECLEN (span
, 0);
2095 for (par_index
= 0; par_index
< limit
; par_index
++)
2097 rtx elem
= XVECEXP (span
, 0, par_index
);
2098 queue_reg_save (elem
, NULL_RTX
, span_offset
);
2099 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2109 /* Record call frame debugging information for INSN, which either
2110 sets SP or FP (adjusting how we calculate the frame address) or saves a
2111 register to the stack. If INSN is NULL_RTX, initialize our state.
2113 If AFTER_P is false, we're being called before the insn is emitted,
2114 otherwise after. Call instructions get invoked twice. */
2117 dwarf2out_frame_debug (rtx insn
, bool after_p
)
2120 bool handled_one
= false;
2121 bool need_flush
= false;
2123 if (!NONJUMP_INSN_P (insn
) || clobbers_queued_reg_save (insn
))
2124 dwarf2out_flush_queued_reg_saves ();
2126 if (!RTX_FRAME_RELATED_P (insn
))
2128 /* ??? This should be done unconditionally since stack adjustments
2129 matter if the stack pointer is not the CFA register anymore but
2130 is still used to save registers. */
2131 if (!ACCUMULATE_OUTGOING_ARGS
)
2132 dwarf2out_notice_stack_adjust (insn
, after_p
);
2136 any_cfis_emitted
= false;
2138 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2139 switch (REG_NOTE_KIND (note
))
2141 case REG_FRAME_RELATED_EXPR
:
2142 insn
= XEXP (note
, 0);
2145 case REG_CFA_DEF_CFA
:
2146 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2150 case REG_CFA_ADJUST_CFA
:
2155 if (GET_CODE (n
) == PARALLEL
)
2156 n
= XVECEXP (n
, 0, 0);
2158 dwarf2out_frame_debug_adjust_cfa (n
);
2162 case REG_CFA_OFFSET
:
2165 n
= single_set (insn
);
2166 dwarf2out_frame_debug_cfa_offset (n
);
2170 case REG_CFA_REGISTER
:
2175 if (GET_CODE (n
) == PARALLEL
)
2176 n
= XVECEXP (n
, 0, 0);
2178 dwarf2out_frame_debug_cfa_register (n
);
2182 case REG_CFA_EXPRESSION
:
2185 n
= single_set (insn
);
2186 dwarf2out_frame_debug_cfa_expression (n
);
2190 case REG_CFA_RESTORE
:
2195 if (GET_CODE (n
) == PARALLEL
)
2196 n
= XVECEXP (n
, 0, 0);
2199 dwarf2out_frame_debug_cfa_restore (n
);
2203 case REG_CFA_SET_VDRAP
:
2207 dw_fde_ref fde
= cfun
->fde
;
2210 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2212 fde
->vdrap_reg
= dwf_regno (n
);
2218 case REG_CFA_WINDOW_SAVE
:
2219 dwarf2out_frame_debug_cfa_window_save ();
2223 case REG_CFA_FLUSH_QUEUE
:
2224 /* The actual flush happens below. */
2235 /* Minimize the number of advances by emitting the entire queue
2236 once anything is emitted. */
2237 need_flush
|= any_cfis_emitted
;
2241 insn
= PATTERN (insn
);
2243 dwarf2out_frame_debug_expr (insn
);
2245 /* Check again. A parallel can save and update the same register.
2246 We could probably check just once, here, but this is safer than
2247 removing the check at the start of the function. */
2248 if (any_cfis_emitted
|| clobbers_queued_reg_save (insn
))
2253 dwarf2out_flush_queued_reg_saves ();
2256 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2259 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2261 size_t i
, n_old
, n_new
, n_max
;
2264 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2265 add_cfi (new_row
->cfa_cfi
);
2268 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2273 if (old_row
->args_size
!= new_row
->args_size
)
2274 add_cfi_args_size (new_row
->args_size
);
2276 n_old
= VEC_length (dw_cfi_ref
, old_row
->reg_save
);
2277 n_new
= VEC_length (dw_cfi_ref
, new_row
->reg_save
);
2278 n_max
= MAX (n_old
, n_new
);
2280 for (i
= 0; i
< n_max
; ++i
)
2282 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2285 r_old
= VEC_index (dw_cfi_ref
, old_row
->reg_save
, i
);
2287 r_new
= VEC_index (dw_cfi_ref
, new_row
->reg_save
, i
);
2291 else if (r_new
== NULL
)
2292 add_cfi_restore (i
);
2293 else if (!cfi_equal_p (r_old
, r_new
))
2298 /* Examine CFI and return true if a cfi label and set_loc is needed
2299 beforehand. Even when generating CFI assembler instructions, we
2300 still have to add the cfi to the list so that lookup_cfa_1 works
2301 later on. When -g2 and above we even need to force emitting of
2302 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2303 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2304 and so don't use convert_cfa_to_fb_loc_list. */
2307 cfi_label_required_p (dw_cfi_ref cfi
)
2309 if (!dwarf2out_do_cfi_asm ())
2312 if (dwarf_version
== 2
2313 && debug_info_level
> DINFO_LEVEL_TERSE
2314 && (write_symbols
== DWARF2_DEBUG
2315 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2317 switch (cfi
->dw_cfi_opc
)
2319 case DW_CFA_def_cfa_offset
:
2320 case DW_CFA_def_cfa_offset_sf
:
2321 case DW_CFA_def_cfa_register
:
2322 case DW_CFA_def_cfa
:
2323 case DW_CFA_def_cfa_sf
:
2324 case DW_CFA_def_cfa_expression
:
2325 case DW_CFA_restore_state
:
2334 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2335 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2338 add_cfis_to_fde (void)
2340 dw_fde_ref fde
= cfun
->fde
;
2342 /* We always start with a function_begin label. */
2345 for (insn
= get_insns (); insn
; insn
= next
)
2347 next
= NEXT_INSN (insn
);
2349 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2351 fde
->dw_fde_switch_cfi_index
2352 = VEC_length (dw_cfi_ref
, fde
->dw_fde_cfi
);
2353 /* Don't attempt to advance_loc4 between labels
2354 in different sections. */
2358 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2360 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2361 while (next
&& NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2363 required
|= cfi_label_required_p (NOTE_CFI (next
));
2364 next
= NEXT_INSN (next
);
2368 int num
= dwarf2out_cfi_label_num
;
2369 const char *label
= dwarf2out_cfi_label ();
2373 /* Set the location counter to the new label. */
2375 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2376 : DW_CFA_advance_loc4
);
2377 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2378 VEC_safe_push (dw_cfi_ref
, gc
, fde
->dw_fde_cfi
, xcfi
);
2380 tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2381 NOTE_LABEL_NUMBER (tmp
) = num
;
2386 VEC_safe_push (dw_cfi_ref
, gc
, fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2387 insn
= NEXT_INSN (insn
);
2389 while (insn
!= next
);
2395 /* If LABEL is the start of a trace, then initialize the state of that
2396 trace from CUR_TRACE and CUR_ROW. */
2399 maybe_record_trace_start (rtx start
, rtx origin
)
2403 /* Sync queued data before propagating to a destination,
2404 lest we propagate out-of-date data. */
2405 dwarf2out_flush_queued_reg_saves ();
2406 dwarf2out_args_size (queued_args_size
);
2408 ti
= get_trace_info (start
);
2409 gcc_assert (ti
!= NULL
);
2413 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2414 get_trace_index (cur_trace
), get_trace_index (ti
),
2415 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2416 (origin
? INSN_UID (origin
) : 0));
2419 if (ti
->beg_row
== NULL
)
2421 /* This is the first time we've encountered this trace. Propagate
2422 state across the edge and push the trace onto the work list. */
2423 ti
->beg_row
= copy_cfi_row (cur_row
);
2424 ti
->cfa_store
= cur_trace
->cfa_store
;
2425 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2426 ti
->regs_saved_in_regs
= VEC_copy (reg_saved_in_data
, heap
,
2427 cur_trace
->regs_saved_in_regs
);
2429 VEC_safe_push (dw_trace_info_ref
, heap
, trace_work_list
, ti
);
2432 fprintf (dump_file
, "\tpush trace %u to worklist\n",
2433 get_trace_index (ti
));
2437 /* We ought to have the same state incoming to a given trace no
2438 matter how we arrive at the trace. Anything else means we've
2439 got some kind of optimization error. */
2440 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2444 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2445 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2448 create_trace_edges (rtx insn
)
2455 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2457 else if (tablejump_p (insn
, NULL
, &tmp
))
2461 tmp
= PATTERN (tmp
);
2462 vec
= XVEC (tmp
, GET_CODE (tmp
) == ADDR_DIFF_VEC
);
2464 n
= GET_NUM_ELEM (vec
);
2465 for (i
= 0; i
< n
; ++i
)
2467 lab
= XEXP (RTVEC_ELT (vec
, i
), 0);
2468 maybe_record_trace_start (lab
, insn
);
2471 else if (computed_jump_p (insn
))
2473 for (lab
= forced_labels
; lab
; lab
= XEXP (lab
, 1))
2474 maybe_record_trace_start (XEXP (lab
, 0), insn
);
2476 else if (returnjump_p (insn
))
2478 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2480 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2481 for (i
= 0; i
< n
; ++i
)
2483 lab
= XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0);
2484 maybe_record_trace_start (lab
, insn
);
2489 lab
= JUMP_LABEL (insn
);
2490 gcc_assert (lab
!= NULL
);
2491 maybe_record_trace_start (lab
, insn
);
2494 else if (CALL_P (insn
))
2496 /* Sibling calls don't have edges inside this function. */
2497 if (SIBLING_CALL_P (insn
))
2500 /* Process non-local goto edges. */
2501 if (can_nonlocal_goto (insn
))
2502 for (lab
= nonlocal_goto_handler_labels
; lab
; lab
= XEXP (lab
, 1))
2503 maybe_record_trace_start (XEXP (lab
, 0), insn
);
2506 /* Process EH edges. */
2507 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2509 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2511 maybe_record_trace_start (lp
->landing_pad
, insn
);
2515 /* Scan the trace beginning at INSN and create the CFI notes for the
2516 instructions therein. */
2519 scan_trace (dw_trace_info
*trace
)
2521 rtx insn
= trace
->head
;
2524 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2525 get_trace_index (trace
), rtx_name
[(int) GET_CODE (insn
)],
2528 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2531 cur_row
= trace
->end_row
;
2532 queued_args_size
= cur_row
->args_size
;
2534 for (insn
= NEXT_INSN (insn
); insn
; insn
= NEXT_INSN (insn
))
2538 add_cfi_insn
= PREV_INSN (insn
);
2540 /* Notice the end of a trace. */
2541 if (BARRIER_P (insn
) || save_point_p (insn
))
2543 dwarf2out_flush_queued_reg_saves ();
2544 dwarf2out_args_size (queued_args_size
);
2546 /* Propagate across fallthru edges. */
2547 if (!BARRIER_P (insn
))
2548 maybe_record_trace_start (insn
, NULL
);
2552 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2555 pat
= PATTERN (insn
);
2556 if (asm_noperands (pat
) >= 0)
2558 dwarf2out_frame_debug (insn
, false);
2559 add_cfi_insn
= insn
;
2563 if (GET_CODE (pat
) == SEQUENCE
)
2565 int i
, n
= XVECLEN (pat
, 0);
2566 for (i
= 1; i
< n
; ++i
)
2567 dwarf2out_frame_debug (XVECEXP (pat
, 0, i
), false);
2571 dwarf2out_frame_debug (insn
, false);
2572 else if (find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
)
2573 || (cfun
->can_throw_non_call_exceptions
2574 && can_throw_internal (insn
)))
2575 dwarf2out_flush_queued_reg_saves ();
2577 /* Do not separate tablejump insns from their ADDR_DIFF_VEC.
2578 Putting the note after the VEC should be ok. */
2579 if (!tablejump_p (insn
, NULL
, &add_cfi_insn
))
2580 add_cfi_insn
= insn
;
2582 dwarf2out_frame_debug (insn
, true);
2585 /* Note that a test for control_flow_insn_p does exactly the
2586 same tests as are done to actually create the edges. So
2587 always call the routine and let it not create edges for
2588 non-control-flow insns. */
2589 create_trace_edges (insn
);
2592 add_cfi_insn
= NULL
;
2597 /* Scan the function and create the initial set of CFI notes. */
2600 create_cfi_notes (void)
2604 gcc_checking_assert (queued_reg_saves
== NULL
);
2605 gcc_checking_assert (trace_work_list
== NULL
);
2607 /* Always begin at the entry trace. */
2608 ti
= VEC_index (dw_trace_info
, trace_info
, 0);
2611 while (!VEC_empty (dw_trace_info_ref
, trace_work_list
))
2613 ti
= VEC_pop (dw_trace_info_ref
, trace_work_list
);
2617 VEC_free (queued_reg_save
, heap
, queued_reg_saves
);
2618 VEC_free (dw_trace_info_ref
, heap
, trace_work_list
);
2621 /* Insert CFI notes between traces to properly change state between them. */
2622 /* ??? TODO: Make use of remember/restore_state. */
2625 connect_traces (void)
2627 unsigned i
, n
= VEC_length (dw_trace_info
, trace_info
);
2628 dw_trace_info
*prev_ti
, *ti
;
2630 prev_ti
= VEC_index (dw_trace_info
, trace_info
, 0);
2632 for (i
= 1; i
< n
; ++i
, prev_ti
= ti
)
2634 dw_cfi_row
*old_row
;
2636 ti
= VEC_index (dw_trace_info
, trace_info
, i
);
2638 /* We must have both queued and processed every trace. */
2639 gcc_assert (ti
->beg_row
&& ti
->end_row
);
2641 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2642 for the portion of the function in the alternate text
2643 section. The row state at the very beginning of that
2644 new FDE will be exactly the row state from the CIE. */
2645 if (ti
->switch_sections
)
2646 old_row
= cie_cfi_row
;
2648 old_row
= prev_ti
->end_row
;
2650 add_cfi_insn
= ti
->head
;
2651 change_cfi_row (old_row
, ti
->beg_row
);
2653 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2657 fprintf (dump_file
, "Fixup between trace %u and %u:\n", i
- 1, i
);
2662 note
= NEXT_INSN (note
);
2663 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2664 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2666 while (note
!= add_cfi_insn
);
2671 /* Set up the pseudo-cfg of instruction traces, as described at the
2672 block comment at the top of the file. */
2675 create_pseudo_cfg (void)
2677 bool saw_barrier
, switch_sections
;
2682 /* The first trace begins at the start of the function,
2683 and begins with the CIE row state. */
2684 trace_info
= VEC_alloc (dw_trace_info
, heap
, 16);
2685 ti
= VEC_quick_push (dw_trace_info
, trace_info
, NULL
);
2687 memset (ti
, 0, sizeof (*ti
));
2688 ti
->head
= get_insns ();
2689 ti
->beg_row
= cie_cfi_row
;
2690 ti
->cfa_store
= cie_cfi_row
->cfa
;
2691 ti
->cfa_temp
.reg
= INVALID_REGNUM
;
2692 if (cie_return_save
)
2693 VEC_safe_push (reg_saved_in_data
, heap
,
2694 ti
->regs_saved_in_regs
, cie_return_save
);
2696 /* Walk all the insns, collecting start of trace locations. */
2697 saw_barrier
= false;
2698 switch_sections
= false;
2699 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2701 if (BARRIER_P (insn
))
2703 else if (NOTE_P (insn
)
2704 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2706 /* We should have just seen a barrier. */
2707 gcc_assert (saw_barrier
);
2708 switch_sections
= true;
2710 /* Watch out for save_point notes between basic blocks.
2711 In particular, a note after a barrier. Do not record these,
2712 delaying trace creation until the label. */
2713 else if (save_point_p (insn
)
2714 && (LABEL_P (insn
) || !saw_barrier
))
2716 ti
= VEC_safe_push (dw_trace_info
, heap
, trace_info
, NULL
);
2717 memset (ti
, 0, sizeof (*ti
));
2719 ti
->switch_sections
= switch_sections
;
2721 saw_barrier
= false;
2722 switch_sections
= false;
2726 /* Create the trace index after we've finished building trace_info,
2727 avoiding stale pointer problems due to reallocation. */
2728 trace_index
= htab_create (VEC_length (dw_trace_info
, trace_info
),
2729 dw_trace_info_hash
, dw_trace_info_eq
, NULL
);
2730 FOR_EACH_VEC_ELT (dw_trace_info
, trace_info
, i
, ti
)
2735 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", i
,
2736 rtx_name
[(int) GET_CODE (ti
->head
)], INSN_UID (ti
->head
),
2737 ti
->switch_sections
? " (section switch)" : "");
2739 slot
= htab_find_slot_with_hash (trace_index
, ti
,
2740 INSN_UID (ti
->head
), INSERT
);
2741 gcc_assert (*slot
== NULL
);
2742 *slot
= (void *) ti
;
2746 /* Record the initial position of the return address. RTL is
2747 INCOMING_RETURN_ADDR_RTX. */
2750 initial_return_save (rtx rtl
)
2752 unsigned int reg
= INVALID_REGNUM
;
2753 HOST_WIDE_INT offset
= 0;
2755 switch (GET_CODE (rtl
))
2758 /* RA is in a register. */
2759 reg
= dwf_regno (rtl
);
2763 /* RA is on the stack. */
2764 rtl
= XEXP (rtl
, 0);
2765 switch (GET_CODE (rtl
))
2768 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2773 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2774 offset
= INTVAL (XEXP (rtl
, 1));
2778 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2779 offset
= -INTVAL (XEXP (rtl
, 1));
2789 /* The return address is at some offset from any value we can
2790 actually load. For instance, on the SPARC it is in %i7+8. Just
2791 ignore the offset for now; it doesn't matter for unwinding frames. */
2792 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2793 initial_return_save (XEXP (rtl
, 0));
2800 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2802 if (reg
!= INVALID_REGNUM
)
2803 record_reg_saved_in_reg (rtl
, pc_rtx
);
2804 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2809 create_cie_data (void)
2811 dw_cfa_location loc
;
2812 dw_trace_info cie_trace
;
2814 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2815 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2817 memset (&cie_trace
, 0, sizeof(cie_trace
));
2818 cur_trace
= &cie_trace
;
2820 add_cfi_vec
= &cie_cfi_vec
;
2821 cie_cfi_row
= cur_row
= new_cfi_row ();
2823 /* On entry, the Canonical Frame Address is at SP. */
2824 memset(&loc
, 0, sizeof (loc
));
2825 loc
.reg
= dw_stack_pointer_regnum
;
2826 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2829 if (targetm
.debug_unwind_info () == UI_DWARF2
2830 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2832 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2834 /* For a few targets, we have the return address incoming into a
2835 register, but choose a different return column. This will result
2836 in a DW_CFA_register for the return, and an entry in
2837 regs_saved_in_regs to match. If the target later stores that
2838 return address register to the stack, we want to be able to emit
2839 the DW_CFA_offset against the return column, not the intermediate
2840 save register. Save the contents of regs_saved_in_regs so that
2841 we can re-initialize it at the start of each function. */
2842 switch (VEC_length (reg_saved_in_data
, cie_trace
.regs_saved_in_regs
))
2847 cie_return_save
= ggc_alloc_reg_saved_in_data ();
2848 *cie_return_save
= *VEC_index (reg_saved_in_data
,
2849 cie_trace
.regs_saved_in_regs
, 0);
2850 VEC_free (reg_saved_in_data
, heap
, cie_trace
.regs_saved_in_regs
);
2862 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2863 state at each location within the function. These notes will be
2864 emitted during pass_final. */
2867 execute_dwarf2_frame (void)
2869 /* The first time we're called, compute the incoming frame state. */
2870 if (cie_cfi_vec
== NULL
)
2873 dwarf2out_alloc_current_fde ();
2875 create_pseudo_cfg ();
2878 create_cfi_notes ();
2882 /* Free all the data we allocated. */
2887 FOR_EACH_VEC_ELT (dw_trace_info
, trace_info
, i
, ti
)
2888 VEC_free (reg_saved_in_data
, heap
, ti
->regs_saved_in_regs
);
2890 VEC_free (dw_trace_info
, heap
, trace_info
);
2892 htab_delete (trace_index
);
2898 /* Convert a DWARF call frame info. operation to its string name */
2901 dwarf_cfi_name (unsigned int cfi_opc
)
2905 case DW_CFA_advance_loc
:
2906 return "DW_CFA_advance_loc";
2908 return "DW_CFA_offset";
2909 case DW_CFA_restore
:
2910 return "DW_CFA_restore";
2912 return "DW_CFA_nop";
2913 case DW_CFA_set_loc
:
2914 return "DW_CFA_set_loc";
2915 case DW_CFA_advance_loc1
:
2916 return "DW_CFA_advance_loc1";
2917 case DW_CFA_advance_loc2
:
2918 return "DW_CFA_advance_loc2";
2919 case DW_CFA_advance_loc4
:
2920 return "DW_CFA_advance_loc4";
2921 case DW_CFA_offset_extended
:
2922 return "DW_CFA_offset_extended";
2923 case DW_CFA_restore_extended
:
2924 return "DW_CFA_restore_extended";
2925 case DW_CFA_undefined
:
2926 return "DW_CFA_undefined";
2927 case DW_CFA_same_value
:
2928 return "DW_CFA_same_value";
2929 case DW_CFA_register
:
2930 return "DW_CFA_register";
2931 case DW_CFA_remember_state
:
2932 return "DW_CFA_remember_state";
2933 case DW_CFA_restore_state
:
2934 return "DW_CFA_restore_state";
2935 case DW_CFA_def_cfa
:
2936 return "DW_CFA_def_cfa";
2937 case DW_CFA_def_cfa_register
:
2938 return "DW_CFA_def_cfa_register";
2939 case DW_CFA_def_cfa_offset
:
2940 return "DW_CFA_def_cfa_offset";
2943 case DW_CFA_def_cfa_expression
:
2944 return "DW_CFA_def_cfa_expression";
2945 case DW_CFA_expression
:
2946 return "DW_CFA_expression";
2947 case DW_CFA_offset_extended_sf
:
2948 return "DW_CFA_offset_extended_sf";
2949 case DW_CFA_def_cfa_sf
:
2950 return "DW_CFA_def_cfa_sf";
2951 case DW_CFA_def_cfa_offset_sf
:
2952 return "DW_CFA_def_cfa_offset_sf";
2954 /* SGI/MIPS specific */
2955 case DW_CFA_MIPS_advance_loc8
:
2956 return "DW_CFA_MIPS_advance_loc8";
2958 /* GNU extensions */
2959 case DW_CFA_GNU_window_save
:
2960 return "DW_CFA_GNU_window_save";
2961 case DW_CFA_GNU_args_size
:
2962 return "DW_CFA_GNU_args_size";
2963 case DW_CFA_GNU_negative_offset_extended
:
2964 return "DW_CFA_GNU_negative_offset_extended";
2967 return "DW_CFA_<unknown>";
2971 /* This routine will generate the correct assembly data for a location
2972 description based on a cfi entry with a complex address. */
2975 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
2977 dw_loc_descr_ref loc
;
2980 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
2983 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
2984 dw2_asm_output_data (1, r
, NULL
);
2985 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
2988 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
2990 /* Output the size of the block. */
2991 size
= size_of_locs (loc
);
2992 dw2_asm_output_data_uleb128 (size
, NULL
);
2994 /* Now output the operations themselves. */
2995 output_loc_sequence (loc
, for_eh
);
2998 /* Similar, but used for .cfi_escape. */
3001 output_cfa_loc_raw (dw_cfi_ref cfi
)
3003 dw_loc_descr_ref loc
;
3006 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3009 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3010 fprintf (asm_out_file
, "%#x,", r
);
3011 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3014 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3016 /* Output the size of the block. */
3017 size
= size_of_locs (loc
);
3018 dw2_asm_output_data_uleb128_raw (size
);
3019 fputc (',', asm_out_file
);
3021 /* Now output the operations themselves. */
3022 output_loc_sequence_raw (loc
);
3025 /* Output a Call Frame Information opcode and its operand(s). */
3028 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3033 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3034 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3035 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3036 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3037 ((unsigned HOST_WIDE_INT
)
3038 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3039 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3041 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3042 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3043 "DW_CFA_offset, column %#lx", r
);
3044 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3045 dw2_asm_output_data_uleb128 (off
, NULL
);
3047 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3049 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3050 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3051 "DW_CFA_restore, column %#lx", r
);
3055 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3056 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3058 switch (cfi
->dw_cfi_opc
)
3060 case DW_CFA_set_loc
:
3062 dw2_asm_output_encoded_addr_rtx (
3063 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3064 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3067 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3068 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3069 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3072 case DW_CFA_advance_loc1
:
3073 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3074 fde
->dw_fde_current_label
, NULL
);
3075 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3078 case DW_CFA_advance_loc2
:
3079 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3080 fde
->dw_fde_current_label
, NULL
);
3081 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3084 case DW_CFA_advance_loc4
:
3085 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3086 fde
->dw_fde_current_label
, NULL
);
3087 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3090 case DW_CFA_MIPS_advance_loc8
:
3091 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3092 fde
->dw_fde_current_label
, NULL
);
3093 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3096 case DW_CFA_offset_extended
:
3097 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3098 dw2_asm_output_data_uleb128 (r
, NULL
);
3099 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3100 dw2_asm_output_data_uleb128 (off
, NULL
);
3103 case DW_CFA_def_cfa
:
3104 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3105 dw2_asm_output_data_uleb128 (r
, NULL
);
3106 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3109 case DW_CFA_offset_extended_sf
:
3110 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3111 dw2_asm_output_data_uleb128 (r
, NULL
);
3112 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3113 dw2_asm_output_data_sleb128 (off
, NULL
);
3116 case DW_CFA_def_cfa_sf
:
3117 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3118 dw2_asm_output_data_uleb128 (r
, NULL
);
3119 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3120 dw2_asm_output_data_sleb128 (off
, NULL
);
3123 case DW_CFA_restore_extended
:
3124 case DW_CFA_undefined
:
3125 case DW_CFA_same_value
:
3126 case DW_CFA_def_cfa_register
:
3127 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3128 dw2_asm_output_data_uleb128 (r
, NULL
);
3131 case DW_CFA_register
:
3132 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3133 dw2_asm_output_data_uleb128 (r
, NULL
);
3134 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3135 dw2_asm_output_data_uleb128 (r
, NULL
);
3138 case DW_CFA_def_cfa_offset
:
3139 case DW_CFA_GNU_args_size
:
3140 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3143 case DW_CFA_def_cfa_offset_sf
:
3144 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3145 dw2_asm_output_data_sleb128 (off
, NULL
);
3148 case DW_CFA_GNU_window_save
:
3151 case DW_CFA_def_cfa_expression
:
3152 case DW_CFA_expression
:
3153 output_cfa_loc (cfi
, for_eh
);
3156 case DW_CFA_GNU_negative_offset_extended
:
3157 /* Obsoleted by DW_CFA_offset_extended_sf. */
3166 /* Similar, but do it via assembler directives instead. */
3169 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3171 unsigned long r
, r2
;
3173 switch (cfi
->dw_cfi_opc
)
3175 case DW_CFA_advance_loc
:
3176 case DW_CFA_advance_loc1
:
3177 case DW_CFA_advance_loc2
:
3178 case DW_CFA_advance_loc4
:
3179 case DW_CFA_MIPS_advance_loc8
:
3180 case DW_CFA_set_loc
:
3181 /* Should only be created in a code path not followed when emitting
3182 via directives. The assembler is going to take care of this for
3183 us. But this routines is also used for debugging dumps, so
3185 gcc_assert (f
!= asm_out_file
);
3186 fprintf (f
, "\t.cfi_advance_loc\n");
3190 case DW_CFA_offset_extended
:
3191 case DW_CFA_offset_extended_sf
:
3192 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3193 fprintf (f
, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3194 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3197 case DW_CFA_restore
:
3198 case DW_CFA_restore_extended
:
3199 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3200 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3203 case DW_CFA_undefined
:
3204 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3205 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3208 case DW_CFA_same_value
:
3209 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3210 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3213 case DW_CFA_def_cfa
:
3214 case DW_CFA_def_cfa_sf
:
3215 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3216 fprintf (f
, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3217 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3220 case DW_CFA_def_cfa_register
:
3221 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3222 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3225 case DW_CFA_register
:
3226 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3227 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3228 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3231 case DW_CFA_def_cfa_offset
:
3232 case DW_CFA_def_cfa_offset_sf
:
3233 fprintf (f
, "\t.cfi_def_cfa_offset "
3234 HOST_WIDE_INT_PRINT_DEC
"\n",
3235 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3238 case DW_CFA_remember_state
:
3239 fprintf (f
, "\t.cfi_remember_state\n");
3241 case DW_CFA_restore_state
:
3242 fprintf (f
, "\t.cfi_restore_state\n");
3245 case DW_CFA_GNU_args_size
:
3246 if (f
== asm_out_file
)
3248 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3249 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3251 fprintf (f
, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC
,
3252 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3257 fprintf (f
, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC
"\n",
3258 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3262 case DW_CFA_GNU_window_save
:
3263 fprintf (f
, "\t.cfi_window_save\n");
3266 case DW_CFA_def_cfa_expression
:
3267 if (f
!= asm_out_file
)
3269 fprintf (f
, "\t.cfi_def_cfa_expression ...\n");
3273 case DW_CFA_expression
:
3274 if (f
!= asm_out_file
)
3276 fprintf (f
, "\t.cfi_cfa_expression ...\n");
3279 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3280 output_cfa_loc_raw (cfi
);
3290 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3292 if (dwarf2out_do_cfi_asm ())
3293 output_cfi_directive (asm_out_file
, cfi
);
3297 /* Save the result of dwarf2out_do_frame across PCH.
3298 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3299 static GTY(()) signed char saved_do_cfi_asm
= 0;
3301 /* Decide whether we want to emit frame unwind information for the current
3302 translation unit. */
3305 dwarf2out_do_frame (void)
3307 /* We want to emit correct CFA location expressions or lists, so we
3308 have to return true if we're going to output debug info, even if
3309 we're not going to output frame or unwind info. */
3310 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3313 if (saved_do_cfi_asm
> 0)
3316 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3319 if ((flag_unwind_tables
|| flag_exceptions
)
3320 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3326 /* Decide whether to emit frame unwind via assembler directives. */
3329 dwarf2out_do_cfi_asm (void)
3333 #ifdef MIPS_DEBUGGING_INFO
3337 if (saved_do_cfi_asm
!= 0)
3338 return saved_do_cfi_asm
> 0;
3340 /* Assume failure for a moment. */
3341 saved_do_cfi_asm
= -1;
3343 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3345 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3348 /* Make sure the personality encoding is one the assembler can support.
3349 In particular, aligned addresses can't be handled. */
3350 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3351 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3353 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3354 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3357 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3358 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3359 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3360 && !flag_unwind_tables
&& !flag_exceptions
3361 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3365 saved_do_cfi_asm
= 1;
3370 gate_dwarf2_frame (void)
3372 #ifndef HAVE_prologue
3373 /* Targets which still implement the prologue in assembler text
3374 cannot use the generic dwarf2 unwinding. */
3378 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3379 from the optimized shrink-wrapping annotations that we will compute.
3380 For now, only produce the CFI notes for dwarf2. */
3381 return dwarf2out_do_frame ();
3384 struct rtl_opt_pass pass_dwarf2_frame
=
3388 "dwarf2", /* name */
3389 gate_dwarf2_frame
, /* gate */
3390 execute_dwarf2_frame
, /* execute */
3393 0, /* static_pass_number */
3394 TV_FINAL
, /* tv_id */
3395 0, /* properties_required */
3396 0, /* properties_provided */
3397 0, /* properties_destroyed */
3398 0, /* todo_flags_start */
3399 0 /* todo_flags_finish */
3403 #include "gt-dwarf2cfi.h"