1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
30 #include "double-int.h"
38 #include "stor-layout.h"
39 #include "hard-reg-set.h"
43 #include "dwarf2out.h"
44 #include "dwarf2asm.h"
46 #include "hash-table.h"
49 #include "common/common-target.h"
50 #include "tree-pass.h"
52 #include "except.h" /* expand_builtin_dwarf_sp_column */
54 #include "statistics.h"
55 #include "fixed-value.h"
56 #include "insn-config.h"
64 #include "expr.h" /* init_return_column_size */
65 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
66 #include "output.h" /* asm_out_file */
67 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
70 /* ??? Poison these here until it can be done generically. They've been
71 totally replaced in this file; make sure it stays that way. */
72 #undef DWARF2_UNWIND_INFO
73 #undef DWARF2_FRAME_INFO
74 #if (GCC_VERSION >= 3000)
75 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
78 #ifndef INCOMING_RETURN_ADDR_RTX
79 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
82 /* Maximum size (in bytes) of an artificially generated label. */
83 #define MAX_ARTIFICIAL_LABEL_BYTES 30
85 /* A collected description of an entire row of the abstract CFI table. */
86 typedef struct GTY(()) dw_cfi_row_struct
88 /* The expression that computes the CFA, expressed in two different ways.
89 The CFA member for the simple cases, and the full CFI expression for
90 the complex cases. The later will be a DW_CFA_cfa_expression. */
94 /* The expressions for any register column that is saved. */
98 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
99 typedef struct GTY(()) reg_saved_in_data_struct
{
105 /* Since we no longer have a proper CFG, we're going to create a facsimile
106 of one on the fly while processing the frame-related insns.
108 We create dw_trace_info structures for each extended basic block beginning
109 and ending at a "save point". Save points are labels, barriers, certain
110 notes, and of course the beginning and end of the function.
112 As we encounter control transfer insns, we propagate the "current"
113 row state across the edges to the starts of traces. When checking is
114 enabled, we validate that we propagate the same data from all sources.
116 All traces are members of the TRACE_INFO array, in the order in which
117 they appear in the instruction stream.
119 All save points are present in the TRACE_INDEX hash, mapping the insn
120 starting a trace to the dw_trace_info describing the trace. */
124 /* The insn that begins the trace. */
127 /* The row state at the beginning and end of the trace. */
128 dw_cfi_row
*beg_row
, *end_row
;
130 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
131 while scanning insns. However, the args_size value is irrelevant at
132 any point except can_throw_internal_p insns. Therefore the "delay"
133 sizes the values that must actually be emitted for this trace. */
134 HOST_WIDE_INT beg_true_args_size
, end_true_args_size
;
135 HOST_WIDE_INT beg_delay_args_size
, end_delay_args_size
;
137 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
140 /* The following variables contain data used in interpreting frame related
141 expressions. These are not part of the "real" row state as defined by
142 Dwarf, but it seems like they need to be propagated into a trace in case
143 frame related expressions have been sunk. */
144 /* ??? This seems fragile. These variables are fragments of a larger
145 expression. If we do not keep the entire expression together, we risk
146 not being able to put it together properly. Consider forcing targets
147 to generate self-contained expressions and dropping all of the magic
148 interpretation code in this file. Or at least refusing to shrink wrap
149 any frame related insn that doesn't contain a complete expression. */
151 /* The register used for saving registers to the stack, and its offset
153 dw_cfa_location cfa_store
;
155 /* A temporary register holding an integral value used in adjusting SP
156 or setting up the store_reg. The "offset" field holds the integer
157 value, not an offset. */
158 dw_cfa_location cfa_temp
;
160 /* A set of registers saved in other registers. This is the inverse of
161 the row->reg_save info, if the entry is a DW_CFA_register. This is
162 implemented as a flat array because it normally contains zero or 1
163 entry, depending on the target. IA-64 is the big spender here, using
164 a maximum of 5 entries. */
165 vec
<reg_saved_in_data
> regs_saved_in_regs
;
167 /* An identifier for this trace. Used only for debugging dumps. */
170 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
171 bool switch_sections
;
173 /* True if we've seen different values incoming to beg_true_args_size. */
174 bool args_size_undefined
;
178 typedef dw_trace_info
*dw_trace_info_ref
;
181 /* Hashtable helpers. */
183 struct trace_info_hasher
: typed_noop_remove
<dw_trace_info
>
185 typedef dw_trace_info value_type
;
186 typedef dw_trace_info compare_type
;
187 static inline hashval_t
hash (const value_type
*);
188 static inline bool equal (const value_type
*, const compare_type
*);
192 trace_info_hasher::hash (const value_type
*ti
)
194 return INSN_UID (ti
->head
);
198 trace_info_hasher::equal (const value_type
*a
, const compare_type
*b
)
200 return a
->head
== b
->head
;
204 /* The variables making up the pseudo-cfg, as described above. */
205 static vec
<dw_trace_info
> trace_info
;
206 static vec
<dw_trace_info_ref
> trace_work_list
;
207 static hash_table
<trace_info_hasher
> *trace_index
;
209 /* A vector of call frame insns for the CIE. */
212 /* The state of the first row of the FDE table, which includes the
213 state provided by the CIE. */
214 static GTY(()) dw_cfi_row
*cie_cfi_row
;
216 static GTY(()) reg_saved_in_data
*cie_return_save
;
218 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
220 /* The insn after which a new CFI note should be emitted. */
221 static rtx add_cfi_insn
;
223 /* When non-null, add_cfi will add the CFI to this vector. */
224 static cfi_vec
*add_cfi_vec
;
226 /* The current instruction trace. */
227 static dw_trace_info
*cur_trace
;
229 /* The current, i.e. most recently generated, row of the CFI table. */
230 static dw_cfi_row
*cur_row
;
232 /* A copy of the current CFA, for use during the processing of a
234 static dw_cfa_location
*cur_cfa
;
236 /* We delay emitting a register save until either (a) we reach the end
237 of the prologue or (b) the register is clobbered. This clusters
238 register saves so that there are fewer pc advances. */
243 HOST_WIDE_INT cfa_offset
;
247 static vec
<queued_reg_save
> queued_reg_saves
;
249 /* True if any CFI directives were emitted at the current insn. */
250 static bool any_cfis_emitted
;
252 /* Short-hand for commonly used register numbers. */
253 static unsigned dw_stack_pointer_regnum
;
254 static unsigned dw_frame_pointer_regnum
;
256 /* Hook used by __throw. */
259 expand_builtin_dwarf_sp_column (void)
261 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
262 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
265 /* MEM is a memory reference for the register size table, each element of
266 which has mode MODE. Initialize column C as a return address column. */
269 init_return_column_size (machine_mode mode
, rtx mem
, unsigned int c
)
271 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
272 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
273 emit_move_insn (adjust_address (mem
, mode
, offset
),
274 gen_int_mode (size
, mode
));
277 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
278 init_one_dwarf_reg_size to communicate on what has been done by the
283 /* Whether the dwarf return column was initialized. */
284 bool wrote_return_column
;
286 /* For each hard register REGNO, whether init_one_dwarf_reg_size
287 was given REGNO to process already. */
288 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
290 } init_one_dwarf_reg_state
;
292 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
293 initialize the dwarf register size table entry corresponding to register
294 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
295 use for the size entry to initialize, and INIT_STATE is the communication
296 datastructure conveying what we're doing to our caller. */
299 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
300 rtx table
, machine_mode slotmode
,
301 init_one_dwarf_reg_state
*init_state
)
303 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
304 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
305 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
307 const HOST_WIDE_INT slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
308 const HOST_WIDE_INT regsize
= GET_MODE_SIZE (regmode
);
310 init_state
->processed_regno
[regno
] = true;
312 if (rnum
>= DWARF_FRAME_REGISTERS
)
315 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
317 if (regmode
== VOIDmode
)
319 init_state
->wrote_return_column
= true;
325 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
326 gen_int_mode (regsize
, slotmode
));
329 /* Generate code to initialize the dwarf register size table located
330 at the provided ADDRESS. */
333 expand_builtin_init_dwarf_reg_sizes (tree address
)
336 machine_mode mode
= TYPE_MODE (char_type_node
);
337 rtx addr
= expand_normal (address
);
338 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
340 init_one_dwarf_reg_state init_state
;
342 memset ((char *)&init_state
, 0, sizeof (init_state
));
344 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
346 machine_mode save_mode
;
349 /* No point in processing a register multiple times. This could happen
350 with register spans, e.g. when a reg is first processed as a piece of
351 a span, then as a register on its own later on. */
353 if (init_state
.processed_regno
[i
])
356 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
357 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
360 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
363 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
365 rtx reg
= XVECEXP (span
, 0, si
);
367 init_one_dwarf_reg_size
368 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
373 if (!init_state
.wrote_return_column
)
374 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
376 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
377 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
380 targetm
.init_dwarf_reg_sizes_extra (address
);
384 static dw_trace_info
*
385 get_trace_info (rtx_insn
*insn
)
389 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
393 save_point_p (rtx_insn
*insn
)
395 /* Labels, except those that are really jump tables. */
397 return inside_basic_block_p (insn
);
399 /* We split traces at the prologue/epilogue notes because those
400 are points at which the unwind info is usually stable. This
401 makes it easier to find spots with identical unwind info so
402 that we can use remember/restore_state opcodes. */
404 switch (NOTE_KIND (insn
))
406 case NOTE_INSN_PROLOGUE_END
:
407 case NOTE_INSN_EPILOGUE_BEG
:
414 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
416 static inline HOST_WIDE_INT
417 div_data_align (HOST_WIDE_INT off
)
419 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
420 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
424 /* Return true if we need a signed version of a given opcode
425 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
428 need_data_align_sf_opcode (HOST_WIDE_INT off
)
430 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
433 /* Return a pointer to a newly allocated Call Frame Instruction. */
435 static inline dw_cfi_ref
438 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
440 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
441 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
446 /* Return a newly allocated CFI row, with no defined data. */
451 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
453 row
->cfa
.reg
= INVALID_REGNUM
;
458 /* Return a copy of an existing CFI row. */
461 copy_cfi_row (dw_cfi_row
*src
)
463 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
466 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
471 /* Generate a new label for the CFI info to refer to. */
474 dwarf2out_cfi_label (void)
476 int num
= dwarf2out_cfi_label_num
++;
479 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
481 return xstrdup (label
);
484 /* Add CFI either to the current insn stream or to a vector, or both. */
487 add_cfi (dw_cfi_ref cfi
)
489 any_cfis_emitted
= true;
491 if (add_cfi_insn
!= NULL
)
493 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
494 NOTE_CFI (add_cfi_insn
) = cfi
;
497 if (add_cfi_vec
!= NULL
)
498 vec_safe_push (*add_cfi_vec
, cfi
);
502 add_cfi_args_size (HOST_WIDE_INT size
)
504 dw_cfi_ref cfi
= new_cfi ();
506 /* While we can occasionally have args_size < 0 internally, this state
507 should not persist at a point we actually need an opcode. */
508 gcc_assert (size
>= 0);
510 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
511 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
517 add_cfi_restore (unsigned reg
)
519 dw_cfi_ref cfi
= new_cfi ();
521 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
522 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
527 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
528 that the register column is no longer saved. */
531 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
533 if (vec_safe_length (row
->reg_save
) <= column
)
534 vec_safe_grow_cleared (row
->reg_save
, column
+ 1);
535 (*row
->reg_save
)[column
] = cfi
;
538 /* This function fills in aa dw_cfa_location structure from a dwarf location
539 descriptor sequence. */
542 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
544 struct dw_loc_descr_node
*ptr
;
546 cfa
->base_offset
= 0;
550 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
552 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
588 cfa
->reg
= op
- DW_OP_reg0
;
591 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
625 cfa
->reg
= op
- DW_OP_breg0
;
626 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
629 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
630 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
635 case DW_OP_plus_uconst
:
636 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
644 /* Find the previous value for the CFA, iteratively. CFI is the opcode
645 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
646 one level of remember/restore state processing. */
649 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
651 switch (cfi
->dw_cfi_opc
)
653 case DW_CFA_def_cfa_offset
:
654 case DW_CFA_def_cfa_offset_sf
:
655 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
657 case DW_CFA_def_cfa_register
:
658 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
661 case DW_CFA_def_cfa_sf
:
662 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
663 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
665 case DW_CFA_def_cfa_expression
:
666 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
669 case DW_CFA_remember_state
:
670 gcc_assert (!remember
->in_use
);
672 remember
->in_use
= 1;
674 case DW_CFA_restore_state
:
675 gcc_assert (remember
->in_use
);
677 remember
->in_use
= 0;
685 /* Determine if two dw_cfa_location structures define the same data. */
688 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
690 return (loc1
->reg
== loc2
->reg
691 && loc1
->offset
== loc2
->offset
692 && loc1
->indirect
== loc2
->indirect
693 && (loc1
->indirect
== 0
694 || loc1
->base_offset
== loc2
->base_offset
));
697 /* Determine if two CFI operands are identical. */
700 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
704 case dw_cfi_oprnd_unused
:
706 case dw_cfi_oprnd_reg_num
:
707 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
708 case dw_cfi_oprnd_offset
:
709 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
710 case dw_cfi_oprnd_addr
:
711 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
712 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
713 case dw_cfi_oprnd_loc
:
714 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
719 /* Determine if two CFI entries are identical. */
722 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
724 enum dwarf_call_frame_info opc
;
726 /* Make things easier for our callers, including missing operands. */
729 if (a
== NULL
|| b
== NULL
)
732 /* Obviously, the opcodes must match. */
734 if (opc
!= b
->dw_cfi_opc
)
737 /* Compare the two operands, re-using the type of the operands as
738 already exposed elsewhere. */
739 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
740 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
741 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
742 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
745 /* Determine if two CFI_ROW structures are identical. */
748 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
750 size_t i
, n_a
, n_b
, n_max
;
754 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
757 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
760 n_a
= vec_safe_length (a
->reg_save
);
761 n_b
= vec_safe_length (b
->reg_save
);
762 n_max
= MAX (n_a
, n_b
);
764 for (i
= 0; i
< n_max
; ++i
)
766 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
769 r_a
= (*a
->reg_save
)[i
];
771 r_b
= (*b
->reg_save
)[i
];
773 if (!cfi_equal_p (r_a
, r_b
))
780 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
781 what opcode to emit. Returns the CFI opcode to effect the change, or
782 NULL if NEW_CFA == OLD_CFA. */
785 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
789 /* If nothing changed, no need to issue any call frame instructions. */
790 if (cfa_equal_p (old_cfa
, new_cfa
))
795 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
797 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
798 the CFA register did not change but the offset did. The data
799 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
800 in the assembler via the .cfi_def_cfa_offset directive. */
801 if (new_cfa
->offset
< 0)
802 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
804 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
805 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
807 else if (new_cfa
->offset
== old_cfa
->offset
808 && old_cfa
->reg
!= INVALID_REGNUM
809 && !new_cfa
->indirect
810 && !old_cfa
->indirect
)
812 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
813 indicating the CFA register has changed to <register> but the
814 offset has not changed. */
815 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
816 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
818 else if (new_cfa
->indirect
== 0)
820 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
821 indicating the CFA register has changed to <register> with
822 the specified offset. The data factoring for DW_CFA_def_cfa_sf
823 happens in output_cfi, or in the assembler via the .cfi_def_cfa
825 if (new_cfa
->offset
< 0)
826 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
828 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
829 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
830 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
834 /* Construct a DW_CFA_def_cfa_expression instruction to
835 calculate the CFA using a full location expression since no
836 register-offset pair is available. */
837 struct dw_loc_descr_node
*loc_list
;
839 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
840 loc_list
= build_cfa_loc (new_cfa
, 0);
841 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
847 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
850 def_cfa_1 (dw_cfa_location
*new_cfa
)
854 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
855 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
857 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
860 cur_row
->cfa
= *new_cfa
;
861 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
868 /* Add the CFI for saving a register. REG is the CFA column number.
869 If SREG is -1, the register is saved at OFFSET from the CFA;
870 otherwise it is saved in SREG. */
873 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
875 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
876 dw_cfi_ref cfi
= new_cfi ();
878 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
880 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
882 && fde
->stack_realign
883 && sreg
== INVALID_REGNUM
)
885 cfi
->dw_cfi_opc
= DW_CFA_expression
;
886 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
887 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
888 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
889 fde
->stack_realignment
);
891 else if (sreg
== INVALID_REGNUM
)
893 if (need_data_align_sf_opcode (offset
))
894 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
895 else if (reg
& ~0x3f)
896 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
898 cfi
->dw_cfi_opc
= DW_CFA_offset
;
899 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
901 else if (sreg
== reg
)
903 /* While we could emit something like DW_CFA_same_value or
904 DW_CFA_restore, we never expect to see something like that
905 in a prologue. This is more likely to be a bug. A backend
906 can always bypass this by using REG_CFA_RESTORE directly. */
911 cfi
->dw_cfi_opc
= DW_CFA_register
;
912 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
916 update_row_reg_save (cur_row
, reg
, cfi
);
919 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
920 and adjust data structures to match. */
923 notice_args_size (rtx insn
)
925 HOST_WIDE_INT args_size
, delta
;
928 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
932 args_size
= INTVAL (XEXP (note
, 0));
933 delta
= args_size
- cur_trace
->end_true_args_size
;
937 cur_trace
->end_true_args_size
= args_size
;
939 /* If the CFA is computed off the stack pointer, then we must adjust
940 the computation of the CFA as well. */
941 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
943 gcc_assert (!cur_cfa
->indirect
);
945 /* Convert a change in args_size (always a positive in the
946 direction of stack growth) to a change in stack pointer. */
947 #ifndef STACK_GROWS_DOWNWARD
950 cur_cfa
->offset
+= delta
;
954 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
955 data within the trace related to EH insns and args_size. */
958 notice_eh_throw (rtx_insn
*insn
)
960 HOST_WIDE_INT args_size
;
962 args_size
= cur_trace
->end_true_args_size
;
963 if (cur_trace
->eh_head
== NULL
)
965 cur_trace
->eh_head
= insn
;
966 cur_trace
->beg_delay_args_size
= args_size
;
967 cur_trace
->end_delay_args_size
= args_size
;
969 else if (cur_trace
->end_delay_args_size
!= args_size
)
971 cur_trace
->end_delay_args_size
= args_size
;
973 /* ??? If the CFA is the stack pointer, search backward for the last
974 CFI note and insert there. Given that the stack changed for the
975 args_size change, there *must* be such a note in between here and
977 add_cfi_args_size (args_size
);
981 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
982 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
983 used in places where rtl is prohibited. */
985 static inline unsigned
986 dwf_regno (const_rtx reg
)
988 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
989 return DWARF_FRAME_REGNUM (REGNO (reg
));
992 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
995 compare_reg_or_pc (rtx x
, rtx y
)
997 if (REG_P (x
) && REG_P (y
))
998 return REGNO (x
) == REGNO (y
);
1002 /* Record SRC as being saved in DEST. DEST may be null to delete an
1003 existing entry. SRC may be a register or PC_RTX. */
1006 record_reg_saved_in_reg (rtx dest
, rtx src
)
1008 reg_saved_in_data
*elt
;
1011 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
1012 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1015 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
1017 elt
->saved_in_reg
= dest
;
1024 reg_saved_in_data e
= {src
, dest
};
1025 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1028 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1029 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1032 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
1035 queued_reg_save e
= {reg
, sreg
, offset
};
1038 /* Duplicates waste space, but it's also necessary to remove them
1039 for correctness, since the queue gets output in reverse order. */
1040 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1041 if (compare_reg_or_pc (q
->reg
, reg
))
1047 queued_reg_saves
.safe_push (e
);
1050 /* Output all the entries in QUEUED_REG_SAVES. */
1053 dwarf2out_flush_queued_reg_saves (void)
1058 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1060 unsigned int reg
, sreg
;
1062 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1064 if (q
->reg
== pc_rtx
)
1065 reg
= DWARF_FRAME_RETURN_COLUMN
;
1067 reg
= dwf_regno (q
->reg
);
1069 sreg
= dwf_regno (q
->saved_reg
);
1071 sreg
= INVALID_REGNUM
;
1072 reg_save (reg
, sreg
, q
->cfa_offset
);
1075 queued_reg_saves
.truncate (0);
1078 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1079 location for? Or, does it clobber a register which we've previously
1080 said that some other register is saved in, and for which we now
1081 have a new location for? */
1084 clobbers_queued_reg_save (const_rtx insn
)
1089 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1092 reg_saved_in_data
*rir
;
1094 if (modified_in_p (q
->reg
, insn
))
1097 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1098 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1099 && modified_in_p (rir
->saved_in_reg
, insn
))
1106 /* What register, if any, is currently saved in REG? */
1109 reg_saved_in (rtx reg
)
1111 unsigned int regn
= REGNO (reg
);
1113 reg_saved_in_data
*rir
;
1116 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1117 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1120 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1121 if (regn
== REGNO (rir
->saved_in_reg
))
1122 return rir
->orig_reg
;
1127 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1130 dwarf2out_frame_debug_def_cfa (rtx pat
)
1132 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1134 if (GET_CODE (pat
) == PLUS
)
1136 cur_cfa
->offset
= INTVAL (XEXP (pat
, 1));
1137 pat
= XEXP (pat
, 0);
1141 cur_cfa
->indirect
= 1;
1142 pat
= XEXP (pat
, 0);
1143 if (GET_CODE (pat
) == PLUS
)
1145 cur_cfa
->base_offset
= INTVAL (XEXP (pat
, 1));
1146 pat
= XEXP (pat
, 0);
1149 /* ??? If this fails, we could be calling into the _loc functions to
1150 define a full expression. So far no port does that. */
1151 gcc_assert (REG_P (pat
));
1152 cur_cfa
->reg
= dwf_regno (pat
);
1155 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1158 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1162 gcc_assert (GET_CODE (pat
) == SET
);
1163 dest
= XEXP (pat
, 0);
1164 src
= XEXP (pat
, 1);
1166 switch (GET_CODE (src
))
1169 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1170 cur_cfa
->offset
-= INTVAL (XEXP (src
, 1));
1180 cur_cfa
->reg
= dwf_regno (dest
);
1181 gcc_assert (cur_cfa
->indirect
== 0);
1184 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1187 dwarf2out_frame_debug_cfa_offset (rtx set
)
1189 HOST_WIDE_INT offset
;
1190 rtx src
, addr
, span
;
1191 unsigned int sregno
;
1193 src
= XEXP (set
, 1);
1194 addr
= XEXP (set
, 0);
1195 gcc_assert (MEM_P (addr
));
1196 addr
= XEXP (addr
, 0);
1198 /* As documented, only consider extremely simple addresses. */
1199 switch (GET_CODE (addr
))
1202 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1203 offset
= -cur_cfa
->offset
;
1206 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1207 offset
= INTVAL (XEXP (addr
, 1)) - cur_cfa
->offset
;
1216 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1220 span
= targetm
.dwarf_register_span (src
);
1221 sregno
= dwf_regno (src
);
1224 /* ??? We'd like to use queue_reg_save, but we need to come up with
1225 a different flushing heuristic for epilogues. */
1227 reg_save (sregno
, INVALID_REGNUM
, offset
);
1230 /* We have a PARALLEL describing where the contents of SRC live.
1231 Adjust the offset for each piece of the PARALLEL. */
1232 HOST_WIDE_INT span_offset
= offset
;
1234 gcc_assert (GET_CODE (span
) == PARALLEL
);
1236 const int par_len
= XVECLEN (span
, 0);
1237 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1239 rtx elem
= XVECEXP (span
, 0, par_index
);
1240 sregno
= dwf_regno (src
);
1241 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1242 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1247 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1250 dwarf2out_frame_debug_cfa_register (rtx set
)
1253 unsigned sregno
, dregno
;
1255 src
= XEXP (set
, 1);
1256 dest
= XEXP (set
, 0);
1258 record_reg_saved_in_reg (dest
, src
);
1260 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1262 sregno
= dwf_regno (src
);
1264 dregno
= dwf_regno (dest
);
1266 /* ??? We'd like to use queue_reg_save, but we need to come up with
1267 a different flushing heuristic for epilogues. */
1268 reg_save (sregno
, dregno
, 0);
1271 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1274 dwarf2out_frame_debug_cfa_expression (rtx set
)
1276 rtx src
, dest
, span
;
1277 dw_cfi_ref cfi
= new_cfi ();
1280 dest
= SET_DEST (set
);
1281 src
= SET_SRC (set
);
1283 gcc_assert (REG_P (src
));
1284 gcc_assert (MEM_P (dest
));
1286 span
= targetm
.dwarf_register_span (src
);
1289 regno
= dwf_regno (src
);
1291 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1292 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1293 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1294 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1295 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1297 /* ??? We'd like to use queue_reg_save, were the interface different,
1298 and, as above, we could manage flushing for epilogues. */
1300 update_row_reg_save (cur_row
, regno
, cfi
);
1303 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1306 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1308 gcc_assert (REG_P (reg
));
1310 rtx span
= targetm
.dwarf_register_span (reg
);
1313 unsigned int regno
= dwf_regno (reg
);
1314 add_cfi_restore (regno
);
1315 update_row_reg_save (cur_row
, regno
, NULL
);
1319 /* We have a PARALLEL describing where the contents of REG live.
1320 Restore the register for each piece of the PARALLEL. */
1321 gcc_assert (GET_CODE (span
) == PARALLEL
);
1323 const int par_len
= XVECLEN (span
, 0);
1324 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1326 reg
= XVECEXP (span
, 0, par_index
);
1327 gcc_assert (REG_P (reg
));
1328 unsigned int regno
= dwf_regno (reg
);
1329 add_cfi_restore (regno
);
1330 update_row_reg_save (cur_row
, regno
, NULL
);
1335 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1336 ??? Perhaps we should note in the CIE where windows are saved (instead of
1337 assuming 0(cfa)) and what registers are in the window. */
1340 dwarf2out_frame_debug_cfa_window_save (void)
1342 dw_cfi_ref cfi
= new_cfi ();
1344 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1348 /* Record call frame debugging information for an expression EXPR,
1349 which either sets SP or FP (adjusting how we calculate the frame
1350 address) or saves a register to the stack or another register.
1351 LABEL indicates the address of EXPR.
1353 This function encodes a state machine mapping rtxes to actions on
1354 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1355 users need not read the source code.
1357 The High-Level Picture
1359 Changes in the register we use to calculate the CFA: Currently we
1360 assume that if you copy the CFA register into another register, we
1361 should take the other one as the new CFA register; this seems to
1362 work pretty well. If it's wrong for some target, it's simple
1363 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1365 Changes in the register we use for saving registers to the stack:
1366 This is usually SP, but not always. Again, we deduce that if you
1367 copy SP into another register (and SP is not the CFA register),
1368 then the new register is the one we will be using for register
1369 saves. This also seems to work.
1371 Register saves: There's not much guesswork about this one; if
1372 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1373 register save, and the register used to calculate the destination
1374 had better be the one we think we're using for this purpose.
1375 It's also assumed that a copy from a call-saved register to another
1376 register is saving that register if RTX_FRAME_RELATED_P is set on
1377 that instruction. If the copy is from a call-saved register to
1378 the *same* register, that means that the register is now the same
1379 value as in the caller.
1381 Except: If the register being saved is the CFA register, and the
1382 offset is nonzero, we are saving the CFA, so we assume we have to
1383 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1384 the intent is to save the value of SP from the previous frame.
1386 In addition, if a register has previously been saved to a different
1389 Invariants / Summaries of Rules
1391 cfa current rule for calculating the CFA. It usually
1392 consists of a register and an offset. This is
1393 actually stored in *cur_cfa, but abbreviated
1394 for the purposes of this documentation.
1395 cfa_store register used by prologue code to save things to the stack
1396 cfa_store.offset is the offset from the value of
1397 cfa_store.reg to the actual CFA
1398 cfa_temp register holding an integral value. cfa_temp.offset
1399 stores the value, which will be used to adjust the
1400 stack pointer. cfa_temp is also used like cfa_store,
1401 to track stores to the stack via fp or a temp reg.
1403 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1404 with cfa.reg as the first operand changes the cfa.reg and its
1405 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1408 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1409 expression yielding a constant. This sets cfa_temp.reg
1410 and cfa_temp.offset.
1412 Rule 5: Create a new register cfa_store used to save items to the
1415 Rules 10-14: Save a register to the stack. Define offset as the
1416 difference of the original location and cfa_store's
1417 location (or cfa_temp's location if cfa_temp is used).
1419 Rules 16-20: If AND operation happens on sp in prologue, we assume
1420 stack is realigned. We will use a group of DW_OP_XXX
1421 expressions to represent the location of the stored
1422 register instead of CFA+offset.
1426 "{a,b}" indicates a choice of a xor b.
1427 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1430 (set <reg1> <reg2>:cfa.reg)
1431 effects: cfa.reg = <reg1>
1432 cfa.offset unchanged
1433 cfa_temp.reg = <reg1>
1434 cfa_temp.offset = cfa.offset
1437 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1438 {<const_int>,<reg>:cfa_temp.reg}))
1439 effects: cfa.reg = sp if fp used
1440 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1441 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1442 if cfa_store.reg==sp
1445 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1446 effects: cfa.reg = fp
1447 cfa_offset += +/- <const_int>
1450 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1451 constraints: <reg1> != fp
1453 effects: cfa.reg = <reg1>
1454 cfa_temp.reg = <reg1>
1455 cfa_temp.offset = cfa.offset
1458 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1459 constraints: <reg1> != fp
1461 effects: cfa_store.reg = <reg1>
1462 cfa_store.offset = cfa.offset - cfa_temp.offset
1465 (set <reg> <const_int>)
1466 effects: cfa_temp.reg = <reg>
1467 cfa_temp.offset = <const_int>
1470 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1471 effects: cfa_temp.reg = <reg1>
1472 cfa_temp.offset |= <const_int>
1475 (set <reg> (high <exp>))
1479 (set <reg> (lo_sum <exp> <const_int>))
1480 effects: cfa_temp.reg = <reg>
1481 cfa_temp.offset = <const_int>
1484 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1485 effects: cfa_store.offset -= <const_int>
1486 cfa.offset = cfa_store.offset if cfa.reg == sp
1488 cfa.base_offset = -cfa_store.offset
1491 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1492 effects: cfa_store.offset += -/+ mode_size(mem)
1493 cfa.offset = cfa_store.offset if cfa.reg == sp
1495 cfa.base_offset = -cfa_store.offset
1498 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1501 effects: cfa.reg = <reg1>
1502 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1505 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1506 effects: cfa.reg = <reg1>
1507 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1510 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1511 effects: cfa.reg = <reg1>
1512 cfa.base_offset = -cfa_temp.offset
1513 cfa_temp.offset -= mode_size(mem)
1516 (set <reg> {unspec, unspec_volatile})
1517 effects: target-dependent
1520 (set sp (and: sp <const_int>))
1521 constraints: cfa_store.reg == sp
1522 effects: cfun->fde.stack_realign = 1
1523 cfa_store.offset = 0
1524 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1527 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1528 effects: cfa_store.offset += -/+ mode_size(mem)
1531 (set (mem ({pre_inc, pre_dec} sp)) fp)
1532 constraints: fde->stack_realign == 1
1533 effects: cfa_store.offset = 0
1534 cfa.reg != HARD_FRAME_POINTER_REGNUM
1537 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1538 constraints: fde->stack_realign == 1
1540 && cfa.indirect == 0
1541 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1542 effects: Use DW_CFA_def_cfa_expression to define cfa
1543 cfa.reg == fde->drap_reg */
1546 dwarf2out_frame_debug_expr (rtx expr
)
1548 rtx src
, dest
, span
;
1549 HOST_WIDE_INT offset
;
1552 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1553 the PARALLEL independently. The first element is always processed if
1554 it is a SET. This is for backward compatibility. Other elements
1555 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1556 flag is set in them. */
1557 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1560 int limit
= XVECLEN (expr
, 0);
1563 /* PARALLELs have strict read-modify-write semantics, so we
1564 ought to evaluate every rvalue before changing any lvalue.
1565 It's cumbersome to do that in general, but there's an
1566 easy approximation that is enough for all current users:
1567 handle register saves before register assignments. */
1568 if (GET_CODE (expr
) == PARALLEL
)
1569 for (par_index
= 0; par_index
< limit
; par_index
++)
1571 elem
= XVECEXP (expr
, 0, par_index
);
1572 if (GET_CODE (elem
) == SET
1573 && MEM_P (SET_DEST (elem
))
1574 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1575 dwarf2out_frame_debug_expr (elem
);
1578 for (par_index
= 0; par_index
< limit
; par_index
++)
1580 elem
= XVECEXP (expr
, 0, par_index
);
1581 if (GET_CODE (elem
) == SET
1582 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1583 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1584 dwarf2out_frame_debug_expr (elem
);
1589 gcc_assert (GET_CODE (expr
) == SET
);
1591 src
= SET_SRC (expr
);
1592 dest
= SET_DEST (expr
);
1596 rtx rsi
= reg_saved_in (src
);
1603 switch (GET_CODE (dest
))
1606 switch (GET_CODE (src
))
1608 /* Setting FP from SP. */
1610 if (cur_cfa
->reg
== dwf_regno (src
))
1613 /* Update the CFA rule wrt SP or FP. Make sure src is
1614 relative to the current CFA register.
1616 We used to require that dest be either SP or FP, but the
1617 ARM copies SP to a temporary register, and from there to
1618 FP. So we just rely on the backends to only set
1619 RTX_FRAME_RELATED_P on appropriate insns. */
1620 cur_cfa
->reg
= dwf_regno (dest
);
1621 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1622 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1626 /* Saving a register in a register. */
1627 gcc_assert (!fixed_regs
[REGNO (dest
)]
1628 /* For the SPARC and its register window. */
1629 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1631 /* After stack is aligned, we can only save SP in FP
1632 if drap register is used. In this case, we have
1633 to restore stack pointer with the CFA value and we
1634 don't generate this DWARF information. */
1636 && fde
->stack_realign
1637 && REGNO (src
) == STACK_POINTER_REGNUM
)
1638 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1639 && fde
->drap_reg
!= INVALID_REGNUM
1640 && cur_cfa
->reg
!= dwf_regno (src
));
1642 queue_reg_save (src
, dest
, 0);
1649 if (dest
== stack_pointer_rtx
)
1653 switch (GET_CODE (XEXP (src
, 1)))
1656 offset
= INTVAL (XEXP (src
, 1));
1659 gcc_assert (dwf_regno (XEXP (src
, 1))
1660 == cur_trace
->cfa_temp
.reg
);
1661 offset
= cur_trace
->cfa_temp
.offset
;
1667 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1669 /* Restoring SP from FP in the epilogue. */
1670 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1671 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1673 else if (GET_CODE (src
) == LO_SUM
)
1674 /* Assume we've set the source reg of the LO_SUM from sp. */
1677 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1679 if (GET_CODE (src
) != MINUS
)
1681 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1682 cur_cfa
->offset
+= offset
;
1683 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1684 cur_trace
->cfa_store
.offset
+= offset
;
1686 else if (dest
== hard_frame_pointer_rtx
)
1689 /* Either setting the FP from an offset of the SP,
1690 or adjusting the FP */
1691 gcc_assert (frame_pointer_needed
);
1693 gcc_assert (REG_P (XEXP (src
, 0))
1694 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1695 && CONST_INT_P (XEXP (src
, 1)));
1696 offset
= INTVAL (XEXP (src
, 1));
1697 if (GET_CODE (src
) != MINUS
)
1699 cur_cfa
->offset
+= offset
;
1700 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1704 gcc_assert (GET_CODE (src
) != MINUS
);
1707 if (REG_P (XEXP (src
, 0))
1708 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1709 && CONST_INT_P (XEXP (src
, 1)))
1711 /* Setting a temporary CFA register that will be copied
1712 into the FP later on. */
1713 offset
= - INTVAL (XEXP (src
, 1));
1714 cur_cfa
->offset
+= offset
;
1715 cur_cfa
->reg
= dwf_regno (dest
);
1716 /* Or used to save regs to the stack. */
1717 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1718 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1722 else if (REG_P (XEXP (src
, 0))
1723 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1724 && XEXP (src
, 1) == stack_pointer_rtx
)
1726 /* Setting a scratch register that we will use instead
1727 of SP for saving registers to the stack. */
1728 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1729 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1730 cur_trace
->cfa_store
.offset
1731 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1735 else if (GET_CODE (src
) == LO_SUM
1736 && CONST_INT_P (XEXP (src
, 1)))
1738 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1739 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1748 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1749 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1754 gcc_assert (REG_P (XEXP (src
, 0))
1755 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1756 && CONST_INT_P (XEXP (src
, 1)));
1758 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1759 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1762 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1763 which will fill in all of the bits. */
1770 case UNSPEC_VOLATILE
:
1771 /* All unspecs should be represented by REG_CFA_* notes. */
1777 /* If this AND operation happens on stack pointer in prologue,
1778 we assume the stack is realigned and we extract the
1780 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1782 /* We interpret reg_save differently with stack_realign set.
1783 Thus we must flush whatever we have queued first. */
1784 dwarf2out_flush_queued_reg_saves ();
1786 gcc_assert (cur_trace
->cfa_store
.reg
1787 == dwf_regno (XEXP (src
, 0)));
1788 fde
->stack_realign
= 1;
1789 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1790 cur_trace
->cfa_store
.offset
= 0;
1792 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1793 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1794 fde
->drap_reg
= cur_cfa
->reg
;
1805 /* Saving a register to the stack. Make sure dest is relative to the
1807 switch (GET_CODE (XEXP (dest
, 0)))
1813 /* We can't handle variable size modifications. */
1814 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1816 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1818 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1819 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1821 cur_trace
->cfa_store
.offset
+= offset
;
1822 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1823 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1825 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1826 offset
-= cur_trace
->cfa_store
.offset
;
1828 offset
= -cur_trace
->cfa_store
.offset
;
1835 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1836 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1839 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1840 == STACK_POINTER_REGNUM
)
1841 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1843 cur_trace
->cfa_store
.offset
+= offset
;
1845 /* Rule 18: If stack is aligned, we will use FP as a
1846 reference to represent the address of the stored
1849 && fde
->stack_realign
1851 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
1853 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1854 cur_trace
->cfa_store
.offset
= 0;
1857 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1858 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1860 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1861 offset
+= -cur_trace
->cfa_store
.offset
;
1863 offset
= -cur_trace
->cfa_store
.offset
;
1867 /* With an offset. */
1874 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1875 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1876 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1877 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1880 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1882 if (cur_cfa
->reg
== regno
)
1883 offset
-= cur_cfa
->offset
;
1884 else if (cur_trace
->cfa_store
.reg
== regno
)
1885 offset
-= cur_trace
->cfa_store
.offset
;
1888 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1889 offset
-= cur_trace
->cfa_temp
.offset
;
1895 /* Without an offset. */
1898 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1900 if (cur_cfa
->reg
== regno
)
1901 offset
= -cur_cfa
->offset
;
1902 else if (cur_trace
->cfa_store
.reg
== regno
)
1903 offset
= -cur_trace
->cfa_store
.offset
;
1906 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1907 offset
= -cur_trace
->cfa_temp
.offset
;
1914 gcc_assert (cur_trace
->cfa_temp
.reg
1915 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1916 offset
= -cur_trace
->cfa_temp
.offset
;
1917 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1925 /* If the source operand of this MEM operation is a memory,
1926 we only care how much stack grew. */
1931 && REGNO (src
) != STACK_POINTER_REGNUM
1932 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1933 && dwf_regno (src
) == cur_cfa
->reg
)
1935 /* We're storing the current CFA reg into the stack. */
1937 if (cur_cfa
->offset
== 0)
1940 /* If stack is aligned, putting CFA reg into stack means
1941 we can no longer use reg + offset to represent CFA.
1942 Here we use DW_CFA_def_cfa_expression instead. The
1943 result of this expression equals to the original CFA
1946 && fde
->stack_realign
1947 && cur_cfa
->indirect
== 0
1948 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1950 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1952 cur_cfa
->indirect
= 1;
1953 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1954 cur_cfa
->base_offset
= offset
;
1955 cur_cfa
->offset
= 0;
1957 fde
->drap_reg_saved
= 1;
1961 /* If the source register is exactly the CFA, assume
1962 we're saving SP like any other register; this happens
1964 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
1969 /* Otherwise, we'll need to look in the stack to
1970 calculate the CFA. */
1971 rtx x
= XEXP (dest
, 0);
1975 gcc_assert (REG_P (x
));
1977 cur_cfa
->reg
= dwf_regno (x
);
1978 cur_cfa
->base_offset
= offset
;
1979 cur_cfa
->indirect
= 1;
1985 span
= targetm
.dwarf_register_span (src
);
1990 queue_reg_save (src
, NULL_RTX
, offset
);
1993 /* We have a PARALLEL describing where the contents of SRC live.
1994 Queue register saves for each piece of the PARALLEL. */
1995 HOST_WIDE_INT span_offset
= offset
;
1997 gcc_assert (GET_CODE (span
) == PARALLEL
);
1999 const int par_len
= XVECLEN (span
, 0);
2000 for (int par_index
= 0; par_index
< par_len
; par_index
++)
2002 rtx elem
= XVECEXP (span
, 0, par_index
);
2003 queue_reg_save (elem
, NULL_RTX
, span_offset
);
2004 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2014 /* Record call frame debugging information for INSN, which either sets
2015 SP or FP (adjusting how we calculate the frame address) or saves a
2016 register to the stack. */
2019 dwarf2out_frame_debug (rtx_insn
*insn
)
2022 bool handled_one
= false;
2024 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2025 switch (REG_NOTE_KIND (note
))
2027 case REG_FRAME_RELATED_EXPR
:
2028 pat
= XEXP (note
, 0);
2031 case REG_CFA_DEF_CFA
:
2032 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2036 case REG_CFA_ADJUST_CFA
:
2041 if (GET_CODE (n
) == PARALLEL
)
2042 n
= XVECEXP (n
, 0, 0);
2044 dwarf2out_frame_debug_adjust_cfa (n
);
2048 case REG_CFA_OFFSET
:
2051 n
= single_set (insn
);
2052 dwarf2out_frame_debug_cfa_offset (n
);
2056 case REG_CFA_REGISTER
:
2061 if (GET_CODE (n
) == PARALLEL
)
2062 n
= XVECEXP (n
, 0, 0);
2064 dwarf2out_frame_debug_cfa_register (n
);
2068 case REG_CFA_EXPRESSION
:
2071 n
= single_set (insn
);
2072 dwarf2out_frame_debug_cfa_expression (n
);
2076 case REG_CFA_RESTORE
:
2081 if (GET_CODE (n
) == PARALLEL
)
2082 n
= XVECEXP (n
, 0, 0);
2085 dwarf2out_frame_debug_cfa_restore (n
);
2089 case REG_CFA_SET_VDRAP
:
2093 dw_fde_ref fde
= cfun
->fde
;
2096 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2098 fde
->vdrap_reg
= dwf_regno (n
);
2104 case REG_CFA_WINDOW_SAVE
:
2105 dwarf2out_frame_debug_cfa_window_save ();
2109 case REG_CFA_FLUSH_QUEUE
:
2110 /* The actual flush happens elsewhere. */
2120 pat
= PATTERN (insn
);
2122 dwarf2out_frame_debug_expr (pat
);
2124 /* Check again. A parallel can save and update the same register.
2125 We could probably check just once, here, but this is safer than
2126 removing the check at the start of the function. */
2127 if (clobbers_queued_reg_save (pat
))
2128 dwarf2out_flush_queued_reg_saves ();
2132 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2135 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2137 size_t i
, n_old
, n_new
, n_max
;
2140 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2141 add_cfi (new_row
->cfa_cfi
);
2144 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2149 n_old
= vec_safe_length (old_row
->reg_save
);
2150 n_new
= vec_safe_length (new_row
->reg_save
);
2151 n_max
= MAX (n_old
, n_new
);
2153 for (i
= 0; i
< n_max
; ++i
)
2155 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2158 r_old
= (*old_row
->reg_save
)[i
];
2160 r_new
= (*new_row
->reg_save
)[i
];
2164 else if (r_new
== NULL
)
2165 add_cfi_restore (i
);
2166 else if (!cfi_equal_p (r_old
, r_new
))
2171 /* Examine CFI and return true if a cfi label and set_loc is needed
2172 beforehand. Even when generating CFI assembler instructions, we
2173 still have to add the cfi to the list so that lookup_cfa_1 works
2174 later on. When -g2 and above we even need to force emitting of
2175 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2176 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2177 and so don't use convert_cfa_to_fb_loc_list. */
2180 cfi_label_required_p (dw_cfi_ref cfi
)
2182 if (!dwarf2out_do_cfi_asm ())
2185 if (dwarf_version
== 2
2186 && debug_info_level
> DINFO_LEVEL_TERSE
2187 && (write_symbols
== DWARF2_DEBUG
2188 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2190 switch (cfi
->dw_cfi_opc
)
2192 case DW_CFA_def_cfa_offset
:
2193 case DW_CFA_def_cfa_offset_sf
:
2194 case DW_CFA_def_cfa_register
:
2195 case DW_CFA_def_cfa
:
2196 case DW_CFA_def_cfa_sf
:
2197 case DW_CFA_def_cfa_expression
:
2198 case DW_CFA_restore_state
:
2207 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2208 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2211 add_cfis_to_fde (void)
2213 dw_fde_ref fde
= cfun
->fde
;
2214 rtx_insn
*insn
, *next
;
2215 /* We always start with a function_begin label. */
2218 for (insn
= get_insns (); insn
; insn
= next
)
2220 next
= NEXT_INSN (insn
);
2222 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2224 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2225 /* Don't attempt to advance_loc4 between labels
2226 in different sections. */
2230 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2232 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2234 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2236 required
|= cfi_label_required_p (NOTE_CFI (next
));
2237 next
= NEXT_INSN (next
);
2239 else if (active_insn_p (next
)
2240 || (NOTE_P (next
) && (NOTE_KIND (next
)
2241 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2244 next
= NEXT_INSN (next
);
2247 int num
= dwarf2out_cfi_label_num
;
2248 const char *label
= dwarf2out_cfi_label ();
2252 /* Set the location counter to the new label. */
2254 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2255 : DW_CFA_advance_loc4
);
2256 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2257 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2259 tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2260 NOTE_LABEL_NUMBER (tmp
) = num
;
2265 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2266 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2267 insn
= NEXT_INSN (insn
);
2269 while (insn
!= next
);
2275 /* If LABEL is the start of a trace, then initialize the state of that
2276 trace from CUR_TRACE and CUR_ROW. */
2279 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2282 HOST_WIDE_INT args_size
;
2284 ti
= get_trace_info (start
);
2285 gcc_assert (ti
!= NULL
);
2289 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2290 cur_trace
->id
, ti
->id
,
2291 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2292 (origin
? INSN_UID (origin
) : 0));
2295 args_size
= cur_trace
->end_true_args_size
;
2296 if (ti
->beg_row
== NULL
)
2298 /* This is the first time we've encountered this trace. Propagate
2299 state across the edge and push the trace onto the work list. */
2300 ti
->beg_row
= copy_cfi_row (cur_row
);
2301 ti
->beg_true_args_size
= args_size
;
2303 ti
->cfa_store
= cur_trace
->cfa_store
;
2304 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2305 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2307 trace_work_list
.safe_push (ti
);
2310 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2315 /* We ought to have the same state incoming to a given trace no
2316 matter how we arrive at the trace. Anything else means we've
2317 got some kind of optimization error. */
2318 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2320 /* The args_size is allowed to conflict if it isn't actually used. */
2321 if (ti
->beg_true_args_size
!= args_size
)
2322 ti
->args_size_undefined
= true;
2326 /* Similarly, but handle the args_size and CFA reset across EH
2327 and non-local goto edges. */
2330 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2332 HOST_WIDE_INT save_args_size
, delta
;
2333 dw_cfa_location save_cfa
;
2335 save_args_size
= cur_trace
->end_true_args_size
;
2336 if (save_args_size
== 0)
2338 maybe_record_trace_start (start
, origin
);
2342 delta
= -save_args_size
;
2343 cur_trace
->end_true_args_size
= 0;
2345 save_cfa
= cur_row
->cfa
;
2346 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2348 /* Convert a change in args_size (always a positive in the
2349 direction of stack growth) to a change in stack pointer. */
2350 #ifndef STACK_GROWS_DOWNWARD
2353 cur_row
->cfa
.offset
+= delta
;
2356 maybe_record_trace_start (start
, origin
);
2358 cur_trace
->end_true_args_size
= save_args_size
;
2359 cur_row
->cfa
= save_cfa
;
2362 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2363 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2366 create_trace_edges (rtx_insn
*insn
)
2373 rtx_jump_table_data
*table
;
2375 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2378 if (tablejump_p (insn
, NULL
, &table
))
2380 rtvec vec
= table
->get_labels ();
2382 n
= GET_NUM_ELEM (vec
);
2383 for (i
= 0; i
< n
; ++i
)
2385 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2386 maybe_record_trace_start (lab
, insn
);
2389 else if (computed_jump_p (insn
))
2391 for (rtx_insn_list
*lab
= forced_labels
; lab
; lab
= lab
->next ())
2392 maybe_record_trace_start (lab
->insn (), insn
);
2394 else if (returnjump_p (insn
))
2396 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2398 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2399 for (i
= 0; i
< n
; ++i
)
2402 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2403 maybe_record_trace_start (lab
, insn
);
2408 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2409 gcc_assert (lab
!= NULL
);
2410 maybe_record_trace_start (lab
, insn
);
2413 else if (CALL_P (insn
))
2415 /* Sibling calls don't have edges inside this function. */
2416 if (SIBLING_CALL_P (insn
))
2419 /* Process non-local goto edges. */
2420 if (can_nonlocal_goto (insn
))
2421 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2424 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2426 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2428 int i
, n
= seq
->len ();
2429 for (i
= 0; i
< n
; ++i
)
2430 create_trace_edges (seq
->insn (i
));
2434 /* Process EH edges. */
2435 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2437 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2439 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2443 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2446 scan_insn_after (rtx_insn
*insn
)
2448 if (RTX_FRAME_RELATED_P (insn
))
2449 dwarf2out_frame_debug (insn
);
2450 notice_args_size (insn
);
2453 /* Scan the trace beginning at INSN and create the CFI notes for the
2454 instructions therein. */
2457 scan_trace (dw_trace_info
*trace
)
2459 rtx_insn
*prev
, *insn
= trace
->head
;
2460 dw_cfa_location this_cfa
;
2463 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2464 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2467 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2468 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2471 cur_row
= trace
->end_row
;
2473 this_cfa
= cur_row
->cfa
;
2474 cur_cfa
= &this_cfa
;
2476 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2478 prev
= insn
, insn
= NEXT_INSN (insn
))
2482 /* Do everything that happens "before" the insn. */
2483 add_cfi_insn
= prev
;
2485 /* Notice the end of a trace. */
2486 if (BARRIER_P (insn
))
2488 /* Don't bother saving the unneeded queued registers at all. */
2489 queued_reg_saves
.truncate (0);
2492 if (save_point_p (insn
))
2494 /* Propagate across fallthru edges. */
2495 dwarf2out_flush_queued_reg_saves ();
2496 maybe_record_trace_start (insn
, NULL
);
2500 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2503 /* Handle all changes to the row state. Sequences require special
2504 handling for the positioning of the notes. */
2505 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2508 int i
, n
= pat
->len ();
2510 control
= pat
->insn (0);
2511 if (can_throw_internal (control
))
2512 notice_eh_throw (control
);
2513 dwarf2out_flush_queued_reg_saves ();
2515 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2517 /* ??? Hopefully multiple delay slots are not annulled. */
2518 gcc_assert (n
== 2);
2519 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2520 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2522 elt
= pat
->insn (1);
2524 if (INSN_FROM_TARGET_P (elt
))
2526 HOST_WIDE_INT restore_args_size
;
2527 cfi_vec save_row_reg_save
;
2529 /* If ELT is an instruction from target of an annulled
2530 branch, the effects are for the target only and so
2531 the args_size and CFA along the current path
2532 shouldn't change. */
2533 add_cfi_insn
= NULL
;
2534 restore_args_size
= cur_trace
->end_true_args_size
;
2535 cur_cfa
= &cur_row
->cfa
;
2536 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2538 scan_insn_after (elt
);
2540 /* ??? Should we instead save the entire row state? */
2541 gcc_assert (!queued_reg_saves
.length ());
2543 create_trace_edges (control
);
2545 cur_trace
->end_true_args_size
= restore_args_size
;
2546 cur_row
->cfa
= this_cfa
;
2547 cur_row
->reg_save
= save_row_reg_save
;
2548 cur_cfa
= &this_cfa
;
2552 /* If ELT is a annulled branch-taken instruction (i.e.
2553 executed only when branch is not taken), the args_size
2554 and CFA should not change through the jump. */
2555 create_trace_edges (control
);
2557 /* Update and continue with the trace. */
2558 add_cfi_insn
= insn
;
2559 scan_insn_after (elt
);
2560 def_cfa_1 (&this_cfa
);
2565 /* The insns in the delay slot should all be considered to happen
2566 "before" a call insn. Consider a call with a stack pointer
2567 adjustment in the delay slot. The backtrace from the callee
2568 should include the sp adjustment. Unfortunately, that leaves
2569 us with an unavoidable unwinding error exactly at the call insn
2570 itself. For jump insns we'd prefer to avoid this error by
2571 placing the notes after the sequence. */
2572 if (JUMP_P (control
))
2573 add_cfi_insn
= insn
;
2575 for (i
= 1; i
< n
; ++i
)
2577 elt
= pat
->insn (i
);
2578 scan_insn_after (elt
);
2581 /* Make sure any register saves are visible at the jump target. */
2582 dwarf2out_flush_queued_reg_saves ();
2583 any_cfis_emitted
= false;
2585 /* However, if there is some adjustment on the call itself, e.g.
2586 a call_pop, that action should be considered to happen after
2587 the call returns. */
2588 add_cfi_insn
= insn
;
2589 scan_insn_after (control
);
2593 /* Flush data before calls and jumps, and of course if necessary. */
2594 if (can_throw_internal (insn
))
2596 notice_eh_throw (insn
);
2597 dwarf2out_flush_queued_reg_saves ();
2599 else if (!NONJUMP_INSN_P (insn
)
2600 || clobbers_queued_reg_save (insn
)
2601 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2602 dwarf2out_flush_queued_reg_saves ();
2603 any_cfis_emitted
= false;
2605 add_cfi_insn
= insn
;
2606 scan_insn_after (insn
);
2610 /* Between frame-related-p and args_size we might have otherwise
2611 emitted two cfa adjustments. Do it now. */
2612 def_cfa_1 (&this_cfa
);
2614 /* Minimize the number of advances by emitting the entire queue
2615 once anything is emitted. */
2616 if (any_cfis_emitted
2617 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2618 dwarf2out_flush_queued_reg_saves ();
2620 /* Note that a test for control_flow_insn_p does exactly the
2621 same tests as are done to actually create the edges. So
2622 always call the routine and let it not create edges for
2623 non-control-flow insns. */
2624 create_trace_edges (control
);
2627 add_cfi_insn
= NULL
;
2633 /* Scan the function and create the initial set of CFI notes. */
2636 create_cfi_notes (void)
2640 gcc_checking_assert (!queued_reg_saves
.exists ());
2641 gcc_checking_assert (!trace_work_list
.exists ());
2643 /* Always begin at the entry trace. */
2644 ti
= &trace_info
[0];
2647 while (!trace_work_list
.is_empty ())
2649 ti
= trace_work_list
.pop ();
2653 queued_reg_saves
.release ();
2654 trace_work_list
.release ();
2657 /* Return the insn before the first NOTE_INSN_CFI after START. */
2660 before_next_cfi_note (rtx_insn
*start
)
2662 rtx_insn
*prev
= start
;
2665 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2668 start
= NEXT_INSN (start
);
2673 /* Insert CFI notes between traces to properly change state between them. */
2676 connect_traces (void)
2678 unsigned i
, n
= trace_info
.length ();
2679 dw_trace_info
*prev_ti
, *ti
;
2681 /* ??? Ideally, we should have both queued and processed every trace.
2682 However the current representation of constant pools on various targets
2683 is indistinguishable from unreachable code. Assume for the moment that
2684 we can simply skip over such traces. */
2685 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2686 these are not "real" instructions, and should not be considered.
2687 This could be generically useful for tablejump data as well. */
2688 /* Remove all unprocessed traces from the list. */
2689 for (i
= n
- 1; i
> 0; --i
)
2691 ti
= &trace_info
[i
];
2692 if (ti
->beg_row
== NULL
)
2694 trace_info
.ordered_remove (i
);
2698 gcc_assert (ti
->end_row
!= NULL
);
2701 /* Work from the end back to the beginning. This lets us easily insert
2702 remember/restore_state notes in the correct order wrt other notes. */
2703 prev_ti
= &trace_info
[n
- 1];
2704 for (i
= n
- 1; i
> 0; --i
)
2706 dw_cfi_row
*old_row
;
2709 prev_ti
= &trace_info
[i
- 1];
2711 add_cfi_insn
= ti
->head
;
2713 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2714 for the portion of the function in the alternate text
2715 section. The row state at the very beginning of that
2716 new FDE will be exactly the row state from the CIE. */
2717 if (ti
->switch_sections
)
2718 old_row
= cie_cfi_row
;
2721 old_row
= prev_ti
->end_row
;
2722 /* If there's no change from the previous end state, fine. */
2723 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2725 /* Otherwise check for the common case of sharing state with
2726 the beginning of an epilogue, but not the end. Insert
2727 remember/restore opcodes in that case. */
2728 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2732 /* Note that if we blindly insert the remember at the
2733 start of the trace, we can wind up increasing the
2734 size of the unwind info due to extra advance opcodes.
2735 Instead, put the remember immediately before the next
2736 state change. We know there must be one, because the
2737 state at the beginning and head of the trace differ. */
2738 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2740 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2743 add_cfi_insn
= ti
->head
;
2745 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2748 old_row
= prev_ti
->beg_row
;
2750 /* Otherwise, we'll simply change state from the previous end. */
2753 change_cfi_row (old_row
, ti
->beg_row
);
2755 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2759 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2760 prev_ti
->id
, ti
->id
);
2765 note
= NEXT_INSN (note
);
2766 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2767 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2769 while (note
!= add_cfi_insn
);
2773 /* Connect args_size between traces that have can_throw_internal insns. */
2774 if (cfun
->eh
->lp_array
)
2776 HOST_WIDE_INT prev_args_size
= 0;
2778 for (i
= 0; i
< n
; ++i
)
2780 ti
= &trace_info
[i
];
2782 if (ti
->switch_sections
)
2784 if (ti
->eh_head
== NULL
)
2786 gcc_assert (!ti
->args_size_undefined
);
2788 if (ti
->beg_delay_args_size
!= prev_args_size
)
2790 /* ??? Search back to previous CFI note. */
2791 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2792 add_cfi_args_size (ti
->beg_delay_args_size
);
2795 prev_args_size
= ti
->end_delay_args_size
;
2800 /* Set up the pseudo-cfg of instruction traces, as described at the
2801 block comment at the top of the file. */
2804 create_pseudo_cfg (void)
2806 bool saw_barrier
, switch_sections
;
2811 /* The first trace begins at the start of the function,
2812 and begins with the CIE row state. */
2813 trace_info
.create (16);
2814 memset (&ti
, 0, sizeof (ti
));
2815 ti
.head
= get_insns ();
2816 ti
.beg_row
= cie_cfi_row
;
2817 ti
.cfa_store
= cie_cfi_row
->cfa
;
2818 ti
.cfa_temp
.reg
= INVALID_REGNUM
;
2819 trace_info
.quick_push (ti
);
2821 if (cie_return_save
)
2822 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
2824 /* Walk all the insns, collecting start of trace locations. */
2825 saw_barrier
= false;
2826 switch_sections
= false;
2827 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2829 if (BARRIER_P (insn
))
2831 else if (NOTE_P (insn
)
2832 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2834 /* We should have just seen a barrier. */
2835 gcc_assert (saw_barrier
);
2836 switch_sections
= true;
2838 /* Watch out for save_point notes between basic blocks.
2839 In particular, a note after a barrier. Do not record these,
2840 delaying trace creation until the label. */
2841 else if (save_point_p (insn
)
2842 && (LABEL_P (insn
) || !saw_barrier
))
2844 memset (&ti
, 0, sizeof (ti
));
2846 ti
.switch_sections
= switch_sections
;
2847 ti
.id
= trace_info
.length ();
2848 trace_info
.safe_push (ti
);
2850 saw_barrier
= false;
2851 switch_sections
= false;
2855 /* Create the trace index after we've finished building trace_info,
2856 avoiding stale pointer problems due to reallocation. */
2858 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
2860 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
2862 dw_trace_info
**slot
;
2865 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
2866 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
2867 tp
->switch_sections
? " (section switch)" : "");
2869 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
2870 gcc_assert (*slot
== NULL
);
2875 /* Record the initial position of the return address. RTL is
2876 INCOMING_RETURN_ADDR_RTX. */
2879 initial_return_save (rtx rtl
)
2881 unsigned int reg
= INVALID_REGNUM
;
2882 HOST_WIDE_INT offset
= 0;
2884 switch (GET_CODE (rtl
))
2887 /* RA is in a register. */
2888 reg
= dwf_regno (rtl
);
2892 /* RA is on the stack. */
2893 rtl
= XEXP (rtl
, 0);
2894 switch (GET_CODE (rtl
))
2897 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2902 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2903 offset
= INTVAL (XEXP (rtl
, 1));
2907 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2908 offset
= -INTVAL (XEXP (rtl
, 1));
2918 /* The return address is at some offset from any value we can
2919 actually load. For instance, on the SPARC it is in %i7+8. Just
2920 ignore the offset for now; it doesn't matter for unwinding frames. */
2921 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2922 initial_return_save (XEXP (rtl
, 0));
2929 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2931 if (reg
!= INVALID_REGNUM
)
2932 record_reg_saved_in_reg (rtl
, pc_rtx
);
2933 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2938 create_cie_data (void)
2940 dw_cfa_location loc
;
2941 dw_trace_info cie_trace
;
2943 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2945 memset (&cie_trace
, 0, sizeof (cie_trace
));
2946 cur_trace
= &cie_trace
;
2948 add_cfi_vec
= &cie_cfi_vec
;
2949 cie_cfi_row
= cur_row
= new_cfi_row ();
2951 /* On entry, the Canonical Frame Address is at SP. */
2952 memset (&loc
, 0, sizeof (loc
));
2953 loc
.reg
= dw_stack_pointer_regnum
;
2954 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2957 if (targetm
.debug_unwind_info () == UI_DWARF2
2958 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2960 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2962 /* For a few targets, we have the return address incoming into a
2963 register, but choose a different return column. This will result
2964 in a DW_CFA_register for the return, and an entry in
2965 regs_saved_in_regs to match. If the target later stores that
2966 return address register to the stack, we want to be able to emit
2967 the DW_CFA_offset against the return column, not the intermediate
2968 save register. Save the contents of regs_saved_in_regs so that
2969 we can re-initialize it at the start of each function. */
2970 switch (cie_trace
.regs_saved_in_regs
.length ())
2975 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
2976 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
2977 cie_trace
.regs_saved_in_regs
.release ();
2989 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2990 state at each location within the function. These notes will be
2991 emitted during pass_final. */
2994 execute_dwarf2_frame (void)
2996 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
2997 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2999 /* The first time we're called, compute the incoming frame state. */
3000 if (cie_cfi_vec
== NULL
)
3003 dwarf2out_alloc_current_fde ();
3005 create_pseudo_cfg ();
3008 create_cfi_notes ();
3012 /* Free all the data we allocated. */
3017 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3018 ti
->regs_saved_in_regs
.release ();
3020 trace_info
.release ();
3028 /* Convert a DWARF call frame info. operation to its string name */
3031 dwarf_cfi_name (unsigned int cfi_opc
)
3033 const char *name
= get_DW_CFA_name (cfi_opc
);
3038 return "DW_CFA_<unknown>";
3041 /* This routine will generate the correct assembly data for a location
3042 description based on a cfi entry with a complex address. */
3045 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3047 dw_loc_descr_ref loc
;
3050 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3053 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3054 dw2_asm_output_data (1, r
, NULL
);
3055 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3058 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3060 /* Output the size of the block. */
3061 size
= size_of_locs (loc
);
3062 dw2_asm_output_data_uleb128 (size
, NULL
);
3064 /* Now output the operations themselves. */
3065 output_loc_sequence (loc
, for_eh
);
3068 /* Similar, but used for .cfi_escape. */
3071 output_cfa_loc_raw (dw_cfi_ref cfi
)
3073 dw_loc_descr_ref loc
;
3076 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3079 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3080 fprintf (asm_out_file
, "%#x,", r
);
3081 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3084 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3086 /* Output the size of the block. */
3087 size
= size_of_locs (loc
);
3088 dw2_asm_output_data_uleb128_raw (size
);
3089 fputc (',', asm_out_file
);
3091 /* Now output the operations themselves. */
3092 output_loc_sequence_raw (loc
);
3095 /* Output a Call Frame Information opcode and its operand(s). */
3098 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3103 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3104 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3105 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3106 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3107 ((unsigned HOST_WIDE_INT
)
3108 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3109 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3111 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3112 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3113 "DW_CFA_offset, column %#lx", r
);
3114 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3115 dw2_asm_output_data_uleb128 (off
, NULL
);
3117 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3119 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3120 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3121 "DW_CFA_restore, column %#lx", r
);
3125 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3126 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3128 switch (cfi
->dw_cfi_opc
)
3130 case DW_CFA_set_loc
:
3132 dw2_asm_output_encoded_addr_rtx (
3133 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3134 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3137 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3138 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3139 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3142 case DW_CFA_advance_loc1
:
3143 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3144 fde
->dw_fde_current_label
, NULL
);
3145 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3148 case DW_CFA_advance_loc2
:
3149 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3150 fde
->dw_fde_current_label
, NULL
);
3151 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3154 case DW_CFA_advance_loc4
:
3155 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3156 fde
->dw_fde_current_label
, NULL
);
3157 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3160 case DW_CFA_MIPS_advance_loc8
:
3161 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3162 fde
->dw_fde_current_label
, NULL
);
3163 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3166 case DW_CFA_offset_extended
:
3167 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3168 dw2_asm_output_data_uleb128 (r
, NULL
);
3169 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3170 dw2_asm_output_data_uleb128 (off
, NULL
);
3173 case DW_CFA_def_cfa
:
3174 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3175 dw2_asm_output_data_uleb128 (r
, NULL
);
3176 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3179 case DW_CFA_offset_extended_sf
:
3180 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3181 dw2_asm_output_data_uleb128 (r
, NULL
);
3182 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3183 dw2_asm_output_data_sleb128 (off
, NULL
);
3186 case DW_CFA_def_cfa_sf
:
3187 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3188 dw2_asm_output_data_uleb128 (r
, NULL
);
3189 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3190 dw2_asm_output_data_sleb128 (off
, NULL
);
3193 case DW_CFA_restore_extended
:
3194 case DW_CFA_undefined
:
3195 case DW_CFA_same_value
:
3196 case DW_CFA_def_cfa_register
:
3197 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3198 dw2_asm_output_data_uleb128 (r
, NULL
);
3201 case DW_CFA_register
:
3202 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3203 dw2_asm_output_data_uleb128 (r
, NULL
);
3204 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3205 dw2_asm_output_data_uleb128 (r
, NULL
);
3208 case DW_CFA_def_cfa_offset
:
3209 case DW_CFA_GNU_args_size
:
3210 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3213 case DW_CFA_def_cfa_offset_sf
:
3214 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3215 dw2_asm_output_data_sleb128 (off
, NULL
);
3218 case DW_CFA_GNU_window_save
:
3221 case DW_CFA_def_cfa_expression
:
3222 case DW_CFA_expression
:
3223 output_cfa_loc (cfi
, for_eh
);
3226 case DW_CFA_GNU_negative_offset_extended
:
3227 /* Obsoleted by DW_CFA_offset_extended_sf. */
3236 /* Similar, but do it via assembler directives instead. */
3239 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3241 unsigned long r
, r2
;
3243 switch (cfi
->dw_cfi_opc
)
3245 case DW_CFA_advance_loc
:
3246 case DW_CFA_advance_loc1
:
3247 case DW_CFA_advance_loc2
:
3248 case DW_CFA_advance_loc4
:
3249 case DW_CFA_MIPS_advance_loc8
:
3250 case DW_CFA_set_loc
:
3251 /* Should only be created in a code path not followed when emitting
3252 via directives. The assembler is going to take care of this for
3253 us. But this routines is also used for debugging dumps, so
3255 gcc_assert (f
!= asm_out_file
);
3256 fprintf (f
, "\t.cfi_advance_loc\n");
3260 case DW_CFA_offset_extended
:
3261 case DW_CFA_offset_extended_sf
:
3262 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3263 fprintf (f
, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3264 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3267 case DW_CFA_restore
:
3268 case DW_CFA_restore_extended
:
3269 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3270 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3273 case DW_CFA_undefined
:
3274 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3275 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3278 case DW_CFA_same_value
:
3279 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3280 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3283 case DW_CFA_def_cfa
:
3284 case DW_CFA_def_cfa_sf
:
3285 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3286 fprintf (f
, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3287 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3290 case DW_CFA_def_cfa_register
:
3291 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3292 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3295 case DW_CFA_register
:
3296 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3297 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3298 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3301 case DW_CFA_def_cfa_offset
:
3302 case DW_CFA_def_cfa_offset_sf
:
3303 fprintf (f
, "\t.cfi_def_cfa_offset "
3304 HOST_WIDE_INT_PRINT_DEC
"\n",
3305 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3308 case DW_CFA_remember_state
:
3309 fprintf (f
, "\t.cfi_remember_state\n");
3311 case DW_CFA_restore_state
:
3312 fprintf (f
, "\t.cfi_restore_state\n");
3315 case DW_CFA_GNU_args_size
:
3316 if (f
== asm_out_file
)
3318 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3319 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3321 fprintf (f
, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC
,
3322 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3327 fprintf (f
, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC
"\n",
3328 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3332 case DW_CFA_GNU_window_save
:
3333 fprintf (f
, "\t.cfi_window_save\n");
3336 case DW_CFA_def_cfa_expression
:
3337 if (f
!= asm_out_file
)
3339 fprintf (f
, "\t.cfi_def_cfa_expression ...\n");
3343 case DW_CFA_expression
:
3344 if (f
!= asm_out_file
)
3346 fprintf (f
, "\t.cfi_cfa_expression ...\n");
3349 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3350 output_cfa_loc_raw (cfi
);
3360 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3362 if (dwarf2out_do_cfi_asm ())
3363 output_cfi_directive (asm_out_file
, cfi
);
3367 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3375 dw_cfa_location dummy
;
3376 memset (&dummy
, 0, sizeof (dummy
));
3377 dummy
.reg
= INVALID_REGNUM
;
3378 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3380 output_cfi_directive (f
, cfi
);
3382 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3384 output_cfi_directive (f
, cfi
);
3387 void debug_cfi_row (dw_cfi_row
*row
);
3390 debug_cfi_row (dw_cfi_row
*row
)
3392 dump_cfi_row (stderr
, row
);
3396 /* Save the result of dwarf2out_do_frame across PCH.
3397 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3398 static GTY(()) signed char saved_do_cfi_asm
= 0;
3400 /* Decide whether we want to emit frame unwind information for the current
3401 translation unit. */
3404 dwarf2out_do_frame (void)
3406 /* We want to emit correct CFA location expressions or lists, so we
3407 have to return true if we're going to output debug info, even if
3408 we're not going to output frame or unwind info. */
3409 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3412 if (saved_do_cfi_asm
> 0)
3415 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3418 if ((flag_unwind_tables
|| flag_exceptions
)
3419 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3425 /* Decide whether to emit frame unwind via assembler directives. */
3428 dwarf2out_do_cfi_asm (void)
3432 if (saved_do_cfi_asm
!= 0)
3433 return saved_do_cfi_asm
> 0;
3435 /* Assume failure for a moment. */
3436 saved_do_cfi_asm
= -1;
3438 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3440 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3443 /* Make sure the personality encoding is one the assembler can support.
3444 In particular, aligned addresses can't be handled. */
3445 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3446 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3448 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3449 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3452 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3453 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3454 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3455 && !flag_unwind_tables
&& !flag_exceptions
3456 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3460 saved_do_cfi_asm
= 1;
3466 const pass_data pass_data_dwarf2_frame
=
3468 RTL_PASS
, /* type */
3469 "dwarf2", /* name */
3470 OPTGROUP_NONE
, /* optinfo_flags */
3471 TV_FINAL
, /* tv_id */
3472 0, /* properties_required */
3473 0, /* properties_provided */
3474 0, /* properties_destroyed */
3475 0, /* todo_flags_start */
3476 0, /* todo_flags_finish */
3479 class pass_dwarf2_frame
: public rtl_opt_pass
3482 pass_dwarf2_frame (gcc::context
*ctxt
)
3483 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3486 /* opt_pass methods: */
3487 virtual bool gate (function
*);
3488 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3490 }; // class pass_dwarf2_frame
3493 pass_dwarf2_frame::gate (function
*)
3495 #ifndef HAVE_prologue
3496 /* Targets which still implement the prologue in assembler text
3497 cannot use the generic dwarf2 unwinding. */
3501 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3502 from the optimized shrink-wrapping annotations that we will compute.
3503 For now, only produce the CFI notes for dwarf2. */
3504 return dwarf2out_do_frame ();
3510 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3512 return new pass_dwarf2_frame (ctxt
);
3515 #include "gt-dwarf2cfi.h"