1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
30 #include "basic-block.h"
32 #include "dwarf2out.h"
33 #include "dwarf2asm.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "expr.h" /* init_return_column_size */
42 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
43 #include "output.h" /* asm_out_file */
44 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
47 /* ??? Poison these here until it can be done generically. They've been
48 totally replaced in this file; make sure it stays that way. */
49 #undef DWARF2_UNWIND_INFO
50 #undef DWARF2_FRAME_INFO
51 #if (GCC_VERSION >= 3000)
52 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
55 #ifndef INCOMING_RETURN_ADDR_RTX
56 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
59 /* Maximum size (in bytes) of an artificially generated label. */
60 #define MAX_ARTIFICIAL_LABEL_BYTES 30
62 /* A collected description of an entire row of the abstract CFI table. */
63 typedef struct GTY(()) dw_cfi_row_struct
65 /* The expression that computes the CFA, expressed in two different ways.
66 The CFA member for the simple cases, and the full CFI expression for
67 the complex cases. The later will be a DW_CFA_cfa_expression. */
71 /* The expressions for any register column that is saved. */
74 /* The value of any DW_CFA_GNU_args_size. */
75 HOST_WIDE_INT args_size
;
78 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
79 typedef struct GTY(()) reg_saved_in_data_struct
{
84 DEF_VEC_O (reg_saved_in_data
);
85 DEF_VEC_ALLOC_O (reg_saved_in_data
, heap
);
87 /* Since we no longer have a proper CFG, we're going to create a facsimile
88 of one on the fly while processing the frame-related insns.
90 We create dw_trace_info structures for each extended basic block beginning
91 and ending at a "save point". Save points are labels, barriers, certain
92 notes, and of course the beginning and end of the function.
94 As we encounter control transfer insns, we propagate the "current"
95 row state across the edges to the starts of traces. When checking is
96 enabled, we validate that we propagate the same data from all sources.
98 All traces are members of the TRACE_INFO array, in the order in which
99 they appear in the instruction stream.
101 All save points are present in the TRACE_INDEX hash, mapping the insn
102 starting a trace to the dw_trace_info describing the trace. */
106 /* The insn that begins the trace. */
109 /* The row state at the beginning and end of the trace. */
110 dw_cfi_row
*beg_row
, *end_row
;
112 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
113 bool switch_sections
;
115 /* The following variables contain data used in interpreting frame related
116 expressions. These are not part of the "real" row state as defined by
117 Dwarf, but it seems like they need to be propagated into a trace in case
118 frame related expressions have been sunk. */
119 /* ??? This seems fragile. These variables are fragments of a larger
120 expression. If we do not keep the entire expression together, we risk
121 not being able to put it together properly. Consider forcing targets
122 to generate self-contained expressions and dropping all of the magic
123 interpretation code in this file. Or at least refusing to shrink wrap
124 any frame related insn that doesn't contain a complete expression. */
126 /* The register used for saving registers to the stack, and its offset
128 dw_cfa_location cfa_store
;
130 /* A temporary register holding an integral value used in adjusting SP
131 or setting up the store_reg. The "offset" field holds the integer
132 value, not an offset. */
133 dw_cfa_location cfa_temp
;
135 /* A set of registers saved in other registers. This is the inverse of
136 the row->reg_save info, if the entry is a DW_CFA_register. This is
137 implemented as a flat array because it normally contains zero or 1
138 entry, depending on the target. IA-64 is the big spender here, using
139 a maximum of 5 entries. */
140 VEC(reg_saved_in_data
, heap
) *regs_saved_in_regs
;
144 DEF_VEC_O (dw_trace_info
);
145 DEF_VEC_ALLOC_O (dw_trace_info
, heap
);
147 typedef dw_trace_info
*dw_trace_info_ref
;
149 DEF_VEC_P (dw_trace_info_ref
);
150 DEF_VEC_ALLOC_P (dw_trace_info_ref
, heap
);
152 /* The variables making up the pseudo-cfg, as described above. */
153 static VEC (dw_trace_info
, heap
) *trace_info
;
154 static VEC (dw_trace_info_ref
, heap
) *trace_work_list
;
155 static htab_t trace_index
;
157 /* A vector of call frame insns for the CIE. */
160 /* The state of the first row of the FDE table, which includes the
161 state provided by the CIE. */
162 static GTY(()) dw_cfi_row
*cie_cfi_row
;
164 static GTY(()) reg_saved_in_data
*cie_return_save
;
166 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
168 /* The insn after which a new CFI note should be emitted. */
169 static rtx add_cfi_insn
;
171 /* When non-null, add_cfi will add the CFI to this vector. */
172 static cfi_vec
*add_cfi_vec
;
174 /* The current instruction trace. */
175 static dw_trace_info
*cur_trace
;
177 /* The current, i.e. most recently generated, row of the CFI table. */
178 static dw_cfi_row
*cur_row
;
180 /* We delay emitting a register save until either (a) we reach the end
181 of the prologue or (b) the register is clobbered. This clusters
182 register saves so that there are fewer pc advances. */
187 HOST_WIDE_INT cfa_offset
;
190 DEF_VEC_O (queued_reg_save
);
191 DEF_VEC_ALLOC_O (queued_reg_save
, heap
);
193 static VEC(queued_reg_save
, heap
) *queued_reg_saves
;
195 /* The (really) current value for DW_CFA_GNU_args_size. We delay actually
196 emitting this data, i.e. updating CUR_ROW, without async unwind. */
197 static HOST_WIDE_INT queued_args_size
;
199 /* True if any CFI directives were emitted at the current insn. */
200 static bool any_cfis_emitted
;
202 /* Short-hand for commonly used register numbers. */
203 static unsigned dw_stack_pointer_regnum
;
204 static unsigned dw_frame_pointer_regnum
;
206 /* Hook used by __throw. */
209 expand_builtin_dwarf_sp_column (void)
211 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
212 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
215 /* MEM is a memory reference for the register size table, each element of
216 which has mode MODE. Initialize column C as a return address column. */
219 init_return_column_size (enum machine_mode mode
, rtx mem
, unsigned int c
)
221 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
222 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
223 emit_move_insn (adjust_address (mem
, mode
, offset
), GEN_INT (size
));
226 /* Generate code to initialize the register size table. */
229 expand_builtin_init_dwarf_reg_sizes (tree address
)
232 enum machine_mode mode
= TYPE_MODE (char_type_node
);
233 rtx addr
= expand_normal (address
);
234 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
235 bool wrote_return_column
= false;
237 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
239 unsigned int dnum
= DWARF_FRAME_REGNUM (i
);
240 unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
242 if (rnum
< DWARF_FRAME_REGISTERS
)
244 HOST_WIDE_INT offset
= rnum
* GET_MODE_SIZE (mode
);
245 enum machine_mode save_mode
= reg_raw_mode
[i
];
248 if (HARD_REGNO_CALL_PART_CLOBBERED (i
, save_mode
))
249 save_mode
= choose_hard_reg_mode (i
, 1, true);
250 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
252 if (save_mode
== VOIDmode
)
254 wrote_return_column
= true;
256 size
= GET_MODE_SIZE (save_mode
);
260 emit_move_insn (adjust_address (mem
, mode
, offset
),
261 gen_int_mode (size
, mode
));
265 if (!wrote_return_column
)
266 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
268 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
269 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
272 targetm
.init_dwarf_reg_sizes_extra (address
);
277 dw_trace_info_hash (const void *ptr
)
279 const dw_trace_info
*ti
= (const dw_trace_info
*) ptr
;
280 return INSN_UID (ti
->head
);
284 dw_trace_info_eq (const void *ptr_a
, const void *ptr_b
)
286 const dw_trace_info
*a
= (const dw_trace_info
*) ptr_a
;
287 const dw_trace_info
*b
= (const dw_trace_info
*) ptr_b
;
288 return a
->head
== b
->head
;
292 get_trace_index (dw_trace_info
*trace
)
294 return trace
- VEC_address (dw_trace_info
, trace_info
);
297 static dw_trace_info
*
298 get_trace_info (rtx insn
)
302 return (dw_trace_info
*)
303 htab_find_with_hash (trace_index
, &dummy
, INSN_UID (insn
));
307 save_point_p (rtx insn
)
309 /* Labels, except those that are really jump tables. */
311 return inside_basic_block_p (insn
);
313 /* We split traces at the prologue/epilogue notes because those
314 are points at which the unwind info is usually stable. This
315 makes it easier to find spots with identical unwind info so
316 that we can use remember/restore_state opcodes. */
318 switch (NOTE_KIND (insn
))
320 case NOTE_INSN_PROLOGUE_END
:
321 case NOTE_INSN_EPILOGUE_BEG
:
328 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
330 static inline HOST_WIDE_INT
331 div_data_align (HOST_WIDE_INT off
)
333 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
334 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
338 /* Return true if we need a signed version of a given opcode
339 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
342 need_data_align_sf_opcode (HOST_WIDE_INT off
)
344 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
347 /* Return a pointer to a newly allocated Call Frame Instruction. */
349 static inline dw_cfi_ref
352 dw_cfi_ref cfi
= ggc_alloc_dw_cfi_node ();
354 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
355 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
360 /* Return a newly allocated CFI row, with no defined data. */
365 dw_cfi_row
*row
= ggc_alloc_cleared_dw_cfi_row ();
367 row
->cfa
.reg
= INVALID_REGNUM
;
372 /* Return a copy of an existing CFI row. */
375 copy_cfi_row (dw_cfi_row
*src
)
377 dw_cfi_row
*dst
= ggc_alloc_dw_cfi_row ();
380 dst
->reg_save
= VEC_copy (dw_cfi_ref
, gc
, src
->reg_save
);
385 /* Generate a new label for the CFI info to refer to. */
388 dwarf2out_cfi_label (void)
390 int num
= dwarf2out_cfi_label_num
++;
393 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
395 return xstrdup (label
);
398 /* Add CFI either to the current insn stream or to a vector, or both. */
401 add_cfi (dw_cfi_ref cfi
)
403 any_cfis_emitted
= true;
405 if (add_cfi_insn
!= NULL
)
407 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
408 NOTE_CFI (add_cfi_insn
) = cfi
;
411 if (add_cfi_vec
!= NULL
)
412 VEC_safe_push (dw_cfi_ref
, gc
, *add_cfi_vec
, cfi
);
416 add_cfi_args_size (HOST_WIDE_INT size
)
418 dw_cfi_ref cfi
= new_cfi ();
420 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
421 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
427 add_cfi_restore (unsigned reg
)
429 dw_cfi_ref cfi
= new_cfi ();
431 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
432 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
437 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
438 that the register column is no longer saved. */
441 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
443 if (VEC_length (dw_cfi_ref
, row
->reg_save
) <= column
)
444 VEC_safe_grow_cleared (dw_cfi_ref
, gc
, row
->reg_save
, column
+ 1);
445 VEC_replace (dw_cfi_ref
, row
->reg_save
, column
, cfi
);
448 /* This function fills in aa dw_cfa_location structure from a dwarf location
449 descriptor sequence. */
452 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_struct
*loc
)
454 struct dw_loc_descr_struct
*ptr
;
456 cfa
->base_offset
= 0;
460 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
462 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
498 cfa
->reg
= op
- DW_OP_reg0
;
501 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
535 cfa
->reg
= op
- DW_OP_breg0
;
536 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
539 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
540 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
545 case DW_OP_plus_uconst
:
546 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
554 /* Find the previous value for the CFA, iteratively. CFI is the opcode
555 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
556 one level of remember/restore state processing. */
559 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
561 switch (cfi
->dw_cfi_opc
)
563 case DW_CFA_def_cfa_offset
:
564 case DW_CFA_def_cfa_offset_sf
:
565 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
567 case DW_CFA_def_cfa_register
:
568 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
571 case DW_CFA_def_cfa_sf
:
572 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
573 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
575 case DW_CFA_def_cfa_expression
:
576 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
579 case DW_CFA_remember_state
:
580 gcc_assert (!remember
->in_use
);
582 remember
->in_use
= 1;
584 case DW_CFA_restore_state
:
585 gcc_assert (remember
->in_use
);
587 remember
->in_use
= 0;
595 /* Determine if two dw_cfa_location structures define the same data. */
598 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
600 return (loc1
->reg
== loc2
->reg
601 && loc1
->offset
== loc2
->offset
602 && loc1
->indirect
== loc2
->indirect
603 && (loc1
->indirect
== 0
604 || loc1
->base_offset
== loc2
->base_offset
));
607 /* Determine if two CFI operands are identical. */
610 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
614 case dw_cfi_oprnd_unused
:
616 case dw_cfi_oprnd_reg_num
:
617 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
618 case dw_cfi_oprnd_offset
:
619 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
620 case dw_cfi_oprnd_addr
:
621 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
622 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
623 case dw_cfi_oprnd_loc
:
624 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
629 /* Determine if two CFI entries are identical. */
632 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
634 enum dwarf_call_frame_info opc
;
636 /* Make things easier for our callers, including missing operands. */
639 if (a
== NULL
|| b
== NULL
)
642 /* Obviously, the opcodes must match. */
644 if (opc
!= b
->dw_cfi_opc
)
647 /* Compare the two operands, re-using the type of the operands as
648 already exposed elsewhere. */
649 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
650 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
651 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
652 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
655 /* Determine if two CFI_ROW structures are identical. */
658 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
660 size_t i
, n_a
, n_b
, n_max
;
664 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
667 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
670 if (a
->args_size
!= b
->args_size
)
673 n_a
= VEC_length (dw_cfi_ref
, a
->reg_save
);
674 n_b
= VEC_length (dw_cfi_ref
, b
->reg_save
);
675 n_max
= MAX (n_a
, n_b
);
677 for (i
= 0; i
< n_max
; ++i
)
679 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
682 r_a
= VEC_index (dw_cfi_ref
, a
->reg_save
, i
);
684 r_b
= VEC_index (dw_cfi_ref
, b
->reg_save
, i
);
686 if (!cfi_equal_p (r_a
, r_b
))
693 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
694 what opcode to emit. Returns the CFI opcode to effect the change, or
695 NULL if NEW_CFA == OLD_CFA. */
698 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
702 /* If nothing changed, no need to issue any call frame instructions. */
703 if (cfa_equal_p (old_cfa
, new_cfa
))
708 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
710 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
711 the CFA register did not change but the offset did. The data
712 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
713 in the assembler via the .cfi_def_cfa_offset directive. */
714 if (new_cfa
->offset
< 0)
715 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
717 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
718 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
721 #ifndef MIPS_DEBUGGING_INFO /* SGI dbx thinks this means no offset. */
722 else if (new_cfa
->offset
== old_cfa
->offset
723 && old_cfa
->reg
!= INVALID_REGNUM
724 && !new_cfa
->indirect
725 && !old_cfa
->indirect
)
727 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
728 indicating the CFA register has changed to <register> but the
729 offset has not changed. */
730 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
731 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
735 else if (new_cfa
->indirect
== 0)
737 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
738 indicating the CFA register has changed to <register> with
739 the specified offset. The data factoring for DW_CFA_def_cfa_sf
740 happens in output_cfi, or in the assembler via the .cfi_def_cfa
742 if (new_cfa
->offset
< 0)
743 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
745 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
746 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
747 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
751 /* Construct a DW_CFA_def_cfa_expression instruction to
752 calculate the CFA using a full location expression since no
753 register-offset pair is available. */
754 struct dw_loc_descr_struct
*loc_list
;
756 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
757 loc_list
= build_cfa_loc (new_cfa
, 0);
758 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
764 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
767 def_cfa_1 (dw_cfa_location
*new_cfa
)
771 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
772 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
774 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
777 cur_row
->cfa
= *new_cfa
;
778 if (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
)
779 cur_row
->cfa_cfi
= cfi
;
785 /* Add the CFI for saving a register. REG is the CFA column number.
786 If SREG is -1, the register is saved at OFFSET from the CFA;
787 otherwise it is saved in SREG. */
790 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
792 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
793 dw_cfi_ref cfi
= new_cfi ();
795 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
797 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
799 && fde
->stack_realign
800 && sreg
== INVALID_REGNUM
)
802 cfi
->dw_cfi_opc
= DW_CFA_expression
;
803 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
804 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
805 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
806 fde
->stack_realignment
);
808 else if (sreg
== INVALID_REGNUM
)
810 if (need_data_align_sf_opcode (offset
))
811 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
812 else if (reg
& ~0x3f)
813 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
815 cfi
->dw_cfi_opc
= DW_CFA_offset
;
816 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
818 else if (sreg
== reg
)
820 /* While we could emit something like DW_CFA_same_value or
821 DW_CFA_restore, we never expect to see something like that
822 in a prologue. This is more likely to be a bug. A backend
823 can always bypass this by using REG_CFA_RESTORE directly. */
828 cfi
->dw_cfi_opc
= DW_CFA_register
;
829 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
833 update_row_reg_save (cur_row
, reg
, cfi
);
836 /* Given a SET, calculate the amount of stack adjustment it
840 stack_adjust_offset (const_rtx pattern
, HOST_WIDE_INT cur_args_size
,
841 HOST_WIDE_INT cur_offset
)
843 const_rtx src
= SET_SRC (pattern
);
844 const_rtx dest
= SET_DEST (pattern
);
845 HOST_WIDE_INT offset
= 0;
848 if (dest
== stack_pointer_rtx
)
850 code
= GET_CODE (src
);
852 /* Assume (set (reg sp) (reg whatever)) sets args_size
854 if (code
== REG
&& src
!= stack_pointer_rtx
)
856 offset
= -cur_args_size
;
857 #ifndef STACK_GROWS_DOWNWARD
860 return offset
- cur_offset
;
863 if (! (code
== PLUS
|| code
== MINUS
)
864 || XEXP (src
, 0) != stack_pointer_rtx
865 || !CONST_INT_P (XEXP (src
, 1)))
868 /* (set (reg sp) (plus (reg sp) (const_int))) */
869 offset
= INTVAL (XEXP (src
, 1));
875 if (MEM_P (src
) && !MEM_P (dest
))
879 /* (set (mem (pre_dec (reg sp))) (foo)) */
880 src
= XEXP (dest
, 0);
881 code
= GET_CODE (src
);
887 if (XEXP (src
, 0) == stack_pointer_rtx
)
889 rtx val
= XEXP (XEXP (src
, 1), 1);
890 /* We handle only adjustments by constant amount. */
891 gcc_assert (GET_CODE (XEXP (src
, 1)) == PLUS
892 && CONST_INT_P (val
));
893 offset
= -INTVAL (val
);
900 if (XEXP (src
, 0) == stack_pointer_rtx
)
902 offset
= GET_MODE_SIZE (GET_MODE (dest
));
909 if (XEXP (src
, 0) == stack_pointer_rtx
)
911 offset
= -GET_MODE_SIZE (GET_MODE (dest
));
926 /* Add a CFI to update the running total of the size of arguments
927 pushed onto the stack. */
930 dwarf2out_args_size (HOST_WIDE_INT size
)
932 if (size
== cur_row
->args_size
)
935 cur_row
->args_size
= size
;
936 add_cfi_args_size (size
);
939 /* Record a stack adjustment of OFFSET bytes. */
942 dwarf2out_stack_adjust (HOST_WIDE_INT offset
)
944 dw_cfa_location loc
= cur_row
->cfa
;
946 if (loc
.reg
== dw_stack_pointer_regnum
)
947 loc
.offset
+= offset
;
949 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
950 cur_trace
->cfa_store
.offset
+= offset
;
952 #ifndef STACK_GROWS_DOWNWARD
956 queued_args_size
+= offset
;
957 if (queued_args_size
< 0)
958 queued_args_size
= 0;
960 /* ??? The assumption seems to be that if A_O_A, the only CFA adjustments
961 involving the stack pointer are inside the prologue and marked as
962 RTX_FRAME_RELATED_P. That said, should we not verify this assumption
963 by *asserting* A_O_A at this point? Why else would we have a change
964 to the stack pointer? */
965 if (ACCUMULATE_OUTGOING_ARGS
)
969 if (flag_asynchronous_unwind_tables
)
970 dwarf2out_args_size (queued_args_size
);
973 /* Check INSN to see if it looks like a push or a stack adjustment, and
974 make a note of it if it does. EH uses this information to find out
975 how much extra space it needs to pop off the stack. */
978 dwarf2out_notice_stack_adjust (rtx insn
, bool after_p
)
980 HOST_WIDE_INT offset
;
983 /* Don't handle epilogues at all. Certainly it would be wrong to do so
984 with this function. Proper support would require all frame-related
985 insns to be marked, and to be able to handle saving state around
986 epilogues textually in the middle of the function. */
987 if (prologue_epilogue_contains (insn
))
990 /* If INSN is an instruction from target of an annulled branch, the
991 effects are for the target only and so current argument size
992 shouldn't change at all. */
994 && INSN_ANNULLED_BRANCH_P (XVECEXP (final_sequence
, 0, 0))
995 && INSN_FROM_TARGET_P (insn
))
998 /* If only calls can throw, and we have a frame pointer,
999 save up adjustments until we see the CALL_INSN. */
1000 if (!flag_asynchronous_unwind_tables
1001 && cur_row
->cfa
.reg
!= dw_stack_pointer_regnum
)
1003 if (CALL_P (insn
) && !after_p
)
1005 /* Extract the size of the args from the CALL rtx itself. */
1006 insn
= PATTERN (insn
);
1007 if (GET_CODE (insn
) == PARALLEL
)
1008 insn
= XVECEXP (insn
, 0, 0);
1009 if (GET_CODE (insn
) == SET
)
1010 insn
= SET_SRC (insn
);
1011 gcc_assert (GET_CODE (insn
) == CALL
);
1012 gcc_assert (queued_args_size
== INTVAL (XEXP (insn
, 1)));
1013 dwarf2out_args_size (queued_args_size
);
1018 if (CALL_P (insn
) && !after_p
)
1020 if (!flag_asynchronous_unwind_tables
)
1021 dwarf2out_args_size (queued_args_size
);
1024 else if (BARRIER_P (insn
))
1026 else if (GET_CODE (PATTERN (insn
)) == SET
)
1027 offset
= stack_adjust_offset (PATTERN (insn
), queued_args_size
, 0);
1028 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
1029 || GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1031 /* There may be stack adjustments inside compound insns. Search
1033 for (offset
= 0, i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
1034 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1035 offset
+= stack_adjust_offset (XVECEXP (PATTERN (insn
), 0, i
),
1036 queued_args_size
, offset
);
1044 dwarf2out_stack_adjust (offset
);
1047 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
1048 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
1049 used in places where rtl is prohibited. */
1051 static inline unsigned
1052 dwf_regno (const_rtx reg
)
1054 return DWARF_FRAME_REGNUM (REGNO (reg
));
1057 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
1060 compare_reg_or_pc (rtx x
, rtx y
)
1062 if (REG_P (x
) && REG_P (y
))
1063 return REGNO (x
) == REGNO (y
);
1067 /* Record SRC as being saved in DEST. DEST may be null to delete an
1068 existing entry. SRC may be a register or PC_RTX. */
1071 record_reg_saved_in_reg (rtx dest
, rtx src
)
1073 reg_saved_in_data
*elt
;
1076 FOR_EACH_VEC_ELT (reg_saved_in_data
, cur_trace
->regs_saved_in_regs
, i
, elt
)
1077 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1080 VEC_unordered_remove (reg_saved_in_data
,
1081 cur_trace
->regs_saved_in_regs
, i
);
1083 elt
->saved_in_reg
= dest
;
1090 elt
= VEC_safe_push (reg_saved_in_data
, heap
,
1091 cur_trace
->regs_saved_in_regs
, NULL
);
1092 elt
->orig_reg
= src
;
1093 elt
->saved_in_reg
= dest
;
1096 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1097 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1100 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
1105 /* Duplicates waste space, but it's also necessary to remove them
1106 for correctness, since the queue gets output in reverse order. */
1107 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
1108 if (compare_reg_or_pc (q
->reg
, reg
))
1111 q
= VEC_safe_push (queued_reg_save
, heap
, queued_reg_saves
, NULL
);
1115 q
->saved_reg
= sreg
;
1116 q
->cfa_offset
= offset
;
1119 /* Output all the entries in QUEUED_REG_SAVES. */
1122 dwarf2out_flush_queued_reg_saves (void)
1127 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
1129 unsigned int reg
, sreg
;
1131 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1133 if (q
->reg
== pc_rtx
)
1134 reg
= DWARF_FRAME_RETURN_COLUMN
;
1136 reg
= dwf_regno (q
->reg
);
1138 sreg
= dwf_regno (q
->saved_reg
);
1140 sreg
= INVALID_REGNUM
;
1141 reg_save (reg
, sreg
, q
->cfa_offset
);
1144 VEC_truncate (queued_reg_save
, queued_reg_saves
, 0);
1147 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1148 location for? Or, does it clobber a register which we've previously
1149 said that some other register is saved in, and for which we now
1150 have a new location for? */
1153 clobbers_queued_reg_save (const_rtx insn
)
1158 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, iq
, q
)
1161 reg_saved_in_data
*rir
;
1163 if (modified_in_p (q
->reg
, insn
))
1166 FOR_EACH_VEC_ELT (reg_saved_in_data
,
1167 cur_trace
->regs_saved_in_regs
, ir
, rir
)
1168 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1169 && modified_in_p (rir
->saved_in_reg
, insn
))
1176 /* What register, if any, is currently saved in REG? */
1179 reg_saved_in (rtx reg
)
1181 unsigned int regn
= REGNO (reg
);
1183 reg_saved_in_data
*rir
;
1186 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
1187 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1190 FOR_EACH_VEC_ELT (reg_saved_in_data
, cur_trace
->regs_saved_in_regs
, i
, rir
)
1191 if (regn
== REGNO (rir
->saved_in_reg
))
1192 return rir
->orig_reg
;
1197 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1200 dwarf2out_frame_debug_def_cfa (rtx pat
)
1202 dw_cfa_location loc
;
1204 memset (&loc
, 0, sizeof (loc
));
1206 switch (GET_CODE (pat
))
1209 loc
.reg
= dwf_regno (XEXP (pat
, 0));
1210 loc
.offset
= INTVAL (XEXP (pat
, 1));
1214 loc
.reg
= dwf_regno (pat
);
1219 pat
= XEXP (pat
, 0);
1220 if (GET_CODE (pat
) == PLUS
)
1222 loc
.base_offset
= INTVAL (XEXP (pat
, 1));
1223 pat
= XEXP (pat
, 0);
1225 loc
.reg
= dwf_regno (pat
);
1229 /* Recurse and define an expression. */
1236 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1239 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1241 dw_cfa_location loc
= cur_row
->cfa
;
1244 gcc_assert (GET_CODE (pat
) == SET
);
1245 dest
= XEXP (pat
, 0);
1246 src
= XEXP (pat
, 1);
1248 switch (GET_CODE (src
))
1251 gcc_assert (dwf_regno (XEXP (src
, 0)) == loc
.reg
);
1252 loc
.offset
-= INTVAL (XEXP (src
, 1));
1262 loc
.reg
= dwf_regno (dest
);
1263 gcc_assert (loc
.indirect
== 0);
1268 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1271 dwarf2out_frame_debug_cfa_offset (rtx set
)
1273 HOST_WIDE_INT offset
;
1274 rtx src
, addr
, span
;
1275 unsigned int sregno
;
1277 src
= XEXP (set
, 1);
1278 addr
= XEXP (set
, 0);
1279 gcc_assert (MEM_P (addr
));
1280 addr
= XEXP (addr
, 0);
1282 /* As documented, only consider extremely simple addresses. */
1283 switch (GET_CODE (addr
))
1286 gcc_assert (dwf_regno (addr
) == cur_row
->cfa
.reg
);
1287 offset
= -cur_row
->cfa
.offset
;
1290 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_row
->cfa
.reg
);
1291 offset
= INTVAL (XEXP (addr
, 1)) - cur_row
->cfa
.offset
;
1300 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1304 span
= targetm
.dwarf_register_span (src
);
1305 sregno
= dwf_regno (src
);
1308 /* ??? We'd like to use queue_reg_save, but we need to come up with
1309 a different flushing heuristic for epilogues. */
1311 reg_save (sregno
, INVALID_REGNUM
, offset
);
1314 /* We have a PARALLEL describing where the contents of SRC live.
1315 Queue register saves for each piece of the PARALLEL. */
1318 HOST_WIDE_INT span_offset
= offset
;
1320 gcc_assert (GET_CODE (span
) == PARALLEL
);
1322 limit
= XVECLEN (span
, 0);
1323 for (par_index
= 0; par_index
< limit
; par_index
++)
1325 rtx elem
= XVECEXP (span
, 0, par_index
);
1327 sregno
= dwf_regno (src
);
1328 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1329 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1334 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1337 dwarf2out_frame_debug_cfa_register (rtx set
)
1340 unsigned sregno
, dregno
;
1342 src
= XEXP (set
, 1);
1343 dest
= XEXP (set
, 0);
1345 record_reg_saved_in_reg (dest
, src
);
1347 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1349 sregno
= dwf_regno (src
);
1351 dregno
= dwf_regno (dest
);
1353 /* ??? We'd like to use queue_reg_save, but we need to come up with
1354 a different flushing heuristic for epilogues. */
1355 reg_save (sregno
, dregno
, 0);
1358 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1361 dwarf2out_frame_debug_cfa_expression (rtx set
)
1363 rtx src
, dest
, span
;
1364 dw_cfi_ref cfi
= new_cfi ();
1367 dest
= SET_DEST (set
);
1368 src
= SET_SRC (set
);
1370 gcc_assert (REG_P (src
));
1371 gcc_assert (MEM_P (dest
));
1373 span
= targetm
.dwarf_register_span (src
);
1376 regno
= dwf_regno (src
);
1378 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1379 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1380 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1381 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1382 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1384 /* ??? We'd like to use queue_reg_save, were the interface different,
1385 and, as above, we could manage flushing for epilogues. */
1387 update_row_reg_save (cur_row
, regno
, cfi
);
1390 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1393 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1395 unsigned int regno
= dwf_regno (reg
);
1397 add_cfi_restore (regno
);
1398 update_row_reg_save (cur_row
, regno
, NULL
);
1401 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1402 ??? Perhaps we should note in the CIE where windows are saved (instead of
1403 assuming 0(cfa)) and what registers are in the window. */
1406 dwarf2out_frame_debug_cfa_window_save (void)
1408 dw_cfi_ref cfi
= new_cfi ();
1410 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1414 /* Record call frame debugging information for an expression EXPR,
1415 which either sets SP or FP (adjusting how we calculate the frame
1416 address) or saves a register to the stack or another register.
1417 LABEL indicates the address of EXPR.
1419 This function encodes a state machine mapping rtxes to actions on
1420 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1421 users need not read the source code.
1423 The High-Level Picture
1425 Changes in the register we use to calculate the CFA: Currently we
1426 assume that if you copy the CFA register into another register, we
1427 should take the other one as the new CFA register; this seems to
1428 work pretty well. If it's wrong for some target, it's simple
1429 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1431 Changes in the register we use for saving registers to the stack:
1432 This is usually SP, but not always. Again, we deduce that if you
1433 copy SP into another register (and SP is not the CFA register),
1434 then the new register is the one we will be using for register
1435 saves. This also seems to work.
1437 Register saves: There's not much guesswork about this one; if
1438 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1439 register save, and the register used to calculate the destination
1440 had better be the one we think we're using for this purpose.
1441 It's also assumed that a copy from a call-saved register to another
1442 register is saving that register if RTX_FRAME_RELATED_P is set on
1443 that instruction. If the copy is from a call-saved register to
1444 the *same* register, that means that the register is now the same
1445 value as in the caller.
1447 Except: If the register being saved is the CFA register, and the
1448 offset is nonzero, we are saving the CFA, so we assume we have to
1449 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1450 the intent is to save the value of SP from the previous frame.
1452 In addition, if a register has previously been saved to a different
1455 Invariants / Summaries of Rules
1457 cfa current rule for calculating the CFA. It usually
1458 consists of a register and an offset. This is
1459 actually stored in cur_row->cfa, but abbreviated
1460 for the purposes of this documentation.
1461 cfa_store register used by prologue code to save things to the stack
1462 cfa_store.offset is the offset from the value of
1463 cfa_store.reg to the actual CFA
1464 cfa_temp register holding an integral value. cfa_temp.offset
1465 stores the value, which will be used to adjust the
1466 stack pointer. cfa_temp is also used like cfa_store,
1467 to track stores to the stack via fp or a temp reg.
1469 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1470 with cfa.reg as the first operand changes the cfa.reg and its
1471 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1474 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1475 expression yielding a constant. This sets cfa_temp.reg
1476 and cfa_temp.offset.
1478 Rule 5: Create a new register cfa_store used to save items to the
1481 Rules 10-14: Save a register to the stack. Define offset as the
1482 difference of the original location and cfa_store's
1483 location (or cfa_temp's location if cfa_temp is used).
1485 Rules 16-20: If AND operation happens on sp in prologue, we assume
1486 stack is realigned. We will use a group of DW_OP_XXX
1487 expressions to represent the location of the stored
1488 register instead of CFA+offset.
1492 "{a,b}" indicates a choice of a xor b.
1493 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1496 (set <reg1> <reg2>:cfa.reg)
1497 effects: cfa.reg = <reg1>
1498 cfa.offset unchanged
1499 cfa_temp.reg = <reg1>
1500 cfa_temp.offset = cfa.offset
1503 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1504 {<const_int>,<reg>:cfa_temp.reg}))
1505 effects: cfa.reg = sp if fp used
1506 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1507 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1508 if cfa_store.reg==sp
1511 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1512 effects: cfa.reg = fp
1513 cfa_offset += +/- <const_int>
1516 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1517 constraints: <reg1> != fp
1519 effects: cfa.reg = <reg1>
1520 cfa_temp.reg = <reg1>
1521 cfa_temp.offset = cfa.offset
1524 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1525 constraints: <reg1> != fp
1527 effects: cfa_store.reg = <reg1>
1528 cfa_store.offset = cfa.offset - cfa_temp.offset
1531 (set <reg> <const_int>)
1532 effects: cfa_temp.reg = <reg>
1533 cfa_temp.offset = <const_int>
1536 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1537 effects: cfa_temp.reg = <reg1>
1538 cfa_temp.offset |= <const_int>
1541 (set <reg> (high <exp>))
1545 (set <reg> (lo_sum <exp> <const_int>))
1546 effects: cfa_temp.reg = <reg>
1547 cfa_temp.offset = <const_int>
1550 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1551 effects: cfa_store.offset -= <const_int>
1552 cfa.offset = cfa_store.offset if cfa.reg == sp
1554 cfa.base_offset = -cfa_store.offset
1557 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1558 effects: cfa_store.offset += -/+ mode_size(mem)
1559 cfa.offset = cfa_store.offset if cfa.reg == sp
1561 cfa.base_offset = -cfa_store.offset
1564 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1567 effects: cfa.reg = <reg1>
1568 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1571 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1572 effects: cfa.reg = <reg1>
1573 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1576 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1577 effects: cfa.reg = <reg1>
1578 cfa.base_offset = -cfa_temp.offset
1579 cfa_temp.offset -= mode_size(mem)
1582 (set <reg> {unspec, unspec_volatile})
1583 effects: target-dependent
1586 (set sp (and: sp <const_int>))
1587 constraints: cfa_store.reg == sp
1588 effects: cfun->fde.stack_realign = 1
1589 cfa_store.offset = 0
1590 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1593 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1594 effects: cfa_store.offset += -/+ mode_size(mem)
1597 (set (mem ({pre_inc, pre_dec} sp)) fp)
1598 constraints: fde->stack_realign == 1
1599 effects: cfa_store.offset = 0
1600 cfa.reg != HARD_FRAME_POINTER_REGNUM
1603 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1604 constraints: fde->stack_realign == 1
1606 && cfa.indirect == 0
1607 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1608 effects: Use DW_CFA_def_cfa_expression to define cfa
1609 cfa.reg == fde->drap_reg */
1612 dwarf2out_frame_debug_expr (rtx expr
)
1614 dw_cfa_location cfa
= cur_row
->cfa
;
1615 rtx src
, dest
, span
;
1616 HOST_WIDE_INT offset
;
1619 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1620 the PARALLEL independently. The first element is always processed if
1621 it is a SET. This is for backward compatibility. Other elements
1622 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1623 flag is set in them. */
1624 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1627 int limit
= XVECLEN (expr
, 0);
1630 /* PARALLELs have strict read-modify-write semantics, so we
1631 ought to evaluate every rvalue before changing any lvalue.
1632 It's cumbersome to do that in general, but there's an
1633 easy approximation that is enough for all current users:
1634 handle register saves before register assignments. */
1635 if (GET_CODE (expr
) == PARALLEL
)
1636 for (par_index
= 0; par_index
< limit
; par_index
++)
1638 elem
= XVECEXP (expr
, 0, par_index
);
1639 if (GET_CODE (elem
) == SET
1640 && MEM_P (SET_DEST (elem
))
1641 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1642 dwarf2out_frame_debug_expr (elem
);
1645 for (par_index
= 0; par_index
< limit
; par_index
++)
1647 elem
= XVECEXP (expr
, 0, par_index
);
1648 if (GET_CODE (elem
) == SET
1649 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1650 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1651 dwarf2out_frame_debug_expr (elem
);
1652 else if (GET_CODE (elem
) == SET
1654 && !RTX_FRAME_RELATED_P (elem
))
1656 /* Stack adjustment combining might combine some post-prologue
1657 stack adjustment into a prologue stack adjustment. */
1658 HOST_WIDE_INT offset
1659 = stack_adjust_offset (elem
, queued_args_size
, 0);
1662 dwarf2out_stack_adjust (offset
);
1668 gcc_assert (GET_CODE (expr
) == SET
);
1670 src
= SET_SRC (expr
);
1671 dest
= SET_DEST (expr
);
1675 rtx rsi
= reg_saved_in (src
);
1682 switch (GET_CODE (dest
))
1685 switch (GET_CODE (src
))
1687 /* Setting FP from SP. */
1689 if (cfa
.reg
== dwf_regno (src
))
1692 /* Update the CFA rule wrt SP or FP. Make sure src is
1693 relative to the current CFA register.
1695 We used to require that dest be either SP or FP, but the
1696 ARM copies SP to a temporary register, and from there to
1697 FP. So we just rely on the backends to only set
1698 RTX_FRAME_RELATED_P on appropriate insns. */
1699 cfa
.reg
= dwf_regno (dest
);
1700 cur_trace
->cfa_temp
.reg
= cfa
.reg
;
1701 cur_trace
->cfa_temp
.offset
= cfa
.offset
;
1705 /* Saving a register in a register. */
1706 gcc_assert (!fixed_regs
[REGNO (dest
)]
1707 /* For the SPARC and its register window. */
1708 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1710 /* After stack is aligned, we can only save SP in FP
1711 if drap register is used. In this case, we have
1712 to restore stack pointer with the CFA value and we
1713 don't generate this DWARF information. */
1715 && fde
->stack_realign
1716 && REGNO (src
) == STACK_POINTER_REGNUM
)
1717 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1718 && fde
->drap_reg
!= INVALID_REGNUM
1719 && cfa
.reg
!= dwf_regno (src
));
1721 queue_reg_save (src
, dest
, 0);
1728 if (dest
== stack_pointer_rtx
)
1732 switch (GET_CODE (XEXP (src
, 1)))
1735 offset
= INTVAL (XEXP (src
, 1));
1738 gcc_assert (dwf_regno (XEXP (src
, 1))
1739 == cur_trace
->cfa_temp
.reg
);
1740 offset
= cur_trace
->cfa_temp
.offset
;
1746 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1748 /* Restoring SP from FP in the epilogue. */
1749 gcc_assert (cfa
.reg
== dw_frame_pointer_regnum
);
1750 cfa
.reg
= dw_stack_pointer_regnum
;
1752 else if (GET_CODE (src
) == LO_SUM
)
1753 /* Assume we've set the source reg of the LO_SUM from sp. */
1756 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1758 if (GET_CODE (src
) != MINUS
)
1760 if (cfa
.reg
== dw_stack_pointer_regnum
)
1761 cfa
.offset
+= offset
;
1762 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1763 cur_trace
->cfa_store
.offset
+= offset
;
1765 else if (dest
== hard_frame_pointer_rtx
)
1768 /* Either setting the FP from an offset of the SP,
1769 or adjusting the FP */
1770 gcc_assert (frame_pointer_needed
);
1772 gcc_assert (REG_P (XEXP (src
, 0))
1773 && dwf_regno (XEXP (src
, 0)) == cfa
.reg
1774 && CONST_INT_P (XEXP (src
, 1)));
1775 offset
= INTVAL (XEXP (src
, 1));
1776 if (GET_CODE (src
) != MINUS
)
1778 cfa
.offset
+= offset
;
1779 cfa
.reg
= dw_frame_pointer_regnum
;
1783 gcc_assert (GET_CODE (src
) != MINUS
);
1786 if (REG_P (XEXP (src
, 0))
1787 && dwf_regno (XEXP (src
, 0)) == cfa
.reg
1788 && CONST_INT_P (XEXP (src
, 1)))
1790 /* Setting a temporary CFA register that will be copied
1791 into the FP later on. */
1792 offset
= - INTVAL (XEXP (src
, 1));
1793 cfa
.offset
+= offset
;
1794 cfa
.reg
= dwf_regno (dest
);
1795 /* Or used to save regs to the stack. */
1796 cur_trace
->cfa_temp
.reg
= cfa
.reg
;
1797 cur_trace
->cfa_temp
.offset
= cfa
.offset
;
1801 else if (REG_P (XEXP (src
, 0))
1802 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1803 && XEXP (src
, 1) == stack_pointer_rtx
)
1805 /* Setting a scratch register that we will use instead
1806 of SP for saving registers to the stack. */
1807 gcc_assert (cfa
.reg
== dw_stack_pointer_regnum
);
1808 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1809 cur_trace
->cfa_store
.offset
1810 = cfa
.offset
- cur_trace
->cfa_temp
.offset
;
1814 else if (GET_CODE (src
) == LO_SUM
1815 && CONST_INT_P (XEXP (src
, 1)))
1817 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1818 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1827 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1828 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1833 gcc_assert (REG_P (XEXP (src
, 0))
1834 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1835 && CONST_INT_P (XEXP (src
, 1)));
1837 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1838 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1841 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1842 which will fill in all of the bits. */
1849 case UNSPEC_VOLATILE
:
1850 /* All unspecs should be represented by REG_CFA_* notes. */
1856 /* If this AND operation happens on stack pointer in prologue,
1857 we assume the stack is realigned and we extract the
1859 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1861 /* We interpret reg_save differently with stack_realign set.
1862 Thus we must flush whatever we have queued first. */
1863 dwarf2out_flush_queued_reg_saves ();
1865 gcc_assert (cur_trace
->cfa_store
.reg
1866 == dwf_regno (XEXP (src
, 0)));
1867 fde
->stack_realign
= 1;
1868 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1869 cur_trace
->cfa_store
.offset
= 0;
1871 if (cfa
.reg
!= dw_stack_pointer_regnum
1872 && cfa
.reg
!= dw_frame_pointer_regnum
)
1873 fde
->drap_reg
= cfa
.reg
;
1886 /* Saving a register to the stack. Make sure dest is relative to the
1888 switch (GET_CODE (XEXP (dest
, 0)))
1894 /* We can't handle variable size modifications. */
1895 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1897 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1899 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1900 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1902 cur_trace
->cfa_store
.offset
+= offset
;
1903 if (cfa
.reg
== dw_stack_pointer_regnum
)
1904 cfa
.offset
= cur_trace
->cfa_store
.offset
;
1906 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1907 offset
-= cur_trace
->cfa_store
.offset
;
1909 offset
= -cur_trace
->cfa_store
.offset
;
1916 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1917 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1920 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1921 == STACK_POINTER_REGNUM
)
1922 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1924 cur_trace
->cfa_store
.offset
+= offset
;
1926 /* Rule 18: If stack is aligned, we will use FP as a
1927 reference to represent the address of the stored
1930 && fde
->stack_realign
1931 && src
== hard_frame_pointer_rtx
)
1933 gcc_assert (cfa
.reg
!= dw_frame_pointer_regnum
);
1934 cur_trace
->cfa_store
.offset
= 0;
1937 if (cfa
.reg
== dw_stack_pointer_regnum
)
1938 cfa
.offset
= cur_trace
->cfa_store
.offset
;
1940 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1941 offset
+= -cur_trace
->cfa_store
.offset
;
1943 offset
= -cur_trace
->cfa_store
.offset
;
1947 /* With an offset. */
1954 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1955 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1956 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1957 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1960 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1962 if (cfa
.reg
== regno
)
1963 offset
-= cfa
.offset
;
1964 else if (cur_trace
->cfa_store
.reg
== regno
)
1965 offset
-= cur_trace
->cfa_store
.offset
;
1968 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1969 offset
-= cur_trace
->cfa_temp
.offset
;
1975 /* Without an offset. */
1978 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1980 if (cfa
.reg
== regno
)
1981 offset
= -cfa
.offset
;
1982 else if (cur_trace
->cfa_store
.reg
== regno
)
1983 offset
= -cur_trace
->cfa_store
.offset
;
1986 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1987 offset
= -cur_trace
->cfa_temp
.offset
;
1994 gcc_assert (cur_trace
->cfa_temp
.reg
1995 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1996 offset
= -cur_trace
->cfa_temp
.offset
;
1997 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
2005 /* If the source operand of this MEM operation is a memory,
2006 we only care how much stack grew. */
2011 && REGNO (src
) != STACK_POINTER_REGNUM
2012 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
2013 && dwf_regno (src
) == cfa
.reg
)
2015 /* We're storing the current CFA reg into the stack. */
2017 if (cfa
.offset
== 0)
2020 /* If stack is aligned, putting CFA reg into stack means
2021 we can no longer use reg + offset to represent CFA.
2022 Here we use DW_CFA_def_cfa_expression instead. The
2023 result of this expression equals to the original CFA
2026 && fde
->stack_realign
2027 && cfa
.indirect
== 0
2028 && cfa
.reg
!= dw_frame_pointer_regnum
)
2030 dw_cfa_location cfa_exp
;
2032 gcc_assert (fde
->drap_reg
== cfa
.reg
);
2034 cfa_exp
.indirect
= 1;
2035 cfa_exp
.reg
= dw_frame_pointer_regnum
;
2036 cfa_exp
.base_offset
= offset
;
2039 fde
->drap_reg_saved
= 1;
2041 def_cfa_1 (&cfa_exp
);
2045 /* If the source register is exactly the CFA, assume
2046 we're saving SP like any other register; this happens
2049 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
2054 /* Otherwise, we'll need to look in the stack to
2055 calculate the CFA. */
2056 rtx x
= XEXP (dest
, 0);
2060 gcc_assert (REG_P (x
));
2062 cfa
.reg
= dwf_regno (x
);
2063 cfa
.base_offset
= offset
;
2074 span
= targetm
.dwarf_register_span (src
);
2076 queue_reg_save (src
, NULL_RTX
, offset
);
2079 /* We have a PARALLEL describing where the contents of SRC live.
2080 Queue register saves for each piece of the PARALLEL. */
2083 HOST_WIDE_INT span_offset
= offset
;
2085 gcc_assert (GET_CODE (span
) == PARALLEL
);
2087 limit
= XVECLEN (span
, 0);
2088 for (par_index
= 0; par_index
< limit
; par_index
++)
2090 rtx elem
= XVECEXP (span
, 0, par_index
);
2091 queue_reg_save (elem
, NULL_RTX
, span_offset
);
2092 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2102 /* Record call frame debugging information for INSN, which either
2103 sets SP or FP (adjusting how we calculate the frame address) or saves a
2104 register to the stack. If INSN is NULL_RTX, initialize our state.
2106 If AFTER_P is false, we're being called before the insn is emitted,
2107 otherwise after. Call instructions get invoked twice. */
2110 dwarf2out_frame_debug (rtx insn
, bool after_p
)
2113 bool handled_one
= false;
2114 bool need_flush
= false;
2116 if (!NONJUMP_INSN_P (insn
) || clobbers_queued_reg_save (insn
))
2117 dwarf2out_flush_queued_reg_saves ();
2119 if (!RTX_FRAME_RELATED_P (insn
))
2121 /* ??? This should be done unconditionally since stack adjustments
2122 matter if the stack pointer is not the CFA register anymore but
2123 is still used to save registers. */
2124 if (!ACCUMULATE_OUTGOING_ARGS
)
2125 dwarf2out_notice_stack_adjust (insn
, after_p
);
2129 any_cfis_emitted
= false;
2131 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2132 switch (REG_NOTE_KIND (note
))
2134 case REG_FRAME_RELATED_EXPR
:
2135 insn
= XEXP (note
, 0);
2138 case REG_CFA_DEF_CFA
:
2139 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2143 case REG_CFA_ADJUST_CFA
:
2148 if (GET_CODE (n
) == PARALLEL
)
2149 n
= XVECEXP (n
, 0, 0);
2151 dwarf2out_frame_debug_adjust_cfa (n
);
2155 case REG_CFA_OFFSET
:
2158 n
= single_set (insn
);
2159 dwarf2out_frame_debug_cfa_offset (n
);
2163 case REG_CFA_REGISTER
:
2168 if (GET_CODE (n
) == PARALLEL
)
2169 n
= XVECEXP (n
, 0, 0);
2171 dwarf2out_frame_debug_cfa_register (n
);
2175 case REG_CFA_EXPRESSION
:
2178 n
= single_set (insn
);
2179 dwarf2out_frame_debug_cfa_expression (n
);
2183 case REG_CFA_RESTORE
:
2188 if (GET_CODE (n
) == PARALLEL
)
2189 n
= XVECEXP (n
, 0, 0);
2192 dwarf2out_frame_debug_cfa_restore (n
);
2196 case REG_CFA_SET_VDRAP
:
2200 dw_fde_ref fde
= cfun
->fde
;
2203 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2205 fde
->vdrap_reg
= dwf_regno (n
);
2211 case REG_CFA_WINDOW_SAVE
:
2212 dwarf2out_frame_debug_cfa_window_save ();
2216 case REG_CFA_FLUSH_QUEUE
:
2217 /* The actual flush happens below. */
2228 /* Minimize the number of advances by emitting the entire queue
2229 once anything is emitted. */
2230 need_flush
|= any_cfis_emitted
;
2234 insn
= PATTERN (insn
);
2236 dwarf2out_frame_debug_expr (insn
);
2238 /* Check again. A parallel can save and update the same register.
2239 We could probably check just once, here, but this is safer than
2240 removing the check at the start of the function. */
2241 if (any_cfis_emitted
|| clobbers_queued_reg_save (insn
))
2246 dwarf2out_flush_queued_reg_saves ();
2249 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2252 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2254 size_t i
, n_old
, n_new
, n_max
;
2257 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2258 add_cfi (new_row
->cfa_cfi
);
2261 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2266 if (old_row
->args_size
!= new_row
->args_size
)
2267 add_cfi_args_size (new_row
->args_size
);
2269 n_old
= VEC_length (dw_cfi_ref
, old_row
->reg_save
);
2270 n_new
= VEC_length (dw_cfi_ref
, new_row
->reg_save
);
2271 n_max
= MAX (n_old
, n_new
);
2273 for (i
= 0; i
< n_max
; ++i
)
2275 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2278 r_old
= VEC_index (dw_cfi_ref
, old_row
->reg_save
, i
);
2280 r_new
= VEC_index (dw_cfi_ref
, new_row
->reg_save
, i
);
2284 else if (r_new
== NULL
)
2285 add_cfi_restore (i
);
2286 else if (!cfi_equal_p (r_old
, r_new
))
2291 /* Examine CFI and return true if a cfi label and set_loc is needed
2292 beforehand. Even when generating CFI assembler instructions, we
2293 still have to add the cfi to the list so that lookup_cfa_1 works
2294 later on. When -g2 and above we even need to force emitting of
2295 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2296 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2297 and so don't use convert_cfa_to_fb_loc_list. */
2300 cfi_label_required_p (dw_cfi_ref cfi
)
2302 if (!dwarf2out_do_cfi_asm ())
2305 if (dwarf_version
== 2
2306 && debug_info_level
> DINFO_LEVEL_TERSE
2307 && (write_symbols
== DWARF2_DEBUG
2308 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2310 switch (cfi
->dw_cfi_opc
)
2312 case DW_CFA_def_cfa_offset
:
2313 case DW_CFA_def_cfa_offset_sf
:
2314 case DW_CFA_def_cfa_register
:
2315 case DW_CFA_def_cfa
:
2316 case DW_CFA_def_cfa_sf
:
2317 case DW_CFA_def_cfa_expression
:
2318 case DW_CFA_restore_state
:
2327 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2328 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2331 add_cfis_to_fde (void)
2333 dw_fde_ref fde
= cfun
->fde
;
2335 /* We always start with a function_begin label. */
2338 for (insn
= get_insns (); insn
; insn
= next
)
2340 next
= NEXT_INSN (insn
);
2342 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2344 fde
->dw_fde_switch_cfi_index
2345 = VEC_length (dw_cfi_ref
, fde
->dw_fde_cfi
);
2346 /* Don't attempt to advance_loc4 between labels
2347 in different sections. */
2351 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2353 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2354 while (next
&& NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2356 required
|= cfi_label_required_p (NOTE_CFI (next
));
2357 next
= NEXT_INSN (next
);
2361 int num
= dwarf2out_cfi_label_num
;
2362 const char *label
= dwarf2out_cfi_label ();
2366 /* Set the location counter to the new label. */
2368 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2369 : DW_CFA_advance_loc4
);
2370 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2371 VEC_safe_push (dw_cfi_ref
, gc
, fde
->dw_fde_cfi
, xcfi
);
2373 tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2374 NOTE_LABEL_NUMBER (tmp
) = num
;
2379 VEC_safe_push (dw_cfi_ref
, gc
, fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2380 insn
= NEXT_INSN (insn
);
2382 while (insn
!= next
);
2388 /* If LABEL is the start of a trace, then initialize the state of that
2389 trace from CUR_TRACE and CUR_ROW. */
2392 maybe_record_trace_start (rtx start
, rtx origin
)
2396 /* Sync queued data before propagating to a destination,
2397 lest we propagate out-of-date data. */
2398 dwarf2out_flush_queued_reg_saves ();
2399 dwarf2out_args_size (queued_args_size
);
2401 ti
= get_trace_info (start
);
2402 gcc_assert (ti
!= NULL
);
2406 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2407 get_trace_index (cur_trace
), get_trace_index (ti
),
2408 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2409 (origin
? INSN_UID (origin
) : 0));
2412 if (ti
->beg_row
== NULL
)
2414 /* This is the first time we've encountered this trace. Propagate
2415 state across the edge and push the trace onto the work list. */
2416 ti
->beg_row
= copy_cfi_row (cur_row
);
2417 ti
->cfa_store
= cur_trace
->cfa_store
;
2418 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2419 ti
->regs_saved_in_regs
= VEC_copy (reg_saved_in_data
, heap
,
2420 cur_trace
->regs_saved_in_regs
);
2422 VEC_safe_push (dw_trace_info_ref
, heap
, trace_work_list
, ti
);
2425 fprintf (dump_file
, "\tpush trace %u to worklist\n",
2426 get_trace_index (ti
));
2430 /* We ought to have the same state incoming to a given trace no
2431 matter how we arrive at the trace. Anything else means we've
2432 got some kind of optimization error. */
2433 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2437 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2438 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2441 create_trace_edges (rtx insn
)
2448 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2450 else if (tablejump_p (insn
, NULL
, &tmp
))
2454 tmp
= PATTERN (tmp
);
2455 vec
= XVEC (tmp
, GET_CODE (tmp
) == ADDR_DIFF_VEC
);
2457 n
= GET_NUM_ELEM (vec
);
2458 for (i
= 0; i
< n
; ++i
)
2460 lab
= XEXP (RTVEC_ELT (vec
, i
), 0);
2461 maybe_record_trace_start (lab
, insn
);
2464 else if (computed_jump_p (insn
))
2466 for (lab
= forced_labels
; lab
; lab
= XEXP (lab
, 1))
2467 maybe_record_trace_start (XEXP (lab
, 0), insn
);
2469 else if (returnjump_p (insn
))
2471 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2473 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2474 for (i
= 0; i
< n
; ++i
)
2476 lab
= XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0);
2477 maybe_record_trace_start (lab
, insn
);
2482 lab
= JUMP_LABEL (insn
);
2483 gcc_assert (lab
!= NULL
);
2484 maybe_record_trace_start (lab
, insn
);
2487 else if (CALL_P (insn
))
2489 /* Sibling calls don't have edges inside this function. */
2490 if (SIBLING_CALL_P (insn
))
2493 /* Process non-local goto edges. */
2494 if (can_nonlocal_goto (insn
))
2495 for (lab
= nonlocal_goto_handler_labels
; lab
; lab
= XEXP (lab
, 1))
2496 maybe_record_trace_start (XEXP (lab
, 0), insn
);
2499 /* Process EH edges. */
2500 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2502 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2504 maybe_record_trace_start (lp
->landing_pad
, insn
);
2508 /* Scan the trace beginning at INSN and create the CFI notes for the
2509 instructions therein. */
2512 scan_trace (dw_trace_info
*trace
)
2514 rtx insn
= trace
->head
;
2517 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2518 get_trace_index (trace
), rtx_name
[(int) GET_CODE (insn
)],
2521 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2524 cur_row
= trace
->end_row
;
2525 queued_args_size
= cur_row
->args_size
;
2527 for (insn
= NEXT_INSN (insn
); insn
; insn
= NEXT_INSN (insn
))
2531 add_cfi_insn
= PREV_INSN (insn
);
2533 /* Notice the end of a trace. */
2534 if (BARRIER_P (insn
) || save_point_p (insn
))
2536 dwarf2out_flush_queued_reg_saves ();
2537 dwarf2out_args_size (queued_args_size
);
2539 /* Propagate across fallthru edges. */
2540 if (!BARRIER_P (insn
))
2541 maybe_record_trace_start (insn
, NULL
);
2545 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2548 pat
= PATTERN (insn
);
2549 if (asm_noperands (pat
) >= 0)
2551 dwarf2out_frame_debug (insn
, false);
2552 add_cfi_insn
= insn
;
2556 if (GET_CODE (pat
) == SEQUENCE
)
2558 int i
, n
= XVECLEN (pat
, 0);
2559 for (i
= 1; i
< n
; ++i
)
2560 dwarf2out_frame_debug (XVECEXP (pat
, 0, i
), false);
2564 dwarf2out_frame_debug (insn
, false);
2565 else if (find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
)
2566 || (cfun
->can_throw_non_call_exceptions
2567 && can_throw_internal (insn
)))
2568 dwarf2out_flush_queued_reg_saves ();
2570 /* Do not separate tablejump insns from their ADDR_DIFF_VEC.
2571 Putting the note after the VEC should be ok. */
2572 if (!tablejump_p (insn
, NULL
, &add_cfi_insn
))
2573 add_cfi_insn
= insn
;
2575 dwarf2out_frame_debug (insn
, true);
2578 /* Note that a test for control_flow_insn_p does exactly the
2579 same tests as are done to actually create the edges. So
2580 always call the routine and let it not create edges for
2581 non-control-flow insns. */
2582 create_trace_edges (insn
);
2585 add_cfi_insn
= NULL
;
2590 /* Scan the function and create the initial set of CFI notes. */
2593 create_cfi_notes (void)
2597 gcc_checking_assert (queued_reg_saves
== NULL
);
2598 gcc_checking_assert (trace_work_list
== NULL
);
2600 /* Always begin at the entry trace. */
2601 ti
= VEC_index (dw_trace_info
, trace_info
, 0);
2604 while (!VEC_empty (dw_trace_info_ref
, trace_work_list
))
2606 ti
= VEC_pop (dw_trace_info_ref
, trace_work_list
);
2610 VEC_free (queued_reg_save
, heap
, queued_reg_saves
);
2611 VEC_free (dw_trace_info_ref
, heap
, trace_work_list
);
2614 /* Insert CFI notes between traces to properly change state between them. */
2615 /* ??? TODO: Make use of remember/restore_state. */
2618 connect_traces (void)
2620 unsigned i
, n
= VEC_length (dw_trace_info
, trace_info
);
2621 dw_trace_info
*prev_ti
, *ti
;
2623 prev_ti
= VEC_index (dw_trace_info
, trace_info
, 0);
2625 for (i
= 1; i
< n
; ++i
, prev_ti
= ti
)
2627 dw_cfi_row
*old_row
;
2629 ti
= VEC_index (dw_trace_info
, trace_info
, i
);
2631 /* We must have both queued and processed every trace. */
2632 gcc_assert (ti
->beg_row
&& ti
->end_row
);
2634 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2635 for the portion of the function in the alternate text
2636 section. The row state at the very beginning of that
2637 new FDE will be exactly the row state from the CIE. */
2638 if (ti
->switch_sections
)
2639 old_row
= cie_cfi_row
;
2641 old_row
= prev_ti
->end_row
;
2643 add_cfi_insn
= ti
->head
;
2644 change_cfi_row (old_row
, ti
->beg_row
);
2646 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2650 fprintf (dump_file
, "Fixup between trace %u and %u:\n", i
- 1, i
);
2655 note
= NEXT_INSN (note
);
2656 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2657 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2659 while (note
!= add_cfi_insn
);
2664 /* Set up the pseudo-cfg of instruction traces, as described at the
2665 block comment at the top of the file. */
2668 create_pseudo_cfg (void)
2670 bool saw_barrier
, switch_sections
;
2675 /* The first trace begins at the start of the function,
2676 and begins with the CIE row state. */
2677 trace_info
= VEC_alloc (dw_trace_info
, heap
, 16);
2678 ti
= VEC_quick_push (dw_trace_info
, trace_info
, NULL
);
2680 memset (ti
, 0, sizeof (*ti
));
2681 ti
->head
= get_insns ();
2682 ti
->beg_row
= cie_cfi_row
;
2683 ti
->cfa_store
= cie_cfi_row
->cfa
;
2684 ti
->cfa_temp
.reg
= INVALID_REGNUM
;
2685 if (cie_return_save
)
2686 VEC_safe_push (reg_saved_in_data
, heap
,
2687 ti
->regs_saved_in_regs
, cie_return_save
);
2689 /* Walk all the insns, collecting start of trace locations. */
2690 saw_barrier
= false;
2691 switch_sections
= false;
2692 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2694 if (BARRIER_P (insn
))
2696 else if (NOTE_P (insn
)
2697 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2699 /* We should have just seen a barrier. */
2700 gcc_assert (saw_barrier
);
2701 switch_sections
= true;
2703 /* Watch out for save_point notes between basic blocks.
2704 In particular, a note after a barrier. Do not record these,
2705 delaying trace creation until the label. */
2706 else if (save_point_p (insn
)
2707 && (LABEL_P (insn
) || !saw_barrier
))
2709 ti
= VEC_safe_push (dw_trace_info
, heap
, trace_info
, NULL
);
2710 memset (ti
, 0, sizeof (*ti
));
2712 ti
->switch_sections
= switch_sections
;
2714 saw_barrier
= false;
2715 switch_sections
= false;
2719 /* Create the trace index after we've finished building trace_info,
2720 avoiding stale pointer problems due to reallocation. */
2721 trace_index
= htab_create (VEC_length (dw_trace_info
, trace_info
),
2722 dw_trace_info_hash
, dw_trace_info_eq
, NULL
);
2723 FOR_EACH_VEC_ELT (dw_trace_info
, trace_info
, i
, ti
)
2728 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", i
,
2729 rtx_name
[(int) GET_CODE (ti
->head
)], INSN_UID (ti
->head
),
2730 ti
->switch_sections
? " (section switch)" : "");
2732 slot
= htab_find_slot_with_hash (trace_index
, ti
,
2733 INSN_UID (ti
->head
), INSERT
);
2734 gcc_assert (*slot
== NULL
);
2735 *slot
= (void *) ti
;
2739 /* Record the initial position of the return address. RTL is
2740 INCOMING_RETURN_ADDR_RTX. */
2743 initial_return_save (rtx rtl
)
2745 unsigned int reg
= INVALID_REGNUM
;
2746 HOST_WIDE_INT offset
= 0;
2748 switch (GET_CODE (rtl
))
2751 /* RA is in a register. */
2752 reg
= dwf_regno (rtl
);
2756 /* RA is on the stack. */
2757 rtl
= XEXP (rtl
, 0);
2758 switch (GET_CODE (rtl
))
2761 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2766 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2767 offset
= INTVAL (XEXP (rtl
, 1));
2771 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2772 offset
= -INTVAL (XEXP (rtl
, 1));
2782 /* The return address is at some offset from any value we can
2783 actually load. For instance, on the SPARC it is in %i7+8. Just
2784 ignore the offset for now; it doesn't matter for unwinding frames. */
2785 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2786 initial_return_save (XEXP (rtl
, 0));
2793 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2795 if (reg
!= INVALID_REGNUM
)
2796 record_reg_saved_in_reg (rtl
, pc_rtx
);
2797 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2802 create_cie_data (void)
2804 dw_cfa_location loc
;
2805 dw_trace_info cie_trace
;
2807 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2808 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2810 memset (&cie_trace
, 0, sizeof(cie_trace
));
2811 cur_trace
= &cie_trace
;
2813 add_cfi_vec
= &cie_cfi_vec
;
2814 cie_cfi_row
= cur_row
= new_cfi_row ();
2816 /* On entry, the Canonical Frame Address is at SP. */
2817 memset(&loc
, 0, sizeof (loc
));
2818 loc
.reg
= dw_stack_pointer_regnum
;
2819 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2822 if (targetm
.debug_unwind_info () == UI_DWARF2
2823 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2825 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2827 /* For a few targets, we have the return address incoming into a
2828 register, but choose a different return column. This will result
2829 in a DW_CFA_register for the return, and an entry in
2830 regs_saved_in_regs to match. If the target later stores that
2831 return address register to the stack, we want to be able to emit
2832 the DW_CFA_offset against the return column, not the intermediate
2833 save register. Save the contents of regs_saved_in_regs so that
2834 we can re-initialize it at the start of each function. */
2835 switch (VEC_length (reg_saved_in_data
, cie_trace
.regs_saved_in_regs
))
2840 cie_return_save
= ggc_alloc_reg_saved_in_data ();
2841 *cie_return_save
= *VEC_index (reg_saved_in_data
,
2842 cie_trace
.regs_saved_in_regs
, 0);
2843 VEC_free (reg_saved_in_data
, heap
, cie_trace
.regs_saved_in_regs
);
2855 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2856 state at each location within the function. These notes will be
2857 emitted during pass_final. */
2860 execute_dwarf2_frame (void)
2862 /* The first time we're called, compute the incoming frame state. */
2863 if (cie_cfi_vec
== NULL
)
2866 dwarf2out_alloc_current_fde ();
2868 create_pseudo_cfg ();
2871 create_cfi_notes ();
2875 /* Free all the data we allocated. */
2880 FOR_EACH_VEC_ELT (dw_trace_info
, trace_info
, i
, ti
)
2881 VEC_free (reg_saved_in_data
, heap
, ti
->regs_saved_in_regs
);
2883 VEC_free (dw_trace_info
, heap
, trace_info
);
2885 htab_delete (trace_index
);
2891 /* Convert a DWARF call frame info. operation to its string name */
2894 dwarf_cfi_name (unsigned int cfi_opc
)
2898 case DW_CFA_advance_loc
:
2899 return "DW_CFA_advance_loc";
2901 return "DW_CFA_offset";
2902 case DW_CFA_restore
:
2903 return "DW_CFA_restore";
2905 return "DW_CFA_nop";
2906 case DW_CFA_set_loc
:
2907 return "DW_CFA_set_loc";
2908 case DW_CFA_advance_loc1
:
2909 return "DW_CFA_advance_loc1";
2910 case DW_CFA_advance_loc2
:
2911 return "DW_CFA_advance_loc2";
2912 case DW_CFA_advance_loc4
:
2913 return "DW_CFA_advance_loc4";
2914 case DW_CFA_offset_extended
:
2915 return "DW_CFA_offset_extended";
2916 case DW_CFA_restore_extended
:
2917 return "DW_CFA_restore_extended";
2918 case DW_CFA_undefined
:
2919 return "DW_CFA_undefined";
2920 case DW_CFA_same_value
:
2921 return "DW_CFA_same_value";
2922 case DW_CFA_register
:
2923 return "DW_CFA_register";
2924 case DW_CFA_remember_state
:
2925 return "DW_CFA_remember_state";
2926 case DW_CFA_restore_state
:
2927 return "DW_CFA_restore_state";
2928 case DW_CFA_def_cfa
:
2929 return "DW_CFA_def_cfa";
2930 case DW_CFA_def_cfa_register
:
2931 return "DW_CFA_def_cfa_register";
2932 case DW_CFA_def_cfa_offset
:
2933 return "DW_CFA_def_cfa_offset";
2936 case DW_CFA_def_cfa_expression
:
2937 return "DW_CFA_def_cfa_expression";
2938 case DW_CFA_expression
:
2939 return "DW_CFA_expression";
2940 case DW_CFA_offset_extended_sf
:
2941 return "DW_CFA_offset_extended_sf";
2942 case DW_CFA_def_cfa_sf
:
2943 return "DW_CFA_def_cfa_sf";
2944 case DW_CFA_def_cfa_offset_sf
:
2945 return "DW_CFA_def_cfa_offset_sf";
2947 /* SGI/MIPS specific */
2948 case DW_CFA_MIPS_advance_loc8
:
2949 return "DW_CFA_MIPS_advance_loc8";
2951 /* GNU extensions */
2952 case DW_CFA_GNU_window_save
:
2953 return "DW_CFA_GNU_window_save";
2954 case DW_CFA_GNU_args_size
:
2955 return "DW_CFA_GNU_args_size";
2956 case DW_CFA_GNU_negative_offset_extended
:
2957 return "DW_CFA_GNU_negative_offset_extended";
2960 return "DW_CFA_<unknown>";
2964 /* This routine will generate the correct assembly data for a location
2965 description based on a cfi entry with a complex address. */
2968 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
2970 dw_loc_descr_ref loc
;
2973 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
2976 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
2977 dw2_asm_output_data (1, r
, NULL
);
2978 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
2981 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
2983 /* Output the size of the block. */
2984 size
= size_of_locs (loc
);
2985 dw2_asm_output_data_uleb128 (size
, NULL
);
2987 /* Now output the operations themselves. */
2988 output_loc_sequence (loc
, for_eh
);
2991 /* Similar, but used for .cfi_escape. */
2994 output_cfa_loc_raw (dw_cfi_ref cfi
)
2996 dw_loc_descr_ref loc
;
2999 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3002 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3003 fprintf (asm_out_file
, "%#x,", r
);
3004 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3007 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3009 /* Output the size of the block. */
3010 size
= size_of_locs (loc
);
3011 dw2_asm_output_data_uleb128_raw (size
);
3012 fputc (',', asm_out_file
);
3014 /* Now output the operations themselves. */
3015 output_loc_sequence_raw (loc
);
3018 /* Output a Call Frame Information opcode and its operand(s). */
3021 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3026 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3027 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3028 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3029 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3030 ((unsigned HOST_WIDE_INT
)
3031 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3032 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3034 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3035 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3036 "DW_CFA_offset, column %#lx", r
);
3037 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3038 dw2_asm_output_data_uleb128 (off
, NULL
);
3040 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3042 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3043 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3044 "DW_CFA_restore, column %#lx", r
);
3048 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3049 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3051 switch (cfi
->dw_cfi_opc
)
3053 case DW_CFA_set_loc
:
3055 dw2_asm_output_encoded_addr_rtx (
3056 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3057 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3060 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3061 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3062 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3065 case DW_CFA_advance_loc1
:
3066 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3067 fde
->dw_fde_current_label
, NULL
);
3068 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3071 case DW_CFA_advance_loc2
:
3072 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3073 fde
->dw_fde_current_label
, NULL
);
3074 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3077 case DW_CFA_advance_loc4
:
3078 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3079 fde
->dw_fde_current_label
, NULL
);
3080 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3083 case DW_CFA_MIPS_advance_loc8
:
3084 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3085 fde
->dw_fde_current_label
, NULL
);
3086 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3089 case DW_CFA_offset_extended
:
3090 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3091 dw2_asm_output_data_uleb128 (r
, NULL
);
3092 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3093 dw2_asm_output_data_uleb128 (off
, NULL
);
3096 case DW_CFA_def_cfa
:
3097 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3098 dw2_asm_output_data_uleb128 (r
, NULL
);
3099 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3102 case DW_CFA_offset_extended_sf
:
3103 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3104 dw2_asm_output_data_uleb128 (r
, NULL
);
3105 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3106 dw2_asm_output_data_sleb128 (off
, NULL
);
3109 case DW_CFA_def_cfa_sf
:
3110 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3111 dw2_asm_output_data_uleb128 (r
, NULL
);
3112 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3113 dw2_asm_output_data_sleb128 (off
, NULL
);
3116 case DW_CFA_restore_extended
:
3117 case DW_CFA_undefined
:
3118 case DW_CFA_same_value
:
3119 case DW_CFA_def_cfa_register
:
3120 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3121 dw2_asm_output_data_uleb128 (r
, NULL
);
3124 case DW_CFA_register
:
3125 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3126 dw2_asm_output_data_uleb128 (r
, NULL
);
3127 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3128 dw2_asm_output_data_uleb128 (r
, NULL
);
3131 case DW_CFA_def_cfa_offset
:
3132 case DW_CFA_GNU_args_size
:
3133 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3136 case DW_CFA_def_cfa_offset_sf
:
3137 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3138 dw2_asm_output_data_sleb128 (off
, NULL
);
3141 case DW_CFA_GNU_window_save
:
3144 case DW_CFA_def_cfa_expression
:
3145 case DW_CFA_expression
:
3146 output_cfa_loc (cfi
, for_eh
);
3149 case DW_CFA_GNU_negative_offset_extended
:
3150 /* Obsoleted by DW_CFA_offset_extended_sf. */
3159 /* Similar, but do it via assembler directives instead. */
3162 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3164 unsigned long r
, r2
;
3166 switch (cfi
->dw_cfi_opc
)
3168 case DW_CFA_advance_loc
:
3169 case DW_CFA_advance_loc1
:
3170 case DW_CFA_advance_loc2
:
3171 case DW_CFA_advance_loc4
:
3172 case DW_CFA_MIPS_advance_loc8
:
3173 case DW_CFA_set_loc
:
3174 /* Should only be created in a code path not followed when emitting
3175 via directives. The assembler is going to take care of this for
3176 us. But this routines is also used for debugging dumps, so
3178 gcc_assert (f
!= asm_out_file
);
3179 fprintf (f
, "\t.cfi_advance_loc\n");
3183 case DW_CFA_offset_extended
:
3184 case DW_CFA_offset_extended_sf
:
3185 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3186 fprintf (f
, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3187 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3190 case DW_CFA_restore
:
3191 case DW_CFA_restore_extended
:
3192 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3193 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3196 case DW_CFA_undefined
:
3197 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3198 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3201 case DW_CFA_same_value
:
3202 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3203 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3206 case DW_CFA_def_cfa
:
3207 case DW_CFA_def_cfa_sf
:
3208 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3209 fprintf (f
, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3210 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3213 case DW_CFA_def_cfa_register
:
3214 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3215 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3218 case DW_CFA_register
:
3219 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3220 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3221 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3224 case DW_CFA_def_cfa_offset
:
3225 case DW_CFA_def_cfa_offset_sf
:
3226 fprintf (f
, "\t.cfi_def_cfa_offset "
3227 HOST_WIDE_INT_PRINT_DEC
"\n",
3228 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3231 case DW_CFA_remember_state
:
3232 fprintf (f
, "\t.cfi_remember_state\n");
3234 case DW_CFA_restore_state
:
3235 fprintf (f
, "\t.cfi_restore_state\n");
3238 case DW_CFA_GNU_args_size
:
3239 if (f
== asm_out_file
)
3241 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3242 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3244 fprintf (f
, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC
,
3245 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3250 fprintf (f
, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC
"\n",
3251 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3255 case DW_CFA_GNU_window_save
:
3256 fprintf (f
, "\t.cfi_window_save\n");
3259 case DW_CFA_def_cfa_expression
:
3260 if (f
!= asm_out_file
)
3262 fprintf (f
, "\t.cfi_def_cfa_expression ...\n");
3266 case DW_CFA_expression
:
3267 if (f
!= asm_out_file
)
3269 fprintf (f
, "\t.cfi_cfa_expression ...\n");
3272 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3273 output_cfa_loc_raw (cfi
);
3283 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3285 if (dwarf2out_do_cfi_asm ())
3286 output_cfi_directive (asm_out_file
, cfi
);
3290 /* Save the result of dwarf2out_do_frame across PCH.
3291 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3292 static GTY(()) signed char saved_do_cfi_asm
= 0;
3294 /* Decide whether we want to emit frame unwind information for the current
3295 translation unit. */
3298 dwarf2out_do_frame (void)
3300 /* We want to emit correct CFA location expressions or lists, so we
3301 have to return true if we're going to output debug info, even if
3302 we're not going to output frame or unwind info. */
3303 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3306 if (saved_do_cfi_asm
> 0)
3309 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3312 if ((flag_unwind_tables
|| flag_exceptions
)
3313 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3319 /* Decide whether to emit frame unwind via assembler directives. */
3322 dwarf2out_do_cfi_asm (void)
3326 #ifdef MIPS_DEBUGGING_INFO
3330 if (saved_do_cfi_asm
!= 0)
3331 return saved_do_cfi_asm
> 0;
3333 /* Assume failure for a moment. */
3334 saved_do_cfi_asm
= -1;
3336 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3338 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3341 /* Make sure the personality encoding is one the assembler can support.
3342 In particular, aligned addresses can't be handled. */
3343 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3344 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3346 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3347 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3350 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3351 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3352 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3353 && !flag_unwind_tables
&& !flag_exceptions
3354 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3358 saved_do_cfi_asm
= 1;
3363 gate_dwarf2_frame (void)
3365 #ifndef HAVE_prologue
3366 /* Targets which still implement the prologue in assembler text
3367 cannot use the generic dwarf2 unwinding. */
3371 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3372 from the optimized shrink-wrapping annotations that we will compute.
3373 For now, only produce the CFI notes for dwarf2. */
3374 return dwarf2out_do_frame ();
3377 struct rtl_opt_pass pass_dwarf2_frame
=
3381 "dwarf2", /* name */
3382 gate_dwarf2_frame
, /* gate */
3383 execute_dwarf2_frame
, /* execute */
3386 0, /* static_pass_number */
3387 TV_FINAL
, /* tv_id */
3388 0, /* properties_required */
3389 0, /* properties_provided */
3390 0, /* properties_destroyed */
3391 0, /* todo_flags_start */
3392 0 /* todo_flags_finish */
3396 #include "gt-dwarf2cfi.h"