1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
30 #include "basic-block.h"
32 #include "dwarf2out.h"
33 #include "dwarf2asm.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "expr.h" /* init_return_column_size */
42 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
43 #include "output.h" /* asm_out_file */
44 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
47 /* ??? Poison these here until it can be done generically. They've been
48 totally replaced in this file; make sure it stays that way. */
49 #undef DWARF2_UNWIND_INFO
50 #undef DWARF2_FRAME_INFO
51 #if (GCC_VERSION >= 3000)
52 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
55 #ifndef INCOMING_RETURN_ADDR_RTX
56 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
59 /* Maximum size (in bytes) of an artificially generated label. */
60 #define MAX_ARTIFICIAL_LABEL_BYTES 30
62 /* A collected description of an entire row of the abstract CFI table. */
63 typedef struct GTY(()) dw_cfi_row_struct
65 /* The expression that computes the CFA, expressed in two different ways.
66 The CFA member for the simple cases, and the full CFI expression for
67 the complex cases. The later will be a DW_CFA_cfa_expression. */
71 /* The expressions for any register column that is saved. */
75 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
76 typedef struct GTY(()) reg_saved_in_data_struct
{
81 DEF_VEC_O (reg_saved_in_data
);
82 DEF_VEC_ALLOC_O (reg_saved_in_data
, heap
);
84 /* Since we no longer have a proper CFG, we're going to create a facsimile
85 of one on the fly while processing the frame-related insns.
87 We create dw_trace_info structures for each extended basic block beginning
88 and ending at a "save point". Save points are labels, barriers, certain
89 notes, and of course the beginning and end of the function.
91 As we encounter control transfer insns, we propagate the "current"
92 row state across the edges to the starts of traces. When checking is
93 enabled, we validate that we propagate the same data from all sources.
95 All traces are members of the TRACE_INFO array, in the order in which
96 they appear in the instruction stream.
98 All save points are present in the TRACE_INDEX hash, mapping the insn
99 starting a trace to the dw_trace_info describing the trace. */
103 /* The insn that begins the trace. */
106 /* The row state at the beginning and end of the trace. */
107 dw_cfi_row
*beg_row
, *end_row
;
109 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
110 while scanning insns. However, the args_size value is irrelevant at
111 any point except can_throw_internal_p insns. Therefore the "delay"
112 sizes the values that must actually be emitted for this trace. */
113 HOST_WIDE_INT beg_true_args_size
, end_true_args_size
;
114 HOST_WIDE_INT beg_delay_args_size
, end_delay_args_size
;
116 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
119 /* The following variables contain data used in interpreting frame related
120 expressions. These are not part of the "real" row state as defined by
121 Dwarf, but it seems like they need to be propagated into a trace in case
122 frame related expressions have been sunk. */
123 /* ??? This seems fragile. These variables are fragments of a larger
124 expression. If we do not keep the entire expression together, we risk
125 not being able to put it together properly. Consider forcing targets
126 to generate self-contained expressions and dropping all of the magic
127 interpretation code in this file. Or at least refusing to shrink wrap
128 any frame related insn that doesn't contain a complete expression. */
130 /* The register used for saving registers to the stack, and its offset
132 dw_cfa_location cfa_store
;
134 /* A temporary register holding an integral value used in adjusting SP
135 or setting up the store_reg. The "offset" field holds the integer
136 value, not an offset. */
137 dw_cfa_location cfa_temp
;
139 /* A set of registers saved in other registers. This is the inverse of
140 the row->reg_save info, if the entry is a DW_CFA_register. This is
141 implemented as a flat array because it normally contains zero or 1
142 entry, depending on the target. IA-64 is the big spender here, using
143 a maximum of 5 entries. */
144 VEC(reg_saved_in_data
, heap
) *regs_saved_in_regs
;
146 /* An identifier for this trace. Used only for debugging dumps. */
149 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
150 bool switch_sections
;
152 /* True if we've seen different values incoming to beg_true_args_size. */
153 bool args_size_undefined
;
156 DEF_VEC_O (dw_trace_info
);
157 DEF_VEC_ALLOC_O (dw_trace_info
, heap
);
159 typedef dw_trace_info
*dw_trace_info_ref
;
161 DEF_VEC_P (dw_trace_info_ref
);
162 DEF_VEC_ALLOC_P (dw_trace_info_ref
, heap
);
164 /* The variables making up the pseudo-cfg, as described above. */
165 static VEC (dw_trace_info
, heap
) *trace_info
;
166 static VEC (dw_trace_info_ref
, heap
) *trace_work_list
;
167 static htab_t trace_index
;
169 /* A vector of call frame insns for the CIE. */
172 /* The state of the first row of the FDE table, which includes the
173 state provided by the CIE. */
174 static GTY(()) dw_cfi_row
*cie_cfi_row
;
176 static GTY(()) reg_saved_in_data
*cie_return_save
;
178 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
180 /* The insn after which a new CFI note should be emitted. */
181 static rtx add_cfi_insn
;
183 /* When non-null, add_cfi will add the CFI to this vector. */
184 static cfi_vec
*add_cfi_vec
;
186 /* The current instruction trace. */
187 static dw_trace_info
*cur_trace
;
189 /* The current, i.e. most recently generated, row of the CFI table. */
190 static dw_cfi_row
*cur_row
;
192 /* A copy of the current CFA, for use during the processing of a
194 static dw_cfa_location
*cur_cfa
;
196 /* We delay emitting a register save until either (a) we reach the end
197 of the prologue or (b) the register is clobbered. This clusters
198 register saves so that there are fewer pc advances. */
203 HOST_WIDE_INT cfa_offset
;
206 DEF_VEC_O (queued_reg_save
);
207 DEF_VEC_ALLOC_O (queued_reg_save
, heap
);
209 static VEC(queued_reg_save
, heap
) *queued_reg_saves
;
211 /* True if any CFI directives were emitted at the current insn. */
212 static bool any_cfis_emitted
;
214 /* Short-hand for commonly used register numbers. */
215 static unsigned dw_stack_pointer_regnum
;
216 static unsigned dw_frame_pointer_regnum
;
218 /* Hook used by __throw. */
221 expand_builtin_dwarf_sp_column (void)
223 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
224 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
227 /* MEM is a memory reference for the register size table, each element of
228 which has mode MODE. Initialize column C as a return address column. */
231 init_return_column_size (enum machine_mode mode
, rtx mem
, unsigned int c
)
233 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
234 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
235 emit_move_insn (adjust_address (mem
, mode
, offset
), GEN_INT (size
));
238 /* Generate code to initialize the register size table. */
241 expand_builtin_init_dwarf_reg_sizes (tree address
)
244 enum machine_mode mode
= TYPE_MODE (char_type_node
);
245 rtx addr
= expand_normal (address
);
246 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
247 bool wrote_return_column
= false;
249 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
251 unsigned int dnum
= DWARF_FRAME_REGNUM (i
);
252 unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
254 if (rnum
< DWARF_FRAME_REGISTERS
)
256 HOST_WIDE_INT offset
= rnum
* GET_MODE_SIZE (mode
);
257 enum machine_mode save_mode
= reg_raw_mode
[i
];
260 if (HARD_REGNO_CALL_PART_CLOBBERED (i
, save_mode
))
261 save_mode
= choose_hard_reg_mode (i
, 1, true);
262 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
264 if (save_mode
== VOIDmode
)
266 wrote_return_column
= true;
268 size
= GET_MODE_SIZE (save_mode
);
272 emit_move_insn (adjust_address (mem
, mode
, offset
),
273 gen_int_mode (size
, mode
));
277 if (!wrote_return_column
)
278 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
280 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
281 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
284 targetm
.init_dwarf_reg_sizes_extra (address
);
289 dw_trace_info_hash (const void *ptr
)
291 const dw_trace_info
*ti
= (const dw_trace_info
*) ptr
;
292 return INSN_UID (ti
->head
);
296 dw_trace_info_eq (const void *ptr_a
, const void *ptr_b
)
298 const dw_trace_info
*a
= (const dw_trace_info
*) ptr_a
;
299 const dw_trace_info
*b
= (const dw_trace_info
*) ptr_b
;
300 return a
->head
== b
->head
;
303 static dw_trace_info
*
304 get_trace_info (rtx insn
)
308 return (dw_trace_info
*)
309 htab_find_with_hash (trace_index
, &dummy
, INSN_UID (insn
));
313 save_point_p (rtx insn
)
315 /* Labels, except those that are really jump tables. */
317 return inside_basic_block_p (insn
);
319 /* We split traces at the prologue/epilogue notes because those
320 are points at which the unwind info is usually stable. This
321 makes it easier to find spots with identical unwind info so
322 that we can use remember/restore_state opcodes. */
324 switch (NOTE_KIND (insn
))
326 case NOTE_INSN_PROLOGUE_END
:
327 case NOTE_INSN_EPILOGUE_BEG
:
334 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
336 static inline HOST_WIDE_INT
337 div_data_align (HOST_WIDE_INT off
)
339 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
340 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
344 /* Return true if we need a signed version of a given opcode
345 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
348 need_data_align_sf_opcode (HOST_WIDE_INT off
)
350 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
353 /* Return a pointer to a newly allocated Call Frame Instruction. */
355 static inline dw_cfi_ref
358 dw_cfi_ref cfi
= ggc_alloc_dw_cfi_node ();
360 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
361 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
366 /* Return a newly allocated CFI row, with no defined data. */
371 dw_cfi_row
*row
= ggc_alloc_cleared_dw_cfi_row ();
373 row
->cfa
.reg
= INVALID_REGNUM
;
378 /* Return a copy of an existing CFI row. */
381 copy_cfi_row (dw_cfi_row
*src
)
383 dw_cfi_row
*dst
= ggc_alloc_dw_cfi_row ();
386 dst
->reg_save
= VEC_copy (dw_cfi_ref
, gc
, src
->reg_save
);
391 /* Generate a new label for the CFI info to refer to. */
394 dwarf2out_cfi_label (void)
396 int num
= dwarf2out_cfi_label_num
++;
399 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
401 return xstrdup (label
);
404 /* Add CFI either to the current insn stream or to a vector, or both. */
407 add_cfi (dw_cfi_ref cfi
)
409 any_cfis_emitted
= true;
411 if (add_cfi_insn
!= NULL
)
413 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
414 NOTE_CFI (add_cfi_insn
) = cfi
;
417 if (add_cfi_vec
!= NULL
)
418 VEC_safe_push (dw_cfi_ref
, gc
, *add_cfi_vec
, cfi
);
422 add_cfi_args_size (HOST_WIDE_INT size
)
424 dw_cfi_ref cfi
= new_cfi ();
426 /* While we can occasionally have args_size < 0 internally, this state
427 should not persist at a point we actually need an opcode. */
428 gcc_assert (size
>= 0);
430 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
431 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
437 add_cfi_restore (unsigned reg
)
439 dw_cfi_ref cfi
= new_cfi ();
441 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
442 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
447 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
448 that the register column is no longer saved. */
451 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
453 if (VEC_length (dw_cfi_ref
, row
->reg_save
) <= column
)
454 VEC_safe_grow_cleared (dw_cfi_ref
, gc
, row
->reg_save
, column
+ 1);
455 VEC_replace (dw_cfi_ref
, row
->reg_save
, column
, cfi
);
458 /* This function fills in aa dw_cfa_location structure from a dwarf location
459 descriptor sequence. */
462 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_struct
*loc
)
464 struct dw_loc_descr_struct
*ptr
;
466 cfa
->base_offset
= 0;
470 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
472 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
508 cfa
->reg
= op
- DW_OP_reg0
;
511 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
545 cfa
->reg
= op
- DW_OP_breg0
;
546 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
549 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
550 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
555 case DW_OP_plus_uconst
:
556 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
564 /* Find the previous value for the CFA, iteratively. CFI is the opcode
565 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
566 one level of remember/restore state processing. */
569 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
571 switch (cfi
->dw_cfi_opc
)
573 case DW_CFA_def_cfa_offset
:
574 case DW_CFA_def_cfa_offset_sf
:
575 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
577 case DW_CFA_def_cfa_register
:
578 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
581 case DW_CFA_def_cfa_sf
:
582 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
583 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
585 case DW_CFA_def_cfa_expression
:
586 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
589 case DW_CFA_remember_state
:
590 gcc_assert (!remember
->in_use
);
592 remember
->in_use
= 1;
594 case DW_CFA_restore_state
:
595 gcc_assert (remember
->in_use
);
597 remember
->in_use
= 0;
605 /* Determine if two dw_cfa_location structures define the same data. */
608 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
610 return (loc1
->reg
== loc2
->reg
611 && loc1
->offset
== loc2
->offset
612 && loc1
->indirect
== loc2
->indirect
613 && (loc1
->indirect
== 0
614 || loc1
->base_offset
== loc2
->base_offset
));
617 /* Determine if two CFI operands are identical. */
620 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
624 case dw_cfi_oprnd_unused
:
626 case dw_cfi_oprnd_reg_num
:
627 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
628 case dw_cfi_oprnd_offset
:
629 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
630 case dw_cfi_oprnd_addr
:
631 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
632 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
633 case dw_cfi_oprnd_loc
:
634 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
639 /* Determine if two CFI entries are identical. */
642 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
644 enum dwarf_call_frame_info opc
;
646 /* Make things easier for our callers, including missing operands. */
649 if (a
== NULL
|| b
== NULL
)
652 /* Obviously, the opcodes must match. */
654 if (opc
!= b
->dw_cfi_opc
)
657 /* Compare the two operands, re-using the type of the operands as
658 already exposed elsewhere. */
659 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
660 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
661 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
662 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
665 /* Determine if two CFI_ROW structures are identical. */
668 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
670 size_t i
, n_a
, n_b
, n_max
;
674 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
677 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
680 n_a
= VEC_length (dw_cfi_ref
, a
->reg_save
);
681 n_b
= VEC_length (dw_cfi_ref
, b
->reg_save
);
682 n_max
= MAX (n_a
, n_b
);
684 for (i
= 0; i
< n_max
; ++i
)
686 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
689 r_a
= VEC_index (dw_cfi_ref
, a
->reg_save
, i
);
691 r_b
= VEC_index (dw_cfi_ref
, b
->reg_save
, i
);
693 if (!cfi_equal_p (r_a
, r_b
))
700 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
701 what opcode to emit. Returns the CFI opcode to effect the change, or
702 NULL if NEW_CFA == OLD_CFA. */
705 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
709 /* If nothing changed, no need to issue any call frame instructions. */
710 if (cfa_equal_p (old_cfa
, new_cfa
))
715 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
717 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
718 the CFA register did not change but the offset did. The data
719 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
720 in the assembler via the .cfi_def_cfa_offset directive. */
721 if (new_cfa
->offset
< 0)
722 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
724 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
725 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
728 #ifndef MIPS_DEBUGGING_INFO /* SGI dbx thinks this means no offset. */
729 else if (new_cfa
->offset
== old_cfa
->offset
730 && old_cfa
->reg
!= INVALID_REGNUM
731 && !new_cfa
->indirect
732 && !old_cfa
->indirect
)
734 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
735 indicating the CFA register has changed to <register> but the
736 offset has not changed. */
737 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
738 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
742 else if (new_cfa
->indirect
== 0)
744 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
745 indicating the CFA register has changed to <register> with
746 the specified offset. The data factoring for DW_CFA_def_cfa_sf
747 happens in output_cfi, or in the assembler via the .cfi_def_cfa
749 if (new_cfa
->offset
< 0)
750 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
752 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
753 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
754 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
758 /* Construct a DW_CFA_def_cfa_expression instruction to
759 calculate the CFA using a full location expression since no
760 register-offset pair is available. */
761 struct dw_loc_descr_struct
*loc_list
;
763 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
764 loc_list
= build_cfa_loc (new_cfa
, 0);
765 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
771 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
774 def_cfa_1 (dw_cfa_location
*new_cfa
)
778 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
779 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
781 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
784 cur_row
->cfa
= *new_cfa
;
785 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
792 /* Add the CFI for saving a register. REG is the CFA column number.
793 If SREG is -1, the register is saved at OFFSET from the CFA;
794 otherwise it is saved in SREG. */
797 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
799 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
800 dw_cfi_ref cfi
= new_cfi ();
802 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
804 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
806 && fde
->stack_realign
807 && sreg
== INVALID_REGNUM
)
809 cfi
->dw_cfi_opc
= DW_CFA_expression
;
810 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
811 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
812 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
813 fde
->stack_realignment
);
815 else if (sreg
== INVALID_REGNUM
)
817 if (need_data_align_sf_opcode (offset
))
818 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
819 else if (reg
& ~0x3f)
820 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
822 cfi
->dw_cfi_opc
= DW_CFA_offset
;
823 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
825 else if (sreg
== reg
)
827 /* While we could emit something like DW_CFA_same_value or
828 DW_CFA_restore, we never expect to see something like that
829 in a prologue. This is more likely to be a bug. A backend
830 can always bypass this by using REG_CFA_RESTORE directly. */
835 cfi
->dw_cfi_opc
= DW_CFA_register
;
836 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
840 update_row_reg_save (cur_row
, reg
, cfi
);
843 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
844 and adjust data structures to match. */
847 notice_args_size (rtx insn
)
849 HOST_WIDE_INT args_size
, delta
;
852 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
856 args_size
= INTVAL (XEXP (note
, 0));
857 delta
= args_size
- cur_trace
->end_true_args_size
;
861 cur_trace
->end_true_args_size
= args_size
;
863 /* If the CFA is computed off the stack pointer, then we must adjust
864 the computation of the CFA as well. */
865 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
867 gcc_assert (!cur_cfa
->indirect
);
869 /* Convert a change in args_size (always a positive in the
870 direction of stack growth) to a change in stack pointer. */
871 #ifndef STACK_GROWS_DOWNWARD
874 cur_cfa
->offset
+= delta
;
878 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
879 data within the trace related to EH insns and args_size. */
882 notice_eh_throw (rtx insn
)
884 HOST_WIDE_INT args_size
;
886 args_size
= cur_trace
->end_true_args_size
;
887 if (cur_trace
->eh_head
== NULL
)
889 cur_trace
->eh_head
= insn
;
890 cur_trace
->beg_delay_args_size
= args_size
;
891 cur_trace
->end_delay_args_size
= args_size
;
893 else if (cur_trace
->end_delay_args_size
!= args_size
)
895 cur_trace
->end_delay_args_size
= args_size
;
897 /* ??? If the CFA is the stack pointer, search backward for the last
898 CFI note and insert there. Given that the stack changed for the
899 args_size change, there *must* be such a note in between here and
901 add_cfi_args_size (args_size
);
905 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
906 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
907 used in places where rtl is prohibited. */
909 static inline unsigned
910 dwf_regno (const_rtx reg
)
912 return DWARF_FRAME_REGNUM (REGNO (reg
));
915 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
918 compare_reg_or_pc (rtx x
, rtx y
)
920 if (REG_P (x
) && REG_P (y
))
921 return REGNO (x
) == REGNO (y
);
925 /* Record SRC as being saved in DEST. DEST may be null to delete an
926 existing entry. SRC may be a register or PC_RTX. */
929 record_reg_saved_in_reg (rtx dest
, rtx src
)
931 reg_saved_in_data
*elt
;
934 FOR_EACH_VEC_ELT (reg_saved_in_data
, cur_trace
->regs_saved_in_regs
, i
, elt
)
935 if (compare_reg_or_pc (elt
->orig_reg
, src
))
938 VEC_unordered_remove (reg_saved_in_data
,
939 cur_trace
->regs_saved_in_regs
, i
);
941 elt
->saved_in_reg
= dest
;
948 elt
= VEC_safe_push (reg_saved_in_data
, heap
,
949 cur_trace
->regs_saved_in_regs
, NULL
);
951 elt
->saved_in_reg
= dest
;
954 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
955 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
958 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
963 /* Duplicates waste space, but it's also necessary to remove them
964 for correctness, since the queue gets output in reverse order. */
965 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
966 if (compare_reg_or_pc (q
->reg
, reg
))
969 q
= VEC_safe_push (queued_reg_save
, heap
, queued_reg_saves
, NULL
);
974 q
->cfa_offset
= offset
;
977 /* Output all the entries in QUEUED_REG_SAVES. */
980 dwarf2out_flush_queued_reg_saves (void)
985 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
987 unsigned int reg
, sreg
;
989 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
991 if (q
->reg
== pc_rtx
)
992 reg
= DWARF_FRAME_RETURN_COLUMN
;
994 reg
= dwf_regno (q
->reg
);
996 sreg
= dwf_regno (q
->saved_reg
);
998 sreg
= INVALID_REGNUM
;
999 reg_save (reg
, sreg
, q
->cfa_offset
);
1002 VEC_truncate (queued_reg_save
, queued_reg_saves
, 0);
1005 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1006 location for? Or, does it clobber a register which we've previously
1007 said that some other register is saved in, and for which we now
1008 have a new location for? */
1011 clobbers_queued_reg_save (const_rtx insn
)
1016 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, iq
, q
)
1019 reg_saved_in_data
*rir
;
1021 if (modified_in_p (q
->reg
, insn
))
1024 FOR_EACH_VEC_ELT (reg_saved_in_data
,
1025 cur_trace
->regs_saved_in_regs
, ir
, rir
)
1026 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1027 && modified_in_p (rir
->saved_in_reg
, insn
))
1034 /* What register, if any, is currently saved in REG? */
1037 reg_saved_in (rtx reg
)
1039 unsigned int regn
= REGNO (reg
);
1041 reg_saved_in_data
*rir
;
1044 FOR_EACH_VEC_ELT (queued_reg_save
, queued_reg_saves
, i
, q
)
1045 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1048 FOR_EACH_VEC_ELT (reg_saved_in_data
, cur_trace
->regs_saved_in_regs
, i
, rir
)
1049 if (regn
== REGNO (rir
->saved_in_reg
))
1050 return rir
->orig_reg
;
1055 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1058 dwarf2out_frame_debug_def_cfa (rtx pat
)
1060 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1062 if (GET_CODE (pat
) == PLUS
)
1064 cur_cfa
->offset
= INTVAL (XEXP (pat
, 1));
1065 pat
= XEXP (pat
, 0);
1069 cur_cfa
->indirect
= 1;
1070 pat
= XEXP (pat
, 0);
1071 if (GET_CODE (pat
) == PLUS
)
1073 cur_cfa
->base_offset
= INTVAL (XEXP (pat
, 1));
1074 pat
= XEXP (pat
, 0);
1077 /* ??? If this fails, we could be calling into the _loc functions to
1078 define a full expression. So far no port does that. */
1079 gcc_assert (REG_P (pat
));
1080 cur_cfa
->reg
= dwf_regno (pat
);
1083 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1086 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1090 gcc_assert (GET_CODE (pat
) == SET
);
1091 dest
= XEXP (pat
, 0);
1092 src
= XEXP (pat
, 1);
1094 switch (GET_CODE (src
))
1097 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1098 cur_cfa
->offset
-= INTVAL (XEXP (src
, 1));
1108 cur_cfa
->reg
= dwf_regno (dest
);
1109 gcc_assert (cur_cfa
->indirect
== 0);
1112 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1115 dwarf2out_frame_debug_cfa_offset (rtx set
)
1117 HOST_WIDE_INT offset
;
1118 rtx src
, addr
, span
;
1119 unsigned int sregno
;
1121 src
= XEXP (set
, 1);
1122 addr
= XEXP (set
, 0);
1123 gcc_assert (MEM_P (addr
));
1124 addr
= XEXP (addr
, 0);
1126 /* As documented, only consider extremely simple addresses. */
1127 switch (GET_CODE (addr
))
1130 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1131 offset
= -cur_cfa
->offset
;
1134 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1135 offset
= INTVAL (XEXP (addr
, 1)) - cur_cfa
->offset
;
1144 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1148 span
= targetm
.dwarf_register_span (src
);
1149 sregno
= dwf_regno (src
);
1152 /* ??? We'd like to use queue_reg_save, but we need to come up with
1153 a different flushing heuristic for epilogues. */
1155 reg_save (sregno
, INVALID_REGNUM
, offset
);
1158 /* We have a PARALLEL describing where the contents of SRC live.
1159 Queue register saves for each piece of the PARALLEL. */
1162 HOST_WIDE_INT span_offset
= offset
;
1164 gcc_assert (GET_CODE (span
) == PARALLEL
);
1166 limit
= XVECLEN (span
, 0);
1167 for (par_index
= 0; par_index
< limit
; par_index
++)
1169 rtx elem
= XVECEXP (span
, 0, par_index
);
1171 sregno
= dwf_regno (src
);
1172 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1173 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1178 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1181 dwarf2out_frame_debug_cfa_register (rtx set
)
1184 unsigned sregno
, dregno
;
1186 src
= XEXP (set
, 1);
1187 dest
= XEXP (set
, 0);
1189 record_reg_saved_in_reg (dest
, src
);
1191 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1193 sregno
= dwf_regno (src
);
1195 dregno
= dwf_regno (dest
);
1197 /* ??? We'd like to use queue_reg_save, but we need to come up with
1198 a different flushing heuristic for epilogues. */
1199 reg_save (sregno
, dregno
, 0);
1202 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1205 dwarf2out_frame_debug_cfa_expression (rtx set
)
1207 rtx src
, dest
, span
;
1208 dw_cfi_ref cfi
= new_cfi ();
1211 dest
= SET_DEST (set
);
1212 src
= SET_SRC (set
);
1214 gcc_assert (REG_P (src
));
1215 gcc_assert (MEM_P (dest
));
1217 span
= targetm
.dwarf_register_span (src
);
1220 regno
= dwf_regno (src
);
1222 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1223 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1224 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1225 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1226 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1228 /* ??? We'd like to use queue_reg_save, were the interface different,
1229 and, as above, we could manage flushing for epilogues. */
1231 update_row_reg_save (cur_row
, regno
, cfi
);
1234 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1237 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1239 unsigned int regno
= dwf_regno (reg
);
1241 add_cfi_restore (regno
);
1242 update_row_reg_save (cur_row
, regno
, NULL
);
1245 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1246 ??? Perhaps we should note in the CIE where windows are saved (instead of
1247 assuming 0(cfa)) and what registers are in the window. */
1250 dwarf2out_frame_debug_cfa_window_save (void)
1252 dw_cfi_ref cfi
= new_cfi ();
1254 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1258 /* Record call frame debugging information for an expression EXPR,
1259 which either sets SP or FP (adjusting how we calculate the frame
1260 address) or saves a register to the stack or another register.
1261 LABEL indicates the address of EXPR.
1263 This function encodes a state machine mapping rtxes to actions on
1264 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1265 users need not read the source code.
1267 The High-Level Picture
1269 Changes in the register we use to calculate the CFA: Currently we
1270 assume that if you copy the CFA register into another register, we
1271 should take the other one as the new CFA register; this seems to
1272 work pretty well. If it's wrong for some target, it's simple
1273 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1275 Changes in the register we use for saving registers to the stack:
1276 This is usually SP, but not always. Again, we deduce that if you
1277 copy SP into another register (and SP is not the CFA register),
1278 then the new register is the one we will be using for register
1279 saves. This also seems to work.
1281 Register saves: There's not much guesswork about this one; if
1282 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1283 register save, and the register used to calculate the destination
1284 had better be the one we think we're using for this purpose.
1285 It's also assumed that a copy from a call-saved register to another
1286 register is saving that register if RTX_FRAME_RELATED_P is set on
1287 that instruction. If the copy is from a call-saved register to
1288 the *same* register, that means that the register is now the same
1289 value as in the caller.
1291 Except: If the register being saved is the CFA register, and the
1292 offset is nonzero, we are saving the CFA, so we assume we have to
1293 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1294 the intent is to save the value of SP from the previous frame.
1296 In addition, if a register has previously been saved to a different
1299 Invariants / Summaries of Rules
1301 cfa current rule for calculating the CFA. It usually
1302 consists of a register and an offset. This is
1303 actually stored in *cur_cfa, but abbreviated
1304 for the purposes of this documentation.
1305 cfa_store register used by prologue code to save things to the stack
1306 cfa_store.offset is the offset from the value of
1307 cfa_store.reg to the actual CFA
1308 cfa_temp register holding an integral value. cfa_temp.offset
1309 stores the value, which will be used to adjust the
1310 stack pointer. cfa_temp is also used like cfa_store,
1311 to track stores to the stack via fp or a temp reg.
1313 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1314 with cfa.reg as the first operand changes the cfa.reg and its
1315 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1318 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1319 expression yielding a constant. This sets cfa_temp.reg
1320 and cfa_temp.offset.
1322 Rule 5: Create a new register cfa_store used to save items to the
1325 Rules 10-14: Save a register to the stack. Define offset as the
1326 difference of the original location and cfa_store's
1327 location (or cfa_temp's location if cfa_temp is used).
1329 Rules 16-20: If AND operation happens on sp in prologue, we assume
1330 stack is realigned. We will use a group of DW_OP_XXX
1331 expressions to represent the location of the stored
1332 register instead of CFA+offset.
1336 "{a,b}" indicates a choice of a xor b.
1337 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1340 (set <reg1> <reg2>:cfa.reg)
1341 effects: cfa.reg = <reg1>
1342 cfa.offset unchanged
1343 cfa_temp.reg = <reg1>
1344 cfa_temp.offset = cfa.offset
1347 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1348 {<const_int>,<reg>:cfa_temp.reg}))
1349 effects: cfa.reg = sp if fp used
1350 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1351 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1352 if cfa_store.reg==sp
1355 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1356 effects: cfa.reg = fp
1357 cfa_offset += +/- <const_int>
1360 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1361 constraints: <reg1> != fp
1363 effects: cfa.reg = <reg1>
1364 cfa_temp.reg = <reg1>
1365 cfa_temp.offset = cfa.offset
1368 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1369 constraints: <reg1> != fp
1371 effects: cfa_store.reg = <reg1>
1372 cfa_store.offset = cfa.offset - cfa_temp.offset
1375 (set <reg> <const_int>)
1376 effects: cfa_temp.reg = <reg>
1377 cfa_temp.offset = <const_int>
1380 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1381 effects: cfa_temp.reg = <reg1>
1382 cfa_temp.offset |= <const_int>
1385 (set <reg> (high <exp>))
1389 (set <reg> (lo_sum <exp> <const_int>))
1390 effects: cfa_temp.reg = <reg>
1391 cfa_temp.offset = <const_int>
1394 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1395 effects: cfa_store.offset -= <const_int>
1396 cfa.offset = cfa_store.offset if cfa.reg == sp
1398 cfa.base_offset = -cfa_store.offset
1401 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1402 effects: cfa_store.offset += -/+ mode_size(mem)
1403 cfa.offset = cfa_store.offset if cfa.reg == sp
1405 cfa.base_offset = -cfa_store.offset
1408 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1411 effects: cfa.reg = <reg1>
1412 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1415 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1416 effects: cfa.reg = <reg1>
1417 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1420 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1421 effects: cfa.reg = <reg1>
1422 cfa.base_offset = -cfa_temp.offset
1423 cfa_temp.offset -= mode_size(mem)
1426 (set <reg> {unspec, unspec_volatile})
1427 effects: target-dependent
1430 (set sp (and: sp <const_int>))
1431 constraints: cfa_store.reg == sp
1432 effects: cfun->fde.stack_realign = 1
1433 cfa_store.offset = 0
1434 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1437 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1438 effects: cfa_store.offset += -/+ mode_size(mem)
1441 (set (mem ({pre_inc, pre_dec} sp)) fp)
1442 constraints: fde->stack_realign == 1
1443 effects: cfa_store.offset = 0
1444 cfa.reg != HARD_FRAME_POINTER_REGNUM
1447 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1448 constraints: fde->stack_realign == 1
1450 && cfa.indirect == 0
1451 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1452 effects: Use DW_CFA_def_cfa_expression to define cfa
1453 cfa.reg == fde->drap_reg */
1456 dwarf2out_frame_debug_expr (rtx expr
)
1458 rtx src
, dest
, span
;
1459 HOST_WIDE_INT offset
;
1462 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1463 the PARALLEL independently. The first element is always processed if
1464 it is a SET. This is for backward compatibility. Other elements
1465 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1466 flag is set in them. */
1467 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1470 int limit
= XVECLEN (expr
, 0);
1473 /* PARALLELs have strict read-modify-write semantics, so we
1474 ought to evaluate every rvalue before changing any lvalue.
1475 It's cumbersome to do that in general, but there's an
1476 easy approximation that is enough for all current users:
1477 handle register saves before register assignments. */
1478 if (GET_CODE (expr
) == PARALLEL
)
1479 for (par_index
= 0; par_index
< limit
; par_index
++)
1481 elem
= XVECEXP (expr
, 0, par_index
);
1482 if (GET_CODE (elem
) == SET
1483 && MEM_P (SET_DEST (elem
))
1484 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1485 dwarf2out_frame_debug_expr (elem
);
1488 for (par_index
= 0; par_index
< limit
; par_index
++)
1490 elem
= XVECEXP (expr
, 0, par_index
);
1491 if (GET_CODE (elem
) == SET
1492 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1493 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1494 dwarf2out_frame_debug_expr (elem
);
1499 gcc_assert (GET_CODE (expr
) == SET
);
1501 src
= SET_SRC (expr
);
1502 dest
= SET_DEST (expr
);
1506 rtx rsi
= reg_saved_in (src
);
1513 switch (GET_CODE (dest
))
1516 switch (GET_CODE (src
))
1518 /* Setting FP from SP. */
1520 if (cur_cfa
->reg
== dwf_regno (src
))
1523 /* Update the CFA rule wrt SP or FP. Make sure src is
1524 relative to the current CFA register.
1526 We used to require that dest be either SP or FP, but the
1527 ARM copies SP to a temporary register, and from there to
1528 FP. So we just rely on the backends to only set
1529 RTX_FRAME_RELATED_P on appropriate insns. */
1530 cur_cfa
->reg
= dwf_regno (dest
);
1531 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1532 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1536 /* Saving a register in a register. */
1537 gcc_assert (!fixed_regs
[REGNO (dest
)]
1538 /* For the SPARC and its register window. */
1539 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1541 /* After stack is aligned, we can only save SP in FP
1542 if drap register is used. In this case, we have
1543 to restore stack pointer with the CFA value and we
1544 don't generate this DWARF information. */
1546 && fde
->stack_realign
1547 && REGNO (src
) == STACK_POINTER_REGNUM
)
1548 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1549 && fde
->drap_reg
!= INVALID_REGNUM
1550 && cur_cfa
->reg
!= dwf_regno (src
));
1552 queue_reg_save (src
, dest
, 0);
1559 if (dest
== stack_pointer_rtx
)
1563 switch (GET_CODE (XEXP (src
, 1)))
1566 offset
= INTVAL (XEXP (src
, 1));
1569 gcc_assert (dwf_regno (XEXP (src
, 1))
1570 == cur_trace
->cfa_temp
.reg
);
1571 offset
= cur_trace
->cfa_temp
.offset
;
1577 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1579 /* Restoring SP from FP in the epilogue. */
1580 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1581 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1583 else if (GET_CODE (src
) == LO_SUM
)
1584 /* Assume we've set the source reg of the LO_SUM from sp. */
1587 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1589 if (GET_CODE (src
) != MINUS
)
1591 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1592 cur_cfa
->offset
+= offset
;
1593 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1594 cur_trace
->cfa_store
.offset
+= offset
;
1596 else if (dest
== hard_frame_pointer_rtx
)
1599 /* Either setting the FP from an offset of the SP,
1600 or adjusting the FP */
1601 gcc_assert (frame_pointer_needed
);
1603 gcc_assert (REG_P (XEXP (src
, 0))
1604 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1605 && CONST_INT_P (XEXP (src
, 1)));
1606 offset
= INTVAL (XEXP (src
, 1));
1607 if (GET_CODE (src
) != MINUS
)
1609 cur_cfa
->offset
+= offset
;
1610 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1614 gcc_assert (GET_CODE (src
) != MINUS
);
1617 if (REG_P (XEXP (src
, 0))
1618 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1619 && CONST_INT_P (XEXP (src
, 1)))
1621 /* Setting a temporary CFA register that will be copied
1622 into the FP later on. */
1623 offset
= - INTVAL (XEXP (src
, 1));
1624 cur_cfa
->offset
+= offset
;
1625 cur_cfa
->reg
= dwf_regno (dest
);
1626 /* Or used to save regs to the stack. */
1627 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1628 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1632 else if (REG_P (XEXP (src
, 0))
1633 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1634 && XEXP (src
, 1) == stack_pointer_rtx
)
1636 /* Setting a scratch register that we will use instead
1637 of SP for saving registers to the stack. */
1638 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1639 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1640 cur_trace
->cfa_store
.offset
1641 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1645 else if (GET_CODE (src
) == LO_SUM
1646 && CONST_INT_P (XEXP (src
, 1)))
1648 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1649 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1658 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1659 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1664 gcc_assert (REG_P (XEXP (src
, 0))
1665 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1666 && CONST_INT_P (XEXP (src
, 1)));
1668 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1669 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1672 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1673 which will fill in all of the bits. */
1680 case UNSPEC_VOLATILE
:
1681 /* All unspecs should be represented by REG_CFA_* notes. */
1687 /* If this AND operation happens on stack pointer in prologue,
1688 we assume the stack is realigned and we extract the
1690 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1692 /* We interpret reg_save differently with stack_realign set.
1693 Thus we must flush whatever we have queued first. */
1694 dwarf2out_flush_queued_reg_saves ();
1696 gcc_assert (cur_trace
->cfa_store
.reg
1697 == dwf_regno (XEXP (src
, 0)));
1698 fde
->stack_realign
= 1;
1699 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1700 cur_trace
->cfa_store
.offset
= 0;
1702 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1703 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1704 fde
->drap_reg
= cur_cfa
->reg
;
1715 /* Saving a register to the stack. Make sure dest is relative to the
1717 switch (GET_CODE (XEXP (dest
, 0)))
1723 /* We can't handle variable size modifications. */
1724 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1726 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1728 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1729 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1731 cur_trace
->cfa_store
.offset
+= offset
;
1732 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1733 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1735 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1736 offset
-= cur_trace
->cfa_store
.offset
;
1738 offset
= -cur_trace
->cfa_store
.offset
;
1745 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1746 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1749 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1750 == STACK_POINTER_REGNUM
)
1751 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1753 cur_trace
->cfa_store
.offset
+= offset
;
1755 /* Rule 18: If stack is aligned, we will use FP as a
1756 reference to represent the address of the stored
1759 && fde
->stack_realign
1760 && src
== hard_frame_pointer_rtx
)
1762 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1763 cur_trace
->cfa_store
.offset
= 0;
1766 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1767 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1769 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1770 offset
+= -cur_trace
->cfa_store
.offset
;
1772 offset
= -cur_trace
->cfa_store
.offset
;
1776 /* With an offset. */
1783 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1784 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1785 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1786 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1789 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1791 if (cur_cfa
->reg
== regno
)
1792 offset
-= cur_cfa
->offset
;
1793 else if (cur_trace
->cfa_store
.reg
== regno
)
1794 offset
-= cur_trace
->cfa_store
.offset
;
1797 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1798 offset
-= cur_trace
->cfa_temp
.offset
;
1804 /* Without an offset. */
1807 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1809 if (cur_cfa
->reg
== regno
)
1810 offset
= -cur_cfa
->offset
;
1811 else if (cur_trace
->cfa_store
.reg
== regno
)
1812 offset
= -cur_trace
->cfa_store
.offset
;
1815 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1816 offset
= -cur_trace
->cfa_temp
.offset
;
1823 gcc_assert (cur_trace
->cfa_temp
.reg
1824 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1825 offset
= -cur_trace
->cfa_temp
.offset
;
1826 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1834 /* If the source operand of this MEM operation is a memory,
1835 we only care how much stack grew. */
1840 && REGNO (src
) != STACK_POINTER_REGNUM
1841 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1842 && dwf_regno (src
) == cur_cfa
->reg
)
1844 /* We're storing the current CFA reg into the stack. */
1846 if (cur_cfa
->offset
== 0)
1849 /* If stack is aligned, putting CFA reg into stack means
1850 we can no longer use reg + offset to represent CFA.
1851 Here we use DW_CFA_def_cfa_expression instead. The
1852 result of this expression equals to the original CFA
1855 && fde
->stack_realign
1856 && cur_cfa
->indirect
== 0
1857 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1859 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1861 cur_cfa
->indirect
= 1;
1862 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1863 cur_cfa
->base_offset
= offset
;
1864 cur_cfa
->offset
= 0;
1866 fde
->drap_reg_saved
= 1;
1870 /* If the source register is exactly the CFA, assume
1871 we're saving SP like any other register; this happens
1873 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
1878 /* Otherwise, we'll need to look in the stack to
1879 calculate the CFA. */
1880 rtx x
= XEXP (dest
, 0);
1884 gcc_assert (REG_P (x
));
1886 cur_cfa
->reg
= dwf_regno (x
);
1887 cur_cfa
->base_offset
= offset
;
1888 cur_cfa
->indirect
= 1;
1895 span
= targetm
.dwarf_register_span (src
);
1897 queue_reg_save (src
, NULL_RTX
, offset
);
1900 /* We have a PARALLEL describing where the contents of SRC live.
1901 Queue register saves for each piece of the PARALLEL. */
1904 HOST_WIDE_INT span_offset
= offset
;
1906 gcc_assert (GET_CODE (span
) == PARALLEL
);
1908 limit
= XVECLEN (span
, 0);
1909 for (par_index
= 0; par_index
< limit
; par_index
++)
1911 rtx elem
= XVECEXP (span
, 0, par_index
);
1912 queue_reg_save (elem
, NULL_RTX
, span_offset
);
1913 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1923 /* Record call frame debugging information for INSN, which either sets
1924 SP or FP (adjusting how we calculate the frame address) or saves a
1925 register to the stack. */
1928 dwarf2out_frame_debug (rtx insn
)
1931 bool handled_one
= false;
1932 bool need_flush
= false;
1934 any_cfis_emitted
= false;
1936 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1937 switch (REG_NOTE_KIND (note
))
1939 case REG_FRAME_RELATED_EXPR
:
1940 insn
= XEXP (note
, 0);
1943 case REG_CFA_DEF_CFA
:
1944 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
1948 case REG_CFA_ADJUST_CFA
:
1953 if (GET_CODE (n
) == PARALLEL
)
1954 n
= XVECEXP (n
, 0, 0);
1956 dwarf2out_frame_debug_adjust_cfa (n
);
1960 case REG_CFA_OFFSET
:
1963 n
= single_set (insn
);
1964 dwarf2out_frame_debug_cfa_offset (n
);
1968 case REG_CFA_REGISTER
:
1973 if (GET_CODE (n
) == PARALLEL
)
1974 n
= XVECEXP (n
, 0, 0);
1976 dwarf2out_frame_debug_cfa_register (n
);
1980 case REG_CFA_EXPRESSION
:
1983 n
= single_set (insn
);
1984 dwarf2out_frame_debug_cfa_expression (n
);
1988 case REG_CFA_RESTORE
:
1993 if (GET_CODE (n
) == PARALLEL
)
1994 n
= XVECEXP (n
, 0, 0);
1997 dwarf2out_frame_debug_cfa_restore (n
);
2001 case REG_CFA_SET_VDRAP
:
2005 dw_fde_ref fde
= cfun
->fde
;
2008 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2010 fde
->vdrap_reg
= dwf_regno (n
);
2016 case REG_CFA_WINDOW_SAVE
:
2017 dwarf2out_frame_debug_cfa_window_save ();
2021 case REG_CFA_FLUSH_QUEUE
:
2022 /* The actual flush happens below. */
2033 /* Minimize the number of advances by emitting the entire queue
2034 once anything is emitted. */
2035 need_flush
|= any_cfis_emitted
;
2039 insn
= PATTERN (insn
);
2041 dwarf2out_frame_debug_expr (insn
);
2043 /* Check again. A parallel can save and update the same register.
2044 We could probably check just once, here, but this is safer than
2045 removing the check at the start of the function. */
2046 if (any_cfis_emitted
|| clobbers_queued_reg_save (insn
))
2051 dwarf2out_flush_queued_reg_saves ();
2054 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2057 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2059 size_t i
, n_old
, n_new
, n_max
;
2062 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2063 add_cfi (new_row
->cfa_cfi
);
2066 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2071 n_old
= VEC_length (dw_cfi_ref
, old_row
->reg_save
);
2072 n_new
= VEC_length (dw_cfi_ref
, new_row
->reg_save
);
2073 n_max
= MAX (n_old
, n_new
);
2075 for (i
= 0; i
< n_max
; ++i
)
2077 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2080 r_old
= VEC_index (dw_cfi_ref
, old_row
->reg_save
, i
);
2082 r_new
= VEC_index (dw_cfi_ref
, new_row
->reg_save
, i
);
2086 else if (r_new
== NULL
)
2087 add_cfi_restore (i
);
2088 else if (!cfi_equal_p (r_old
, r_new
))
2093 /* Examine CFI and return true if a cfi label and set_loc is needed
2094 beforehand. Even when generating CFI assembler instructions, we
2095 still have to add the cfi to the list so that lookup_cfa_1 works
2096 later on. When -g2 and above we even need to force emitting of
2097 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2098 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2099 and so don't use convert_cfa_to_fb_loc_list. */
2102 cfi_label_required_p (dw_cfi_ref cfi
)
2104 if (!dwarf2out_do_cfi_asm ())
2107 if (dwarf_version
== 2
2108 && debug_info_level
> DINFO_LEVEL_TERSE
2109 && (write_symbols
== DWARF2_DEBUG
2110 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2112 switch (cfi
->dw_cfi_opc
)
2114 case DW_CFA_def_cfa_offset
:
2115 case DW_CFA_def_cfa_offset_sf
:
2116 case DW_CFA_def_cfa_register
:
2117 case DW_CFA_def_cfa
:
2118 case DW_CFA_def_cfa_sf
:
2119 case DW_CFA_def_cfa_expression
:
2120 case DW_CFA_restore_state
:
2129 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2130 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2133 add_cfis_to_fde (void)
2135 dw_fde_ref fde
= cfun
->fde
;
2137 /* We always start with a function_begin label. */
2140 for (insn
= get_insns (); insn
; insn
= next
)
2142 next
= NEXT_INSN (insn
);
2144 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2146 fde
->dw_fde_switch_cfi_index
2147 = VEC_length (dw_cfi_ref
, fde
->dw_fde_cfi
);
2148 /* Don't attempt to advance_loc4 between labels
2149 in different sections. */
2153 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2155 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2156 while (next
&& NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2158 required
|= cfi_label_required_p (NOTE_CFI (next
));
2159 next
= NEXT_INSN (next
);
2163 int num
= dwarf2out_cfi_label_num
;
2164 const char *label
= dwarf2out_cfi_label ();
2168 /* Set the location counter to the new label. */
2170 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2171 : DW_CFA_advance_loc4
);
2172 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2173 VEC_safe_push (dw_cfi_ref
, gc
, fde
->dw_fde_cfi
, xcfi
);
2175 tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2176 NOTE_LABEL_NUMBER (tmp
) = num
;
2181 VEC_safe_push (dw_cfi_ref
, gc
, fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2182 insn
= NEXT_INSN (insn
);
2184 while (insn
!= next
);
2190 /* If LABEL is the start of a trace, then initialize the state of that
2191 trace from CUR_TRACE and CUR_ROW. */
2194 maybe_record_trace_start (rtx start
, rtx origin
)
2197 HOST_WIDE_INT args_size
;
2199 ti
= get_trace_info (start
);
2200 gcc_assert (ti
!= NULL
);
2204 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2205 cur_trace
->id
, ti
->id
,
2206 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2207 (origin
? INSN_UID (origin
) : 0));
2210 args_size
= cur_trace
->end_true_args_size
;
2211 if (ti
->beg_row
== NULL
)
2213 /* This is the first time we've encountered this trace. Propagate
2214 state across the edge and push the trace onto the work list. */
2215 ti
->beg_row
= copy_cfi_row (cur_row
);
2216 ti
->beg_true_args_size
= args_size
;
2218 ti
->cfa_store
= cur_trace
->cfa_store
;
2219 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2220 ti
->regs_saved_in_regs
= VEC_copy (reg_saved_in_data
, heap
,
2221 cur_trace
->regs_saved_in_regs
);
2223 VEC_safe_push (dw_trace_info_ref
, heap
, trace_work_list
, ti
);
2226 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2231 /* We ought to have the same state incoming to a given trace no
2232 matter how we arrive at the trace. Anything else means we've
2233 got some kind of optimization error. */
2234 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2236 /* The args_size is allowed to conflict if it isn't actually used. */
2237 if (ti
->beg_true_args_size
!= args_size
)
2238 ti
->args_size_undefined
= true;
2242 /* Similarly, but handle the args_size and CFA reset across EH
2243 and non-local goto edges. */
2246 maybe_record_trace_start_abnormal (rtx start
, rtx origin
)
2248 HOST_WIDE_INT save_args_size
, delta
;
2249 dw_cfa_location save_cfa
;
2251 save_args_size
= cur_trace
->end_true_args_size
;
2252 if (save_args_size
== 0)
2254 maybe_record_trace_start (start
, origin
);
2258 delta
= -save_args_size
;
2259 cur_trace
->end_true_args_size
= 0;
2261 save_cfa
= cur_row
->cfa
;
2262 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2264 /* Convert a change in args_size (always a positive in the
2265 direction of stack growth) to a change in stack pointer. */
2266 #ifndef STACK_GROWS_DOWNWARD
2269 cur_row
->cfa
.offset
+= delta
;
2272 maybe_record_trace_start (start
, origin
);
2274 cur_trace
->end_true_args_size
= save_args_size
;
2275 cur_row
->cfa
= save_cfa
;
2278 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2279 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2282 create_trace_edges (rtx insn
)
2289 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2292 if (tablejump_p (insn
, NULL
, &tmp
))
2296 tmp
= PATTERN (tmp
);
2297 vec
= XVEC (tmp
, GET_CODE (tmp
) == ADDR_DIFF_VEC
);
2299 n
= GET_NUM_ELEM (vec
);
2300 for (i
= 0; i
< n
; ++i
)
2302 lab
= XEXP (RTVEC_ELT (vec
, i
), 0);
2303 maybe_record_trace_start (lab
, insn
);
2306 else if (computed_jump_p (insn
))
2308 for (lab
= forced_labels
; lab
; lab
= XEXP (lab
, 1))
2309 maybe_record_trace_start (XEXP (lab
, 0), insn
);
2311 else if (returnjump_p (insn
))
2313 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2315 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2316 for (i
= 0; i
< n
; ++i
)
2318 lab
= XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0);
2319 maybe_record_trace_start (lab
, insn
);
2324 lab
= JUMP_LABEL (insn
);
2325 gcc_assert (lab
!= NULL
);
2326 maybe_record_trace_start (lab
, insn
);
2329 else if (CALL_P (insn
))
2331 /* Sibling calls don't have edges inside this function. */
2332 if (SIBLING_CALL_P (insn
))
2335 /* Process non-local goto edges. */
2336 if (can_nonlocal_goto (insn
))
2337 for (lab
= nonlocal_goto_handler_labels
; lab
; lab
= XEXP (lab
, 1))
2338 maybe_record_trace_start_abnormal (XEXP (lab
, 0), insn
);
2340 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2342 rtx seq
= PATTERN (insn
);
2343 int i
, n
= XVECLEN (seq
, 0);
2344 for (i
= 0; i
< n
; ++i
)
2345 create_trace_edges (XVECEXP (seq
, 0, i
));
2349 /* Process EH edges. */
2350 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2352 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2354 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2358 /* Scan the trace beginning at INSN and create the CFI notes for the
2359 instructions therein. */
2362 scan_trace (dw_trace_info
*trace
)
2364 rtx insn
= trace
->head
;
2365 dw_cfa_location this_cfa
;
2368 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2369 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2372 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2373 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2376 cur_row
= trace
->end_row
;
2378 this_cfa
= cur_row
->cfa
;
2379 cur_cfa
= &this_cfa
;
2381 for (insn
= NEXT_INSN (insn
); insn
; insn
= NEXT_INSN (insn
))
2383 /* Do everything that happens "before" the insn. */
2384 add_cfi_insn
= PREV_INSN (insn
);
2386 /* Notice the end of a trace. */
2387 if (BARRIER_P (insn
))
2389 /* Don't bother saving the unneeded queued registers at all. */
2390 VEC_truncate (queued_reg_save
, queued_reg_saves
, 0);
2393 if (save_point_p (insn
))
2395 /* Propagate across fallthru edges. */
2396 dwarf2out_flush_queued_reg_saves ();
2397 maybe_record_trace_start (insn
, NULL
);
2401 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2404 /* Flush data before calls and jumps, and of course if necessary. */
2405 if (can_throw_internal (insn
))
2407 dwarf2out_flush_queued_reg_saves ();
2408 notice_eh_throw (insn
);
2410 else if (!NONJUMP_INSN_P (insn
)
2411 || clobbers_queued_reg_save (insn
)
2412 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2413 dwarf2out_flush_queued_reg_saves ();
2415 /* Do everything that happens "after" the insn. */
2416 add_cfi_insn
= insn
;
2418 /* Handle changes to the row state. */
2419 if (RTX_FRAME_RELATED_P (insn
))
2420 dwarf2out_frame_debug (insn
);
2422 /* Look for REG_ARGS_SIZE, and handle it. */
2423 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2425 rtx elt
, pat
= PATTERN (insn
);
2426 int i
, n
= XVECLEN (pat
, 0);
2428 if (INSN_ANNULLED_BRANCH_P (XVECEXP (pat
, 0, 0)))
2430 /* ??? Hopefully multiple delay slots are not annulled. */
2431 gcc_assert (n
== 2);
2432 elt
= XVECEXP (pat
, 0, 1);
2434 /* If ELT is an instruction from target of an annulled branch,
2435 the effects are for the target only and so the args_size
2436 and CFA along the current path shouldn't change. */
2437 if (INSN_FROM_TARGET_P (elt
))
2439 HOST_WIDE_INT restore_args_size
;
2441 restore_args_size
= cur_trace
->end_true_args_size
;
2442 cur_cfa
= &cur_row
->cfa
;
2444 notice_args_size (elt
);
2445 create_trace_edges (insn
);
2447 cur_trace
->end_true_args_size
= restore_args_size
;
2448 cur_row
->cfa
= this_cfa
;
2449 cur_cfa
= &this_cfa
;
2454 for (i
= 1; i
< n
; ++i
)
2456 elt
= XVECEXP (pat
, 0, i
);
2457 notice_args_size (elt
);
2461 notice_args_size (insn
);
2463 /* Between frame-related-p and args_size we might have otherwise
2464 emitted two cfa adjustments. Do it now. */
2465 def_cfa_1 (&this_cfa
);
2467 /* Note that a test for control_flow_insn_p does exactly the
2468 same tests as are done to actually create the edges. So
2469 always call the routine and let it not create edges for
2470 non-control-flow insns. */
2471 create_trace_edges (insn
);
2474 add_cfi_insn
= NULL
;
2480 /* Scan the function and create the initial set of CFI notes. */
2483 create_cfi_notes (void)
2487 gcc_checking_assert (queued_reg_saves
== NULL
);
2488 gcc_checking_assert (trace_work_list
== NULL
);
2490 /* Always begin at the entry trace. */
2491 ti
= VEC_index (dw_trace_info
, trace_info
, 0);
2494 while (!VEC_empty (dw_trace_info_ref
, trace_work_list
))
2496 ti
= VEC_pop (dw_trace_info_ref
, trace_work_list
);
2500 VEC_free (queued_reg_save
, heap
, queued_reg_saves
);
2501 VEC_free (dw_trace_info_ref
, heap
, trace_work_list
);
2504 /* Return the insn before the first NOTE_INSN_CFI after START. */
2507 before_next_cfi_note (rtx start
)
2512 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2515 start
= NEXT_INSN (start
);
2520 /* Insert CFI notes between traces to properly change state between them. */
2523 connect_traces (void)
2525 unsigned i
, n
= VEC_length (dw_trace_info
, trace_info
);
2526 dw_trace_info
*prev_ti
, *ti
;
2528 /* ??? Ideally, we should have both queued and processed every trace.
2529 However the current representation of constant pools on various targets
2530 is indistinguishable from unreachable code. Assume for the moment that
2531 we can simply skip over such traces. */
2532 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2533 these are not "real" instructions, and should not be considered.
2534 This could be generically useful for tablejump data as well. */
2535 /* Remove all unprocessed traces from the list. */
2536 for (i
= n
- 1; i
> 0; --i
)
2538 ti
= VEC_index (dw_trace_info
, trace_info
, i
);
2539 if (ti
->beg_row
== NULL
)
2541 VEC_ordered_remove (dw_trace_info
, trace_info
, i
);
2545 gcc_assert (ti
->end_row
!= NULL
);
2548 /* Work from the end back to the beginning. This lets us easily insert
2549 remember/restore_state notes in the correct order wrt other notes. */
2550 prev_ti
= VEC_index (dw_trace_info
, trace_info
, n
- 1);
2551 for (i
= n
- 1; i
> 0; --i
)
2553 dw_cfi_row
*old_row
;
2556 prev_ti
= VEC_index (dw_trace_info
, trace_info
, i
- 1);
2558 add_cfi_insn
= ti
->head
;
2560 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2561 for the portion of the function in the alternate text
2562 section. The row state at the very beginning of that
2563 new FDE will be exactly the row state from the CIE. */
2564 if (ti
->switch_sections
)
2565 old_row
= cie_cfi_row
;
2568 old_row
= prev_ti
->end_row
;
2569 /* If there's no change from the previous end state, fine. */
2570 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2572 /* Otherwise check for the common case of sharing state with
2573 the beginning of an epilogue, but not the end. Insert
2574 remember/restore opcodes in that case. */
2575 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2579 /* Note that if we blindly insert the remember at the
2580 start of the trace, we can wind up increasing the
2581 size of the unwind info due to extra advance opcodes.
2582 Instead, put the remember immediately before the next
2583 state change. We know there must be one, because the
2584 state at the beginning and head of the trace differ. */
2585 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2587 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2590 add_cfi_insn
= ti
->head
;
2592 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2595 old_row
= prev_ti
->beg_row
;
2597 /* Otherwise, we'll simply change state from the previous end. */
2600 change_cfi_row (old_row
, ti
->beg_row
);
2602 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2606 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2607 prev_ti
->id
, ti
->id
);
2612 note
= NEXT_INSN (note
);
2613 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2614 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2616 while (note
!= add_cfi_insn
);
2620 /* Connect args_size between traces that have can_throw_internal insns. */
2621 if (cfun
->eh
->lp_array
!= NULL
)
2623 HOST_WIDE_INT prev_args_size
= 0;
2625 for (i
= 0; i
< n
; ++i
)
2627 ti
= VEC_index (dw_trace_info
, trace_info
, i
);
2629 if (ti
->switch_sections
)
2631 if (ti
->eh_head
== NULL
)
2633 gcc_assert (!ti
->args_size_undefined
);
2635 if (ti
->beg_delay_args_size
!= prev_args_size
)
2637 /* ??? Search back to previous CFI note. */
2638 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2639 add_cfi_args_size (ti
->beg_delay_args_size
);
2642 prev_args_size
= ti
->end_delay_args_size
;
2647 /* Set up the pseudo-cfg of instruction traces, as described at the
2648 block comment at the top of the file. */
2651 create_pseudo_cfg (void)
2653 bool saw_barrier
, switch_sections
;
2658 /* The first trace begins at the start of the function,
2659 and begins with the CIE row state. */
2660 trace_info
= VEC_alloc (dw_trace_info
, heap
, 16);
2661 ti
= VEC_quick_push (dw_trace_info
, trace_info
, NULL
);
2663 memset (ti
, 0, sizeof (*ti
));
2664 ti
->head
= get_insns ();
2665 ti
->beg_row
= cie_cfi_row
;
2666 ti
->cfa_store
= cie_cfi_row
->cfa
;
2667 ti
->cfa_temp
.reg
= INVALID_REGNUM
;
2668 if (cie_return_save
)
2669 VEC_safe_push (reg_saved_in_data
, heap
,
2670 ti
->regs_saved_in_regs
, cie_return_save
);
2672 /* Walk all the insns, collecting start of trace locations. */
2673 saw_barrier
= false;
2674 switch_sections
= false;
2675 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2677 if (BARRIER_P (insn
))
2679 else if (NOTE_P (insn
)
2680 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2682 /* We should have just seen a barrier. */
2683 gcc_assert (saw_barrier
);
2684 switch_sections
= true;
2686 /* Watch out for save_point notes between basic blocks.
2687 In particular, a note after a barrier. Do not record these,
2688 delaying trace creation until the label. */
2689 else if (save_point_p (insn
)
2690 && (LABEL_P (insn
) || !saw_barrier
))
2692 ti
= VEC_safe_push (dw_trace_info
, heap
, trace_info
, NULL
);
2693 memset (ti
, 0, sizeof (*ti
));
2695 ti
->switch_sections
= switch_sections
;
2696 ti
->id
= VEC_length (dw_trace_info
, trace_info
) - 1;
2698 saw_barrier
= false;
2699 switch_sections
= false;
2703 /* Create the trace index after we've finished building trace_info,
2704 avoiding stale pointer problems due to reallocation. */
2705 trace_index
= htab_create (VEC_length (dw_trace_info
, trace_info
),
2706 dw_trace_info_hash
, dw_trace_info_eq
, NULL
);
2707 FOR_EACH_VEC_ELT (dw_trace_info
, trace_info
, i
, ti
)
2712 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", i
,
2713 rtx_name
[(int) GET_CODE (ti
->head
)], INSN_UID (ti
->head
),
2714 ti
->switch_sections
? " (section switch)" : "");
2716 slot
= htab_find_slot_with_hash (trace_index
, ti
,
2717 INSN_UID (ti
->head
), INSERT
);
2718 gcc_assert (*slot
== NULL
);
2719 *slot
= (void *) ti
;
2723 /* Record the initial position of the return address. RTL is
2724 INCOMING_RETURN_ADDR_RTX. */
2727 initial_return_save (rtx rtl
)
2729 unsigned int reg
= INVALID_REGNUM
;
2730 HOST_WIDE_INT offset
= 0;
2732 switch (GET_CODE (rtl
))
2735 /* RA is in a register. */
2736 reg
= dwf_regno (rtl
);
2740 /* RA is on the stack. */
2741 rtl
= XEXP (rtl
, 0);
2742 switch (GET_CODE (rtl
))
2745 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2750 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2751 offset
= INTVAL (XEXP (rtl
, 1));
2755 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2756 offset
= -INTVAL (XEXP (rtl
, 1));
2766 /* The return address is at some offset from any value we can
2767 actually load. For instance, on the SPARC it is in %i7+8. Just
2768 ignore the offset for now; it doesn't matter for unwinding frames. */
2769 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2770 initial_return_save (XEXP (rtl
, 0));
2777 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2779 if (reg
!= INVALID_REGNUM
)
2780 record_reg_saved_in_reg (rtl
, pc_rtx
);
2781 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2786 create_cie_data (void)
2788 dw_cfa_location loc
;
2789 dw_trace_info cie_trace
;
2791 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2792 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2794 memset (&cie_trace
, 0, sizeof(cie_trace
));
2795 cur_trace
= &cie_trace
;
2797 add_cfi_vec
= &cie_cfi_vec
;
2798 cie_cfi_row
= cur_row
= new_cfi_row ();
2800 /* On entry, the Canonical Frame Address is at SP. */
2801 memset(&loc
, 0, sizeof (loc
));
2802 loc
.reg
= dw_stack_pointer_regnum
;
2803 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2806 if (targetm
.debug_unwind_info () == UI_DWARF2
2807 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2809 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2811 /* For a few targets, we have the return address incoming into a
2812 register, but choose a different return column. This will result
2813 in a DW_CFA_register for the return, and an entry in
2814 regs_saved_in_regs to match. If the target later stores that
2815 return address register to the stack, we want to be able to emit
2816 the DW_CFA_offset against the return column, not the intermediate
2817 save register. Save the contents of regs_saved_in_regs so that
2818 we can re-initialize it at the start of each function. */
2819 switch (VEC_length (reg_saved_in_data
, cie_trace
.regs_saved_in_regs
))
2824 cie_return_save
= ggc_alloc_reg_saved_in_data ();
2825 *cie_return_save
= *VEC_index (reg_saved_in_data
,
2826 cie_trace
.regs_saved_in_regs
, 0);
2827 VEC_free (reg_saved_in_data
, heap
, cie_trace
.regs_saved_in_regs
);
2839 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2840 state at each location within the function. These notes will be
2841 emitted during pass_final. */
2844 execute_dwarf2_frame (void)
2846 /* The first time we're called, compute the incoming frame state. */
2847 if (cie_cfi_vec
== NULL
)
2850 dwarf2out_alloc_current_fde ();
2852 create_pseudo_cfg ();
2855 create_cfi_notes ();
2859 /* Free all the data we allocated. */
2864 FOR_EACH_VEC_ELT (dw_trace_info
, trace_info
, i
, ti
)
2865 VEC_free (reg_saved_in_data
, heap
, ti
->regs_saved_in_regs
);
2867 VEC_free (dw_trace_info
, heap
, trace_info
);
2869 htab_delete (trace_index
);
2875 /* Convert a DWARF call frame info. operation to its string name */
2878 dwarf_cfi_name (unsigned int cfi_opc
)
2882 case DW_CFA_advance_loc
:
2883 return "DW_CFA_advance_loc";
2885 return "DW_CFA_offset";
2886 case DW_CFA_restore
:
2887 return "DW_CFA_restore";
2889 return "DW_CFA_nop";
2890 case DW_CFA_set_loc
:
2891 return "DW_CFA_set_loc";
2892 case DW_CFA_advance_loc1
:
2893 return "DW_CFA_advance_loc1";
2894 case DW_CFA_advance_loc2
:
2895 return "DW_CFA_advance_loc2";
2896 case DW_CFA_advance_loc4
:
2897 return "DW_CFA_advance_loc4";
2898 case DW_CFA_offset_extended
:
2899 return "DW_CFA_offset_extended";
2900 case DW_CFA_restore_extended
:
2901 return "DW_CFA_restore_extended";
2902 case DW_CFA_undefined
:
2903 return "DW_CFA_undefined";
2904 case DW_CFA_same_value
:
2905 return "DW_CFA_same_value";
2906 case DW_CFA_register
:
2907 return "DW_CFA_register";
2908 case DW_CFA_remember_state
:
2909 return "DW_CFA_remember_state";
2910 case DW_CFA_restore_state
:
2911 return "DW_CFA_restore_state";
2912 case DW_CFA_def_cfa
:
2913 return "DW_CFA_def_cfa";
2914 case DW_CFA_def_cfa_register
:
2915 return "DW_CFA_def_cfa_register";
2916 case DW_CFA_def_cfa_offset
:
2917 return "DW_CFA_def_cfa_offset";
2920 case DW_CFA_def_cfa_expression
:
2921 return "DW_CFA_def_cfa_expression";
2922 case DW_CFA_expression
:
2923 return "DW_CFA_expression";
2924 case DW_CFA_offset_extended_sf
:
2925 return "DW_CFA_offset_extended_sf";
2926 case DW_CFA_def_cfa_sf
:
2927 return "DW_CFA_def_cfa_sf";
2928 case DW_CFA_def_cfa_offset_sf
:
2929 return "DW_CFA_def_cfa_offset_sf";
2931 /* SGI/MIPS specific */
2932 case DW_CFA_MIPS_advance_loc8
:
2933 return "DW_CFA_MIPS_advance_loc8";
2935 /* GNU extensions */
2936 case DW_CFA_GNU_window_save
:
2937 return "DW_CFA_GNU_window_save";
2938 case DW_CFA_GNU_args_size
:
2939 return "DW_CFA_GNU_args_size";
2940 case DW_CFA_GNU_negative_offset_extended
:
2941 return "DW_CFA_GNU_negative_offset_extended";
2944 return "DW_CFA_<unknown>";
2948 /* This routine will generate the correct assembly data for a location
2949 description based on a cfi entry with a complex address. */
2952 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
2954 dw_loc_descr_ref loc
;
2957 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
2960 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
2961 dw2_asm_output_data (1, r
, NULL
);
2962 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
2965 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
2967 /* Output the size of the block. */
2968 size
= size_of_locs (loc
);
2969 dw2_asm_output_data_uleb128 (size
, NULL
);
2971 /* Now output the operations themselves. */
2972 output_loc_sequence (loc
, for_eh
);
2975 /* Similar, but used for .cfi_escape. */
2978 output_cfa_loc_raw (dw_cfi_ref cfi
)
2980 dw_loc_descr_ref loc
;
2983 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
2986 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
2987 fprintf (asm_out_file
, "%#x,", r
);
2988 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
2991 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
2993 /* Output the size of the block. */
2994 size
= size_of_locs (loc
);
2995 dw2_asm_output_data_uleb128_raw (size
);
2996 fputc (',', asm_out_file
);
2998 /* Now output the operations themselves. */
2999 output_loc_sequence_raw (loc
);
3002 /* Output a Call Frame Information opcode and its operand(s). */
3005 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3010 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3011 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3012 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3013 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3014 ((unsigned HOST_WIDE_INT
)
3015 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3016 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3018 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3019 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3020 "DW_CFA_offset, column %#lx", r
);
3021 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3022 dw2_asm_output_data_uleb128 (off
, NULL
);
3024 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3026 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3027 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3028 "DW_CFA_restore, column %#lx", r
);
3032 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3033 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3035 switch (cfi
->dw_cfi_opc
)
3037 case DW_CFA_set_loc
:
3039 dw2_asm_output_encoded_addr_rtx (
3040 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3041 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3044 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3045 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3046 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3049 case DW_CFA_advance_loc1
:
3050 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3051 fde
->dw_fde_current_label
, NULL
);
3052 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3055 case DW_CFA_advance_loc2
:
3056 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3057 fde
->dw_fde_current_label
, NULL
);
3058 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3061 case DW_CFA_advance_loc4
:
3062 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3063 fde
->dw_fde_current_label
, NULL
);
3064 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3067 case DW_CFA_MIPS_advance_loc8
:
3068 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3069 fde
->dw_fde_current_label
, NULL
);
3070 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3073 case DW_CFA_offset_extended
:
3074 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3075 dw2_asm_output_data_uleb128 (r
, NULL
);
3076 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3077 dw2_asm_output_data_uleb128 (off
, NULL
);
3080 case DW_CFA_def_cfa
:
3081 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3082 dw2_asm_output_data_uleb128 (r
, NULL
);
3083 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3086 case DW_CFA_offset_extended_sf
:
3087 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3088 dw2_asm_output_data_uleb128 (r
, NULL
);
3089 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3090 dw2_asm_output_data_sleb128 (off
, NULL
);
3093 case DW_CFA_def_cfa_sf
:
3094 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3095 dw2_asm_output_data_uleb128 (r
, NULL
);
3096 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3097 dw2_asm_output_data_sleb128 (off
, NULL
);
3100 case DW_CFA_restore_extended
:
3101 case DW_CFA_undefined
:
3102 case DW_CFA_same_value
:
3103 case DW_CFA_def_cfa_register
:
3104 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3105 dw2_asm_output_data_uleb128 (r
, NULL
);
3108 case DW_CFA_register
:
3109 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3110 dw2_asm_output_data_uleb128 (r
, NULL
);
3111 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3112 dw2_asm_output_data_uleb128 (r
, NULL
);
3115 case DW_CFA_def_cfa_offset
:
3116 case DW_CFA_GNU_args_size
:
3117 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3120 case DW_CFA_def_cfa_offset_sf
:
3121 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3122 dw2_asm_output_data_sleb128 (off
, NULL
);
3125 case DW_CFA_GNU_window_save
:
3128 case DW_CFA_def_cfa_expression
:
3129 case DW_CFA_expression
:
3130 output_cfa_loc (cfi
, for_eh
);
3133 case DW_CFA_GNU_negative_offset_extended
:
3134 /* Obsoleted by DW_CFA_offset_extended_sf. */
3143 /* Similar, but do it via assembler directives instead. */
3146 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3148 unsigned long r
, r2
;
3150 switch (cfi
->dw_cfi_opc
)
3152 case DW_CFA_advance_loc
:
3153 case DW_CFA_advance_loc1
:
3154 case DW_CFA_advance_loc2
:
3155 case DW_CFA_advance_loc4
:
3156 case DW_CFA_MIPS_advance_loc8
:
3157 case DW_CFA_set_loc
:
3158 /* Should only be created in a code path not followed when emitting
3159 via directives. The assembler is going to take care of this for
3160 us. But this routines is also used for debugging dumps, so
3162 gcc_assert (f
!= asm_out_file
);
3163 fprintf (f
, "\t.cfi_advance_loc\n");
3167 case DW_CFA_offset_extended
:
3168 case DW_CFA_offset_extended_sf
:
3169 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3170 fprintf (f
, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3171 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3174 case DW_CFA_restore
:
3175 case DW_CFA_restore_extended
:
3176 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3177 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3180 case DW_CFA_undefined
:
3181 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3182 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3185 case DW_CFA_same_value
:
3186 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3187 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3190 case DW_CFA_def_cfa
:
3191 case DW_CFA_def_cfa_sf
:
3192 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3193 fprintf (f
, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC
"\n",
3194 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3197 case DW_CFA_def_cfa_register
:
3198 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3199 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3202 case DW_CFA_register
:
3203 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3204 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3205 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3208 case DW_CFA_def_cfa_offset
:
3209 case DW_CFA_def_cfa_offset_sf
:
3210 fprintf (f
, "\t.cfi_def_cfa_offset "
3211 HOST_WIDE_INT_PRINT_DEC
"\n",
3212 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3215 case DW_CFA_remember_state
:
3216 fprintf (f
, "\t.cfi_remember_state\n");
3218 case DW_CFA_restore_state
:
3219 fprintf (f
, "\t.cfi_restore_state\n");
3222 case DW_CFA_GNU_args_size
:
3223 if (f
== asm_out_file
)
3225 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3226 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3228 fprintf (f
, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC
,
3229 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3234 fprintf (f
, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC
"\n",
3235 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3239 case DW_CFA_GNU_window_save
:
3240 fprintf (f
, "\t.cfi_window_save\n");
3243 case DW_CFA_def_cfa_expression
:
3244 if (f
!= asm_out_file
)
3246 fprintf (f
, "\t.cfi_def_cfa_expression ...\n");
3250 case DW_CFA_expression
:
3251 if (f
!= asm_out_file
)
3253 fprintf (f
, "\t.cfi_cfa_expression ...\n");
3256 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3257 output_cfa_loc_raw (cfi
);
3267 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3269 if (dwarf2out_do_cfi_asm ())
3270 output_cfi_directive (asm_out_file
, cfi
);
3274 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3282 dw_cfa_location dummy
;
3283 memset(&dummy
, 0, sizeof(dummy
));
3284 dummy
.reg
= INVALID_REGNUM
;
3285 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3287 output_cfi_directive (f
, cfi
);
3289 FOR_EACH_VEC_ELT (dw_cfi_ref
, row
->reg_save
, i
, cfi
)
3291 output_cfi_directive (f
, cfi
);
3294 void debug_cfi_row (dw_cfi_row
*row
);
3297 debug_cfi_row (dw_cfi_row
*row
)
3299 dump_cfi_row (stderr
, row
);
3303 /* Save the result of dwarf2out_do_frame across PCH.
3304 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3305 static GTY(()) signed char saved_do_cfi_asm
= 0;
3307 /* Decide whether we want to emit frame unwind information for the current
3308 translation unit. */
3311 dwarf2out_do_frame (void)
3313 /* We want to emit correct CFA location expressions or lists, so we
3314 have to return true if we're going to output debug info, even if
3315 we're not going to output frame or unwind info. */
3316 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3319 if (saved_do_cfi_asm
> 0)
3322 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3325 if ((flag_unwind_tables
|| flag_exceptions
)
3326 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3332 /* Decide whether to emit frame unwind via assembler directives. */
3335 dwarf2out_do_cfi_asm (void)
3339 #ifdef MIPS_DEBUGGING_INFO
3343 if (saved_do_cfi_asm
!= 0)
3344 return saved_do_cfi_asm
> 0;
3346 /* Assume failure for a moment. */
3347 saved_do_cfi_asm
= -1;
3349 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3351 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3354 /* Make sure the personality encoding is one the assembler can support.
3355 In particular, aligned addresses can't be handled. */
3356 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3357 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3359 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3360 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3363 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3364 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3365 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3366 && !flag_unwind_tables
&& !flag_exceptions
3367 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3371 saved_do_cfi_asm
= 1;
3376 gate_dwarf2_frame (void)
3378 #ifndef HAVE_prologue
3379 /* Targets which still implement the prologue in assembler text
3380 cannot use the generic dwarf2 unwinding. */
3384 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3385 from the optimized shrink-wrapping annotations that we will compute.
3386 For now, only produce the CFI notes for dwarf2. */
3387 return dwarf2out_do_frame ();
3390 struct rtl_opt_pass pass_dwarf2_frame
=
3394 "dwarf2", /* name */
3395 gate_dwarf2_frame
, /* gate */
3396 execute_dwarf2_frame
, /* execute */
3399 0, /* static_pass_number */
3400 TV_FINAL
, /* tv_id */
3401 0, /* properties_required */
3402 0, /* properties_provided */
3403 0, /* properties_destroyed */
3404 0, /* todo_flags_start */
3405 0 /* todo_flags_finish */
3409 #include "gt-dwarf2cfi.h"