1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl
;
66 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl
;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num
= 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
106 REAL_VALUE_TYPE dconsthalf
;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
110 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
119 /* A hash table storing CONST_INTs whose absolute value is greater
120 than MAX_SAVED_CONST_INT. */
122 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
123 htab_t const_int_htab
;
125 /* A hash table storing memory attribute structures. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
127 htab_t mem_attrs_htab
;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
131 htab_t reg_attrs_htab
;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
135 htab_t const_double_htab
;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
139 htab_t const_fixed_htab
;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define last_location (crtl->emit.x_last_location)
144 #define first_label_num (crtl->emit.x_first_label_num)
146 static rtx
make_call_insn_raw (rtx
);
147 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
148 static void set_used_decls (tree
);
149 static void mark_label_nuses (rtx
);
150 static hashval_t
const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t
const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx
lookup_const_double (rtx
);
155 static hashval_t
const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx
lookup_const_fixed (rtx
);
158 static hashval_t
mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static mem_attrs
*get_mem_attrs (alias_set_type
, tree
, rtx
, rtx
, unsigned int,
161 addr_space_t
, enum machine_mode
);
162 static hashval_t
reg_attrs_htab_hash (const void *);
163 static int reg_attrs_htab_eq (const void *, const void *);
164 static reg_attrs
*get_reg_attrs (tree
, int);
165 static rtx
gen_const_vector (enum machine_mode
, int);
166 static void copy_rtx_if_shared_1 (rtx
*orig
);
168 /* Probability of the conditional branch currently proceeded by try_split.
169 Set to -1 otherwise. */
170 int split_branch_probability
= -1;
172 /* Returns a hash code for X (which is a really a CONST_INT). */
175 const_int_htab_hash (const void *x
)
177 return (hashval_t
) INTVAL ((const_rtx
) x
);
180 /* Returns nonzero if the value represented by X (which is really a
181 CONST_INT) is the same as that given by Y (which is really a
185 const_int_htab_eq (const void *x
, const void *y
)
187 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
190 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
192 const_double_htab_hash (const void *x
)
194 const_rtx
const value
= (const_rtx
) x
;
197 if (GET_MODE (value
) == VOIDmode
)
198 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
201 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
202 /* MODE is used in the comparison, so it should be in the hash. */
203 h
^= GET_MODE (value
);
208 /* Returns nonzero if the value represented by X (really a ...)
209 is the same as that represented by Y (really a ...) */
211 const_double_htab_eq (const void *x
, const void *y
)
213 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
215 if (GET_MODE (a
) != GET_MODE (b
))
217 if (GET_MODE (a
) == VOIDmode
)
218 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
219 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
221 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
222 CONST_DOUBLE_REAL_VALUE (b
));
225 /* Returns a hash code for X (which is really a CONST_FIXED). */
228 const_fixed_htab_hash (const void *x
)
230 const_rtx
const value
= (const_rtx
) x
;
233 h
= fixed_hash (CONST_FIXED_VALUE (value
));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h
^= GET_MODE (value
);
239 /* Returns nonzero if the value represented by X (really a ...)
240 is the same as that represented by Y (really a ...). */
243 const_fixed_htab_eq (const void *x
, const void *y
)
245 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
247 if (GET_MODE (a
) != GET_MODE (b
))
249 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (const void *x
)
257 const mem_attrs
*const p
= (const mem_attrs
*) x
;
259 return (p
->alias
^ (p
->align
* 1000)
260 ^ (p
->addrspace
* 4000)
261 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
262 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
263 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
266 /* Returns nonzero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (const void *x
, const void *y
)
273 const mem_attrs
*const p
= (const mem_attrs
*) x
;
274 const mem_attrs
*const q
= (const mem_attrs
*) y
;
276 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
277 && p
->size
== q
->size
&& p
->align
== q
->align
278 && p
->addrspace
== q
->addrspace
279 && (p
->expr
== q
->expr
280 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
281 && operand_equal_p (p
->expr
, q
->expr
, 0))));
284 /* Allocate a new mem_attrs structure and insert it into the hash table if
285 one identical to it is not already in the table. We are doing this for
289 get_mem_attrs (alias_set_type alias
, tree expr
, rtx offset
, rtx size
,
290 unsigned int align
, addr_space_t addrspace
, enum machine_mode mode
)
295 /* If everything is the default, we can just return zero.
296 This must match what the corresponding MEM_* macros return when the
297 field is not present. */
298 if (alias
== 0 && expr
== 0 && offset
== 0 && addrspace
== 0
300 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
301 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
302 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
307 attrs
.offset
= offset
;
310 attrs
.addrspace
= addrspace
;
312 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
315 *slot
= ggc_alloc_mem_attrs ();
316 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
319 return (mem_attrs
*) *slot
;
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x
)
327 const reg_attrs
*const p
= (const reg_attrs
*) x
;
329 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x
, const void *y
)
339 const reg_attrs
*const p
= (const reg_attrs
*) x
;
340 const reg_attrs
*const q
= (const reg_attrs
*) y
;
342 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl
, int offset
)
354 /* If everything is the default, we can just return zero. */
355 if (decl
== 0 && offset
== 0)
359 attrs
.offset
= offset
;
361 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
364 *slot
= ggc_alloc_reg_attrs ();
365 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
368 return (reg_attrs
*) *slot
;
373 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
379 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
380 MEM_VOLATILE_P (x
) = true;
386 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
387 don't attempt to share with the various global pieces of rtl (such as
388 frame_pointer_rtx). */
391 gen_raw_REG (enum machine_mode mode
, int regno
)
393 rtx x
= gen_rtx_raw_REG (mode
, regno
);
394 ORIGINAL_REGNO (x
) = regno
;
398 /* There are some RTL codes that require special attention; the generation
399 functions do the raw handling. If you add to this list, modify
400 special_rtx in gengenrtl.c as well. */
403 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
407 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
408 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
410 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
411 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
412 return const_true_rtx
;
415 /* Look up the CONST_INT in the hash table. */
416 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
417 (hashval_t
) arg
, INSERT
);
419 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
425 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
427 return GEN_INT (trunc_int_for_mode (c
, mode
));
430 /* CONST_DOUBLEs might be created from pairs of integers, or from
431 REAL_VALUE_TYPEs. Also, their length is known only at run time,
432 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
434 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
435 hash table. If so, return its counterpart; otherwise add it
436 to the hash table and return it. */
438 lookup_const_double (rtx real
)
440 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
447 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
448 VALUE in mode MODE. */
450 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
452 rtx real
= rtx_alloc (CONST_DOUBLE
);
453 PUT_MODE (real
, mode
);
457 return lookup_const_double (real
);
460 /* Determine whether FIXED, a CONST_FIXED, already exists in the
461 hash table. If so, return its counterpart; otherwise add it
462 to the hash table and return it. */
465 lookup_const_fixed (rtx fixed
)
467 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
474 /* Return a CONST_FIXED rtx for a fixed-point value specified by
475 VALUE in mode MODE. */
478 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
480 rtx fixed
= rtx_alloc (CONST_FIXED
);
481 PUT_MODE (fixed
, mode
);
485 return lookup_const_fixed (fixed
);
488 /* Constructs double_int from rtx CST. */
491 rtx_to_double_int (const_rtx cst
)
495 if (CONST_INT_P (cst
))
496 r
= shwi_to_double_int (INTVAL (cst
));
497 else if (CONST_DOUBLE_P (cst
) && GET_MODE (cst
) == VOIDmode
)
499 r
.low
= CONST_DOUBLE_LOW (cst
);
500 r
.high
= CONST_DOUBLE_HIGH (cst
);
509 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
513 immed_double_int_const (double_int i
, enum machine_mode mode
)
515 return immed_double_const (i
.low
, i
.high
, mode
);
518 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
519 of ints: I0 is the low-order word and I1 is the high-order word.
520 Do not use this routine for non-integer modes; convert to
521 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
524 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
529 /* There are the following cases (note that there are no modes with
530 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
532 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
534 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
535 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
536 from copies of the sign bit, and sign of i0 and i1 are the same), then
537 we return a CONST_INT for i0.
538 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
539 if (mode
!= VOIDmode
)
541 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
542 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
543 /* We can get a 0 for an error mark. */
544 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
545 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
547 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
548 return gen_int_mode (i0
, mode
);
550 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
553 /* If this integer fits in one word, return a CONST_INT. */
554 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
557 /* We use VOIDmode for integers. */
558 value
= rtx_alloc (CONST_DOUBLE
);
559 PUT_MODE (value
, VOIDmode
);
561 CONST_DOUBLE_LOW (value
) = i0
;
562 CONST_DOUBLE_HIGH (value
) = i1
;
564 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
565 XWINT (value
, i
) = 0;
567 return lookup_const_double (value
);
571 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
573 /* In case the MD file explicitly references the frame pointer, have
574 all such references point to the same frame pointer. This is
575 used during frame pointer elimination to distinguish the explicit
576 references to these registers from pseudos that happened to be
579 If we have eliminated the frame pointer or arg pointer, we will
580 be using it as a normal register, for example as a spill
581 register. In such cases, we might be accessing it in a mode that
582 is not Pmode and therefore cannot use the pre-allocated rtx.
584 Also don't do this when we are making new REGs in reload, since
585 we don't want to get confused with the real pointers. */
587 if (mode
== Pmode
&& !reload_in_progress
)
589 if (regno
== FRAME_POINTER_REGNUM
590 && (!reload_completed
|| frame_pointer_needed
))
591 return frame_pointer_rtx
;
592 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
593 if (regno
== HARD_FRAME_POINTER_REGNUM
594 && (!reload_completed
|| frame_pointer_needed
))
595 return hard_frame_pointer_rtx
;
597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
598 if (regno
== ARG_POINTER_REGNUM
)
599 return arg_pointer_rtx
;
601 #ifdef RETURN_ADDRESS_POINTER_REGNUM
602 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
603 return return_address_pointer_rtx
;
605 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
606 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
607 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
608 return pic_offset_table_rtx
;
609 if (regno
== STACK_POINTER_REGNUM
)
610 return stack_pointer_rtx
;
614 /* If the per-function register table has been set up, try to re-use
615 an existing entry in that table to avoid useless generation of RTL.
617 This code is disabled for now until we can fix the various backends
618 which depend on having non-shared hard registers in some cases. Long
619 term we want to re-enable this code as it can significantly cut down
620 on the amount of useless RTL that gets generated.
622 We'll also need to fix some code that runs after reload that wants to
623 set ORIGINAL_REGNO. */
628 && regno
< FIRST_PSEUDO_REGISTER
629 && reg_raw_mode
[regno
] == mode
)
630 return regno_reg_rtx
[regno
];
633 return gen_raw_REG (mode
, regno
);
637 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
639 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
641 /* This field is not cleared by the mere allocation of the rtx, so
648 /* Generate a memory referring to non-trapping constant memory. */
651 gen_const_mem (enum machine_mode mode
, rtx addr
)
653 rtx mem
= gen_rtx_MEM (mode
, addr
);
654 MEM_READONLY_P (mem
) = 1;
655 MEM_NOTRAP_P (mem
) = 1;
659 /* Generate a MEM referring to fixed portions of the frame, e.g., register
663 gen_frame_mem (enum machine_mode mode
, rtx addr
)
665 rtx mem
= gen_rtx_MEM (mode
, addr
);
666 MEM_NOTRAP_P (mem
) = 1;
667 set_mem_alias_set (mem
, get_frame_alias_set ());
671 /* Generate a MEM referring to a temporary use of the stack, not part
672 of the fixed stack frame. For example, something which is pushed
673 by a target splitter. */
675 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
677 rtx mem
= gen_rtx_MEM (mode
, addr
);
678 MEM_NOTRAP_P (mem
) = 1;
679 if (!cfun
->calls_alloca
)
680 set_mem_alias_set (mem
, get_frame_alias_set ());
684 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
685 this construct would be valid, and false otherwise. */
688 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
689 const_rtx reg
, unsigned int offset
)
691 unsigned int isize
= GET_MODE_SIZE (imode
);
692 unsigned int osize
= GET_MODE_SIZE (omode
);
694 /* All subregs must be aligned. */
695 if (offset
% osize
!= 0)
698 /* The subreg offset cannot be outside the inner object. */
702 /* ??? This should not be here. Temporarily continue to allow word_mode
703 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
704 Generally, backends are doing something sketchy but it'll take time to
706 if (omode
== word_mode
)
708 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
709 is the culprit here, and not the backends. */
710 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
712 /* Allow component subregs of complex and vector. Though given the below
713 extraction rules, it's not always clear what that means. */
714 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
715 && GET_MODE_INNER (imode
) == omode
)
717 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
718 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
719 represent this. It's questionable if this ought to be represented at
720 all -- why can't this all be hidden in post-reload splitters that make
721 arbitrarily mode changes to the registers themselves. */
722 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
724 /* Subregs involving floating point modes are not allowed to
725 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
726 (subreg:SI (reg:DF) 0) isn't. */
727 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
733 /* Paradoxical subregs must have offset zero. */
737 /* This is a normal subreg. Verify that the offset is representable. */
739 /* For hard registers, we already have most of these rules collected in
740 subreg_offset_representable_p. */
741 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
743 unsigned int regno
= REGNO (reg
);
745 #ifdef CANNOT_CHANGE_MODE_CLASS
746 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
747 && GET_MODE_INNER (imode
) == omode
)
749 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
753 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
756 /* For pseudo registers, we want most of the same checks. Namely:
757 If the register no larger than a word, the subreg must be lowpart.
758 If the register is larger than a word, the subreg must be the lowpart
759 of a subword. A subreg does *not* perform arbitrary bit extraction.
760 Given that we've already checked mode/offset alignment, we only have
761 to check subword subregs here. */
762 if (osize
< UNITS_PER_WORD
)
764 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
765 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
766 if (offset
% UNITS_PER_WORD
!= low_off
)
773 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
775 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
776 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
779 /* Generate a SUBREG representing the least-significant part of REG if MODE
780 is smaller than mode of REG, otherwise paradoxical SUBREG. */
783 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
785 enum machine_mode inmode
;
787 inmode
= GET_MODE (reg
);
788 if (inmode
== VOIDmode
)
790 return gen_rtx_SUBREG (mode
, reg
,
791 subreg_lowpart_offset (mode
, inmode
));
795 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
798 gen_rtvec (int n
, ...)
806 /* Don't allocate an empty rtvec... */
810 rt_val
= rtvec_alloc (n
);
812 for (i
= 0; i
< n
; i
++)
813 rt_val
->elem
[i
] = va_arg (p
, rtx
);
820 gen_rtvec_v (int n
, rtx
*argp
)
825 /* Don't allocate an empty rtvec... */
829 rt_val
= rtvec_alloc (n
);
831 for (i
= 0; i
< n
; i
++)
832 rt_val
->elem
[i
] = *argp
++;
837 /* Return the number of bytes between the start of an OUTER_MODE
838 in-memory value and the start of an INNER_MODE in-memory value,
839 given that the former is a lowpart of the latter. It may be a
840 paradoxical lowpart, in which case the offset will be negative
841 on big-endian targets. */
844 byte_lowpart_offset (enum machine_mode outer_mode
,
845 enum machine_mode inner_mode
)
847 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
848 return subreg_lowpart_offset (outer_mode
, inner_mode
);
850 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
853 /* Generate a REG rtx for a new pseudo register of mode MODE.
854 This pseudo is assigned the next sequential register number. */
857 gen_reg_rtx (enum machine_mode mode
)
860 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
862 gcc_assert (can_create_pseudo_p ());
864 /* If a virtual register with bigger mode alignment is generated,
865 increase stack alignment estimation because it might be spilled
867 if (SUPPORTS_STACK_ALIGNMENT
868 && crtl
->stack_alignment_estimated
< align
869 && !crtl
->stack_realign_processed
)
871 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
872 if (crtl
->stack_alignment_estimated
< min_align
)
873 crtl
->stack_alignment_estimated
= min_align
;
876 if (generating_concat_p
877 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
878 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
880 /* For complex modes, don't make a single pseudo.
881 Instead, make a CONCAT of two pseudos.
882 This allows noncontiguous allocation of the real and imaginary parts,
883 which makes much better code. Besides, allocating DCmode
884 pseudos overstrains reload on some machines like the 386. */
885 rtx realpart
, imagpart
;
886 enum machine_mode partmode
= GET_MODE_INNER (mode
);
888 realpart
= gen_reg_rtx (partmode
);
889 imagpart
= gen_reg_rtx (partmode
);
890 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
893 /* Make sure regno_pointer_align, and regno_reg_rtx are large
894 enough to have an element for this pseudo reg number. */
896 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
898 int old_size
= crtl
->emit
.regno_pointer_align_length
;
902 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
903 memset (tmp
+ old_size
, 0, old_size
);
904 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
906 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
907 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
908 regno_reg_rtx
= new1
;
910 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
913 val
= gen_raw_REG (mode
, reg_rtx_no
);
914 regno_reg_rtx
[reg_rtx_no
++] = val
;
918 /* Update NEW with the same attributes as REG, but with OFFSET added
919 to the REG_OFFSET. */
922 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
924 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
925 REG_OFFSET (reg
) + offset
);
928 /* Generate a register with same attributes as REG, but with OFFSET
929 added to the REG_OFFSET. */
932 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
935 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
937 update_reg_offset (new_rtx
, reg
, offset
);
941 /* Generate a new pseudo-register with the same attributes as REG, but
942 with OFFSET added to the REG_OFFSET. */
945 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
947 rtx new_rtx
= gen_reg_rtx (mode
);
949 update_reg_offset (new_rtx
, reg
, offset
);
953 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
954 new register is a (possibly paradoxical) lowpart of the old one. */
957 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
959 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
960 PUT_MODE (reg
, mode
);
963 /* Copy REG's attributes from X, if X has any attributes. If REG and X
964 have different modes, REG is a (possibly paradoxical) lowpart of X. */
967 set_reg_attrs_from_value (rtx reg
, rtx x
)
971 /* Hard registers can be reused for multiple purposes within the same
972 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
974 if (HARD_REGISTER_P (reg
))
977 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
980 if (MEM_OFFSET (x
) && CONST_INT_P (MEM_OFFSET (x
)))
982 = get_reg_attrs (MEM_EXPR (x
), INTVAL (MEM_OFFSET (x
)) + offset
);
984 mark_reg_pointer (reg
, 0);
989 update_reg_offset (reg
, x
, offset
);
991 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
995 /* Generate a REG rtx for a new pseudo register, copying the mode
996 and attributes from X. */
999 gen_reg_rtx_and_attrs (rtx x
)
1001 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1002 set_reg_attrs_from_value (reg
, x
);
1006 /* Set the register attributes for registers contained in PARM_RTX.
1007 Use needed values from memory attributes of MEM. */
1010 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1012 if (REG_P (parm_rtx
))
1013 set_reg_attrs_from_value (parm_rtx
, mem
);
1014 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1016 /* Check for a NULL entry in the first slot, used to indicate that the
1017 parameter goes both on the stack and in registers. */
1018 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1019 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1021 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1022 if (REG_P (XEXP (x
, 0)))
1023 REG_ATTRS (XEXP (x
, 0))
1024 = get_reg_attrs (MEM_EXPR (mem
),
1025 INTVAL (XEXP (x
, 1)));
1030 /* Set the REG_ATTRS for registers in value X, given that X represents
1034 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1036 if (GET_CODE (x
) == SUBREG
)
1038 gcc_assert (subreg_lowpart_p (x
));
1043 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1045 if (GET_CODE (x
) == CONCAT
)
1047 if (REG_P (XEXP (x
, 0)))
1048 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1049 if (REG_P (XEXP (x
, 1)))
1050 REG_ATTRS (XEXP (x
, 1))
1051 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1053 if (GET_CODE (x
) == PARALLEL
)
1057 /* Check for a NULL entry, used to indicate that the parameter goes
1058 both on the stack and in registers. */
1059 if (XEXP (XVECEXP (x
, 0, 0), 0))
1064 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1066 rtx y
= XVECEXP (x
, 0, i
);
1067 if (REG_P (XEXP (y
, 0)))
1068 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1073 /* Assign the RTX X to declaration T. */
1076 set_decl_rtl (tree t
, rtx x
)
1078 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1080 set_reg_attrs_for_decl_rtl (t
, x
);
1083 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1084 if the ABI requires the parameter to be passed by reference. */
1087 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1089 DECL_INCOMING_RTL (t
) = x
;
1090 if (x
&& !by_reference_p
)
1091 set_reg_attrs_for_decl_rtl (t
, x
);
1094 /* Identify REG (which may be a CONCAT) as a user register. */
1097 mark_user_reg (rtx reg
)
1099 if (GET_CODE (reg
) == CONCAT
)
1101 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1102 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1106 gcc_assert (REG_P (reg
));
1107 REG_USERVAR_P (reg
) = 1;
1111 /* Identify REG as a probable pointer register and show its alignment
1112 as ALIGN, if nonzero. */
1115 mark_reg_pointer (rtx reg
, int align
)
1117 if (! REG_POINTER (reg
))
1119 REG_POINTER (reg
) = 1;
1122 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1124 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1125 /* We can no-longer be sure just how aligned this pointer is. */
1126 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1129 /* Return 1 plus largest pseudo reg number used in the current function. */
1137 /* Return 1 + the largest label number used so far in the current function. */
1140 max_label_num (void)
1145 /* Return first label number used in this function (if any were used). */
1148 get_first_label_num (void)
1150 return first_label_num
;
1153 /* If the rtx for label was created during the expansion of a nested
1154 function, then first_label_num won't include this label number.
1155 Fix this now so that array indices work later. */
1158 maybe_set_first_label_num (rtx x
)
1160 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1161 first_label_num
= CODE_LABEL_NUMBER (x
);
1164 /* Return a value representing some low-order bits of X, where the number
1165 of low-order bits is given by MODE. Note that no conversion is done
1166 between floating-point and fixed-point values, rather, the bit
1167 representation is returned.
1169 This function handles the cases in common between gen_lowpart, below,
1170 and two variants in cse.c and combine.c. These are the cases that can
1171 be safely handled at all points in the compilation.
1173 If this is not a case we can handle, return 0. */
1176 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1178 int msize
= GET_MODE_SIZE (mode
);
1181 enum machine_mode innermode
;
1183 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1184 so we have to make one up. Yuk. */
1185 innermode
= GET_MODE (x
);
1187 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1188 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1189 else if (innermode
== VOIDmode
)
1190 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1192 xsize
= GET_MODE_SIZE (innermode
);
1194 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1196 if (innermode
== mode
)
1199 /* MODE must occupy no more words than the mode of X. */
1200 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1201 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1204 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1205 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1208 offset
= subreg_lowpart_offset (mode
, innermode
);
1210 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1211 && (GET_MODE_CLASS (mode
) == MODE_INT
1212 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1214 /* If we are getting the low-order part of something that has been
1215 sign- or zero-extended, we can either just use the object being
1216 extended or make a narrower extension. If we want an even smaller
1217 piece than the size of the object being extended, call ourselves
1220 This case is used mostly by combine and cse. */
1222 if (GET_MODE (XEXP (x
, 0)) == mode
)
1224 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1225 return gen_lowpart_common (mode
, XEXP (x
, 0));
1226 else if (msize
< xsize
)
1227 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1229 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1230 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1231 || GET_CODE (x
) == CONST_DOUBLE
|| CONST_INT_P (x
))
1232 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1234 /* Otherwise, we can't do this. */
1239 gen_highpart (enum machine_mode mode
, rtx x
)
1241 unsigned int msize
= GET_MODE_SIZE (mode
);
1244 /* This case loses if X is a subreg. To catch bugs early,
1245 complain if an invalid MODE is used even in other cases. */
1246 gcc_assert (msize
<= UNITS_PER_WORD
1247 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1249 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1250 subreg_highpart_offset (mode
, GET_MODE (x
)));
1251 gcc_assert (result
);
1253 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1254 the target if we have a MEM. gen_highpart must return a valid operand,
1255 emitting code if necessary to do so. */
1258 result
= validize_mem (result
);
1259 gcc_assert (result
);
1265 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1266 be VOIDmode constant. */
1268 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1270 if (GET_MODE (exp
) != VOIDmode
)
1272 gcc_assert (GET_MODE (exp
) == innermode
);
1273 return gen_highpart (outermode
, exp
);
1275 return simplify_gen_subreg (outermode
, exp
, innermode
,
1276 subreg_highpart_offset (outermode
, innermode
));
1279 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1282 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1284 unsigned int offset
= 0;
1285 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1289 if (WORDS_BIG_ENDIAN
)
1290 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1291 if (BYTES_BIG_ENDIAN
)
1292 offset
+= difference
% UNITS_PER_WORD
;
1298 /* Return offset in bytes to get OUTERMODE high part
1299 of the value in mode INNERMODE stored in memory in target format. */
1301 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1303 unsigned int offset
= 0;
1304 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1306 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1310 if (! WORDS_BIG_ENDIAN
)
1311 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1312 if (! BYTES_BIG_ENDIAN
)
1313 offset
+= difference
% UNITS_PER_WORD
;
1319 /* Return 1 iff X, assumed to be a SUBREG,
1320 refers to the least significant part of its containing reg.
1321 If X is not a SUBREG, always return 1 (it is its own low part!). */
1324 subreg_lowpart_p (const_rtx x
)
1326 if (GET_CODE (x
) != SUBREG
)
1328 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1331 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1332 == SUBREG_BYTE (x
));
1335 /* Return subword OFFSET of operand OP.
1336 The word number, OFFSET, is interpreted as the word number starting
1337 at the low-order address. OFFSET 0 is the low-order word if not
1338 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1340 If we cannot extract the required word, we return zero. Otherwise,
1341 an rtx corresponding to the requested word will be returned.
1343 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1344 reload has completed, a valid address will always be returned. After
1345 reload, if a valid address cannot be returned, we return zero.
1347 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1348 it is the responsibility of the caller.
1350 MODE is the mode of OP in case it is a CONST_INT.
1352 ??? This is still rather broken for some cases. The problem for the
1353 moment is that all callers of this thing provide no 'goal mode' to
1354 tell us to work with. This exists because all callers were written
1355 in a word based SUBREG world.
1356 Now use of this function can be deprecated by simplify_subreg in most
1361 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1363 if (mode
== VOIDmode
)
1364 mode
= GET_MODE (op
);
1366 gcc_assert (mode
!= VOIDmode
);
1368 /* If OP is narrower than a word, fail. */
1370 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1373 /* If we want a word outside OP, return zero. */
1375 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1378 /* Form a new MEM at the requested address. */
1381 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1383 if (! validate_address
)
1386 else if (reload_completed
)
1388 if (! strict_memory_address_addr_space_p (word_mode
,
1390 MEM_ADDR_SPACE (op
)))
1394 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1397 /* Rest can be handled by simplify_subreg. */
1398 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1401 /* Similar to `operand_subword', but never return 0. If we can't
1402 extract the required subword, put OP into a register and try again.
1403 The second attempt must succeed. We always validate the address in
1406 MODE is the mode of OP, in case it is CONST_INT. */
1409 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1411 rtx result
= operand_subword (op
, offset
, 1, mode
);
1416 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1418 /* If this is a register which can not be accessed by words, copy it
1419 to a pseudo register. */
1421 op
= copy_to_reg (op
);
1423 op
= force_reg (mode
, op
);
1426 result
= operand_subword (op
, offset
, 1, mode
);
1427 gcc_assert (result
);
1432 /* Returns 1 if both MEM_EXPR can be considered equal
1436 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1441 if (! expr1
|| ! expr2
)
1444 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1447 return operand_equal_p (expr1
, expr2
, 0);
1450 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1451 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1455 get_mem_align_offset (rtx mem
, unsigned int align
)
1458 unsigned HOST_WIDE_INT offset
;
1460 /* This function can't use
1461 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1462 || !CONST_INT_P (MEM_OFFSET (mem))
1463 || (MAX (MEM_ALIGN (mem),
1464 get_object_alignment (MEM_EXPR (mem), align))
1468 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1470 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1471 for <variable>. get_inner_reference doesn't handle it and
1472 even if it did, the alignment in that case needs to be determined
1473 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1474 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1475 isn't sufficiently aligned, the object it is in might be. */
1476 gcc_assert (MEM_P (mem
));
1477 expr
= MEM_EXPR (mem
);
1478 if (expr
== NULL_TREE
1479 || MEM_OFFSET (mem
) == NULL_RTX
1480 || !CONST_INT_P (MEM_OFFSET (mem
)))
1483 offset
= INTVAL (MEM_OFFSET (mem
));
1486 if (DECL_ALIGN (expr
) < align
)
1489 else if (INDIRECT_REF_P (expr
))
1491 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1494 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1498 tree inner
= TREE_OPERAND (expr
, 0);
1499 tree field
= TREE_OPERAND (expr
, 1);
1500 tree byte_offset
= component_ref_field_offset (expr
);
1501 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1504 || !host_integerp (byte_offset
, 1)
1505 || !host_integerp (bit_offset
, 1))
1508 offset
+= tree_low_cst (byte_offset
, 1);
1509 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1511 if (inner
== NULL_TREE
)
1513 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1514 < (unsigned int) align
)
1518 else if (DECL_P (inner
))
1520 if (DECL_ALIGN (inner
) < align
)
1524 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1532 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1535 /* Given REF (a MEM) and T, either the type of X or the expression
1536 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1537 if we are making a new object of this type. BITPOS is nonzero if
1538 there is an offset outstanding on T that will be applied later. */
1541 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1542 HOST_WIDE_INT bitpos
)
1544 alias_set_type alias
;
1546 rtx offset
= NULL_RTX
;
1547 rtx size
= NULL_RTX
;
1548 unsigned int align
= BITS_PER_UNIT
;
1549 HOST_WIDE_INT apply_bitpos
= 0;
1552 /* It can happen that type_for_mode was given a mode for which there
1553 is no language-level type. In which case it returns NULL, which
1558 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1559 if (type
== error_mark_node
)
1562 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1563 wrong answer, as it assumes that DECL_RTL already has the right alias
1564 info. Callers should not set DECL_RTL until after the call to
1565 set_mem_attributes. */
1566 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1568 /* Get the alias set from the expression or type (perhaps using a
1569 front-end routine) and use it. */
1570 alias
= get_alias_set (t
);
1572 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1573 MEM_IN_STRUCT_P (ref
)
1574 = AGGREGATE_TYPE_P (type
) || TREE_CODE (type
) == COMPLEX_TYPE
;
1575 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1577 /* If we are making an object of this type, or if this is a DECL, we know
1578 that it is a scalar if the type is not an aggregate. */
1579 if ((objectp
|| DECL_P (t
))
1580 && ! AGGREGATE_TYPE_P (type
)
1581 && TREE_CODE (type
) != COMPLEX_TYPE
)
1582 MEM_SCALAR_P (ref
) = 1;
1584 /* Default values from pre-existing memory attributes if present. */
1585 if (MEM_ATTRS (ref
))
1587 /* ??? Can this ever happen? Calling this routine on a MEM that
1588 already carries memory attributes should probably be invalid. */
1589 expr
= MEM_EXPR (ref
);
1590 offset
= MEM_OFFSET (ref
);
1591 size
= MEM_SIZE (ref
);
1592 align
= MEM_ALIGN (ref
);
1595 /* Otherwise, default values from the mode of the MEM reference. */
1596 else if (GET_MODE (ref
) != BLKmode
)
1598 /* Respect mode size. */
1599 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (ref
)));
1600 /* ??? Is this really necessary? We probably should always get
1601 the size from the type below. */
1603 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1604 if T is an object, always compute the object alignment below. */
1605 if (STRICT_ALIGNMENT
&& TYPE_P (t
))
1606 align
= GET_MODE_ALIGNMENT (GET_MODE (ref
));
1607 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1608 e.g. if the type carries an alignment attribute. Should we be
1609 able to simply always use TYPE_ALIGN? */
1612 /* We can set the alignment from the type if we are making an object,
1613 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1614 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1615 align
= MAX (align
, TYPE_ALIGN (type
));
1617 else if (TREE_CODE (t
) == MEM_REF
)
1619 tree op0
= TREE_OPERAND (t
, 0);
1620 if (TREE_CODE (op0
) == ADDR_EXPR
1621 && (DECL_P (TREE_OPERAND (op0
, 0))
1622 || CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0))))
1624 if (DECL_P (TREE_OPERAND (op0
, 0)))
1625 align
= DECL_ALIGN (TREE_OPERAND (op0
, 0));
1626 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0)))
1628 align
= TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0
, 0)));
1629 #ifdef CONSTANT_ALIGNMENT
1630 align
= CONSTANT_ALIGNMENT (TREE_OPERAND (op0
, 0), align
);
1633 if (TREE_INT_CST_LOW (TREE_OPERAND (t
, 1)) != 0)
1635 unsigned HOST_WIDE_INT ioff
1636 = TREE_INT_CST_LOW (TREE_OPERAND (t
, 1));
1637 unsigned HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1638 align
= MIN (aoff
, align
);
1642 /* ??? This isn't fully correct, we can't set the alignment from the
1643 type in all cases. */
1644 align
= MAX (align
, TYPE_ALIGN (type
));
1647 else if (TREE_CODE (t
) == TARGET_MEM_REF
)
1648 /* ??? This isn't fully correct, we can't set the alignment from the
1649 type in all cases. */
1650 align
= MAX (align
, TYPE_ALIGN (type
));
1652 /* If the size is known, we can set that. */
1653 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1654 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1656 /* If T is not a type, we may be able to deduce some more information about
1661 bool align_computed
= false;
1663 if (TREE_THIS_VOLATILE (t
))
1664 MEM_VOLATILE_P (ref
) = 1;
1666 /* Now remove any conversions: they don't change what the underlying
1667 object is. Likewise for SAVE_EXPR. */
1668 while (CONVERT_EXPR_P (t
)
1669 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1670 || TREE_CODE (t
) == SAVE_EXPR
)
1671 t
= TREE_OPERAND (t
, 0);
1673 /* Note whether this expression can trap. */
1674 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1676 base
= get_base_address (t
);
1677 if (base
&& DECL_P (base
)
1678 && TREE_READONLY (base
)
1679 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1680 && !TREE_THIS_VOLATILE (base
))
1681 MEM_READONLY_P (ref
) = 1;
1683 /* If this expression uses it's parent's alias set, mark it such
1684 that we won't change it. */
1685 if (component_uses_parent_alias_set (t
))
1686 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1688 /* If this is a decl, set the attributes of the MEM from it. */
1692 offset
= const0_rtx
;
1693 apply_bitpos
= bitpos
;
1694 size
= (DECL_SIZE_UNIT (t
)
1695 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1696 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1697 align
= DECL_ALIGN (t
);
1698 align_computed
= true;
1701 /* If this is a constant, we know the alignment. */
1702 else if (CONSTANT_CLASS_P (t
))
1704 align
= TYPE_ALIGN (type
);
1705 #ifdef CONSTANT_ALIGNMENT
1706 align
= CONSTANT_ALIGNMENT (t
, align
);
1708 align_computed
= true;
1711 /* If this is a field reference and not a bit-field, record it. */
1712 /* ??? There is some information that can be gleaned from bit-fields,
1713 such as the word offset in the structure that might be modified.
1714 But skip it for now. */
1715 else if (TREE_CODE (t
) == COMPONENT_REF
1716 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1719 offset
= const0_rtx
;
1720 apply_bitpos
= bitpos
;
1721 /* ??? Any reason the field size would be different than
1722 the size we got from the type? */
1725 /* If this is an array reference, look for an outer field reference. */
1726 else if (TREE_CODE (t
) == ARRAY_REF
)
1728 tree off_tree
= size_zero_node
;
1729 /* We can't modify t, because we use it at the end of the
1735 tree index
= TREE_OPERAND (t2
, 1);
1736 tree low_bound
= array_ref_low_bound (t2
);
1737 tree unit_size
= array_ref_element_size (t2
);
1739 /* We assume all arrays have sizes that are a multiple of a byte.
1740 First subtract the lower bound, if any, in the type of the
1741 index, then convert to sizetype and multiply by the size of
1742 the array element. */
1743 if (! integer_zerop (low_bound
))
1744 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1747 off_tree
= size_binop (PLUS_EXPR
,
1748 size_binop (MULT_EXPR
,
1749 fold_convert (sizetype
,
1753 t2
= TREE_OPERAND (t2
, 0);
1755 while (TREE_CODE (t2
) == ARRAY_REF
);
1761 if (host_integerp (off_tree
, 1))
1763 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1764 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1765 align
= DECL_ALIGN (t2
);
1766 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1768 align_computed
= true;
1769 offset
= GEN_INT (ioff
);
1770 apply_bitpos
= bitpos
;
1773 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1777 if (host_integerp (off_tree
, 1))
1779 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1780 apply_bitpos
= bitpos
;
1782 /* ??? Any reason the field size would be different than
1783 the size we got from the type? */
1786 /* If this is an indirect reference, record it. */
1787 else if (TREE_CODE (t
) == MEM_REF
)
1790 offset
= const0_rtx
;
1791 apply_bitpos
= bitpos
;
1795 /* If this is an indirect reference, record it. */
1796 else if (TREE_CODE (t
) == MEM_REF
1797 || TREE_CODE (t
) == TARGET_MEM_REF
)
1800 offset
= const0_rtx
;
1801 apply_bitpos
= bitpos
;
1804 if (!align_computed
&& !INDIRECT_REF_P (t
))
1806 unsigned int obj_align
= get_object_alignment (t
, BIGGEST_ALIGNMENT
);
1807 align
= MAX (align
, obj_align
);
1811 /* If we modified OFFSET based on T, then subtract the outstanding
1812 bit position offset. Similarly, increase the size of the accessed
1813 object to contain the negative offset. */
1816 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1818 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1821 /* Now set the attributes we computed above. */
1823 = get_mem_attrs (alias
, expr
, offset
, size
, align
,
1824 TYPE_ADDR_SPACE (type
), GET_MODE (ref
));
1826 /* If this is already known to be a scalar or aggregate, we are done. */
1827 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1830 /* If it is a reference into an aggregate, this is part of an aggregate.
1831 Otherwise we don't know. */
1832 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1833 || TREE_CODE (t
) == ARRAY_RANGE_REF
1834 || TREE_CODE (t
) == BIT_FIELD_REF
)
1835 MEM_IN_STRUCT_P (ref
) = 1;
1839 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1841 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1844 /* Set the alias set of MEM to SET. */
1847 set_mem_alias_set (rtx mem
, alias_set_type set
)
1849 /* If the new and old alias sets don't conflict, something is wrong. */
1850 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1852 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1853 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1854 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1857 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1860 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1862 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1863 MEM_OFFSET (mem
), MEM_SIZE (mem
),
1864 MEM_ALIGN (mem
), addrspace
, GET_MODE (mem
));
1867 /* Set the alignment of MEM to ALIGN bits. */
1870 set_mem_align (rtx mem
, unsigned int align
)
1872 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1873 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1874 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1877 /* Set the expr for MEM to EXPR. */
1880 set_mem_expr (rtx mem
, tree expr
)
1883 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1884 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1885 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1888 /* Set the offset of MEM to OFFSET. */
1891 set_mem_offset (rtx mem
, rtx offset
)
1893 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1894 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1895 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1898 /* Set the size of MEM to SIZE. */
1901 set_mem_size (rtx mem
, rtx size
)
1903 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1904 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1905 MEM_ADDR_SPACE (mem
), GET_MODE (mem
));
1908 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1909 and its address changed to ADDR. (VOIDmode means don't change the mode.
1910 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1911 returned memory location is required to be valid. The memory
1912 attributes are not changed. */
1915 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1920 gcc_assert (MEM_P (memref
));
1921 as
= MEM_ADDR_SPACE (memref
);
1922 if (mode
== VOIDmode
)
1923 mode
= GET_MODE (memref
);
1925 addr
= XEXP (memref
, 0);
1926 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1927 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
1932 if (reload_in_progress
|| reload_completed
)
1933 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
1935 addr
= memory_address_addr_space (mode
, addr
, as
);
1938 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1941 new_rtx
= gen_rtx_MEM (mode
, addr
);
1942 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1946 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1947 way we are changing MEMREF, so we only preserve the alias set. */
1950 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1952 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1), size
;
1953 enum machine_mode mmode
= GET_MODE (new_rtx
);
1956 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1957 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1959 /* If there are no changes, just return the original memory reference. */
1960 if (new_rtx
== memref
)
1962 if (MEM_ATTRS (memref
) == 0
1963 || (MEM_EXPR (memref
) == NULL
1964 && MEM_OFFSET (memref
) == NULL
1965 && MEM_SIZE (memref
) == size
1966 && MEM_ALIGN (memref
) == align
))
1969 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1970 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1974 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
,
1975 MEM_ADDR_SPACE (memref
), mmode
);
1980 /* Return a memory reference like MEMREF, but with its mode changed
1981 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1982 nonzero, the memory address is forced to be valid.
1983 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1984 and caller is responsible for adjusting MEMREF base register. */
1987 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1988 int validate
, int adjust
)
1990 rtx addr
= XEXP (memref
, 0);
1992 rtx memoffset
= MEM_OFFSET (memref
);
1994 unsigned int memalign
= MEM_ALIGN (memref
);
1995 addr_space_t as
= MEM_ADDR_SPACE (memref
);
1996 enum machine_mode address_mode
= targetm
.addr_space
.address_mode (as
);
1999 /* If there are no changes, just return the original memory reference. */
2000 if (mode
== GET_MODE (memref
) && !offset
2001 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2004 /* ??? Prefer to create garbage instead of creating shared rtl.
2005 This may happen even if offset is nonzero -- consider
2006 (plus (plus reg reg) const_int) -- so do this always. */
2007 addr
= copy_rtx (addr
);
2009 /* Convert a possibly large offset to a signed value within the
2010 range of the target address space. */
2011 pbits
= GET_MODE_BITSIZE (address_mode
);
2012 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2014 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2015 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2021 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2022 object, we can merge it into the LO_SUM. */
2023 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2025 && (unsigned HOST_WIDE_INT
) offset
2026 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2027 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2028 plus_constant (XEXP (addr
, 1), offset
));
2030 addr
= plus_constant (addr
, offset
);
2033 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2035 /* If the address is a REG, change_address_1 rightfully returns memref,
2036 but this would destroy memref's MEM_ATTRS. */
2037 if (new_rtx
== memref
&& offset
!= 0)
2038 new_rtx
= copy_rtx (new_rtx
);
2040 /* Compute the new values of the memory attributes due to this adjustment.
2041 We add the offsets and update the alignment. */
2043 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2045 /* Compute the new alignment by taking the MIN of the alignment and the
2046 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2051 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2053 /* We can compute the size in a number of ways. */
2054 if (GET_MODE (new_rtx
) != BLKmode
)
2055 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx
)));
2056 else if (MEM_SIZE (memref
))
2057 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2059 MEM_ATTRS (new_rtx
) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2060 memoffset
, size
, memalign
, as
,
2061 GET_MODE (new_rtx
));
2063 /* At some point, we should validate that this offset is within the object,
2064 if all the appropriate values are known. */
2068 /* Return a memory reference like MEMREF, but with its mode changed
2069 to MODE and its address changed to ADDR, which is assumed to be
2070 MEMREF offset by OFFSET bytes. If VALIDATE is
2071 nonzero, the memory address is forced to be valid. */
2074 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2075 HOST_WIDE_INT offset
, int validate
)
2077 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2078 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2081 /* Return a memory reference like MEMREF, but whose address is changed by
2082 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2083 known to be in OFFSET (possibly 1). */
2086 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2088 rtx new_rtx
, addr
= XEXP (memref
, 0);
2089 addr_space_t as
= MEM_ADDR_SPACE (memref
);
2090 enum machine_mode address_mode
= targetm
.addr_space
.address_mode (as
);
2092 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2094 /* At this point we don't know _why_ the address is invalid. It
2095 could have secondary memory references, multiplies or anything.
2097 However, if we did go and rearrange things, we can wind up not
2098 being able to recognize the magic around pic_offset_table_rtx.
2099 This stuff is fragile, and is yet another example of why it is
2100 bad to expose PIC machinery too early. */
2101 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
, as
)
2102 && GET_CODE (addr
) == PLUS
2103 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2105 addr
= force_reg (GET_MODE (addr
), addr
);
2106 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2109 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2110 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2112 /* If there are no changes, just return the original memory reference. */
2113 if (new_rtx
== memref
)
2116 /* Update the alignment to reflect the offset. Reset the offset, which
2119 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2120 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2121 as
, GET_MODE (new_rtx
));
2125 /* Return a memory reference like MEMREF, but with its address changed to
2126 ADDR. The caller is asserting that the actual piece of memory pointed
2127 to is the same, just the form of the address is being changed, such as
2128 by putting something into a register. */
2131 replace_equiv_address (rtx memref
, rtx addr
)
2133 /* change_address_1 copies the memory attribute structure without change
2134 and that's exactly what we want here. */
2135 update_temp_slot_address (XEXP (memref
, 0), addr
);
2136 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2139 /* Likewise, but the reference is not required to be valid. */
2142 replace_equiv_address_nv (rtx memref
, rtx addr
)
2144 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2147 /* Return a memory reference like MEMREF, but with its mode widened to
2148 MODE and offset by OFFSET. This would be used by targets that e.g.
2149 cannot issue QImode memory operations and have to use SImode memory
2150 operations plus masking logic. */
2153 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2155 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1);
2156 tree expr
= MEM_EXPR (new_rtx
);
2157 rtx memoffset
= MEM_OFFSET (new_rtx
);
2158 unsigned int size
= GET_MODE_SIZE (mode
);
2160 /* If there are no changes, just return the original memory reference. */
2161 if (new_rtx
== memref
)
2164 /* If we don't know what offset we were at within the expression, then
2165 we can't know if we've overstepped the bounds. */
2171 if (TREE_CODE (expr
) == COMPONENT_REF
)
2173 tree field
= TREE_OPERAND (expr
, 1);
2174 tree offset
= component_ref_field_offset (expr
);
2176 if (! DECL_SIZE_UNIT (field
))
2182 /* Is the field at least as large as the access? If so, ok,
2183 otherwise strip back to the containing structure. */
2184 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2185 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2186 && INTVAL (memoffset
) >= 0)
2189 if (! host_integerp (offset
, 1))
2195 expr
= TREE_OPERAND (expr
, 0);
2197 = (GEN_INT (INTVAL (memoffset
)
2198 + tree_low_cst (offset
, 1)
2199 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2202 /* Similarly for the decl. */
2203 else if (DECL_P (expr
)
2204 && DECL_SIZE_UNIT (expr
)
2205 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2206 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2207 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2211 /* The widened memory access overflows the expression, which means
2212 that it could alias another expression. Zap it. */
2219 memoffset
= NULL_RTX
;
2221 /* The widened memory may alias other stuff, so zap the alias set. */
2222 /* ??? Maybe use get_alias_set on any remaining expression. */
2224 MEM_ATTRS (new_rtx
) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2225 MEM_ALIGN (new_rtx
),
2226 MEM_ADDR_SPACE (new_rtx
), mode
);
2231 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2232 static GTY(()) tree spill_slot_decl
;
2235 get_spill_slot_decl (bool force_build_p
)
2237 tree d
= spill_slot_decl
;
2240 if (d
|| !force_build_p
)
2243 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2244 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2245 DECL_ARTIFICIAL (d
) = 1;
2246 DECL_IGNORED_P (d
) = 1;
2248 spill_slot_decl
= d
;
2250 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2251 MEM_NOTRAP_P (rd
) = 1;
2252 MEM_ATTRS (rd
) = get_mem_attrs (new_alias_set (), d
, const0_rtx
,
2253 NULL_RTX
, 0, ADDR_SPACE_GENERIC
, BLKmode
);
2254 SET_DECL_RTL (d
, rd
);
2259 /* Given MEM, a result from assign_stack_local, fill in the memory
2260 attributes as appropriate for a register allocator spill slot.
2261 These slots are not aliasable by other memory. We arrange for
2262 them all to use a single MEM_EXPR, so that the aliasing code can
2263 work properly in the case of shared spill slots. */
2266 set_mem_attrs_for_spill (rtx mem
)
2268 alias_set_type alias
;
2272 expr
= get_spill_slot_decl (true);
2273 alias
= MEM_ALIAS_SET (DECL_RTL (expr
));
2275 /* We expect the incoming memory to be of the form:
2276 (mem:MODE (plus (reg sfp) (const_int offset)))
2277 with perhaps the plus missing for offset = 0. */
2278 addr
= XEXP (mem
, 0);
2279 offset
= const0_rtx
;
2280 if (GET_CODE (addr
) == PLUS
2281 && CONST_INT_P (XEXP (addr
, 1)))
2282 offset
= XEXP (addr
, 1);
2284 MEM_ATTRS (mem
) = get_mem_attrs (alias
, expr
, offset
,
2285 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2286 ADDR_SPACE_GENERIC
, GET_MODE (mem
));
2287 MEM_NOTRAP_P (mem
) = 1;
2290 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2293 gen_label_rtx (void)
2295 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2296 NULL
, label_num
++, NULL
);
2299 /* For procedure integration. */
2301 /* Install new pointers to the first and last insns in the chain.
2302 Also, set cur_insn_uid to one higher than the last in use.
2303 Used for an inline-procedure after copying the insn chain. */
2306 set_new_first_and_last_insn (rtx first
, rtx last
)
2310 set_first_insn (first
);
2311 set_last_insn (last
);
2314 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2316 int debug_count
= 0;
2318 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2319 cur_debug_insn_uid
= 0;
2321 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2322 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2323 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2326 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2327 if (DEBUG_INSN_P (insn
))
2332 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2334 cur_debug_insn_uid
++;
2337 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2338 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2343 /* Go through all the RTL insn bodies and copy any invalid shared
2344 structure. This routine should only be called once. */
2347 unshare_all_rtl_1 (rtx insn
)
2349 /* Unshare just about everything else. */
2350 unshare_all_rtl_in_chain (insn
);
2352 /* Make sure the addresses of stack slots found outside the insn chain
2353 (such as, in DECL_RTL of a variable) are not shared
2354 with the insn chain.
2356 This special care is necessary when the stack slot MEM does not
2357 actually appear in the insn chain. If it does appear, its address
2358 is unshared from all else at that point. */
2359 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2362 /* Go through all the RTL insn bodies and copy any invalid shared
2363 structure, again. This is a fairly expensive thing to do so it
2364 should be done sparingly. */
2367 unshare_all_rtl_again (rtx insn
)
2372 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2375 reset_used_flags (PATTERN (p
));
2376 reset_used_flags (REG_NOTES (p
));
2379 /* Make sure that virtual stack slots are not shared. */
2380 set_used_decls (DECL_INITIAL (cfun
->decl
));
2382 /* Make sure that virtual parameters are not shared. */
2383 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2384 set_used_flags (DECL_RTL (decl
));
2386 reset_used_flags (stack_slot_list
);
2388 unshare_all_rtl_1 (insn
);
2392 unshare_all_rtl (void)
2394 unshare_all_rtl_1 (get_insns ());
2398 struct rtl_opt_pass pass_unshare_all_rtl
=
2402 "unshare", /* name */
2404 unshare_all_rtl
, /* execute */
2407 0, /* static_pass_number */
2408 TV_NONE
, /* tv_id */
2409 0, /* properties_required */
2410 0, /* properties_provided */
2411 0, /* properties_destroyed */
2412 0, /* todo_flags_start */
2413 TODO_dump_func
| TODO_verify_rtl_sharing
/* todo_flags_finish */
2418 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2419 Recursively does the same for subexpressions. */
2422 verify_rtx_sharing (rtx orig
, rtx insn
)
2427 const char *format_ptr
;
2432 code
= GET_CODE (x
);
2434 /* These types may be freely shared. */
2452 /* SCRATCH must be shared because they represent distinct values. */
2454 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2459 if (shared_const_p (orig
))
2464 /* A MEM is allowed to be shared if its address is constant. */
2465 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2466 || reload_completed
|| reload_in_progress
)
2475 /* This rtx may not be shared. If it has already been seen,
2476 replace it with a copy of itself. */
2477 #ifdef ENABLE_CHECKING
2478 if (RTX_FLAG (x
, used
))
2480 error ("invalid rtl sharing found in the insn");
2482 error ("shared rtx");
2484 internal_error ("internal consistency failure");
2487 gcc_assert (!RTX_FLAG (x
, used
));
2489 RTX_FLAG (x
, used
) = 1;
2491 /* Now scan the subexpressions recursively. */
2493 format_ptr
= GET_RTX_FORMAT (code
);
2495 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2497 switch (*format_ptr
++)
2500 verify_rtx_sharing (XEXP (x
, i
), insn
);
2504 if (XVEC (x
, i
) != NULL
)
2507 int len
= XVECLEN (x
, i
);
2509 for (j
= 0; j
< len
; j
++)
2511 /* We allow sharing of ASM_OPERANDS inside single
2513 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2514 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2516 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2518 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2527 /* Go through all the RTL insn bodies and check that there is no unexpected
2528 sharing in between the subexpressions. */
2531 verify_rtl_sharing (void)
2535 timevar_push (TV_VERIFY_RTL_SHARING
);
2537 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2540 reset_used_flags (PATTERN (p
));
2541 reset_used_flags (REG_NOTES (p
));
2542 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2545 rtx q
, sequence
= PATTERN (p
);
2547 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2549 q
= XVECEXP (sequence
, 0, i
);
2550 gcc_assert (INSN_P (q
));
2551 reset_used_flags (PATTERN (q
));
2552 reset_used_flags (REG_NOTES (q
));
2557 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2560 verify_rtx_sharing (PATTERN (p
), p
);
2561 verify_rtx_sharing (REG_NOTES (p
), p
);
2564 timevar_pop (TV_VERIFY_RTL_SHARING
);
2567 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2568 Assumes the mark bits are cleared at entry. */
2571 unshare_all_rtl_in_chain (rtx insn
)
2573 for (; insn
; insn
= NEXT_INSN (insn
))
2576 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2577 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2581 /* Go through all virtual stack slots of a function and mark them as
2582 shared. We never replace the DECL_RTLs themselves with a copy,
2583 but expressions mentioned into a DECL_RTL cannot be shared with
2584 expressions in the instruction stream.
2586 Note that reload may convert pseudo registers into memories in-place.
2587 Pseudo registers are always shared, but MEMs never are. Thus if we
2588 reset the used flags on MEMs in the instruction stream, we must set
2589 them again on MEMs that appear in DECL_RTLs. */
2592 set_used_decls (tree blk
)
2597 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2598 if (DECL_RTL_SET_P (t
))
2599 set_used_flags (DECL_RTL (t
));
2601 /* Now process sub-blocks. */
2602 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2606 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2607 Recursively does the same for subexpressions. Uses
2608 copy_rtx_if_shared_1 to reduce stack space. */
2611 copy_rtx_if_shared (rtx orig
)
2613 copy_rtx_if_shared_1 (&orig
);
2617 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2618 use. Recursively does the same for subexpressions. */
2621 copy_rtx_if_shared_1 (rtx
*orig1
)
2627 const char *format_ptr
;
2631 /* Repeat is used to turn tail-recursion into iteration. */
2638 code
= GET_CODE (x
);
2640 /* These types may be freely shared. */
2657 /* SCRATCH must be shared because they represent distinct values. */
2660 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2665 if (shared_const_p (x
))
2675 /* The chain of insns is not being copied. */
2682 /* This rtx may not be shared. If it has already been seen,
2683 replace it with a copy of itself. */
2685 if (RTX_FLAG (x
, used
))
2687 x
= shallow_copy_rtx (x
);
2690 RTX_FLAG (x
, used
) = 1;
2692 /* Now scan the subexpressions recursively.
2693 We can store any replaced subexpressions directly into X
2694 since we know X is not shared! Any vectors in X
2695 must be copied if X was copied. */
2697 format_ptr
= GET_RTX_FORMAT (code
);
2698 length
= GET_RTX_LENGTH (code
);
2701 for (i
= 0; i
< length
; i
++)
2703 switch (*format_ptr
++)
2707 copy_rtx_if_shared_1 (last_ptr
);
2708 last_ptr
= &XEXP (x
, i
);
2712 if (XVEC (x
, i
) != NULL
)
2715 int len
= XVECLEN (x
, i
);
2717 /* Copy the vector iff I copied the rtx and the length
2719 if (copied
&& len
> 0)
2720 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2722 /* Call recursively on all inside the vector. */
2723 for (j
= 0; j
< len
; j
++)
2726 copy_rtx_if_shared_1 (last_ptr
);
2727 last_ptr
= &XVECEXP (x
, i
, j
);
2742 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2745 mark_used_flags (rtx x
, int flag
)
2749 const char *format_ptr
;
2752 /* Repeat is used to turn tail-recursion into iteration. */
2757 code
= GET_CODE (x
);
2759 /* These types may be freely shared so we needn't do any resetting
2784 /* The chain of insns is not being copied. */
2791 RTX_FLAG (x
, used
) = flag
;
2793 format_ptr
= GET_RTX_FORMAT (code
);
2794 length
= GET_RTX_LENGTH (code
);
2796 for (i
= 0; i
< length
; i
++)
2798 switch (*format_ptr
++)
2806 mark_used_flags (XEXP (x
, i
), flag
);
2810 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2811 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2817 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2818 to look for shared sub-parts. */
2821 reset_used_flags (rtx x
)
2823 mark_used_flags (x
, 0);
2826 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2827 to look for shared sub-parts. */
2830 set_used_flags (rtx x
)
2832 mark_used_flags (x
, 1);
2835 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2836 Return X or the rtx for the pseudo reg the value of X was copied into.
2837 OTHER must be valid as a SET_DEST. */
2840 make_safe_from (rtx x
, rtx other
)
2843 switch (GET_CODE (other
))
2846 other
= SUBREG_REG (other
);
2848 case STRICT_LOW_PART
:
2851 other
= XEXP (other
, 0);
2860 && GET_CODE (x
) != SUBREG
)
2862 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2863 || reg_mentioned_p (other
, x
))))
2865 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2866 emit_move_insn (temp
, x
);
2872 /* Emission of insns (adding them to the doubly-linked list). */
2874 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2877 get_last_insn_anywhere (void)
2879 struct sequence_stack
*stack
;
2880 if (get_last_insn ())
2881 return get_last_insn ();
2882 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2883 if (stack
->last
!= 0)
2888 /* Return the first nonnote insn emitted in current sequence or current
2889 function. This routine looks inside SEQUENCEs. */
2892 get_first_nonnote_insn (void)
2894 rtx insn
= get_insns ();
2899 for (insn
= next_insn (insn
);
2900 insn
&& NOTE_P (insn
);
2901 insn
= next_insn (insn
))
2905 if (NONJUMP_INSN_P (insn
)
2906 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2907 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2914 /* Return the last nonnote insn emitted in current sequence or current
2915 function. This routine looks inside SEQUENCEs. */
2918 get_last_nonnote_insn (void)
2920 rtx insn
= get_last_insn ();
2925 for (insn
= previous_insn (insn
);
2926 insn
&& NOTE_P (insn
);
2927 insn
= previous_insn (insn
))
2931 if (NONJUMP_INSN_P (insn
)
2932 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2933 insn
= XVECEXP (PATTERN (insn
), 0,
2934 XVECLEN (PATTERN (insn
), 0) - 1);
2941 /* Return the number of actual (non-debug) insns emitted in this
2945 get_max_insn_count (void)
2947 int n
= cur_insn_uid
;
2949 /* The table size must be stable across -g, to avoid codegen
2950 differences due to debug insns, and not be affected by
2951 -fmin-insn-uid, to avoid excessive table size and to simplify
2952 debugging of -fcompare-debug failures. */
2953 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
2954 n
-= cur_debug_insn_uid
;
2956 n
-= MIN_NONDEBUG_INSN_UID
;
2962 /* Return the next insn. If it is a SEQUENCE, return the first insn
2966 next_insn (rtx insn
)
2970 insn
= NEXT_INSN (insn
);
2971 if (insn
&& NONJUMP_INSN_P (insn
)
2972 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2973 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2979 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2983 previous_insn (rtx insn
)
2987 insn
= PREV_INSN (insn
);
2988 if (insn
&& NONJUMP_INSN_P (insn
)
2989 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2990 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2996 /* Return the next insn after INSN that is not a NOTE. This routine does not
2997 look inside SEQUENCEs. */
3000 next_nonnote_insn (rtx insn
)
3004 insn
= NEXT_INSN (insn
);
3005 if (insn
== 0 || !NOTE_P (insn
))
3012 /* Return the next insn after INSN that is not a NOTE, but stop the
3013 search before we enter another basic block. This routine does not
3014 look inside SEQUENCEs. */
3017 next_nonnote_insn_bb (rtx insn
)
3021 insn
= NEXT_INSN (insn
);
3022 if (insn
== 0 || !NOTE_P (insn
))
3024 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3031 /* Return the previous insn before INSN that is not a NOTE. This routine does
3032 not look inside SEQUENCEs. */
3035 prev_nonnote_insn (rtx insn
)
3039 insn
= PREV_INSN (insn
);
3040 if (insn
== 0 || !NOTE_P (insn
))
3047 /* Return the previous insn before INSN that is not a NOTE, but stop
3048 the search before we enter another basic block. This routine does
3049 not look inside SEQUENCEs. */
3052 prev_nonnote_insn_bb (rtx insn
)
3056 insn
= PREV_INSN (insn
);
3057 if (insn
== 0 || !NOTE_P (insn
))
3059 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3066 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3067 routine does not look inside SEQUENCEs. */
3070 next_nondebug_insn (rtx insn
)
3074 insn
= NEXT_INSN (insn
);
3075 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3082 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3083 This routine does not look inside SEQUENCEs. */
3086 prev_nondebug_insn (rtx insn
)
3090 insn
= PREV_INSN (insn
);
3091 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3098 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3099 This routine does not look inside SEQUENCEs. */
3102 next_nonnote_nondebug_insn (rtx insn
)
3106 insn
= NEXT_INSN (insn
);
3107 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3114 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3115 This routine does not look inside SEQUENCEs. */
3118 prev_nonnote_nondebug_insn (rtx insn
)
3122 insn
= PREV_INSN (insn
);
3123 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3130 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3131 or 0, if there is none. This routine does not look inside
3135 next_real_insn (rtx insn
)
3139 insn
= NEXT_INSN (insn
);
3140 if (insn
== 0 || INSN_P (insn
))
3147 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3148 or 0, if there is none. This routine does not look inside
3152 prev_real_insn (rtx insn
)
3156 insn
= PREV_INSN (insn
);
3157 if (insn
== 0 || INSN_P (insn
))
3164 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3165 This routine does not look inside SEQUENCEs. */
3168 last_call_insn (void)
3172 for (insn
= get_last_insn ();
3173 insn
&& !CALL_P (insn
);
3174 insn
= PREV_INSN (insn
))
3180 /* Find the next insn after INSN that really does something. This routine
3181 does not look inside SEQUENCEs. After reload this also skips over
3182 standalone USE and CLOBBER insn. */
3185 active_insn_p (const_rtx insn
)
3187 return (CALL_P (insn
) || JUMP_P (insn
)
3188 || (NONJUMP_INSN_P (insn
)
3189 && (! reload_completed
3190 || (GET_CODE (PATTERN (insn
)) != USE
3191 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3195 next_active_insn (rtx insn
)
3199 insn
= NEXT_INSN (insn
);
3200 if (insn
== 0 || active_insn_p (insn
))
3207 /* Find the last insn before INSN that really does something. This routine
3208 does not look inside SEQUENCEs. After reload this also skips over
3209 standalone USE and CLOBBER insn. */
3212 prev_active_insn (rtx insn
)
3216 insn
= PREV_INSN (insn
);
3217 if (insn
== 0 || active_insn_p (insn
))
3224 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3227 next_label (rtx insn
)
3231 insn
= NEXT_INSN (insn
);
3232 if (insn
== 0 || LABEL_P (insn
))
3239 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3242 prev_label (rtx insn
)
3246 insn
= PREV_INSN (insn
);
3247 if (insn
== 0 || LABEL_P (insn
))
3254 /* Return the last label to mark the same position as LABEL. Return null
3255 if LABEL itself is null. */
3258 skip_consecutive_labels (rtx label
)
3262 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3270 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3271 and REG_CC_USER notes so we can find it. */
3274 link_cc0_insns (rtx insn
)
3276 rtx user
= next_nonnote_insn (insn
);
3278 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3279 user
= XVECEXP (PATTERN (user
), 0, 0);
3281 add_reg_note (user
, REG_CC_SETTER
, insn
);
3282 add_reg_note (insn
, REG_CC_USER
, user
);
3285 /* Return the next insn that uses CC0 after INSN, which is assumed to
3286 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3287 applied to the result of this function should yield INSN).
3289 Normally, this is simply the next insn. However, if a REG_CC_USER note
3290 is present, it contains the insn that uses CC0.
3292 Return 0 if we can't find the insn. */
3295 next_cc0_user (rtx insn
)
3297 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3300 return XEXP (note
, 0);
3302 insn
= next_nonnote_insn (insn
);
3303 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3304 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3306 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3312 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3313 note, it is the previous insn. */
3316 prev_cc0_setter (rtx insn
)
3318 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3321 return XEXP (note
, 0);
3323 insn
= prev_nonnote_insn (insn
);
3324 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3331 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3334 find_auto_inc (rtx
*xp
, void *data
)
3337 rtx reg
= (rtx
) data
;
3339 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3342 switch (GET_CODE (x
))
3350 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3361 /* Increment the label uses for all labels present in rtx. */
3364 mark_label_nuses (rtx x
)
3370 code
= GET_CODE (x
);
3371 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3372 LABEL_NUSES (XEXP (x
, 0))++;
3374 fmt
= GET_RTX_FORMAT (code
);
3375 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3378 mark_label_nuses (XEXP (x
, i
));
3379 else if (fmt
[i
] == 'E')
3380 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3381 mark_label_nuses (XVECEXP (x
, i
, j
));
3386 /* Try splitting insns that can be split for better scheduling.
3387 PAT is the pattern which might split.
3388 TRIAL is the insn providing PAT.
3389 LAST is nonzero if we should return the last insn of the sequence produced.
3391 If this routine succeeds in splitting, it returns the first or last
3392 replacement insn depending on the value of LAST. Otherwise, it
3393 returns TRIAL. If the insn to be returned can be split, it will be. */
3396 try_split (rtx pat
, rtx trial
, int last
)
3398 rtx before
= PREV_INSN (trial
);
3399 rtx after
= NEXT_INSN (trial
);
3400 int has_barrier
= 0;
3403 rtx insn_last
, insn
;
3406 /* We're not good at redistributing frame information. */
3407 if (RTX_FRAME_RELATED_P (trial
))
3410 if (any_condjump_p (trial
)
3411 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3412 split_branch_probability
= INTVAL (XEXP (note
, 0));
3413 probability
= split_branch_probability
;
3415 seq
= split_insns (pat
, trial
);
3417 split_branch_probability
= -1;
3419 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3420 We may need to handle this specially. */
3421 if (after
&& BARRIER_P (after
))
3424 after
= NEXT_INSN (after
);
3430 /* Avoid infinite loop if any insn of the result matches
3431 the original pattern. */
3435 if (INSN_P (insn_last
)
3436 && rtx_equal_p (PATTERN (insn_last
), pat
))
3438 if (!NEXT_INSN (insn_last
))
3440 insn_last
= NEXT_INSN (insn_last
);
3443 /* We will be adding the new sequence to the function. The splitters
3444 may have introduced invalid RTL sharing, so unshare the sequence now. */
3445 unshare_all_rtl_in_chain (seq
);
3448 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3452 mark_jump_label (PATTERN (insn
), insn
, 0);
3454 if (probability
!= -1
3455 && any_condjump_p (insn
)
3456 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3458 /* We can preserve the REG_BR_PROB notes only if exactly
3459 one jump is created, otherwise the machine description
3460 is responsible for this step using
3461 split_branch_probability variable. */
3462 gcc_assert (njumps
== 1);
3463 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3468 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3469 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3472 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3475 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3478 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3479 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3483 /* Copy notes, particularly those related to the CFG. */
3484 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3486 switch (REG_NOTE_KIND (note
))
3489 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3494 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3497 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3501 case REG_NON_LOCAL_GOTO
:
3502 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3505 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3511 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3513 rtx reg
= XEXP (note
, 0);
3514 if (!FIND_REG_INC_NOTE (insn
, reg
)
3515 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3516 add_reg_note (insn
, REG_INC
, reg
);
3526 /* If there are LABELS inside the split insns increment the
3527 usage count so we don't delete the label. */
3531 while (insn
!= NULL_RTX
)
3533 /* JUMP_P insns have already been "marked" above. */
3534 if (NONJUMP_INSN_P (insn
))
3535 mark_label_nuses (PATTERN (insn
));
3537 insn
= PREV_INSN (insn
);
3541 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3543 delete_insn (trial
);
3545 emit_barrier_after (tem
);
3547 /* Recursively call try_split for each new insn created; by the
3548 time control returns here that insn will be fully split, so
3549 set LAST and continue from the insn after the one returned.
3550 We can't use next_active_insn here since AFTER may be a note.
3551 Ignore deleted insns, which can be occur if not optimizing. */
3552 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3553 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3554 tem
= try_split (PATTERN (tem
), tem
, 1);
3556 /* Return either the first or the last insn, depending on which was
3559 ? (after
? PREV_INSN (after
) : get_last_insn ())
3560 : NEXT_INSN (before
);
3563 /* Make and return an INSN rtx, initializing all its slots.
3564 Store PATTERN in the pattern slots. */
3567 make_insn_raw (rtx pattern
)
3571 insn
= rtx_alloc (INSN
);
3573 INSN_UID (insn
) = cur_insn_uid
++;
3574 PATTERN (insn
) = pattern
;
3575 INSN_CODE (insn
) = -1;
3576 REG_NOTES (insn
) = NULL
;
3577 INSN_LOCATOR (insn
) = curr_insn_locator ();
3578 BLOCK_FOR_INSN (insn
) = NULL
;
3580 #ifdef ENABLE_RTL_CHECKING
3583 && (returnjump_p (insn
)
3584 || (GET_CODE (insn
) == SET
3585 && SET_DEST (insn
) == pc_rtx
)))
3587 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3595 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3598 make_debug_insn_raw (rtx pattern
)
3602 insn
= rtx_alloc (DEBUG_INSN
);
3603 INSN_UID (insn
) = cur_debug_insn_uid
++;
3604 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3605 INSN_UID (insn
) = cur_insn_uid
++;
3607 PATTERN (insn
) = pattern
;
3608 INSN_CODE (insn
) = -1;
3609 REG_NOTES (insn
) = NULL
;
3610 INSN_LOCATOR (insn
) = curr_insn_locator ();
3611 BLOCK_FOR_INSN (insn
) = NULL
;
3616 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3619 make_jump_insn_raw (rtx pattern
)
3623 insn
= rtx_alloc (JUMP_INSN
);
3624 INSN_UID (insn
) = cur_insn_uid
++;
3626 PATTERN (insn
) = pattern
;
3627 INSN_CODE (insn
) = -1;
3628 REG_NOTES (insn
) = NULL
;
3629 JUMP_LABEL (insn
) = NULL
;
3630 INSN_LOCATOR (insn
) = curr_insn_locator ();
3631 BLOCK_FOR_INSN (insn
) = NULL
;
3636 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3639 make_call_insn_raw (rtx pattern
)
3643 insn
= rtx_alloc (CALL_INSN
);
3644 INSN_UID (insn
) = cur_insn_uid
++;
3646 PATTERN (insn
) = pattern
;
3647 INSN_CODE (insn
) = -1;
3648 REG_NOTES (insn
) = NULL
;
3649 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3650 INSN_LOCATOR (insn
) = curr_insn_locator ();
3651 BLOCK_FOR_INSN (insn
) = NULL
;
3656 /* Add INSN to the end of the doubly-linked list.
3657 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3662 PREV_INSN (insn
) = get_last_insn();
3663 NEXT_INSN (insn
) = 0;
3665 if (NULL
!= get_last_insn())
3666 NEXT_INSN (get_last_insn ()) = insn
;
3668 if (NULL
== get_insns ())
3669 set_first_insn (insn
);
3671 set_last_insn (insn
);
3674 /* Add INSN into the doubly-linked list after insn AFTER. This and
3675 the next should be the only functions called to insert an insn once
3676 delay slots have been filled since only they know how to update a
3680 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3682 rtx next
= NEXT_INSN (after
);
3684 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3686 NEXT_INSN (insn
) = next
;
3687 PREV_INSN (insn
) = after
;
3691 PREV_INSN (next
) = insn
;
3692 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3693 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3695 else if (get_last_insn () == after
)
3696 set_last_insn (insn
);
3699 struct sequence_stack
*stack
= seq_stack
;
3700 /* Scan all pending sequences too. */
3701 for (; stack
; stack
= stack
->next
)
3702 if (after
== stack
->last
)
3711 if (!BARRIER_P (after
)
3712 && !BARRIER_P (insn
)
3713 && (bb
= BLOCK_FOR_INSN (after
)))
3715 set_block_for_insn (insn
, bb
);
3717 df_insn_rescan (insn
);
3718 /* Should not happen as first in the BB is always
3719 either NOTE or LABEL. */
3720 if (BB_END (bb
) == after
3721 /* Avoid clobbering of structure when creating new BB. */
3722 && !BARRIER_P (insn
)
3723 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3727 NEXT_INSN (after
) = insn
;
3728 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3730 rtx sequence
= PATTERN (after
);
3731 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3735 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3736 the previous should be the only functions called to insert an insn
3737 once delay slots have been filled since only they know how to
3738 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3742 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3744 rtx prev
= PREV_INSN (before
);
3746 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3748 PREV_INSN (insn
) = prev
;
3749 NEXT_INSN (insn
) = before
;
3753 NEXT_INSN (prev
) = insn
;
3754 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3756 rtx sequence
= PATTERN (prev
);
3757 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3760 else if (get_insns () == before
)
3761 set_first_insn (insn
);
3764 struct sequence_stack
*stack
= seq_stack
;
3765 /* Scan all pending sequences too. */
3766 for (; stack
; stack
= stack
->next
)
3767 if (before
== stack
->first
)
3769 stack
->first
= insn
;
3777 && !BARRIER_P (before
)
3778 && !BARRIER_P (insn
))
3779 bb
= BLOCK_FOR_INSN (before
);
3783 set_block_for_insn (insn
, bb
);
3785 df_insn_rescan (insn
);
3786 /* Should not happen as first in the BB is always either NOTE or
3788 gcc_assert (BB_HEAD (bb
) != insn
3789 /* Avoid clobbering of structure when creating new BB. */
3791 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3794 PREV_INSN (before
) = insn
;
3795 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3796 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3800 /* Replace insn with an deleted instruction note. */
3803 set_insn_deleted (rtx insn
)
3805 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3806 PUT_CODE (insn
, NOTE
);
3807 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3811 /* Remove an insn from its doubly-linked list. This function knows how
3812 to handle sequences. */
3814 remove_insn (rtx insn
)
3816 rtx next
= NEXT_INSN (insn
);
3817 rtx prev
= PREV_INSN (insn
);
3820 /* Later in the code, the block will be marked dirty. */
3821 df_insn_delete (NULL
, INSN_UID (insn
));
3825 NEXT_INSN (prev
) = next
;
3826 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3828 rtx sequence
= PATTERN (prev
);
3829 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3832 else if (get_insns () == insn
)
3835 PREV_INSN (next
) = NULL
;
3836 set_first_insn (next
);
3840 struct sequence_stack
*stack
= seq_stack
;
3841 /* Scan all pending sequences too. */
3842 for (; stack
; stack
= stack
->next
)
3843 if (insn
== stack
->first
)
3845 stack
->first
= next
;
3854 PREV_INSN (next
) = prev
;
3855 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3856 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3858 else if (get_last_insn () == insn
)
3859 set_last_insn (prev
);
3862 struct sequence_stack
*stack
= seq_stack
;
3863 /* Scan all pending sequences too. */
3864 for (; stack
; stack
= stack
->next
)
3865 if (insn
== stack
->last
)
3873 if (!BARRIER_P (insn
)
3874 && (bb
= BLOCK_FOR_INSN (insn
)))
3876 if (NONDEBUG_INSN_P (insn
))
3877 df_set_bb_dirty (bb
);
3878 if (BB_HEAD (bb
) == insn
)
3880 /* Never ever delete the basic block note without deleting whole
3882 gcc_assert (!NOTE_P (insn
));
3883 BB_HEAD (bb
) = next
;
3885 if (BB_END (bb
) == insn
)
3890 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3893 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3895 gcc_assert (call_insn
&& CALL_P (call_insn
));
3897 /* Put the register usage information on the CALL. If there is already
3898 some usage information, put ours at the end. */
3899 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3903 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3904 link
= XEXP (link
, 1))
3907 XEXP (link
, 1) = call_fusage
;
3910 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3913 /* Delete all insns made since FROM.
3914 FROM becomes the new last instruction. */
3917 delete_insns_since (rtx from
)
3922 NEXT_INSN (from
) = 0;
3923 set_last_insn (from
);
3926 /* This function is deprecated, please use sequences instead.
3928 Move a consecutive bunch of insns to a different place in the chain.
3929 The insns to be moved are those between FROM and TO.
3930 They are moved to a new position after the insn AFTER.
3931 AFTER must not be FROM or TO or any insn in between.
3933 This function does not know about SEQUENCEs and hence should not be
3934 called after delay-slot filling has been done. */
3937 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3939 #ifdef ENABLE_CHECKING
3941 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
3942 gcc_assert (after
!= x
);
3943 gcc_assert (after
!= to
);
3946 /* Splice this bunch out of where it is now. */
3947 if (PREV_INSN (from
))
3948 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3950 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3951 if (get_last_insn () == to
)
3952 set_last_insn (PREV_INSN (from
));
3953 if (get_insns () == from
)
3954 set_first_insn (NEXT_INSN (to
));
3956 /* Make the new neighbors point to it and it to them. */
3957 if (NEXT_INSN (after
))
3958 PREV_INSN (NEXT_INSN (after
)) = to
;
3960 NEXT_INSN (to
) = NEXT_INSN (after
);
3961 PREV_INSN (from
) = after
;
3962 NEXT_INSN (after
) = from
;
3963 if (after
== get_last_insn())
3967 /* Same as function above, but take care to update BB boundaries. */
3969 reorder_insns (rtx from
, rtx to
, rtx after
)
3971 rtx prev
= PREV_INSN (from
);
3972 basic_block bb
, bb2
;
3974 reorder_insns_nobb (from
, to
, after
);
3976 if (!BARRIER_P (after
)
3977 && (bb
= BLOCK_FOR_INSN (after
)))
3980 df_set_bb_dirty (bb
);
3982 if (!BARRIER_P (from
)
3983 && (bb2
= BLOCK_FOR_INSN (from
)))
3985 if (BB_END (bb2
) == to
)
3986 BB_END (bb2
) = prev
;
3987 df_set_bb_dirty (bb2
);
3990 if (BB_END (bb
) == after
)
3993 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3995 df_insn_change_bb (x
, bb
);
4000 /* Emit insn(s) of given code and pattern
4001 at a specified place within the doubly-linked list.
4003 All of the emit_foo global entry points accept an object
4004 X which is either an insn list or a PATTERN of a single
4007 There are thus a few canonical ways to generate code and
4008 emit it at a specific place in the instruction stream. For
4009 example, consider the instruction named SPOT and the fact that
4010 we would like to emit some instructions before SPOT. We might
4014 ... emit the new instructions ...
4015 insns_head = get_insns ();
4018 emit_insn_before (insns_head, SPOT);
4020 It used to be common to generate SEQUENCE rtl instead, but that
4021 is a relic of the past which no longer occurs. The reason is that
4022 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4023 generated would almost certainly die right after it was created. */
4025 /* Make X be output before the instruction BEFORE. */
4028 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4033 gcc_assert (before
);
4038 switch (GET_CODE (x
))
4050 rtx next
= NEXT_INSN (insn
);
4051 add_insn_before (insn
, before
, bb
);
4057 #ifdef ENABLE_RTL_CHECKING
4064 last
= make_insn_raw (x
);
4065 add_insn_before (last
, before
, bb
);
4072 /* Make an instruction with body X and code JUMP_INSN
4073 and output it before the instruction BEFORE. */
4076 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4078 rtx insn
, last
= NULL_RTX
;
4080 gcc_assert (before
);
4082 switch (GET_CODE (x
))
4094 rtx next
= NEXT_INSN (insn
);
4095 add_insn_before (insn
, before
, NULL
);
4101 #ifdef ENABLE_RTL_CHECKING
4108 last
= make_jump_insn_raw (x
);
4109 add_insn_before (last
, before
, NULL
);
4116 /* Make an instruction with body X and code CALL_INSN
4117 and output it before the instruction BEFORE. */
4120 emit_call_insn_before_noloc (rtx x
, rtx before
)
4122 rtx last
= NULL_RTX
, insn
;
4124 gcc_assert (before
);
4126 switch (GET_CODE (x
))
4138 rtx next
= NEXT_INSN (insn
);
4139 add_insn_before (insn
, before
, NULL
);
4145 #ifdef ENABLE_RTL_CHECKING
4152 last
= make_call_insn_raw (x
);
4153 add_insn_before (last
, before
, NULL
);
4160 /* Make an instruction with body X and code DEBUG_INSN
4161 and output it before the instruction BEFORE. */
4164 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4166 rtx last
= NULL_RTX
, insn
;
4168 gcc_assert (before
);
4170 switch (GET_CODE (x
))
4182 rtx next
= NEXT_INSN (insn
);
4183 add_insn_before (insn
, before
, NULL
);
4189 #ifdef ENABLE_RTL_CHECKING
4196 last
= make_debug_insn_raw (x
);
4197 add_insn_before (last
, before
, NULL
);
4204 /* Make an insn of code BARRIER
4205 and output it before the insn BEFORE. */
4208 emit_barrier_before (rtx before
)
4210 rtx insn
= rtx_alloc (BARRIER
);
4212 INSN_UID (insn
) = cur_insn_uid
++;
4214 add_insn_before (insn
, before
, NULL
);
4218 /* Emit the label LABEL before the insn BEFORE. */
4221 emit_label_before (rtx label
, rtx before
)
4223 /* This can be called twice for the same label as a result of the
4224 confusion that follows a syntax error! So make it harmless. */
4225 if (INSN_UID (label
) == 0)
4227 INSN_UID (label
) = cur_insn_uid
++;
4228 add_insn_before (label
, before
, NULL
);
4234 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4237 emit_note_before (enum insn_note subtype
, rtx before
)
4239 rtx note
= rtx_alloc (NOTE
);
4240 INSN_UID (note
) = cur_insn_uid
++;
4241 NOTE_KIND (note
) = subtype
;
4242 BLOCK_FOR_INSN (note
) = NULL
;
4243 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4245 add_insn_before (note
, before
, NULL
);
4249 /* Helper for emit_insn_after, handles lists of instructions
4253 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4257 if (!bb
&& !BARRIER_P (after
))
4258 bb
= BLOCK_FOR_INSN (after
);
4262 df_set_bb_dirty (bb
);
4263 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4264 if (!BARRIER_P (last
))
4266 set_block_for_insn (last
, bb
);
4267 df_insn_rescan (last
);
4269 if (!BARRIER_P (last
))
4271 set_block_for_insn (last
, bb
);
4272 df_insn_rescan (last
);
4274 if (BB_END (bb
) == after
)
4278 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4281 after_after
= NEXT_INSN (after
);
4283 NEXT_INSN (after
) = first
;
4284 PREV_INSN (first
) = after
;
4285 NEXT_INSN (last
) = after_after
;
4287 PREV_INSN (after_after
) = last
;
4289 if (after
== get_last_insn())
4290 set_last_insn (last
);
4295 /* Make X be output after the insn AFTER and set the BB of insn. If
4296 BB is NULL, an attempt is made to infer the BB from AFTER. */
4299 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4308 switch (GET_CODE (x
))
4317 last
= emit_insn_after_1 (x
, after
, bb
);
4320 #ifdef ENABLE_RTL_CHECKING
4327 last
= make_insn_raw (x
);
4328 add_insn_after (last
, after
, bb
);
4336 /* Make an insn of code JUMP_INSN with body X
4337 and output it after the insn AFTER. */
4340 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4346 switch (GET_CODE (x
))
4355 last
= emit_insn_after_1 (x
, after
, NULL
);
4358 #ifdef ENABLE_RTL_CHECKING
4365 last
= make_jump_insn_raw (x
);
4366 add_insn_after (last
, after
, NULL
);
4373 /* Make an instruction with body X and code CALL_INSN
4374 and output it after the instruction AFTER. */
4377 emit_call_insn_after_noloc (rtx x
, rtx after
)
4383 switch (GET_CODE (x
))
4392 last
= emit_insn_after_1 (x
, after
, NULL
);
4395 #ifdef ENABLE_RTL_CHECKING
4402 last
= make_call_insn_raw (x
);
4403 add_insn_after (last
, after
, NULL
);
4410 /* Make an instruction with body X and code CALL_INSN
4411 and output it after the instruction AFTER. */
4414 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4420 switch (GET_CODE (x
))
4429 last
= emit_insn_after_1 (x
, after
, NULL
);
4432 #ifdef ENABLE_RTL_CHECKING
4439 last
= make_debug_insn_raw (x
);
4440 add_insn_after (last
, after
, NULL
);
4447 /* Make an insn of code BARRIER
4448 and output it after the insn AFTER. */
4451 emit_barrier_after (rtx after
)
4453 rtx insn
= rtx_alloc (BARRIER
);
4455 INSN_UID (insn
) = cur_insn_uid
++;
4457 add_insn_after (insn
, after
, NULL
);
4461 /* Emit the label LABEL after the insn AFTER. */
4464 emit_label_after (rtx label
, rtx after
)
4466 /* This can be called twice for the same label
4467 as a result of the confusion that follows a syntax error!
4468 So make it harmless. */
4469 if (INSN_UID (label
) == 0)
4471 INSN_UID (label
) = cur_insn_uid
++;
4472 add_insn_after (label
, after
, NULL
);
4478 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4481 emit_note_after (enum insn_note subtype
, rtx after
)
4483 rtx note
= rtx_alloc (NOTE
);
4484 INSN_UID (note
) = cur_insn_uid
++;
4485 NOTE_KIND (note
) = subtype
;
4486 BLOCK_FOR_INSN (note
) = NULL
;
4487 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4488 add_insn_after (note
, after
, NULL
);
4492 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4494 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4496 rtx last
= emit_insn_after_noloc (pattern
, after
, NULL
);
4498 if (pattern
== NULL_RTX
|| !loc
)
4501 after
= NEXT_INSN (after
);
4504 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4505 INSN_LOCATOR (after
) = loc
;
4508 after
= NEXT_INSN (after
);
4513 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4515 emit_insn_after (rtx pattern
, rtx after
)
4519 while (DEBUG_INSN_P (prev
))
4520 prev
= PREV_INSN (prev
);
4523 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (prev
));
4525 return emit_insn_after_noloc (pattern
, after
, NULL
);
4528 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4530 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4532 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4534 if (pattern
== NULL_RTX
|| !loc
)
4537 after
= NEXT_INSN (after
);
4540 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4541 INSN_LOCATOR (after
) = loc
;
4544 after
= NEXT_INSN (after
);
4549 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4551 emit_jump_insn_after (rtx pattern
, rtx after
)
4555 while (DEBUG_INSN_P (prev
))
4556 prev
= PREV_INSN (prev
);
4559 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (prev
));
4561 return emit_jump_insn_after_noloc (pattern
, after
);
4564 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4566 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4568 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4570 if (pattern
== NULL_RTX
|| !loc
)
4573 after
= NEXT_INSN (after
);
4576 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4577 INSN_LOCATOR (after
) = loc
;
4580 after
= NEXT_INSN (after
);
4585 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4587 emit_call_insn_after (rtx pattern
, rtx after
)
4591 while (DEBUG_INSN_P (prev
))
4592 prev
= PREV_INSN (prev
);
4595 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (prev
));
4597 return emit_call_insn_after_noloc (pattern
, after
);
4600 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4602 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4604 rtx last
= emit_debug_insn_after_noloc (pattern
, after
);
4606 if (pattern
== NULL_RTX
|| !loc
)
4609 after
= NEXT_INSN (after
);
4612 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4613 INSN_LOCATOR (after
) = loc
;
4616 after
= NEXT_INSN (after
);
4621 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4623 emit_debug_insn_after (rtx pattern
, rtx after
)
4626 return emit_debug_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4628 return emit_debug_insn_after_noloc (pattern
, after
);
4631 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4633 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4635 rtx first
= PREV_INSN (before
);
4636 rtx last
= emit_insn_before_noloc (pattern
, before
, NULL
);
4638 if (pattern
== NULL_RTX
|| !loc
)
4642 first
= get_insns ();
4644 first
= NEXT_INSN (first
);
4647 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4648 INSN_LOCATOR (first
) = loc
;
4651 first
= NEXT_INSN (first
);
4656 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4658 emit_insn_before (rtx pattern
, rtx before
)
4662 while (DEBUG_INSN_P (next
))
4663 next
= PREV_INSN (next
);
4666 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (next
));
4668 return emit_insn_before_noloc (pattern
, before
, NULL
);
4671 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4673 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4675 rtx first
= PREV_INSN (before
);
4676 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4678 if (pattern
== NULL_RTX
)
4681 first
= NEXT_INSN (first
);
4684 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4685 INSN_LOCATOR (first
) = loc
;
4688 first
= NEXT_INSN (first
);
4693 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4695 emit_jump_insn_before (rtx pattern
, rtx before
)
4699 while (DEBUG_INSN_P (next
))
4700 next
= PREV_INSN (next
);
4703 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (next
));
4705 return emit_jump_insn_before_noloc (pattern
, before
);
4708 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4710 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4712 rtx first
= PREV_INSN (before
);
4713 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4715 if (pattern
== NULL_RTX
)
4718 first
= NEXT_INSN (first
);
4721 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4722 INSN_LOCATOR (first
) = loc
;
4725 first
= NEXT_INSN (first
);
4730 /* like emit_call_insn_before_noloc,
4731 but set insn_locator according to before. */
4733 emit_call_insn_before (rtx pattern
, rtx before
)
4737 while (DEBUG_INSN_P (next
))
4738 next
= PREV_INSN (next
);
4741 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (next
));
4743 return emit_call_insn_before_noloc (pattern
, before
);
4746 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4748 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4750 rtx first
= PREV_INSN (before
);
4751 rtx last
= emit_debug_insn_before_noloc (pattern
, before
);
4753 if (pattern
== NULL_RTX
)
4756 first
= NEXT_INSN (first
);
4759 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4760 INSN_LOCATOR (first
) = loc
;
4763 first
= NEXT_INSN (first
);
4768 /* like emit_debug_insn_before_noloc,
4769 but set insn_locator according to before. */
4771 emit_debug_insn_before (rtx pattern
, rtx before
)
4773 if (INSN_P (before
))
4774 return emit_debug_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4776 return emit_debug_insn_before_noloc (pattern
, before
);
4779 /* Take X and emit it at the end of the doubly-linked
4782 Returns the last insn emitted. */
4787 rtx last
= get_last_insn();
4793 switch (GET_CODE (x
))
4805 rtx next
= NEXT_INSN (insn
);
4812 #ifdef ENABLE_RTL_CHECKING
4819 last
= make_insn_raw (x
);
4827 /* Make an insn of code DEBUG_INSN with pattern X
4828 and add it to the end of the doubly-linked list. */
4831 emit_debug_insn (rtx x
)
4833 rtx last
= get_last_insn();
4839 switch (GET_CODE (x
))
4851 rtx next
= NEXT_INSN (insn
);
4858 #ifdef ENABLE_RTL_CHECKING
4865 last
= make_debug_insn_raw (x
);
4873 /* Make an insn of code JUMP_INSN with pattern X
4874 and add it to the end of the doubly-linked list. */
4877 emit_jump_insn (rtx x
)
4879 rtx last
= NULL_RTX
, insn
;
4881 switch (GET_CODE (x
))
4893 rtx next
= NEXT_INSN (insn
);
4900 #ifdef ENABLE_RTL_CHECKING
4907 last
= make_jump_insn_raw (x
);
4915 /* Make an insn of code CALL_INSN with pattern X
4916 and add it to the end of the doubly-linked list. */
4919 emit_call_insn (rtx x
)
4923 switch (GET_CODE (x
))
4932 insn
= emit_insn (x
);
4935 #ifdef ENABLE_RTL_CHECKING
4942 insn
= make_call_insn_raw (x
);
4950 /* Add the label LABEL to the end of the doubly-linked list. */
4953 emit_label (rtx label
)
4955 /* This can be called twice for the same label
4956 as a result of the confusion that follows a syntax error!
4957 So make it harmless. */
4958 if (INSN_UID (label
) == 0)
4960 INSN_UID (label
) = cur_insn_uid
++;
4966 /* Make an insn of code BARRIER
4967 and add it to the end of the doubly-linked list. */
4972 rtx barrier
= rtx_alloc (BARRIER
);
4973 INSN_UID (barrier
) = cur_insn_uid
++;
4978 /* Emit a copy of note ORIG. */
4981 emit_note_copy (rtx orig
)
4985 note
= rtx_alloc (NOTE
);
4987 INSN_UID (note
) = cur_insn_uid
++;
4988 NOTE_DATA (note
) = NOTE_DATA (orig
);
4989 NOTE_KIND (note
) = NOTE_KIND (orig
);
4990 BLOCK_FOR_INSN (note
) = NULL
;
4996 /* Make an insn of code NOTE or type NOTE_NO
4997 and add it to the end of the doubly-linked list. */
5000 emit_note (enum insn_note kind
)
5004 note
= rtx_alloc (NOTE
);
5005 INSN_UID (note
) = cur_insn_uid
++;
5006 NOTE_KIND (note
) = kind
;
5007 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
5008 BLOCK_FOR_INSN (note
) = NULL
;
5013 /* Emit a clobber of lvalue X. */
5016 emit_clobber (rtx x
)
5018 /* CONCATs should not appear in the insn stream. */
5019 if (GET_CODE (x
) == CONCAT
)
5021 emit_clobber (XEXP (x
, 0));
5022 return emit_clobber (XEXP (x
, 1));
5024 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5027 /* Return a sequence of insns to clobber lvalue X. */
5041 /* Emit a use of rvalue X. */
5046 /* CONCATs should not appear in the insn stream. */
5047 if (GET_CODE (x
) == CONCAT
)
5049 emit_use (XEXP (x
, 0));
5050 return emit_use (XEXP (x
, 1));
5052 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5055 /* Return a sequence of insns to use rvalue X. */
5069 /* Cause next statement to emit a line note even if the line number
5073 force_next_line_note (void)
5078 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5079 note of this type already exists, remove it first. */
5082 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5084 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5090 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5091 has multiple sets (some callers assume single_set
5092 means the insn only has one set, when in fact it
5093 means the insn only has one * useful * set). */
5094 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
5100 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5101 It serves no useful purpose and breaks eliminate_regs. */
5102 if (GET_CODE (datum
) == ASM_OPERANDS
)
5107 XEXP (note
, 0) = datum
;
5108 df_notes_rescan (insn
);
5116 XEXP (note
, 0) = datum
;
5122 add_reg_note (insn
, kind
, datum
);
5128 df_notes_rescan (insn
);
5134 return REG_NOTES (insn
);
5137 /* Return an indication of which type of insn should have X as a body.
5138 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5140 static enum rtx_code
5141 classify_insn (rtx x
)
5145 if (GET_CODE (x
) == CALL
)
5147 if (GET_CODE (x
) == RETURN
)
5149 if (GET_CODE (x
) == SET
)
5151 if (SET_DEST (x
) == pc_rtx
)
5153 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5158 if (GET_CODE (x
) == PARALLEL
)
5161 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5162 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5164 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5165 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5167 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5168 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5174 /* Emit the rtl pattern X as an appropriate kind of insn.
5175 If X is a label, it is simply added into the insn chain. */
5180 enum rtx_code code
= classify_insn (x
);
5185 return emit_label (x
);
5187 return emit_insn (x
);
5190 rtx insn
= emit_jump_insn (x
);
5191 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5192 return emit_barrier ();
5196 return emit_call_insn (x
);
5198 return emit_debug_insn (x
);
5204 /* Space for free sequence stack entries. */
5205 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5207 /* Begin emitting insns to a sequence. If this sequence will contain
5208 something that might cause the compiler to pop arguments to function
5209 calls (because those pops have previously been deferred; see
5210 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5211 before calling this function. That will ensure that the deferred
5212 pops are not accidentally emitted in the middle of this sequence. */
5215 start_sequence (void)
5217 struct sequence_stack
*tem
;
5219 if (free_sequence_stack
!= NULL
)
5221 tem
= free_sequence_stack
;
5222 free_sequence_stack
= tem
->next
;
5225 tem
= ggc_alloc_sequence_stack ();
5227 tem
->next
= seq_stack
;
5228 tem
->first
= get_insns ();
5229 tem
->last
= get_last_insn ();
5237 /* Set up the insn chain starting with FIRST as the current sequence,
5238 saving the previously current one. See the documentation for
5239 start_sequence for more information about how to use this function. */
5242 push_to_sequence (rtx first
)
5248 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
5250 set_first_insn (first
);
5251 set_last_insn (last
);
5254 /* Like push_to_sequence, but take the last insn as an argument to avoid
5255 looping through the list. */
5258 push_to_sequence2 (rtx first
, rtx last
)
5262 set_first_insn (first
);
5263 set_last_insn (last
);
5266 /* Set up the outer-level insn chain
5267 as the current sequence, saving the previously current one. */
5270 push_topmost_sequence (void)
5272 struct sequence_stack
*stack
, *top
= NULL
;
5276 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5279 set_first_insn (top
->first
);
5280 set_last_insn (top
->last
);
5283 /* After emitting to the outer-level insn chain, update the outer-level
5284 insn chain, and restore the previous saved state. */
5287 pop_topmost_sequence (void)
5289 struct sequence_stack
*stack
, *top
= NULL
;
5291 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5294 top
->first
= get_insns ();
5295 top
->last
= get_last_insn ();
5300 /* After emitting to a sequence, restore previous saved state.
5302 To get the contents of the sequence just made, you must call
5303 `get_insns' *before* calling here.
5305 If the compiler might have deferred popping arguments while
5306 generating this sequence, and this sequence will not be immediately
5307 inserted into the instruction stream, use do_pending_stack_adjust
5308 before calling get_insns. That will ensure that the deferred
5309 pops are inserted into this sequence, and not into some random
5310 location in the instruction stream. See INHIBIT_DEFER_POP for more
5311 information about deferred popping of arguments. */
5316 struct sequence_stack
*tem
= seq_stack
;
5318 set_first_insn (tem
->first
);
5319 set_last_insn (tem
->last
);
5320 seq_stack
= tem
->next
;
5322 memset (tem
, 0, sizeof (*tem
));
5323 tem
->next
= free_sequence_stack
;
5324 free_sequence_stack
= tem
;
5327 /* Return 1 if currently emitting into a sequence. */
5330 in_sequence_p (void)
5332 return seq_stack
!= 0;
5335 /* Put the various virtual registers into REGNO_REG_RTX. */
5338 init_virtual_regs (void)
5340 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5341 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5342 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5343 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5344 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5345 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5346 = virtual_preferred_stack_boundary_rtx
;
5350 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5351 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5352 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5353 static int copy_insn_n_scratches
;
5355 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5356 copied an ASM_OPERANDS.
5357 In that case, it is the original input-operand vector. */
5358 static rtvec orig_asm_operands_vector
;
5360 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5361 copied an ASM_OPERANDS.
5362 In that case, it is the copied input-operand vector. */
5363 static rtvec copy_asm_operands_vector
;
5365 /* Likewise for the constraints vector. */
5366 static rtvec orig_asm_constraints_vector
;
5367 static rtvec copy_asm_constraints_vector
;
5369 /* Recursively create a new copy of an rtx for copy_insn.
5370 This function differs from copy_rtx in that it handles SCRATCHes and
5371 ASM_OPERANDs properly.
5372 Normally, this function is not used directly; use copy_insn as front end.
5373 However, you could first copy an insn pattern with copy_insn and then use
5374 this function afterwards to properly copy any REG_NOTEs containing
5378 copy_insn_1 (rtx orig
)
5383 const char *format_ptr
;
5388 code
= GET_CODE (orig
);
5403 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5408 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5409 if (copy_insn_scratch_in
[i
] == orig
)
5410 return copy_insn_scratch_out
[i
];
5414 if (shared_const_p (orig
))
5418 /* A MEM with a constant address is not sharable. The problem is that
5419 the constant address may need to be reloaded. If the mem is shared,
5420 then reloading one copy of this mem will cause all copies to appear
5421 to have been reloaded. */
5427 /* Copy the various flags, fields, and other information. We assume
5428 that all fields need copying, and then clear the fields that should
5429 not be copied. That is the sensible default behavior, and forces
5430 us to explicitly document why we are *not* copying a flag. */
5431 copy
= shallow_copy_rtx (orig
);
5433 /* We do not copy the USED flag, which is used as a mark bit during
5434 walks over the RTL. */
5435 RTX_FLAG (copy
, used
) = 0;
5437 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5440 RTX_FLAG (copy
, jump
) = 0;
5441 RTX_FLAG (copy
, call
) = 0;
5442 RTX_FLAG (copy
, frame_related
) = 0;
5445 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5447 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5448 switch (*format_ptr
++)
5451 if (XEXP (orig
, i
) != NULL
)
5452 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5457 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5458 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5459 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5460 XVEC (copy
, i
) = copy_asm_operands_vector
;
5461 else if (XVEC (orig
, i
) != NULL
)
5463 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5464 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5465 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5476 /* These are left unchanged. */
5483 if (code
== SCRATCH
)
5485 i
= copy_insn_n_scratches
++;
5486 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5487 copy_insn_scratch_in
[i
] = orig
;
5488 copy_insn_scratch_out
[i
] = copy
;
5490 else if (code
== ASM_OPERANDS
)
5492 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5493 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5494 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5495 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5501 /* Create a new copy of an rtx.
5502 This function differs from copy_rtx in that it handles SCRATCHes and
5503 ASM_OPERANDs properly.
5504 INSN doesn't really have to be a full INSN; it could be just the
5507 copy_insn (rtx insn
)
5509 copy_insn_n_scratches
= 0;
5510 orig_asm_operands_vector
= 0;
5511 orig_asm_constraints_vector
= 0;
5512 copy_asm_operands_vector
= 0;
5513 copy_asm_constraints_vector
= 0;
5514 return copy_insn_1 (insn
);
5517 /* Initialize data structures and variables in this file
5518 before generating rtl for each function. */
5523 set_first_insn (NULL
);
5524 set_last_insn (NULL
);
5525 if (MIN_NONDEBUG_INSN_UID
)
5526 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5529 cur_debug_insn_uid
= 1;
5530 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5531 last_location
= UNKNOWN_LOCATION
;
5532 first_label_num
= label_num
;
5535 /* Init the tables that describe all the pseudo regs. */
5537 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5539 crtl
->emit
.regno_pointer_align
5540 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5542 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5544 /* Put copies of all the hard registers into regno_reg_rtx. */
5545 memcpy (regno_reg_rtx
,
5546 initial_regno_reg_rtx
,
5547 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5549 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5550 init_virtual_regs ();
5552 /* Indicate that the virtual registers and stack locations are
5554 REG_POINTER (stack_pointer_rtx
) = 1;
5555 REG_POINTER (frame_pointer_rtx
) = 1;
5556 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5557 REG_POINTER (arg_pointer_rtx
) = 1;
5559 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5560 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5561 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5562 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5563 REG_POINTER (virtual_cfa_rtx
) = 1;
5565 #ifdef STACK_BOUNDARY
5566 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5567 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5568 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5569 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5571 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5572 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5573 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5574 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5575 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5578 #ifdef INIT_EXPANDERS
5583 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5586 gen_const_vector (enum machine_mode mode
, int constant
)
5591 enum machine_mode inner
;
5593 units
= GET_MODE_NUNITS (mode
);
5594 inner
= GET_MODE_INNER (mode
);
5596 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5598 v
= rtvec_alloc (units
);
5600 /* We need to call this function after we set the scalar const_tiny_rtx
5602 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5604 for (i
= 0; i
< units
; ++i
)
5605 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5607 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5611 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5612 all elements are zero, and the one vector when all elements are one. */
5614 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5616 enum machine_mode inner
= GET_MODE_INNER (mode
);
5617 int nunits
= GET_MODE_NUNITS (mode
);
5621 /* Check to see if all of the elements have the same value. */
5622 x
= RTVEC_ELT (v
, nunits
- 1);
5623 for (i
= nunits
- 2; i
>= 0; i
--)
5624 if (RTVEC_ELT (v
, i
) != x
)
5627 /* If the values are all the same, check to see if we can use one of the
5628 standard constant vectors. */
5631 if (x
== CONST0_RTX (inner
))
5632 return CONST0_RTX (mode
);
5633 else if (x
== CONST1_RTX (inner
))
5634 return CONST1_RTX (mode
);
5637 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5640 /* Initialise global register information required by all functions. */
5643 init_emit_regs (void)
5647 /* Reset register attributes */
5648 htab_empty (reg_attrs_htab
);
5650 /* We need reg_raw_mode, so initialize the modes now. */
5651 init_reg_modes_target ();
5653 /* Assign register numbers to the globally defined register rtx. */
5654 pc_rtx
= gen_rtx_PC (VOIDmode
);
5655 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5656 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5657 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5658 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5659 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5660 virtual_incoming_args_rtx
=
5661 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5662 virtual_stack_vars_rtx
=
5663 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5664 virtual_stack_dynamic_rtx
=
5665 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5666 virtual_outgoing_args_rtx
=
5667 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5668 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5669 virtual_preferred_stack_boundary_rtx
=
5670 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5672 /* Initialize RTL for commonly used hard registers. These are
5673 copied into regno_reg_rtx as we begin to compile each function. */
5674 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5675 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5677 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5678 return_address_pointer_rtx
5679 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5682 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5683 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5685 pic_offset_table_rtx
= NULL_RTX
;
5688 /* Create some permanent unique rtl objects shared between all functions. */
5691 init_emit_once (void)
5694 enum machine_mode mode
;
5695 enum machine_mode double_mode
;
5697 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5699 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5700 const_int_htab_eq
, NULL
);
5702 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5703 const_double_htab_eq
, NULL
);
5705 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5706 const_fixed_htab_eq
, NULL
);
5708 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5709 mem_attrs_htab_eq
, NULL
);
5710 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5711 reg_attrs_htab_eq
, NULL
);
5713 /* Compute the word and byte modes. */
5715 byte_mode
= VOIDmode
;
5716 word_mode
= VOIDmode
;
5717 double_mode
= VOIDmode
;
5719 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5721 mode
= GET_MODE_WIDER_MODE (mode
))
5723 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5724 && byte_mode
== VOIDmode
)
5727 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5728 && word_mode
== VOIDmode
)
5732 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5734 mode
= GET_MODE_WIDER_MODE (mode
))
5736 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5737 && double_mode
== VOIDmode
)
5741 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5743 #ifdef INIT_EXPANDERS
5744 /* This is to initialize {init|mark|free}_machine_status before the first
5745 call to push_function_context_to. This is needed by the Chill front
5746 end which calls push_function_context_to before the first call to
5747 init_function_start. */
5751 /* Create the unique rtx's for certain rtx codes and operand values. */
5753 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5754 tries to use these variables. */
5755 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5756 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5757 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5759 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5760 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5761 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5763 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5765 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5766 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5767 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5772 dconsthalf
= dconst1
;
5773 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5775 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5777 const REAL_VALUE_TYPE
*const r
=
5778 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5780 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5782 mode
= GET_MODE_WIDER_MODE (mode
))
5783 const_tiny_rtx
[i
][(int) mode
] =
5784 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5786 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5788 mode
= GET_MODE_WIDER_MODE (mode
))
5789 const_tiny_rtx
[i
][(int) mode
] =
5790 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5792 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5794 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5796 mode
= GET_MODE_WIDER_MODE (mode
))
5797 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5799 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5801 mode
= GET_MODE_WIDER_MODE (mode
))
5802 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5805 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5807 mode
= GET_MODE_WIDER_MODE (mode
))
5809 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5810 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5813 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5815 mode
= GET_MODE_WIDER_MODE (mode
))
5817 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5818 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5821 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5823 mode
= GET_MODE_WIDER_MODE (mode
))
5825 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5826 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5829 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5831 mode
= GET_MODE_WIDER_MODE (mode
))
5833 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5834 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5837 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5839 mode
= GET_MODE_WIDER_MODE (mode
))
5841 FCONST0(mode
).data
.high
= 0;
5842 FCONST0(mode
).data
.low
= 0;
5843 FCONST0(mode
).mode
= mode
;
5844 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5845 FCONST0 (mode
), mode
);
5848 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5850 mode
= GET_MODE_WIDER_MODE (mode
))
5852 FCONST0(mode
).data
.high
= 0;
5853 FCONST0(mode
).data
.low
= 0;
5854 FCONST0(mode
).mode
= mode
;
5855 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5856 FCONST0 (mode
), mode
);
5859 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5861 mode
= GET_MODE_WIDER_MODE (mode
))
5863 FCONST0(mode
).data
.high
= 0;
5864 FCONST0(mode
).data
.low
= 0;
5865 FCONST0(mode
).mode
= mode
;
5866 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5867 FCONST0 (mode
), mode
);
5869 /* We store the value 1. */
5870 FCONST1(mode
).data
.high
= 0;
5871 FCONST1(mode
).data
.low
= 0;
5872 FCONST1(mode
).mode
= mode
;
5873 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5874 2 * HOST_BITS_PER_WIDE_INT
,
5875 &FCONST1(mode
).data
.low
,
5876 &FCONST1(mode
).data
.high
,
5877 SIGNED_FIXED_POINT_MODE_P (mode
));
5878 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5879 FCONST1 (mode
), mode
);
5882 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5884 mode
= GET_MODE_WIDER_MODE (mode
))
5886 FCONST0(mode
).data
.high
= 0;
5887 FCONST0(mode
).data
.low
= 0;
5888 FCONST0(mode
).mode
= mode
;
5889 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5890 FCONST0 (mode
), mode
);
5892 /* We store the value 1. */
5893 FCONST1(mode
).data
.high
= 0;
5894 FCONST1(mode
).data
.low
= 0;
5895 FCONST1(mode
).mode
= mode
;
5896 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5897 2 * HOST_BITS_PER_WIDE_INT
,
5898 &FCONST1(mode
).data
.low
,
5899 &FCONST1(mode
).data
.high
,
5900 SIGNED_FIXED_POINT_MODE_P (mode
));
5901 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5902 FCONST1 (mode
), mode
);
5905 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5907 mode
= GET_MODE_WIDER_MODE (mode
))
5909 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5912 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5914 mode
= GET_MODE_WIDER_MODE (mode
))
5916 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5919 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5921 mode
= GET_MODE_WIDER_MODE (mode
))
5923 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5924 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5927 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5929 mode
= GET_MODE_WIDER_MODE (mode
))
5931 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5932 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5935 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5936 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5937 const_tiny_rtx
[0][i
] = const0_rtx
;
5939 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5940 if (STORE_FLAG_VALUE
== 1)
5941 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5944 /* Produce exact duplicate of insn INSN after AFTER.
5945 Care updating of libcall regions if present. */
5948 emit_copy_of_insn_after (rtx insn
, rtx after
)
5952 switch (GET_CODE (insn
))
5955 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5959 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5963 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5967 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5968 if (CALL_INSN_FUNCTION_USAGE (insn
))
5969 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5970 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5971 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5972 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5973 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5974 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5975 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5982 /* Update LABEL_NUSES. */
5983 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5985 INSN_LOCATOR (new_rtx
) = INSN_LOCATOR (insn
);
5987 /* If the old insn is frame related, then so is the new one. This is
5988 primarily needed for IA-64 unwind info which marks epilogue insns,
5989 which may be duplicated by the basic block reordering code. */
5990 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5992 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5993 will make them. REG_LABEL_TARGETs are created there too, but are
5994 supposed to be sticky, so we copy them. */
5995 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5996 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5998 if (GET_CODE (link
) == EXPR_LIST
)
5999 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6000 copy_insn_1 (XEXP (link
, 0)));
6002 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
6005 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6009 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6011 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6013 if (hard_reg_clobbers
[mode
][regno
])
6014 return hard_reg_clobbers
[mode
][regno
];
6016 return (hard_reg_clobbers
[mode
][regno
] =
6017 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6020 #include "gt-emit-rtl.h"