1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_reg_rtx' and `gen_label_rtx'
26 that are the usual ways of creating rtl expressions for most
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx_fmt_ee' and
35 others to make the individual rtx's of the pattern; what is machine
36 dependent is the kind of rtx's they make and what arguments they
41 #include "coretypes.h"
51 #include "hard-reg-set.h"
53 #include "insn-config.h"
57 #include "basic-block.h"
60 #include "langhooks.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
70 /* This is *not* reset after each function. It gives each CODE_LABEL
71 in the entire compilation a unique label number. */
73 static GTY(()) int label_num
= 1;
75 /* Highest label number in current function.
76 Zero means use the value of label_num instead.
77 This is nonzero only when belatedly compiling an inline function. */
79 static int last_label_num
;
81 /* Value label_num had when set_new_last_label_num was called.
82 If label_num has not changed since then, last_label_num is valid. */
84 static int base_label_num
;
86 /* Nonzero means do not generate NOTEs for source line numbers. */
88 static int no_line_numbers
;
90 /* Commonly used rtx's, so that we only need space for one copy.
91 These are initialized once for the entire compilation.
92 All of these are unique; no other rtx-object will be equal to any
95 rtx global_rtl
[GR_MAX
];
97 /* Commonly used RTL for hard registers. These objects are not necessarily
98 unique, so we allocate them separately from global_rtl. They are
99 initialized once per compilation unit, then copied into regno_reg_rtx
100 at the beginning of each function. */
101 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
103 rtx (*gen_lowpart
) (enum machine_mode mode
, rtx x
) = gen_lowpart_general
;
105 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
106 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
107 record a copy of const[012]_rtx. */
109 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
113 REAL_VALUE_TYPE dconst0
;
114 REAL_VALUE_TYPE dconst1
;
115 REAL_VALUE_TYPE dconst2
;
116 REAL_VALUE_TYPE dconst3
;
117 REAL_VALUE_TYPE dconst10
;
118 REAL_VALUE_TYPE dconstm1
;
119 REAL_VALUE_TYPE dconstm2
;
120 REAL_VALUE_TYPE dconsthalf
;
121 REAL_VALUE_TYPE dconstthird
;
122 REAL_VALUE_TYPE dconstpi
;
123 REAL_VALUE_TYPE dconste
;
125 /* All references to the following fixed hard registers go through
126 these unique rtl objects. On machines where the frame-pointer and
127 arg-pointer are the same register, they use the same unique object.
129 After register allocation, other rtl objects which used to be pseudo-regs
130 may be clobbered to refer to the frame-pointer register.
131 But references that were originally to the frame-pointer can be
132 distinguished from the others because they contain frame_pointer_rtx.
134 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
135 tricky: until register elimination has taken place hard_frame_pointer_rtx
136 should be used if it is being set, and frame_pointer_rtx otherwise. After
137 register elimination hard_frame_pointer_rtx should always be used.
138 On machines where the two registers are same (most) then these are the
141 In an inline procedure, the stack and frame pointer rtxs may not be
142 used for anything else. */
143 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
144 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
145 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
147 /* This is used to implement __builtin_return_address for some machines.
148 See for instance the MIPS port. */
149 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
151 /* We make one copy of (const_int C) where C is in
152 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
153 to save space during the compilation and simplify comparisons of
156 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
158 /* A hash table storing CONST_INTs whose absolute value is greater
159 than MAX_SAVED_CONST_INT. */
161 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
162 htab_t const_int_htab
;
164 /* A hash table storing memory attribute structures. */
165 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
166 htab_t mem_attrs_htab
;
168 /* A hash table storing register attribute structures. */
169 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
170 htab_t reg_attrs_htab
;
172 /* A hash table storing all CONST_DOUBLEs. */
173 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
174 htab_t const_double_htab
;
176 #define first_insn (cfun->emit->x_first_insn)
177 #define last_insn (cfun->emit->x_last_insn)
178 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
179 #define last_location (cfun->emit->x_last_location)
180 #define first_label_num (cfun->emit->x_first_label_num)
182 static rtx
make_jump_insn_raw (rtx
);
183 static rtx
make_call_insn_raw (rtx
);
184 static rtx
find_line_note (rtx
);
185 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
186 static void unshare_all_decls (tree
);
187 static void reset_used_decls (tree
);
188 static void mark_label_nuses (rtx
);
189 static hashval_t
const_int_htab_hash (const void *);
190 static int const_int_htab_eq (const void *, const void *);
191 static hashval_t
const_double_htab_hash (const void *);
192 static int const_double_htab_eq (const void *, const void *);
193 static rtx
lookup_const_double (rtx
);
194 static hashval_t
mem_attrs_htab_hash (const void *);
195 static int mem_attrs_htab_eq (const void *, const void *);
196 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
198 static hashval_t
reg_attrs_htab_hash (const void *);
199 static int reg_attrs_htab_eq (const void *, const void *);
200 static reg_attrs
*get_reg_attrs (tree
, int);
201 static tree
component_ref_for_mem_expr (tree
);
202 static rtx
gen_const_vector_0 (enum machine_mode
);
203 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
204 static void copy_rtx_if_shared_1 (rtx
*orig
);
206 /* Probability of the conditional branch currently proceeded by try_split.
207 Set to -1 otherwise. */
208 int split_branch_probability
= -1;
210 /* Returns a hash code for X (which is a really a CONST_INT). */
213 const_int_htab_hash (const void *x
)
215 return (hashval_t
) INTVAL ((rtx
) x
);
218 /* Returns nonzero if the value represented by X (which is really a
219 CONST_INT) is the same as that given by Y (which is really a
223 const_int_htab_eq (const void *x
, const void *y
)
225 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
228 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
230 const_double_htab_hash (const void *x
)
235 if (GET_MODE (value
) == VOIDmode
)
236 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
239 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
240 /* MODE is used in the comparison, so it should be in the hash. */
241 h
^= GET_MODE (value
);
246 /* Returns nonzero if the value represented by X (really a ...)
247 is the same as that represented by Y (really a ...) */
249 const_double_htab_eq (const void *x
, const void *y
)
251 rtx a
= (rtx
)x
, b
= (rtx
)y
;
253 if (GET_MODE (a
) != GET_MODE (b
))
255 if (GET_MODE (a
) == VOIDmode
)
256 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
257 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
259 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
260 CONST_DOUBLE_REAL_VALUE (b
));
263 /* Returns a hash code for X (which is a really a mem_attrs *). */
266 mem_attrs_htab_hash (const void *x
)
268 mem_attrs
*p
= (mem_attrs
*) x
;
270 return (p
->alias
^ (p
->align
* 1000)
271 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
272 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
276 /* Returns nonzero if the value represented by X (which is really a
277 mem_attrs *) is the same as that given by Y (which is also really a
281 mem_attrs_htab_eq (const void *x
, const void *y
)
283 mem_attrs
*p
= (mem_attrs
*) x
;
284 mem_attrs
*q
= (mem_attrs
*) y
;
286 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
287 && p
->size
== q
->size
&& p
->align
== q
->align
);
290 /* Allocate a new mem_attrs structure and insert it into the hash table if
291 one identical to it is not already in the table. We are doing this for
295 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
296 unsigned int align
, enum machine_mode mode
)
301 /* If everything is the default, we can just return zero.
302 This must match what the corresponding MEM_* macros return when the
303 field is not present. */
304 if (alias
== 0 && expr
== 0 && offset
== 0
306 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
307 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
308 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
313 attrs
.offset
= offset
;
317 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
320 *slot
= ggc_alloc (sizeof (mem_attrs
));
321 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
327 /* Returns a hash code for X (which is a really a reg_attrs *). */
330 reg_attrs_htab_hash (const void *x
)
332 reg_attrs
*p
= (reg_attrs
*) x
;
334 return ((p
->offset
* 1000) ^ (long) p
->decl
);
337 /* Returns nonzero if the value represented by X (which is really a
338 reg_attrs *) is the same as that given by Y (which is also really a
342 reg_attrs_htab_eq (const void *x
, const void *y
)
344 reg_attrs
*p
= (reg_attrs
*) x
;
345 reg_attrs
*q
= (reg_attrs
*) y
;
347 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
349 /* Allocate a new reg_attrs structure and insert it into the hash table if
350 one identical to it is not already in the table. We are doing this for
354 get_reg_attrs (tree decl
, int offset
)
359 /* If everything is the default, we can just return zero. */
360 if (decl
== 0 && offset
== 0)
364 attrs
.offset
= offset
;
366 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
369 *slot
= ggc_alloc (sizeof (reg_attrs
));
370 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
376 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
377 don't attempt to share with the various global pieces of rtl (such as
378 frame_pointer_rtx). */
381 gen_raw_REG (enum machine_mode mode
, int regno
)
383 rtx x
= gen_rtx_raw_REG (mode
, regno
);
384 ORIGINAL_REGNO (x
) = regno
;
388 /* There are some RTL codes that require special attention; the generation
389 functions do the raw handling. If you add to this list, modify
390 special_rtx in gengenrtl.c as well. */
393 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
397 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
398 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
400 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
401 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
402 return const_true_rtx
;
405 /* Look up the CONST_INT in the hash table. */
406 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
407 (hashval_t
) arg
, INSERT
);
409 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
415 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
417 return GEN_INT (trunc_int_for_mode (c
, mode
));
420 /* CONST_DOUBLEs might be created from pairs of integers, or from
421 REAL_VALUE_TYPEs. Also, their length is known only at run time,
422 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
424 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
425 hash table. If so, return its counterpart; otherwise add it
426 to the hash table and return it. */
428 lookup_const_double (rtx real
)
430 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
437 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
438 VALUE in mode MODE. */
440 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
442 rtx real
= rtx_alloc (CONST_DOUBLE
);
443 PUT_MODE (real
, mode
);
445 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
447 return lookup_const_double (real
);
450 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
451 of ints: I0 is the low-order word and I1 is the high-order word.
452 Do not use this routine for non-integer modes; convert to
453 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
456 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
461 if (mode
!= VOIDmode
)
464 if (GET_MODE_CLASS (mode
) != MODE_INT
465 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
466 /* We can get a 0 for an error mark. */
467 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
468 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
471 /* We clear out all bits that don't belong in MODE, unless they and
472 our sign bit are all one. So we get either a reasonable negative
473 value or a reasonable unsigned value for this mode. */
474 width
= GET_MODE_BITSIZE (mode
);
475 if (width
< HOST_BITS_PER_WIDE_INT
476 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
477 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
478 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
479 else if (width
== HOST_BITS_PER_WIDE_INT
480 && ! (i1
== ~0 && i0
< 0))
482 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
483 /* We cannot represent this value as a constant. */
486 /* If this would be an entire word for the target, but is not for
487 the host, then sign-extend on the host so that the number will
488 look the same way on the host that it would on the target.
490 For example, when building a 64 bit alpha hosted 32 bit sparc
491 targeted compiler, then we want the 32 bit unsigned value -1 to be
492 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
493 The latter confuses the sparc backend. */
495 if (width
< HOST_BITS_PER_WIDE_INT
496 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
497 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
499 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
502 ??? Strictly speaking, this is wrong if we create a CONST_INT for
503 a large unsigned constant with the size of MODE being
504 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
505 in a wider mode. In that case we will mis-interpret it as a
508 Unfortunately, the only alternative is to make a CONST_DOUBLE for
509 any constant in any mode if it is an unsigned constant larger
510 than the maximum signed integer in an int on the host. However,
511 doing this will break everyone that always expects to see a
512 CONST_INT for SImode and smaller.
514 We have always been making CONST_INTs in this case, so nothing
515 new is being broken. */
517 if (width
<= HOST_BITS_PER_WIDE_INT
)
518 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
521 /* If this integer fits in one word, return a CONST_INT. */
522 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
525 /* We use VOIDmode for integers. */
526 value
= rtx_alloc (CONST_DOUBLE
);
527 PUT_MODE (value
, VOIDmode
);
529 CONST_DOUBLE_LOW (value
) = i0
;
530 CONST_DOUBLE_HIGH (value
) = i1
;
532 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
533 XWINT (value
, i
) = 0;
535 return lookup_const_double (value
);
539 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
541 /* In case the MD file explicitly references the frame pointer, have
542 all such references point to the same frame pointer. This is
543 used during frame pointer elimination to distinguish the explicit
544 references to these registers from pseudos that happened to be
547 If we have eliminated the frame pointer or arg pointer, we will
548 be using it as a normal register, for example as a spill
549 register. In such cases, we might be accessing it in a mode that
550 is not Pmode and therefore cannot use the pre-allocated rtx.
552 Also don't do this when we are making new REGs in reload, since
553 we don't want to get confused with the real pointers. */
555 if (mode
== Pmode
&& !reload_in_progress
)
557 if (regno
== FRAME_POINTER_REGNUM
558 && (!reload_completed
|| frame_pointer_needed
))
559 return frame_pointer_rtx
;
560 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
561 if (regno
== HARD_FRAME_POINTER_REGNUM
562 && (!reload_completed
|| frame_pointer_needed
))
563 return hard_frame_pointer_rtx
;
565 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
566 if (regno
== ARG_POINTER_REGNUM
)
567 return arg_pointer_rtx
;
569 #ifdef RETURN_ADDRESS_POINTER_REGNUM
570 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
571 return return_address_pointer_rtx
;
573 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
574 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
575 return pic_offset_table_rtx
;
576 if (regno
== STACK_POINTER_REGNUM
)
577 return stack_pointer_rtx
;
581 /* If the per-function register table has been set up, try to re-use
582 an existing entry in that table to avoid useless generation of RTL.
584 This code is disabled for now until we can fix the various backends
585 which depend on having non-shared hard registers in some cases. Long
586 term we want to re-enable this code as it can significantly cut down
587 on the amount of useless RTL that gets generated.
589 We'll also need to fix some code that runs after reload that wants to
590 set ORIGINAL_REGNO. */
595 && regno
< FIRST_PSEUDO_REGISTER
596 && reg_raw_mode
[regno
] == mode
)
597 return regno_reg_rtx
[regno
];
600 return gen_raw_REG (mode
, regno
);
604 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
606 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
608 /* This field is not cleared by the mere allocation of the rtx, so
616 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
618 /* This is the most common failure type.
619 Catch it early so we can see who does it. */
620 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
623 /* This check isn't usable right now because combine will
624 throw arbitrary crap like a CALL into a SUBREG in
625 gen_lowpart_for_combine so we must just eat it. */
627 /* Check for this too. */
628 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
631 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
634 /* Generate a SUBREG representing the least-significant part of REG if MODE
635 is smaller than mode of REG, otherwise paradoxical SUBREG. */
638 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
640 enum machine_mode inmode
;
642 inmode
= GET_MODE (reg
);
643 if (inmode
== VOIDmode
)
645 return gen_rtx_SUBREG (mode
, reg
,
646 subreg_lowpart_offset (mode
, inmode
));
649 /* gen_rtvec (n, [rt1, ..., rtn])
651 ** This routine creates an rtvec and stores within it the
652 ** pointers to rtx's which are its arguments.
657 gen_rtvec (int n
, ...)
666 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
668 vector
= alloca (n
* sizeof (rtx
));
670 for (i
= 0; i
< n
; i
++)
671 vector
[i
] = va_arg (p
, rtx
);
673 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
677 return gen_rtvec_v (save_n
, vector
);
681 gen_rtvec_v (int n
, rtx
*argp
)
687 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
689 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
691 for (i
= 0; i
< n
; i
++)
692 rt_val
->elem
[i
] = *argp
++;
697 /* Generate a REG rtx for a new pseudo register of mode MODE.
698 This pseudo is assigned the next sequential register number. */
701 gen_reg_rtx (enum machine_mode mode
)
703 struct function
*f
= cfun
;
706 /* Don't let anything called after initial flow analysis create new
711 if (generating_concat_p
712 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
713 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
715 /* For complex modes, don't make a single pseudo.
716 Instead, make a CONCAT of two pseudos.
717 This allows noncontiguous allocation of the real and imaginary parts,
718 which makes much better code. Besides, allocating DCmode
719 pseudos overstrains reload on some machines like the 386. */
720 rtx realpart
, imagpart
;
721 enum machine_mode partmode
= GET_MODE_INNER (mode
);
723 realpart
= gen_reg_rtx (partmode
);
724 imagpart
= gen_reg_rtx (partmode
);
725 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
728 /* Make sure regno_pointer_align, and regno_reg_rtx are large
729 enough to have an element for this pseudo reg number. */
731 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
733 int old_size
= f
->emit
->regno_pointer_align_length
;
737 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
738 memset (new + old_size
, 0, old_size
);
739 f
->emit
->regno_pointer_align
= (unsigned char *) new;
741 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
742 old_size
* 2 * sizeof (rtx
));
743 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
744 regno_reg_rtx
= new1
;
746 f
->emit
->regno_pointer_align_length
= old_size
* 2;
749 val
= gen_raw_REG (mode
, reg_rtx_no
);
750 regno_reg_rtx
[reg_rtx_no
++] = val
;
754 /* Generate a register with same attributes as REG,
755 but offsetted by OFFSET. */
758 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
760 rtx
new = gen_rtx_REG (mode
, regno
);
761 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
762 REG_OFFSET (reg
) + offset
);
766 /* Set the decl for MEM to DECL. */
769 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
771 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
773 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
776 /* Set the register attributes for registers contained in PARM_RTX.
777 Use needed values from memory attributes of MEM. */
780 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
782 if (GET_CODE (parm_rtx
) == REG
)
783 set_reg_attrs_from_mem (parm_rtx
, mem
);
784 else if (GET_CODE (parm_rtx
) == PARALLEL
)
786 /* Check for a NULL entry in the first slot, used to indicate that the
787 parameter goes both on the stack and in registers. */
788 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
789 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
791 rtx x
= XVECEXP (parm_rtx
, 0, i
);
792 if (GET_CODE (XEXP (x
, 0)) == REG
)
793 REG_ATTRS (XEXP (x
, 0))
794 = get_reg_attrs (MEM_EXPR (mem
),
795 INTVAL (XEXP (x
, 1)));
800 /* Assign the RTX X to declaration T. */
802 set_decl_rtl (tree t
, rtx x
)
804 DECL_CHECK (t
)->decl
.rtl
= x
;
808 /* For register, we maintain the reverse information too. */
809 if (GET_CODE (x
) == REG
)
810 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
811 else if (GET_CODE (x
) == SUBREG
)
812 REG_ATTRS (SUBREG_REG (x
))
813 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
814 if (GET_CODE (x
) == CONCAT
)
816 if (REG_P (XEXP (x
, 0)))
817 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
818 if (REG_P (XEXP (x
, 1)))
819 REG_ATTRS (XEXP (x
, 1))
820 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
822 if (GET_CODE (x
) == PARALLEL
)
825 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
827 rtx y
= XVECEXP (x
, 0, i
);
828 if (REG_P (XEXP (y
, 0)))
829 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
834 /* Identify REG (which may be a CONCAT) as a user register. */
837 mark_user_reg (rtx reg
)
839 if (GET_CODE (reg
) == CONCAT
)
841 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
842 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
844 else if (GET_CODE (reg
) == REG
)
845 REG_USERVAR_P (reg
) = 1;
850 /* Identify REG as a probable pointer register and show its alignment
851 as ALIGN, if nonzero. */
854 mark_reg_pointer (rtx reg
, int align
)
856 if (! REG_POINTER (reg
))
858 REG_POINTER (reg
) = 1;
861 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
863 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
864 /* We can no-longer be sure just how aligned this pointer is. */
865 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
868 /* Return 1 plus largest pseudo reg number used in the current function. */
876 /* Return 1 + the largest label number used so far in the current function. */
881 if (last_label_num
&& label_num
== base_label_num
)
882 return last_label_num
;
886 /* Return first label number used in this function (if any were used). */
889 get_first_label_num (void)
891 return first_label_num
;
894 /* Return the final regno of X, which is a SUBREG of a hard
897 subreg_hard_regno (rtx x
, int check_mode
)
899 enum machine_mode mode
= GET_MODE (x
);
900 unsigned int byte_offset
, base_regno
, final_regno
;
901 rtx reg
= SUBREG_REG (x
);
903 /* This is where we attempt to catch illegal subregs
904 created by the compiler. */
905 if (GET_CODE (x
) != SUBREG
906 || GET_CODE (reg
) != REG
)
908 base_regno
= REGNO (reg
);
909 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
911 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
913 #ifdef ENABLE_CHECKING
914 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
915 SUBREG_BYTE (x
), mode
))
918 /* Catch non-congruent offsets too. */
919 byte_offset
= SUBREG_BYTE (x
);
920 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
923 final_regno
= subreg_regno (x
);
928 /* Return a value representing some low-order bits of X, where the number
929 of low-order bits is given by MODE. Note that no conversion is done
930 between floating-point and fixed-point values, rather, the bit
931 representation is returned.
933 This function handles the cases in common between gen_lowpart, below,
934 and two variants in cse.c and combine.c. These are the cases that can
935 be safely handled at all points in the compilation.
937 If this is not a case we can handle, return 0. */
940 gen_lowpart_common (enum machine_mode mode
, rtx x
)
942 int msize
= GET_MODE_SIZE (mode
);
945 enum machine_mode innermode
;
947 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
948 so we have to make one up. Yuk. */
949 innermode
= GET_MODE (x
);
950 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
951 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
952 else if (innermode
== VOIDmode
)
953 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
955 xsize
= GET_MODE_SIZE (innermode
);
957 if (innermode
== VOIDmode
|| innermode
== BLKmode
)
960 if (innermode
== mode
)
963 /* MODE must occupy no more words than the mode of X. */
964 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
965 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
968 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
969 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
972 offset
= subreg_lowpart_offset (mode
, innermode
);
974 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
975 && (GET_MODE_CLASS (mode
) == MODE_INT
976 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
978 /* If we are getting the low-order part of something that has been
979 sign- or zero-extended, we can either just use the object being
980 extended or make a narrower extension. If we want an even smaller
981 piece than the size of the object being extended, call ourselves
984 This case is used mostly by combine and cse. */
986 if (GET_MODE (XEXP (x
, 0)) == mode
)
988 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
989 return gen_lowpart_common (mode
, XEXP (x
, 0));
990 else if (msize
< xsize
)
991 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
993 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
994 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
995 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
996 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
998 /* Otherwise, we can't do this. */
1002 /* Return the constant real or imaginary part (which has mode MODE)
1003 of a complex value X. The IMAGPART_P argument determines whether
1004 the real or complex component should be returned. This function
1005 returns NULL_RTX if the component isn't a constant. */
1008 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1012 if (GET_CODE (x
) == MEM
1013 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1015 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1016 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1018 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1019 if (TREE_CODE (part
) == REAL_CST
1020 || TREE_CODE (part
) == INTEGER_CST
)
1021 return expand_expr (part
, NULL_RTX
, mode
, 0);
1027 /* Return the real part (which has mode MODE) of a complex value X.
1028 This always comes at the low address in memory. */
1031 gen_realpart (enum machine_mode mode
, rtx x
)
1035 /* Handle complex constants. */
1036 part
= gen_complex_constant_part (mode
, x
, 0);
1037 if (part
!= NULL_RTX
)
1040 if (WORDS_BIG_ENDIAN
1041 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1043 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1045 ("can't access real part of complex value in hard register");
1046 else if (WORDS_BIG_ENDIAN
)
1047 return gen_highpart (mode
, x
);
1049 return gen_lowpart (mode
, x
);
1052 /* Return the imaginary part (which has mode MODE) of a complex value X.
1053 This always comes at the high address in memory. */
1056 gen_imagpart (enum machine_mode mode
, rtx x
)
1060 /* Handle complex constants. */
1061 part
= gen_complex_constant_part (mode
, x
, 1);
1062 if (part
!= NULL_RTX
)
1065 if (WORDS_BIG_ENDIAN
)
1066 return gen_lowpart (mode
, x
);
1067 else if (! WORDS_BIG_ENDIAN
1068 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1070 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1072 ("can't access imaginary part of complex value in hard register");
1074 return gen_highpart (mode
, x
);
1077 /* Return 1 iff X, assumed to be a SUBREG,
1078 refers to the real part of the complex value in its containing reg.
1079 Complex values are always stored with the real part in the first word,
1080 regardless of WORDS_BIG_ENDIAN. */
1083 subreg_realpart_p (rtx x
)
1085 if (GET_CODE (x
) != SUBREG
)
1088 return ((unsigned int) SUBREG_BYTE (x
)
1089 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1092 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1093 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1094 least-significant part of X.
1095 MODE specifies how big a part of X to return;
1096 it usually should not be larger than a word.
1097 If X is a MEM whose address is a QUEUED, the value may be so also. */
1100 gen_lowpart_general (enum machine_mode mode
, rtx x
)
1102 rtx result
= gen_lowpart_common (mode
, x
);
1106 else if (GET_CODE (x
) == REG
)
1108 /* Must be a hard reg that's not valid in MODE. */
1109 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1114 else if (GET_CODE (x
) == MEM
)
1116 /* The only additional case we can do is MEM. */
1119 /* The following exposes the use of "x" to CSE. */
1120 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1121 && SCALAR_INT_MODE_P (GET_MODE (x
))
1122 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1123 GET_MODE_BITSIZE (GET_MODE (x
)))
1124 && ! no_new_pseudos
)
1125 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1127 if (WORDS_BIG_ENDIAN
)
1128 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1129 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1131 if (BYTES_BIG_ENDIAN
)
1132 /* Adjust the address so that the address-after-the-data
1134 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1135 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1137 return adjust_address (x
, mode
, offset
);
1139 else if (GET_CODE (x
) == ADDRESSOF
)
1140 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1145 /* Like `gen_lowpart', but refer to the most significant part.
1146 This is used to access the imaginary part of a complex number. */
1149 gen_highpart (enum machine_mode mode
, rtx x
)
1151 unsigned int msize
= GET_MODE_SIZE (mode
);
1154 /* This case loses if X is a subreg. To catch bugs early,
1155 complain if an invalid MODE is used even in other cases. */
1156 if (msize
> UNITS_PER_WORD
1157 && msize
!= (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1160 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1161 subreg_highpart_offset (mode
, GET_MODE (x
)));
1163 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1164 the target if we have a MEM. gen_highpart must return a valid operand,
1165 emitting code if necessary to do so. */
1166 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1167 result
= validize_mem (result
);
1174 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1175 be VOIDmode constant. */
1177 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1179 if (GET_MODE (exp
) != VOIDmode
)
1181 if (GET_MODE (exp
) != innermode
)
1183 return gen_highpart (outermode
, exp
);
1185 return simplify_gen_subreg (outermode
, exp
, innermode
,
1186 subreg_highpart_offset (outermode
, innermode
));
1189 /* Return offset in bytes to get OUTERMODE low part
1190 of the value in mode INNERMODE stored in memory in target format. */
1193 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1195 unsigned int offset
= 0;
1196 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1200 if (WORDS_BIG_ENDIAN
)
1201 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1202 if (BYTES_BIG_ENDIAN
)
1203 offset
+= difference
% UNITS_PER_WORD
;
1209 /* Return offset in bytes to get OUTERMODE high part
1210 of the value in mode INNERMODE stored in memory in target format. */
1212 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1214 unsigned int offset
= 0;
1215 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1217 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1222 if (! WORDS_BIG_ENDIAN
)
1223 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1224 if (! BYTES_BIG_ENDIAN
)
1225 offset
+= difference
% UNITS_PER_WORD
;
1231 /* Return 1 iff X, assumed to be a SUBREG,
1232 refers to the least significant part of its containing reg.
1233 If X is not a SUBREG, always return 1 (it is its own low part!). */
1236 subreg_lowpart_p (rtx x
)
1238 if (GET_CODE (x
) != SUBREG
)
1240 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1243 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1244 == SUBREG_BYTE (x
));
1247 /* Return subword OFFSET of operand OP.
1248 The word number, OFFSET, is interpreted as the word number starting
1249 at the low-order address. OFFSET 0 is the low-order word if not
1250 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1252 If we cannot extract the required word, we return zero. Otherwise,
1253 an rtx corresponding to the requested word will be returned.
1255 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1256 reload has completed, a valid address will always be returned. After
1257 reload, if a valid address cannot be returned, we return zero.
1259 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1260 it is the responsibility of the caller.
1262 MODE is the mode of OP in case it is a CONST_INT.
1264 ??? This is still rather broken for some cases. The problem for the
1265 moment is that all callers of this thing provide no 'goal mode' to
1266 tell us to work with. This exists because all callers were written
1267 in a word based SUBREG world.
1268 Now use of this function can be deprecated by simplify_subreg in most
1273 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1275 if (mode
== VOIDmode
)
1276 mode
= GET_MODE (op
);
1278 if (mode
== VOIDmode
)
1281 /* If OP is narrower than a word, fail. */
1283 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1286 /* If we want a word outside OP, return zero. */
1288 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1291 /* Form a new MEM at the requested address. */
1292 if (GET_CODE (op
) == MEM
)
1294 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1296 if (! validate_address
)
1299 else if (reload_completed
)
1301 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1305 return replace_equiv_address (new, XEXP (new, 0));
1308 /* Rest can be handled by simplify_subreg. */
1309 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1312 /* Similar to `operand_subword', but never return 0. If we can't extract
1313 the required subword, put OP into a register and try again. If that fails,
1314 abort. We always validate the address in this case.
1316 MODE is the mode of OP, in case it is CONST_INT. */
1319 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1321 rtx result
= operand_subword (op
, offset
, 1, mode
);
1326 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1328 /* If this is a register which can not be accessed by words, copy it
1329 to a pseudo register. */
1330 if (GET_CODE (op
) == REG
)
1331 op
= copy_to_reg (op
);
1333 op
= force_reg (mode
, op
);
1336 result
= operand_subword (op
, offset
, 1, mode
);
1343 /* Given a compare instruction, swap the operands.
1344 A test instruction is changed into a compare of 0 against the operand. */
1347 reverse_comparison (rtx insn
)
1349 rtx body
= PATTERN (insn
);
1352 if (GET_CODE (body
) == SET
)
1353 comp
= SET_SRC (body
);
1355 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1357 if (GET_CODE (comp
) == COMPARE
)
1359 rtx op0
= XEXP (comp
, 0);
1360 rtx op1
= XEXP (comp
, 1);
1361 XEXP (comp
, 0) = op1
;
1362 XEXP (comp
, 1) = op0
;
1366 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1367 CONST0_RTX (GET_MODE (comp
)), comp
);
1368 if (GET_CODE (body
) == SET
)
1369 SET_SRC (body
) = new;
1371 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1375 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1376 or (2) a component ref of something variable. Represent the later with
1377 a NULL expression. */
1380 component_ref_for_mem_expr (tree ref
)
1382 tree inner
= TREE_OPERAND (ref
, 0);
1384 if (TREE_CODE (inner
) == COMPONENT_REF
)
1385 inner
= component_ref_for_mem_expr (inner
);
1388 tree placeholder_ptr
= 0;
1390 /* Now remove any conversions: they don't change what the underlying
1391 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1392 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1393 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1394 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1395 || TREE_CODE (inner
) == SAVE_EXPR
1396 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1397 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1398 inner
= find_placeholder (inner
, &placeholder_ptr
);
1400 inner
= TREE_OPERAND (inner
, 0);
1402 if (! DECL_P (inner
))
1406 if (inner
== TREE_OPERAND (ref
, 0))
1409 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1410 TREE_OPERAND (ref
, 1));
1413 /* Given REF, a MEM, and T, either the type of X or the expression
1414 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1415 if we are making a new object of this type. BITPOS is nonzero if
1416 there is an offset outstanding on T that will be applied later. */
1419 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1420 HOST_WIDE_INT bitpos
)
1422 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1423 tree expr
= MEM_EXPR (ref
);
1424 rtx offset
= MEM_OFFSET (ref
);
1425 rtx size
= MEM_SIZE (ref
);
1426 unsigned int align
= MEM_ALIGN (ref
);
1427 HOST_WIDE_INT apply_bitpos
= 0;
1430 /* It can happen that type_for_mode was given a mode for which there
1431 is no language-level type. In which case it returns NULL, which
1436 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1437 if (type
== error_mark_node
)
1440 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1441 wrong answer, as it assumes that DECL_RTL already has the right alias
1442 info. Callers should not set DECL_RTL until after the call to
1443 set_mem_attributes. */
1444 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1447 /* Get the alias set from the expression or type (perhaps using a
1448 front-end routine) and use it. */
1449 alias
= get_alias_set (t
);
1451 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1452 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1453 RTX_UNCHANGING_P (ref
)
1454 |= ((lang_hooks
.honor_readonly
1455 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1456 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1458 /* If we are making an object of this type, or if this is a DECL, we know
1459 that it is a scalar if the type is not an aggregate. */
1460 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1461 MEM_SCALAR_P (ref
) = 1;
1463 /* We can set the alignment from the type if we are making an object,
1464 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1465 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1466 align
= MAX (align
, TYPE_ALIGN (type
));
1468 /* If the size is known, we can set that. */
1469 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1470 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1472 /* If T is not a type, we may be able to deduce some more information about
1476 maybe_set_unchanging (ref
, t
);
1477 if (TREE_THIS_VOLATILE (t
))
1478 MEM_VOLATILE_P (ref
) = 1;
1480 /* Now remove any conversions: they don't change what the underlying
1481 object is. Likewise for SAVE_EXPR. */
1482 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1483 || TREE_CODE (t
) == NON_LVALUE_EXPR
1484 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1485 || TREE_CODE (t
) == SAVE_EXPR
)
1486 t
= TREE_OPERAND (t
, 0);
1488 /* If this expression can't be addressed (e.g., it contains a reference
1489 to a non-addressable field), show we don't change its alias set. */
1490 if (! can_address_p (t
))
1491 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1493 /* If this is a decl, set the attributes of the MEM from it. */
1497 offset
= const0_rtx
;
1498 apply_bitpos
= bitpos
;
1499 size
= (DECL_SIZE_UNIT (t
)
1500 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1501 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1502 align
= DECL_ALIGN (t
);
1505 /* If this is a constant, we know the alignment. */
1506 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1508 align
= TYPE_ALIGN (type
);
1509 #ifdef CONSTANT_ALIGNMENT
1510 align
= CONSTANT_ALIGNMENT (t
, align
);
1514 /* If this is a field reference and not a bit-field, record it. */
1515 /* ??? There is some information that can be gleened from bit-fields,
1516 such as the word offset in the structure that might be modified.
1517 But skip it for now. */
1518 else if (TREE_CODE (t
) == COMPONENT_REF
1519 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1521 expr
= component_ref_for_mem_expr (t
);
1522 offset
= const0_rtx
;
1523 apply_bitpos
= bitpos
;
1524 /* ??? Any reason the field size would be different than
1525 the size we got from the type? */
1528 /* If this is an array reference, look for an outer field reference. */
1529 else if (TREE_CODE (t
) == ARRAY_REF
)
1531 tree off_tree
= size_zero_node
;
1532 /* We can't modify t, because we use it at the end of the
1538 tree index
= TREE_OPERAND (t2
, 1);
1539 tree array
= TREE_OPERAND (t2
, 0);
1540 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1541 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1542 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1544 /* We assume all arrays have sizes that are a multiple of a byte.
1545 First subtract the lower bound, if any, in the type of the
1546 index, then convert to sizetype and multiply by the size of the
1548 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1549 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1552 /* If the index has a self-referential type, pass it to a
1553 WITH_RECORD_EXPR; if the component size is, pass our
1554 component to one. */
1555 if (CONTAINS_PLACEHOLDER_P (index
))
1556 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t2
);
1557 if (CONTAINS_PLACEHOLDER_P (unit_size
))
1558 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1562 = fold (build (PLUS_EXPR
, sizetype
,
1563 fold (build (MULT_EXPR
, sizetype
,
1567 t2
= TREE_OPERAND (t2
, 0);
1569 while (TREE_CODE (t2
) == ARRAY_REF
);
1575 if (host_integerp (off_tree
, 1))
1577 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1578 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1579 align
= DECL_ALIGN (t2
);
1580 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1582 offset
= GEN_INT (ioff
);
1583 apply_bitpos
= bitpos
;
1586 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1588 expr
= component_ref_for_mem_expr (t2
);
1589 if (host_integerp (off_tree
, 1))
1591 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1592 apply_bitpos
= bitpos
;
1594 /* ??? Any reason the field size would be different than
1595 the size we got from the type? */
1597 else if (flag_argument_noalias
> 1
1598 && TREE_CODE (t2
) == INDIRECT_REF
1599 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1606 /* If this is a Fortran indirect argument reference, record the
1608 else if (flag_argument_noalias
> 1
1609 && TREE_CODE (t
) == INDIRECT_REF
1610 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1617 /* If we modified OFFSET based on T, then subtract the outstanding
1618 bit position offset. Similarly, increase the size of the accessed
1619 object to contain the negative offset. */
1622 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1624 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1627 /* Now set the attributes we computed above. */
1629 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1631 /* If this is already known to be a scalar or aggregate, we are done. */
1632 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1635 /* If it is a reference into an aggregate, this is part of an aggregate.
1636 Otherwise we don't know. */
1637 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1638 || TREE_CODE (t
) == ARRAY_RANGE_REF
1639 || TREE_CODE (t
) == BIT_FIELD_REF
)
1640 MEM_IN_STRUCT_P (ref
) = 1;
1644 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1646 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1649 /* Set the decl for MEM to DECL. */
1652 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1655 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1656 GEN_INT (REG_OFFSET (reg
)),
1657 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1660 /* Set the alias set of MEM to SET. */
1663 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1665 #ifdef ENABLE_CHECKING
1666 /* If the new and old alias sets don't conflict, something is wrong. */
1667 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1671 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1672 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1676 /* Set the alignment of MEM to ALIGN bits. */
1679 set_mem_align (rtx mem
, unsigned int align
)
1681 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1682 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1686 /* Set the expr for MEM to EXPR. */
1689 set_mem_expr (rtx mem
, tree expr
)
1692 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1693 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1696 /* Set the offset of MEM to OFFSET. */
1699 set_mem_offset (rtx mem
, rtx offset
)
1701 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1702 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1706 /* Set the size of MEM to SIZE. */
1709 set_mem_size (rtx mem
, rtx size
)
1711 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1712 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1716 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1717 and its address changed to ADDR. (VOIDmode means don't change the mode.
1718 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1719 returned memory location is required to be valid. The memory
1720 attributes are not changed. */
1723 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1727 if (GET_CODE (memref
) != MEM
)
1729 if (mode
== VOIDmode
)
1730 mode
= GET_MODE (memref
);
1732 addr
= XEXP (memref
, 0);
1733 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1734 && (!validate
|| memory_address_p (mode
, addr
)))
1739 if (reload_in_progress
|| reload_completed
)
1741 if (! memory_address_p (mode
, addr
))
1745 addr
= memory_address (mode
, addr
);
1748 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1751 new = gen_rtx_MEM (mode
, addr
);
1752 MEM_COPY_ATTRIBUTES (new, memref
);
1756 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1757 way we are changing MEMREF, so we only preserve the alias set. */
1760 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1762 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1763 enum machine_mode mmode
= GET_MODE (new);
1766 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1767 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1769 /* If there are no changes, just return the original memory reference. */
1772 if (MEM_ATTRS (memref
) == 0
1773 || (MEM_EXPR (memref
) == NULL
1774 && MEM_OFFSET (memref
) == NULL
1775 && MEM_SIZE (memref
) == size
1776 && MEM_ALIGN (memref
) == align
))
1779 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1780 MEM_COPY_ATTRIBUTES (new, memref
);
1784 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1789 /* Return a memory reference like MEMREF, but with its mode changed
1790 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1791 nonzero, the memory address is forced to be valid.
1792 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1793 and caller is responsible for adjusting MEMREF base register. */
1796 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1797 int validate
, int adjust
)
1799 rtx addr
= XEXP (memref
, 0);
1801 rtx memoffset
= MEM_OFFSET (memref
);
1803 unsigned int memalign
= MEM_ALIGN (memref
);
1805 /* If there are no changes, just return the original memory reference. */
1806 if (mode
== GET_MODE (memref
) && !offset
1807 && (!validate
|| memory_address_p (mode
, addr
)))
1810 /* ??? Prefer to create garbage instead of creating shared rtl.
1811 This may happen even if offset is nonzero -- consider
1812 (plus (plus reg reg) const_int) -- so do this always. */
1813 addr
= copy_rtx (addr
);
1817 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1818 object, we can merge it into the LO_SUM. */
1819 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1821 && (unsigned HOST_WIDE_INT
) offset
1822 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1823 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1824 plus_constant (XEXP (addr
, 1), offset
));
1826 addr
= plus_constant (addr
, offset
);
1829 new = change_address_1 (memref
, mode
, addr
, validate
);
1831 /* Compute the new values of the memory attributes due to this adjustment.
1832 We add the offsets and update the alignment. */
1834 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1836 /* Compute the new alignment by taking the MIN of the alignment and the
1837 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1842 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1844 /* We can compute the size in a number of ways. */
1845 if (GET_MODE (new) != BLKmode
)
1846 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1847 else if (MEM_SIZE (memref
))
1848 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1850 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1851 memoffset
, size
, memalign
, GET_MODE (new));
1853 /* At some point, we should validate that this offset is within the object,
1854 if all the appropriate values are known. */
1858 /* Return a memory reference like MEMREF, but with its mode changed
1859 to MODE and its address changed to ADDR, which is assumed to be
1860 MEMREF offseted by OFFSET bytes. If VALIDATE is
1861 nonzero, the memory address is forced to be valid. */
1864 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1865 HOST_WIDE_INT offset
, int validate
)
1867 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1868 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1871 /* Return a memory reference like MEMREF, but whose address is changed by
1872 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1873 known to be in OFFSET (possibly 1). */
1876 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1878 rtx
new, addr
= XEXP (memref
, 0);
1880 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1882 /* At this point we don't know _why_ the address is invalid. It
1883 could have secondary memory references, multiplies or anything.
1885 However, if we did go and rearrange things, we can wind up not
1886 being able to recognize the magic around pic_offset_table_rtx.
1887 This stuff is fragile, and is yet another example of why it is
1888 bad to expose PIC machinery too early. */
1889 if (! memory_address_p (GET_MODE (memref
), new)
1890 && GET_CODE (addr
) == PLUS
1891 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1893 addr
= force_reg (GET_MODE (addr
), addr
);
1894 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1897 update_temp_slot_address (XEXP (memref
, 0), new);
1898 new = change_address_1 (memref
, VOIDmode
, new, 1);
1900 /* If there are no changes, just return the original memory reference. */
1904 /* Update the alignment to reflect the offset. Reset the offset, which
1907 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1908 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
1913 /* Return a memory reference like MEMREF, but with its address changed to
1914 ADDR. The caller is asserting that the actual piece of memory pointed
1915 to is the same, just the form of the address is being changed, such as
1916 by putting something into a register. */
1919 replace_equiv_address (rtx memref
, rtx addr
)
1921 /* change_address_1 copies the memory attribute structure without change
1922 and that's exactly what we want here. */
1923 update_temp_slot_address (XEXP (memref
, 0), addr
);
1924 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1927 /* Likewise, but the reference is not required to be valid. */
1930 replace_equiv_address_nv (rtx memref
, rtx addr
)
1932 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1935 /* Return a memory reference like MEMREF, but with its mode widened to
1936 MODE and offset by OFFSET. This would be used by targets that e.g.
1937 cannot issue QImode memory operations and have to use SImode memory
1938 operations plus masking logic. */
1941 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
1943 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
1944 tree expr
= MEM_EXPR (new);
1945 rtx memoffset
= MEM_OFFSET (new);
1946 unsigned int size
= GET_MODE_SIZE (mode
);
1948 /* If there are no changes, just return the original memory reference. */
1952 /* If we don't know what offset we were at within the expression, then
1953 we can't know if we've overstepped the bounds. */
1959 if (TREE_CODE (expr
) == COMPONENT_REF
)
1961 tree field
= TREE_OPERAND (expr
, 1);
1963 if (! DECL_SIZE_UNIT (field
))
1969 /* Is the field at least as large as the access? If so, ok,
1970 otherwise strip back to the containing structure. */
1971 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
1972 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
1973 && INTVAL (memoffset
) >= 0)
1976 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
1982 expr
= TREE_OPERAND (expr
, 0);
1983 memoffset
= (GEN_INT (INTVAL (memoffset
)
1984 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
1985 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
1988 /* Similarly for the decl. */
1989 else if (DECL_P (expr
)
1990 && DECL_SIZE_UNIT (expr
)
1991 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
1992 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
1993 && (! memoffset
|| INTVAL (memoffset
) >= 0))
1997 /* The widened memory access overflows the expression, which means
1998 that it could alias another expression. Zap it. */
2005 memoffset
= NULL_RTX
;
2007 /* The widened memory may alias other stuff, so zap the alias set. */
2008 /* ??? Maybe use get_alias_set on any remaining expression. */
2010 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2011 MEM_ALIGN (new), mode
);
2016 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2019 gen_label_rtx (void)
2021 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2022 NULL
, label_num
++, NULL
);
2025 /* For procedure integration. */
2027 /* Install new pointers to the first and last insns in the chain.
2028 Also, set cur_insn_uid to one higher than the last in use.
2029 Used for an inline-procedure after copying the insn chain. */
2032 set_new_first_and_last_insn (rtx first
, rtx last
)
2040 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2041 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2046 /* Set the last label number found in the current function.
2047 This is used when belatedly compiling an inline function. */
2050 set_new_last_label_num (int last
)
2052 base_label_num
= label_num
;
2053 last_label_num
= last
;
2056 /* Restore all variables describing the current status from the structure *P.
2057 This is used after a nested function. */
2060 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2065 /* Go through all the RTL insn bodies and copy any invalid shared
2066 structure. This routine should only be called once. */
2069 unshare_all_rtl (tree fndecl
, rtx insn
)
2073 /* Make sure that virtual parameters are not shared. */
2074 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2075 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2077 /* Make sure that virtual stack slots are not shared. */
2078 unshare_all_decls (DECL_INITIAL (fndecl
));
2080 /* Unshare just about everything else. */
2081 unshare_all_rtl_in_chain (insn
);
2083 /* Make sure the addresses of stack slots found outside the insn chain
2084 (such as, in DECL_RTL of a variable) are not shared
2085 with the insn chain.
2087 This special care is necessary when the stack slot MEM does not
2088 actually appear in the insn chain. If it does appear, its address
2089 is unshared from all else at that point. */
2090 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2093 /* Go through all the RTL insn bodies and copy any invalid shared
2094 structure, again. This is a fairly expensive thing to do so it
2095 should be done sparingly. */
2098 unshare_all_rtl_again (rtx insn
)
2103 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2106 reset_used_flags (PATTERN (p
));
2107 reset_used_flags (REG_NOTES (p
));
2108 reset_used_flags (LOG_LINKS (p
));
2111 /* Make sure that virtual stack slots are not shared. */
2112 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2114 /* Make sure that virtual parameters are not shared. */
2115 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2116 reset_used_flags (DECL_RTL (decl
));
2118 reset_used_flags (stack_slot_list
);
2120 unshare_all_rtl (cfun
->decl
, insn
);
2123 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2124 Recursively does the same for subexpressions. */
2127 verify_rtx_sharing (rtx orig
, rtx insn
)
2132 const char *format_ptr
;
2137 code
= GET_CODE (x
);
2139 /* These types may be freely shared. */
2155 /* SCRATCH must be shared because they represent distinct values. */
2157 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2162 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2163 a LABEL_REF, it isn't sharable. */
2164 if (GET_CODE (XEXP (x
, 0)) == PLUS
2165 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2166 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2171 /* A MEM is allowed to be shared if its address is constant. */
2172 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2173 || reload_completed
|| reload_in_progress
)
2182 /* This rtx may not be shared. If it has already been seen,
2183 replace it with a copy of itself. */
2185 if (RTX_FLAG (x
, used
))
2187 error ("Invalid rtl sharing found in the insn");
2189 error ("Shared rtx");
2193 RTX_FLAG (x
, used
) = 1;
2195 /* Now scan the subexpressions recursively. */
2197 format_ptr
= GET_RTX_FORMAT (code
);
2199 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2201 switch (*format_ptr
++)
2204 verify_rtx_sharing (XEXP (x
, i
), insn
);
2208 if (XVEC (x
, i
) != NULL
)
2211 int len
= XVECLEN (x
, i
);
2213 for (j
= 0; j
< len
; j
++)
2215 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2216 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2217 && GET_CODE (SET_SRC (XVECEXP (x
, i
, j
))) == ASM_OPERANDS
)
2218 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2220 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2229 /* Go through all the RTL insn bodies and check that there is no unexpected
2230 sharing in between the subexpressions. */
2233 verify_rtl_sharing (void)
2237 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2240 reset_used_flags (PATTERN (p
));
2241 reset_used_flags (REG_NOTES (p
));
2242 reset_used_flags (LOG_LINKS (p
));
2245 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2248 verify_rtx_sharing (PATTERN (p
), p
);
2249 verify_rtx_sharing (REG_NOTES (p
), p
);
2250 verify_rtx_sharing (LOG_LINKS (p
), p
);
2254 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2255 Assumes the mark bits are cleared at entry. */
2258 unshare_all_rtl_in_chain (rtx insn
)
2260 for (; insn
; insn
= NEXT_INSN (insn
))
2263 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2264 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2265 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2269 /* Go through all virtual stack slots of a function and copy any
2270 shared structure. */
2272 unshare_all_decls (tree blk
)
2276 /* Copy shared decls. */
2277 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2278 if (DECL_RTL_SET_P (t
))
2279 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2281 /* Now process sub-blocks. */
2282 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2283 unshare_all_decls (t
);
2286 /* Go through all virtual stack slots of a function and mark them as
2289 reset_used_decls (tree blk
)
2294 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2295 if (DECL_RTL_SET_P (t
))
2296 reset_used_flags (DECL_RTL (t
));
2298 /* Now process sub-blocks. */
2299 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2300 reset_used_decls (t
);
2303 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2304 placed in the result directly, rather than being copied. MAY_SHARE is
2305 either a MEM of an EXPR_LIST of MEMs. */
2308 copy_most_rtx (rtx orig
, rtx may_share
)
2313 const char *format_ptr
;
2315 if (orig
== may_share
2316 || (GET_CODE (may_share
) == EXPR_LIST
2317 && in_expr_list_p (may_share
, orig
)))
2320 code
= GET_CODE (orig
);
2338 copy
= rtx_alloc (code
);
2339 PUT_MODE (copy
, GET_MODE (orig
));
2340 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2341 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2342 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2343 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2344 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2346 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2348 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2350 switch (*format_ptr
++)
2353 XEXP (copy
, i
) = XEXP (orig
, i
);
2354 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2355 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2359 XEXP (copy
, i
) = XEXP (orig
, i
);
2364 XVEC (copy
, i
) = XVEC (orig
, i
);
2365 if (XVEC (orig
, i
) != NULL
)
2367 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2368 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2369 XVECEXP (copy
, i
, j
)
2370 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2375 XWINT (copy
, i
) = XWINT (orig
, i
);
2380 XINT (copy
, i
) = XINT (orig
, i
);
2384 XTREE (copy
, i
) = XTREE (orig
, i
);
2389 XSTR (copy
, i
) = XSTR (orig
, i
);
2393 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2403 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2404 Recursively does the same for subexpressions. Uses
2405 copy_rtx_if_shared_1 to reduce stack space. */
2408 copy_rtx_if_shared (rtx orig
)
2410 copy_rtx_if_shared_1 (&orig
);
2414 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2415 use. Recursively does the same for subexpressions. */
2418 copy_rtx_if_shared_1 (rtx
*orig1
)
2424 const char *format_ptr
;
2428 /* Repeat is used to turn tail-recursion into iteration. */
2435 code
= GET_CODE (x
);
2437 /* These types may be freely shared. */
2452 /* SCRATCH must be shared because they represent distinct values. */
2455 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2460 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2461 a LABEL_REF, it isn't sharable. */
2462 if (GET_CODE (XEXP (x
, 0)) == PLUS
2463 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2464 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2473 /* The chain of insns is not being copied. */
2480 /* This rtx may not be shared. If it has already been seen,
2481 replace it with a copy of itself. */
2483 if (RTX_FLAG (x
, used
))
2487 copy
= rtx_alloc (code
);
2488 memcpy (copy
, x
, RTX_SIZE (code
));
2492 RTX_FLAG (x
, used
) = 1;
2494 /* Now scan the subexpressions recursively.
2495 We can store any replaced subexpressions directly into X
2496 since we know X is not shared! Any vectors in X
2497 must be copied if X was copied. */
2499 format_ptr
= GET_RTX_FORMAT (code
);
2500 length
= GET_RTX_LENGTH (code
);
2503 for (i
= 0; i
< length
; i
++)
2505 switch (*format_ptr
++)
2509 copy_rtx_if_shared_1 (last_ptr
);
2510 last_ptr
= &XEXP (x
, i
);
2514 if (XVEC (x
, i
) != NULL
)
2517 int len
= XVECLEN (x
, i
);
2519 /* Copy the vector iff I copied the rtx and the length
2521 if (copied
&& len
> 0)
2522 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2524 /* Call recursively on all inside the vector. */
2525 for (j
= 0; j
< len
; j
++)
2528 copy_rtx_if_shared_1 (last_ptr
);
2529 last_ptr
= &XVECEXP (x
, i
, j
);
2544 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2545 to look for shared sub-parts. */
2548 reset_used_flags (rtx x
)
2552 const char *format_ptr
;
2555 /* Repeat is used to turn tail-recursion into iteration. */
2560 code
= GET_CODE (x
);
2562 /* These types may be freely shared so we needn't do any resetting
2584 /* The chain of insns is not being copied. */
2591 RTX_FLAG (x
, used
) = 0;
2593 format_ptr
= GET_RTX_FORMAT (code
);
2594 length
= GET_RTX_LENGTH (code
);
2596 for (i
= 0; i
< length
; i
++)
2598 switch (*format_ptr
++)
2606 reset_used_flags (XEXP (x
, i
));
2610 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2611 reset_used_flags (XVECEXP (x
, i
, j
));
2617 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2618 to look for shared sub-parts. */
2621 set_used_flags (rtx x
)
2625 const char *format_ptr
;
2630 code
= GET_CODE (x
);
2632 /* These types may be freely shared so we needn't do any resetting
2654 /* The chain of insns is not being copied. */
2661 RTX_FLAG (x
, used
) = 1;
2663 format_ptr
= GET_RTX_FORMAT (code
);
2664 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2666 switch (*format_ptr
++)
2669 set_used_flags (XEXP (x
, i
));
2673 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2674 set_used_flags (XVECEXP (x
, i
, j
));
2680 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2681 Return X or the rtx for the pseudo reg the value of X was copied into.
2682 OTHER must be valid as a SET_DEST. */
2685 make_safe_from (rtx x
, rtx other
)
2688 switch (GET_CODE (other
))
2691 other
= SUBREG_REG (other
);
2693 case STRICT_LOW_PART
:
2696 other
= XEXP (other
, 0);
2702 if ((GET_CODE (other
) == MEM
2704 && GET_CODE (x
) != REG
2705 && GET_CODE (x
) != SUBREG
)
2706 || (GET_CODE (other
) == REG
2707 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2708 || reg_mentioned_p (other
, x
))))
2710 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2711 emit_move_insn (temp
, x
);
2717 /* Emission of insns (adding them to the doubly-linked list). */
2719 /* Return the first insn of the current sequence or current function. */
2727 /* Specify a new insn as the first in the chain. */
2730 set_first_insn (rtx insn
)
2732 if (PREV_INSN (insn
) != 0)
2737 /* Return the last insn emitted in current sequence or current function. */
2740 get_last_insn (void)
2745 /* Specify a new insn as the last in the chain. */
2748 set_last_insn (rtx insn
)
2750 if (NEXT_INSN (insn
) != 0)
2755 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2758 get_last_insn_anywhere (void)
2760 struct sequence_stack
*stack
;
2763 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2764 if (stack
->last
!= 0)
2769 /* Return the first nonnote insn emitted in current sequence or current
2770 function. This routine looks inside SEQUENCEs. */
2773 get_first_nonnote_insn (void)
2775 rtx insn
= first_insn
;
2779 insn
= next_insn (insn
);
2780 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2787 /* Return the last nonnote insn emitted in current sequence or current
2788 function. This routine looks inside SEQUENCEs. */
2791 get_last_nonnote_insn (void)
2793 rtx insn
= last_insn
;
2797 insn
= previous_insn (insn
);
2798 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2805 /* Return a number larger than any instruction's uid in this function. */
2810 return cur_insn_uid
;
2813 /* Renumber instructions so that no instruction UIDs are wasted. */
2816 renumber_insns (FILE *stream
)
2820 /* If we're not supposed to renumber instructions, don't. */
2821 if (!flag_renumber_insns
)
2824 /* If there aren't that many instructions, then it's not really
2825 worth renumbering them. */
2826 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2831 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2834 fprintf (stream
, "Renumbering insn %d to %d\n",
2835 INSN_UID (insn
), cur_insn_uid
);
2836 INSN_UID (insn
) = cur_insn_uid
++;
2840 /* Return the next insn. If it is a SEQUENCE, return the first insn
2844 next_insn (rtx insn
)
2848 insn
= NEXT_INSN (insn
);
2849 if (insn
&& GET_CODE (insn
) == INSN
2850 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2851 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2857 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2861 previous_insn (rtx insn
)
2865 insn
= PREV_INSN (insn
);
2866 if (insn
&& GET_CODE (insn
) == INSN
2867 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2868 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2874 /* Return the next insn after INSN that is not a NOTE. This routine does not
2875 look inside SEQUENCEs. */
2878 next_nonnote_insn (rtx insn
)
2882 insn
= NEXT_INSN (insn
);
2883 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2890 /* Return the previous insn before INSN that is not a NOTE. This routine does
2891 not look inside SEQUENCEs. */
2894 prev_nonnote_insn (rtx insn
)
2898 insn
= PREV_INSN (insn
);
2899 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2906 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2907 or 0, if there is none. This routine does not look inside
2911 next_real_insn (rtx insn
)
2915 insn
= NEXT_INSN (insn
);
2916 if (insn
== 0 || GET_CODE (insn
) == INSN
2917 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2924 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2925 or 0, if there is none. This routine does not look inside
2929 prev_real_insn (rtx insn
)
2933 insn
= PREV_INSN (insn
);
2934 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2935 || GET_CODE (insn
) == JUMP_INSN
)
2942 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2943 This routine does not look inside SEQUENCEs. */
2946 last_call_insn (void)
2950 for (insn
= get_last_insn ();
2951 insn
&& GET_CODE (insn
) != CALL_INSN
;
2952 insn
= PREV_INSN (insn
))
2958 /* Find the next insn after INSN that really does something. This routine
2959 does not look inside SEQUENCEs. Until reload has completed, this is the
2960 same as next_real_insn. */
2963 active_insn_p (rtx insn
)
2965 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2966 || (GET_CODE (insn
) == INSN
2967 && (! reload_completed
2968 || (GET_CODE (PATTERN (insn
)) != USE
2969 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2973 next_active_insn (rtx insn
)
2977 insn
= NEXT_INSN (insn
);
2978 if (insn
== 0 || active_insn_p (insn
))
2985 /* Find the last insn before INSN that really does something. This routine
2986 does not look inside SEQUENCEs. Until reload has completed, this is the
2987 same as prev_real_insn. */
2990 prev_active_insn (rtx insn
)
2994 insn
= PREV_INSN (insn
);
2995 if (insn
== 0 || active_insn_p (insn
))
3002 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3005 next_label (rtx insn
)
3009 insn
= NEXT_INSN (insn
);
3010 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3017 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3020 prev_label (rtx insn
)
3024 insn
= PREV_INSN (insn
);
3025 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3033 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3034 and REG_CC_USER notes so we can find it. */
3037 link_cc0_insns (rtx insn
)
3039 rtx user
= next_nonnote_insn (insn
);
3041 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3042 user
= XVECEXP (PATTERN (user
), 0, 0);
3044 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3046 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3049 /* Return the next insn that uses CC0 after INSN, which is assumed to
3050 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3051 applied to the result of this function should yield INSN).
3053 Normally, this is simply the next insn. However, if a REG_CC_USER note
3054 is present, it contains the insn that uses CC0.
3056 Return 0 if we can't find the insn. */
3059 next_cc0_user (rtx insn
)
3061 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3064 return XEXP (note
, 0);
3066 insn
= next_nonnote_insn (insn
);
3067 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3068 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3070 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3076 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3077 note, it is the previous insn. */
3080 prev_cc0_setter (rtx insn
)
3082 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3085 return XEXP (note
, 0);
3087 insn
= prev_nonnote_insn (insn
);
3088 if (! sets_cc0_p (PATTERN (insn
)))
3095 /* Increment the label uses for all labels present in rtx. */
3098 mark_label_nuses (rtx x
)
3104 code
= GET_CODE (x
);
3105 if (code
== LABEL_REF
)
3106 LABEL_NUSES (XEXP (x
, 0))++;
3108 fmt
= GET_RTX_FORMAT (code
);
3109 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3112 mark_label_nuses (XEXP (x
, i
));
3113 else if (fmt
[i
] == 'E')
3114 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3115 mark_label_nuses (XVECEXP (x
, i
, j
));
3120 /* Try splitting insns that can be split for better scheduling.
3121 PAT is the pattern which might split.
3122 TRIAL is the insn providing PAT.
3123 LAST is nonzero if we should return the last insn of the sequence produced.
3125 If this routine succeeds in splitting, it returns the first or last
3126 replacement insn depending on the value of LAST. Otherwise, it
3127 returns TRIAL. If the insn to be returned can be split, it will be. */
3130 try_split (rtx pat
, rtx trial
, int last
)
3132 rtx before
= PREV_INSN (trial
);
3133 rtx after
= NEXT_INSN (trial
);
3134 int has_barrier
= 0;
3138 rtx insn_last
, insn
;
3141 if (any_condjump_p (trial
)
3142 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3143 split_branch_probability
= INTVAL (XEXP (note
, 0));
3144 probability
= split_branch_probability
;
3146 seq
= split_insns (pat
, trial
);
3148 split_branch_probability
= -1;
3150 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3151 We may need to handle this specially. */
3152 if (after
&& GET_CODE (after
) == BARRIER
)
3155 after
= NEXT_INSN (after
);
3161 /* Avoid infinite loop if any insn of the result matches
3162 the original pattern. */
3166 if (INSN_P (insn_last
)
3167 && rtx_equal_p (PATTERN (insn_last
), pat
))
3169 if (!NEXT_INSN (insn_last
))
3171 insn_last
= NEXT_INSN (insn_last
);
3175 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3177 if (GET_CODE (insn
) == JUMP_INSN
)
3179 mark_jump_label (PATTERN (insn
), insn
, 0);
3181 if (probability
!= -1
3182 && any_condjump_p (insn
)
3183 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3185 /* We can preserve the REG_BR_PROB notes only if exactly
3186 one jump is created, otherwise the machine description
3187 is responsible for this step using
3188 split_branch_probability variable. */
3192 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3193 GEN_INT (probability
),
3199 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3200 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3201 if (GET_CODE (trial
) == CALL_INSN
)
3203 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3204 if (GET_CODE (insn
) == CALL_INSN
)
3206 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3209 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3210 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3214 /* Copy notes, particularly those related to the CFG. */
3215 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3217 switch (REG_NOTE_KIND (note
))
3221 while (insn
!= NULL_RTX
)
3223 if (GET_CODE (insn
) == CALL_INSN
3224 || (flag_non_call_exceptions
3225 && may_trap_p (PATTERN (insn
))))
3227 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3230 insn
= PREV_INSN (insn
);
3236 case REG_ALWAYS_RETURN
:
3238 while (insn
!= NULL_RTX
)
3240 if (GET_CODE (insn
) == CALL_INSN
)
3242 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3245 insn
= PREV_INSN (insn
);
3249 case REG_NON_LOCAL_GOTO
:
3251 while (insn
!= NULL_RTX
)
3253 if (GET_CODE (insn
) == JUMP_INSN
)
3255 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3258 insn
= PREV_INSN (insn
);
3267 /* If there are LABELS inside the split insns increment the
3268 usage count so we don't delete the label. */
3269 if (GET_CODE (trial
) == INSN
)
3272 while (insn
!= NULL_RTX
)
3274 if (GET_CODE (insn
) == INSN
)
3275 mark_label_nuses (PATTERN (insn
));
3277 insn
= PREV_INSN (insn
);
3281 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3283 delete_insn (trial
);
3285 emit_barrier_after (tem
);
3287 /* Recursively call try_split for each new insn created; by the
3288 time control returns here that insn will be fully split, so
3289 set LAST and continue from the insn after the one returned.
3290 We can't use next_active_insn here since AFTER may be a note.
3291 Ignore deleted insns, which can be occur if not optimizing. */
3292 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3293 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3294 tem
= try_split (PATTERN (tem
), tem
, 1);
3296 /* Return either the first or the last insn, depending on which was
3299 ? (after
? PREV_INSN (after
) : last_insn
)
3300 : NEXT_INSN (before
);
3303 /* Make and return an INSN rtx, initializing all its slots.
3304 Store PATTERN in the pattern slots. */
3307 make_insn_raw (rtx pattern
)
3311 insn
= rtx_alloc (INSN
);
3313 INSN_UID (insn
) = cur_insn_uid
++;
3314 PATTERN (insn
) = pattern
;
3315 INSN_CODE (insn
) = -1;
3316 LOG_LINKS (insn
) = NULL
;
3317 REG_NOTES (insn
) = NULL
;
3318 INSN_LOCATOR (insn
) = 0;
3319 BLOCK_FOR_INSN (insn
) = NULL
;
3321 #ifdef ENABLE_RTL_CHECKING
3324 && (returnjump_p (insn
)
3325 || (GET_CODE (insn
) == SET
3326 && SET_DEST (insn
) == pc_rtx
)))
3328 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3336 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3339 make_jump_insn_raw (rtx pattern
)
3343 insn
= rtx_alloc (JUMP_INSN
);
3344 INSN_UID (insn
) = cur_insn_uid
++;
3346 PATTERN (insn
) = pattern
;
3347 INSN_CODE (insn
) = -1;
3348 LOG_LINKS (insn
) = NULL
;
3349 REG_NOTES (insn
) = NULL
;
3350 JUMP_LABEL (insn
) = NULL
;
3351 INSN_LOCATOR (insn
) = 0;
3352 BLOCK_FOR_INSN (insn
) = NULL
;
3357 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3360 make_call_insn_raw (rtx pattern
)
3364 insn
= rtx_alloc (CALL_INSN
);
3365 INSN_UID (insn
) = cur_insn_uid
++;
3367 PATTERN (insn
) = pattern
;
3368 INSN_CODE (insn
) = -1;
3369 LOG_LINKS (insn
) = NULL
;
3370 REG_NOTES (insn
) = NULL
;
3371 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3372 INSN_LOCATOR (insn
) = 0;
3373 BLOCK_FOR_INSN (insn
) = NULL
;
3378 /* Add INSN to the end of the doubly-linked list.
3379 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3384 PREV_INSN (insn
) = last_insn
;
3385 NEXT_INSN (insn
) = 0;
3387 if (NULL
!= last_insn
)
3388 NEXT_INSN (last_insn
) = insn
;
3390 if (NULL
== first_insn
)
3396 /* Add INSN into the doubly-linked list after insn AFTER. This and
3397 the next should be the only functions called to insert an insn once
3398 delay slots have been filled since only they know how to update a
3402 add_insn_after (rtx insn
, rtx after
)
3404 rtx next
= NEXT_INSN (after
);
3407 if (optimize
&& INSN_DELETED_P (after
))
3410 NEXT_INSN (insn
) = next
;
3411 PREV_INSN (insn
) = after
;
3415 PREV_INSN (next
) = insn
;
3416 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3417 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3419 else if (last_insn
== after
)
3423 struct sequence_stack
*stack
= seq_stack
;
3424 /* Scan all pending sequences too. */
3425 for (; stack
; stack
= stack
->next
)
3426 if (after
== stack
->last
)
3436 if (GET_CODE (after
) != BARRIER
3437 && GET_CODE (insn
) != BARRIER
3438 && (bb
= BLOCK_FOR_INSN (after
)))
3440 set_block_for_insn (insn
, bb
);
3442 bb
->flags
|= BB_DIRTY
;
3443 /* Should not happen as first in the BB is always
3444 either NOTE or LABEL. */
3445 if (BB_END (bb
) == after
3446 /* Avoid clobbering of structure when creating new BB. */
3447 && GET_CODE (insn
) != BARRIER
3448 && (GET_CODE (insn
) != NOTE
3449 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3453 NEXT_INSN (after
) = insn
;
3454 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3456 rtx sequence
= PATTERN (after
);
3457 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3461 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3462 the previous should be the only functions called to insert an insn once
3463 delay slots have been filled since only they know how to update a
3467 add_insn_before (rtx insn
, rtx before
)
3469 rtx prev
= PREV_INSN (before
);
3472 if (optimize
&& INSN_DELETED_P (before
))
3475 PREV_INSN (insn
) = prev
;
3476 NEXT_INSN (insn
) = before
;
3480 NEXT_INSN (prev
) = insn
;
3481 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3483 rtx sequence
= PATTERN (prev
);
3484 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3487 else if (first_insn
== before
)
3491 struct sequence_stack
*stack
= seq_stack
;
3492 /* Scan all pending sequences too. */
3493 for (; stack
; stack
= stack
->next
)
3494 if (before
== stack
->first
)
3496 stack
->first
= insn
;
3504 if (GET_CODE (before
) != BARRIER
3505 && GET_CODE (insn
) != BARRIER
3506 && (bb
= BLOCK_FOR_INSN (before
)))
3508 set_block_for_insn (insn
, bb
);
3510 bb
->flags
|= BB_DIRTY
;
3511 /* Should not happen as first in the BB is always
3512 either NOTE or LABEl. */
3513 if (BB_HEAD (bb
) == insn
3514 /* Avoid clobbering of structure when creating new BB. */
3515 && GET_CODE (insn
) != BARRIER
3516 && (GET_CODE (insn
) != NOTE
3517 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3521 PREV_INSN (before
) = insn
;
3522 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3523 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3526 /* Remove an insn from its doubly-linked list. This function knows how
3527 to handle sequences. */
3529 remove_insn (rtx insn
)
3531 rtx next
= NEXT_INSN (insn
);
3532 rtx prev
= PREV_INSN (insn
);
3537 NEXT_INSN (prev
) = next
;
3538 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3540 rtx sequence
= PATTERN (prev
);
3541 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3544 else if (first_insn
== insn
)
3548 struct sequence_stack
*stack
= seq_stack
;
3549 /* Scan all pending sequences too. */
3550 for (; stack
; stack
= stack
->next
)
3551 if (insn
== stack
->first
)
3553 stack
->first
= next
;
3563 PREV_INSN (next
) = prev
;
3564 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3565 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3567 else if (last_insn
== insn
)
3571 struct sequence_stack
*stack
= seq_stack
;
3572 /* Scan all pending sequences too. */
3573 for (; stack
; stack
= stack
->next
)
3574 if (insn
== stack
->last
)
3583 if (GET_CODE (insn
) != BARRIER
3584 && (bb
= BLOCK_FOR_INSN (insn
)))
3587 bb
->flags
|= BB_DIRTY
;
3588 if (BB_HEAD (bb
) == insn
)
3590 /* Never ever delete the basic block note without deleting whole
3592 if (GET_CODE (insn
) == NOTE
)
3594 BB_HEAD (bb
) = next
;
3596 if (BB_END (bb
) == insn
)
3601 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3604 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3606 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3609 /* Put the register usage information on the CALL. If there is already
3610 some usage information, put ours at the end. */
3611 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3615 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3616 link
= XEXP (link
, 1))
3619 XEXP (link
, 1) = call_fusage
;
3622 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3625 /* Delete all insns made since FROM.
3626 FROM becomes the new last instruction. */
3629 delete_insns_since (rtx from
)
3634 NEXT_INSN (from
) = 0;
3638 /* This function is deprecated, please use sequences instead.
3640 Move a consecutive bunch of insns to a different place in the chain.
3641 The insns to be moved are those between FROM and TO.
3642 They are moved to a new position after the insn AFTER.
3643 AFTER must not be FROM or TO or any insn in between.
3645 This function does not know about SEQUENCEs and hence should not be
3646 called after delay-slot filling has been done. */
3649 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3651 /* Splice this bunch out of where it is now. */
3652 if (PREV_INSN (from
))
3653 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3655 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3656 if (last_insn
== to
)
3657 last_insn
= PREV_INSN (from
);
3658 if (first_insn
== from
)
3659 first_insn
= NEXT_INSN (to
);
3661 /* Make the new neighbors point to it and it to them. */
3662 if (NEXT_INSN (after
))
3663 PREV_INSN (NEXT_INSN (after
)) = to
;
3665 NEXT_INSN (to
) = NEXT_INSN (after
);
3666 PREV_INSN (from
) = after
;
3667 NEXT_INSN (after
) = from
;
3668 if (after
== last_insn
)
3672 /* Same as function above, but take care to update BB boundaries. */
3674 reorder_insns (rtx from
, rtx to
, rtx after
)
3676 rtx prev
= PREV_INSN (from
);
3677 basic_block bb
, bb2
;
3679 reorder_insns_nobb (from
, to
, after
);
3681 if (GET_CODE (after
) != BARRIER
3682 && (bb
= BLOCK_FOR_INSN (after
)))
3685 bb
->flags
|= BB_DIRTY
;
3687 if (GET_CODE (from
) != BARRIER
3688 && (bb2
= BLOCK_FOR_INSN (from
)))
3690 if (BB_END (bb2
) == to
)
3691 BB_END (bb2
) = prev
;
3692 bb2
->flags
|= BB_DIRTY
;
3695 if (BB_END (bb
) == after
)
3698 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3699 set_block_for_insn (x
, bb
);
3703 /* Return the line note insn preceding INSN. */
3706 find_line_note (rtx insn
)
3708 if (no_line_numbers
)
3711 for (; insn
; insn
= PREV_INSN (insn
))
3712 if (GET_CODE (insn
) == NOTE
3713 && NOTE_LINE_NUMBER (insn
) >= 0)
3719 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3720 of the moved insns when debugging. This may insert a note between AFTER
3721 and FROM, and another one after TO. */
3724 reorder_insns_with_line_notes (rtx from
, rtx to
, rtx after
)
3726 rtx from_line
= find_line_note (from
);
3727 rtx after_line
= find_line_note (after
);
3729 reorder_insns (from
, to
, after
);
3731 if (from_line
== after_line
)
3735 emit_note_copy_after (from_line
, after
);
3737 emit_note_copy_after (after_line
, to
);
3740 /* Remove unnecessary notes from the instruction stream. */
3743 remove_unnecessary_notes (void)
3745 rtx block_stack
= NULL_RTX
;
3746 rtx eh_stack
= NULL_RTX
;
3751 /* We must not remove the first instruction in the function because
3752 the compiler depends on the first instruction being a note. */
3753 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3755 /* Remember what's next. */
3756 next
= NEXT_INSN (insn
);
3758 /* We're only interested in notes. */
3759 if (GET_CODE (insn
) != NOTE
)
3762 switch (NOTE_LINE_NUMBER (insn
))
3764 case NOTE_INSN_DELETED
:
3765 case NOTE_INSN_LOOP_END_TOP_COND
:
3769 case NOTE_INSN_EH_REGION_BEG
:
3770 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3773 case NOTE_INSN_EH_REGION_END
:
3774 /* Too many end notes. */
3775 if (eh_stack
== NULL_RTX
)
3777 /* Mismatched nesting. */
3778 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3781 eh_stack
= XEXP (eh_stack
, 1);
3782 free_INSN_LIST_node (tmp
);
3785 case NOTE_INSN_BLOCK_BEG
:
3786 /* By now, all notes indicating lexical blocks should have
3787 NOTE_BLOCK filled in. */
3788 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3790 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3793 case NOTE_INSN_BLOCK_END
:
3794 /* Too many end notes. */
3795 if (block_stack
== NULL_RTX
)
3797 /* Mismatched nesting. */
3798 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3801 block_stack
= XEXP (block_stack
, 1);
3802 free_INSN_LIST_node (tmp
);
3804 /* Scan back to see if there are any non-note instructions
3805 between INSN and the beginning of this block. If not,
3806 then there is no PC range in the generated code that will
3807 actually be in this block, so there's no point in
3808 remembering the existence of the block. */
3809 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3811 /* This block contains a real instruction. Note that we
3812 don't include labels; if the only thing in the block
3813 is a label, then there are still no PC values that
3814 lie within the block. */
3818 /* We're only interested in NOTEs. */
3819 if (GET_CODE (tmp
) != NOTE
)
3822 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3824 /* We just verified that this BLOCK matches us with
3825 the block_stack check above. Never delete the
3826 BLOCK for the outermost scope of the function; we
3827 can refer to names from that scope even if the
3828 block notes are messed up. */
3829 if (! is_body_block (NOTE_BLOCK (insn
))
3830 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3837 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3838 /* There's a nested block. We need to leave the
3839 current block in place since otherwise the debugger
3840 wouldn't be able to show symbols from our block in
3841 the nested block. */
3847 /* Too many begin notes. */
3848 if (block_stack
|| eh_stack
)
3853 /* Emit insn(s) of given code and pattern
3854 at a specified place within the doubly-linked list.
3856 All of the emit_foo global entry points accept an object
3857 X which is either an insn list or a PATTERN of a single
3860 There are thus a few canonical ways to generate code and
3861 emit it at a specific place in the instruction stream. For
3862 example, consider the instruction named SPOT and the fact that
3863 we would like to emit some instructions before SPOT. We might
3867 ... emit the new instructions ...
3868 insns_head = get_insns ();
3871 emit_insn_before (insns_head, SPOT);
3873 It used to be common to generate SEQUENCE rtl instead, but that
3874 is a relic of the past which no longer occurs. The reason is that
3875 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3876 generated would almost certainly die right after it was created. */
3878 /* Make X be output before the instruction BEFORE. */
3881 emit_insn_before (rtx x
, rtx before
)
3886 #ifdef ENABLE_RTL_CHECKING
3887 if (before
== NULL_RTX
)
3894 switch (GET_CODE (x
))
3905 rtx next
= NEXT_INSN (insn
);
3906 add_insn_before (insn
, before
);
3912 #ifdef ENABLE_RTL_CHECKING
3919 last
= make_insn_raw (x
);
3920 add_insn_before (last
, before
);
3927 /* Make an instruction with body X and code JUMP_INSN
3928 and output it before the instruction BEFORE. */
3931 emit_jump_insn_before (rtx x
, rtx before
)
3933 rtx insn
, last
= NULL_RTX
;
3935 #ifdef ENABLE_RTL_CHECKING
3936 if (before
== NULL_RTX
)
3940 switch (GET_CODE (x
))
3951 rtx next
= NEXT_INSN (insn
);
3952 add_insn_before (insn
, before
);
3958 #ifdef ENABLE_RTL_CHECKING
3965 last
= make_jump_insn_raw (x
);
3966 add_insn_before (last
, before
);
3973 /* Make an instruction with body X and code CALL_INSN
3974 and output it before the instruction BEFORE. */
3977 emit_call_insn_before (rtx x
, rtx before
)
3979 rtx last
= NULL_RTX
, insn
;
3981 #ifdef ENABLE_RTL_CHECKING
3982 if (before
== NULL_RTX
)
3986 switch (GET_CODE (x
))
3997 rtx next
= NEXT_INSN (insn
);
3998 add_insn_before (insn
, before
);
4004 #ifdef ENABLE_RTL_CHECKING
4011 last
= make_call_insn_raw (x
);
4012 add_insn_before (last
, before
);
4019 /* Make an insn of code BARRIER
4020 and output it before the insn BEFORE. */
4023 emit_barrier_before (rtx before
)
4025 rtx insn
= rtx_alloc (BARRIER
);
4027 INSN_UID (insn
) = cur_insn_uid
++;
4029 add_insn_before (insn
, before
);
4033 /* Emit the label LABEL before the insn BEFORE. */
4036 emit_label_before (rtx label
, rtx before
)
4038 /* This can be called twice for the same label as a result of the
4039 confusion that follows a syntax error! So make it harmless. */
4040 if (INSN_UID (label
) == 0)
4042 INSN_UID (label
) = cur_insn_uid
++;
4043 add_insn_before (label
, before
);
4049 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4052 emit_note_before (int subtype
, rtx before
)
4054 rtx note
= rtx_alloc (NOTE
);
4055 INSN_UID (note
) = cur_insn_uid
++;
4056 NOTE_SOURCE_FILE (note
) = 0;
4057 NOTE_LINE_NUMBER (note
) = subtype
;
4058 BLOCK_FOR_INSN (note
) = NULL
;
4060 add_insn_before (note
, before
);
4064 /* Helper for emit_insn_after, handles lists of instructions
4067 static rtx
emit_insn_after_1 (rtx
, rtx
);
4070 emit_insn_after_1 (rtx first
, rtx after
)
4076 if (GET_CODE (after
) != BARRIER
4077 && (bb
= BLOCK_FOR_INSN (after
)))
4079 bb
->flags
|= BB_DIRTY
;
4080 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4081 if (GET_CODE (last
) != BARRIER
)
4082 set_block_for_insn (last
, bb
);
4083 if (GET_CODE (last
) != BARRIER
)
4084 set_block_for_insn (last
, bb
);
4085 if (BB_END (bb
) == after
)
4089 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4092 after_after
= NEXT_INSN (after
);
4094 NEXT_INSN (after
) = first
;
4095 PREV_INSN (first
) = after
;
4096 NEXT_INSN (last
) = after_after
;
4098 PREV_INSN (after_after
) = last
;
4100 if (after
== last_insn
)
4105 /* Make X be output after the insn AFTER. */
4108 emit_insn_after (rtx x
, rtx after
)
4112 #ifdef ENABLE_RTL_CHECKING
4113 if (after
== NULL_RTX
)
4120 switch (GET_CODE (x
))
4128 last
= emit_insn_after_1 (x
, after
);
4131 #ifdef ENABLE_RTL_CHECKING
4138 last
= make_insn_raw (x
);
4139 add_insn_after (last
, after
);
4146 /* Similar to emit_insn_after, except that line notes are to be inserted so
4147 as to act as if this insn were at FROM. */
4150 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4152 rtx from_line
= find_line_note (from
);
4153 rtx after_line
= find_line_note (after
);
4154 rtx insn
= emit_insn_after (x
, after
);
4157 emit_note_copy_after (from_line
, after
);
4160 emit_note_copy_after (after_line
, insn
);
4163 /* Make an insn of code JUMP_INSN with body X
4164 and output it after the insn AFTER. */
4167 emit_jump_insn_after (rtx x
, rtx after
)
4171 #ifdef ENABLE_RTL_CHECKING
4172 if (after
== NULL_RTX
)
4176 switch (GET_CODE (x
))
4184 last
= emit_insn_after_1 (x
, after
);
4187 #ifdef ENABLE_RTL_CHECKING
4194 last
= make_jump_insn_raw (x
);
4195 add_insn_after (last
, after
);
4202 /* Make an instruction with body X and code CALL_INSN
4203 and output it after the instruction AFTER. */
4206 emit_call_insn_after (rtx x
, rtx after
)
4210 #ifdef ENABLE_RTL_CHECKING
4211 if (after
== NULL_RTX
)
4215 switch (GET_CODE (x
))
4223 last
= emit_insn_after_1 (x
, after
);
4226 #ifdef ENABLE_RTL_CHECKING
4233 last
= make_call_insn_raw (x
);
4234 add_insn_after (last
, after
);
4241 /* Make an insn of code BARRIER
4242 and output it after the insn AFTER. */
4245 emit_barrier_after (rtx after
)
4247 rtx insn
= rtx_alloc (BARRIER
);
4249 INSN_UID (insn
) = cur_insn_uid
++;
4251 add_insn_after (insn
, after
);
4255 /* Emit the label LABEL after the insn AFTER. */
4258 emit_label_after (rtx label
, rtx after
)
4260 /* This can be called twice for the same label
4261 as a result of the confusion that follows a syntax error!
4262 So make it harmless. */
4263 if (INSN_UID (label
) == 0)
4265 INSN_UID (label
) = cur_insn_uid
++;
4266 add_insn_after (label
, after
);
4272 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4275 emit_note_after (int subtype
, rtx after
)
4277 rtx note
= rtx_alloc (NOTE
);
4278 INSN_UID (note
) = cur_insn_uid
++;
4279 NOTE_SOURCE_FILE (note
) = 0;
4280 NOTE_LINE_NUMBER (note
) = subtype
;
4281 BLOCK_FOR_INSN (note
) = NULL
;
4282 add_insn_after (note
, after
);
4286 /* Emit a copy of note ORIG after the insn AFTER. */
4289 emit_note_copy_after (rtx orig
, rtx after
)
4293 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4299 note
= rtx_alloc (NOTE
);
4300 INSN_UID (note
) = cur_insn_uid
++;
4301 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4302 NOTE_DATA (note
) = NOTE_DATA (orig
);
4303 BLOCK_FOR_INSN (note
) = NULL
;
4304 add_insn_after (note
, after
);
4308 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4310 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4312 rtx last
= emit_insn_after (pattern
, after
);
4314 if (pattern
== NULL_RTX
)
4317 after
= NEXT_INSN (after
);
4320 if (active_insn_p (after
))
4321 INSN_LOCATOR (after
) = loc
;
4324 after
= NEXT_INSN (after
);
4329 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4331 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4333 rtx last
= emit_jump_insn_after (pattern
, after
);
4335 if (pattern
== NULL_RTX
)
4338 after
= NEXT_INSN (after
);
4341 if (active_insn_p (after
))
4342 INSN_LOCATOR (after
) = loc
;
4345 after
= NEXT_INSN (after
);
4350 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4352 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4354 rtx last
= emit_call_insn_after (pattern
, after
);
4356 if (pattern
== NULL_RTX
)
4359 after
= NEXT_INSN (after
);
4362 if (active_insn_p (after
))
4363 INSN_LOCATOR (after
) = loc
;
4366 after
= NEXT_INSN (after
);
4371 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4373 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4375 rtx first
= PREV_INSN (before
);
4376 rtx last
= emit_insn_before (pattern
, before
);
4378 if (pattern
== NULL_RTX
)
4381 first
= NEXT_INSN (first
);
4384 if (active_insn_p (first
))
4385 INSN_LOCATOR (first
) = loc
;
4388 first
= NEXT_INSN (first
);
4393 /* Take X and emit it at the end of the doubly-linked
4396 Returns the last insn emitted. */
4401 rtx last
= last_insn
;
4407 switch (GET_CODE (x
))
4418 rtx next
= NEXT_INSN (insn
);
4425 #ifdef ENABLE_RTL_CHECKING
4432 last
= make_insn_raw (x
);
4440 /* Make an insn of code JUMP_INSN with pattern X
4441 and add it to the end of the doubly-linked list. */
4444 emit_jump_insn (rtx x
)
4446 rtx last
= NULL_RTX
, insn
;
4448 switch (GET_CODE (x
))
4459 rtx next
= NEXT_INSN (insn
);
4466 #ifdef ENABLE_RTL_CHECKING
4473 last
= make_jump_insn_raw (x
);
4481 /* Make an insn of code CALL_INSN with pattern X
4482 and add it to the end of the doubly-linked list. */
4485 emit_call_insn (rtx x
)
4489 switch (GET_CODE (x
))
4497 insn
= emit_insn (x
);
4500 #ifdef ENABLE_RTL_CHECKING
4507 insn
= make_call_insn_raw (x
);
4515 /* Add the label LABEL to the end of the doubly-linked list. */
4518 emit_label (rtx label
)
4520 /* This can be called twice for the same label
4521 as a result of the confusion that follows a syntax error!
4522 So make it harmless. */
4523 if (INSN_UID (label
) == 0)
4525 INSN_UID (label
) = cur_insn_uid
++;
4531 /* Make an insn of code BARRIER
4532 and add it to the end of the doubly-linked list. */
4537 rtx barrier
= rtx_alloc (BARRIER
);
4538 INSN_UID (barrier
) = cur_insn_uid
++;
4543 /* Make line numbering NOTE insn for LOCATION add it to the end
4544 of the doubly-linked list, but only if line-numbers are desired for
4545 debugging info and it doesn't match the previous one. */
4548 emit_line_note (location_t location
)
4552 set_file_and_line_for_stmt (location
);
4554 if (location
.file
&& last_location
.file
4555 && !strcmp (location
.file
, last_location
.file
)
4556 && location
.line
== last_location
.line
)
4558 last_location
= location
;
4560 if (no_line_numbers
)
4566 note
= emit_note (location
.line
);
4567 NOTE_SOURCE_FILE (note
) = location
.file
;
4572 /* Emit a copy of note ORIG. */
4575 emit_note_copy (rtx orig
)
4579 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4585 note
= rtx_alloc (NOTE
);
4587 INSN_UID (note
) = cur_insn_uid
++;
4588 NOTE_DATA (note
) = NOTE_DATA (orig
);
4589 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4590 BLOCK_FOR_INSN (note
) = NULL
;
4596 /* Make an insn of code NOTE or type NOTE_NO
4597 and add it to the end of the doubly-linked list. */
4600 emit_note (int note_no
)
4604 note
= rtx_alloc (NOTE
);
4605 INSN_UID (note
) = cur_insn_uid
++;
4606 NOTE_LINE_NUMBER (note
) = note_no
;
4607 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4608 BLOCK_FOR_INSN (note
) = NULL
;
4613 /* Cause next statement to emit a line note even if the line number
4617 force_next_line_note (void)
4619 last_location
.line
= -1;
4622 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4623 note of this type already exists, remove it first. */
4626 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4628 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4634 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4635 has multiple sets (some callers assume single_set
4636 means the insn only has one set, when in fact it
4637 means the insn only has one * useful * set). */
4638 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4645 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4646 It serves no useful purpose and breaks eliminate_regs. */
4647 if (GET_CODE (datum
) == ASM_OPERANDS
)
4657 XEXP (note
, 0) = datum
;
4661 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4662 return REG_NOTES (insn
);
4665 /* Return an indication of which type of insn should have X as a body.
4666 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4669 classify_insn (rtx x
)
4671 if (GET_CODE (x
) == CODE_LABEL
)
4673 if (GET_CODE (x
) == CALL
)
4675 if (GET_CODE (x
) == RETURN
)
4677 if (GET_CODE (x
) == SET
)
4679 if (SET_DEST (x
) == pc_rtx
)
4681 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4686 if (GET_CODE (x
) == PARALLEL
)
4689 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4690 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4692 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4693 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4695 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4696 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4702 /* Emit the rtl pattern X as an appropriate kind of insn.
4703 If X is a label, it is simply added into the insn chain. */
4708 enum rtx_code code
= classify_insn (x
);
4710 if (code
== CODE_LABEL
)
4711 return emit_label (x
);
4712 else if (code
== INSN
)
4713 return emit_insn (x
);
4714 else if (code
== JUMP_INSN
)
4716 rtx insn
= emit_jump_insn (x
);
4717 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4718 return emit_barrier ();
4721 else if (code
== CALL_INSN
)
4722 return emit_call_insn (x
);
4727 /* Space for free sequence stack entries. */
4728 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4730 /* Begin emitting insns to a sequence which can be packaged in an
4731 RTL_EXPR. If this sequence will contain something that might cause
4732 the compiler to pop arguments to function calls (because those
4733 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4734 details), use do_pending_stack_adjust before calling this function.
4735 That will ensure that the deferred pops are not accidentally
4736 emitted in the middle of this sequence. */
4739 start_sequence (void)
4741 struct sequence_stack
*tem
;
4743 if (free_sequence_stack
!= NULL
)
4745 tem
= free_sequence_stack
;
4746 free_sequence_stack
= tem
->next
;
4749 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4751 tem
->next
= seq_stack
;
4752 tem
->first
= first_insn
;
4753 tem
->last
= last_insn
;
4754 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4762 /* Similarly, but indicate that this sequence will be placed in T, an
4763 RTL_EXPR. See the documentation for start_sequence for more
4764 information about how to use this function. */
4767 start_sequence_for_rtl_expr (tree t
)
4774 /* Set up the insn chain starting with FIRST as the current sequence,
4775 saving the previously current one. See the documentation for
4776 start_sequence for more information about how to use this function. */
4779 push_to_sequence (rtx first
)
4785 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4791 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4794 push_to_full_sequence (rtx first
, rtx last
)
4799 /* We really should have the end of the insn chain here. */
4800 if (last
&& NEXT_INSN (last
))
4804 /* Set up the outer-level insn chain
4805 as the current sequence, saving the previously current one. */
4808 push_topmost_sequence (void)
4810 struct sequence_stack
*stack
, *top
= NULL
;
4814 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4817 first_insn
= top
->first
;
4818 last_insn
= top
->last
;
4819 seq_rtl_expr
= top
->sequence_rtl_expr
;
4822 /* After emitting to the outer-level insn chain, update the outer-level
4823 insn chain, and restore the previous saved state. */
4826 pop_topmost_sequence (void)
4828 struct sequence_stack
*stack
, *top
= NULL
;
4830 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4833 top
->first
= first_insn
;
4834 top
->last
= last_insn
;
4835 /* ??? Why don't we save seq_rtl_expr here? */
4840 /* After emitting to a sequence, restore previous saved state.
4842 To get the contents of the sequence just made, you must call
4843 `get_insns' *before* calling here.
4845 If the compiler might have deferred popping arguments while
4846 generating this sequence, and this sequence will not be immediately
4847 inserted into the instruction stream, use do_pending_stack_adjust
4848 before calling get_insns. That will ensure that the deferred
4849 pops are inserted into this sequence, and not into some random
4850 location in the instruction stream. See INHIBIT_DEFER_POP for more
4851 information about deferred popping of arguments. */
4856 struct sequence_stack
*tem
= seq_stack
;
4858 first_insn
= tem
->first
;
4859 last_insn
= tem
->last
;
4860 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4861 seq_stack
= tem
->next
;
4863 memset (tem
, 0, sizeof (*tem
));
4864 tem
->next
= free_sequence_stack
;
4865 free_sequence_stack
= tem
;
4868 /* This works like end_sequence, but records the old sequence in FIRST
4872 end_full_sequence (rtx
*first
, rtx
*last
)
4874 *first
= first_insn
;
4879 /* Return 1 if currently emitting into a sequence. */
4882 in_sequence_p (void)
4884 return seq_stack
!= 0;
4887 /* Put the various virtual registers into REGNO_REG_RTX. */
4890 init_virtual_regs (struct emit_status
*es
)
4892 rtx
*ptr
= es
->x_regno_reg_rtx
;
4893 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4894 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4895 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4896 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4897 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4901 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4902 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4903 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4904 static int copy_insn_n_scratches
;
4906 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4907 copied an ASM_OPERANDS.
4908 In that case, it is the original input-operand vector. */
4909 static rtvec orig_asm_operands_vector
;
4911 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4912 copied an ASM_OPERANDS.
4913 In that case, it is the copied input-operand vector. */
4914 static rtvec copy_asm_operands_vector
;
4916 /* Likewise for the constraints vector. */
4917 static rtvec orig_asm_constraints_vector
;
4918 static rtvec copy_asm_constraints_vector
;
4920 /* Recursively create a new copy of an rtx for copy_insn.
4921 This function differs from copy_rtx in that it handles SCRATCHes and
4922 ASM_OPERANDs properly.
4923 Normally, this function is not used directly; use copy_insn as front end.
4924 However, you could first copy an insn pattern with copy_insn and then use
4925 this function afterwards to properly copy any REG_NOTEs containing
4929 copy_insn_1 (rtx orig
)
4934 const char *format_ptr
;
4936 code
= GET_CODE (orig
);
4952 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4957 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4958 if (copy_insn_scratch_in
[i
] == orig
)
4959 return copy_insn_scratch_out
[i
];
4963 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4964 a LABEL_REF, it isn't sharable. */
4965 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4966 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4967 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4971 /* A MEM with a constant address is not sharable. The problem is that
4972 the constant address may need to be reloaded. If the mem is shared,
4973 then reloading one copy of this mem will cause all copies to appear
4974 to have been reloaded. */
4980 copy
= rtx_alloc (code
);
4982 /* Copy the various flags, and other information. We assume that
4983 all fields need copying, and then clear the fields that should
4984 not be copied. That is the sensible default behavior, and forces
4985 us to explicitly document why we are *not* copying a flag. */
4986 memcpy (copy
, orig
, RTX_HDR_SIZE
);
4988 /* We do not copy the USED flag, which is used as a mark bit during
4989 walks over the RTL. */
4990 RTX_FLAG (copy
, used
) = 0;
4992 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4993 if (GET_RTX_CLASS (code
) == 'i')
4995 RTX_FLAG (copy
, jump
) = 0;
4996 RTX_FLAG (copy
, call
) = 0;
4997 RTX_FLAG (copy
, frame_related
) = 0;
5000 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5002 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5004 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5005 switch (*format_ptr
++)
5008 if (XEXP (orig
, i
) != NULL
)
5009 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5014 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5015 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5016 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5017 XVEC (copy
, i
) = copy_asm_operands_vector
;
5018 else if (XVEC (orig
, i
) != NULL
)
5020 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5021 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5022 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5033 /* These are left unchanged. */
5041 if (code
== SCRATCH
)
5043 i
= copy_insn_n_scratches
++;
5044 if (i
>= MAX_RECOG_OPERANDS
)
5046 copy_insn_scratch_in
[i
] = orig
;
5047 copy_insn_scratch_out
[i
] = copy
;
5049 else if (code
== ASM_OPERANDS
)
5051 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5052 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5053 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5054 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5060 /* Create a new copy of an rtx.
5061 This function differs from copy_rtx in that it handles SCRATCHes and
5062 ASM_OPERANDs properly.
5063 INSN doesn't really have to be a full INSN; it could be just the
5066 copy_insn (rtx insn
)
5068 copy_insn_n_scratches
= 0;
5069 orig_asm_operands_vector
= 0;
5070 orig_asm_constraints_vector
= 0;
5071 copy_asm_operands_vector
= 0;
5072 copy_asm_constraints_vector
= 0;
5073 return copy_insn_1 (insn
);
5076 /* Initialize data structures and variables in this file
5077 before generating rtl for each function. */
5082 struct function
*f
= cfun
;
5084 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5087 seq_rtl_expr
= NULL
;
5089 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5090 last_location
.line
= 0;
5091 last_location
.file
= 0;
5092 first_label_num
= label_num
;
5096 /* Init the tables that describe all the pseudo regs. */
5098 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5100 f
->emit
->regno_pointer_align
5101 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5102 * sizeof (unsigned char));
5105 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5107 /* Put copies of all the hard registers into regno_reg_rtx. */
5108 memcpy (regno_reg_rtx
,
5109 static_regno_reg_rtx
,
5110 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5112 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5113 init_virtual_regs (f
->emit
);
5115 /* Indicate that the virtual registers and stack locations are
5117 REG_POINTER (stack_pointer_rtx
) = 1;
5118 REG_POINTER (frame_pointer_rtx
) = 1;
5119 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5120 REG_POINTER (arg_pointer_rtx
) = 1;
5122 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5123 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5124 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5125 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5126 REG_POINTER (virtual_cfa_rtx
) = 1;
5128 #ifdef STACK_BOUNDARY
5129 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5130 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5131 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5132 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5134 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5135 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5136 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5137 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5138 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5141 #ifdef INIT_EXPANDERS
5146 /* Generate the constant 0. */
5149 gen_const_vector_0 (enum machine_mode mode
)
5154 enum machine_mode inner
;
5156 units
= GET_MODE_NUNITS (mode
);
5157 inner
= GET_MODE_INNER (mode
);
5159 v
= rtvec_alloc (units
);
5161 /* We need to call this function after we to set CONST0_RTX first. */
5162 if (!CONST0_RTX (inner
))
5165 for (i
= 0; i
< units
; ++i
)
5166 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5168 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5172 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5173 all elements are zero. */
5175 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5177 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5180 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5181 if (RTVEC_ELT (v
, i
) != inner_zero
)
5182 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5183 return CONST0_RTX (mode
);
5186 /* Create some permanent unique rtl objects shared between all functions.
5187 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5190 init_emit_once (int line_numbers
)
5193 enum machine_mode mode
;
5194 enum machine_mode double_mode
;
5196 /* We need reg_raw_mode, so initialize the modes now. */
5197 init_reg_modes_once ();
5199 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5201 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5202 const_int_htab_eq
, NULL
);
5204 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5205 const_double_htab_eq
, NULL
);
5207 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5208 mem_attrs_htab_eq
, NULL
);
5209 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5210 reg_attrs_htab_eq
, NULL
);
5212 no_line_numbers
= ! line_numbers
;
5214 /* Compute the word and byte modes. */
5216 byte_mode
= VOIDmode
;
5217 word_mode
= VOIDmode
;
5218 double_mode
= VOIDmode
;
5220 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5221 mode
= GET_MODE_WIDER_MODE (mode
))
5223 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5224 && byte_mode
== VOIDmode
)
5227 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5228 && word_mode
== VOIDmode
)
5232 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5233 mode
= GET_MODE_WIDER_MODE (mode
))
5235 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5236 && double_mode
== VOIDmode
)
5240 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5242 /* Assign register numbers to the globally defined register rtx.
5243 This must be done at runtime because the register number field
5244 is in a union and some compilers can't initialize unions. */
5246 pc_rtx
= gen_rtx_PC (VOIDmode
);
5247 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5248 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5249 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5250 if (hard_frame_pointer_rtx
== 0)
5251 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5252 HARD_FRAME_POINTER_REGNUM
);
5253 if (arg_pointer_rtx
== 0)
5254 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5255 virtual_incoming_args_rtx
=
5256 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5257 virtual_stack_vars_rtx
=
5258 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5259 virtual_stack_dynamic_rtx
=
5260 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5261 virtual_outgoing_args_rtx
=
5262 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5263 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5265 /* Initialize RTL for commonly used hard registers. These are
5266 copied into regno_reg_rtx as we begin to compile each function. */
5267 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5268 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5270 #ifdef INIT_EXPANDERS
5271 /* This is to initialize {init|mark|free}_machine_status before the first
5272 call to push_function_context_to. This is needed by the Chill front
5273 end which calls push_function_context_to before the first call to
5274 init_function_start. */
5278 /* Create the unique rtx's for certain rtx codes and operand values. */
5280 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5281 tries to use these variables. */
5282 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5283 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5284 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5286 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5287 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5288 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5290 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5292 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5293 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5294 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5295 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5296 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5297 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5298 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5300 dconsthalf
= dconst1
;
5303 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5305 /* Initialize mathematical constants for constant folding builtins.
5306 These constants need to be given to at least 160 bits precision. */
5307 real_from_string (&dconstpi
,
5308 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5309 real_from_string (&dconste
,
5310 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5312 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5314 REAL_VALUE_TYPE
*r
=
5315 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5317 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5318 mode
= GET_MODE_WIDER_MODE (mode
))
5319 const_tiny_rtx
[i
][(int) mode
] =
5320 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5322 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5324 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5325 mode
= GET_MODE_WIDER_MODE (mode
))
5326 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5328 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5330 mode
= GET_MODE_WIDER_MODE (mode
))
5331 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5334 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5336 mode
= GET_MODE_WIDER_MODE (mode
))
5337 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5339 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5341 mode
= GET_MODE_WIDER_MODE (mode
))
5342 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5344 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5345 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5346 const_tiny_rtx
[0][i
] = const0_rtx
;
5348 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5349 if (STORE_FLAG_VALUE
== 1)
5350 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5352 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5353 return_address_pointer_rtx
5354 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5357 #ifdef STATIC_CHAIN_REGNUM
5358 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5360 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5361 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5362 static_chain_incoming_rtx
5363 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5366 static_chain_incoming_rtx
= static_chain_rtx
;
5370 static_chain_rtx
= STATIC_CHAIN
;
5372 #ifdef STATIC_CHAIN_INCOMING
5373 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5375 static_chain_incoming_rtx
= static_chain_rtx
;
5379 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5380 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5383 /* Query and clear/ restore no_line_numbers. This is used by the
5384 switch / case handling in stmt.c to give proper line numbers in
5385 warnings about unreachable code. */
5388 force_line_numbers (void)
5390 int old
= no_line_numbers
;
5392 no_line_numbers
= 0;
5394 force_next_line_note ();
5399 restore_line_number_status (int old_value
)
5401 no_line_numbers
= old_value
;
5404 /* Produce exact duplicate of insn INSN after AFTER.
5405 Care updating of libcall regions if present. */
5408 emit_copy_of_insn_after (rtx insn
, rtx after
)
5411 rtx note1
, note2
, link
;
5413 switch (GET_CODE (insn
))
5416 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5420 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5424 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5425 if (CALL_INSN_FUNCTION_USAGE (insn
))
5426 CALL_INSN_FUNCTION_USAGE (new)
5427 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5428 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5429 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5436 /* Update LABEL_NUSES. */
5437 mark_jump_label (PATTERN (new), new, 0);
5439 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5441 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5443 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5444 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5446 if (GET_CODE (link
) == EXPR_LIST
)
5448 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5453 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5458 /* Fix the libcall sequences. */
5459 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5462 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5464 XEXP (note1
, 0) = p
;
5465 XEXP (note2
, 0) = new;
5467 INSN_CODE (new) = INSN_CODE (insn
);
5471 static GTY((deletable(""))) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5473 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5475 if (hard_reg_clobbers
[mode
][regno
])
5476 return hard_reg_clobbers
[mode
][regno
];
5478 return (hard_reg_clobbers
[mode
][regno
] =
5479 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5482 #include "gt-emit-rtl.h"