1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 rtx (*gen_lowpart
) (enum machine_mode mode
, rtx x
) = gen_lowpart_general
;
104 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
105 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
106 record a copy of const[012]_rtx. */
108 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
112 REAL_VALUE_TYPE dconst0
;
113 REAL_VALUE_TYPE dconst1
;
114 REAL_VALUE_TYPE dconst2
;
115 REAL_VALUE_TYPE dconst3
;
116 REAL_VALUE_TYPE dconst10
;
117 REAL_VALUE_TYPE dconstm1
;
118 REAL_VALUE_TYPE dconstm2
;
119 REAL_VALUE_TYPE dconsthalf
;
120 REAL_VALUE_TYPE dconstthird
;
121 REAL_VALUE_TYPE dconstpi
;
122 REAL_VALUE_TYPE dconste
;
124 /* All references to the following fixed hard registers go through
125 these unique rtl objects. On machines where the frame-pointer and
126 arg-pointer are the same register, they use the same unique object.
128 After register allocation, other rtl objects which used to be pseudo-regs
129 may be clobbered to refer to the frame-pointer register.
130 But references that were originally to the frame-pointer can be
131 distinguished from the others because they contain frame_pointer_rtx.
133 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
134 tricky: until register elimination has taken place hard_frame_pointer_rtx
135 should be used if it is being set, and frame_pointer_rtx otherwise. After
136 register elimination hard_frame_pointer_rtx should always be used.
137 On machines where the two registers are same (most) then these are the
140 In an inline procedure, the stack and frame pointer rtxs may not be
141 used for anything else. */
142 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
143 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
144 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
146 /* This is used to implement __builtin_return_address for some machines.
147 See for instance the MIPS port. */
148 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
150 /* We make one copy of (const_int C) where C is in
151 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
152 to save space during the compilation and simplify comparisons of
155 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
157 /* A hash table storing CONST_INTs whose absolute value is greater
158 than MAX_SAVED_CONST_INT. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
161 htab_t const_int_htab
;
163 /* A hash table storing memory attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
165 htab_t mem_attrs_htab
;
167 /* A hash table storing register attribute structures. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
169 htab_t reg_attrs_htab
;
171 /* A hash table storing all CONST_DOUBLEs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
173 htab_t const_double_htab
;
175 #define first_insn (cfun->emit->x_first_insn)
176 #define last_insn (cfun->emit->x_last_insn)
177 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
178 #define last_location (cfun->emit->x_last_location)
179 #define first_label_num (cfun->emit->x_first_label_num)
181 static rtx
make_jump_insn_raw (rtx
);
182 static rtx
make_call_insn_raw (rtx
);
183 static rtx
find_line_note (rtx
);
184 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
185 static void unshare_all_decls (tree
);
186 static void reset_used_decls (tree
);
187 static void mark_label_nuses (rtx
);
188 static hashval_t
const_int_htab_hash (const void *);
189 static int const_int_htab_eq (const void *, const void *);
190 static hashval_t
const_double_htab_hash (const void *);
191 static int const_double_htab_eq (const void *, const void *);
192 static rtx
lookup_const_double (rtx
);
193 static hashval_t
mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
197 static hashval_t
reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs
*get_reg_attrs (tree
, int);
200 static tree
component_ref_for_mem_expr (tree
);
201 static rtx
gen_const_vector_0 (enum machine_mode
);
202 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
203 static void copy_rtx_if_shared_1 (rtx
*orig
);
205 /* Probability of the conditional branch currently proceeded by try_split.
206 Set to -1 otherwise. */
207 int split_branch_probability
= -1;
209 /* Returns a hash code for X (which is a really a CONST_INT). */
212 const_int_htab_hash (const void *x
)
214 return (hashval_t
) INTVAL ((rtx
) x
);
217 /* Returns nonzero if the value represented by X (which is really a
218 CONST_INT) is the same as that given by Y (which is really a
222 const_int_htab_eq (const void *x
, const void *y
)
224 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
227 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
229 const_double_htab_hash (const void *x
)
234 if (GET_MODE (value
) == VOIDmode
)
235 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
238 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
239 /* MODE is used in the comparison, so it should be in the hash. */
240 h
^= GET_MODE (value
);
245 /* Returns nonzero if the value represented by X (really a ...)
246 is the same as that represented by Y (really a ...) */
248 const_double_htab_eq (const void *x
, const void *y
)
250 rtx a
= (rtx
)x
, b
= (rtx
)y
;
252 if (GET_MODE (a
) != GET_MODE (b
))
254 if (GET_MODE (a
) == VOIDmode
)
255 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
256 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
258 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
259 CONST_DOUBLE_REAL_VALUE (b
));
262 /* Returns a hash code for X (which is a really a mem_attrs *). */
265 mem_attrs_htab_hash (const void *x
)
267 mem_attrs
*p
= (mem_attrs
*) x
;
269 return (p
->alias
^ (p
->align
* 1000)
270 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
271 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
275 /* Returns nonzero if the value represented by X (which is really a
276 mem_attrs *) is the same as that given by Y (which is also really a
280 mem_attrs_htab_eq (const void *x
, const void *y
)
282 mem_attrs
*p
= (mem_attrs
*) x
;
283 mem_attrs
*q
= (mem_attrs
*) y
;
285 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
286 && p
->size
== q
->size
&& p
->align
== q
->align
);
289 /* Allocate a new mem_attrs structure and insert it into the hash table if
290 one identical to it is not already in the table. We are doing this for
294 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
295 unsigned int align
, enum machine_mode mode
)
300 /* If everything is the default, we can just return zero.
301 This must match what the corresponding MEM_* macros return when the
302 field is not present. */
303 if (alias
== 0 && expr
== 0 && offset
== 0
305 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
306 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
307 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
312 attrs
.offset
= offset
;
316 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
319 *slot
= ggc_alloc (sizeof (mem_attrs
));
320 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
326 /* Returns a hash code for X (which is a really a reg_attrs *). */
329 reg_attrs_htab_hash (const void *x
)
331 reg_attrs
*p
= (reg_attrs
*) x
;
333 return ((p
->offset
* 1000) ^ (long) p
->decl
);
336 /* Returns nonzero if the value represented by X (which is really a
337 reg_attrs *) is the same as that given by Y (which is also really a
341 reg_attrs_htab_eq (const void *x
, const void *y
)
343 reg_attrs
*p
= (reg_attrs
*) x
;
344 reg_attrs
*q
= (reg_attrs
*) y
;
346 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
348 /* Allocate a new reg_attrs structure and insert it into the hash table if
349 one identical to it is not already in the table. We are doing this for
353 get_reg_attrs (tree decl
, int offset
)
358 /* If everything is the default, we can just return zero. */
359 if (decl
== 0 && offset
== 0)
363 attrs
.offset
= offset
;
365 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
368 *slot
= ggc_alloc (sizeof (reg_attrs
));
369 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
375 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
376 don't attempt to share with the various global pieces of rtl (such as
377 frame_pointer_rtx). */
380 gen_raw_REG (enum machine_mode mode
, int regno
)
382 rtx x
= gen_rtx_raw_REG (mode
, regno
);
383 ORIGINAL_REGNO (x
) = regno
;
387 /* There are some RTL codes that require special attention; the generation
388 functions do the raw handling. If you add to this list, modify
389 special_rtx in gengenrtl.c as well. */
392 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
396 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
397 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
399 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
400 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
401 return const_true_rtx
;
404 /* Look up the CONST_INT in the hash table. */
405 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
406 (hashval_t
) arg
, INSERT
);
408 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
414 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
416 return GEN_INT (trunc_int_for_mode (c
, mode
));
419 /* CONST_DOUBLEs might be created from pairs of integers, or from
420 REAL_VALUE_TYPEs. Also, their length is known only at run time,
421 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
423 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
424 hash table. If so, return its counterpart; otherwise add it
425 to the hash table and return it. */
427 lookup_const_double (rtx real
)
429 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
436 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
437 VALUE in mode MODE. */
439 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
441 rtx real
= rtx_alloc (CONST_DOUBLE
);
442 PUT_MODE (real
, mode
);
444 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
446 return lookup_const_double (real
);
449 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
450 of ints: I0 is the low-order word and I1 is the high-order word.
451 Do not use this routine for non-integer modes; convert to
452 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
455 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
460 if (mode
!= VOIDmode
)
463 if (GET_MODE_CLASS (mode
) != MODE_INT
464 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
465 /* We can get a 0 for an error mark. */
466 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
467 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
470 /* We clear out all bits that don't belong in MODE, unless they and
471 our sign bit are all one. So we get either a reasonable negative
472 value or a reasonable unsigned value for this mode. */
473 width
= GET_MODE_BITSIZE (mode
);
474 if (width
< HOST_BITS_PER_WIDE_INT
475 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
476 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
477 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
478 else if (width
== HOST_BITS_PER_WIDE_INT
479 && ! (i1
== ~0 && i0
< 0))
481 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
482 /* We cannot represent this value as a constant. */
485 /* If this would be an entire word for the target, but is not for
486 the host, then sign-extend on the host so that the number will
487 look the same way on the host that it would on the target.
489 For example, when building a 64 bit alpha hosted 32 bit sparc
490 targeted compiler, then we want the 32 bit unsigned value -1 to be
491 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
492 The latter confuses the sparc backend. */
494 if (width
< HOST_BITS_PER_WIDE_INT
495 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
496 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
498 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
501 ??? Strictly speaking, this is wrong if we create a CONST_INT for
502 a large unsigned constant with the size of MODE being
503 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
504 in a wider mode. In that case we will mis-interpret it as a
507 Unfortunately, the only alternative is to make a CONST_DOUBLE for
508 any constant in any mode if it is an unsigned constant larger
509 than the maximum signed integer in an int on the host. However,
510 doing this will break everyone that always expects to see a
511 CONST_INT for SImode and smaller.
513 We have always been making CONST_INTs in this case, so nothing
514 new is being broken. */
516 if (width
<= HOST_BITS_PER_WIDE_INT
)
517 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
520 /* If this integer fits in one word, return a CONST_INT. */
521 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
524 /* We use VOIDmode for integers. */
525 value
= rtx_alloc (CONST_DOUBLE
);
526 PUT_MODE (value
, VOIDmode
);
528 CONST_DOUBLE_LOW (value
) = i0
;
529 CONST_DOUBLE_HIGH (value
) = i1
;
531 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
532 XWINT (value
, i
) = 0;
534 return lookup_const_double (value
);
538 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
540 /* In case the MD file explicitly references the frame pointer, have
541 all such references point to the same frame pointer. This is
542 used during frame pointer elimination to distinguish the explicit
543 references to these registers from pseudos that happened to be
546 If we have eliminated the frame pointer or arg pointer, we will
547 be using it as a normal register, for example as a spill
548 register. In such cases, we might be accessing it in a mode that
549 is not Pmode and therefore cannot use the pre-allocated rtx.
551 Also don't do this when we are making new REGs in reload, since
552 we don't want to get confused with the real pointers. */
554 if (mode
== Pmode
&& !reload_in_progress
)
556 if (regno
== FRAME_POINTER_REGNUM
557 && (!reload_completed
|| frame_pointer_needed
))
558 return frame_pointer_rtx
;
559 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
560 if (regno
== HARD_FRAME_POINTER_REGNUM
561 && (!reload_completed
|| frame_pointer_needed
))
562 return hard_frame_pointer_rtx
;
564 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
565 if (regno
== ARG_POINTER_REGNUM
)
566 return arg_pointer_rtx
;
568 #ifdef RETURN_ADDRESS_POINTER_REGNUM
569 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
570 return return_address_pointer_rtx
;
572 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
573 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
574 return pic_offset_table_rtx
;
575 if (regno
== STACK_POINTER_REGNUM
)
576 return stack_pointer_rtx
;
580 /* If the per-function register table has been set up, try to re-use
581 an existing entry in that table to avoid useless generation of RTL.
583 This code is disabled for now until we can fix the various backends
584 which depend on having non-shared hard registers in some cases. Long
585 term we want to re-enable this code as it can significantly cut down
586 on the amount of useless RTL that gets generated.
588 We'll also need to fix some code that runs after reload that wants to
589 set ORIGINAL_REGNO. */
594 && regno
< FIRST_PSEUDO_REGISTER
595 && reg_raw_mode
[regno
] == mode
)
596 return regno_reg_rtx
[regno
];
599 return gen_raw_REG (mode
, regno
);
603 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
605 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
607 /* This field is not cleared by the mere allocation of the rtx, so
615 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
617 /* This is the most common failure type.
618 Catch it early so we can see who does it. */
619 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
622 /* This check isn't usable right now because combine will
623 throw arbitrary crap like a CALL into a SUBREG in
624 gen_lowpart_for_combine so we must just eat it. */
626 /* Check for this too. */
627 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
630 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
633 /* Generate a SUBREG representing the least-significant part of REG if MODE
634 is smaller than mode of REG, otherwise paradoxical SUBREG. */
637 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
639 enum machine_mode inmode
;
641 inmode
= GET_MODE (reg
);
642 if (inmode
== VOIDmode
)
644 return gen_rtx_SUBREG (mode
, reg
,
645 subreg_lowpart_offset (mode
, inmode
));
648 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
650 ** This routine generates an RTX of the size specified by
651 ** <code>, which is an RTX code. The RTX structure is initialized
652 ** from the arguments <element1> through <elementn>, which are
653 ** interpreted according to the specific RTX type's format. The
654 ** special machine mode associated with the rtx (if any) is specified
657 ** gen_rtx can be invoked in a way which resembles the lisp-like
658 ** rtx it will generate. For example, the following rtx structure:
660 ** (plus:QI (mem:QI (reg:SI 1))
661 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
663 ** ...would be generated by the following C code:
665 ** gen_rtx_PLUS (QImode,
666 ** gen_rtx_MEM (QImode,
667 ** gen_rtx_REG (SImode, 1)),
668 ** gen_rtx_MEM (QImode,
669 ** gen_rtx_PLUS (SImode,
670 ** gen_rtx_REG (SImode, 2),
671 ** gen_rtx_REG (SImode, 3)))),
676 gen_rtx (enum rtx_code code
, enum machine_mode mode
, ...)
678 int i
; /* Array indices... */
679 const char *fmt
; /* Current rtx's format... */
680 rtx rt_val
; /* RTX to return to caller... */
688 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
693 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
694 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
696 rt_val
= immed_double_const (arg0
, arg1
, mode
);
701 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
705 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
709 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
710 rt_val
->mode
= mode
; /* Store the machine mode... */
712 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
713 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
717 case '0': /* Field with unknown use. Zero it. */
718 X0EXP (rt_val
, i
) = NULL_RTX
;
721 case 'i': /* An integer? */
722 XINT (rt_val
, i
) = va_arg (p
, int);
725 case 'w': /* A wide integer? */
726 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
729 case 's': /* A string? */
730 XSTR (rt_val
, i
) = va_arg (p
, char *);
733 case 'e': /* An expression? */
734 case 'u': /* An insn? Same except when printing. */
735 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
738 case 'E': /* An RTX vector? */
739 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
742 case 'b': /* A bitmap? */
743 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
746 case 't': /* A tree? */
747 XTREE (rt_val
, i
) = va_arg (p
, tree
);
761 /* gen_rtvec (n, [rt1, ..., rtn])
763 ** This routine creates an rtvec and stores within it the
764 ** pointers to rtx's which are its arguments.
769 gen_rtvec (int n
, ...)
778 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
780 vector
= alloca (n
* sizeof (rtx
));
782 for (i
= 0; i
< n
; i
++)
783 vector
[i
] = va_arg (p
, rtx
);
785 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
789 return gen_rtvec_v (save_n
, vector
);
793 gen_rtvec_v (int n
, rtx
*argp
)
799 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
801 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
803 for (i
= 0; i
< n
; i
++)
804 rt_val
->elem
[i
] = *argp
++;
809 /* Generate a REG rtx for a new pseudo register of mode MODE.
810 This pseudo is assigned the next sequential register number. */
813 gen_reg_rtx (enum machine_mode mode
)
815 struct function
*f
= cfun
;
818 /* Don't let anything called after initial flow analysis create new
823 if (generating_concat_p
824 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
825 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
827 /* For complex modes, don't make a single pseudo.
828 Instead, make a CONCAT of two pseudos.
829 This allows noncontiguous allocation of the real and imaginary parts,
830 which makes much better code. Besides, allocating DCmode
831 pseudos overstrains reload on some machines like the 386. */
832 rtx realpart
, imagpart
;
833 enum machine_mode partmode
= GET_MODE_INNER (mode
);
835 realpart
= gen_reg_rtx (partmode
);
836 imagpart
= gen_reg_rtx (partmode
);
837 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
840 /* Make sure regno_pointer_align, and regno_reg_rtx are large
841 enough to have an element for this pseudo reg number. */
843 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
845 int old_size
= f
->emit
->regno_pointer_align_length
;
849 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
850 memset (new + old_size
, 0, old_size
);
851 f
->emit
->regno_pointer_align
= (unsigned char *) new;
853 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
854 old_size
* 2 * sizeof (rtx
));
855 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
856 regno_reg_rtx
= new1
;
858 f
->emit
->regno_pointer_align_length
= old_size
* 2;
861 val
= gen_raw_REG (mode
, reg_rtx_no
);
862 regno_reg_rtx
[reg_rtx_no
++] = val
;
866 /* Generate a register with same attributes as REG,
867 but offsetted by OFFSET. */
870 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
872 rtx
new = gen_rtx_REG (mode
, regno
);
873 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
874 REG_OFFSET (reg
) + offset
);
878 /* Set the decl for MEM to DECL. */
881 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
883 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
885 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
888 /* Set the register attributes for registers contained in PARM_RTX.
889 Use needed values from memory attributes of MEM. */
892 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
894 if (GET_CODE (parm_rtx
) == REG
)
895 set_reg_attrs_from_mem (parm_rtx
, mem
);
896 else if (GET_CODE (parm_rtx
) == PARALLEL
)
898 /* Check for a NULL entry in the first slot, used to indicate that the
899 parameter goes both on the stack and in registers. */
900 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
901 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
903 rtx x
= XVECEXP (parm_rtx
, 0, i
);
904 if (GET_CODE (XEXP (x
, 0)) == REG
)
905 REG_ATTRS (XEXP (x
, 0))
906 = get_reg_attrs (MEM_EXPR (mem
),
907 INTVAL (XEXP (x
, 1)));
912 /* Assign the RTX X to declaration T. */
914 set_decl_rtl (tree t
, rtx x
)
916 DECL_CHECK (t
)->decl
.rtl
= x
;
920 /* For register, we maintain the reverse information too. */
921 if (GET_CODE (x
) == REG
)
922 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
923 else if (GET_CODE (x
) == SUBREG
)
924 REG_ATTRS (SUBREG_REG (x
))
925 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
926 if (GET_CODE (x
) == CONCAT
)
928 if (REG_P (XEXP (x
, 0)))
929 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
930 if (REG_P (XEXP (x
, 1)))
931 REG_ATTRS (XEXP (x
, 1))
932 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
934 if (GET_CODE (x
) == PARALLEL
)
937 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
939 rtx y
= XVECEXP (x
, 0, i
);
940 if (REG_P (XEXP (y
, 0)))
941 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
946 /* Identify REG (which may be a CONCAT) as a user register. */
949 mark_user_reg (rtx reg
)
951 if (GET_CODE (reg
) == CONCAT
)
953 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
954 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
956 else if (GET_CODE (reg
) == REG
)
957 REG_USERVAR_P (reg
) = 1;
962 /* Identify REG as a probable pointer register and show its alignment
963 as ALIGN, if nonzero. */
966 mark_reg_pointer (rtx reg
, int align
)
968 if (! REG_POINTER (reg
))
970 REG_POINTER (reg
) = 1;
973 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
975 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
976 /* We can no-longer be sure just how aligned this pointer is. */
977 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
980 /* Return 1 plus largest pseudo reg number used in the current function. */
988 /* Return 1 + the largest label number used so far in the current function. */
993 if (last_label_num
&& label_num
== base_label_num
)
994 return last_label_num
;
998 /* Return first label number used in this function (if any were used). */
1001 get_first_label_num (void)
1003 return first_label_num
;
1006 /* Return the final regno of X, which is a SUBREG of a hard
1009 subreg_hard_regno (rtx x
, int check_mode
)
1011 enum machine_mode mode
= GET_MODE (x
);
1012 unsigned int byte_offset
, base_regno
, final_regno
;
1013 rtx reg
= SUBREG_REG (x
);
1015 /* This is where we attempt to catch illegal subregs
1016 created by the compiler. */
1017 if (GET_CODE (x
) != SUBREG
1018 || GET_CODE (reg
) != REG
)
1020 base_regno
= REGNO (reg
);
1021 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1023 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1025 #ifdef ENABLE_CHECKING
1026 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
1027 SUBREG_BYTE (x
), mode
))
1030 /* Catch non-congruent offsets too. */
1031 byte_offset
= SUBREG_BYTE (x
);
1032 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1035 final_regno
= subreg_regno (x
);
1040 /* Return a value representing some low-order bits of X, where the number
1041 of low-order bits is given by MODE. Note that no conversion is done
1042 between floating-point and fixed-point values, rather, the bit
1043 representation is returned.
1045 This function handles the cases in common between gen_lowpart, below,
1046 and two variants in cse.c and combine.c. These are the cases that can
1047 be safely handled at all points in the compilation.
1049 If this is not a case we can handle, return 0. */
1052 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1054 int msize
= GET_MODE_SIZE (mode
);
1057 enum machine_mode innermode
;
1059 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1060 so we have to make one up. Yuk. */
1061 innermode
= GET_MODE (x
);
1062 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
1063 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1064 else if (innermode
== VOIDmode
)
1065 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1067 xsize
= GET_MODE_SIZE (innermode
);
1069 if (innermode
== VOIDmode
|| innermode
== BLKmode
)
1072 if (innermode
== mode
)
1075 /* MODE must occupy no more words than the mode of X. */
1076 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1077 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1080 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1081 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1084 offset
= subreg_lowpart_offset (mode
, innermode
);
1086 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1087 && (GET_MODE_CLASS (mode
) == MODE_INT
1088 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1090 /* If we are getting the low-order part of something that has been
1091 sign- or zero-extended, we can either just use the object being
1092 extended or make a narrower extension. If we want an even smaller
1093 piece than the size of the object being extended, call ourselves
1096 This case is used mostly by combine and cse. */
1098 if (GET_MODE (XEXP (x
, 0)) == mode
)
1100 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1101 return gen_lowpart_common (mode
, XEXP (x
, 0));
1102 else if (msize
< xsize
)
1103 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1105 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1106 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1107 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1108 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1110 /* Otherwise, we can't do this. */
1114 /* Return the constant real or imaginary part (which has mode MODE)
1115 of a complex value X. The IMAGPART_P argument determines whether
1116 the real or complex component should be returned. This function
1117 returns NULL_RTX if the component isn't a constant. */
1120 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1124 if (GET_CODE (x
) == MEM
1125 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1127 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1128 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1130 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1131 if (TREE_CODE (part
) == REAL_CST
1132 || TREE_CODE (part
) == INTEGER_CST
)
1133 return expand_expr (part
, NULL_RTX
, mode
, 0);
1139 /* Return the real part (which has mode MODE) of a complex value X.
1140 This always comes at the low address in memory. */
1143 gen_realpart (enum machine_mode mode
, rtx x
)
1147 /* Handle complex constants. */
1148 part
= gen_complex_constant_part (mode
, x
, 0);
1149 if (part
!= NULL_RTX
)
1152 if (WORDS_BIG_ENDIAN
1153 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1155 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1157 ("can't access real part of complex value in hard register");
1158 else if (WORDS_BIG_ENDIAN
)
1159 return gen_highpart (mode
, x
);
1161 return gen_lowpart (mode
, x
);
1164 /* Return the imaginary part (which has mode MODE) of a complex value X.
1165 This always comes at the high address in memory. */
1168 gen_imagpart (enum machine_mode mode
, rtx x
)
1172 /* Handle complex constants. */
1173 part
= gen_complex_constant_part (mode
, x
, 1);
1174 if (part
!= NULL_RTX
)
1177 if (WORDS_BIG_ENDIAN
)
1178 return gen_lowpart (mode
, x
);
1179 else if (! WORDS_BIG_ENDIAN
1180 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1182 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1184 ("can't access imaginary part of complex value in hard register");
1186 return gen_highpart (mode
, x
);
1189 /* Return 1 iff X, assumed to be a SUBREG,
1190 refers to the real part of the complex value in its containing reg.
1191 Complex values are always stored with the real part in the first word,
1192 regardless of WORDS_BIG_ENDIAN. */
1195 subreg_realpart_p (rtx x
)
1197 if (GET_CODE (x
) != SUBREG
)
1200 return ((unsigned int) SUBREG_BYTE (x
)
1201 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1204 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1205 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1206 least-significant part of X.
1207 MODE specifies how big a part of X to return;
1208 it usually should not be larger than a word.
1209 If X is a MEM whose address is a QUEUED, the value may be so also. */
1212 gen_lowpart_general (enum machine_mode mode
, rtx x
)
1214 rtx result
= gen_lowpart_common (mode
, x
);
1218 else if (GET_CODE (x
) == REG
)
1220 /* Must be a hard reg that's not valid in MODE. */
1221 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1226 else if (GET_CODE (x
) == MEM
)
1228 /* The only additional case we can do is MEM. */
1231 /* The following exposes the use of "x" to CSE. */
1232 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1233 && SCALAR_INT_MODE_P (GET_MODE (x
))
1234 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1235 GET_MODE_BITSIZE (GET_MODE (x
)))
1236 && ! no_new_pseudos
)
1237 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1239 if (WORDS_BIG_ENDIAN
)
1240 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1241 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1243 if (BYTES_BIG_ENDIAN
)
1244 /* Adjust the address so that the address-after-the-data
1246 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1247 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1249 return adjust_address (x
, mode
, offset
);
1251 else if (GET_CODE (x
) == ADDRESSOF
)
1252 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1257 /* Like `gen_lowpart', but refer to the most significant part.
1258 This is used to access the imaginary part of a complex number. */
1261 gen_highpart (enum machine_mode mode
, rtx x
)
1263 unsigned int msize
= GET_MODE_SIZE (mode
);
1266 /* This case loses if X is a subreg. To catch bugs early,
1267 complain if an invalid MODE is used even in other cases. */
1268 if (msize
> UNITS_PER_WORD
1269 && msize
!= (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1272 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1273 subreg_highpart_offset (mode
, GET_MODE (x
)));
1275 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1276 the target if we have a MEM. gen_highpart must return a valid operand,
1277 emitting code if necessary to do so. */
1278 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1279 result
= validize_mem (result
);
1286 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1287 be VOIDmode constant. */
1289 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1291 if (GET_MODE (exp
) != VOIDmode
)
1293 if (GET_MODE (exp
) != innermode
)
1295 return gen_highpart (outermode
, exp
);
1297 return simplify_gen_subreg (outermode
, exp
, innermode
,
1298 subreg_highpart_offset (outermode
, innermode
));
1301 /* Return offset in bytes to get OUTERMODE low part
1302 of the value in mode INNERMODE stored in memory in target format. */
1305 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1307 unsigned int offset
= 0;
1308 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1312 if (WORDS_BIG_ENDIAN
)
1313 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1314 if (BYTES_BIG_ENDIAN
)
1315 offset
+= difference
% UNITS_PER_WORD
;
1321 /* Return offset in bytes to get OUTERMODE high part
1322 of the value in mode INNERMODE stored in memory in target format. */
1324 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1326 unsigned int offset
= 0;
1327 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1329 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1334 if (! WORDS_BIG_ENDIAN
)
1335 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1336 if (! BYTES_BIG_ENDIAN
)
1337 offset
+= difference
% UNITS_PER_WORD
;
1343 /* Return 1 iff X, assumed to be a SUBREG,
1344 refers to the least significant part of its containing reg.
1345 If X is not a SUBREG, always return 1 (it is its own low part!). */
1348 subreg_lowpart_p (rtx x
)
1350 if (GET_CODE (x
) != SUBREG
)
1352 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1355 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1356 == SUBREG_BYTE (x
));
1359 /* Return subword OFFSET of operand OP.
1360 The word number, OFFSET, is interpreted as the word number starting
1361 at the low-order address. OFFSET 0 is the low-order word if not
1362 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1364 If we cannot extract the required word, we return zero. Otherwise,
1365 an rtx corresponding to the requested word will be returned.
1367 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1368 reload has completed, a valid address will always be returned. After
1369 reload, if a valid address cannot be returned, we return zero.
1371 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1372 it is the responsibility of the caller.
1374 MODE is the mode of OP in case it is a CONST_INT.
1376 ??? This is still rather broken for some cases. The problem for the
1377 moment is that all callers of this thing provide no 'goal mode' to
1378 tell us to work with. This exists because all callers were written
1379 in a word based SUBREG world.
1380 Now use of this function can be deprecated by simplify_subreg in most
1385 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1387 if (mode
== VOIDmode
)
1388 mode
= GET_MODE (op
);
1390 if (mode
== VOIDmode
)
1393 /* If OP is narrower than a word, fail. */
1395 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1398 /* If we want a word outside OP, return zero. */
1400 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1403 /* Form a new MEM at the requested address. */
1404 if (GET_CODE (op
) == MEM
)
1406 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1408 if (! validate_address
)
1411 else if (reload_completed
)
1413 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1417 return replace_equiv_address (new, XEXP (new, 0));
1420 /* Rest can be handled by simplify_subreg. */
1421 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1424 /* Similar to `operand_subword', but never return 0. If we can't extract
1425 the required subword, put OP into a register and try again. If that fails,
1426 abort. We always validate the address in this case.
1428 MODE is the mode of OP, in case it is CONST_INT. */
1431 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1433 rtx result
= operand_subword (op
, offset
, 1, mode
);
1438 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1440 /* If this is a register which can not be accessed by words, copy it
1441 to a pseudo register. */
1442 if (GET_CODE (op
) == REG
)
1443 op
= copy_to_reg (op
);
1445 op
= force_reg (mode
, op
);
1448 result
= operand_subword (op
, offset
, 1, mode
);
1455 /* Given a compare instruction, swap the operands.
1456 A test instruction is changed into a compare of 0 against the operand. */
1459 reverse_comparison (rtx insn
)
1461 rtx body
= PATTERN (insn
);
1464 if (GET_CODE (body
) == SET
)
1465 comp
= SET_SRC (body
);
1467 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1469 if (GET_CODE (comp
) == COMPARE
)
1471 rtx op0
= XEXP (comp
, 0);
1472 rtx op1
= XEXP (comp
, 1);
1473 XEXP (comp
, 0) = op1
;
1474 XEXP (comp
, 1) = op0
;
1478 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1479 CONST0_RTX (GET_MODE (comp
)), comp
);
1480 if (GET_CODE (body
) == SET
)
1481 SET_SRC (body
) = new;
1483 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1487 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1488 or (2) a component ref of something variable. Represent the later with
1489 a NULL expression. */
1492 component_ref_for_mem_expr (tree ref
)
1494 tree inner
= TREE_OPERAND (ref
, 0);
1496 if (TREE_CODE (inner
) == COMPONENT_REF
)
1497 inner
= component_ref_for_mem_expr (inner
);
1500 tree placeholder_ptr
= 0;
1502 /* Now remove any conversions: they don't change what the underlying
1503 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1504 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1505 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1506 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1507 || TREE_CODE (inner
) == SAVE_EXPR
1508 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1509 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1510 inner
= find_placeholder (inner
, &placeholder_ptr
);
1512 inner
= TREE_OPERAND (inner
, 0);
1514 if (! DECL_P (inner
))
1518 if (inner
== TREE_OPERAND (ref
, 0))
1521 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1522 TREE_OPERAND (ref
, 1));
1525 /* Given REF, a MEM, and T, either the type of X or the expression
1526 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1527 if we are making a new object of this type. BITPOS is nonzero if
1528 there is an offset outstanding on T that will be applied later. */
1531 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1532 HOST_WIDE_INT bitpos
)
1534 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1535 tree expr
= MEM_EXPR (ref
);
1536 rtx offset
= MEM_OFFSET (ref
);
1537 rtx size
= MEM_SIZE (ref
);
1538 unsigned int align
= MEM_ALIGN (ref
);
1539 HOST_WIDE_INT apply_bitpos
= 0;
1542 /* It can happen that type_for_mode was given a mode for which there
1543 is no language-level type. In which case it returns NULL, which
1548 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1549 if (type
== error_mark_node
)
1552 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1553 wrong answer, as it assumes that DECL_RTL already has the right alias
1554 info. Callers should not set DECL_RTL until after the call to
1555 set_mem_attributes. */
1556 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1559 /* Get the alias set from the expression or type (perhaps using a
1560 front-end routine) and use it. */
1561 alias
= get_alias_set (t
);
1563 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1564 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1565 RTX_UNCHANGING_P (ref
)
1566 |= ((lang_hooks
.honor_readonly
1567 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1568 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1570 /* If we are making an object of this type, or if this is a DECL, we know
1571 that it is a scalar if the type is not an aggregate. */
1572 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1573 MEM_SCALAR_P (ref
) = 1;
1575 /* We can set the alignment from the type if we are making an object,
1576 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1577 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1578 align
= MAX (align
, TYPE_ALIGN (type
));
1580 /* If the size is known, we can set that. */
1581 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1582 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1584 /* If T is not a type, we may be able to deduce some more information about
1588 maybe_set_unchanging (ref
, t
);
1589 if (TREE_THIS_VOLATILE (t
))
1590 MEM_VOLATILE_P (ref
) = 1;
1592 /* Now remove any conversions: they don't change what the underlying
1593 object is. Likewise for SAVE_EXPR. */
1594 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1595 || TREE_CODE (t
) == NON_LVALUE_EXPR
1596 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1597 || TREE_CODE (t
) == SAVE_EXPR
)
1598 t
= TREE_OPERAND (t
, 0);
1600 /* If this expression can't be addressed (e.g., it contains a reference
1601 to a non-addressable field), show we don't change its alias set. */
1602 if (! can_address_p (t
))
1603 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1605 /* If this is a decl, set the attributes of the MEM from it. */
1609 offset
= const0_rtx
;
1610 apply_bitpos
= bitpos
;
1611 size
= (DECL_SIZE_UNIT (t
)
1612 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1613 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1614 align
= DECL_ALIGN (t
);
1617 /* If this is a constant, we know the alignment. */
1618 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1620 align
= TYPE_ALIGN (type
);
1621 #ifdef CONSTANT_ALIGNMENT
1622 align
= CONSTANT_ALIGNMENT (t
, align
);
1626 /* If this is a field reference and not a bit-field, record it. */
1627 /* ??? There is some information that can be gleened from bit-fields,
1628 such as the word offset in the structure that might be modified.
1629 But skip it for now. */
1630 else if (TREE_CODE (t
) == COMPONENT_REF
1631 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1633 expr
= component_ref_for_mem_expr (t
);
1634 offset
= const0_rtx
;
1635 apply_bitpos
= bitpos
;
1636 /* ??? Any reason the field size would be different than
1637 the size we got from the type? */
1640 /* If this is an array reference, look for an outer field reference. */
1641 else if (TREE_CODE (t
) == ARRAY_REF
)
1643 tree off_tree
= size_zero_node
;
1644 /* We can't modify t, because we use it at the end of the
1650 tree index
= TREE_OPERAND (t2
, 1);
1651 tree array
= TREE_OPERAND (t2
, 0);
1652 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1653 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1654 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1656 /* We assume all arrays have sizes that are a multiple of a byte.
1657 First subtract the lower bound, if any, in the type of the
1658 index, then convert to sizetype and multiply by the size of the
1660 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1661 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1664 /* If the index has a self-referential type, pass it to a
1665 WITH_RECORD_EXPR; if the component size is, pass our
1666 component to one. */
1667 if (CONTAINS_PLACEHOLDER_P (index
))
1668 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t2
);
1669 if (CONTAINS_PLACEHOLDER_P (unit_size
))
1670 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1674 = fold (build (PLUS_EXPR
, sizetype
,
1675 fold (build (MULT_EXPR
, sizetype
,
1679 t2
= TREE_OPERAND (t2
, 0);
1681 while (TREE_CODE (t2
) == ARRAY_REF
);
1687 if (host_integerp (off_tree
, 1))
1689 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1690 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1691 align
= DECL_ALIGN (t2
);
1692 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1694 offset
= GEN_INT (ioff
);
1695 apply_bitpos
= bitpos
;
1698 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1700 expr
= component_ref_for_mem_expr (t2
);
1701 if (host_integerp (off_tree
, 1))
1703 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1704 apply_bitpos
= bitpos
;
1706 /* ??? Any reason the field size would be different than
1707 the size we got from the type? */
1709 else if (flag_argument_noalias
> 1
1710 && TREE_CODE (t2
) == INDIRECT_REF
1711 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1718 /* If this is a Fortran indirect argument reference, record the
1720 else if (flag_argument_noalias
> 1
1721 && TREE_CODE (t
) == INDIRECT_REF
1722 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1729 /* If we modified OFFSET based on T, then subtract the outstanding
1730 bit position offset. Similarly, increase the size of the accessed
1731 object to contain the negative offset. */
1734 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1736 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1739 /* Now set the attributes we computed above. */
1741 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1743 /* If this is already known to be a scalar or aggregate, we are done. */
1744 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1747 /* If it is a reference into an aggregate, this is part of an aggregate.
1748 Otherwise we don't know. */
1749 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1750 || TREE_CODE (t
) == ARRAY_RANGE_REF
1751 || TREE_CODE (t
) == BIT_FIELD_REF
)
1752 MEM_IN_STRUCT_P (ref
) = 1;
1756 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1758 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1761 /* Set the decl for MEM to DECL. */
1764 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1767 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1768 GEN_INT (REG_OFFSET (reg
)),
1769 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1772 /* Set the alias set of MEM to SET. */
1775 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1777 #ifdef ENABLE_CHECKING
1778 /* If the new and old alias sets don't conflict, something is wrong. */
1779 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1783 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1784 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1788 /* Set the alignment of MEM to ALIGN bits. */
1791 set_mem_align (rtx mem
, unsigned int align
)
1793 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1794 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1798 /* Set the expr for MEM to EXPR. */
1801 set_mem_expr (rtx mem
, tree expr
)
1804 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1805 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1808 /* Set the offset of MEM to OFFSET. */
1811 set_mem_offset (rtx mem
, rtx offset
)
1813 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1814 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1818 /* Set the size of MEM to SIZE. */
1821 set_mem_size (rtx mem
, rtx size
)
1823 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1824 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1828 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1829 and its address changed to ADDR. (VOIDmode means don't change the mode.
1830 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1831 returned memory location is required to be valid. The memory
1832 attributes are not changed. */
1835 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1839 if (GET_CODE (memref
) != MEM
)
1841 if (mode
== VOIDmode
)
1842 mode
= GET_MODE (memref
);
1844 addr
= XEXP (memref
, 0);
1845 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1846 && (!validate
|| memory_address_p (mode
, addr
)))
1851 if (reload_in_progress
|| reload_completed
)
1853 if (! memory_address_p (mode
, addr
))
1857 addr
= memory_address (mode
, addr
);
1860 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1863 new = gen_rtx_MEM (mode
, addr
);
1864 MEM_COPY_ATTRIBUTES (new, memref
);
1868 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1869 way we are changing MEMREF, so we only preserve the alias set. */
1872 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1874 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1875 enum machine_mode mmode
= GET_MODE (new);
1878 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1879 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1881 /* If there are no changes, just return the original memory reference. */
1884 if (MEM_ATTRS (memref
) == 0
1885 || (MEM_EXPR (memref
) == NULL
1886 && MEM_OFFSET (memref
) == NULL
1887 && MEM_SIZE (memref
) == size
1888 && MEM_ALIGN (memref
) == align
))
1891 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1892 MEM_COPY_ATTRIBUTES (new, memref
);
1896 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1901 /* Return a memory reference like MEMREF, but with its mode changed
1902 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1903 nonzero, the memory address is forced to be valid.
1904 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1905 and caller is responsible for adjusting MEMREF base register. */
1908 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1909 int validate
, int adjust
)
1911 rtx addr
= XEXP (memref
, 0);
1913 rtx memoffset
= MEM_OFFSET (memref
);
1915 unsigned int memalign
= MEM_ALIGN (memref
);
1917 /* If there are no changes, just return the original memory reference. */
1918 if (mode
== GET_MODE (memref
) && !offset
1919 && (!validate
|| memory_address_p (mode
, addr
)))
1922 /* ??? Prefer to create garbage instead of creating shared rtl.
1923 This may happen even if offset is nonzero -- consider
1924 (plus (plus reg reg) const_int) -- so do this always. */
1925 addr
= copy_rtx (addr
);
1929 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1930 object, we can merge it into the LO_SUM. */
1931 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1933 && (unsigned HOST_WIDE_INT
) offset
1934 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1935 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1936 plus_constant (XEXP (addr
, 1), offset
));
1938 addr
= plus_constant (addr
, offset
);
1941 new = change_address_1 (memref
, mode
, addr
, validate
);
1943 /* Compute the new values of the memory attributes due to this adjustment.
1944 We add the offsets and update the alignment. */
1946 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1948 /* Compute the new alignment by taking the MIN of the alignment and the
1949 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1954 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1956 /* We can compute the size in a number of ways. */
1957 if (GET_MODE (new) != BLKmode
)
1958 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1959 else if (MEM_SIZE (memref
))
1960 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1962 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1963 memoffset
, size
, memalign
, GET_MODE (new));
1965 /* At some point, we should validate that this offset is within the object,
1966 if all the appropriate values are known. */
1970 /* Return a memory reference like MEMREF, but with its mode changed
1971 to MODE and its address changed to ADDR, which is assumed to be
1972 MEMREF offseted by OFFSET bytes. If VALIDATE is
1973 nonzero, the memory address is forced to be valid. */
1976 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1977 HOST_WIDE_INT offset
, int validate
)
1979 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1980 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1983 /* Return a memory reference like MEMREF, but whose address is changed by
1984 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1985 known to be in OFFSET (possibly 1). */
1988 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1990 rtx
new, addr
= XEXP (memref
, 0);
1992 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1994 /* At this point we don't know _why_ the address is invalid. It
1995 could have secondary memory references, multiplies or anything.
1997 However, if we did go and rearrange things, we can wind up not
1998 being able to recognize the magic around pic_offset_table_rtx.
1999 This stuff is fragile, and is yet another example of why it is
2000 bad to expose PIC machinery too early. */
2001 if (! memory_address_p (GET_MODE (memref
), new)
2002 && GET_CODE (addr
) == PLUS
2003 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2005 addr
= force_reg (GET_MODE (addr
), addr
);
2006 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2009 update_temp_slot_address (XEXP (memref
, 0), new);
2010 new = change_address_1 (memref
, VOIDmode
, new, 1);
2012 /* If there are no changes, just return the original memory reference. */
2016 /* Update the alignment to reflect the offset. Reset the offset, which
2019 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2020 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2025 /* Return a memory reference like MEMREF, but with its address changed to
2026 ADDR. The caller is asserting that the actual piece of memory pointed
2027 to is the same, just the form of the address is being changed, such as
2028 by putting something into a register. */
2031 replace_equiv_address (rtx memref
, rtx addr
)
2033 /* change_address_1 copies the memory attribute structure without change
2034 and that's exactly what we want here. */
2035 update_temp_slot_address (XEXP (memref
, 0), addr
);
2036 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2039 /* Likewise, but the reference is not required to be valid. */
2042 replace_equiv_address_nv (rtx memref
, rtx addr
)
2044 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2047 /* Return a memory reference like MEMREF, but with its mode widened to
2048 MODE and offset by OFFSET. This would be used by targets that e.g.
2049 cannot issue QImode memory operations and have to use SImode memory
2050 operations plus masking logic. */
2053 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2055 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2056 tree expr
= MEM_EXPR (new);
2057 rtx memoffset
= MEM_OFFSET (new);
2058 unsigned int size
= GET_MODE_SIZE (mode
);
2060 /* If there are no changes, just return the original memory reference. */
2064 /* If we don't know what offset we were at within the expression, then
2065 we can't know if we've overstepped the bounds. */
2071 if (TREE_CODE (expr
) == COMPONENT_REF
)
2073 tree field
= TREE_OPERAND (expr
, 1);
2075 if (! DECL_SIZE_UNIT (field
))
2081 /* Is the field at least as large as the access? If so, ok,
2082 otherwise strip back to the containing structure. */
2083 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2084 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2085 && INTVAL (memoffset
) >= 0)
2088 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2094 expr
= TREE_OPERAND (expr
, 0);
2095 memoffset
= (GEN_INT (INTVAL (memoffset
)
2096 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2097 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2100 /* Similarly for the decl. */
2101 else if (DECL_P (expr
)
2102 && DECL_SIZE_UNIT (expr
)
2103 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2104 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2105 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2109 /* The widened memory access overflows the expression, which means
2110 that it could alias another expression. Zap it. */
2117 memoffset
= NULL_RTX
;
2119 /* The widened memory may alias other stuff, so zap the alias set. */
2120 /* ??? Maybe use get_alias_set on any remaining expression. */
2122 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2123 MEM_ALIGN (new), mode
);
2128 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2131 gen_label_rtx (void)
2133 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2134 NULL
, label_num
++, NULL
);
2137 /* For procedure integration. */
2139 /* Install new pointers to the first and last insns in the chain.
2140 Also, set cur_insn_uid to one higher than the last in use.
2141 Used for an inline-procedure after copying the insn chain. */
2144 set_new_first_and_last_insn (rtx first
, rtx last
)
2152 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2153 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2158 /* Set the last label number found in the current function.
2159 This is used when belatedly compiling an inline function. */
2162 set_new_last_label_num (int last
)
2164 base_label_num
= label_num
;
2165 last_label_num
= last
;
2168 /* Restore all variables describing the current status from the structure *P.
2169 This is used after a nested function. */
2172 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2177 /* Go through all the RTL insn bodies and copy any invalid shared
2178 structure. This routine should only be called once. */
2181 unshare_all_rtl (tree fndecl
, rtx insn
)
2185 /* Make sure that virtual parameters are not shared. */
2186 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2187 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2189 /* Make sure that virtual stack slots are not shared. */
2190 unshare_all_decls (DECL_INITIAL (fndecl
));
2192 /* Unshare just about everything else. */
2193 unshare_all_rtl_in_chain (insn
);
2195 /* Make sure the addresses of stack slots found outside the insn chain
2196 (such as, in DECL_RTL of a variable) are not shared
2197 with the insn chain.
2199 This special care is necessary when the stack slot MEM does not
2200 actually appear in the insn chain. If it does appear, its address
2201 is unshared from all else at that point. */
2202 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2205 /* Go through all the RTL insn bodies and copy any invalid shared
2206 structure, again. This is a fairly expensive thing to do so it
2207 should be done sparingly. */
2210 unshare_all_rtl_again (rtx insn
)
2215 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2218 reset_used_flags (PATTERN (p
));
2219 reset_used_flags (REG_NOTES (p
));
2220 reset_used_flags (LOG_LINKS (p
));
2223 /* Make sure that virtual stack slots are not shared. */
2224 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2226 /* Make sure that virtual parameters are not shared. */
2227 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2228 reset_used_flags (DECL_RTL (decl
));
2230 reset_used_flags (stack_slot_list
);
2232 unshare_all_rtl (cfun
->decl
, insn
);
2235 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2236 Recursively does the same for subexpressions. */
2239 verify_rtx_sharing (rtx orig
, rtx insn
)
2244 const char *format_ptr
;
2249 code
= GET_CODE (x
);
2251 /* These types may be freely shared. */
2267 /* SCRATCH must be shared because they represent distinct values. */
2269 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2274 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2275 a LABEL_REF, it isn't sharable. */
2276 if (GET_CODE (XEXP (x
, 0)) == PLUS
2277 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2278 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2283 /* A MEM is allowed to be shared if its address is constant. */
2284 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2285 || reload_completed
|| reload_in_progress
)
2294 /* This rtx may not be shared. If it has already been seen,
2295 replace it with a copy of itself. */
2297 if (RTX_FLAG (x
, used
))
2299 error ("Invalid rtl sharing found in the insn");
2301 error ("Shared rtx");
2305 RTX_FLAG (x
, used
) = 1;
2307 /* Now scan the subexpressions recursively. */
2309 format_ptr
= GET_RTX_FORMAT (code
);
2311 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2313 switch (*format_ptr
++)
2316 verify_rtx_sharing (XEXP (x
, i
), insn
);
2320 if (XVEC (x
, i
) != NULL
)
2323 int len
= XVECLEN (x
, i
);
2325 for (j
= 0; j
< len
; j
++)
2327 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2328 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2329 && GET_CODE (SET_SRC (XVECEXP (x
, i
, j
))) == ASM_OPERANDS
)
2330 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2332 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2341 /* Go through all the RTL insn bodies and check that there is no unexpected
2342 sharing in between the subexpressions. */
2345 verify_rtl_sharing (void)
2349 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2352 reset_used_flags (PATTERN (p
));
2353 reset_used_flags (REG_NOTES (p
));
2354 reset_used_flags (LOG_LINKS (p
));
2357 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2360 verify_rtx_sharing (PATTERN (p
), p
);
2361 verify_rtx_sharing (REG_NOTES (p
), p
);
2362 verify_rtx_sharing (LOG_LINKS (p
), p
);
2366 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2367 Assumes the mark bits are cleared at entry. */
2370 unshare_all_rtl_in_chain (rtx insn
)
2372 for (; insn
; insn
= NEXT_INSN (insn
))
2375 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2376 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2377 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2381 /* Go through all virtual stack slots of a function and copy any
2382 shared structure. */
2384 unshare_all_decls (tree blk
)
2388 /* Copy shared decls. */
2389 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2390 if (DECL_RTL_SET_P (t
))
2391 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2393 /* Now process sub-blocks. */
2394 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2395 unshare_all_decls (t
);
2398 /* Go through all virtual stack slots of a function and mark them as
2401 reset_used_decls (tree blk
)
2406 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2407 if (DECL_RTL_SET_P (t
))
2408 reset_used_flags (DECL_RTL (t
));
2410 /* Now process sub-blocks. */
2411 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2412 reset_used_decls (t
);
2415 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2416 placed in the result directly, rather than being copied. MAY_SHARE is
2417 either a MEM of an EXPR_LIST of MEMs. */
2420 copy_most_rtx (rtx orig
, rtx may_share
)
2425 const char *format_ptr
;
2427 if (orig
== may_share
2428 || (GET_CODE (may_share
) == EXPR_LIST
2429 && in_expr_list_p (may_share
, orig
)))
2432 code
= GET_CODE (orig
);
2450 copy
= rtx_alloc (code
);
2451 PUT_MODE (copy
, GET_MODE (orig
));
2452 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2453 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2454 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2455 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2456 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2458 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2460 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2462 switch (*format_ptr
++)
2465 XEXP (copy
, i
) = XEXP (orig
, i
);
2466 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2467 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2471 XEXP (copy
, i
) = XEXP (orig
, i
);
2476 XVEC (copy
, i
) = XVEC (orig
, i
);
2477 if (XVEC (orig
, i
) != NULL
)
2479 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2480 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2481 XVECEXP (copy
, i
, j
)
2482 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2487 XWINT (copy
, i
) = XWINT (orig
, i
);
2492 XINT (copy
, i
) = XINT (orig
, i
);
2496 XTREE (copy
, i
) = XTREE (orig
, i
);
2501 XSTR (copy
, i
) = XSTR (orig
, i
);
2505 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2515 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2516 Recursively does the same for subexpressions. Uses
2517 copy_rtx_if_shared_1 to reduce stack space. */
2520 copy_rtx_if_shared (rtx orig
)
2522 copy_rtx_if_shared_1 (&orig
);
2526 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2527 use. Recursively does the same for subexpressions. */
2530 copy_rtx_if_shared_1 (rtx
*orig1
)
2536 const char *format_ptr
;
2540 /* Repeat is used to turn tail-recursion into iteration. */
2547 code
= GET_CODE (x
);
2549 /* These types may be freely shared. */
2564 /* SCRATCH must be shared because they represent distinct values. */
2567 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2572 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2573 a LABEL_REF, it isn't sharable. */
2574 if (GET_CODE (XEXP (x
, 0)) == PLUS
2575 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2576 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2585 /* The chain of insns is not being copied. */
2592 /* This rtx may not be shared. If it has already been seen,
2593 replace it with a copy of itself. */
2595 if (RTX_FLAG (x
, used
))
2599 copy
= rtx_alloc (code
);
2600 memcpy (copy
, x
, RTX_SIZE (code
));
2604 RTX_FLAG (x
, used
) = 1;
2606 /* Now scan the subexpressions recursively.
2607 We can store any replaced subexpressions directly into X
2608 since we know X is not shared! Any vectors in X
2609 must be copied if X was copied. */
2611 format_ptr
= GET_RTX_FORMAT (code
);
2612 length
= GET_RTX_LENGTH (code
);
2615 for (i
= 0; i
< length
; i
++)
2617 switch (*format_ptr
++)
2621 copy_rtx_if_shared_1 (last_ptr
);
2622 last_ptr
= &XEXP (x
, i
);
2626 if (XVEC (x
, i
) != NULL
)
2629 int len
= XVECLEN (x
, i
);
2631 /* Copy the vector iff I copied the rtx and the length
2633 if (copied
&& len
> 0)
2634 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2636 /* Call recursively on all inside the vector. */
2637 for (j
= 0; j
< len
; j
++)
2640 copy_rtx_if_shared_1 (last_ptr
);
2641 last_ptr
= &XVECEXP (x
, i
, j
);
2656 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2657 to look for shared sub-parts. */
2660 reset_used_flags (rtx x
)
2664 const char *format_ptr
;
2667 /* Repeat is used to turn tail-recursion into iteration. */
2672 code
= GET_CODE (x
);
2674 /* These types may be freely shared so we needn't do any resetting
2696 /* The chain of insns is not being copied. */
2703 RTX_FLAG (x
, used
) = 0;
2705 format_ptr
= GET_RTX_FORMAT (code
);
2706 length
= GET_RTX_LENGTH (code
);
2708 for (i
= 0; i
< length
; i
++)
2710 switch (*format_ptr
++)
2718 reset_used_flags (XEXP (x
, i
));
2722 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2723 reset_used_flags (XVECEXP (x
, i
, j
));
2729 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2730 to look for shared sub-parts. */
2733 set_used_flags (rtx x
)
2737 const char *format_ptr
;
2742 code
= GET_CODE (x
);
2744 /* These types may be freely shared so we needn't do any resetting
2766 /* The chain of insns is not being copied. */
2773 RTX_FLAG (x
, used
) = 1;
2775 format_ptr
= GET_RTX_FORMAT (code
);
2776 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2778 switch (*format_ptr
++)
2781 set_used_flags (XEXP (x
, i
));
2785 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2786 set_used_flags (XVECEXP (x
, i
, j
));
2792 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2793 Return X or the rtx for the pseudo reg the value of X was copied into.
2794 OTHER must be valid as a SET_DEST. */
2797 make_safe_from (rtx x
, rtx other
)
2800 switch (GET_CODE (other
))
2803 other
= SUBREG_REG (other
);
2805 case STRICT_LOW_PART
:
2808 other
= XEXP (other
, 0);
2814 if ((GET_CODE (other
) == MEM
2816 && GET_CODE (x
) != REG
2817 && GET_CODE (x
) != SUBREG
)
2818 || (GET_CODE (other
) == REG
2819 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2820 || reg_mentioned_p (other
, x
))))
2822 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2823 emit_move_insn (temp
, x
);
2829 /* Emission of insns (adding them to the doubly-linked list). */
2831 /* Return the first insn of the current sequence or current function. */
2839 /* Specify a new insn as the first in the chain. */
2842 set_first_insn (rtx insn
)
2844 if (PREV_INSN (insn
) != 0)
2849 /* Return the last insn emitted in current sequence or current function. */
2852 get_last_insn (void)
2857 /* Specify a new insn as the last in the chain. */
2860 set_last_insn (rtx insn
)
2862 if (NEXT_INSN (insn
) != 0)
2867 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2870 get_last_insn_anywhere (void)
2872 struct sequence_stack
*stack
;
2875 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2876 if (stack
->last
!= 0)
2881 /* Return the first nonnote insn emitted in current sequence or current
2882 function. This routine looks inside SEQUENCEs. */
2885 get_first_nonnote_insn (void)
2887 rtx insn
= first_insn
;
2891 insn
= next_insn (insn
);
2892 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2899 /* Return the last nonnote insn emitted in current sequence or current
2900 function. This routine looks inside SEQUENCEs. */
2903 get_last_nonnote_insn (void)
2905 rtx insn
= last_insn
;
2909 insn
= previous_insn (insn
);
2910 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2917 /* Return a number larger than any instruction's uid in this function. */
2922 return cur_insn_uid
;
2925 /* Renumber instructions so that no instruction UIDs are wasted. */
2928 renumber_insns (FILE *stream
)
2932 /* If we're not supposed to renumber instructions, don't. */
2933 if (!flag_renumber_insns
)
2936 /* If there aren't that many instructions, then it's not really
2937 worth renumbering them. */
2938 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2943 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2946 fprintf (stream
, "Renumbering insn %d to %d\n",
2947 INSN_UID (insn
), cur_insn_uid
);
2948 INSN_UID (insn
) = cur_insn_uid
++;
2952 /* Return the next insn. If it is a SEQUENCE, return the first insn
2956 next_insn (rtx insn
)
2960 insn
= NEXT_INSN (insn
);
2961 if (insn
&& GET_CODE (insn
) == INSN
2962 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2963 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2969 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2973 previous_insn (rtx insn
)
2977 insn
= PREV_INSN (insn
);
2978 if (insn
&& GET_CODE (insn
) == INSN
2979 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2980 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2986 /* Return the next insn after INSN that is not a NOTE. This routine does not
2987 look inside SEQUENCEs. */
2990 next_nonnote_insn (rtx insn
)
2994 insn
= NEXT_INSN (insn
);
2995 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3002 /* Return the previous insn before INSN that is not a NOTE. This routine does
3003 not look inside SEQUENCEs. */
3006 prev_nonnote_insn (rtx insn
)
3010 insn
= PREV_INSN (insn
);
3011 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3018 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3019 or 0, if there is none. This routine does not look inside
3023 next_real_insn (rtx insn
)
3027 insn
= NEXT_INSN (insn
);
3028 if (insn
== 0 || GET_CODE (insn
) == INSN
3029 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3036 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3037 or 0, if there is none. This routine does not look inside
3041 prev_real_insn (rtx insn
)
3045 insn
= PREV_INSN (insn
);
3046 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3047 || GET_CODE (insn
) == JUMP_INSN
)
3054 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3055 This routine does not look inside SEQUENCEs. */
3058 last_call_insn (void)
3062 for (insn
= get_last_insn ();
3063 insn
&& GET_CODE (insn
) != CALL_INSN
;
3064 insn
= PREV_INSN (insn
))
3070 /* Find the next insn after INSN that really does something. This routine
3071 does not look inside SEQUENCEs. Until reload has completed, this is the
3072 same as next_real_insn. */
3075 active_insn_p (rtx insn
)
3077 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3078 || (GET_CODE (insn
) == INSN
3079 && (! reload_completed
3080 || (GET_CODE (PATTERN (insn
)) != USE
3081 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3085 next_active_insn (rtx insn
)
3089 insn
= NEXT_INSN (insn
);
3090 if (insn
== 0 || active_insn_p (insn
))
3097 /* Find the last insn before INSN that really does something. This routine
3098 does not look inside SEQUENCEs. Until reload has completed, this is the
3099 same as prev_real_insn. */
3102 prev_active_insn (rtx insn
)
3106 insn
= PREV_INSN (insn
);
3107 if (insn
== 0 || active_insn_p (insn
))
3114 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3117 next_label (rtx insn
)
3121 insn
= NEXT_INSN (insn
);
3122 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3129 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3132 prev_label (rtx insn
)
3136 insn
= PREV_INSN (insn
);
3137 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3145 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3146 and REG_CC_USER notes so we can find it. */
3149 link_cc0_insns (rtx insn
)
3151 rtx user
= next_nonnote_insn (insn
);
3153 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3154 user
= XVECEXP (PATTERN (user
), 0, 0);
3156 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3158 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3161 /* Return the next insn that uses CC0 after INSN, which is assumed to
3162 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3163 applied to the result of this function should yield INSN).
3165 Normally, this is simply the next insn. However, if a REG_CC_USER note
3166 is present, it contains the insn that uses CC0.
3168 Return 0 if we can't find the insn. */
3171 next_cc0_user (rtx insn
)
3173 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3176 return XEXP (note
, 0);
3178 insn
= next_nonnote_insn (insn
);
3179 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3180 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3182 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3188 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3189 note, it is the previous insn. */
3192 prev_cc0_setter (rtx insn
)
3194 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3197 return XEXP (note
, 0);
3199 insn
= prev_nonnote_insn (insn
);
3200 if (! sets_cc0_p (PATTERN (insn
)))
3207 /* Increment the label uses for all labels present in rtx. */
3210 mark_label_nuses (rtx x
)
3216 code
= GET_CODE (x
);
3217 if (code
== LABEL_REF
)
3218 LABEL_NUSES (XEXP (x
, 0))++;
3220 fmt
= GET_RTX_FORMAT (code
);
3221 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3224 mark_label_nuses (XEXP (x
, i
));
3225 else if (fmt
[i
] == 'E')
3226 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3227 mark_label_nuses (XVECEXP (x
, i
, j
));
3232 /* Try splitting insns that can be split for better scheduling.
3233 PAT is the pattern which might split.
3234 TRIAL is the insn providing PAT.
3235 LAST is nonzero if we should return the last insn of the sequence produced.
3237 If this routine succeeds in splitting, it returns the first or last
3238 replacement insn depending on the value of LAST. Otherwise, it
3239 returns TRIAL. If the insn to be returned can be split, it will be. */
3242 try_split (rtx pat
, rtx trial
, int last
)
3244 rtx before
= PREV_INSN (trial
);
3245 rtx after
= NEXT_INSN (trial
);
3246 int has_barrier
= 0;
3250 rtx insn_last
, insn
;
3253 if (any_condjump_p (trial
)
3254 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3255 split_branch_probability
= INTVAL (XEXP (note
, 0));
3256 probability
= split_branch_probability
;
3258 seq
= split_insns (pat
, trial
);
3260 split_branch_probability
= -1;
3262 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3263 We may need to handle this specially. */
3264 if (after
&& GET_CODE (after
) == BARRIER
)
3267 after
= NEXT_INSN (after
);
3273 /* Avoid infinite loop if any insn of the result matches
3274 the original pattern. */
3278 if (INSN_P (insn_last
)
3279 && rtx_equal_p (PATTERN (insn_last
), pat
))
3281 if (!NEXT_INSN (insn_last
))
3283 insn_last
= NEXT_INSN (insn_last
);
3287 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3289 if (GET_CODE (insn
) == JUMP_INSN
)
3291 mark_jump_label (PATTERN (insn
), insn
, 0);
3293 if (probability
!= -1
3294 && any_condjump_p (insn
)
3295 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3297 /* We can preserve the REG_BR_PROB notes only if exactly
3298 one jump is created, otherwise the machine description
3299 is responsible for this step using
3300 split_branch_probability variable. */
3304 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3305 GEN_INT (probability
),
3311 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3312 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3313 if (GET_CODE (trial
) == CALL_INSN
)
3315 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3316 if (GET_CODE (insn
) == CALL_INSN
)
3318 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3321 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3322 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3326 /* Copy notes, particularly those related to the CFG. */
3327 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3329 switch (REG_NOTE_KIND (note
))
3333 while (insn
!= NULL_RTX
)
3335 if (GET_CODE (insn
) == CALL_INSN
3336 || (flag_non_call_exceptions
3337 && may_trap_p (PATTERN (insn
))))
3339 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3342 insn
= PREV_INSN (insn
);
3348 case REG_ALWAYS_RETURN
:
3350 while (insn
!= NULL_RTX
)
3352 if (GET_CODE (insn
) == CALL_INSN
)
3354 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3357 insn
= PREV_INSN (insn
);
3361 case REG_NON_LOCAL_GOTO
:
3363 while (insn
!= NULL_RTX
)
3365 if (GET_CODE (insn
) == JUMP_INSN
)
3367 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3370 insn
= PREV_INSN (insn
);
3379 /* If there are LABELS inside the split insns increment the
3380 usage count so we don't delete the label. */
3381 if (GET_CODE (trial
) == INSN
)
3384 while (insn
!= NULL_RTX
)
3386 if (GET_CODE (insn
) == INSN
)
3387 mark_label_nuses (PATTERN (insn
));
3389 insn
= PREV_INSN (insn
);
3393 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3395 delete_insn (trial
);
3397 emit_barrier_after (tem
);
3399 /* Recursively call try_split for each new insn created; by the
3400 time control returns here that insn will be fully split, so
3401 set LAST and continue from the insn after the one returned.
3402 We can't use next_active_insn here since AFTER may be a note.
3403 Ignore deleted insns, which can be occur if not optimizing. */
3404 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3405 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3406 tem
= try_split (PATTERN (tem
), tem
, 1);
3408 /* Return either the first or the last insn, depending on which was
3411 ? (after
? PREV_INSN (after
) : last_insn
)
3412 : NEXT_INSN (before
);
3415 /* Make and return an INSN rtx, initializing all its slots.
3416 Store PATTERN in the pattern slots. */
3419 make_insn_raw (rtx pattern
)
3423 insn
= rtx_alloc (INSN
);
3425 INSN_UID (insn
) = cur_insn_uid
++;
3426 PATTERN (insn
) = pattern
;
3427 INSN_CODE (insn
) = -1;
3428 LOG_LINKS (insn
) = NULL
;
3429 REG_NOTES (insn
) = NULL
;
3430 INSN_LOCATOR (insn
) = 0;
3431 BLOCK_FOR_INSN (insn
) = NULL
;
3433 #ifdef ENABLE_RTL_CHECKING
3436 && (returnjump_p (insn
)
3437 || (GET_CODE (insn
) == SET
3438 && SET_DEST (insn
) == pc_rtx
)))
3440 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3448 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3451 make_jump_insn_raw (rtx pattern
)
3455 insn
= rtx_alloc (JUMP_INSN
);
3456 INSN_UID (insn
) = cur_insn_uid
++;
3458 PATTERN (insn
) = pattern
;
3459 INSN_CODE (insn
) = -1;
3460 LOG_LINKS (insn
) = NULL
;
3461 REG_NOTES (insn
) = NULL
;
3462 JUMP_LABEL (insn
) = NULL
;
3463 INSN_LOCATOR (insn
) = 0;
3464 BLOCK_FOR_INSN (insn
) = NULL
;
3469 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3472 make_call_insn_raw (rtx pattern
)
3476 insn
= rtx_alloc (CALL_INSN
);
3477 INSN_UID (insn
) = cur_insn_uid
++;
3479 PATTERN (insn
) = pattern
;
3480 INSN_CODE (insn
) = -1;
3481 LOG_LINKS (insn
) = NULL
;
3482 REG_NOTES (insn
) = NULL
;
3483 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3484 INSN_LOCATOR (insn
) = 0;
3485 BLOCK_FOR_INSN (insn
) = NULL
;
3490 /* Add INSN to the end of the doubly-linked list.
3491 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3496 PREV_INSN (insn
) = last_insn
;
3497 NEXT_INSN (insn
) = 0;
3499 if (NULL
!= last_insn
)
3500 NEXT_INSN (last_insn
) = insn
;
3502 if (NULL
== first_insn
)
3508 /* Add INSN into the doubly-linked list after insn AFTER. This and
3509 the next should be the only functions called to insert an insn once
3510 delay slots have been filled since only they know how to update a
3514 add_insn_after (rtx insn
, rtx after
)
3516 rtx next
= NEXT_INSN (after
);
3519 if (optimize
&& INSN_DELETED_P (after
))
3522 NEXT_INSN (insn
) = next
;
3523 PREV_INSN (insn
) = after
;
3527 PREV_INSN (next
) = insn
;
3528 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3529 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3531 else if (last_insn
== after
)
3535 struct sequence_stack
*stack
= seq_stack
;
3536 /* Scan all pending sequences too. */
3537 for (; stack
; stack
= stack
->next
)
3538 if (after
== stack
->last
)
3548 if (GET_CODE (after
) != BARRIER
3549 && GET_CODE (insn
) != BARRIER
3550 && (bb
= BLOCK_FOR_INSN (after
)))
3552 set_block_for_insn (insn
, bb
);
3554 bb
->flags
|= BB_DIRTY
;
3555 /* Should not happen as first in the BB is always
3556 either NOTE or LABEL. */
3557 if (BB_END (bb
) == after
3558 /* Avoid clobbering of structure when creating new BB. */
3559 && GET_CODE (insn
) != BARRIER
3560 && (GET_CODE (insn
) != NOTE
3561 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3565 NEXT_INSN (after
) = insn
;
3566 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3568 rtx sequence
= PATTERN (after
);
3569 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3573 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3574 the previous should be the only functions called to insert an insn once
3575 delay slots have been filled since only they know how to update a
3579 add_insn_before (rtx insn
, rtx before
)
3581 rtx prev
= PREV_INSN (before
);
3584 if (optimize
&& INSN_DELETED_P (before
))
3587 PREV_INSN (insn
) = prev
;
3588 NEXT_INSN (insn
) = before
;
3592 NEXT_INSN (prev
) = insn
;
3593 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3595 rtx sequence
= PATTERN (prev
);
3596 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3599 else if (first_insn
== before
)
3603 struct sequence_stack
*stack
= seq_stack
;
3604 /* Scan all pending sequences too. */
3605 for (; stack
; stack
= stack
->next
)
3606 if (before
== stack
->first
)
3608 stack
->first
= insn
;
3616 if (GET_CODE (before
) != BARRIER
3617 && GET_CODE (insn
) != BARRIER
3618 && (bb
= BLOCK_FOR_INSN (before
)))
3620 set_block_for_insn (insn
, bb
);
3622 bb
->flags
|= BB_DIRTY
;
3623 /* Should not happen as first in the BB is always
3624 either NOTE or LABEl. */
3625 if (BB_HEAD (bb
) == insn
3626 /* Avoid clobbering of structure when creating new BB. */
3627 && GET_CODE (insn
) != BARRIER
3628 && (GET_CODE (insn
) != NOTE
3629 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3633 PREV_INSN (before
) = insn
;
3634 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3635 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3638 /* Remove an insn from its doubly-linked list. This function knows how
3639 to handle sequences. */
3641 remove_insn (rtx insn
)
3643 rtx next
= NEXT_INSN (insn
);
3644 rtx prev
= PREV_INSN (insn
);
3649 NEXT_INSN (prev
) = next
;
3650 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3652 rtx sequence
= PATTERN (prev
);
3653 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3656 else if (first_insn
== insn
)
3660 struct sequence_stack
*stack
= seq_stack
;
3661 /* Scan all pending sequences too. */
3662 for (; stack
; stack
= stack
->next
)
3663 if (insn
== stack
->first
)
3665 stack
->first
= next
;
3675 PREV_INSN (next
) = prev
;
3676 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3677 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3679 else if (last_insn
== insn
)
3683 struct sequence_stack
*stack
= seq_stack
;
3684 /* Scan all pending sequences too. */
3685 for (; stack
; stack
= stack
->next
)
3686 if (insn
== stack
->last
)
3695 if (GET_CODE (insn
) != BARRIER
3696 && (bb
= BLOCK_FOR_INSN (insn
)))
3699 bb
->flags
|= BB_DIRTY
;
3700 if (BB_HEAD (bb
) == insn
)
3702 /* Never ever delete the basic block note without deleting whole
3704 if (GET_CODE (insn
) == NOTE
)
3706 BB_HEAD (bb
) = next
;
3708 if (BB_END (bb
) == insn
)
3713 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3716 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3718 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3721 /* Put the register usage information on the CALL. If there is already
3722 some usage information, put ours at the end. */
3723 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3727 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3728 link
= XEXP (link
, 1))
3731 XEXP (link
, 1) = call_fusage
;
3734 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3737 /* Delete all insns made since FROM.
3738 FROM becomes the new last instruction. */
3741 delete_insns_since (rtx from
)
3746 NEXT_INSN (from
) = 0;
3750 /* This function is deprecated, please use sequences instead.
3752 Move a consecutive bunch of insns to a different place in the chain.
3753 The insns to be moved are those between FROM and TO.
3754 They are moved to a new position after the insn AFTER.
3755 AFTER must not be FROM or TO or any insn in between.
3757 This function does not know about SEQUENCEs and hence should not be
3758 called after delay-slot filling has been done. */
3761 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3763 /* Splice this bunch out of where it is now. */
3764 if (PREV_INSN (from
))
3765 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3767 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3768 if (last_insn
== to
)
3769 last_insn
= PREV_INSN (from
);
3770 if (first_insn
== from
)
3771 first_insn
= NEXT_INSN (to
);
3773 /* Make the new neighbors point to it and it to them. */
3774 if (NEXT_INSN (after
))
3775 PREV_INSN (NEXT_INSN (after
)) = to
;
3777 NEXT_INSN (to
) = NEXT_INSN (after
);
3778 PREV_INSN (from
) = after
;
3779 NEXT_INSN (after
) = from
;
3780 if (after
== last_insn
)
3784 /* Same as function above, but take care to update BB boundaries. */
3786 reorder_insns (rtx from
, rtx to
, rtx after
)
3788 rtx prev
= PREV_INSN (from
);
3789 basic_block bb
, bb2
;
3791 reorder_insns_nobb (from
, to
, after
);
3793 if (GET_CODE (after
) != BARRIER
3794 && (bb
= BLOCK_FOR_INSN (after
)))
3797 bb
->flags
|= BB_DIRTY
;
3799 if (GET_CODE (from
) != BARRIER
3800 && (bb2
= BLOCK_FOR_INSN (from
)))
3802 if (BB_END (bb2
) == to
)
3803 BB_END (bb2
) = prev
;
3804 bb2
->flags
|= BB_DIRTY
;
3807 if (BB_END (bb
) == after
)
3810 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3811 set_block_for_insn (x
, bb
);
3815 /* Return the line note insn preceding INSN. */
3818 find_line_note (rtx insn
)
3820 if (no_line_numbers
)
3823 for (; insn
; insn
= PREV_INSN (insn
))
3824 if (GET_CODE (insn
) == NOTE
3825 && NOTE_LINE_NUMBER (insn
) >= 0)
3831 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3832 of the moved insns when debugging. This may insert a note between AFTER
3833 and FROM, and another one after TO. */
3836 reorder_insns_with_line_notes (rtx from
, rtx to
, rtx after
)
3838 rtx from_line
= find_line_note (from
);
3839 rtx after_line
= find_line_note (after
);
3841 reorder_insns (from
, to
, after
);
3843 if (from_line
== after_line
)
3847 emit_note_copy_after (from_line
, after
);
3849 emit_note_copy_after (after_line
, to
);
3852 /* Remove unnecessary notes from the instruction stream. */
3855 remove_unnecessary_notes (void)
3857 rtx block_stack
= NULL_RTX
;
3858 rtx eh_stack
= NULL_RTX
;
3863 /* We must not remove the first instruction in the function because
3864 the compiler depends on the first instruction being a note. */
3865 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3867 /* Remember what's next. */
3868 next
= NEXT_INSN (insn
);
3870 /* We're only interested in notes. */
3871 if (GET_CODE (insn
) != NOTE
)
3874 switch (NOTE_LINE_NUMBER (insn
))
3876 case NOTE_INSN_DELETED
:
3877 case NOTE_INSN_LOOP_END_TOP_COND
:
3881 case NOTE_INSN_EH_REGION_BEG
:
3882 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3885 case NOTE_INSN_EH_REGION_END
:
3886 /* Too many end notes. */
3887 if (eh_stack
== NULL_RTX
)
3889 /* Mismatched nesting. */
3890 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3893 eh_stack
= XEXP (eh_stack
, 1);
3894 free_INSN_LIST_node (tmp
);
3897 case NOTE_INSN_BLOCK_BEG
:
3898 /* By now, all notes indicating lexical blocks should have
3899 NOTE_BLOCK filled in. */
3900 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3902 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3905 case NOTE_INSN_BLOCK_END
:
3906 /* Too many end notes. */
3907 if (block_stack
== NULL_RTX
)
3909 /* Mismatched nesting. */
3910 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3913 block_stack
= XEXP (block_stack
, 1);
3914 free_INSN_LIST_node (tmp
);
3916 /* Scan back to see if there are any non-note instructions
3917 between INSN and the beginning of this block. If not,
3918 then there is no PC range in the generated code that will
3919 actually be in this block, so there's no point in
3920 remembering the existence of the block. */
3921 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3923 /* This block contains a real instruction. Note that we
3924 don't include labels; if the only thing in the block
3925 is a label, then there are still no PC values that
3926 lie within the block. */
3930 /* We're only interested in NOTEs. */
3931 if (GET_CODE (tmp
) != NOTE
)
3934 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3936 /* We just verified that this BLOCK matches us with
3937 the block_stack check above. Never delete the
3938 BLOCK for the outermost scope of the function; we
3939 can refer to names from that scope even if the
3940 block notes are messed up. */
3941 if (! is_body_block (NOTE_BLOCK (insn
))
3942 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3949 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3950 /* There's a nested block. We need to leave the
3951 current block in place since otherwise the debugger
3952 wouldn't be able to show symbols from our block in
3953 the nested block. */
3959 /* Too many begin notes. */
3960 if (block_stack
|| eh_stack
)
3965 /* Emit insn(s) of given code and pattern
3966 at a specified place within the doubly-linked list.
3968 All of the emit_foo global entry points accept an object
3969 X which is either an insn list or a PATTERN of a single
3972 There are thus a few canonical ways to generate code and
3973 emit it at a specific place in the instruction stream. For
3974 example, consider the instruction named SPOT and the fact that
3975 we would like to emit some instructions before SPOT. We might
3979 ... emit the new instructions ...
3980 insns_head = get_insns ();
3983 emit_insn_before (insns_head, SPOT);
3985 It used to be common to generate SEQUENCE rtl instead, but that
3986 is a relic of the past which no longer occurs. The reason is that
3987 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3988 generated would almost certainly die right after it was created. */
3990 /* Make X be output before the instruction BEFORE. */
3993 emit_insn_before (rtx x
, rtx before
)
3998 #ifdef ENABLE_RTL_CHECKING
3999 if (before
== NULL_RTX
)
4006 switch (GET_CODE (x
))
4017 rtx next
= NEXT_INSN (insn
);
4018 add_insn_before (insn
, before
);
4024 #ifdef ENABLE_RTL_CHECKING
4031 last
= make_insn_raw (x
);
4032 add_insn_before (last
, before
);
4039 /* Make an instruction with body X and code JUMP_INSN
4040 and output it before the instruction BEFORE. */
4043 emit_jump_insn_before (rtx x
, rtx before
)
4045 rtx insn
, last
= NULL_RTX
;
4047 #ifdef ENABLE_RTL_CHECKING
4048 if (before
== NULL_RTX
)
4052 switch (GET_CODE (x
))
4063 rtx next
= NEXT_INSN (insn
);
4064 add_insn_before (insn
, before
);
4070 #ifdef ENABLE_RTL_CHECKING
4077 last
= make_jump_insn_raw (x
);
4078 add_insn_before (last
, before
);
4085 /* Make an instruction with body X and code CALL_INSN
4086 and output it before the instruction BEFORE. */
4089 emit_call_insn_before (rtx x
, rtx before
)
4091 rtx last
= NULL_RTX
, insn
;
4093 #ifdef ENABLE_RTL_CHECKING
4094 if (before
== NULL_RTX
)
4098 switch (GET_CODE (x
))
4109 rtx next
= NEXT_INSN (insn
);
4110 add_insn_before (insn
, before
);
4116 #ifdef ENABLE_RTL_CHECKING
4123 last
= make_call_insn_raw (x
);
4124 add_insn_before (last
, before
);
4131 /* Make an insn of code BARRIER
4132 and output it before the insn BEFORE. */
4135 emit_barrier_before (rtx before
)
4137 rtx insn
= rtx_alloc (BARRIER
);
4139 INSN_UID (insn
) = cur_insn_uid
++;
4141 add_insn_before (insn
, before
);
4145 /* Emit the label LABEL before the insn BEFORE. */
4148 emit_label_before (rtx label
, rtx before
)
4150 /* This can be called twice for the same label as a result of the
4151 confusion that follows a syntax error! So make it harmless. */
4152 if (INSN_UID (label
) == 0)
4154 INSN_UID (label
) = cur_insn_uid
++;
4155 add_insn_before (label
, before
);
4161 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4164 emit_note_before (int subtype
, rtx before
)
4166 rtx note
= rtx_alloc (NOTE
);
4167 INSN_UID (note
) = cur_insn_uid
++;
4168 NOTE_SOURCE_FILE (note
) = 0;
4169 NOTE_LINE_NUMBER (note
) = subtype
;
4170 BLOCK_FOR_INSN (note
) = NULL
;
4172 add_insn_before (note
, before
);
4176 /* Helper for emit_insn_after, handles lists of instructions
4179 static rtx
emit_insn_after_1 (rtx
, rtx
);
4182 emit_insn_after_1 (rtx first
, rtx after
)
4188 if (GET_CODE (after
) != BARRIER
4189 && (bb
= BLOCK_FOR_INSN (after
)))
4191 bb
->flags
|= BB_DIRTY
;
4192 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4193 if (GET_CODE (last
) != BARRIER
)
4194 set_block_for_insn (last
, bb
);
4195 if (GET_CODE (last
) != BARRIER
)
4196 set_block_for_insn (last
, bb
);
4197 if (BB_END (bb
) == after
)
4201 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4204 after_after
= NEXT_INSN (after
);
4206 NEXT_INSN (after
) = first
;
4207 PREV_INSN (first
) = after
;
4208 NEXT_INSN (last
) = after_after
;
4210 PREV_INSN (after_after
) = last
;
4212 if (after
== last_insn
)
4217 /* Make X be output after the insn AFTER. */
4220 emit_insn_after (rtx x
, rtx after
)
4224 #ifdef ENABLE_RTL_CHECKING
4225 if (after
== NULL_RTX
)
4232 switch (GET_CODE (x
))
4240 last
= emit_insn_after_1 (x
, after
);
4243 #ifdef ENABLE_RTL_CHECKING
4250 last
= make_insn_raw (x
);
4251 add_insn_after (last
, after
);
4258 /* Similar to emit_insn_after, except that line notes are to be inserted so
4259 as to act as if this insn were at FROM. */
4262 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4264 rtx from_line
= find_line_note (from
);
4265 rtx after_line
= find_line_note (after
);
4266 rtx insn
= emit_insn_after (x
, after
);
4269 emit_note_copy_after (from_line
, after
);
4272 emit_note_copy_after (after_line
, insn
);
4275 /* Make an insn of code JUMP_INSN with body X
4276 and output it after the insn AFTER. */
4279 emit_jump_insn_after (rtx x
, rtx after
)
4283 #ifdef ENABLE_RTL_CHECKING
4284 if (after
== NULL_RTX
)
4288 switch (GET_CODE (x
))
4296 last
= emit_insn_after_1 (x
, after
);
4299 #ifdef ENABLE_RTL_CHECKING
4306 last
= make_jump_insn_raw (x
);
4307 add_insn_after (last
, after
);
4314 /* Make an instruction with body X and code CALL_INSN
4315 and output it after the instruction AFTER. */
4318 emit_call_insn_after (rtx x
, rtx after
)
4322 #ifdef ENABLE_RTL_CHECKING
4323 if (after
== NULL_RTX
)
4327 switch (GET_CODE (x
))
4335 last
= emit_insn_after_1 (x
, after
);
4338 #ifdef ENABLE_RTL_CHECKING
4345 last
= make_call_insn_raw (x
);
4346 add_insn_after (last
, after
);
4353 /* Make an insn of code BARRIER
4354 and output it after the insn AFTER. */
4357 emit_barrier_after (rtx after
)
4359 rtx insn
= rtx_alloc (BARRIER
);
4361 INSN_UID (insn
) = cur_insn_uid
++;
4363 add_insn_after (insn
, after
);
4367 /* Emit the label LABEL after the insn AFTER. */
4370 emit_label_after (rtx label
, rtx after
)
4372 /* This can be called twice for the same label
4373 as a result of the confusion that follows a syntax error!
4374 So make it harmless. */
4375 if (INSN_UID (label
) == 0)
4377 INSN_UID (label
) = cur_insn_uid
++;
4378 add_insn_after (label
, after
);
4384 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4387 emit_note_after (int subtype
, rtx after
)
4389 rtx note
= rtx_alloc (NOTE
);
4390 INSN_UID (note
) = cur_insn_uid
++;
4391 NOTE_SOURCE_FILE (note
) = 0;
4392 NOTE_LINE_NUMBER (note
) = subtype
;
4393 BLOCK_FOR_INSN (note
) = NULL
;
4394 add_insn_after (note
, after
);
4398 /* Emit a copy of note ORIG after the insn AFTER. */
4401 emit_note_copy_after (rtx orig
, rtx after
)
4405 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4411 note
= rtx_alloc (NOTE
);
4412 INSN_UID (note
) = cur_insn_uid
++;
4413 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4414 NOTE_DATA (note
) = NOTE_DATA (orig
);
4415 BLOCK_FOR_INSN (note
) = NULL
;
4416 add_insn_after (note
, after
);
4420 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4422 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4424 rtx last
= emit_insn_after (pattern
, after
);
4426 if (pattern
== NULL_RTX
)
4429 after
= NEXT_INSN (after
);
4432 if (active_insn_p (after
))
4433 INSN_LOCATOR (after
) = loc
;
4436 after
= NEXT_INSN (after
);
4441 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4443 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4445 rtx last
= emit_jump_insn_after (pattern
, after
);
4447 if (pattern
== NULL_RTX
)
4450 after
= NEXT_INSN (after
);
4453 if (active_insn_p (after
))
4454 INSN_LOCATOR (after
) = loc
;
4457 after
= NEXT_INSN (after
);
4462 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4464 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4466 rtx last
= emit_call_insn_after (pattern
, after
);
4468 if (pattern
== NULL_RTX
)
4471 after
= NEXT_INSN (after
);
4474 if (active_insn_p (after
))
4475 INSN_LOCATOR (after
) = loc
;
4478 after
= NEXT_INSN (after
);
4483 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4485 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4487 rtx first
= PREV_INSN (before
);
4488 rtx last
= emit_insn_before (pattern
, before
);
4490 if (pattern
== NULL_RTX
)
4493 first
= NEXT_INSN (first
);
4496 if (active_insn_p (first
))
4497 INSN_LOCATOR (first
) = loc
;
4500 first
= NEXT_INSN (first
);
4505 /* Take X and emit it at the end of the doubly-linked
4508 Returns the last insn emitted. */
4513 rtx last
= last_insn
;
4519 switch (GET_CODE (x
))
4530 rtx next
= NEXT_INSN (insn
);
4537 #ifdef ENABLE_RTL_CHECKING
4544 last
= make_insn_raw (x
);
4552 /* Make an insn of code JUMP_INSN with pattern X
4553 and add it to the end of the doubly-linked list. */
4556 emit_jump_insn (rtx x
)
4558 rtx last
= NULL_RTX
, insn
;
4560 switch (GET_CODE (x
))
4571 rtx next
= NEXT_INSN (insn
);
4578 #ifdef ENABLE_RTL_CHECKING
4585 last
= make_jump_insn_raw (x
);
4593 /* Make an insn of code CALL_INSN with pattern X
4594 and add it to the end of the doubly-linked list. */
4597 emit_call_insn (rtx x
)
4601 switch (GET_CODE (x
))
4609 insn
= emit_insn (x
);
4612 #ifdef ENABLE_RTL_CHECKING
4619 insn
= make_call_insn_raw (x
);
4627 /* Add the label LABEL to the end of the doubly-linked list. */
4630 emit_label (rtx label
)
4632 /* This can be called twice for the same label
4633 as a result of the confusion that follows a syntax error!
4634 So make it harmless. */
4635 if (INSN_UID (label
) == 0)
4637 INSN_UID (label
) = cur_insn_uid
++;
4643 /* Make an insn of code BARRIER
4644 and add it to the end of the doubly-linked list. */
4649 rtx barrier
= rtx_alloc (BARRIER
);
4650 INSN_UID (barrier
) = cur_insn_uid
++;
4655 /* Make line numbering NOTE insn for LOCATION add it to the end
4656 of the doubly-linked list, but only if line-numbers are desired for
4657 debugging info and it doesn't match the previous one. */
4660 emit_line_note (location_t location
)
4664 set_file_and_line_for_stmt (location
);
4666 if (location
.file
&& last_location
.file
4667 && !strcmp (location
.file
, last_location
.file
)
4668 && location
.line
== last_location
.line
)
4670 last_location
= location
;
4672 if (no_line_numbers
)
4678 note
= emit_note (location
.line
);
4679 NOTE_SOURCE_FILE (note
) = location
.file
;
4684 /* Emit a copy of note ORIG. */
4687 emit_note_copy (rtx orig
)
4691 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4697 note
= rtx_alloc (NOTE
);
4699 INSN_UID (note
) = cur_insn_uid
++;
4700 NOTE_DATA (note
) = NOTE_DATA (orig
);
4701 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4702 BLOCK_FOR_INSN (note
) = NULL
;
4708 /* Make an insn of code NOTE or type NOTE_NO
4709 and add it to the end of the doubly-linked list. */
4712 emit_note (int note_no
)
4716 note
= rtx_alloc (NOTE
);
4717 INSN_UID (note
) = cur_insn_uid
++;
4718 NOTE_LINE_NUMBER (note
) = note_no
;
4719 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4720 BLOCK_FOR_INSN (note
) = NULL
;
4725 /* Cause next statement to emit a line note even if the line number
4729 force_next_line_note (void)
4731 last_location
.line
= -1;
4734 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4735 note of this type already exists, remove it first. */
4738 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4740 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4746 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4747 has multiple sets (some callers assume single_set
4748 means the insn only has one set, when in fact it
4749 means the insn only has one * useful * set). */
4750 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4757 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4758 It serves no useful purpose and breaks eliminate_regs. */
4759 if (GET_CODE (datum
) == ASM_OPERANDS
)
4769 XEXP (note
, 0) = datum
;
4773 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4774 return REG_NOTES (insn
);
4777 /* Return an indication of which type of insn should have X as a body.
4778 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4781 classify_insn (rtx x
)
4783 if (GET_CODE (x
) == CODE_LABEL
)
4785 if (GET_CODE (x
) == CALL
)
4787 if (GET_CODE (x
) == RETURN
)
4789 if (GET_CODE (x
) == SET
)
4791 if (SET_DEST (x
) == pc_rtx
)
4793 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4798 if (GET_CODE (x
) == PARALLEL
)
4801 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4802 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4804 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4805 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4807 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4808 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4814 /* Emit the rtl pattern X as an appropriate kind of insn.
4815 If X is a label, it is simply added into the insn chain. */
4820 enum rtx_code code
= classify_insn (x
);
4822 if (code
== CODE_LABEL
)
4823 return emit_label (x
);
4824 else if (code
== INSN
)
4825 return emit_insn (x
);
4826 else if (code
== JUMP_INSN
)
4828 rtx insn
= emit_jump_insn (x
);
4829 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4830 return emit_barrier ();
4833 else if (code
== CALL_INSN
)
4834 return emit_call_insn (x
);
4839 /* Space for free sequence stack entries. */
4840 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4842 /* Begin emitting insns to a sequence which can be packaged in an
4843 RTL_EXPR. If this sequence will contain something that might cause
4844 the compiler to pop arguments to function calls (because those
4845 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4846 details), use do_pending_stack_adjust before calling this function.
4847 That will ensure that the deferred pops are not accidentally
4848 emitted in the middle of this sequence. */
4851 start_sequence (void)
4853 struct sequence_stack
*tem
;
4855 if (free_sequence_stack
!= NULL
)
4857 tem
= free_sequence_stack
;
4858 free_sequence_stack
= tem
->next
;
4861 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4863 tem
->next
= seq_stack
;
4864 tem
->first
= first_insn
;
4865 tem
->last
= last_insn
;
4866 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4874 /* Similarly, but indicate that this sequence will be placed in T, an
4875 RTL_EXPR. See the documentation for start_sequence for more
4876 information about how to use this function. */
4879 start_sequence_for_rtl_expr (tree t
)
4886 /* Set up the insn chain starting with FIRST as the current sequence,
4887 saving the previously current one. See the documentation for
4888 start_sequence for more information about how to use this function. */
4891 push_to_sequence (rtx first
)
4897 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4903 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4906 push_to_full_sequence (rtx first
, rtx last
)
4911 /* We really should have the end of the insn chain here. */
4912 if (last
&& NEXT_INSN (last
))
4916 /* Set up the outer-level insn chain
4917 as the current sequence, saving the previously current one. */
4920 push_topmost_sequence (void)
4922 struct sequence_stack
*stack
, *top
= NULL
;
4926 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4929 first_insn
= top
->first
;
4930 last_insn
= top
->last
;
4931 seq_rtl_expr
= top
->sequence_rtl_expr
;
4934 /* After emitting to the outer-level insn chain, update the outer-level
4935 insn chain, and restore the previous saved state. */
4938 pop_topmost_sequence (void)
4940 struct sequence_stack
*stack
, *top
= NULL
;
4942 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4945 top
->first
= first_insn
;
4946 top
->last
= last_insn
;
4947 /* ??? Why don't we save seq_rtl_expr here? */
4952 /* After emitting to a sequence, restore previous saved state.
4954 To get the contents of the sequence just made, you must call
4955 `get_insns' *before* calling here.
4957 If the compiler might have deferred popping arguments while
4958 generating this sequence, and this sequence will not be immediately
4959 inserted into the instruction stream, use do_pending_stack_adjust
4960 before calling get_insns. That will ensure that the deferred
4961 pops are inserted into this sequence, and not into some random
4962 location in the instruction stream. See INHIBIT_DEFER_POP for more
4963 information about deferred popping of arguments. */
4968 struct sequence_stack
*tem
= seq_stack
;
4970 first_insn
= tem
->first
;
4971 last_insn
= tem
->last
;
4972 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4973 seq_stack
= tem
->next
;
4975 memset (tem
, 0, sizeof (*tem
));
4976 tem
->next
= free_sequence_stack
;
4977 free_sequence_stack
= tem
;
4980 /* This works like end_sequence, but records the old sequence in FIRST
4984 end_full_sequence (rtx
*first
, rtx
*last
)
4986 *first
= first_insn
;
4991 /* Return 1 if currently emitting into a sequence. */
4994 in_sequence_p (void)
4996 return seq_stack
!= 0;
4999 /* Put the various virtual registers into REGNO_REG_RTX. */
5002 init_virtual_regs (struct emit_status
*es
)
5004 rtx
*ptr
= es
->x_regno_reg_rtx
;
5005 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5006 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5007 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5008 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5009 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5013 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5014 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5015 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5016 static int copy_insn_n_scratches
;
5018 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5019 copied an ASM_OPERANDS.
5020 In that case, it is the original input-operand vector. */
5021 static rtvec orig_asm_operands_vector
;
5023 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5024 copied an ASM_OPERANDS.
5025 In that case, it is the copied input-operand vector. */
5026 static rtvec copy_asm_operands_vector
;
5028 /* Likewise for the constraints vector. */
5029 static rtvec orig_asm_constraints_vector
;
5030 static rtvec copy_asm_constraints_vector
;
5032 /* Recursively create a new copy of an rtx for copy_insn.
5033 This function differs from copy_rtx in that it handles SCRATCHes and
5034 ASM_OPERANDs properly.
5035 Normally, this function is not used directly; use copy_insn as front end.
5036 However, you could first copy an insn pattern with copy_insn and then use
5037 this function afterwards to properly copy any REG_NOTEs containing
5041 copy_insn_1 (rtx orig
)
5046 const char *format_ptr
;
5048 code
= GET_CODE (orig
);
5064 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5069 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5070 if (copy_insn_scratch_in
[i
] == orig
)
5071 return copy_insn_scratch_out
[i
];
5075 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5076 a LABEL_REF, it isn't sharable. */
5077 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5078 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5079 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5083 /* A MEM with a constant address is not sharable. The problem is that
5084 the constant address may need to be reloaded. If the mem is shared,
5085 then reloading one copy of this mem will cause all copies to appear
5086 to have been reloaded. */
5092 copy
= rtx_alloc (code
);
5094 /* Copy the various flags, and other information. We assume that
5095 all fields need copying, and then clear the fields that should
5096 not be copied. That is the sensible default behavior, and forces
5097 us to explicitly document why we are *not* copying a flag. */
5098 memcpy (copy
, orig
, RTX_HDR_SIZE
);
5100 /* We do not copy the USED flag, which is used as a mark bit during
5101 walks over the RTL. */
5102 RTX_FLAG (copy
, used
) = 0;
5104 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5105 if (GET_RTX_CLASS (code
) == 'i')
5107 RTX_FLAG (copy
, jump
) = 0;
5108 RTX_FLAG (copy
, call
) = 0;
5109 RTX_FLAG (copy
, frame_related
) = 0;
5112 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5114 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5116 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5117 switch (*format_ptr
++)
5120 if (XEXP (orig
, i
) != NULL
)
5121 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5126 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5127 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5128 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5129 XVEC (copy
, i
) = copy_asm_operands_vector
;
5130 else if (XVEC (orig
, i
) != NULL
)
5132 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5133 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5134 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5145 /* These are left unchanged. */
5153 if (code
== SCRATCH
)
5155 i
= copy_insn_n_scratches
++;
5156 if (i
>= MAX_RECOG_OPERANDS
)
5158 copy_insn_scratch_in
[i
] = orig
;
5159 copy_insn_scratch_out
[i
] = copy
;
5161 else if (code
== ASM_OPERANDS
)
5163 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5164 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5165 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5166 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5172 /* Create a new copy of an rtx.
5173 This function differs from copy_rtx in that it handles SCRATCHes and
5174 ASM_OPERANDs properly.
5175 INSN doesn't really have to be a full INSN; it could be just the
5178 copy_insn (rtx insn
)
5180 copy_insn_n_scratches
= 0;
5181 orig_asm_operands_vector
= 0;
5182 orig_asm_constraints_vector
= 0;
5183 copy_asm_operands_vector
= 0;
5184 copy_asm_constraints_vector
= 0;
5185 return copy_insn_1 (insn
);
5188 /* Initialize data structures and variables in this file
5189 before generating rtl for each function. */
5194 struct function
*f
= cfun
;
5196 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5199 seq_rtl_expr
= NULL
;
5201 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5202 last_location
.line
= 0;
5203 last_location
.file
= 0;
5204 first_label_num
= label_num
;
5208 /* Init the tables that describe all the pseudo regs. */
5210 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5212 f
->emit
->regno_pointer_align
5213 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5214 * sizeof (unsigned char));
5217 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5219 /* Put copies of all the hard registers into regno_reg_rtx. */
5220 memcpy (regno_reg_rtx
,
5221 static_regno_reg_rtx
,
5222 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5224 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5225 init_virtual_regs (f
->emit
);
5227 /* Indicate that the virtual registers and stack locations are
5229 REG_POINTER (stack_pointer_rtx
) = 1;
5230 REG_POINTER (frame_pointer_rtx
) = 1;
5231 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5232 REG_POINTER (arg_pointer_rtx
) = 1;
5234 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5235 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5236 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5237 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5238 REG_POINTER (virtual_cfa_rtx
) = 1;
5240 #ifdef STACK_BOUNDARY
5241 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5242 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5243 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5244 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5246 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5247 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5248 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5249 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5250 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5253 #ifdef INIT_EXPANDERS
5258 /* Generate the constant 0. */
5261 gen_const_vector_0 (enum machine_mode mode
)
5266 enum machine_mode inner
;
5268 units
= GET_MODE_NUNITS (mode
);
5269 inner
= GET_MODE_INNER (mode
);
5271 v
= rtvec_alloc (units
);
5273 /* We need to call this function after we to set CONST0_RTX first. */
5274 if (!CONST0_RTX (inner
))
5277 for (i
= 0; i
< units
; ++i
)
5278 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5280 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5284 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5285 all elements are zero. */
5287 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5289 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5292 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5293 if (RTVEC_ELT (v
, i
) != inner_zero
)
5294 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5295 return CONST0_RTX (mode
);
5298 /* Create some permanent unique rtl objects shared between all functions.
5299 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5302 init_emit_once (int line_numbers
)
5305 enum machine_mode mode
;
5306 enum machine_mode double_mode
;
5308 /* We need reg_raw_mode, so initialize the modes now. */
5309 init_reg_modes_once ();
5311 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5313 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5314 const_int_htab_eq
, NULL
);
5316 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5317 const_double_htab_eq
, NULL
);
5319 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5320 mem_attrs_htab_eq
, NULL
);
5321 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5322 reg_attrs_htab_eq
, NULL
);
5324 no_line_numbers
= ! line_numbers
;
5326 /* Compute the word and byte modes. */
5328 byte_mode
= VOIDmode
;
5329 word_mode
= VOIDmode
;
5330 double_mode
= VOIDmode
;
5332 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5333 mode
= GET_MODE_WIDER_MODE (mode
))
5335 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5336 && byte_mode
== VOIDmode
)
5339 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5340 && word_mode
== VOIDmode
)
5344 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5345 mode
= GET_MODE_WIDER_MODE (mode
))
5347 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5348 && double_mode
== VOIDmode
)
5352 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5354 /* Assign register numbers to the globally defined register rtx.
5355 This must be done at runtime because the register number field
5356 is in a union and some compilers can't initialize unions. */
5358 pc_rtx
= gen_rtx_PC (VOIDmode
);
5359 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5360 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5361 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5362 if (hard_frame_pointer_rtx
== 0)
5363 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5364 HARD_FRAME_POINTER_REGNUM
);
5365 if (arg_pointer_rtx
== 0)
5366 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5367 virtual_incoming_args_rtx
=
5368 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5369 virtual_stack_vars_rtx
=
5370 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5371 virtual_stack_dynamic_rtx
=
5372 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5373 virtual_outgoing_args_rtx
=
5374 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5375 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5377 /* Initialize RTL for commonly used hard registers. These are
5378 copied into regno_reg_rtx as we begin to compile each function. */
5379 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5380 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5382 #ifdef INIT_EXPANDERS
5383 /* This is to initialize {init|mark|free}_machine_status before the first
5384 call to push_function_context_to. This is needed by the Chill front
5385 end which calls push_function_context_to before the first call to
5386 init_function_start. */
5390 /* Create the unique rtx's for certain rtx codes and operand values. */
5392 /* Don't use gen_rtx here since gen_rtx in this case
5393 tries to use these variables. */
5394 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5395 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5396 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5398 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5399 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5400 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5402 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5404 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5405 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5406 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5407 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5408 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5409 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5410 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5412 dconsthalf
= dconst1
;
5415 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5417 /* Initialize mathematical constants for constant folding builtins.
5418 These constants need to be given to at least 160 bits precision. */
5419 real_from_string (&dconstpi
,
5420 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5421 real_from_string (&dconste
,
5422 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5424 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5426 REAL_VALUE_TYPE
*r
=
5427 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5429 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5430 mode
= GET_MODE_WIDER_MODE (mode
))
5431 const_tiny_rtx
[i
][(int) mode
] =
5432 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5434 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5436 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5437 mode
= GET_MODE_WIDER_MODE (mode
))
5438 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5440 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5442 mode
= GET_MODE_WIDER_MODE (mode
))
5443 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5446 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5448 mode
= GET_MODE_WIDER_MODE (mode
))
5449 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5451 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5453 mode
= GET_MODE_WIDER_MODE (mode
))
5454 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5456 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5457 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5458 const_tiny_rtx
[0][i
] = const0_rtx
;
5460 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5461 if (STORE_FLAG_VALUE
== 1)
5462 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5464 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5465 return_address_pointer_rtx
5466 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5469 #ifdef STATIC_CHAIN_REGNUM
5470 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5472 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5473 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5474 static_chain_incoming_rtx
5475 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5478 static_chain_incoming_rtx
= static_chain_rtx
;
5482 static_chain_rtx
= STATIC_CHAIN
;
5484 #ifdef STATIC_CHAIN_INCOMING
5485 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5487 static_chain_incoming_rtx
= static_chain_rtx
;
5491 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5492 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5495 /* Query and clear/ restore no_line_numbers. This is used by the
5496 switch / case handling in stmt.c to give proper line numbers in
5497 warnings about unreachable code. */
5500 force_line_numbers (void)
5502 int old
= no_line_numbers
;
5504 no_line_numbers
= 0;
5506 force_next_line_note ();
5511 restore_line_number_status (int old_value
)
5513 no_line_numbers
= old_value
;
5516 /* Produce exact duplicate of insn INSN after AFTER.
5517 Care updating of libcall regions if present. */
5520 emit_copy_of_insn_after (rtx insn
, rtx after
)
5523 rtx note1
, note2
, link
;
5525 switch (GET_CODE (insn
))
5528 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5532 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5536 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5537 if (CALL_INSN_FUNCTION_USAGE (insn
))
5538 CALL_INSN_FUNCTION_USAGE (new)
5539 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5540 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5541 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5548 /* Update LABEL_NUSES. */
5549 mark_jump_label (PATTERN (new), new, 0);
5551 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5553 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5555 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5556 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5558 if (GET_CODE (link
) == EXPR_LIST
)
5560 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5565 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5570 /* Fix the libcall sequences. */
5571 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5574 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5576 XEXP (note1
, 0) = p
;
5577 XEXP (note2
, 0) = new;
5579 INSN_CODE (new) = INSN_CODE (insn
);
5583 static GTY((deletable(""))) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5585 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5587 if (hard_reg_clobbers
[mode
][regno
])
5588 return hard_reg_clobbers
[mode
][regno
];
5590 return (hard_reg_clobbers
[mode
][regno
] =
5591 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5594 #include "gt-emit-rtl.h"