1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl
[GR_MAX
];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab
;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn
;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 static rtx make_jump_insn_raw
PARAMS ((rtx
));
175 static rtx make_call_insn_raw
PARAMS ((rtx
));
176 static rtx find_line_note
PARAMS ((rtx
));
177 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
178 static void unshare_all_rtl_1
PARAMS ((rtx
));
179 static void unshare_all_decls
PARAMS ((tree
));
180 static void reset_used_decls
PARAMS ((tree
));
181 static void mark_label_nuses
PARAMS ((rtx
));
182 static hashval_t const_int_htab_hash
PARAMS ((const void *));
183 static int const_int_htab_eq
PARAMS ((const void *,
185 static int rtx_htab_mark_1
PARAMS ((void **, void *));
186 static void rtx_htab_mark
PARAMS ((void *));
188 /* Probability of the conditional branch currently proceeded by try_split.
189 Set to -1 otherwise. */
190 int split_branch_probability
= -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (x
)
199 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
202 /* Returns non-zero if the value represented by X (which is really a
203 CONST_INT) is the same as that given by Y (which is really a
207 const_int_htab_eq (x
, y
)
211 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
214 /* Mark the hash-table element X (which is really a pointer to an
218 rtx_htab_mark_1 (x
, data
)
220 void *data ATTRIBUTE_UNUSED
;
226 /* Mark all the elements of HTAB (which is really an htab_t full of
233 htab_traverse (*((htab_t
*) htab
), rtx_htab_mark_1
, NULL
);
236 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
237 don't attempt to share with the various global pieces of rtl (such as
238 frame_pointer_rtx). */
241 gen_raw_REG (mode
, regno
)
242 enum machine_mode mode
;
245 rtx x
= gen_rtx_raw_REG (mode
, regno
);
246 ORIGINAL_REGNO (x
) = regno
;
250 /* There are some RTL codes that require special attention; the generation
251 functions do the raw handling. If you add to this list, modify
252 special_rtx in gengenrtl.c as well. */
255 gen_rtx_CONST_INT (mode
, arg
)
256 enum machine_mode mode ATTRIBUTE_UNUSED
;
261 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
262 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
264 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
265 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
266 return const_true_rtx
;
269 /* Look up the CONST_INT in the hash table. */
270 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
271 (hashval_t
) arg
, INSERT
);
273 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
278 /* CONST_DOUBLEs needs special handling because their length is known
282 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
283 enum machine_mode mode
;
285 HOST_WIDE_INT arg1
, arg2
;
287 rtx r
= rtx_alloc (CONST_DOUBLE
);
292 X0EXP (r
, 1) = NULL_RTX
;
296 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
303 gen_rtx_REG (mode
, regno
)
304 enum machine_mode mode
;
307 /* In case the MD file explicitly references the frame pointer, have
308 all such references point to the same frame pointer. This is
309 used during frame pointer elimination to distinguish the explicit
310 references to these registers from pseudos that happened to be
313 If we have eliminated the frame pointer or arg pointer, we will
314 be using it as a normal register, for example as a spill
315 register. In such cases, we might be accessing it in a mode that
316 is not Pmode and therefore cannot use the pre-allocated rtx.
318 Also don't do this when we are making new REGs in reload, since
319 we don't want to get confused with the real pointers. */
321 if (mode
== Pmode
&& !reload_in_progress
)
323 if (regno
== FRAME_POINTER_REGNUM
)
324 return frame_pointer_rtx
;
325 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
326 if (regno
== HARD_FRAME_POINTER_REGNUM
)
327 return hard_frame_pointer_rtx
;
329 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
330 if (regno
== ARG_POINTER_REGNUM
)
331 return arg_pointer_rtx
;
333 #ifdef RETURN_ADDRESS_POINTER_REGNUM
334 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
335 return return_address_pointer_rtx
;
337 if (regno
== STACK_POINTER_REGNUM
)
338 return stack_pointer_rtx
;
341 return gen_raw_REG (mode
, regno
);
345 gen_rtx_MEM (mode
, addr
)
346 enum machine_mode mode
;
349 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
351 /* This field is not cleared by the mere allocation of the rtx, so
353 MEM_ALIAS_SET (rt
) = 0;
359 gen_rtx_SUBREG (mode
, reg
, offset
)
360 enum machine_mode mode
;
364 /* This is the most common failure type.
365 Catch it early so we can see who does it. */
366 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
369 /* This check isn't usable right now because combine will
370 throw arbitrary crap like a CALL into a SUBREG in
371 gen_lowpart_for_combine so we must just eat it. */
373 /* Check for this too. */
374 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
377 return gen_rtx_fmt_ei (SUBREG
, mode
, reg
, offset
);
380 /* Generate a SUBREG representing the least-significant part
381 * of REG if MODE is smaller than mode of REG, otherwise
382 * paradoxical SUBREG. */
384 gen_lowpart_SUBREG (mode
, reg
)
385 enum machine_mode mode
;
388 enum machine_mode inmode
;
390 inmode
= GET_MODE (reg
);
391 if (inmode
== VOIDmode
)
393 return gen_rtx_SUBREG (mode
, reg
,
394 subreg_lowpart_offset (mode
, inmode
));
397 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
399 ** This routine generates an RTX of the size specified by
400 ** <code>, which is an RTX code. The RTX structure is initialized
401 ** from the arguments <element1> through <elementn>, which are
402 ** interpreted according to the specific RTX type's format. The
403 ** special machine mode associated with the rtx (if any) is specified
406 ** gen_rtx can be invoked in a way which resembles the lisp-like
407 ** rtx it will generate. For example, the following rtx structure:
409 ** (plus:QI (mem:QI (reg:SI 1))
410 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
412 ** ...would be generated by the following C code:
414 ** gen_rtx (PLUS, QImode,
415 ** gen_rtx (MEM, QImode,
416 ** gen_rtx (REG, SImode, 1)),
417 ** gen_rtx (MEM, QImode,
418 ** gen_rtx (PLUS, SImode,
419 ** gen_rtx (REG, SImode, 2),
420 ** gen_rtx (REG, SImode, 3)))),
425 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
427 register int i
; /* Array indices... */
428 register const char *fmt
; /* Current rtx's format... */
429 register rtx rt_val
; /* RTX to return to caller... */
432 VA_FIXEDARG (p
, enum rtx_code
, code
);
433 VA_FIXEDARG (p
, enum machine_mode
, mode
);
438 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
443 rtx arg0
= va_arg (p
, rtx
);
444 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
445 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
446 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
451 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
455 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
459 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
460 rt_val
->mode
= mode
; /* Store the machine mode... */
462 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
463 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
467 case '0': /* Unused field. */
470 case 'i': /* An integer? */
471 XINT (rt_val
, i
) = va_arg (p
, int);
474 case 'w': /* A wide integer? */
475 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
478 case 's': /* A string? */
479 XSTR (rt_val
, i
) = va_arg (p
, char *);
482 case 'e': /* An expression? */
483 case 'u': /* An insn? Same except when printing. */
484 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
487 case 'E': /* An RTX vector? */
488 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
491 case 'b': /* A bitmap? */
492 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
495 case 't': /* A tree? */
496 XTREE (rt_val
, i
) = va_arg (p
, tree
);
510 /* gen_rtvec (n, [rt1, ..., rtn])
512 ** This routine creates an rtvec and stores within it the
513 ** pointers to rtx's which are its arguments.
518 gen_rtvec
VPARAMS ((int n
, ...))
524 VA_FIXEDARG (p
, int, n
);
527 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
529 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
531 for (i
= 0; i
< n
; i
++)
532 vector
[i
] = va_arg (p
, rtx
);
534 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
538 return gen_rtvec_v (save_n
, vector
);
542 gen_rtvec_v (n
, argp
)
547 register rtvec rt_val
;
550 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
552 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
554 for (i
= 0; i
< n
; i
++)
555 rt_val
->elem
[i
] = *argp
++;
561 /* Generate a REG rtx for a new pseudo register of mode MODE.
562 This pseudo is assigned the next sequential register number. */
566 enum machine_mode mode
;
568 struct function
*f
= cfun
;
571 /* Don't let anything called after initial flow analysis create new
576 if (generating_concat_p
577 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
578 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
580 /* For complex modes, don't make a single pseudo.
581 Instead, make a CONCAT of two pseudos.
582 This allows noncontiguous allocation of the real and imaginary parts,
583 which makes much better code. Besides, allocating DCmode
584 pseudos overstrains reload on some machines like the 386. */
585 rtx realpart
, imagpart
;
586 int size
= GET_MODE_UNIT_SIZE (mode
);
587 enum machine_mode partmode
588 = mode_for_size (size
* BITS_PER_UNIT
,
589 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
590 ? MODE_FLOAT
: MODE_INT
),
593 realpart
= gen_reg_rtx (partmode
);
594 imagpart
= gen_reg_rtx (partmode
);
595 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
598 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
599 to have an element for this pseudo reg number. */
601 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
603 int old_size
= f
->emit
->regno_pointer_align_length
;
606 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
607 memset (new + old_size
, 0, old_size
);
608 f
->emit
->regno_pointer_align
= (unsigned char *) new;
610 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
611 old_size
* 2 * sizeof (rtx
));
612 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
613 regno_reg_rtx
= new1
;
615 f
->emit
->regno_pointer_align_length
= old_size
* 2;
618 val
= gen_raw_REG (mode
, reg_rtx_no
);
619 regno_reg_rtx
[reg_rtx_no
++] = val
;
623 /* Identify REG (which may be a CONCAT) as a user register. */
629 if (GET_CODE (reg
) == CONCAT
)
631 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
632 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
634 else if (GET_CODE (reg
) == REG
)
635 REG_USERVAR_P (reg
) = 1;
640 /* Identify REG as a probable pointer register and show its alignment
641 as ALIGN, if nonzero. */
644 mark_reg_pointer (reg
, align
)
648 if (! REG_POINTER (reg
))
650 REG_POINTER (reg
) = 1;
653 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
655 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
656 /* We can no-longer be sure just how aligned this pointer is */
657 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
660 /* Return 1 plus largest pseudo reg number used in the current function. */
668 /* Return 1 + the largest label number used so far in the current function. */
673 if (last_label_num
&& label_num
== base_label_num
)
674 return last_label_num
;
678 /* Return first label number used in this function (if any were used). */
681 get_first_label_num ()
683 return first_label_num
;
686 /* Return the final regno of X, which is a SUBREG of a hard
689 subreg_hard_regno (x
, check_mode
)
693 enum machine_mode mode
= GET_MODE (x
);
694 unsigned int byte_offset
, base_regno
, final_regno
;
695 rtx reg
= SUBREG_REG (x
);
697 /* This is where we attempt to catch illegal subregs
698 created by the compiler. */
699 if (GET_CODE (x
) != SUBREG
700 || GET_CODE (reg
) != REG
)
702 base_regno
= REGNO (reg
);
703 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
705 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
708 /* Catch non-congruent offsets too. */
709 byte_offset
= SUBREG_BYTE (x
);
710 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
713 final_regno
= subreg_regno (x
);
718 /* Return a value representing some low-order bits of X, where the number
719 of low-order bits is given by MODE. Note that no conversion is done
720 between floating-point and fixed-point values, rather, the bit
721 representation is returned.
723 This function handles the cases in common between gen_lowpart, below,
724 and two variants in cse.c and combine.c. These are the cases that can
725 be safely handled at all points in the compilation.
727 If this is not a case we can handle, return 0. */
730 gen_lowpart_common (mode
, x
)
731 enum machine_mode mode
;
734 int msize
= GET_MODE_SIZE (mode
);
735 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
738 if (GET_MODE (x
) == mode
)
741 /* MODE must occupy no more words than the mode of X. */
742 if (GET_MODE (x
) != VOIDmode
743 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
744 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
747 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
749 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
750 && (GET_MODE_CLASS (mode
) == MODE_INT
751 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
753 /* If we are getting the low-order part of something that has been
754 sign- or zero-extended, we can either just use the object being
755 extended or make a narrower extension. If we want an even smaller
756 piece than the size of the object being extended, call ourselves
759 This case is used mostly by combine and cse. */
761 if (GET_MODE (XEXP (x
, 0)) == mode
)
763 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
764 return gen_lowpart_common (mode
, XEXP (x
, 0));
765 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
766 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
768 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
769 || GET_CODE (x
) == CONCAT
)
770 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
771 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
772 from the low-order part of the constant. */
773 else if ((GET_MODE_CLASS (mode
) == MODE_INT
774 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
775 && GET_MODE (x
) == VOIDmode
776 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
778 /* If MODE is twice the host word size, X is already the desired
779 representation. Otherwise, if MODE is wider than a word, we can't
780 do this. If MODE is exactly a word, return just one CONST_INT. */
782 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
784 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
786 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
787 return (GET_CODE (x
) == CONST_INT
? x
788 : GEN_INT (CONST_DOUBLE_LOW (x
)));
791 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
792 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
793 : CONST_DOUBLE_LOW (x
));
795 /* Sign extend to HOST_WIDE_INT. */
796 val
= trunc_int_for_mode (val
, mode
);
798 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
803 #ifndef REAL_ARITHMETIC
804 /* If X is an integral constant but we want it in floating-point, it
805 must be the case that we have a union of an integer and a floating-point
806 value. If the machine-parameters allow it, simulate that union here
807 and return the result. The two-word and single-word cases are
810 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
811 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
812 || flag_pretend_float
)
813 && GET_MODE_CLASS (mode
) == MODE_FLOAT
814 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
815 && GET_CODE (x
) == CONST_INT
816 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
818 union {HOST_WIDE_INT i
; float d
; } u
;
821 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
823 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
824 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
825 || flag_pretend_float
)
826 && GET_MODE_CLASS (mode
) == MODE_FLOAT
827 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
828 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
829 && GET_MODE (x
) == VOIDmode
830 && (sizeof (double) * HOST_BITS_PER_CHAR
831 == 2 * HOST_BITS_PER_WIDE_INT
))
833 union {HOST_WIDE_INT i
[2]; double d
; } u
;
834 HOST_WIDE_INT low
, high
;
836 if (GET_CODE (x
) == CONST_INT
)
837 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
839 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
841 #ifdef HOST_WORDS_BIG_ENDIAN
842 u
.i
[0] = high
, u
.i
[1] = low
;
844 u
.i
[0] = low
, u
.i
[1] = high
;
847 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
850 /* Similarly, if this is converting a floating-point value into a
851 single-word integer. Only do this is the host and target parameters are
854 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
855 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
856 || flag_pretend_float
)
857 && (GET_MODE_CLASS (mode
) == MODE_INT
858 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
859 && GET_CODE (x
) == CONST_DOUBLE
860 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
861 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
862 return constant_subword (x
, (offset
/ UNITS_PER_WORD
), GET_MODE (x
));
864 /* Similarly, if this is converting a floating-point value into a
865 two-word integer, we can do this one word at a time and make an
866 integer. Only do this is the host and target parameters are
869 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
870 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
871 || flag_pretend_float
)
872 && (GET_MODE_CLASS (mode
) == MODE_INT
873 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
874 && GET_CODE (x
) == CONST_DOUBLE
875 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
876 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
878 rtx lowpart
, highpart
;
880 lowpart
= constant_subword (x
,
881 (offset
/ UNITS_PER_WORD
) + WORDS_BIG_ENDIAN
,
883 highpart
= constant_subword (x
,
884 (offset
/ UNITS_PER_WORD
) + (! WORDS_BIG_ENDIAN
),
886 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
887 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
888 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
890 #else /* ifndef REAL_ARITHMETIC */
892 /* When we have a FP emulator, we can handle all conversions between
893 FP and integer operands. This simplifies reload because it
894 doesn't have to deal with constructs like (subreg:DI
895 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
896 /* Single-precision floats are always 32-bits and double-precision
897 floats are always 64-bits. */
899 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
900 && GET_MODE_BITSIZE (mode
) == 32
901 && GET_CODE (x
) == CONST_INT
)
907 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
908 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
910 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
911 && GET_MODE_BITSIZE (mode
) == 64
912 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
913 && GET_MODE (x
) == VOIDmode
)
917 HOST_WIDE_INT low
, high
;
919 if (GET_CODE (x
) == CONST_INT
)
922 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
926 low
= CONST_DOUBLE_LOW (x
);
927 high
= CONST_DOUBLE_HIGH (x
);
930 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
932 if (WORDS_BIG_ENDIAN
)
933 i
[0] = high
, i
[1] = low
;
935 i
[0] = low
, i
[1] = high
;
937 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
938 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
940 else if ((GET_MODE_CLASS (mode
) == MODE_INT
941 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
942 && GET_CODE (x
) == CONST_DOUBLE
943 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
946 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
947 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
949 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
950 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
953 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[endian
]);
957 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
);
960 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
964 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
970 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
972 #if HOST_BITS_PER_WIDE_INT == 32
973 return immed_double_const (i
[endian
], i
[1 - endian
], mode
);
978 if (HOST_BITS_PER_WIDE_INT
!= 64)
981 for (c
= 0; c
< 4; c
++)
984 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
988 return immed_double_const (((unsigned long) i
[endian
]) |
989 (((HOST_WIDE_INT
) i
[1-endian
]) << 32),
993 return immed_double_const (((unsigned long) i
[endian
*3]) |
994 (((HOST_WIDE_INT
) i
[1+endian
]) << 32),
995 ((unsigned long) i
[2-endian
]) |
996 (((HOST_WIDE_INT
) i
[3-endian
*3]) << 32),
1004 #endif /* ifndef REAL_ARITHMETIC */
1006 /* Otherwise, we can't do this. */
1010 /* Return the real part (which has mode MODE) of a complex value X.
1011 This always comes at the low address in memory. */
1014 gen_realpart (mode
, x
)
1015 enum machine_mode mode
;
1018 if (WORDS_BIG_ENDIAN
1019 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1021 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1023 ("Can't access real part of complex value in hard register");
1024 else if (WORDS_BIG_ENDIAN
)
1025 return gen_highpart (mode
, x
);
1027 return gen_lowpart (mode
, x
);
1030 /* Return the imaginary part (which has mode MODE) of a complex value X.
1031 This always comes at the high address in memory. */
1034 gen_imagpart (mode
, x
)
1035 enum machine_mode mode
;
1038 if (WORDS_BIG_ENDIAN
)
1039 return gen_lowpart (mode
, x
);
1040 else if (! WORDS_BIG_ENDIAN
1041 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1043 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1045 ("can't access imaginary part of complex value in hard register");
1047 return gen_highpart (mode
, x
);
1050 /* Return 1 iff X, assumed to be a SUBREG,
1051 refers to the real part of the complex value in its containing reg.
1052 Complex values are always stored with the real part in the first word,
1053 regardless of WORDS_BIG_ENDIAN. */
1056 subreg_realpart_p (x
)
1059 if (GET_CODE (x
) != SUBREG
)
1062 return ((unsigned int) SUBREG_BYTE (x
)
1063 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1066 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1067 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1068 least-significant part of X.
1069 MODE specifies how big a part of X to return;
1070 it usually should not be larger than a word.
1071 If X is a MEM whose address is a QUEUED, the value may be so also. */
1074 gen_lowpart (mode
, x
)
1075 enum machine_mode mode
;
1078 rtx result
= gen_lowpart_common (mode
, x
);
1082 else if (GET_CODE (x
) == REG
)
1084 /* Must be a hard reg that's not valid in MODE. */
1085 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1090 else if (GET_CODE (x
) == MEM
)
1092 /* The only additional case we can do is MEM. */
1093 register int offset
= 0;
1094 if (WORDS_BIG_ENDIAN
)
1095 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1096 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1098 if (BYTES_BIG_ENDIAN
)
1099 /* Adjust the address so that the address-after-the-data
1101 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1102 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1104 return adjust_address (x
, mode
, offset
);
1106 else if (GET_CODE (x
) == ADDRESSOF
)
1107 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1112 /* Like `gen_lowpart', but refer to the most significant part.
1113 This is used to access the imaginary part of a complex number. */
1116 gen_highpart (mode
, x
)
1117 enum machine_mode mode
;
1120 unsigned int msize
= GET_MODE_SIZE (mode
);
1123 /* This case loses if X is a subreg. To catch bugs early,
1124 complain if an invalid MODE is used even in other cases. */
1125 if (msize
> UNITS_PER_WORD
1126 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1129 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1130 subreg_highpart_offset (mode
, GET_MODE (x
)));
1132 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1133 the target if we have a MEM. gen_highpart must return a valid operand,
1134 emitting code if necessary to do so. */
1135 if (GET_CODE (result
) == MEM
)
1136 result
= validize_mem (result
);
1143 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1144 be VOIDmode constant. */
1146 gen_highpart_mode (outermode
, innermode
, exp
)
1147 enum machine_mode outermode
, innermode
;
1150 if (GET_MODE (exp
) != VOIDmode
)
1152 if (GET_MODE (exp
) != innermode
)
1154 return gen_highpart (outermode
, exp
);
1156 return simplify_gen_subreg (outermode
, exp
, innermode
,
1157 subreg_highpart_offset (outermode
, innermode
));
1159 /* Return offset in bytes to get OUTERMODE low part
1160 of the value in mode INNERMODE stored in memory in target format. */
1163 subreg_lowpart_offset (outermode
, innermode
)
1164 enum machine_mode outermode
, innermode
;
1166 unsigned int offset
= 0;
1167 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1171 if (WORDS_BIG_ENDIAN
)
1172 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1173 if (BYTES_BIG_ENDIAN
)
1174 offset
+= difference
% UNITS_PER_WORD
;
1180 /* Return offset in bytes to get OUTERMODE high part
1181 of the value in mode INNERMODE stored in memory in target format. */
1183 subreg_highpart_offset (outermode
, innermode
)
1184 enum machine_mode outermode
, innermode
;
1186 unsigned int offset
= 0;
1187 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1189 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1194 if (! WORDS_BIG_ENDIAN
)
1195 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1196 if (! BYTES_BIG_ENDIAN
)
1197 offset
+= difference
% UNITS_PER_WORD
;
1203 /* Return 1 iff X, assumed to be a SUBREG,
1204 refers to the least significant part of its containing reg.
1205 If X is not a SUBREG, always return 1 (it is its own low part!). */
1208 subreg_lowpart_p (x
)
1211 if (GET_CODE (x
) != SUBREG
)
1213 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1216 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1217 == SUBREG_BYTE (x
));
1221 /* Helper routine for all the constant cases of operand_subword.
1222 Some places invoke this directly. */
1225 constant_subword (op
, offset
, mode
)
1228 enum machine_mode mode
;
1230 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1233 /* If OP is already an integer word, return it. */
1234 if (GET_MODE_CLASS (mode
) == MODE_INT
1235 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1238 #ifdef REAL_ARITHMETIC
1239 /* The output is some bits, the width of the target machine's word.
1240 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1242 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1243 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1244 && GET_MODE_BITSIZE (mode
) == 64
1245 && GET_CODE (op
) == CONST_DOUBLE
)
1250 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1251 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1253 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1254 which the words are written depends on the word endianness.
1255 ??? This is a potential portability problem and should
1256 be fixed at some point.
1258 We must excercise caution with the sign bit. By definition there
1259 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1260 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1261 So we explicitly mask and sign-extend as necessary. */
1262 if (BITS_PER_WORD
== 32)
1265 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1266 return GEN_INT (val
);
1268 #if HOST_BITS_PER_WIDE_INT >= 64
1269 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1271 val
= k
[! WORDS_BIG_ENDIAN
];
1272 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1273 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1274 return GEN_INT (val
);
1277 else if (BITS_PER_WORD
== 16)
1279 val
= k
[offset
>> 1];
1280 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1282 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1283 return GEN_INT (val
);
1288 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1289 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1290 && GET_MODE_BITSIZE (mode
) > 64
1291 && GET_CODE (op
) == CONST_DOUBLE
)
1296 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1297 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1299 if (BITS_PER_WORD
== 32)
1302 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1303 return GEN_INT (val
);
1305 #if HOST_BITS_PER_WIDE_INT >= 64
1306 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1308 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1309 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1310 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1311 return GEN_INT (val
);
1317 #else /* no REAL_ARITHMETIC */
1318 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1319 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1320 || flag_pretend_float
)
1321 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1322 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1323 && GET_CODE (op
) == CONST_DOUBLE
)
1325 /* The constant is stored in the host's word-ordering,
1326 but we want to access it in the target's word-ordering. Some
1327 compilers don't like a conditional inside macro args, so we have two
1328 copies of the return. */
1329 #ifdef HOST_WORDS_BIG_ENDIAN
1330 return GEN_INT (offset
== WORDS_BIG_ENDIAN
1331 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1333 return GEN_INT (offset
!= WORDS_BIG_ENDIAN
1334 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1337 #endif /* no REAL_ARITHMETIC */
1339 /* Single word float is a little harder, since single- and double-word
1340 values often do not have the same high-order bits. We have already
1341 verified that we want the only defined word of the single-word value. */
1342 #ifdef REAL_ARITHMETIC
1343 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1344 && GET_MODE_BITSIZE (mode
) == 32
1345 && GET_CODE (op
) == CONST_DOUBLE
)
1350 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1351 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1353 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1355 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1357 if (BITS_PER_WORD
== 16)
1359 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1361 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1364 return GEN_INT (val
);
1367 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1368 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1369 || flag_pretend_float
)
1370 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1371 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1372 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1373 && GET_CODE (op
) == CONST_DOUBLE
)
1376 union {float f
; HOST_WIDE_INT i
; } u
;
1378 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1381 return GEN_INT (u
.i
);
1383 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1384 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1385 || flag_pretend_float
)
1386 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1387 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1388 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1389 && GET_CODE (op
) == CONST_DOUBLE
)
1392 union {double d
; HOST_WIDE_INT i
; } u
;
1394 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1397 return GEN_INT (u
.i
);
1399 #endif /* no REAL_ARITHMETIC */
1401 /* The only remaining cases that we can handle are integers.
1402 Convert to proper endianness now since these cases need it.
1403 At this point, offset == 0 means the low-order word.
1405 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1406 in general. However, if OP is (const_int 0), we can just return
1409 if (op
== const0_rtx
)
1412 if (GET_MODE_CLASS (mode
) != MODE_INT
1413 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1414 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1417 if (WORDS_BIG_ENDIAN
)
1418 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1420 /* Find out which word on the host machine this value is in and get
1421 it from the constant. */
1422 val
= (offset
/ size_ratio
== 0
1423 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1424 : (GET_CODE (op
) == CONST_INT
1425 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1427 /* Get the value we want into the low bits of val. */
1428 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1429 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1431 val
= trunc_int_for_mode (val
, word_mode
);
1433 return GEN_INT (val
);
1436 /* Return subword OFFSET of operand OP.
1437 The word number, OFFSET, is interpreted as the word number starting
1438 at the low-order address. OFFSET 0 is the low-order word if not
1439 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1441 If we cannot extract the required word, we return zero. Otherwise,
1442 an rtx corresponding to the requested word will be returned.
1444 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1445 reload has completed, a valid address will always be returned. After
1446 reload, if a valid address cannot be returned, we return zero.
1448 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1449 it is the responsibility of the caller.
1451 MODE is the mode of OP in case it is a CONST_INT.
1453 ??? This is still rather broken for some cases. The problem for the
1454 moment is that all callers of this thing provide no 'goal mode' to
1455 tell us to work with. This exists because all callers were written
1456 in a word based SUBREG world.
1457 Now use of this function can be deprecated by simplify_subreg in most
1462 operand_subword (op
, offset
, validate_address
, mode
)
1464 unsigned int offset
;
1465 int validate_address
;
1466 enum machine_mode mode
;
1468 if (mode
== VOIDmode
)
1469 mode
= GET_MODE (op
);
1471 if (mode
== VOIDmode
)
1474 /* If OP is narrower than a word, fail. */
1476 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1479 /* If we want a word outside OP, return zero. */
1481 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1484 /* Form a new MEM at the requested address. */
1485 if (GET_CODE (op
) == MEM
)
1487 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1489 if (! validate_address
)
1492 else if (reload_completed
)
1494 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1498 return replace_equiv_address (new, XEXP (new, 0));
1501 /* Rest can be handled by simplify_subreg. */
1502 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1505 /* Similar to `operand_subword', but never return 0. If we can't extract
1506 the required subword, put OP into a register and try again. If that fails,
1507 abort. We always validate the address in this case.
1509 MODE is the mode of OP, in case it is CONST_INT. */
1512 operand_subword_force (op
, offset
, mode
)
1514 unsigned int offset
;
1515 enum machine_mode mode
;
1517 rtx result
= operand_subword (op
, offset
, 1, mode
);
1522 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1524 /* If this is a register which can not be accessed by words, copy it
1525 to a pseudo register. */
1526 if (GET_CODE (op
) == REG
)
1527 op
= copy_to_reg (op
);
1529 op
= force_reg (mode
, op
);
1532 result
= operand_subword (op
, offset
, 1, mode
);
1539 /* Given a compare instruction, swap the operands.
1540 A test instruction is changed into a compare of 0 against the operand. */
1543 reverse_comparison (insn
)
1546 rtx body
= PATTERN (insn
);
1549 if (GET_CODE (body
) == SET
)
1550 comp
= SET_SRC (body
);
1552 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1554 if (GET_CODE (comp
) == COMPARE
)
1556 rtx op0
= XEXP (comp
, 0);
1557 rtx op1
= XEXP (comp
, 1);
1558 XEXP (comp
, 0) = op1
;
1559 XEXP (comp
, 1) = op0
;
1563 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1564 CONST0_RTX (GET_MODE (comp
)), comp
);
1565 if (GET_CODE (body
) == SET
)
1566 SET_SRC (body
) = new;
1568 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1572 /* Return a memory reference like MEMREF, but with its mode changed
1573 to MODE and its address changed to ADDR.
1574 (VOIDmode means don't change the mode.
1575 NULL for ADDR means don't change the address.)
1576 VALIDATE is nonzero if the returned memory location is required to be
1580 change_address_1 (memref
, mode
, addr
, validate
)
1582 enum machine_mode mode
;
1588 if (GET_CODE (memref
) != MEM
)
1590 if (mode
== VOIDmode
)
1591 mode
= GET_MODE (memref
);
1593 addr
= XEXP (memref
, 0);
1597 if (reload_in_progress
|| reload_completed
)
1599 if (! memory_address_p (mode
, addr
))
1603 addr
= memory_address (mode
, addr
);
1606 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1609 new = gen_rtx_MEM (mode
, addr
);
1610 MEM_COPY_ATTRIBUTES (new, memref
);
1614 /* Return a memory reference like MEMREF, but with its mode changed
1615 to MODE and its address offset by OFFSET bytes. */
1618 adjust_address (memref
, mode
, offset
)
1620 enum machine_mode mode
;
1621 HOST_WIDE_INT offset
;
1623 /* For now, this is just a wrapper for change_address, but eventually
1624 will do memref tracking. */
1625 rtx addr
= XEXP (memref
, 0);
1627 /* ??? Prefer to create garbage instead of creating shared rtl. */
1628 addr
= copy_rtx (addr
);
1630 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1631 object, we can merge it into the LO_SUM. */
1632 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1634 && (unsigned HOST_WIDE_INT
) offset
1635 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1636 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1637 plus_constant (XEXP (addr
, 1), offset
));
1639 addr
= plus_constant (addr
, offset
);
1641 return change_address (memref
, mode
, addr
);
1644 /* Likewise, but the reference is not required to be valid. */
1647 adjust_address_nv (memref
, mode
, offset
)
1649 enum machine_mode mode
;
1650 HOST_WIDE_INT offset
;
1652 /* For now, this is just a wrapper for change_address, but eventually
1653 will do memref tracking. */
1654 rtx addr
= XEXP (memref
, 0);
1656 /* If MEMREF is a LO_SUM and the offset is within the size of the
1657 object, we can merge it into the LO_SUM. */
1658 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1660 && (unsigned HOST_WIDE_INT
) offset
1661 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1662 addr
= gen_rtx_LO_SUM (mode
, XEXP (addr
, 0),
1663 plus_constant (XEXP (addr
, 1), offset
));
1665 addr
= plus_constant (addr
, offset
);
1667 return change_address_1 (memref
, mode
, addr
, 0);
1670 /* Return a memory reference like MEMREF, but with its address changed to
1671 ADDR. The caller is asserting that the actual piece of memory pointed
1672 to is the same, just the form of the address is being changed, such as
1673 by putting something into a register. */
1676 replace_equiv_address (memref
, addr
)
1680 /* For now, this is just a wrapper for change_address, but eventually
1681 will do memref tracking. */
1682 return change_address (memref
, VOIDmode
, addr
);
1684 /* Likewise, but the reference is not required to be valid. */
1687 replace_equiv_address_nv (memref
, addr
)
1691 /* For now, this is just a wrapper for change_address, but eventually
1692 will do memref tracking. */
1693 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1696 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1703 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1704 NULL_RTX
, label_num
++, NULL
, NULL
);
1706 LABEL_NUSES (label
) = 0;
1707 LABEL_ALTERNATE_NAME (label
) = NULL
;
1711 /* For procedure integration. */
1713 /* Install new pointers to the first and last insns in the chain.
1714 Also, set cur_insn_uid to one higher than the last in use.
1715 Used for an inline-procedure after copying the insn chain. */
1718 set_new_first_and_last_insn (first
, last
)
1727 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1728 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1733 /* Set the range of label numbers found in the current function.
1734 This is used when belatedly compiling an inline function. */
1737 set_new_first_and_last_label_num (first
, last
)
1740 base_label_num
= label_num
;
1741 first_label_num
= first
;
1742 last_label_num
= last
;
1745 /* Set the last label number found in the current function.
1746 This is used when belatedly compiling an inline function. */
1749 set_new_last_label_num (last
)
1752 base_label_num
= label_num
;
1753 last_label_num
= last
;
1756 /* Restore all variables describing the current status from the structure *P.
1757 This is used after a nested function. */
1760 restore_emit_status (p
)
1761 struct function
*p ATTRIBUTE_UNUSED
;
1764 clear_emit_caches ();
1767 /* Clear out all parts of the state in F that can safely be discarded
1768 after the function has been compiled, to let garbage collection
1769 reclaim the memory. */
1772 free_emit_status (f
)
1775 free (f
->emit
->x_regno_reg_rtx
);
1776 free (f
->emit
->regno_pointer_align
);
1781 /* Go through all the RTL insn bodies and copy any invalid shared
1782 structure. This routine should only be called once. */
1785 unshare_all_rtl (fndecl
, insn
)
1791 /* Make sure that virtual parameters are not shared. */
1792 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
1793 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
1795 /* Make sure that virtual stack slots are not shared. */
1796 unshare_all_decls (DECL_INITIAL (fndecl
));
1798 /* Unshare just about everything else. */
1799 unshare_all_rtl_1 (insn
);
1801 /* Make sure the addresses of stack slots found outside the insn chain
1802 (such as, in DECL_RTL of a variable) are not shared
1803 with the insn chain.
1805 This special care is necessary when the stack slot MEM does not
1806 actually appear in the insn chain. If it does appear, its address
1807 is unshared from all else at that point. */
1808 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
1811 /* Go through all the RTL insn bodies and copy any invalid shared
1812 structure, again. This is a fairly expensive thing to do so it
1813 should be done sparingly. */
1816 unshare_all_rtl_again (insn
)
1822 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1825 reset_used_flags (PATTERN (p
));
1826 reset_used_flags (REG_NOTES (p
));
1827 reset_used_flags (LOG_LINKS (p
));
1830 /* Make sure that virtual stack slots are not shared. */
1831 reset_used_decls (DECL_INITIAL (cfun
->decl
));
1833 /* Make sure that virtual parameters are not shared. */
1834 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
1835 reset_used_flags (DECL_RTL (decl
));
1837 reset_used_flags (stack_slot_list
);
1839 unshare_all_rtl (cfun
->decl
, insn
);
1842 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1843 Assumes the mark bits are cleared at entry. */
1846 unshare_all_rtl_1 (insn
)
1849 for (; insn
; insn
= NEXT_INSN (insn
))
1852 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1853 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1854 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1858 /* Go through all virtual stack slots of a function and copy any
1859 shared structure. */
1861 unshare_all_decls (blk
)
1866 /* Copy shared decls. */
1867 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1868 if (DECL_RTL_SET_P (t
))
1869 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
1871 /* Now process sub-blocks. */
1872 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1873 unshare_all_decls (t
);
1876 /* Go through all virtual stack slots of a function and mark them as
1879 reset_used_decls (blk
)
1885 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1886 if (DECL_RTL_SET_P (t
))
1887 reset_used_flags (DECL_RTL (t
));
1889 /* Now process sub-blocks. */
1890 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1891 reset_used_decls (t
);
1894 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1895 Recursively does the same for subexpressions. */
1898 copy_rtx_if_shared (orig
)
1901 register rtx x
= orig
;
1903 register enum rtx_code code
;
1904 register const char *format_ptr
;
1910 code
= GET_CODE (x
);
1912 /* These types may be freely shared. */
1925 /* SCRATCH must be shared because they represent distinct values. */
1929 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1930 a LABEL_REF, it isn't sharable. */
1931 if (GET_CODE (XEXP (x
, 0)) == PLUS
1932 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1933 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1942 /* The chain of insns is not being copied. */
1946 /* A MEM is allowed to be shared if its address is constant.
1948 We used to allow sharing of MEMs which referenced
1949 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1950 that can lose. instantiate_virtual_regs will not unshare
1951 the MEMs, and combine may change the structure of the address
1952 because it looks safe and profitable in one context, but
1953 in some other context it creates unrecognizable RTL. */
1954 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
1963 /* This rtx may not be shared. If it has already been seen,
1964 replace it with a copy of itself. */
1970 copy
= rtx_alloc (code
);
1972 (sizeof (*copy
) - sizeof (copy
->fld
)
1973 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1979 /* Now scan the subexpressions recursively.
1980 We can store any replaced subexpressions directly into X
1981 since we know X is not shared! Any vectors in X
1982 must be copied if X was copied. */
1984 format_ptr
= GET_RTX_FORMAT (code
);
1986 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1988 switch (*format_ptr
++)
1991 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1995 if (XVEC (x
, i
) != NULL
)
1998 int len
= XVECLEN (x
, i
);
2000 if (copied
&& len
> 0)
2001 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2002 for (j
= 0; j
< len
; j
++)
2003 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2011 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2012 to look for shared sub-parts. */
2015 reset_used_flags (x
)
2019 register enum rtx_code code
;
2020 register const char *format_ptr
;
2025 code
= GET_CODE (x
);
2027 /* These types may be freely shared so we needn't do any resetting
2048 /* The chain of insns is not being copied. */
2057 format_ptr
= GET_RTX_FORMAT (code
);
2058 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2060 switch (*format_ptr
++)
2063 reset_used_flags (XEXP (x
, i
));
2067 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2068 reset_used_flags (XVECEXP (x
, i
, j
));
2074 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2075 Return X or the rtx for the pseudo reg the value of X was copied into.
2076 OTHER must be valid as a SET_DEST. */
2079 make_safe_from (x
, other
)
2083 switch (GET_CODE (other
))
2086 other
= SUBREG_REG (other
);
2088 case STRICT_LOW_PART
:
2091 other
= XEXP (other
, 0);
2097 if ((GET_CODE (other
) == MEM
2099 && GET_CODE (x
) != REG
2100 && GET_CODE (x
) != SUBREG
)
2101 || (GET_CODE (other
) == REG
2102 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2103 || reg_mentioned_p (other
, x
))))
2105 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2106 emit_move_insn (temp
, x
);
2112 /* Emission of insns (adding them to the doubly-linked list). */
2114 /* Return the first insn of the current sequence or current function. */
2122 /* Return the last insn emitted in current sequence or current function. */
2130 /* Specify a new insn as the last in the chain. */
2133 set_last_insn (insn
)
2136 if (NEXT_INSN (insn
) != 0)
2141 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2144 get_last_insn_anywhere ()
2146 struct sequence_stack
*stack
;
2149 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2150 if (stack
->last
!= 0)
2155 /* Return a number larger than any instruction's uid in this function. */
2160 return cur_insn_uid
;
2163 /* Renumber instructions so that no instruction UIDs are wasted. */
2166 renumber_insns (stream
)
2171 /* If we're not supposed to renumber instructions, don't. */
2172 if (!flag_renumber_insns
)
2175 /* If there aren't that many instructions, then it's not really
2176 worth renumbering them. */
2177 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2182 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2185 fprintf (stream
, "Renumbering insn %d to %d\n",
2186 INSN_UID (insn
), cur_insn_uid
);
2187 INSN_UID (insn
) = cur_insn_uid
++;
2191 /* Return the next insn. If it is a SEQUENCE, return the first insn
2200 insn
= NEXT_INSN (insn
);
2201 if (insn
&& GET_CODE (insn
) == INSN
2202 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2203 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2209 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2213 previous_insn (insn
)
2218 insn
= PREV_INSN (insn
);
2219 if (insn
&& GET_CODE (insn
) == INSN
2220 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2221 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2227 /* Return the next insn after INSN that is not a NOTE. This routine does not
2228 look inside SEQUENCEs. */
2231 next_nonnote_insn (insn
)
2236 insn
= NEXT_INSN (insn
);
2237 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2244 /* Return the previous insn before INSN that is not a NOTE. This routine does
2245 not look inside SEQUENCEs. */
2248 prev_nonnote_insn (insn
)
2253 insn
= PREV_INSN (insn
);
2254 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2261 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2262 or 0, if there is none. This routine does not look inside
2266 next_real_insn (insn
)
2271 insn
= NEXT_INSN (insn
);
2272 if (insn
== 0 || GET_CODE (insn
) == INSN
2273 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2280 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2281 or 0, if there is none. This routine does not look inside
2285 prev_real_insn (insn
)
2290 insn
= PREV_INSN (insn
);
2291 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2292 || GET_CODE (insn
) == JUMP_INSN
)
2299 /* Find the next insn after INSN that really does something. This routine
2300 does not look inside SEQUENCEs. Until reload has completed, this is the
2301 same as next_real_insn. */
2304 active_insn_p (insn
)
2307 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2308 || (GET_CODE (insn
) == INSN
2309 && (! reload_completed
2310 || (GET_CODE (PATTERN (insn
)) != USE
2311 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2315 next_active_insn (insn
)
2320 insn
= NEXT_INSN (insn
);
2321 if (insn
== 0 || active_insn_p (insn
))
2328 /* Find the last insn before INSN that really does something. This routine
2329 does not look inside SEQUENCEs. Until reload has completed, this is the
2330 same as prev_real_insn. */
2333 prev_active_insn (insn
)
2338 insn
= PREV_INSN (insn
);
2339 if (insn
== 0 || active_insn_p (insn
))
2346 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2354 insn
= NEXT_INSN (insn
);
2355 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2362 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2370 insn
= PREV_INSN (insn
);
2371 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2379 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2380 and REG_CC_USER notes so we can find it. */
2383 link_cc0_insns (insn
)
2386 rtx user
= next_nonnote_insn (insn
);
2388 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2389 user
= XVECEXP (PATTERN (user
), 0, 0);
2391 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2393 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2396 /* Return the next insn that uses CC0 after INSN, which is assumed to
2397 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2398 applied to the result of this function should yield INSN).
2400 Normally, this is simply the next insn. However, if a REG_CC_USER note
2401 is present, it contains the insn that uses CC0.
2403 Return 0 if we can't find the insn. */
2406 next_cc0_user (insn
)
2409 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2412 return XEXP (note
, 0);
2414 insn
= next_nonnote_insn (insn
);
2415 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2416 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2418 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2424 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2425 note, it is the previous insn. */
2428 prev_cc0_setter (insn
)
2431 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2434 return XEXP (note
, 0);
2436 insn
= prev_nonnote_insn (insn
);
2437 if (! sets_cc0_p (PATTERN (insn
)))
2444 /* Increment the label uses for all labels present in rtx. */
2450 register enum rtx_code code
;
2452 register const char *fmt
;
2454 code
= GET_CODE (x
);
2455 if (code
== LABEL_REF
)
2456 LABEL_NUSES (XEXP (x
, 0))++;
2458 fmt
= GET_RTX_FORMAT (code
);
2459 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2462 mark_label_nuses (XEXP (x
, i
));
2463 else if (fmt
[i
] == 'E')
2464 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2465 mark_label_nuses (XVECEXP (x
, i
, j
));
2470 /* Try splitting insns that can be split for better scheduling.
2471 PAT is the pattern which might split.
2472 TRIAL is the insn providing PAT.
2473 LAST is non-zero if we should return the last insn of the sequence produced.
2475 If this routine succeeds in splitting, it returns the first or last
2476 replacement insn depending on the value of LAST. Otherwise, it
2477 returns TRIAL. If the insn to be returned can be split, it will be. */
2480 try_split (pat
, trial
, last
)
2484 rtx before
= PREV_INSN (trial
);
2485 rtx after
= NEXT_INSN (trial
);
2486 int has_barrier
= 0;
2491 if (any_condjump_p (trial
)
2492 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
2493 split_branch_probability
= INTVAL (XEXP (note
, 0));
2494 probability
= split_branch_probability
;
2496 seq
= split_insns (pat
, trial
);
2498 split_branch_probability
= -1;
2500 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2501 We may need to handle this specially. */
2502 if (after
&& GET_CODE (after
) == BARRIER
)
2505 after
= NEXT_INSN (after
);
2510 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2511 The latter case will normally arise only when being done so that
2512 it, in turn, will be split (SFmode on the 29k is an example). */
2513 if (GET_CODE (seq
) == SEQUENCE
)
2517 /* Avoid infinite loop if any insn of the result matches
2518 the original pattern. */
2519 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2520 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2521 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2525 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2526 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2528 rtx insn
= XVECEXP (seq
, 0, i
);
2529 mark_jump_label (PATTERN (insn
),
2530 XVECEXP (seq
, 0, i
), 0);
2532 if (probability
!= -1
2533 && any_condjump_p (insn
)
2534 && !find_reg_note (insn
, REG_BR_PROB
, 0))
2536 /* We can preserve the REG_BR_PROB notes only if exactly
2537 one jump is created, otherwise the machinde description
2538 is responsible for this step using
2539 split_branch_probability variable. */
2543 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
2544 GEN_INT (probability
),
2549 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2550 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2551 if (GET_CODE (trial
) == CALL_INSN
)
2552 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2553 if (GET_CODE (XVECEXP (seq
, 0, i
)) == CALL_INSN
)
2554 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq
, 0, i
))
2555 = CALL_INSN_FUNCTION_USAGE (trial
);
2557 /* Copy notes, particularly those related to the CFG. */
2558 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
2560 switch (REG_NOTE_KIND (note
))
2563 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2565 rtx insn
= XVECEXP (seq
, 0, i
);
2566 if (GET_CODE (insn
) == CALL_INSN
2567 || (flag_non_call_exceptions
2568 && may_trap_p (PATTERN (insn
))))
2570 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
2578 case REG_ALWAYS_RETURN
:
2579 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2581 rtx insn
= XVECEXP (seq
, 0, i
);
2582 if (GET_CODE (insn
) == CALL_INSN
)
2584 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
2590 case REG_NON_LOCAL_GOTO
:
2591 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2593 rtx insn
= XVECEXP (seq
, 0, i
);
2594 if (GET_CODE (insn
) == JUMP_INSN
)
2596 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
2607 /* If there are LABELS inside the split insns increment the
2608 usage count so we don't delete the label. */
2609 if (GET_CODE (trial
) == INSN
)
2610 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2611 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
)
2612 mark_label_nuses (PATTERN (XVECEXP (seq
, 0, i
)));
2614 tem
= emit_insn_after (seq
, trial
);
2616 delete_insn (trial
);
2618 emit_barrier_after (tem
);
2620 /* Recursively call try_split for each new insn created; by the
2621 time control returns here that insn will be fully split, so
2622 set LAST and continue from the insn after the one returned.
2623 We can't use next_active_insn here since AFTER may be a note.
2624 Ignore deleted insns, which can be occur if not optimizing. */
2625 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
2626 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
2627 tem
= try_split (PATTERN (tem
), tem
, 1);
2629 /* Avoid infinite loop if the result matches the original pattern. */
2630 else if (rtx_equal_p (seq
, pat
))
2634 PATTERN (trial
) = seq
;
2635 INSN_CODE (trial
) = -1;
2636 try_split (seq
, trial
, last
);
2639 /* Return either the first or the last insn, depending on which was
2642 ? (after
? PREV_INSN (after
) : last_insn
)
2643 : NEXT_INSN (before
);
2649 /* Make and return an INSN rtx, initializing all its slots.
2650 Store PATTERN in the pattern slots. */
2653 make_insn_raw (pattern
)
2658 insn
= rtx_alloc (INSN
);
2660 INSN_UID (insn
) = cur_insn_uid
++;
2661 PATTERN (insn
) = pattern
;
2662 INSN_CODE (insn
) = -1;
2663 LOG_LINKS (insn
) = NULL
;
2664 REG_NOTES (insn
) = NULL
;
2666 #ifdef ENABLE_RTL_CHECKING
2669 && (returnjump_p (insn
)
2670 || (GET_CODE (insn
) == SET
2671 && SET_DEST (insn
) == pc_rtx
)))
2673 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2681 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2684 make_jump_insn_raw (pattern
)
2689 insn
= rtx_alloc (JUMP_INSN
);
2690 INSN_UID (insn
) = cur_insn_uid
++;
2692 PATTERN (insn
) = pattern
;
2693 INSN_CODE (insn
) = -1;
2694 LOG_LINKS (insn
) = NULL
;
2695 REG_NOTES (insn
) = NULL
;
2696 JUMP_LABEL (insn
) = NULL
;
2701 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2704 make_call_insn_raw (pattern
)
2709 insn
= rtx_alloc (CALL_INSN
);
2710 INSN_UID (insn
) = cur_insn_uid
++;
2712 PATTERN (insn
) = pattern
;
2713 INSN_CODE (insn
) = -1;
2714 LOG_LINKS (insn
) = NULL
;
2715 REG_NOTES (insn
) = NULL
;
2716 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2721 /* Add INSN to the end of the doubly-linked list.
2722 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2728 PREV_INSN (insn
) = last_insn
;
2729 NEXT_INSN (insn
) = 0;
2731 if (NULL
!= last_insn
)
2732 NEXT_INSN (last_insn
) = insn
;
2734 if (NULL
== first_insn
)
2740 /* Add INSN into the doubly-linked list after insn AFTER. This and
2741 the next should be the only functions called to insert an insn once
2742 delay slots have been filled since only they know how to update a
2746 add_insn_after (insn
, after
)
2749 rtx next
= NEXT_INSN (after
);
2752 if (optimize
&& INSN_DELETED_P (after
))
2755 NEXT_INSN (insn
) = next
;
2756 PREV_INSN (insn
) = after
;
2760 PREV_INSN (next
) = insn
;
2761 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2762 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2764 else if (last_insn
== after
)
2768 struct sequence_stack
*stack
= seq_stack
;
2769 /* Scan all pending sequences too. */
2770 for (; stack
; stack
= stack
->next
)
2771 if (after
== stack
->last
)
2781 if (basic_block_for_insn
2782 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
2783 && (bb
= BLOCK_FOR_INSN (after
)))
2785 set_block_for_insn (insn
, bb
);
2786 /* Should not happen as first in the BB is always
2787 eigther NOTE or LABEL. */
2788 if (bb
->end
== after
2789 /* Avoid clobbering of structure when creating new BB. */
2790 && GET_CODE (insn
) != BARRIER
2791 && (GET_CODE (insn
) != NOTE
2792 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
2796 NEXT_INSN (after
) = insn
;
2797 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2799 rtx sequence
= PATTERN (after
);
2800 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2804 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2805 the previous should be the only functions called to insert an insn once
2806 delay slots have been filled since only they know how to update a
2810 add_insn_before (insn
, before
)
2813 rtx prev
= PREV_INSN (before
);
2816 if (optimize
&& INSN_DELETED_P (before
))
2819 PREV_INSN (insn
) = prev
;
2820 NEXT_INSN (insn
) = before
;
2824 NEXT_INSN (prev
) = insn
;
2825 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2827 rtx sequence
= PATTERN (prev
);
2828 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2831 else if (first_insn
== before
)
2835 struct sequence_stack
*stack
= seq_stack
;
2836 /* Scan all pending sequences too. */
2837 for (; stack
; stack
= stack
->next
)
2838 if (before
== stack
->first
)
2840 stack
->first
= insn
;
2848 if (basic_block_for_insn
2849 && (unsigned int)INSN_UID (before
) < basic_block_for_insn
->num_elements
2850 && (bb
= BLOCK_FOR_INSN (before
)))
2852 set_block_for_insn (insn
, bb
);
2853 /* Should not happen as first in the BB is always
2854 eigther NOTE or LABEl. */
2855 if (bb
->head
== insn
2856 /* Avoid clobbering of structure when creating new BB. */
2857 && GET_CODE (insn
) != BARRIER
2858 && (GET_CODE (insn
) != NOTE
2859 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
2863 PREV_INSN (before
) = insn
;
2864 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2865 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2868 /* Remove an insn from its doubly-linked list. This function knows how
2869 to handle sequences. */
2874 rtx next
= NEXT_INSN (insn
);
2875 rtx prev
= PREV_INSN (insn
);
2878 NEXT_INSN (prev
) = next
;
2879 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2881 rtx sequence
= PATTERN (prev
);
2882 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
2885 else if (first_insn
== insn
)
2889 struct sequence_stack
*stack
= seq_stack
;
2890 /* Scan all pending sequences too. */
2891 for (; stack
; stack
= stack
->next
)
2892 if (insn
== stack
->first
)
2894 stack
->first
= next
;
2904 PREV_INSN (next
) = prev
;
2905 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2906 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
2908 else if (last_insn
== insn
)
2912 struct sequence_stack
*stack
= seq_stack
;
2913 /* Scan all pending sequences too. */
2914 for (; stack
; stack
= stack
->next
)
2915 if (insn
== stack
->last
)
2926 /* Delete all insns made since FROM.
2927 FROM becomes the new last instruction. */
2930 delete_insns_since (from
)
2936 NEXT_INSN (from
) = 0;
2940 /* This function is deprecated, please use sequences instead.
2942 Move a consecutive bunch of insns to a different place in the chain.
2943 The insns to be moved are those between FROM and TO.
2944 They are moved to a new position after the insn AFTER.
2945 AFTER must not be FROM or TO or any insn in between.
2947 This function does not know about SEQUENCEs and hence should not be
2948 called after delay-slot filling has been done. */
2951 reorder_insns_nobb (from
, to
, after
)
2952 rtx from
, to
, after
;
2954 /* Splice this bunch out of where it is now. */
2955 if (PREV_INSN (from
))
2956 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2958 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2959 if (last_insn
== to
)
2960 last_insn
= PREV_INSN (from
);
2961 if (first_insn
== from
)
2962 first_insn
= NEXT_INSN (to
);
2964 /* Make the new neighbors point to it and it to them. */
2965 if (NEXT_INSN (after
))
2966 PREV_INSN (NEXT_INSN (after
)) = to
;
2968 NEXT_INSN (to
) = NEXT_INSN (after
);
2969 PREV_INSN (from
) = after
;
2970 NEXT_INSN (after
) = from
;
2971 if (after
== last_insn
)
2975 /* Same as function above, but take care to update BB boundaries. */
2977 reorder_insns (from
, to
, after
)
2978 rtx from
, to
, after
;
2980 rtx prev
= PREV_INSN (from
);
2981 basic_block bb
, bb2
;
2983 reorder_insns_nobb (from
, to
, after
);
2985 if (basic_block_for_insn
2986 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
2987 && (bb
= BLOCK_FOR_INSN (after
)))
2991 if (basic_block_for_insn
2992 && (unsigned int)INSN_UID (from
) < basic_block_for_insn
->num_elements
2993 && (bb2
= BLOCK_FOR_INSN (from
)))
2999 if (bb
->end
== after
)
3002 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3003 set_block_for_insn (x
, bb
);
3007 /* Return the line note insn preceding INSN. */
3010 find_line_note (insn
)
3013 if (no_line_numbers
)
3016 for (; insn
; insn
= PREV_INSN (insn
))
3017 if (GET_CODE (insn
) == NOTE
3018 && NOTE_LINE_NUMBER (insn
) >= 0)
3024 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3025 of the moved insns when debugging. This may insert a note between AFTER
3026 and FROM, and another one after TO. */
3029 reorder_insns_with_line_notes (from
, to
, after
)
3030 rtx from
, to
, after
;
3032 rtx from_line
= find_line_note (from
);
3033 rtx after_line
= find_line_note (after
);
3035 reorder_insns (from
, to
, after
);
3037 if (from_line
== after_line
)
3041 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3042 NOTE_LINE_NUMBER (from_line
),
3045 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3046 NOTE_LINE_NUMBER (after_line
),
3050 /* Remove unnecessary notes from the instruction stream. */
3053 remove_unnecessary_notes ()
3055 rtx block_stack
= NULL_RTX
;
3056 rtx eh_stack
= NULL_RTX
;
3061 /* We must not remove the first instruction in the function because
3062 the compiler depends on the first instruction being a note. */
3063 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3065 /* Remember what's next. */
3066 next
= NEXT_INSN (insn
);
3068 /* We're only interested in notes. */
3069 if (GET_CODE (insn
) != NOTE
)
3072 switch (NOTE_LINE_NUMBER (insn
))
3074 case NOTE_INSN_DELETED
:
3078 case NOTE_INSN_EH_REGION_BEG
:
3079 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3082 case NOTE_INSN_EH_REGION_END
:
3083 /* Too many end notes. */
3084 if (eh_stack
== NULL_RTX
)
3086 /* Mismatched nesting. */
3087 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3090 eh_stack
= XEXP (eh_stack
, 1);
3091 free_INSN_LIST_node (tmp
);
3094 case NOTE_INSN_BLOCK_BEG
:
3095 /* By now, all notes indicating lexical blocks should have
3096 NOTE_BLOCK filled in. */
3097 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3099 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3102 case NOTE_INSN_BLOCK_END
:
3103 /* Too many end notes. */
3104 if (block_stack
== NULL_RTX
)
3106 /* Mismatched nesting. */
3107 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3110 block_stack
= XEXP (block_stack
, 1);
3111 free_INSN_LIST_node (tmp
);
3113 /* Scan back to see if there are any non-note instructions
3114 between INSN and the beginning of this block. If not,
3115 then there is no PC range in the generated code that will
3116 actually be in this block, so there's no point in
3117 remembering the existence of the block. */
3118 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3120 /* This block contains a real instruction. Note that we
3121 don't include labels; if the only thing in the block
3122 is a label, then there are still no PC values that
3123 lie within the block. */
3127 /* We're only interested in NOTEs. */
3128 if (GET_CODE (tmp
) != NOTE
)
3131 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3133 /* We just verified that this BLOCK matches us with
3134 the block_stack check above. Never delete the
3135 BLOCK for the outermost scope of the function; we
3136 can refer to names from that scope even if the
3137 block notes are messed up. */
3138 if (! is_body_block (NOTE_BLOCK (insn
))
3139 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3146 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3147 /* There's a nested block. We need to leave the
3148 current block in place since otherwise the debugger
3149 wouldn't be able to show symbols from our block in
3150 the nested block. */
3156 /* Too many begin notes. */
3157 if (block_stack
|| eh_stack
)
3162 /* Emit an insn of given code and pattern
3163 at a specified place within the doubly-linked list. */
3165 /* Make an instruction with body PATTERN
3166 and output it before the instruction BEFORE. */
3169 emit_insn_before (pattern
, before
)
3170 register rtx pattern
, before
;
3172 register rtx insn
= before
;
3174 if (GET_CODE (pattern
) == SEQUENCE
)
3178 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3180 insn
= XVECEXP (pattern
, 0, i
);
3181 add_insn_before (insn
, before
);
3186 insn
= make_insn_raw (pattern
);
3187 add_insn_before (insn
, before
);
3193 /* Make an instruction with body PATTERN and code JUMP_INSN
3194 and output it before the instruction BEFORE. */
3197 emit_jump_insn_before (pattern
, before
)
3198 register rtx pattern
, before
;
3202 if (GET_CODE (pattern
) == SEQUENCE
)
3203 insn
= emit_insn_before (pattern
, before
);
3206 insn
= make_jump_insn_raw (pattern
);
3207 add_insn_before (insn
, before
);
3213 /* Make an instruction with body PATTERN and code CALL_INSN
3214 and output it before the instruction BEFORE. */
3217 emit_call_insn_before (pattern
, before
)
3218 register rtx pattern
, before
;
3222 if (GET_CODE (pattern
) == SEQUENCE
)
3223 insn
= emit_insn_before (pattern
, before
);
3226 insn
= make_call_insn_raw (pattern
);
3227 add_insn_before (insn
, before
);
3228 PUT_CODE (insn
, CALL_INSN
);
3234 /* Make an insn of code BARRIER
3235 and output it before the insn BEFORE. */
3238 emit_barrier_before (before
)
3239 register rtx before
;
3241 register rtx insn
= rtx_alloc (BARRIER
);
3243 INSN_UID (insn
) = cur_insn_uid
++;
3245 add_insn_before (insn
, before
);
3249 /* Emit the label LABEL before the insn BEFORE. */
3252 emit_label_before (label
, before
)
3255 /* This can be called twice for the same label as a result of the
3256 confusion that follows a syntax error! So make it harmless. */
3257 if (INSN_UID (label
) == 0)
3259 INSN_UID (label
) = cur_insn_uid
++;
3260 add_insn_before (label
, before
);
3266 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3269 emit_note_before (subtype
, before
)
3273 register rtx note
= rtx_alloc (NOTE
);
3274 INSN_UID (note
) = cur_insn_uid
++;
3275 NOTE_SOURCE_FILE (note
) = 0;
3276 NOTE_LINE_NUMBER (note
) = subtype
;
3278 add_insn_before (note
, before
);
3282 /* Make an insn of code INSN with body PATTERN
3283 and output it after the insn AFTER. */
3286 emit_insn_after (pattern
, after
)
3287 register rtx pattern
, after
;
3289 register rtx insn
= after
;
3291 if (GET_CODE (pattern
) == SEQUENCE
)
3295 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3297 insn
= XVECEXP (pattern
, 0, i
);
3298 add_insn_after (insn
, after
);
3304 insn
= make_insn_raw (pattern
);
3305 add_insn_after (insn
, after
);
3311 /* Similar to emit_insn_after, except that line notes are to be inserted so
3312 as to act as if this insn were at FROM. */
3315 emit_insn_after_with_line_notes (pattern
, after
, from
)
3316 rtx pattern
, after
, from
;
3318 rtx from_line
= find_line_note (from
);
3319 rtx after_line
= find_line_note (after
);
3320 rtx insn
= emit_insn_after (pattern
, after
);
3323 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3324 NOTE_LINE_NUMBER (from_line
),
3328 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3329 NOTE_LINE_NUMBER (after_line
),
3333 /* Make an insn of code JUMP_INSN with body PATTERN
3334 and output it after the insn AFTER. */
3337 emit_jump_insn_after (pattern
, after
)
3338 register rtx pattern
, after
;
3342 if (GET_CODE (pattern
) == SEQUENCE
)
3343 insn
= emit_insn_after (pattern
, after
);
3346 insn
= make_jump_insn_raw (pattern
);
3347 add_insn_after (insn
, after
);
3353 /* Make an insn of code BARRIER
3354 and output it after the insn AFTER. */
3357 emit_barrier_after (after
)
3360 register rtx insn
= rtx_alloc (BARRIER
);
3362 INSN_UID (insn
) = cur_insn_uid
++;
3364 add_insn_after (insn
, after
);
3368 /* Emit the label LABEL after the insn AFTER. */
3371 emit_label_after (label
, after
)
3374 /* This can be called twice for the same label
3375 as a result of the confusion that follows a syntax error!
3376 So make it harmless. */
3377 if (INSN_UID (label
) == 0)
3379 INSN_UID (label
) = cur_insn_uid
++;
3380 add_insn_after (label
, after
);
3386 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3389 emit_note_after (subtype
, after
)
3393 register rtx note
= rtx_alloc (NOTE
);
3394 INSN_UID (note
) = cur_insn_uid
++;
3395 NOTE_SOURCE_FILE (note
) = 0;
3396 NOTE_LINE_NUMBER (note
) = subtype
;
3397 add_insn_after (note
, after
);
3401 /* Emit a line note for FILE and LINE after the insn AFTER. */
3404 emit_line_note_after (file
, line
, after
)
3411 if (no_line_numbers
&& line
> 0)
3417 note
= rtx_alloc (NOTE
);
3418 INSN_UID (note
) = cur_insn_uid
++;
3419 NOTE_SOURCE_FILE (note
) = file
;
3420 NOTE_LINE_NUMBER (note
) = line
;
3421 add_insn_after (note
, after
);
3425 /* Make an insn of code INSN with pattern PATTERN
3426 and add it to the end of the doubly-linked list.
3427 If PATTERN is a SEQUENCE, take the elements of it
3428 and emit an insn for each element.
3430 Returns the last insn emitted. */
3436 rtx insn
= last_insn
;
3438 if (GET_CODE (pattern
) == SEQUENCE
)
3442 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3444 insn
= XVECEXP (pattern
, 0, i
);
3450 insn
= make_insn_raw (pattern
);
3457 /* Emit the insns in a chain starting with INSN.
3458 Return the last insn emitted. */
3468 rtx next
= NEXT_INSN (insn
);
3477 /* Emit the insns in a chain starting with INSN and place them in front of
3478 the insn BEFORE. Return the last insn emitted. */
3481 emit_insns_before (insn
, before
)
3489 rtx next
= NEXT_INSN (insn
);
3490 add_insn_before (insn
, before
);
3498 /* Emit the insns in a chain starting with FIRST and place them in back of
3499 the insn AFTER. Return the last insn emitted. */
3502 emit_insns_after (first
, after
)
3507 register rtx after_after
;
3516 if (basic_block_for_insn
3517 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3518 && (bb
= BLOCK_FOR_INSN (after
)))
3520 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3521 set_block_for_insn (last
, bb
);
3522 set_block_for_insn (last
, bb
);
3523 if (bb
->end
== after
)
3527 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3530 after_after
= NEXT_INSN (after
);
3532 NEXT_INSN (after
) = first
;
3533 PREV_INSN (first
) = after
;
3534 NEXT_INSN (last
) = after_after
;
3536 PREV_INSN (after_after
) = last
;
3538 if (after
== last_insn
)
3543 /* Make an insn of code JUMP_INSN with pattern PATTERN
3544 and add it to the end of the doubly-linked list. */
3547 emit_jump_insn (pattern
)
3550 if (GET_CODE (pattern
) == SEQUENCE
)
3551 return emit_insn (pattern
);
3554 register rtx insn
= make_jump_insn_raw (pattern
);
3560 /* Make an insn of code CALL_INSN with pattern PATTERN
3561 and add it to the end of the doubly-linked list. */
3564 emit_call_insn (pattern
)
3567 if (GET_CODE (pattern
) == SEQUENCE
)
3568 return emit_insn (pattern
);
3571 register rtx insn
= make_call_insn_raw (pattern
);
3573 PUT_CODE (insn
, CALL_INSN
);
3578 /* Add the label LABEL to the end of the doubly-linked list. */
3584 /* This can be called twice for the same label
3585 as a result of the confusion that follows a syntax error!
3586 So make it harmless. */
3587 if (INSN_UID (label
) == 0)
3589 INSN_UID (label
) = cur_insn_uid
++;
3595 /* Make an insn of code BARRIER
3596 and add it to the end of the doubly-linked list. */
3601 register rtx barrier
= rtx_alloc (BARRIER
);
3602 INSN_UID (barrier
) = cur_insn_uid
++;
3607 /* Make an insn of code NOTE
3608 with data-fields specified by FILE and LINE
3609 and add it to the end of the doubly-linked list,
3610 but only if line-numbers are desired for debugging info. */
3613 emit_line_note (file
, line
)
3617 set_file_and_line_for_stmt (file
, line
);
3620 if (no_line_numbers
)
3624 return emit_note (file
, line
);
3627 /* Make an insn of code NOTE
3628 with data-fields specified by FILE and LINE
3629 and add it to the end of the doubly-linked list.
3630 If it is a line-number NOTE, omit it if it matches the previous one. */
3633 emit_note (file
, line
)
3641 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3642 && line
== last_linenum
)
3644 last_filename
= file
;
3645 last_linenum
= line
;
3648 if (no_line_numbers
&& line
> 0)
3654 note
= rtx_alloc (NOTE
);
3655 INSN_UID (note
) = cur_insn_uid
++;
3656 NOTE_SOURCE_FILE (note
) = file
;
3657 NOTE_LINE_NUMBER (note
) = line
;
3662 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3665 emit_line_note_force (file
, line
)
3670 return emit_line_note (file
, line
);
3673 /* Cause next statement to emit a line note even if the line number
3674 has not changed. This is used at the beginning of a function. */
3677 force_next_line_note ()
3682 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3683 note of this type already exists, remove it first. */
3686 set_unique_reg_note (insn
, kind
, datum
)
3691 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3693 /* First remove the note if there already is one. */
3695 remove_note (insn
, note
);
3697 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3700 /* Return an indication of which type of insn should have X as a body.
3701 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3707 if (GET_CODE (x
) == CODE_LABEL
)
3709 if (GET_CODE (x
) == CALL
)
3711 if (GET_CODE (x
) == RETURN
)
3713 if (GET_CODE (x
) == SET
)
3715 if (SET_DEST (x
) == pc_rtx
)
3717 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3722 if (GET_CODE (x
) == PARALLEL
)
3725 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3726 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3728 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3729 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3731 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3732 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3738 /* Emit the rtl pattern X as an appropriate kind of insn.
3739 If X is a label, it is simply added into the insn chain. */
3745 enum rtx_code code
= classify_insn (x
);
3747 if (code
== CODE_LABEL
)
3748 return emit_label (x
);
3749 else if (code
== INSN
)
3750 return emit_insn (x
);
3751 else if (code
== JUMP_INSN
)
3753 register rtx insn
= emit_jump_insn (x
);
3754 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
3755 return emit_barrier ();
3758 else if (code
== CALL_INSN
)
3759 return emit_call_insn (x
);
3764 /* Begin emitting insns to a sequence which can be packaged in an
3765 RTL_EXPR. If this sequence will contain something that might cause
3766 the compiler to pop arguments to function calls (because those
3767 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3768 details), use do_pending_stack_adjust before calling this function.
3769 That will ensure that the deferred pops are not accidentally
3770 emitted in the middle of this sequence. */
3775 struct sequence_stack
*tem
;
3777 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
3779 tem
->next
= seq_stack
;
3780 tem
->first
= first_insn
;
3781 tem
->last
= last_insn
;
3782 tem
->sequence_rtl_expr
= seq_rtl_expr
;
3790 /* Similarly, but indicate that this sequence will be placed in T, an
3791 RTL_EXPR. See the documentation for start_sequence for more
3792 information about how to use this function. */
3795 start_sequence_for_rtl_expr (t
)
3803 /* Set up the insn chain starting with FIRST as the current sequence,
3804 saving the previously current one. See the documentation for
3805 start_sequence for more information about how to use this function. */
3808 push_to_sequence (first
)
3815 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3821 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3824 push_to_full_sequence (first
, last
)
3830 /* We really should have the end of the insn chain here. */
3831 if (last
&& NEXT_INSN (last
))
3835 /* Set up the outer-level insn chain
3836 as the current sequence, saving the previously current one. */
3839 push_topmost_sequence ()
3841 struct sequence_stack
*stack
, *top
= NULL
;
3845 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3848 first_insn
= top
->first
;
3849 last_insn
= top
->last
;
3850 seq_rtl_expr
= top
->sequence_rtl_expr
;
3853 /* After emitting to the outer-level insn chain, update the outer-level
3854 insn chain, and restore the previous saved state. */
3857 pop_topmost_sequence ()
3859 struct sequence_stack
*stack
, *top
= NULL
;
3861 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3864 top
->first
= first_insn
;
3865 top
->last
= last_insn
;
3866 /* ??? Why don't we save seq_rtl_expr here? */
3871 /* After emitting to a sequence, restore previous saved state.
3873 To get the contents of the sequence just made, you must call
3874 `gen_sequence' *before* calling here.
3876 If the compiler might have deferred popping arguments while
3877 generating this sequence, and this sequence will not be immediately
3878 inserted into the instruction stream, use do_pending_stack_adjust
3879 before calling gen_sequence. That will ensure that the deferred
3880 pops are inserted into this sequence, and not into some random
3881 location in the instruction stream. See INHIBIT_DEFER_POP for more
3882 information about deferred popping of arguments. */
3887 struct sequence_stack
*tem
= seq_stack
;
3889 first_insn
= tem
->first
;
3890 last_insn
= tem
->last
;
3891 seq_rtl_expr
= tem
->sequence_rtl_expr
;
3892 seq_stack
= tem
->next
;
3897 /* This works like end_sequence, but records the old sequence in FIRST
3901 end_full_sequence (first
, last
)
3904 *first
= first_insn
;
3909 /* Return 1 if currently emitting into a sequence. */
3914 return seq_stack
!= 0;
3917 /* Generate a SEQUENCE rtx containing the insns already emitted
3918 to the current sequence.
3920 This is how the gen_... function from a DEFINE_EXPAND
3921 constructs the SEQUENCE that it returns. */
3931 /* Count the insns in the chain. */
3933 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3936 /* If only one insn, return it rather than a SEQUENCE.
3937 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3938 the case of an empty list.)
3939 We only return the pattern of an insn if its code is INSN and it
3940 has no notes. This ensures that no information gets lost. */
3942 && ! RTX_FRAME_RELATED_P (first_insn
)
3943 && GET_CODE (first_insn
) == INSN
3944 /* Don't throw away any reg notes. */
3945 && REG_NOTES (first_insn
) == 0)
3946 return PATTERN (first_insn
);
3948 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3950 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3951 XVECEXP (result
, 0, i
) = tem
;
3956 /* Put the various virtual registers into REGNO_REG_RTX. */
3959 init_virtual_regs (es
)
3960 struct emit_status
*es
;
3962 rtx
*ptr
= es
->x_regno_reg_rtx
;
3963 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3964 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3965 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3966 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3967 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3971 clear_emit_caches ()
3975 /* Clear the start_sequence/gen_sequence cache. */
3976 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3977 sequence_result
[i
] = 0;
3981 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3982 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
3983 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
3984 static int copy_insn_n_scratches
;
3986 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3987 copied an ASM_OPERANDS.
3988 In that case, it is the original input-operand vector. */
3989 static rtvec orig_asm_operands_vector
;
3991 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3992 copied an ASM_OPERANDS.
3993 In that case, it is the copied input-operand vector. */
3994 static rtvec copy_asm_operands_vector
;
3996 /* Likewise for the constraints vector. */
3997 static rtvec orig_asm_constraints_vector
;
3998 static rtvec copy_asm_constraints_vector
;
4000 /* Recursively create a new copy of an rtx for copy_insn.
4001 This function differs from copy_rtx in that it handles SCRATCHes and
4002 ASM_OPERANDs properly.
4003 Normally, this function is not used directly; use copy_insn as front end.
4004 However, you could first copy an insn pattern with copy_insn and then use
4005 this function afterwards to properly copy any REG_NOTEs containing
4014 register RTX_CODE code
;
4015 register const char *format_ptr
;
4017 code
= GET_CODE (orig
);
4033 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4034 if (copy_insn_scratch_in
[i
] == orig
)
4035 return copy_insn_scratch_out
[i
];
4039 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4040 a LABEL_REF, it isn't sharable. */
4041 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4042 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4043 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4047 /* A MEM with a constant address is not sharable. The problem is that
4048 the constant address may need to be reloaded. If the mem is shared,
4049 then reloading one copy of this mem will cause all copies to appear
4050 to have been reloaded. */
4056 copy
= rtx_alloc (code
);
4058 /* Copy the various flags, and other information. We assume that
4059 all fields need copying, and then clear the fields that should
4060 not be copied. That is the sensible default behavior, and forces
4061 us to explicitly document why we are *not* copying a flag. */
4062 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
4064 /* We do not copy the USED flag, which is used as a mark bit during
4065 walks over the RTL. */
4068 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4069 if (GET_RTX_CLASS (code
) == 'i')
4073 copy
->frame_related
= 0;
4076 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4078 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4080 copy
->fld
[i
] = orig
->fld
[i
];
4081 switch (*format_ptr
++)
4084 if (XEXP (orig
, i
) != NULL
)
4085 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4090 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4091 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4092 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4093 XVEC (copy
, i
) = copy_asm_operands_vector
;
4094 else if (XVEC (orig
, i
) != NULL
)
4096 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4097 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4098 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4109 /* These are left unchanged. */
4117 if (code
== SCRATCH
)
4119 i
= copy_insn_n_scratches
++;
4120 if (i
>= MAX_RECOG_OPERANDS
)
4122 copy_insn_scratch_in
[i
] = orig
;
4123 copy_insn_scratch_out
[i
] = copy
;
4125 else if (code
== ASM_OPERANDS
)
4127 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4128 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4129 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4130 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4136 /* Create a new copy of an rtx.
4137 This function differs from copy_rtx in that it handles SCRATCHes and
4138 ASM_OPERANDs properly.
4139 INSN doesn't really have to be a full INSN; it could be just the
4145 copy_insn_n_scratches
= 0;
4146 orig_asm_operands_vector
= 0;
4147 orig_asm_constraints_vector
= 0;
4148 copy_asm_operands_vector
= 0;
4149 copy_asm_constraints_vector
= 0;
4150 return copy_insn_1 (insn
);
4153 /* Initialize data structures and variables in this file
4154 before generating rtl for each function. */
4159 struct function
*f
= cfun
;
4161 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
4164 seq_rtl_expr
= NULL
;
4166 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
4169 first_label_num
= label_num
;
4173 clear_emit_caches ();
4175 /* Init the tables that describe all the pseudo regs. */
4177 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
4179 f
->emit
->regno_pointer_align
4180 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_align_length
,
4181 sizeof (unsigned char));
4184 = (rtx
*) xcalloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
),
4187 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4188 init_virtual_regs (f
->emit
);
4190 /* Indicate that the virtual registers and stack locations are
4192 REG_POINTER (stack_pointer_rtx
) = 1;
4193 REG_POINTER (frame_pointer_rtx
) = 1;
4194 REG_POINTER (hard_frame_pointer_rtx
) = 1;
4195 REG_POINTER (arg_pointer_rtx
) = 1;
4197 REG_POINTER (virtual_incoming_args_rtx
) = 1;
4198 REG_POINTER (virtual_stack_vars_rtx
) = 1;
4199 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
4200 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
4201 REG_POINTER (virtual_cfa_rtx
) = 1;
4203 #ifdef STACK_BOUNDARY
4204 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
4205 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4206 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4207 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
4209 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4210 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
4211 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
4212 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4213 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
4216 #ifdef INIT_EXPANDERS
4221 /* Mark SS for GC. */
4224 mark_sequence_stack (ss
)
4225 struct sequence_stack
*ss
;
4229 ggc_mark_rtx (ss
->first
);
4230 ggc_mark_tree (ss
->sequence_rtl_expr
);
4235 /* Mark ES for GC. */
4238 mark_emit_status (es
)
4239 struct emit_status
*es
;
4247 for (i
= es
->regno_pointer_align_length
, r
= es
->x_regno_reg_rtx
;
4251 mark_sequence_stack (es
->sequence_stack
);
4252 ggc_mark_tree (es
->sequence_rtl_expr
);
4253 ggc_mark_rtx (es
->x_first_insn
);
4256 /* Create some permanent unique rtl objects shared between all functions.
4257 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4260 init_emit_once (line_numbers
)
4264 enum machine_mode mode
;
4265 enum machine_mode double_mode
;
4267 /* Initialize the CONST_INT hash table. */
4268 const_int_htab
= htab_create (37, const_int_htab_hash
,
4269 const_int_htab_eq
, NULL
);
4270 ggc_add_root (&const_int_htab
, 1, sizeof (const_int_htab
),
4273 no_line_numbers
= ! line_numbers
;
4275 /* Compute the word and byte modes. */
4277 byte_mode
= VOIDmode
;
4278 word_mode
= VOIDmode
;
4279 double_mode
= VOIDmode
;
4281 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4282 mode
= GET_MODE_WIDER_MODE (mode
))
4284 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4285 && byte_mode
== VOIDmode
)
4288 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4289 && word_mode
== VOIDmode
)
4293 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4294 mode
= GET_MODE_WIDER_MODE (mode
))
4296 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4297 && double_mode
== VOIDmode
)
4301 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4303 /* Assign register numbers to the globally defined register rtx.
4304 This must be done at runtime because the register number field
4305 is in a union and some compilers can't initialize unions. */
4307 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4308 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4309 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4310 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4311 if (hard_frame_pointer_rtx
== 0)
4312 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
4313 HARD_FRAME_POINTER_REGNUM
);
4314 if (arg_pointer_rtx
== 0)
4315 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4316 virtual_incoming_args_rtx
=
4317 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4318 virtual_stack_vars_rtx
=
4319 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4320 virtual_stack_dynamic_rtx
=
4321 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4322 virtual_outgoing_args_rtx
=
4323 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4324 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4326 /* These rtx must be roots if GC is enabled. */
4327 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4329 #ifdef INIT_EXPANDERS
4330 /* This is to initialize {init|mark|free}_machine_status before the first
4331 call to push_function_context_to. This is needed by the Chill front
4332 end which calls push_function_context_to before the first cal to
4333 init_function_start. */
4337 /* Create the unique rtx's for certain rtx codes and operand values. */
4339 /* Don't use gen_rtx here since gen_rtx in this case
4340 tries to use these variables. */
4341 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4342 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4343 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4344 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4346 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4347 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4348 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4350 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4352 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4353 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4354 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4355 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4357 for (i
= 0; i
<= 2; i
++)
4359 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4360 mode
= GET_MODE_WIDER_MODE (mode
))
4362 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4363 union real_extract u
;
4365 /* Zero any holes in a structure. */
4366 memset ((char *) &u
, 0, sizeof u
);
4367 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
4369 /* Avoid trailing garbage in the rtx. */
4370 if (sizeof (u
) < sizeof (HOST_WIDE_INT
))
4371 CONST_DOUBLE_LOW (tem
) = 0;
4372 if (sizeof (u
) < 2 * sizeof (HOST_WIDE_INT
))
4373 CONST_DOUBLE_HIGH (tem
) = 0;
4375 memcpy (&CONST_DOUBLE_LOW (tem
), &u
, sizeof u
);
4376 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
4377 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4378 PUT_MODE (tem
, mode
);
4380 const_tiny_rtx
[i
][(int) mode
] = tem
;
4383 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4385 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4386 mode
= GET_MODE_WIDER_MODE (mode
))
4387 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4389 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4391 mode
= GET_MODE_WIDER_MODE (mode
))
4392 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4395 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
4396 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
4397 const_tiny_rtx
[0][i
] = const0_rtx
;
4399 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
4400 if (STORE_FLAG_VALUE
== 1)
4401 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
4403 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4404 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4405 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4406 ggc_add_rtx_root ((rtx
*) const_tiny_rtx
, sizeof const_tiny_rtx
/ sizeof (rtx
));
4407 ggc_add_rtx_root (&const_true_rtx
, 1);
4409 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4410 return_address_pointer_rtx
4411 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4415 struct_value_rtx
= STRUCT_VALUE
;
4417 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4420 #ifdef STRUCT_VALUE_INCOMING
4421 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4423 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4424 struct_value_incoming_rtx
4425 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4427 struct_value_incoming_rtx
= struct_value_rtx
;
4431 #ifdef STATIC_CHAIN_REGNUM
4432 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
4434 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4435 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
4436 static_chain_incoming_rtx
4437 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
4440 static_chain_incoming_rtx
= static_chain_rtx
;
4444 static_chain_rtx
= STATIC_CHAIN
;
4446 #ifdef STATIC_CHAIN_INCOMING
4447 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
4449 static_chain_incoming_rtx
= static_chain_rtx
;
4453 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
4454 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
4456 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4457 ggc_add_rtx_root (&struct_value_rtx
, 1);
4458 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4459 ggc_add_rtx_root (&static_chain_rtx
, 1);
4460 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4461 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4464 /* Query and clear/ restore no_line_numbers. This is used by the
4465 switch / case handling in stmt.c to give proper line numbers in
4466 warnings about unreachable code. */
4469 force_line_numbers ()
4471 int old
= no_line_numbers
;
4473 no_line_numbers
= 0;
4475 force_next_line_note ();
4480 restore_line_number_status (old_value
)
4483 no_line_numbers
= old_value
;