1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
60 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
61 After rtl generation, it is 1 plus the largest register number used. */
63 int reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
65 /* This is *not* reset after each function. It gives each CODE_LABEL
66 in the entire compilation a unique label number. */
68 static int label_num
= 1;
70 /* Lowest label number in current function. */
72 static int first_label_num
;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these except perhaps the floating-point CONST_DOUBLEs
92 are unique; no other rtx-object will be equal to any of these. */
94 /* Avoid warnings by initializing the `fld' field. Since its a union,
95 bypass problems with KNR compilers by only doing so when __GNUC__. */
102 struct _global_rtl global_rtl
=
104 {PC
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* pc_rtx */
105 {CC0
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* cc0_rtx */
106 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* stack_pointer_rtx */
107 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* frame_pointer_rtx */
108 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* hard_frame_pointer_rtx */
109 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* arg_pointer_rtx */
110 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_incoming_args_rtx */
111 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_stack_vars_rtx */
112 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_stack_dynamic_rtx */
113 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_outgoing_args_rtx */
114 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_cfa_rtx */
117 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
118 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
119 record a copy of const[012]_rtx. */
121 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
125 REAL_VALUE_TYPE dconst0
;
126 REAL_VALUE_TYPE dconst1
;
127 REAL_VALUE_TYPE dconst2
;
128 REAL_VALUE_TYPE dconstm1
;
130 /* All references to the following fixed hard registers go through
131 these unique rtl objects. On machines where the frame-pointer and
132 arg-pointer are the same register, they use the same unique object.
134 After register allocation, other rtl objects which used to be pseudo-regs
135 may be clobbered to refer to the frame-pointer register.
136 But references that were originally to the frame-pointer can be
137 distinguished from the others because they contain frame_pointer_rtx.
139 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
140 tricky: until register elimination has taken place hard_frame_pointer_rtx
141 should be used if it is being set, and frame_pointer_rtx otherwise. After
142 register elimination hard_frame_pointer_rtx should always be used.
143 On machines where the two registers are same (most) then these are the
146 In an inline procedure, the stack and frame pointer rtxs may not be
147 used for anything else. */
148 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
149 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
150 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
151 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
152 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
154 /* This is used to implement __builtin_return_address for some machines.
155 See for instance the MIPS port. */
156 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
158 /* We make one copy of (const_int C) where C is in
159 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
160 to save space during the compilation and simplify comparisons of
163 struct rtx_def const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
165 /* The ends of the doubly-linked chain of rtl for the current function.
166 Both are reset to null at the start of rtl generation for the function.
168 start_sequence saves both of these on `sequence_stack' along with
169 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
171 static rtx first_insn
= NULL
;
172 static rtx last_insn
= NULL
;
174 /* RTL_EXPR within which the current sequence will be placed. Use to
175 prevent reuse of any temporaries within the sequence until after the
176 RTL_EXPR is emitted. */
178 tree sequence_rtl_expr
= NULL
;
180 /* INSN_UID for next insn emitted.
181 Reset to 1 for each function compiled. */
183 static int cur_insn_uid
= 1;
185 /* Line number and source file of the last line-number NOTE emitted.
186 This is used to avoid generating duplicates. */
188 static int last_linenum
= 0;
189 static char *last_filename
= 0;
191 /* A vector indexed by pseudo reg number. The allocated length
192 of this vector is regno_pointer_flag_length. Since this
193 vector is needed during the expansion phase when the total
194 number of registers in the function is not yet known,
195 it is copied and made bigger when necessary. */
197 char *regno_pointer_flag
;
198 int regno_pointer_flag_length
;
200 /* Indexed by pseudo register number, if nonzero gives the known alignment
201 for that pseudo (if regno_pointer_flag is set).
202 Allocated in parallel with regno_pointer_flag. */
203 char *regno_pointer_align
;
205 /* Indexed by pseudo register number, gives the rtx for that pseudo.
206 Allocated in parallel with regno_pointer_flag. */
210 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
211 Each element describes one pending sequence.
212 The main insn-chain is saved in the last element of the chain,
213 unless the chain is empty. */
215 struct sequence_stack
*sequence_stack
;
217 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
218 shortly thrown away. We use two mechanisms to prevent this waste:
220 First, we keep a list of the expressions used to represent the sequence
221 stack in sequence_element_free_list.
223 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
224 rtvec for use by gen_sequence. One entry for each size is sufficient
225 because most cases are calls to gen_sequence followed by immediately
226 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
227 destructive on the insn in it anyway and hence can't be redone.
229 We do not bother to save this cached data over nested function calls.
230 Instead, we just reinitialize them. */
232 #define SEQUENCE_RESULT_SIZE 5
234 static struct sequence_stack
*sequence_element_free_list
;
235 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
237 /* During RTL generation, we also keep a list of free INSN rtl codes. */
238 static rtx free_insn
;
240 extern int rtx_equal_function_value_matters
;
242 /* Filename and line number of last line-number note,
243 whether we actually emitted it or not. */
244 extern char *emit_filename
;
245 extern int emit_lineno
;
247 static rtx make_jump_insn_raw
PROTO((rtx
));
248 static rtx make_call_insn_raw
PROTO((rtx
));
249 static rtx find_line_note
PROTO((rtx
));
252 gen_rtx_CONST_INT (mode
, arg
)
253 enum machine_mode mode
;
256 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
257 return &const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
261 return const_true_rtx
;
264 return gen_rtx_raw_CONST_INT (mode
, arg
);
267 /* CONST_DOUBLEs needs special handling because its length is known
270 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
271 enum machine_mode mode
;
273 HOST_WIDE_INT arg1
, arg2
;
275 rtx r
= rtx_alloc (CONST_DOUBLE
);
284 gen_rtx_REG (mode
, regno
)
285 enum machine_mode mode
;
288 /* In case the MD file explicitly references the frame pointer, have
289 all such references point to the same frame pointer. This is
290 used during frame pointer elimination to distinguish the explicit
291 references to these registers from pseudos that happened to be
294 If we have eliminated the frame pointer or arg pointer, we will
295 be using it as a normal register, for example as a spill
296 register. In such cases, we might be accessing it in a mode that
297 is not Pmode and therefore cannot use the pre-allocated rtx.
299 Also don't do this when we are making new REGs in reload, since
300 we don't want to get confused with the real pointers. */
302 if (mode
== Pmode
&& !reload_in_progress
)
304 if (regno
== FRAME_POINTER_REGNUM
)
305 return frame_pointer_rtx
;
306 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
307 if (regno
== HARD_FRAME_POINTER_REGNUM
)
308 return hard_frame_pointer_rtx
;
310 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
311 if (regno
== ARG_POINTER_REGNUM
)
312 return arg_pointer_rtx
;
314 #ifdef RETURN_ADDRESS_POINTER_REGNUM
315 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
316 return return_address_pointer_rtx
;
318 if (regno
== STACK_POINTER_REGNUM
)
319 return stack_pointer_rtx
;
322 return gen_rtx_raw_REG (mode
, regno
);
326 gen_rtx_MEM (mode
, addr
)
327 enum machine_mode mode
;
330 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
332 /* This field is not cleared by the mere allocation of the rtx, so
334 MEM_ALIAS_SET (rt
) = 0;
339 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
341 ** This routine generates an RTX of the size specified by
342 ** <code>, which is an RTX code. The RTX structure is initialized
343 ** from the arguments <element1> through <elementn>, which are
344 ** interpreted according to the specific RTX type's format. The
345 ** special machine mode associated with the rtx (if any) is specified
348 ** gen_rtx can be invoked in a way which resembles the lisp-like
349 ** rtx it will generate. For example, the following rtx structure:
351 ** (plus:QI (mem:QI (reg:SI 1))
352 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
354 ** ...would be generated by the following C code:
356 ** gen_rtx (PLUS, QImode,
357 ** gen_rtx (MEM, QImode,
358 ** gen_rtx (REG, SImode, 1)),
359 ** gen_rtx (MEM, QImode,
360 ** gen_rtx (PLUS, SImode,
361 ** gen_rtx (REG, SImode, 2),
362 ** gen_rtx (REG, SImode, 3)))),
367 gen_rtx
VPROTO((enum rtx_code code
, enum machine_mode mode
, ...))
369 #ifndef ANSI_PROTOTYPES
371 enum machine_mode mode
;
374 register int i
; /* Array indices... */
375 register char *fmt
; /* Current rtx's format... */
376 register rtx rt_val
; /* RTX to return to caller... */
380 #ifndef ANSI_PROTOTYPES
381 code
= va_arg (p
, enum rtx_code
);
382 mode
= va_arg (p
, enum machine_mode
);
388 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
393 rtx arg0
= va_arg (p
, rtx
);
394 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
395 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
396 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
401 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
405 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
409 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
410 rt_val
->mode
= mode
; /* Store the machine mode... */
412 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
413 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
417 case '0': /* Unused field. */
420 case 'i': /* An integer? */
421 XINT (rt_val
, i
) = va_arg (p
, int);
424 case 'w': /* A wide integer? */
425 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
428 case 's': /* A string? */
429 XSTR (rt_val
, i
) = va_arg (p
, char *);
432 case 'e': /* An expression? */
433 case 'u': /* An insn? Same except when printing. */
434 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
437 case 'E': /* An RTX vector? */
438 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
441 case 'b': /* A bitmap? */
442 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
445 case 't': /* A tree? */
446 XTREE (rt_val
, i
) = va_arg (p
, tree
);
460 /* gen_rtvec (n, [rt1, ..., rtn])
462 ** This routine creates an rtvec and stores within it the
463 ** pointers to rtx's which are its arguments.
468 gen_rtvec
VPROTO((int n
, ...))
470 #ifndef ANSI_PROTOTYPES
479 #ifndef ANSI_PROTOTYPES
484 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
486 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
488 for (i
= 0; i
< n
; i
++)
489 vector
[i
] = va_arg (p
, rtx
);
492 return gen_rtvec_v (n
, vector
);
496 gen_rtvec_v (n
, argp
)
501 register rtvec rt_val
;
504 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
506 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
508 for (i
= 0; i
< n
; i
++)
509 rt_val
->elem
[i
].rtx
= *argp
++;
515 gen_rtvec_vv (n
, argp
)
520 register rtvec rt_val
;
523 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
525 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
527 for (i
= 0; i
< n
; i
++)
528 rt_val
->elem
[i
].rtx
= (argp
++)->rtx
;
533 /* Generate a REG rtx for a new pseudo register of mode MODE.
534 This pseudo is assigned the next sequential register number. */
538 enum machine_mode mode
;
542 /* Don't let anything called after initial flow analysis create new
547 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
548 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
)
550 /* For complex modes, don't make a single pseudo.
551 Instead, make a CONCAT of two pseudos.
552 This allows noncontiguous allocation of the real and imaginary parts,
553 which makes much better code. Besides, allocating DCmode
554 pseudos overstrains reload on some machines like the 386. */
555 rtx realpart
, imagpart
;
556 int size
= GET_MODE_UNIT_SIZE (mode
);
557 enum machine_mode partmode
558 = mode_for_size (size
* BITS_PER_UNIT
,
559 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
560 ? MODE_FLOAT
: MODE_INT
),
563 realpart
= gen_reg_rtx (partmode
);
564 imagpart
= gen_reg_rtx (partmode
);
565 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
568 /* Make sure regno_pointer_flag and regno_reg_rtx are large
569 enough to have an element for this pseudo reg number. */
571 if (reg_rtx_no
== regno_pointer_flag_length
)
575 (char *) savealloc (regno_pointer_flag_length
* 2);
576 bcopy (regno_pointer_flag
, new, regno_pointer_flag_length
);
577 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
578 regno_pointer_flag
= new;
580 new = (char *) savealloc (regno_pointer_flag_length
* 2);
581 bcopy (regno_pointer_align
, new, regno_pointer_flag_length
);
582 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
583 regno_pointer_align
= new;
585 new1
= (rtx
*) savealloc (regno_pointer_flag_length
* 2 * sizeof (rtx
));
586 bcopy ((char *) regno_reg_rtx
, (char *) new1
,
587 regno_pointer_flag_length
* sizeof (rtx
));
588 bzero ((char *) &new1
[regno_pointer_flag_length
],
589 regno_pointer_flag_length
* sizeof (rtx
));
590 regno_reg_rtx
= new1
;
592 regno_pointer_flag_length
*= 2;
595 val
= gen_rtx_raw_REG (mode
, reg_rtx_no
);
596 regno_reg_rtx
[reg_rtx_no
++] = val
;
600 /* Identify REG (which may be a CONCAT) as a user register. */
606 if (GET_CODE (reg
) == CONCAT
)
608 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
609 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
611 else if (GET_CODE (reg
) == REG
)
612 REG_USERVAR_P (reg
) = 1;
617 /* Identify REG as a probable pointer register and show its alignment
618 as ALIGN, if nonzero. */
621 mark_reg_pointer (reg
, align
)
625 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
628 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
631 /* Return 1 plus largest pseudo reg number used in the current function. */
639 /* Return 1 + the largest label number used so far in the current function. */
644 if (last_label_num
&& label_num
== base_label_num
)
645 return last_label_num
;
649 /* Return first label number used in this function (if any were used). */
652 get_first_label_num ()
654 return first_label_num
;
657 /* Return a value representing some low-order bits of X, where the number
658 of low-order bits is given by MODE. Note that no conversion is done
659 between floating-point and fixed-point values, rather, the bit
660 representation is returned.
662 This function handles the cases in common between gen_lowpart, below,
663 and two variants in cse.c and combine.c. These are the cases that can
664 be safely handled at all points in the compilation.
666 If this is not a case we can handle, return 0. */
669 gen_lowpart_common (mode
, x
)
670 enum machine_mode mode
;
675 if (GET_MODE (x
) == mode
)
678 /* MODE must occupy no more words than the mode of X. */
679 if (GET_MODE (x
) != VOIDmode
680 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
681 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
685 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
686 word
= ((GET_MODE_SIZE (GET_MODE (x
))
687 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
690 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
691 && (GET_MODE_CLASS (mode
) == MODE_INT
692 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
694 /* If we are getting the low-order part of something that has been
695 sign- or zero-extended, we can either just use the object being
696 extended or make a narrower extension. If we want an even smaller
697 piece than the size of the object being extended, call ourselves
700 This case is used mostly by combine and cse. */
702 if (GET_MODE (XEXP (x
, 0)) == mode
)
704 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
705 return gen_lowpart_common (mode
, XEXP (x
, 0));
706 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
707 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
709 else if (GET_CODE (x
) == SUBREG
710 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
711 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
712 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
714 : gen_rtx_SUBREG (mode
, SUBREG_REG (x
), SUBREG_WORD (x
) + word
));
715 else if (GET_CODE (x
) == REG
)
717 /* Let the backend decide how many registers to skip. This is needed
718 in particular for Sparc64 where fp regs are smaller than a word. */
719 /* ??? Note that subregs are now ambiguous, in that those against
720 pseudos are sized by the Word Size, while those against hard
721 regs are sized by the underlying register size. Better would be
722 to always interpret the subreg offset parameter as bytes or bits. */
724 if (WORDS_BIG_ENDIAN
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
725 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
726 - HARD_REGNO_NREGS (REGNO (x
), mode
));
728 /* If the register is not valid for MODE, return 0. If we don't
729 do this, there is no way to fix up the resulting REG later.
730 But we do do this if the current REG is not valid for its
731 mode. This latter is a kludge, but is required due to the
732 way that parameters are passed on some machines, most
734 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
735 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
736 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
738 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
739 /* integrate.c can't handle parts of a return value register. */
740 && (! REG_FUNCTION_VALUE_P (x
)
741 || ! rtx_equal_function_value_matters
)
742 #ifdef CLASS_CANNOT_CHANGE_SIZE
743 && ! (GET_MODE_SIZE (mode
) != GET_MODE_SIZE (GET_MODE (x
))
744 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_INT
745 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_FLOAT
746 && (TEST_HARD_REG_BIT
747 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
750 /* We want to keep the stack, frame, and arg pointers
752 && x
!= frame_pointer_rtx
753 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
754 && x
!= arg_pointer_rtx
756 && x
!= stack_pointer_rtx
)
757 return gen_rtx_REG (mode
, REGNO (x
) + word
);
759 return gen_rtx_SUBREG (mode
, x
, word
);
761 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
762 from the low-order part of the constant. */
763 else if ((GET_MODE_CLASS (mode
) == MODE_INT
764 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
765 && GET_MODE (x
) == VOIDmode
766 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
768 /* If MODE is twice the host word size, X is already the desired
769 representation. Otherwise, if MODE is wider than a word, we can't
770 do this. If MODE is exactly a word, return just one CONST_INT.
771 If MODE is smaller than a word, clear the bits that don't belong
772 in our mode, unless they and our sign bit are all one. So we get
773 either a reasonable negative value or a reasonable unsigned value
776 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
778 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
780 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
781 return (GET_CODE (x
) == CONST_INT
? x
782 : GEN_INT (CONST_DOUBLE_LOW (x
)));
785 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
786 int width
= GET_MODE_BITSIZE (mode
);
787 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
788 : CONST_DOUBLE_LOW (x
));
790 /* Sign extend to HOST_WIDE_INT. */
791 val
= val
<< (HOST_BITS_PER_WIDE_INT
- width
) >> (HOST_BITS_PER_WIDE_INT
- width
);
793 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
798 /* If X is an integral constant but we want it in floating-point, it
799 must be the case that we have a union of an integer and a floating-point
800 value. If the machine-parameters allow it, simulate that union here
801 and return the result. The two-word and single-word cases are
804 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
805 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
806 || flag_pretend_float
)
807 && GET_MODE_CLASS (mode
) == MODE_FLOAT
808 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
809 && GET_CODE (x
) == CONST_INT
810 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
811 #ifdef REAL_ARITHMETIC
817 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
818 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
822 union {HOST_WIDE_INT i
; float d
; } u
;
825 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
828 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
829 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
830 || flag_pretend_float
)
831 && GET_MODE_CLASS (mode
) == MODE_FLOAT
832 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
833 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
834 && GET_MODE (x
) == VOIDmode
835 && (sizeof (double) * HOST_BITS_PER_CHAR
836 == 2 * HOST_BITS_PER_WIDE_INT
))
837 #ifdef REAL_ARITHMETIC
841 HOST_WIDE_INT low
, high
;
843 if (GET_CODE (x
) == CONST_INT
)
844 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
846 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
848 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
850 if (WORDS_BIG_ENDIAN
)
851 i
[0] = high
, i
[1] = low
;
853 i
[0] = low
, i
[1] = high
;
855 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
856 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
860 union {HOST_WIDE_INT i
[2]; double d
; } u
;
861 HOST_WIDE_INT low
, high
;
863 if (GET_CODE (x
) == CONST_INT
)
864 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
866 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
868 #ifdef HOST_WORDS_BIG_ENDIAN
869 u
.i
[0] = high
, u
.i
[1] = low
;
871 u
.i
[0] = low
, u
.i
[1] = high
;
874 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
878 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
879 same as sizeof (double) or when sizeof (float) is larger than the
880 size of a word on the target machine. */
881 #ifdef REAL_ARITHMETIC
882 else if (mode
== SFmode
&& GET_CODE (x
) == CONST_INT
)
888 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
889 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
893 /* Similarly, if this is converting a floating-point value into a
894 single-word integer. Only do this is the host and target parameters are
897 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
898 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
899 || flag_pretend_float
)
900 && (GET_MODE_CLASS (mode
) == MODE_INT
901 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
902 && GET_CODE (x
) == CONST_DOUBLE
903 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
904 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
905 return operand_subword (x
, word
, 0, GET_MODE (x
));
907 /* Similarly, if this is converting a floating-point value into a
908 two-word integer, we can do this one word at a time and make an
909 integer. Only do this is the host and target parameters are
912 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
913 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
914 || flag_pretend_float
)
915 && (GET_MODE_CLASS (mode
) == MODE_INT
916 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
917 && GET_CODE (x
) == CONST_DOUBLE
918 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
919 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
922 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
924 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
926 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
927 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
928 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
931 /* Otherwise, we can't do this. */
935 /* Return the real part (which has mode MODE) of a complex value X.
936 This always comes at the low address in memory. */
939 gen_realpart (mode
, x
)
940 enum machine_mode mode
;
943 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
945 else if (WORDS_BIG_ENDIAN
)
946 return gen_highpart (mode
, x
);
948 return gen_lowpart (mode
, x
);
951 /* Return the imaginary part (which has mode MODE) of a complex value X.
952 This always comes at the high address in memory. */
955 gen_imagpart (mode
, x
)
956 enum machine_mode mode
;
959 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
961 else if (WORDS_BIG_ENDIAN
)
962 return gen_lowpart (mode
, x
);
964 return gen_highpart (mode
, x
);
967 /* Return 1 iff X, assumed to be a SUBREG,
968 refers to the real part of the complex value in its containing reg.
969 Complex values are always stored with the real part in the first word,
970 regardless of WORDS_BIG_ENDIAN. */
973 subreg_realpart_p (x
)
976 if (GET_CODE (x
) != SUBREG
)
979 return SUBREG_WORD (x
) * UNITS_PER_WORD
< GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
)));
982 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
983 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
984 least-significant part of X.
985 MODE specifies how big a part of X to return;
986 it usually should not be larger than a word.
987 If X is a MEM whose address is a QUEUED, the value may be so also. */
990 gen_lowpart (mode
, x
)
991 enum machine_mode mode
;
994 rtx result
= gen_lowpart_common (mode
, x
);
998 else if (GET_CODE (x
) == REG
)
1000 /* Must be a hard reg that's not valid in MODE. */
1001 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1006 else if (GET_CODE (x
) == MEM
)
1008 /* The only additional case we can do is MEM. */
1009 register int offset
= 0;
1010 if (WORDS_BIG_ENDIAN
)
1011 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1012 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1014 if (BYTES_BIG_ENDIAN
)
1015 /* Adjust the address so that the address-after-the-data
1017 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1018 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1020 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1022 else if (GET_CODE (x
) == ADDRESSOF
)
1023 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1028 /* Like `gen_lowpart', but refer to the most significant part.
1029 This is used to access the imaginary part of a complex number. */
1032 gen_highpart (mode
, x
)
1033 enum machine_mode mode
;
1036 /* This case loses if X is a subreg. To catch bugs early,
1037 complain if an invalid MODE is used even in other cases. */
1038 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1039 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1041 if (GET_CODE (x
) == CONST_DOUBLE
1042 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1043 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
1046 return GEN_INT (CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
1047 else if (GET_CODE (x
) == CONST_INT
)
1049 if (HOST_BITS_PER_WIDE_INT
<= BITS_PER_WORD
)
1051 return GEN_INT (INTVAL (x
) >> (HOST_BITS_PER_WIDE_INT
- BITS_PER_WORD
));
1053 else if (GET_CODE (x
) == MEM
)
1055 register int offset
= 0;
1056 if (! WORDS_BIG_ENDIAN
)
1057 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1058 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1060 if (! BYTES_BIG_ENDIAN
1061 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
1062 offset
-= (GET_MODE_SIZE (mode
)
1063 - MIN (UNITS_PER_WORD
,
1064 GET_MODE_SIZE (GET_MODE (x
))));
1066 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1068 else if (GET_CODE (x
) == SUBREG
)
1070 /* The only time this should occur is when we are looking at a
1071 multi-word item with a SUBREG whose mode is the same as that of the
1072 item. It isn't clear what we would do if it wasn't. */
1073 if (SUBREG_WORD (x
) != 0)
1075 return gen_highpart (mode
, SUBREG_REG (x
));
1077 else if (GET_CODE (x
) == REG
)
1081 /* Let the backend decide how many registers to skip. This is needed
1082 in particular for sparc64 where fp regs are smaller than a word. */
1083 /* ??? Note that subregs are now ambiguous, in that those against
1084 pseudos are sized by the word size, while those against hard
1085 regs are sized by the underlying register size. Better would be
1086 to always interpret the subreg offset parameter as bytes or bits. */
1088 if (WORDS_BIG_ENDIAN
)
1090 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1091 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
1092 - HARD_REGNO_NREGS (REGNO (x
), mode
));
1094 word
= ((GET_MODE_SIZE (GET_MODE (x
))
1095 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
1098 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
1099 /* integrate.c can't handle parts of a return value register. */
1100 && (! REG_FUNCTION_VALUE_P (x
)
1101 || ! rtx_equal_function_value_matters
)
1102 /* We want to keep the stack, frame, and arg pointers special. */
1103 && x
!= frame_pointer_rtx
1104 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1105 && x
!= arg_pointer_rtx
1107 && x
!= stack_pointer_rtx
)
1108 return gen_rtx_REG (mode
, REGNO (x
) + word
);
1110 return gen_rtx_SUBREG (mode
, x
, word
);
1116 /* Return 1 iff X, assumed to be a SUBREG,
1117 refers to the least significant part of its containing reg.
1118 If X is not a SUBREG, always return 1 (it is its own low part!). */
1121 subreg_lowpart_p (x
)
1124 if (GET_CODE (x
) != SUBREG
)
1126 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1129 if (WORDS_BIG_ENDIAN
1130 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1131 return (SUBREG_WORD (x
)
1132 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1133 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1136 return SUBREG_WORD (x
) == 0;
1139 /* Return subword I of operand OP.
1140 The word number, I, is interpreted as the word number starting at the
1141 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1142 otherwise it is the high-order word.
1144 If we cannot extract the required word, we return zero. Otherwise, an
1145 rtx corresponding to the requested word will be returned.
1147 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1148 reload has completed, a valid address will always be returned. After
1149 reload, if a valid address cannot be returned, we return zero.
1151 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1152 it is the responsibility of the caller.
1154 MODE is the mode of OP in case it is a CONST_INT. */
1157 operand_subword (op
, i
, validate_address
, mode
)
1160 int validate_address
;
1161 enum machine_mode mode
;
1164 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1165 int bits_per_word
= BITS_PER_WORD
;
1167 if (mode
== VOIDmode
)
1168 mode
= GET_MODE (op
);
1170 if (mode
== VOIDmode
)
1173 /* If OP is narrower than a word, fail. */
1175 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1178 /* If we want a word outside OP, return zero. */
1180 && (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1183 /* If OP is already an integer word, return it. */
1184 if (GET_MODE_CLASS (mode
) == MODE_INT
1185 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1188 /* If OP is a REG or SUBREG, we can handle it very simply. */
1189 if (GET_CODE (op
) == REG
)
1191 /* If the register is not valid for MODE, return 0. If we don't
1192 do this, there is no way to fix up the resulting REG later. */
1193 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1194 && ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
))
1196 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1197 || (REG_FUNCTION_VALUE_P (op
)
1198 && rtx_equal_function_value_matters
)
1199 /* We want to keep the stack, frame, and arg pointers
1201 || op
== frame_pointer_rtx
1202 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1203 || op
== arg_pointer_rtx
1205 || op
== stack_pointer_rtx
)
1206 return gen_rtx_SUBREG (word_mode
, op
, i
);
1208 return gen_rtx_REG (word_mode
, REGNO (op
) + i
);
1210 else if (GET_CODE (op
) == SUBREG
)
1211 return gen_rtx_SUBREG (word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1212 else if (GET_CODE (op
) == CONCAT
)
1214 int partwords
= GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1216 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1217 return operand_subword (XEXP (op
, 1), i
- partwords
,
1218 validate_address
, mode
);
1221 /* Form a new MEM at the requested address. */
1222 if (GET_CODE (op
) == MEM
)
1224 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1227 if (validate_address
)
1229 if (reload_completed
)
1231 if (! strict_memory_address_p (word_mode
, addr
))
1235 addr
= memory_address (word_mode
, addr
);
1238 new = gen_rtx_MEM (word_mode
, addr
);
1240 MEM_COPY_ATTRIBUTES (new, op
);
1241 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1246 /* The only remaining cases are when OP is a constant. If the host and
1247 target floating formats are the same, handling two-word floating
1248 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1249 are defined as returning one or two 32 bit values, respectively,
1250 and not values of BITS_PER_WORD bits. */
1251 #ifdef REAL_ARITHMETIC
1252 /* The output is some bits, the width of the target machine's word.
1253 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1255 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1256 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1257 && GET_MODE_BITSIZE (mode
) == 64
1258 && GET_CODE (op
) == CONST_DOUBLE
)
1263 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1264 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1266 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1267 which the words are written depends on the word endianness.
1269 ??? This is a potential portability problem and should
1270 be fixed at some point. */
1271 if (BITS_PER_WORD
== 32)
1272 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1273 #if HOST_BITS_PER_WIDE_INT > 32
1274 else if (BITS_PER_WORD
>= 64 && i
== 0)
1275 return GEN_INT ((((HOST_WIDE_INT
) k
[! WORDS_BIG_ENDIAN
]) << 32)
1276 | (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
]);
1278 else if (BITS_PER_WORD
== 16)
1282 if ((i
& 0x1) == !WORDS_BIG_ENDIAN
)
1285 return GEN_INT ((HOST_WIDE_INT
) value
);
1290 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1291 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1292 && GET_MODE_BITSIZE (mode
) > 64
1293 && GET_CODE (op
) == CONST_DOUBLE
)
1298 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1299 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1301 if (BITS_PER_WORD
== 32)
1302 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1304 #else /* no REAL_ARITHMETIC */
1305 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1306 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1307 || flag_pretend_float
)
1308 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1309 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1310 && GET_CODE (op
) == CONST_DOUBLE
)
1312 /* The constant is stored in the host's word-ordering,
1313 but we want to access it in the target's word-ordering. Some
1314 compilers don't like a conditional inside macro args, so we have two
1315 copies of the return. */
1316 #ifdef HOST_WORDS_BIG_ENDIAN
1317 return GEN_INT (i
== WORDS_BIG_ENDIAN
1318 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1320 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1321 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1324 #endif /* no REAL_ARITHMETIC */
1326 /* Single word float is a little harder, since single- and double-word
1327 values often do not have the same high-order bits. We have already
1328 verified that we want the only defined word of the single-word value. */
1329 #ifdef REAL_ARITHMETIC
1330 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1331 && GET_MODE_BITSIZE (mode
) == 32
1332 && GET_CODE (op
) == CONST_DOUBLE
)
1337 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1338 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1340 /* If 32 bits is an entire word for the target, but not for the host,
1341 then sign-extend on the host so that the number will look the same
1342 way on the host that it would on the target. See for instance
1343 simplify_unary_operation. The #if is needed to avoid compiler
1346 #if HOST_BITS_PER_LONG > 32
1347 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32
1348 && (l
& ((long) 1 << 31)))
1349 l
|= ((long) (-1) << 32);
1352 if (BITS_PER_WORD
== 16)
1354 if ((i
& 0x1) == !WORDS_BIG_ENDIAN
)
1358 return GEN_INT ((HOST_WIDE_INT
) l
);
1361 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1362 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1363 || flag_pretend_float
)
1364 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1365 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1366 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1367 && GET_CODE (op
) == CONST_DOUBLE
)
1370 union {float f
; HOST_WIDE_INT i
; } u
;
1372 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1375 return GEN_INT (u
.i
);
1377 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1378 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1379 || flag_pretend_float
)
1380 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1381 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1382 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1383 && GET_CODE (op
) == CONST_DOUBLE
)
1386 union {double d
; HOST_WIDE_INT i
; } u
;
1388 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1391 return GEN_INT (u
.i
);
1393 #endif /* no REAL_ARITHMETIC */
1395 /* The only remaining cases that we can handle are integers.
1396 Convert to proper endianness now since these cases need it.
1397 At this point, i == 0 means the low-order word.
1399 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1400 in general. However, if OP is (const_int 0), we can just return
1403 if (op
== const0_rtx
)
1406 if (GET_MODE_CLASS (mode
) != MODE_INT
1407 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1408 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1411 if (WORDS_BIG_ENDIAN
)
1412 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1414 /* Find out which word on the host machine this value is in and get
1415 it from the constant. */
1416 val
= (i
/ size_ratio
== 0
1417 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1418 : (GET_CODE (op
) == CONST_INT
1419 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1421 /* Get the value we want into the low bits of val. */
1422 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1423 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
)));
1425 /* Clear the bits that don't belong in our mode, unless they and our sign
1426 bit are all one. So we get either a reasonable negative value or a
1427 reasonable unsigned value for this mode. */
1428 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
1429 && ((val
& ((HOST_WIDE_INT
) (-1) << (bits_per_word
- 1)))
1430 != ((HOST_WIDE_INT
) (-1) << (bits_per_word
- 1))))
1431 val
&= ((HOST_WIDE_INT
) 1 << bits_per_word
) - 1;
1433 /* If this would be an entire word for the target, but is not for
1434 the host, then sign-extend on the host so that the number will look
1435 the same way on the host that it would on the target.
1437 For example, when building a 64 bit alpha hosted 32 bit sparc
1438 targeted compiler, then we want the 32 bit unsigned value -1 to be
1439 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1440 The later confuses the sparc backend. */
1442 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
1443 && (val
& ((HOST_WIDE_INT
) 1 << (bits_per_word
- 1))))
1444 val
|= ((HOST_WIDE_INT
) (-1) << bits_per_word
);
1446 return GEN_INT (val
);
1449 /* Similar to `operand_subword', but never return 0. If we can't extract
1450 the required subword, put OP into a register and try again. If that fails,
1451 abort. We always validate the address in this case. It is not valid
1452 to call this function after reload; it is mostly meant for RTL
1455 MODE is the mode of OP, in case it is CONST_INT. */
1458 operand_subword_force (op
, i
, mode
)
1461 enum machine_mode mode
;
1463 rtx result
= operand_subword (op
, i
, 1, mode
);
1468 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1470 /* If this is a register which can not be accessed by words, copy it
1471 to a pseudo register. */
1472 if (GET_CODE (op
) == REG
)
1473 op
= copy_to_reg (op
);
1475 op
= force_reg (mode
, op
);
1478 result
= operand_subword (op
, i
, 1, mode
);
1485 /* Given a compare instruction, swap the operands.
1486 A test instruction is changed into a compare of 0 against the operand. */
1489 reverse_comparison (insn
)
1492 rtx body
= PATTERN (insn
);
1495 if (GET_CODE (body
) == SET
)
1496 comp
= SET_SRC (body
);
1498 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1500 if (GET_CODE (comp
) == COMPARE
)
1502 rtx op0
= XEXP (comp
, 0);
1503 rtx op1
= XEXP (comp
, 1);
1504 XEXP (comp
, 0) = op1
;
1505 XEXP (comp
, 1) = op0
;
1509 rtx
new = gen_rtx_COMPARE (VOIDmode
, CONST0_RTX (GET_MODE (comp
)), comp
);
1510 if (GET_CODE (body
) == SET
)
1511 SET_SRC (body
) = new;
1513 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1517 /* Return a memory reference like MEMREF, but with its mode changed
1518 to MODE and its address changed to ADDR.
1519 (VOIDmode means don't change the mode.
1520 NULL for ADDR means don't change the address.) */
1523 change_address (memref
, mode
, addr
)
1525 enum machine_mode mode
;
1530 if (GET_CODE (memref
) != MEM
)
1532 if (mode
== VOIDmode
)
1533 mode
= GET_MODE (memref
);
1535 addr
= XEXP (memref
, 0);
1537 /* If reload is in progress or has completed, ADDR must be valid.
1538 Otherwise, we can call memory_address to make it valid. */
1539 if (reload_completed
|| reload_in_progress
)
1541 if (! memory_address_p (mode
, addr
))
1545 addr
= memory_address (mode
, addr
);
1547 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1550 new = gen_rtx_MEM (mode
, addr
);
1551 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref
);
1552 MEM_COPY_ATTRIBUTES (new, memref
);
1556 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1563 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1564 NULL_RTX
, label_num
++, NULL_PTR
);
1566 LABEL_NUSES (label
) = 0;
1570 /* For procedure integration. */
1572 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1573 from a permanent obstack when the opportunity arises. */
1576 gen_inline_header_rtx (first_insn
, first_parm_insn
, first_labelno
,
1577 last_labelno
, max_parm_regnum
, max_regnum
, args_size
,
1578 pops_args
, stack_slots
, forced_labels
, function_flags
,
1579 outgoing_args_size
, original_arg_vector
,
1580 original_decl_initial
, regno_rtx
, regno_flag
,
1581 regno_align
, parm_reg_stack_loc
)
1582 rtx first_insn
, first_parm_insn
;
1583 int first_labelno
, last_labelno
, max_parm_regnum
, max_regnum
, args_size
;
1588 int outgoing_args_size
;
1589 rtvec original_arg_vector
;
1590 rtx original_decl_initial
;
1594 rtvec parm_reg_stack_loc
;
1596 rtx header
= gen_rtx_INLINE_HEADER (VOIDmode
,
1597 cur_insn_uid
++, NULL_RTX
,
1598 first_insn
, first_parm_insn
,
1599 first_labelno
, last_labelno
,
1600 max_parm_regnum
, max_regnum
, args_size
,
1601 pops_args
, stack_slots
, forced_labels
,
1602 function_flags
, outgoing_args_size
,
1603 original_arg_vector
,
1604 original_decl_initial
,
1605 regno_rtx
, regno_flag
, regno_align
,
1606 parm_reg_stack_loc
);
1610 /* Install new pointers to the first and last insns in the chain.
1611 Also, set cur_insn_uid to one higher than the last in use.
1612 Used for an inline-procedure after copying the insn chain. */
1615 set_new_first_and_last_insn (first
, last
)
1624 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1625 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1630 /* Set the range of label numbers found in the current function.
1631 This is used when belatedly compiling an inline function. */
1634 set_new_first_and_last_label_num (first
, last
)
1637 base_label_num
= label_num
;
1638 first_label_num
= first
;
1639 last_label_num
= last
;
1642 /* Save all variables describing the current status into the structure *P.
1643 This is used before starting a nested function. */
1646 save_emit_status (p
)
1649 p
->reg_rtx_no
= reg_rtx_no
;
1650 p
->first_label_num
= first_label_num
;
1651 p
->first_insn
= first_insn
;
1652 p
->last_insn
= last_insn
;
1653 p
->sequence_rtl_expr
= sequence_rtl_expr
;
1654 p
->sequence_stack
= sequence_stack
;
1655 p
->cur_insn_uid
= cur_insn_uid
;
1656 p
->last_linenum
= last_linenum
;
1657 p
->last_filename
= last_filename
;
1658 p
->regno_pointer_flag
= regno_pointer_flag
;
1659 p
->regno_pointer_align
= regno_pointer_align
;
1660 p
->regno_pointer_flag_length
= regno_pointer_flag_length
;
1661 p
->regno_reg_rtx
= regno_reg_rtx
;
1664 /* Restore all variables describing the current status from the structure *P.
1665 This is used after a nested function. */
1668 restore_emit_status (p
)
1673 reg_rtx_no
= p
->reg_rtx_no
;
1674 first_label_num
= p
->first_label_num
;
1676 first_insn
= p
->first_insn
;
1677 last_insn
= p
->last_insn
;
1678 sequence_rtl_expr
= p
->sequence_rtl_expr
;
1679 sequence_stack
= p
->sequence_stack
;
1680 cur_insn_uid
= p
->cur_insn_uid
;
1681 last_linenum
= p
->last_linenum
;
1682 last_filename
= p
->last_filename
;
1683 regno_pointer_flag
= p
->regno_pointer_flag
;
1684 regno_pointer_align
= p
->regno_pointer_align
;
1685 regno_pointer_flag_length
= p
->regno_pointer_flag_length
;
1686 regno_reg_rtx
= p
->regno_reg_rtx
;
1688 /* Clear our cache of rtx expressions for start_sequence and
1690 sequence_element_free_list
= 0;
1691 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
1692 sequence_result
[i
] = 0;
1697 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1698 It does not work to do this twice, because the mark bits set here
1699 are not cleared afterwards. */
1702 unshare_all_rtl (insn
)
1705 for (; insn
; insn
= NEXT_INSN (insn
))
1706 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
1707 || GET_CODE (insn
) == CALL_INSN
)
1709 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1710 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1711 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1714 /* Make sure the addresses of stack slots found outside the insn chain
1715 (such as, in DECL_RTL of a variable) are not shared
1716 with the insn chain.
1718 This special care is necessary when the stack slot MEM does not
1719 actually appear in the insn chain. If it does appear, its address
1720 is unshared from all else at that point. */
1722 copy_rtx_if_shared (stack_slot_list
);
1725 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1726 Recursively does the same for subexpressions. */
1729 copy_rtx_if_shared (orig
)
1732 register rtx x
= orig
;
1734 register enum rtx_code code
;
1735 register char *format_ptr
;
1741 code
= GET_CODE (x
);
1743 /* These types may be freely shared. */
1756 /* SCRATCH must be shared because they represent distinct values. */
1760 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1761 a LABEL_REF, it isn't sharable. */
1762 if (GET_CODE (XEXP (x
, 0)) == PLUS
1763 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1764 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1773 /* The chain of insns is not being copied. */
1777 /* A MEM is allowed to be shared if its address is constant
1778 or is a constant plus one of the special registers. */
1779 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
1780 || XEXP (x
, 0) == virtual_stack_vars_rtx
1781 || XEXP (x
, 0) == virtual_incoming_args_rtx
)
1784 if (GET_CODE (XEXP (x
, 0)) == PLUS
1785 && (XEXP (XEXP (x
, 0), 0) == virtual_stack_vars_rtx
1786 || XEXP (XEXP (x
, 0), 0) == virtual_incoming_args_rtx
)
1787 && CONSTANT_ADDRESS_P (XEXP (XEXP (x
, 0), 1)))
1789 /* This MEM can appear in more than one place,
1790 but its address better not be shared with anything else. */
1792 XEXP (x
, 0) = copy_rtx_if_shared (XEXP (x
, 0));
1802 /* This rtx may not be shared. If it has already been seen,
1803 replace it with a copy of itself. */
1809 copy
= rtx_alloc (code
);
1810 bcopy ((char *) x
, (char *) copy
,
1811 (sizeof (*copy
) - sizeof (copy
->fld
)
1812 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1818 /* Now scan the subexpressions recursively.
1819 We can store any replaced subexpressions directly into X
1820 since we know X is not shared! Any vectors in X
1821 must be copied if X was copied. */
1823 format_ptr
= GET_RTX_FORMAT (code
);
1825 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1827 switch (*format_ptr
++)
1830 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1834 if (XVEC (x
, i
) != NULL
)
1837 int len
= XVECLEN (x
, i
);
1839 if (copied
&& len
> 0)
1840 XVEC (x
, i
) = gen_rtvec_vv (len
, XVEC (x
, i
)->elem
);
1841 for (j
= 0; j
< len
; j
++)
1842 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1850 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1851 to look for shared sub-parts. */
1854 reset_used_flags (x
)
1858 register enum rtx_code code
;
1859 register char *format_ptr
;
1864 code
= GET_CODE (x
);
1866 /* These types may be freely shared so we needn't do any resetting
1887 /* The chain of insns is not being copied. */
1896 format_ptr
= GET_RTX_FORMAT (code
);
1897 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1899 switch (*format_ptr
++)
1902 reset_used_flags (XEXP (x
, i
));
1906 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1907 reset_used_flags (XVECEXP (x
, i
, j
));
1913 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1914 Return X or the rtx for the pseudo reg the value of X was copied into.
1915 OTHER must be valid as a SET_DEST. */
1918 make_safe_from (x
, other
)
1922 switch (GET_CODE (other
))
1925 other
= SUBREG_REG (other
);
1927 case STRICT_LOW_PART
:
1930 other
= XEXP (other
, 0);
1936 if ((GET_CODE (other
) == MEM
1938 && GET_CODE (x
) != REG
1939 && GET_CODE (x
) != SUBREG
)
1940 || (GET_CODE (other
) == REG
1941 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
1942 || reg_mentioned_p (other
, x
))))
1944 rtx temp
= gen_reg_rtx (GET_MODE (x
));
1945 emit_move_insn (temp
, x
);
1951 /* Emission of insns (adding them to the doubly-linked list). */
1953 /* Return the first insn of the current sequence or current function. */
1961 /* Return the last insn emitted in current sequence or current function. */
1969 /* Specify a new insn as the last in the chain. */
1972 set_last_insn (insn
)
1975 if (NEXT_INSN (insn
) != 0)
1980 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1983 get_last_insn_anywhere ()
1985 struct sequence_stack
*stack
;
1988 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
1989 if (stack
->last
!= 0)
1994 /* Return a number larger than any instruction's uid in this function. */
1999 return cur_insn_uid
;
2002 /* Return the next insn. If it is a SEQUENCE, return the first insn
2011 insn
= NEXT_INSN (insn
);
2012 if (insn
&& GET_CODE (insn
) == INSN
2013 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2014 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2020 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2024 previous_insn (insn
)
2029 insn
= PREV_INSN (insn
);
2030 if (insn
&& GET_CODE (insn
) == INSN
2031 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2032 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2038 /* Return the next insn after INSN that is not a NOTE. This routine does not
2039 look inside SEQUENCEs. */
2042 next_nonnote_insn (insn
)
2047 insn
= NEXT_INSN (insn
);
2048 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2055 /* Return the previous insn before INSN that is not a NOTE. This routine does
2056 not look inside SEQUENCEs. */
2059 prev_nonnote_insn (insn
)
2064 insn
= PREV_INSN (insn
);
2065 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2072 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2073 or 0, if there is none. This routine does not look inside
2077 next_real_insn (insn
)
2082 insn
= NEXT_INSN (insn
);
2083 if (insn
== 0 || GET_CODE (insn
) == INSN
2084 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2091 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2092 or 0, if there is none. This routine does not look inside
2096 prev_real_insn (insn
)
2101 insn
= PREV_INSN (insn
);
2102 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2103 || GET_CODE (insn
) == JUMP_INSN
)
2110 /* Find the next insn after INSN that really does something. This routine
2111 does not look inside SEQUENCEs. Until reload has completed, this is the
2112 same as next_real_insn. */
2115 next_active_insn (insn
)
2120 insn
= NEXT_INSN (insn
);
2122 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2123 || (GET_CODE (insn
) == INSN
2124 && (! reload_completed
2125 || (GET_CODE (PATTERN (insn
)) != USE
2126 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2133 /* Find the last insn before INSN that really does something. This routine
2134 does not look inside SEQUENCEs. Until reload has completed, this is the
2135 same as prev_real_insn. */
2138 prev_active_insn (insn
)
2143 insn
= PREV_INSN (insn
);
2145 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2146 || (GET_CODE (insn
) == INSN
2147 && (! reload_completed
2148 || (GET_CODE (PATTERN (insn
)) != USE
2149 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2156 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2164 insn
= NEXT_INSN (insn
);
2165 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2172 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2180 insn
= PREV_INSN (insn
);
2181 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2189 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2190 and REG_CC_USER notes so we can find it. */
2193 link_cc0_insns (insn
)
2196 rtx user
= next_nonnote_insn (insn
);
2198 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2199 user
= XVECEXP (PATTERN (user
), 0, 0);
2201 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
, REG_NOTES (user
));
2202 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2205 /* Return the next insn that uses CC0 after INSN, which is assumed to
2206 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2207 applied to the result of this function should yield INSN).
2209 Normally, this is simply the next insn. However, if a REG_CC_USER note
2210 is present, it contains the insn that uses CC0.
2212 Return 0 if we can't find the insn. */
2215 next_cc0_user (insn
)
2218 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2221 return XEXP (note
, 0);
2223 insn
= next_nonnote_insn (insn
);
2224 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2225 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2227 if (insn
&& GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2228 && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2234 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2235 note, it is the previous insn. */
2238 prev_cc0_setter (insn
)
2241 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2244 return XEXP (note
, 0);
2246 insn
= prev_nonnote_insn (insn
);
2247 if (! sets_cc0_p (PATTERN (insn
)))
2254 /* Try splitting insns that can be split for better scheduling.
2255 PAT is the pattern which might split.
2256 TRIAL is the insn providing PAT.
2257 LAST is non-zero if we should return the last insn of the sequence produced.
2259 If this routine succeeds in splitting, it returns the first or last
2260 replacement insn depending on the value of LAST. Otherwise, it
2261 returns TRIAL. If the insn to be returned can be split, it will be. */
2264 try_split (pat
, trial
, last
)
2268 rtx before
= PREV_INSN (trial
);
2269 rtx after
= NEXT_INSN (trial
);
2270 rtx seq
= split_insns (pat
, trial
);
2271 int has_barrier
= 0;
2274 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2275 We may need to handle this specially. */
2276 if (after
&& GET_CODE (after
) == BARRIER
)
2279 after
= NEXT_INSN (after
);
2284 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2285 The latter case will normally arise only when being done so that
2286 it, in turn, will be split (SFmode on the 29k is an example). */
2287 if (GET_CODE (seq
) == SEQUENCE
)
2289 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2290 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2291 increment the usage count so we don't delete the label. */
2294 if (GET_CODE (trial
) == JUMP_INSN
)
2295 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2296 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2298 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
2300 if (JUMP_LABEL (trial
))
2301 LABEL_NUSES (JUMP_LABEL (trial
))++;
2304 tem
= emit_insn_after (seq
, before
);
2306 delete_insn (trial
);
2308 emit_barrier_after (tem
);
2310 /* Recursively call try_split for each new insn created; by the
2311 time control returns here that insn will be fully split, so
2312 set LAST and continue from the insn after the one returned.
2313 We can't use next_active_insn here since AFTER may be a note.
2314 Ignore deleted insns, which can be occur if not optimizing. */
2315 for (tem
= NEXT_INSN (before
); tem
!= after
;
2316 tem
= NEXT_INSN (tem
))
2317 if (! INSN_DELETED_P (tem
)
2318 && GET_RTX_CLASS (GET_CODE (tem
)) == 'i')
2319 tem
= try_split (PATTERN (tem
), tem
, 1);
2321 /* Avoid infinite loop if the result matches the original pattern. */
2322 else if (rtx_equal_p (seq
, pat
))
2326 PATTERN (trial
) = seq
;
2327 INSN_CODE (trial
) = -1;
2328 try_split (seq
, trial
, last
);
2331 /* Return either the first or the last insn, depending on which was
2333 return last
? prev_active_insn (after
) : next_active_insn (before
);
2339 /* Make and return an INSN rtx, initializing all its slots.
2340 Store PATTERN in the pattern slots. */
2343 make_insn_raw (pattern
)
2348 /* If in RTL generation phase, see if FREE_INSN can be used. */
2349 if (free_insn
!= 0 && rtx_equal_function_value_matters
)
2352 free_insn
= NEXT_INSN (free_insn
);
2353 PUT_CODE (insn
, INSN
);
2356 insn
= rtx_alloc (INSN
);
2358 INSN_UID (insn
) = cur_insn_uid
++;
2359 PATTERN (insn
) = pattern
;
2360 INSN_CODE (insn
) = -1;
2361 LOG_LINKS (insn
) = NULL
;
2362 REG_NOTES (insn
) = NULL
;
2367 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2370 make_jump_insn_raw (pattern
)
2375 insn
= rtx_alloc (JUMP_INSN
);
2376 INSN_UID (insn
) = cur_insn_uid
++;
2378 PATTERN (insn
) = pattern
;
2379 INSN_CODE (insn
) = -1;
2380 LOG_LINKS (insn
) = NULL
;
2381 REG_NOTES (insn
) = NULL
;
2382 JUMP_LABEL (insn
) = NULL
;
2387 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2390 make_call_insn_raw (pattern
)
2395 insn
= rtx_alloc (CALL_INSN
);
2396 INSN_UID (insn
) = cur_insn_uid
++;
2398 PATTERN (insn
) = pattern
;
2399 INSN_CODE (insn
) = -1;
2400 LOG_LINKS (insn
) = NULL
;
2401 REG_NOTES (insn
) = NULL
;
2402 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2407 /* Add INSN to the end of the doubly-linked list.
2408 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2414 PREV_INSN (insn
) = last_insn
;
2415 NEXT_INSN (insn
) = 0;
2417 if (NULL
!= last_insn
)
2418 NEXT_INSN (last_insn
) = insn
;
2420 if (NULL
== first_insn
)
2426 /* Add INSN into the doubly-linked list after insn AFTER. This and
2427 the next should be the only functions called to insert an insn once
2428 delay slots have been filled since only they know how to update a
2432 add_insn_after (insn
, after
)
2435 rtx next
= NEXT_INSN (after
);
2437 if (optimize
&& INSN_DELETED_P (after
))
2440 NEXT_INSN (insn
) = next
;
2441 PREV_INSN (insn
) = after
;
2445 PREV_INSN (next
) = insn
;
2446 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2447 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2449 else if (last_insn
== after
)
2453 struct sequence_stack
*stack
= sequence_stack
;
2454 /* Scan all pending sequences too. */
2455 for (; stack
; stack
= stack
->next
)
2456 if (after
== stack
->last
)
2466 NEXT_INSN (after
) = insn
;
2467 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2469 rtx sequence
= PATTERN (after
);
2470 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2474 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2475 the previous should be the only functions called to insert an insn once
2476 delay slots have been filled since only they know how to update a
2480 add_insn_before (insn
, before
)
2483 rtx prev
= PREV_INSN (before
);
2485 if (optimize
&& INSN_DELETED_P (before
))
2488 PREV_INSN (insn
) = prev
;
2489 NEXT_INSN (insn
) = before
;
2493 NEXT_INSN (prev
) = insn
;
2494 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2496 rtx sequence
= PATTERN (prev
);
2497 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2500 else if (first_insn
== before
)
2504 struct sequence_stack
*stack
= sequence_stack
;
2505 /* Scan all pending sequences too. */
2506 for (; stack
; stack
= stack
->next
)
2507 if (before
== stack
->first
)
2509 stack
->first
= insn
;
2517 PREV_INSN (before
) = insn
;
2518 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2519 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2522 /* Remove an insn from its doubly-linked list. This function knows how
2523 to handle sequences. */
2528 rtx next
= NEXT_INSN (insn
);
2529 rtx prev
= PREV_INSN (insn
);
2532 NEXT_INSN (prev
) = next
;
2533 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2535 rtx sequence
= PATTERN (prev
);
2536 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
2539 else if (first_insn
== insn
)
2543 struct sequence_stack
*stack
= sequence_stack
;
2544 /* Scan all pending sequences too. */
2545 for (; stack
; stack
= stack
->next
)
2546 if (insn
== stack
->first
)
2548 stack
->first
= next
;
2558 PREV_INSN (next
) = prev
;
2559 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2560 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
2562 else if (last_insn
== insn
)
2566 struct sequence_stack
*stack
= sequence_stack
;
2567 /* Scan all pending sequences too. */
2568 for (; stack
; stack
= stack
->next
)
2569 if (insn
== stack
->last
)
2580 /* Delete all insns made since FROM.
2581 FROM becomes the new last instruction. */
2584 delete_insns_since (from
)
2590 NEXT_INSN (from
) = 0;
2594 /* This function is deprecated, please use sequences instead.
2596 Move a consecutive bunch of insns to a different place in the chain.
2597 The insns to be moved are those between FROM and TO.
2598 They are moved to a new position after the insn AFTER.
2599 AFTER must not be FROM or TO or any insn in between.
2601 This function does not know about SEQUENCEs and hence should not be
2602 called after delay-slot filling has been done. */
2605 reorder_insns (from
, to
, after
)
2606 rtx from
, to
, after
;
2608 /* Splice this bunch out of where it is now. */
2609 if (PREV_INSN (from
))
2610 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2612 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2613 if (last_insn
== to
)
2614 last_insn
= PREV_INSN (from
);
2615 if (first_insn
== from
)
2616 first_insn
= NEXT_INSN (to
);
2618 /* Make the new neighbors point to it and it to them. */
2619 if (NEXT_INSN (after
))
2620 PREV_INSN (NEXT_INSN (after
)) = to
;
2622 NEXT_INSN (to
) = NEXT_INSN (after
);
2623 PREV_INSN (from
) = after
;
2624 NEXT_INSN (after
) = from
;
2625 if (after
== last_insn
)
2629 /* Return the line note insn preceding INSN. */
2632 find_line_note (insn
)
2635 if (no_line_numbers
)
2638 for (; insn
; insn
= PREV_INSN (insn
))
2639 if (GET_CODE (insn
) == NOTE
2640 && NOTE_LINE_NUMBER (insn
) >= 0)
2646 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2647 of the moved insns when debugging. This may insert a note between AFTER
2648 and FROM, and another one after TO. */
2651 reorder_insns_with_line_notes (from
, to
, after
)
2652 rtx from
, to
, after
;
2654 rtx from_line
= find_line_note (from
);
2655 rtx after_line
= find_line_note (after
);
2657 reorder_insns (from
, to
, after
);
2659 if (from_line
== after_line
)
2663 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2664 NOTE_LINE_NUMBER (from_line
),
2667 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2668 NOTE_LINE_NUMBER (after_line
),
2672 /* Emit an insn of given code and pattern
2673 at a specified place within the doubly-linked list. */
2675 /* Make an instruction with body PATTERN
2676 and output it before the instruction BEFORE. */
2679 emit_insn_before (pattern
, before
)
2680 register rtx pattern
, before
;
2682 register rtx insn
= before
;
2684 if (GET_CODE (pattern
) == SEQUENCE
)
2688 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2690 insn
= XVECEXP (pattern
, 0, i
);
2691 add_insn_before (insn
, before
);
2693 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2694 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2698 insn
= make_insn_raw (pattern
);
2699 add_insn_before (insn
, before
);
2705 /* Make an instruction with body PATTERN and code JUMP_INSN
2706 and output it before the instruction BEFORE. */
2709 emit_jump_insn_before (pattern
, before
)
2710 register rtx pattern
, before
;
2714 if (GET_CODE (pattern
) == SEQUENCE
)
2715 insn
= emit_insn_before (pattern
, before
);
2718 insn
= make_jump_insn_raw (pattern
);
2719 add_insn_before (insn
, before
);
2725 /* Make an instruction with body PATTERN and code CALL_INSN
2726 and output it before the instruction BEFORE. */
2729 emit_call_insn_before (pattern
, before
)
2730 register rtx pattern
, before
;
2734 if (GET_CODE (pattern
) == SEQUENCE
)
2735 insn
= emit_insn_before (pattern
, before
);
2738 insn
= make_call_insn_raw (pattern
);
2739 add_insn_before (insn
, before
);
2740 PUT_CODE (insn
, CALL_INSN
);
2746 /* Make an insn of code BARRIER
2747 and output it before the insn BEFORE. */
2750 emit_barrier_before (before
)
2751 register rtx before
;
2753 register rtx insn
= rtx_alloc (BARRIER
);
2755 INSN_UID (insn
) = cur_insn_uid
++;
2757 add_insn_before (insn
, before
);
2761 /* Emit the label LABEL before the insn BEFORE. */
2764 emit_label_before (label
, before
)
2767 /* This can be called twice for the same label as a result of the
2768 confusion that follows a syntax error! So make it harmless. */
2769 if (INSN_UID (label
) == 0)
2771 INSN_UID (label
) = cur_insn_uid
++;
2772 add_insn_before (label
, before
);
2778 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2781 emit_note_before (subtype
, before
)
2785 register rtx note
= rtx_alloc (NOTE
);
2786 INSN_UID (note
) = cur_insn_uid
++;
2787 NOTE_SOURCE_FILE (note
) = 0;
2788 NOTE_LINE_NUMBER (note
) = subtype
;
2790 add_insn_before (note
, before
);
2794 /* Make an insn of code INSN with body PATTERN
2795 and output it after the insn AFTER. */
2798 emit_insn_after (pattern
, after
)
2799 register rtx pattern
, after
;
2801 register rtx insn
= after
;
2803 if (GET_CODE (pattern
) == SEQUENCE
)
2807 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2809 insn
= XVECEXP (pattern
, 0, i
);
2810 add_insn_after (insn
, after
);
2813 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2814 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2818 insn
= make_insn_raw (pattern
);
2819 add_insn_after (insn
, after
);
2825 /* Similar to emit_insn_after, except that line notes are to be inserted so
2826 as to act as if this insn were at FROM. */
2829 emit_insn_after_with_line_notes (pattern
, after
, from
)
2830 rtx pattern
, after
, from
;
2832 rtx from_line
= find_line_note (from
);
2833 rtx after_line
= find_line_note (after
);
2834 rtx insn
= emit_insn_after (pattern
, after
);
2837 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2838 NOTE_LINE_NUMBER (from_line
),
2842 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2843 NOTE_LINE_NUMBER (after_line
),
2847 /* Make an insn of code JUMP_INSN with body PATTERN
2848 and output it after the insn AFTER. */
2851 emit_jump_insn_after (pattern
, after
)
2852 register rtx pattern
, after
;
2856 if (GET_CODE (pattern
) == SEQUENCE
)
2857 insn
= emit_insn_after (pattern
, after
);
2860 insn
= make_jump_insn_raw (pattern
);
2861 add_insn_after (insn
, after
);
2867 /* Make an insn of code BARRIER
2868 and output it after the insn AFTER. */
2871 emit_barrier_after (after
)
2874 register rtx insn
= rtx_alloc (BARRIER
);
2876 INSN_UID (insn
) = cur_insn_uid
++;
2878 add_insn_after (insn
, after
);
2882 /* Emit the label LABEL after the insn AFTER. */
2885 emit_label_after (label
, after
)
2888 /* This can be called twice for the same label
2889 as a result of the confusion that follows a syntax error!
2890 So make it harmless. */
2891 if (INSN_UID (label
) == 0)
2893 INSN_UID (label
) = cur_insn_uid
++;
2894 add_insn_after (label
, after
);
2900 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2903 emit_note_after (subtype
, after
)
2907 register rtx note
= rtx_alloc (NOTE
);
2908 INSN_UID (note
) = cur_insn_uid
++;
2909 NOTE_SOURCE_FILE (note
) = 0;
2910 NOTE_LINE_NUMBER (note
) = subtype
;
2911 add_insn_after (note
, after
);
2915 /* Emit a line note for FILE and LINE after the insn AFTER. */
2918 emit_line_note_after (file
, line
, after
)
2925 if (no_line_numbers
&& line
> 0)
2931 note
= rtx_alloc (NOTE
);
2932 INSN_UID (note
) = cur_insn_uid
++;
2933 NOTE_SOURCE_FILE (note
) = file
;
2934 NOTE_LINE_NUMBER (note
) = line
;
2935 add_insn_after (note
, after
);
2939 /* Make an insn of code INSN with pattern PATTERN
2940 and add it to the end of the doubly-linked list.
2941 If PATTERN is a SEQUENCE, take the elements of it
2942 and emit an insn for each element.
2944 Returns the last insn emitted. */
2950 rtx insn
= last_insn
;
2952 if (GET_CODE (pattern
) == SEQUENCE
)
2956 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2958 insn
= XVECEXP (pattern
, 0, i
);
2961 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2962 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2966 insn
= make_insn_raw (pattern
);
2973 /* Emit the insns in a chain starting with INSN.
2974 Return the last insn emitted. */
2984 rtx next
= NEXT_INSN (insn
);
2993 /* Emit the insns in a chain starting with INSN and place them in front of
2994 the insn BEFORE. Return the last insn emitted. */
2997 emit_insns_before (insn
, before
)
3005 rtx next
= NEXT_INSN (insn
);
3006 add_insn_before (insn
, before
);
3014 /* Emit the insns in a chain starting with FIRST and place them in back of
3015 the insn AFTER. Return the last insn emitted. */
3018 emit_insns_after (first
, after
)
3023 register rtx after_after
;
3031 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3034 after_after
= NEXT_INSN (after
);
3036 NEXT_INSN (after
) = first
;
3037 PREV_INSN (first
) = after
;
3038 NEXT_INSN (last
) = after_after
;
3040 PREV_INSN (after_after
) = last
;
3042 if (after
== last_insn
)
3047 /* Make an insn of code JUMP_INSN with pattern PATTERN
3048 and add it to the end of the doubly-linked list. */
3051 emit_jump_insn (pattern
)
3054 if (GET_CODE (pattern
) == SEQUENCE
)
3055 return emit_insn (pattern
);
3058 register rtx insn
= make_jump_insn_raw (pattern
);
3064 /* Make an insn of code CALL_INSN with pattern PATTERN
3065 and add it to the end of the doubly-linked list. */
3068 emit_call_insn (pattern
)
3071 if (GET_CODE (pattern
) == SEQUENCE
)
3072 return emit_insn (pattern
);
3075 register rtx insn
= make_call_insn_raw (pattern
);
3077 PUT_CODE (insn
, CALL_INSN
);
3082 /* Add the label LABEL to the end of the doubly-linked list. */
3088 /* This can be called twice for the same label
3089 as a result of the confusion that follows a syntax error!
3090 So make it harmless. */
3091 if (INSN_UID (label
) == 0)
3093 INSN_UID (label
) = cur_insn_uid
++;
3099 /* Make an insn of code BARRIER
3100 and add it to the end of the doubly-linked list. */
3105 register rtx barrier
= rtx_alloc (BARRIER
);
3106 INSN_UID (barrier
) = cur_insn_uid
++;
3111 /* Make an insn of code NOTE
3112 with data-fields specified by FILE and LINE
3113 and add it to the end of the doubly-linked list,
3114 but only if line-numbers are desired for debugging info. */
3117 emit_line_note (file
, line
)
3121 emit_filename
= file
;
3125 if (no_line_numbers
)
3129 return emit_note (file
, line
);
3132 /* Make an insn of code NOTE
3133 with data-fields specified by FILE and LINE
3134 and add it to the end of the doubly-linked list.
3135 If it is a line-number NOTE, omit it if it matches the previous one. */
3138 emit_note (file
, line
)
3146 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3147 && line
== last_linenum
)
3149 last_filename
= file
;
3150 last_linenum
= line
;
3153 if (no_line_numbers
&& line
> 0)
3159 note
= rtx_alloc (NOTE
);
3160 INSN_UID (note
) = cur_insn_uid
++;
3161 NOTE_SOURCE_FILE (note
) = file
;
3162 NOTE_LINE_NUMBER (note
) = line
;
3167 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3170 emit_line_note_force (file
, line
)
3175 return emit_line_note (file
, line
);
3178 /* Cause next statement to emit a line note even if the line number
3179 has not changed. This is used at the beginning of a function. */
3182 force_next_line_note ()
3187 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3188 note of this type already exists, remove it first. */
3191 set_unique_reg_note (insn
, kind
, datum
)
3196 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3198 /* First remove the note if there already is one. */
3200 remove_note (insn
, note
);
3202 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3205 /* Return an indication of which type of insn should have X as a body.
3206 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3212 if (GET_CODE (x
) == CODE_LABEL
)
3214 if (GET_CODE (x
) == CALL
)
3216 if (GET_CODE (x
) == RETURN
)
3218 if (GET_CODE (x
) == SET
)
3220 if (SET_DEST (x
) == pc_rtx
)
3222 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3227 if (GET_CODE (x
) == PARALLEL
)
3230 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3231 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3233 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3234 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3236 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3237 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3243 /* Emit the rtl pattern X as an appropriate kind of insn.
3244 If X is a label, it is simply added into the insn chain. */
3250 enum rtx_code code
= classify_insn (x
);
3252 if (code
== CODE_LABEL
)
3253 return emit_label (x
);
3254 else if (code
== INSN
)
3255 return emit_insn (x
);
3256 else if (code
== JUMP_INSN
)
3258 register rtx insn
= emit_jump_insn (x
);
3259 if (simplejump_p (insn
) || GET_CODE (x
) == RETURN
)
3260 return emit_barrier ();
3263 else if (code
== CALL_INSN
)
3264 return emit_call_insn (x
);
3269 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3274 struct sequence_stack
*tem
;
3276 if (sequence_element_free_list
)
3278 /* Reuse a previously-saved struct sequence_stack. */
3279 tem
= sequence_element_free_list
;
3280 sequence_element_free_list
= tem
->next
;
3283 tem
= (struct sequence_stack
*) permalloc (sizeof (struct sequence_stack
));
3285 tem
->next
= sequence_stack
;
3286 tem
->first
= first_insn
;
3287 tem
->last
= last_insn
;
3288 tem
->sequence_rtl_expr
= sequence_rtl_expr
;
3290 sequence_stack
= tem
;
3296 /* Similarly, but indicate that this sequence will be placed in
3300 start_sequence_for_rtl_expr (t
)
3305 sequence_rtl_expr
= t
;
3308 /* Set up the insn chain starting with FIRST
3309 as the current sequence, saving the previously current one. */
3312 push_to_sequence (first
)
3319 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3325 /* Set up the outer-level insn chain
3326 as the current sequence, saving the previously current one. */
3329 push_topmost_sequence ()
3331 struct sequence_stack
*stack
, *top
= NULL
;
3335 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3338 first_insn
= top
->first
;
3339 last_insn
= top
->last
;
3340 sequence_rtl_expr
= top
->sequence_rtl_expr
;
3343 /* After emitting to the outer-level insn chain, update the outer-level
3344 insn chain, and restore the previous saved state. */
3347 pop_topmost_sequence ()
3349 struct sequence_stack
*stack
, *top
= NULL
;
3351 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3354 top
->first
= first_insn
;
3355 top
->last
= last_insn
;
3356 /* ??? Why don't we save sequence_rtl_expr here? */
3361 /* After emitting to a sequence, restore previous saved state.
3363 To get the contents of the sequence just made,
3364 you must call `gen_sequence' *before* calling here. */
3369 struct sequence_stack
*tem
= sequence_stack
;
3371 first_insn
= tem
->first
;
3372 last_insn
= tem
->last
;
3373 sequence_rtl_expr
= tem
->sequence_rtl_expr
;
3374 sequence_stack
= tem
->next
;
3376 tem
->next
= sequence_element_free_list
;
3377 sequence_element_free_list
= tem
;
3380 /* Return 1 if currently emitting into a sequence. */
3385 return sequence_stack
!= 0;
3388 /* Generate a SEQUENCE rtx containing the insns already emitted
3389 to the current sequence.
3391 This is how the gen_... function from a DEFINE_EXPAND
3392 constructs the SEQUENCE that it returns. */
3402 /* Count the insns in the chain. */
3404 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3407 /* If only one insn, return its pattern rather than a SEQUENCE.
3408 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3409 the case of an empty list.) */
3411 && ! RTX_FRAME_RELATED_P (first_insn
)
3412 && (GET_CODE (first_insn
) == INSN
3413 || GET_CODE (first_insn
) == JUMP_INSN
3414 /* Don't discard the call usage field. */
3415 || (GET_CODE (first_insn
) == CALL_INSN
3416 && CALL_INSN_FUNCTION_USAGE (first_insn
) == NULL_RTX
)))
3418 NEXT_INSN (first_insn
) = free_insn
;
3419 free_insn
= first_insn
;
3420 return PATTERN (first_insn
);
3423 /* Put them in a vector. See if we already have a SEQUENCE of the
3424 appropriate length around. */
3425 if (len
< SEQUENCE_RESULT_SIZE
&& (result
= sequence_result
[len
]) != 0)
3426 sequence_result
[len
] = 0;
3429 /* Ensure that this rtl goes in saveable_obstack, since we may
3431 push_obstacks_nochange ();
3432 rtl_in_saveable_obstack ();
3433 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3437 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3438 XVECEXP (result
, 0, i
) = tem
;
3443 /* Put the various virtual registers into REGNO_REG_RTX. */
3446 init_virtual_regs ()
3448 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3449 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3450 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3451 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3452 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3455 /* Initialize data structures and variables in this file
3456 before generating rtl for each function. */
3465 sequence_rtl_expr
= NULL
;
3467 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3470 first_label_num
= label_num
;
3472 sequence_stack
= NULL
;
3474 /* Clear the start_sequence/gen_sequence cache. */
3475 sequence_element_free_list
= 0;
3476 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3477 sequence_result
[i
] = 0;
3480 /* Init the tables that describe all the pseudo regs. */
3482 regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
3485 = (char *) savealloc (regno_pointer_flag_length
);
3486 bzero (regno_pointer_flag
, regno_pointer_flag_length
);
3489 = (char *) savealloc (regno_pointer_flag_length
);
3490 bzero (regno_pointer_align
, regno_pointer_flag_length
);
3493 = (rtx
*) savealloc (regno_pointer_flag_length
* sizeof (rtx
));
3494 bzero ((char *) regno_reg_rtx
, regno_pointer_flag_length
* sizeof (rtx
));
3496 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3497 init_virtual_regs ();
3499 /* Indicate that the virtual registers and stack locations are
3501 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
3502 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
3503 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM
) = 1;
3504 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
3506 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
3507 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
3508 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
3509 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
3510 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM
) = 1;
3512 #ifdef STACK_BOUNDARY
3513 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3514 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3515 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
)
3516 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3517 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3519 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
)
3520 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3521 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
)
3522 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3523 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
)
3524 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3525 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
)
3526 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3527 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = UNITS_PER_WORD
;
3530 #ifdef INIT_EXPANDERS
3535 /* Create some permanent unique rtl objects shared between all functions.
3536 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3539 init_emit_once (line_numbers
)
3543 enum machine_mode mode
;
3544 enum machine_mode double_mode
;
3546 no_line_numbers
= ! line_numbers
;
3548 sequence_stack
= NULL
;
3550 /* Compute the word and byte modes. */
3552 byte_mode
= VOIDmode
;
3553 word_mode
= VOIDmode
;
3554 double_mode
= VOIDmode
;
3556 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3557 mode
= GET_MODE_WIDER_MODE (mode
))
3559 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
3560 && byte_mode
== VOIDmode
)
3563 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
3564 && word_mode
== VOIDmode
)
3568 #ifndef DOUBLE_TYPE_SIZE
3569 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3572 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3573 mode
= GET_MODE_WIDER_MODE (mode
))
3575 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
3576 && double_mode
== VOIDmode
)
3580 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
3582 /* Create the unique rtx's for certain rtx codes and operand values. */
3584 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
3586 PUT_CODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], CONST_INT
);
3587 PUT_MODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], VOIDmode
);
3588 INTVAL (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
]) = i
;
3591 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
3592 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
3593 const_true_rtx
= &const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
3595 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
3597 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
3598 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
3599 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
3600 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
3602 for (i
= 0; i
<= 2; i
++)
3604 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3605 mode
= GET_MODE_WIDER_MODE (mode
))
3607 rtx tem
= rtx_alloc (CONST_DOUBLE
);
3608 union real_extract u
;
3610 bzero ((char *) &u
, sizeof u
); /* Zero any holes in a structure. */
3611 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
3613 bcopy ((char *) &u
, (char *) &CONST_DOUBLE_LOW (tem
), sizeof u
);
3614 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
3615 PUT_MODE (tem
, mode
);
3617 const_tiny_rtx
[i
][(int) mode
] = tem
;
3620 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
3622 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3623 mode
= GET_MODE_WIDER_MODE (mode
))
3624 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3626 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
3628 mode
= GET_MODE_WIDER_MODE (mode
))
3629 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3632 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_CC
); mode
!= VOIDmode
;
3633 mode
= GET_MODE_WIDER_MODE (mode
))
3634 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
3637 /* Assign register numbers to the globally defined register rtx.
3638 This must be done at runtime because the register number field
3639 is in a union and some compilers can't initialize unions. */
3641 REGNO (stack_pointer_rtx
) = STACK_POINTER_REGNUM
;
3642 PUT_MODE (stack_pointer_rtx
, Pmode
);
3643 REGNO (frame_pointer_rtx
) = FRAME_POINTER_REGNUM
;
3644 PUT_MODE (frame_pointer_rtx
, Pmode
);
3645 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3646 REGNO (hard_frame_pointer_rtx
) = HARD_FRAME_POINTER_REGNUM
;
3647 PUT_MODE (hard_frame_pointer_rtx
, Pmode
);
3649 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3650 REGNO (arg_pointer_rtx
) = ARG_POINTER_REGNUM
;
3651 PUT_MODE (arg_pointer_rtx
, Pmode
);
3654 REGNO (virtual_incoming_args_rtx
) = VIRTUAL_INCOMING_ARGS_REGNUM
;
3655 PUT_MODE (virtual_incoming_args_rtx
, Pmode
);
3656 REGNO (virtual_stack_vars_rtx
) = VIRTUAL_STACK_VARS_REGNUM
;
3657 PUT_MODE (virtual_stack_vars_rtx
, Pmode
);
3658 REGNO (virtual_stack_dynamic_rtx
) = VIRTUAL_STACK_DYNAMIC_REGNUM
;
3659 PUT_MODE (virtual_stack_dynamic_rtx
, Pmode
);
3660 REGNO (virtual_outgoing_args_rtx
) = VIRTUAL_OUTGOING_ARGS_REGNUM
;
3661 PUT_MODE (virtual_outgoing_args_rtx
, Pmode
);
3662 REGNO (virtual_cfa_rtx
) = VIRTUAL_CFA_REGNUM
;
3663 PUT_MODE (virtual_cfa_rtx
, Pmode
);
3665 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3666 return_address_pointer_rtx
3667 = gen_rtx_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
3671 struct_value_rtx
= STRUCT_VALUE
;
3673 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
3676 #ifdef STRUCT_VALUE_INCOMING
3677 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
3679 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3680 struct_value_incoming_rtx
3681 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
3683 struct_value_incoming_rtx
= struct_value_rtx
;
3687 #ifdef STATIC_CHAIN_REGNUM
3688 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
3690 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3691 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
3692 static_chain_incoming_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
3695 static_chain_incoming_rtx
= static_chain_rtx
;
3699 static_chain_rtx
= STATIC_CHAIN
;
3701 #ifdef STATIC_CHAIN_INCOMING
3702 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
3704 static_chain_incoming_rtx
= static_chain_rtx
;
3708 #ifdef PIC_OFFSET_TABLE_REGNUM
3709 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
3712 #ifdef INIT_EXPANDERS
3713 /* This is to initialize save_machine_status and restore_machine_status before
3714 the first call to push_function_context_to. This is needed by the Chill
3715 front end which calls push_function_context_to before the first cal to
3716 init_function_start. */
3721 /* Query and clear/ restore no_line_numbers. This is used by the
3722 switch / case handling in stmt.c to give proper line numbers in
3723 warnings about unreachable code. */
3726 force_line_numbers ()
3728 int old
= no_line_numbers
;
3730 no_line_numbers
= 0;
3732 force_next_line_note ();
3737 restore_line_number_status (old_value
)
3740 no_line_numbers
= old_value
;