1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl
;
66 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl
;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num
= 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
97 is set only for MODE_INT and MODE_VECTOR_INT modes. */
99 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
103 REAL_VALUE_TYPE dconst0
;
104 REAL_VALUE_TYPE dconst1
;
105 REAL_VALUE_TYPE dconst2
;
106 REAL_VALUE_TYPE dconstm1
;
107 REAL_VALUE_TYPE dconsthalf
;
109 /* Record fixed-point constant 0 and 1. */
110 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
111 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
113 /* We make one copy of (const_int C) where C is in
114 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
115 to save space during the compilation and simplify comparisons of
118 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
120 /* A hash table storing CONST_INTs whose absolute value is greater
121 than MAX_SAVED_CONST_INT. */
123 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
124 htab_t const_int_htab
;
126 /* A hash table storing memory attribute structures. */
127 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
128 htab_t mem_attrs_htab
;
130 /* A hash table storing register attribute structures. */
131 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
132 htab_t reg_attrs_htab
;
134 /* A hash table storing all CONST_DOUBLEs. */
135 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
136 htab_t const_double_htab
;
138 /* A hash table storing all CONST_FIXEDs. */
139 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
140 htab_t const_fixed_htab
;
142 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
143 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
144 #define last_location (crtl->emit.x_last_location)
145 #define first_label_num (crtl->emit.x_first_label_num)
147 static rtx
make_call_insn_raw (rtx
);
148 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
149 static void set_used_decls (tree
);
150 static void mark_label_nuses (rtx
);
151 static hashval_t
const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 static hashval_t
const_double_htab_hash (const void *);
154 static int const_double_htab_eq (const void *, const void *);
155 static rtx
lookup_const_double (rtx
);
156 static hashval_t
const_fixed_htab_hash (const void *);
157 static int const_fixed_htab_eq (const void *, const void *);
158 static rtx
lookup_const_fixed (rtx
);
159 static hashval_t
mem_attrs_htab_hash (const void *);
160 static int mem_attrs_htab_eq (const void *, const void *);
161 static hashval_t
reg_attrs_htab_hash (const void *);
162 static int reg_attrs_htab_eq (const void *, const void *);
163 static reg_attrs
*get_reg_attrs (tree
, int);
164 static rtx
gen_const_vector (enum machine_mode
, int);
165 static void copy_rtx_if_shared_1 (rtx
*orig
);
167 /* Probability of the conditional branch currently proceeded by try_split.
168 Set to -1 otherwise. */
169 int split_branch_probability
= -1;
171 /* Returns a hash code for X (which is a really a CONST_INT). */
174 const_int_htab_hash (const void *x
)
176 return (hashval_t
) INTVAL ((const_rtx
) x
);
179 /* Returns nonzero if the value represented by X (which is really a
180 CONST_INT) is the same as that given by Y (which is really a
184 const_int_htab_eq (const void *x
, const void *y
)
186 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
189 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
191 const_double_htab_hash (const void *x
)
193 const_rtx
const value
= (const_rtx
) x
;
196 if (GET_MODE (value
) == VOIDmode
)
197 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
200 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
201 /* MODE is used in the comparison, so it should be in the hash. */
202 h
^= GET_MODE (value
);
207 /* Returns nonzero if the value represented by X (really a ...)
208 is the same as that represented by Y (really a ...) */
210 const_double_htab_eq (const void *x
, const void *y
)
212 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
214 if (GET_MODE (a
) != GET_MODE (b
))
216 if (GET_MODE (a
) == VOIDmode
)
217 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
218 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
220 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
221 CONST_DOUBLE_REAL_VALUE (b
));
224 /* Returns a hash code for X (which is really a CONST_FIXED). */
227 const_fixed_htab_hash (const void *x
)
229 const_rtx
const value
= (const_rtx
) x
;
232 h
= fixed_hash (CONST_FIXED_VALUE (value
));
233 /* MODE is used in the comparison, so it should be in the hash. */
234 h
^= GET_MODE (value
);
238 /* Returns nonzero if the value represented by X (really a ...)
239 is the same as that represented by Y (really a ...). */
242 const_fixed_htab_eq (const void *x
, const void *y
)
244 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
246 if (GET_MODE (a
) != GET_MODE (b
))
248 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
251 /* Returns a hash code for X (which is a really a mem_attrs *). */
254 mem_attrs_htab_hash (const void *x
)
256 const mem_attrs
*const p
= (const mem_attrs
*) x
;
258 return (p
->alias
^ (p
->align
* 1000)
259 ^ (p
->addrspace
* 4000)
260 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
261 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
262 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
265 /* Return true if the given memory attributes are equal. */
268 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
270 return (p
->alias
== q
->alias
271 && p
->offset_known_p
== q
->offset_known_p
272 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
273 && p
->size_known_p
== q
->size_known_p
274 && (!p
->size_known_p
|| p
->size
== q
->size
)
275 && p
->align
== q
->align
276 && p
->addrspace
== q
->addrspace
277 && (p
->expr
== q
->expr
278 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
279 && operand_equal_p (p
->expr
, q
->expr
, 0))));
282 /* Returns nonzero if the value represented by X (which is really a
283 mem_attrs *) is the same as that given by Y (which is also really a
287 mem_attrs_htab_eq (const void *x
, const void *y
)
289 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
292 /* Set MEM's memory attributes so that they are the same as ATTRS. */
295 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
299 /* If everything is the default, we can just clear the attributes. */
300 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
306 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
309 *slot
= ggc_alloc_mem_attrs ();
310 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
313 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
316 /* Returns a hash code for X (which is a really a reg_attrs *). */
319 reg_attrs_htab_hash (const void *x
)
321 const reg_attrs
*const p
= (const reg_attrs
*) x
;
323 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
326 /* Returns nonzero if the value represented by X (which is really a
327 reg_attrs *) is the same as that given by Y (which is also really a
331 reg_attrs_htab_eq (const void *x
, const void *y
)
333 const reg_attrs
*const p
= (const reg_attrs
*) x
;
334 const reg_attrs
*const q
= (const reg_attrs
*) y
;
336 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
338 /* Allocate a new reg_attrs structure and insert it into the hash table if
339 one identical to it is not already in the table. We are doing this for
343 get_reg_attrs (tree decl
, int offset
)
348 /* If everything is the default, we can just return zero. */
349 if (decl
== 0 && offset
== 0)
353 attrs
.offset
= offset
;
355 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
358 *slot
= ggc_alloc_reg_attrs ();
359 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
362 return (reg_attrs
*) *slot
;
367 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
373 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
374 MEM_VOLATILE_P (x
) = true;
380 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
381 don't attempt to share with the various global pieces of rtl (such as
382 frame_pointer_rtx). */
385 gen_raw_REG (enum machine_mode mode
, int regno
)
387 rtx x
= gen_rtx_raw_REG (mode
, regno
);
388 ORIGINAL_REGNO (x
) = regno
;
392 /* There are some RTL codes that require special attention; the generation
393 functions do the raw handling. If you add to this list, modify
394 special_rtx in gengenrtl.c as well. */
397 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
401 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
402 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
404 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
405 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
406 return const_true_rtx
;
409 /* Look up the CONST_INT in the hash table. */
410 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
411 (hashval_t
) arg
, INSERT
);
413 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
419 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
421 return GEN_INT (trunc_int_for_mode (c
, mode
));
424 /* CONST_DOUBLEs might be created from pairs of integers, or from
425 REAL_VALUE_TYPEs. Also, their length is known only at run time,
426 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
428 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
429 hash table. If so, return its counterpart; otherwise add it
430 to the hash table and return it. */
432 lookup_const_double (rtx real
)
434 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
441 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
442 VALUE in mode MODE. */
444 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
446 rtx real
= rtx_alloc (CONST_DOUBLE
);
447 PUT_MODE (real
, mode
);
451 return lookup_const_double (real
);
454 /* Determine whether FIXED, a CONST_FIXED, already exists in the
455 hash table. If so, return its counterpart; otherwise add it
456 to the hash table and return it. */
459 lookup_const_fixed (rtx fixed
)
461 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
468 /* Return a CONST_FIXED rtx for a fixed-point value specified by
469 VALUE in mode MODE. */
472 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
474 rtx fixed
= rtx_alloc (CONST_FIXED
);
475 PUT_MODE (fixed
, mode
);
479 return lookup_const_fixed (fixed
);
482 /* Constructs double_int from rtx CST. */
485 rtx_to_double_int (const_rtx cst
)
489 if (CONST_INT_P (cst
))
490 r
= shwi_to_double_int (INTVAL (cst
));
491 else if (CONST_DOUBLE_P (cst
) && GET_MODE (cst
) == VOIDmode
)
493 r
.low
= CONST_DOUBLE_LOW (cst
);
494 r
.high
= CONST_DOUBLE_HIGH (cst
);
503 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
507 immed_double_int_const (double_int i
, enum machine_mode mode
)
509 return immed_double_const (i
.low
, i
.high
, mode
);
512 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
513 of ints: I0 is the low-order word and I1 is the high-order word.
514 Do not use this routine for non-integer modes; convert to
515 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
518 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
523 /* There are the following cases (note that there are no modes with
524 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
526 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
528 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
529 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
530 from copies of the sign bit, and sign of i0 and i1 are the same), then
531 we return a CONST_INT for i0.
532 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
533 if (mode
!= VOIDmode
)
535 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
536 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
537 /* We can get a 0 for an error mark. */
538 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
539 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
541 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
542 return gen_int_mode (i0
, mode
);
544 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
547 /* If this integer fits in one word, return a CONST_INT. */
548 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
551 /* We use VOIDmode for integers. */
552 value
= rtx_alloc (CONST_DOUBLE
);
553 PUT_MODE (value
, VOIDmode
);
555 CONST_DOUBLE_LOW (value
) = i0
;
556 CONST_DOUBLE_HIGH (value
) = i1
;
558 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
559 XWINT (value
, i
) = 0;
561 return lookup_const_double (value
);
565 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
567 /* In case the MD file explicitly references the frame pointer, have
568 all such references point to the same frame pointer. This is
569 used during frame pointer elimination to distinguish the explicit
570 references to these registers from pseudos that happened to be
573 If we have eliminated the frame pointer or arg pointer, we will
574 be using it as a normal register, for example as a spill
575 register. In such cases, we might be accessing it in a mode that
576 is not Pmode and therefore cannot use the pre-allocated rtx.
578 Also don't do this when we are making new REGs in reload, since
579 we don't want to get confused with the real pointers. */
581 if (mode
== Pmode
&& !reload_in_progress
)
583 if (regno
== FRAME_POINTER_REGNUM
584 && (!reload_completed
|| frame_pointer_needed
))
585 return frame_pointer_rtx
;
586 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
587 if (regno
== HARD_FRAME_POINTER_REGNUM
588 && (!reload_completed
|| frame_pointer_needed
))
589 return hard_frame_pointer_rtx
;
591 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
592 if (regno
== ARG_POINTER_REGNUM
)
593 return arg_pointer_rtx
;
595 #ifdef RETURN_ADDRESS_POINTER_REGNUM
596 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
597 return return_address_pointer_rtx
;
599 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
600 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
601 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
602 return pic_offset_table_rtx
;
603 if (regno
== STACK_POINTER_REGNUM
)
604 return stack_pointer_rtx
;
608 /* If the per-function register table has been set up, try to re-use
609 an existing entry in that table to avoid useless generation of RTL.
611 This code is disabled for now until we can fix the various backends
612 which depend on having non-shared hard registers in some cases. Long
613 term we want to re-enable this code as it can significantly cut down
614 on the amount of useless RTL that gets generated.
616 We'll also need to fix some code that runs after reload that wants to
617 set ORIGINAL_REGNO. */
622 && regno
< FIRST_PSEUDO_REGISTER
623 && reg_raw_mode
[regno
] == mode
)
624 return regno_reg_rtx
[regno
];
627 return gen_raw_REG (mode
, regno
);
631 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
633 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
635 /* This field is not cleared by the mere allocation of the rtx, so
642 /* Generate a memory referring to non-trapping constant memory. */
645 gen_const_mem (enum machine_mode mode
, rtx addr
)
647 rtx mem
= gen_rtx_MEM (mode
, addr
);
648 MEM_READONLY_P (mem
) = 1;
649 MEM_NOTRAP_P (mem
) = 1;
653 /* Generate a MEM referring to fixed portions of the frame, e.g., register
657 gen_frame_mem (enum machine_mode mode
, rtx addr
)
659 rtx mem
= gen_rtx_MEM (mode
, addr
);
660 MEM_NOTRAP_P (mem
) = 1;
661 set_mem_alias_set (mem
, get_frame_alias_set ());
665 /* Generate a MEM referring to a temporary use of the stack, not part
666 of the fixed stack frame. For example, something which is pushed
667 by a target splitter. */
669 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
671 rtx mem
= gen_rtx_MEM (mode
, addr
);
672 MEM_NOTRAP_P (mem
) = 1;
673 if (!cfun
->calls_alloca
)
674 set_mem_alias_set (mem
, get_frame_alias_set ());
678 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
679 this construct would be valid, and false otherwise. */
682 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
683 const_rtx reg
, unsigned int offset
)
685 unsigned int isize
= GET_MODE_SIZE (imode
);
686 unsigned int osize
= GET_MODE_SIZE (omode
);
688 /* All subregs must be aligned. */
689 if (offset
% osize
!= 0)
692 /* The subreg offset cannot be outside the inner object. */
696 /* ??? This should not be here. Temporarily continue to allow word_mode
697 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
698 Generally, backends are doing something sketchy but it'll take time to
700 if (omode
== word_mode
)
702 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
703 is the culprit here, and not the backends. */
704 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
706 /* Allow component subregs of complex and vector. Though given the below
707 extraction rules, it's not always clear what that means. */
708 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
709 && GET_MODE_INNER (imode
) == omode
)
711 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
712 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
713 represent this. It's questionable if this ought to be represented at
714 all -- why can't this all be hidden in post-reload splitters that make
715 arbitrarily mode changes to the registers themselves. */
716 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
718 /* Subregs involving floating point modes are not allowed to
719 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
720 (subreg:SI (reg:DF) 0) isn't. */
721 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
727 /* Paradoxical subregs must have offset zero. */
731 /* This is a normal subreg. Verify that the offset is representable. */
733 /* For hard registers, we already have most of these rules collected in
734 subreg_offset_representable_p. */
735 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
737 unsigned int regno
= REGNO (reg
);
739 #ifdef CANNOT_CHANGE_MODE_CLASS
740 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
741 && GET_MODE_INNER (imode
) == omode
)
743 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
747 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
750 /* For pseudo registers, we want most of the same checks. Namely:
751 If the register no larger than a word, the subreg must be lowpart.
752 If the register is larger than a word, the subreg must be the lowpart
753 of a subword. A subreg does *not* perform arbitrary bit extraction.
754 Given that we've already checked mode/offset alignment, we only have
755 to check subword subregs here. */
756 if (osize
< UNITS_PER_WORD
)
758 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
759 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
760 if (offset
% UNITS_PER_WORD
!= low_off
)
767 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
769 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
770 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
773 /* Generate a SUBREG representing the least-significant part of REG if MODE
774 is smaller than mode of REG, otherwise paradoxical SUBREG. */
777 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
779 enum machine_mode inmode
;
781 inmode
= GET_MODE (reg
);
782 if (inmode
== VOIDmode
)
784 return gen_rtx_SUBREG (mode
, reg
,
785 subreg_lowpart_offset (mode
, inmode
));
789 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
792 gen_rtvec (int n
, ...)
800 /* Don't allocate an empty rtvec... */
807 rt_val
= rtvec_alloc (n
);
809 for (i
= 0; i
< n
; i
++)
810 rt_val
->elem
[i
] = va_arg (p
, rtx
);
817 gen_rtvec_v (int n
, rtx
*argp
)
822 /* Don't allocate an empty rtvec... */
826 rt_val
= rtvec_alloc (n
);
828 for (i
= 0; i
< n
; i
++)
829 rt_val
->elem
[i
] = *argp
++;
834 /* Return the number of bytes between the start of an OUTER_MODE
835 in-memory value and the start of an INNER_MODE in-memory value,
836 given that the former is a lowpart of the latter. It may be a
837 paradoxical lowpart, in which case the offset will be negative
838 on big-endian targets. */
841 byte_lowpart_offset (enum machine_mode outer_mode
,
842 enum machine_mode inner_mode
)
844 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
845 return subreg_lowpart_offset (outer_mode
, inner_mode
);
847 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
850 /* Generate a REG rtx for a new pseudo register of mode MODE.
851 This pseudo is assigned the next sequential register number. */
854 gen_reg_rtx (enum machine_mode mode
)
857 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
859 gcc_assert (can_create_pseudo_p ());
861 /* If a virtual register with bigger mode alignment is generated,
862 increase stack alignment estimation because it might be spilled
864 if (SUPPORTS_STACK_ALIGNMENT
865 && crtl
->stack_alignment_estimated
< align
866 && !crtl
->stack_realign_processed
)
868 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
869 if (crtl
->stack_alignment_estimated
< min_align
)
870 crtl
->stack_alignment_estimated
= min_align
;
873 if (generating_concat_p
874 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
875 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
877 /* For complex modes, don't make a single pseudo.
878 Instead, make a CONCAT of two pseudos.
879 This allows noncontiguous allocation of the real and imaginary parts,
880 which makes much better code. Besides, allocating DCmode
881 pseudos overstrains reload on some machines like the 386. */
882 rtx realpart
, imagpart
;
883 enum machine_mode partmode
= GET_MODE_INNER (mode
);
885 realpart
= gen_reg_rtx (partmode
);
886 imagpart
= gen_reg_rtx (partmode
);
887 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
890 /* Make sure regno_pointer_align, and regno_reg_rtx are large
891 enough to have an element for this pseudo reg number. */
893 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
895 int old_size
= crtl
->emit
.regno_pointer_align_length
;
899 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
900 memset (tmp
+ old_size
, 0, old_size
);
901 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
903 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
904 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
905 regno_reg_rtx
= new1
;
907 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
910 val
= gen_raw_REG (mode
, reg_rtx_no
);
911 regno_reg_rtx
[reg_rtx_no
++] = val
;
915 /* Update NEW with the same attributes as REG, but with OFFSET added
916 to the REG_OFFSET. */
919 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
921 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
922 REG_OFFSET (reg
) + offset
);
925 /* Generate a register with same attributes as REG, but with OFFSET
926 added to the REG_OFFSET. */
929 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
932 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
934 update_reg_offset (new_rtx
, reg
, offset
);
938 /* Generate a new pseudo-register with the same attributes as REG, but
939 with OFFSET added to the REG_OFFSET. */
942 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
944 rtx new_rtx
= gen_reg_rtx (mode
);
946 update_reg_offset (new_rtx
, reg
, offset
);
950 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
951 new register is a (possibly paradoxical) lowpart of the old one. */
954 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
956 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
957 PUT_MODE (reg
, mode
);
960 /* Copy REG's attributes from X, if X has any attributes. If REG and X
961 have different modes, REG is a (possibly paradoxical) lowpart of X. */
964 set_reg_attrs_from_value (rtx reg
, rtx x
)
968 /* Hard registers can be reused for multiple purposes within the same
969 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
971 if (HARD_REGISTER_P (reg
))
974 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
977 if (MEM_OFFSET_KNOWN_P (x
))
978 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
979 MEM_OFFSET (x
) + offset
);
981 mark_reg_pointer (reg
, 0);
986 update_reg_offset (reg
, x
, offset
);
988 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
992 /* Generate a REG rtx for a new pseudo register, copying the mode
993 and attributes from X. */
996 gen_reg_rtx_and_attrs (rtx x
)
998 rtx reg
= gen_reg_rtx (GET_MODE (x
));
999 set_reg_attrs_from_value (reg
, x
);
1003 /* Set the register attributes for registers contained in PARM_RTX.
1004 Use needed values from memory attributes of MEM. */
1007 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1009 if (REG_P (parm_rtx
))
1010 set_reg_attrs_from_value (parm_rtx
, mem
);
1011 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1013 /* Check for a NULL entry in the first slot, used to indicate that the
1014 parameter goes both on the stack and in registers. */
1015 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1016 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1018 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1019 if (REG_P (XEXP (x
, 0)))
1020 REG_ATTRS (XEXP (x
, 0))
1021 = get_reg_attrs (MEM_EXPR (mem
),
1022 INTVAL (XEXP (x
, 1)));
1027 /* Set the REG_ATTRS for registers in value X, given that X represents
1031 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1033 if (GET_CODE (x
) == SUBREG
)
1035 gcc_assert (subreg_lowpart_p (x
));
1040 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1042 if (GET_CODE (x
) == CONCAT
)
1044 if (REG_P (XEXP (x
, 0)))
1045 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1046 if (REG_P (XEXP (x
, 1)))
1047 REG_ATTRS (XEXP (x
, 1))
1048 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1050 if (GET_CODE (x
) == PARALLEL
)
1054 /* Check for a NULL entry, used to indicate that the parameter goes
1055 both on the stack and in registers. */
1056 if (XEXP (XVECEXP (x
, 0, 0), 0))
1061 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1063 rtx y
= XVECEXP (x
, 0, i
);
1064 if (REG_P (XEXP (y
, 0)))
1065 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1070 /* Assign the RTX X to declaration T. */
1073 set_decl_rtl (tree t
, rtx x
)
1075 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1077 set_reg_attrs_for_decl_rtl (t
, x
);
1080 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1081 if the ABI requires the parameter to be passed by reference. */
1084 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1086 DECL_INCOMING_RTL (t
) = x
;
1087 if (x
&& !by_reference_p
)
1088 set_reg_attrs_for_decl_rtl (t
, x
);
1091 /* Identify REG (which may be a CONCAT) as a user register. */
1094 mark_user_reg (rtx reg
)
1096 if (GET_CODE (reg
) == CONCAT
)
1098 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1099 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1103 gcc_assert (REG_P (reg
));
1104 REG_USERVAR_P (reg
) = 1;
1108 /* Identify REG as a probable pointer register and show its alignment
1109 as ALIGN, if nonzero. */
1112 mark_reg_pointer (rtx reg
, int align
)
1114 if (! REG_POINTER (reg
))
1116 REG_POINTER (reg
) = 1;
1119 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1121 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1122 /* We can no-longer be sure just how aligned this pointer is. */
1123 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1126 /* Return 1 plus largest pseudo reg number used in the current function. */
1134 /* Return 1 + the largest label number used so far in the current function. */
1137 max_label_num (void)
1142 /* Return first label number used in this function (if any were used). */
1145 get_first_label_num (void)
1147 return first_label_num
;
1150 /* If the rtx for label was created during the expansion of a nested
1151 function, then first_label_num won't include this label number.
1152 Fix this now so that array indices work later. */
1155 maybe_set_first_label_num (rtx x
)
1157 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1158 first_label_num
= CODE_LABEL_NUMBER (x
);
1161 /* Return a value representing some low-order bits of X, where the number
1162 of low-order bits is given by MODE. Note that no conversion is done
1163 between floating-point and fixed-point values, rather, the bit
1164 representation is returned.
1166 This function handles the cases in common between gen_lowpart, below,
1167 and two variants in cse.c and combine.c. These are the cases that can
1168 be safely handled at all points in the compilation.
1170 If this is not a case we can handle, return 0. */
1173 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1175 int msize
= GET_MODE_SIZE (mode
);
1178 enum machine_mode innermode
;
1180 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1181 so we have to make one up. Yuk. */
1182 innermode
= GET_MODE (x
);
1184 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1185 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1186 else if (innermode
== VOIDmode
)
1187 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1189 xsize
= GET_MODE_SIZE (innermode
);
1191 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1193 if (innermode
== mode
)
1196 /* MODE must occupy no more words than the mode of X. */
1197 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1198 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1201 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1202 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1205 offset
= subreg_lowpart_offset (mode
, innermode
);
1207 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1208 && (GET_MODE_CLASS (mode
) == MODE_INT
1209 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1211 /* If we are getting the low-order part of something that has been
1212 sign- or zero-extended, we can either just use the object being
1213 extended or make a narrower extension. If we want an even smaller
1214 piece than the size of the object being extended, call ourselves
1217 This case is used mostly by combine and cse. */
1219 if (GET_MODE (XEXP (x
, 0)) == mode
)
1221 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1222 return gen_lowpart_common (mode
, XEXP (x
, 0));
1223 else if (msize
< xsize
)
1224 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1226 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1227 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1228 || GET_CODE (x
) == CONST_DOUBLE
|| CONST_INT_P (x
))
1229 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1231 /* Otherwise, we can't do this. */
1236 gen_highpart (enum machine_mode mode
, rtx x
)
1238 unsigned int msize
= GET_MODE_SIZE (mode
);
1241 /* This case loses if X is a subreg. To catch bugs early,
1242 complain if an invalid MODE is used even in other cases. */
1243 gcc_assert (msize
<= UNITS_PER_WORD
1244 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1246 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1247 subreg_highpart_offset (mode
, GET_MODE (x
)));
1248 gcc_assert (result
);
1250 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1251 the target if we have a MEM. gen_highpart must return a valid operand,
1252 emitting code if necessary to do so. */
1255 result
= validize_mem (result
);
1256 gcc_assert (result
);
1262 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1263 be VOIDmode constant. */
1265 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1267 if (GET_MODE (exp
) != VOIDmode
)
1269 gcc_assert (GET_MODE (exp
) == innermode
);
1270 return gen_highpart (outermode
, exp
);
1272 return simplify_gen_subreg (outermode
, exp
, innermode
,
1273 subreg_highpart_offset (outermode
, innermode
));
1276 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1279 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1281 unsigned int offset
= 0;
1282 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1286 if (WORDS_BIG_ENDIAN
)
1287 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1288 if (BYTES_BIG_ENDIAN
)
1289 offset
+= difference
% UNITS_PER_WORD
;
1295 /* Return offset in bytes to get OUTERMODE high part
1296 of the value in mode INNERMODE stored in memory in target format. */
1298 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1300 unsigned int offset
= 0;
1301 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1303 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1307 if (! WORDS_BIG_ENDIAN
)
1308 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1309 if (! BYTES_BIG_ENDIAN
)
1310 offset
+= difference
% UNITS_PER_WORD
;
1316 /* Return 1 iff X, assumed to be a SUBREG,
1317 refers to the least significant part of its containing reg.
1318 If X is not a SUBREG, always return 1 (it is its own low part!). */
1321 subreg_lowpart_p (const_rtx x
)
1323 if (GET_CODE (x
) != SUBREG
)
1325 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1328 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1329 == SUBREG_BYTE (x
));
1332 /* Return true if X is a paradoxical subreg, false otherwise. */
1334 paradoxical_subreg_p (const_rtx x
)
1336 if (GET_CODE (x
) != SUBREG
)
1338 return (GET_MODE_PRECISION (GET_MODE (x
))
1339 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1342 /* Return subword OFFSET of operand OP.
1343 The word number, OFFSET, is interpreted as the word number starting
1344 at the low-order address. OFFSET 0 is the low-order word if not
1345 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1347 If we cannot extract the required word, we return zero. Otherwise,
1348 an rtx corresponding to the requested word will be returned.
1350 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1351 reload has completed, a valid address will always be returned. After
1352 reload, if a valid address cannot be returned, we return zero.
1354 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1355 it is the responsibility of the caller.
1357 MODE is the mode of OP in case it is a CONST_INT.
1359 ??? This is still rather broken for some cases. The problem for the
1360 moment is that all callers of this thing provide no 'goal mode' to
1361 tell us to work with. This exists because all callers were written
1362 in a word based SUBREG world.
1363 Now use of this function can be deprecated by simplify_subreg in most
1368 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1370 if (mode
== VOIDmode
)
1371 mode
= GET_MODE (op
);
1373 gcc_assert (mode
!= VOIDmode
);
1375 /* If OP is narrower than a word, fail. */
1377 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1380 /* If we want a word outside OP, return zero. */
1382 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1385 /* Form a new MEM at the requested address. */
1388 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1390 if (! validate_address
)
1393 else if (reload_completed
)
1395 if (! strict_memory_address_addr_space_p (word_mode
,
1397 MEM_ADDR_SPACE (op
)))
1401 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1404 /* Rest can be handled by simplify_subreg. */
1405 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1408 /* Similar to `operand_subword', but never return 0. If we can't
1409 extract the required subword, put OP into a register and try again.
1410 The second attempt must succeed. We always validate the address in
1413 MODE is the mode of OP, in case it is CONST_INT. */
1416 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1418 rtx result
= operand_subword (op
, offset
, 1, mode
);
1423 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1425 /* If this is a register which can not be accessed by words, copy it
1426 to a pseudo register. */
1428 op
= copy_to_reg (op
);
1430 op
= force_reg (mode
, op
);
1433 result
= operand_subword (op
, offset
, 1, mode
);
1434 gcc_assert (result
);
1439 /* Returns 1 if both MEM_EXPR can be considered equal
1443 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1448 if (! expr1
|| ! expr2
)
1451 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1454 return operand_equal_p (expr1
, expr2
, 0);
1457 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1458 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1462 get_mem_align_offset (rtx mem
, unsigned int align
)
1465 unsigned HOST_WIDE_INT offset
;
1467 /* This function can't use
1468 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1469 || (MAX (MEM_ALIGN (mem),
1470 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1474 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1476 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1477 for <variable>. get_inner_reference doesn't handle it and
1478 even if it did, the alignment in that case needs to be determined
1479 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1480 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1481 isn't sufficiently aligned, the object it is in might be. */
1482 gcc_assert (MEM_P (mem
));
1483 expr
= MEM_EXPR (mem
);
1484 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1487 offset
= MEM_OFFSET (mem
);
1490 if (DECL_ALIGN (expr
) < align
)
1493 else if (INDIRECT_REF_P (expr
))
1495 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1498 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1502 tree inner
= TREE_OPERAND (expr
, 0);
1503 tree field
= TREE_OPERAND (expr
, 1);
1504 tree byte_offset
= component_ref_field_offset (expr
);
1505 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1508 || !host_integerp (byte_offset
, 1)
1509 || !host_integerp (bit_offset
, 1))
1512 offset
+= tree_low_cst (byte_offset
, 1);
1513 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1515 if (inner
== NULL_TREE
)
1517 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1518 < (unsigned int) align
)
1522 else if (DECL_P (inner
))
1524 if (DECL_ALIGN (inner
) < align
)
1528 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1536 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1539 /* Given REF (a MEM) and T, either the type of X or the expression
1540 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1541 if we are making a new object of this type. BITPOS is nonzero if
1542 there is an offset outstanding on T that will be applied later. */
1545 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1546 HOST_WIDE_INT bitpos
)
1548 HOST_WIDE_INT apply_bitpos
= 0;
1550 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1552 /* It can happen that type_for_mode was given a mode for which there
1553 is no language-level type. In which case it returns NULL, which
1558 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1559 if (type
== error_mark_node
)
1562 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1563 wrong answer, as it assumes that DECL_RTL already has the right alias
1564 info. Callers should not set DECL_RTL until after the call to
1565 set_mem_attributes. */
1566 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1568 memset (&attrs
, 0, sizeof (attrs
));
1570 /* Get the alias set from the expression or type (perhaps using a
1571 front-end routine) and use it. */
1572 attrs
.alias
= get_alias_set (t
);
1574 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1575 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1577 /* Default values from pre-existing memory attributes if present. */
1578 refattrs
= MEM_ATTRS (ref
);
1581 /* ??? Can this ever happen? Calling this routine on a MEM that
1582 already carries memory attributes should probably be invalid. */
1583 attrs
.expr
= refattrs
->expr
;
1584 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1585 attrs
.offset
= refattrs
->offset
;
1586 attrs
.size_known_p
= refattrs
->size_known_p
;
1587 attrs
.size
= refattrs
->size
;
1588 attrs
.align
= refattrs
->align
;
1591 /* Otherwise, default values from the mode of the MEM reference. */
1594 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1595 gcc_assert (!defattrs
->expr
);
1596 gcc_assert (!defattrs
->offset_known_p
);
1598 /* Respect mode size. */
1599 attrs
.size_known_p
= defattrs
->size_known_p
;
1600 attrs
.size
= defattrs
->size
;
1601 /* ??? Is this really necessary? We probably should always get
1602 the size from the type below. */
1604 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1605 if T is an object, always compute the object alignment below. */
1607 attrs
.align
= defattrs
->align
;
1609 attrs
.align
= BITS_PER_UNIT
;
1610 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1611 e.g. if the type carries an alignment attribute. Should we be
1612 able to simply always use TYPE_ALIGN? */
1615 /* We can set the alignment from the type if we are making an object,
1616 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1617 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1618 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1620 else if (TREE_CODE (t
) == MEM_REF
)
1622 tree op0
= TREE_OPERAND (t
, 0);
1623 if (TREE_CODE (op0
) == ADDR_EXPR
1624 && (DECL_P (TREE_OPERAND (op0
, 0))
1625 || CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0))))
1627 if (DECL_P (TREE_OPERAND (op0
, 0)))
1628 attrs
.align
= DECL_ALIGN (TREE_OPERAND (op0
, 0));
1629 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0)))
1631 attrs
.align
= TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0
, 0)));
1632 #ifdef CONSTANT_ALIGNMENT
1633 attrs
.align
= CONSTANT_ALIGNMENT (TREE_OPERAND (op0
, 0),
1637 if (TREE_INT_CST_LOW (TREE_OPERAND (t
, 1)) != 0)
1639 unsigned HOST_WIDE_INT ioff
1640 = TREE_INT_CST_LOW (TREE_OPERAND (t
, 1));
1641 unsigned HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1642 attrs
.align
= MIN (aoff
, attrs
.align
);
1646 /* ??? This isn't fully correct, we can't set the alignment from the
1647 type in all cases. */
1648 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1651 else if (TREE_CODE (t
) == TARGET_MEM_REF
)
1652 /* ??? This isn't fully correct, we can't set the alignment from the
1653 type in all cases. */
1654 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1656 /* If the size is known, we can set that. */
1657 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1659 attrs
.size_known_p
= true;
1660 attrs
.size
= tree_low_cst (TYPE_SIZE_UNIT (type
), 1);
1663 /* If T is not a type, we may be able to deduce some more information about
1668 bool align_computed
= false;
1670 if (TREE_THIS_VOLATILE (t
))
1671 MEM_VOLATILE_P (ref
) = 1;
1673 /* Now remove any conversions: they don't change what the underlying
1674 object is. Likewise for SAVE_EXPR. */
1675 while (CONVERT_EXPR_P (t
)
1676 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1677 || TREE_CODE (t
) == SAVE_EXPR
)
1678 t
= TREE_OPERAND (t
, 0);
1680 /* Note whether this expression can trap. */
1681 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1683 base
= get_base_address (t
);
1684 if (base
&& DECL_P (base
)
1685 && TREE_READONLY (base
)
1686 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1687 && !TREE_THIS_VOLATILE (base
))
1688 MEM_READONLY_P (ref
) = 1;
1690 /* Mark static const strings readonly as well. */
1691 if (base
&& TREE_CODE (base
) == STRING_CST
1692 && TREE_READONLY (base
)
1693 && TREE_STATIC (base
))
1694 MEM_READONLY_P (ref
) = 1;
1696 /* If this expression uses it's parent's alias set, mark it such
1697 that we won't change it. */
1698 if (component_uses_parent_alias_set (t
))
1699 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1701 /* If this is a decl, set the attributes of the MEM from it. */
1705 attrs
.offset_known_p
= true;
1707 apply_bitpos
= bitpos
;
1708 if (DECL_SIZE_UNIT (t
) && host_integerp (DECL_SIZE_UNIT (t
), 1))
1710 attrs
.size_known_p
= true;
1711 attrs
.size
= tree_low_cst (DECL_SIZE_UNIT (t
), 1);
1714 attrs
.size_known_p
= false;
1715 attrs
.align
= DECL_ALIGN (t
);
1716 align_computed
= true;
1719 /* If this is a constant, we know the alignment. */
1720 else if (CONSTANT_CLASS_P (t
))
1722 attrs
.align
= TYPE_ALIGN (type
);
1723 #ifdef CONSTANT_ALIGNMENT
1724 attrs
.align
= CONSTANT_ALIGNMENT (t
, attrs
.align
);
1726 align_computed
= true;
1729 /* If this is a field reference and not a bit-field, record it. */
1730 /* ??? There is some information that can be gleaned from bit-fields,
1731 such as the word offset in the structure that might be modified.
1732 But skip it for now. */
1733 else if (TREE_CODE (t
) == COMPONENT_REF
1734 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1737 attrs
.offset_known_p
= true;
1739 apply_bitpos
= bitpos
;
1740 /* ??? Any reason the field size would be different than
1741 the size we got from the type? */
1744 /* If this is an array reference, look for an outer field reference. */
1745 else if (TREE_CODE (t
) == ARRAY_REF
)
1747 tree off_tree
= size_zero_node
;
1748 /* We can't modify t, because we use it at the end of the
1754 tree index
= TREE_OPERAND (t2
, 1);
1755 tree low_bound
= array_ref_low_bound (t2
);
1756 tree unit_size
= array_ref_element_size (t2
);
1758 /* We assume all arrays have sizes that are a multiple of a byte.
1759 First subtract the lower bound, if any, in the type of the
1760 index, then convert to sizetype and multiply by the size of
1761 the array element. */
1762 if (! integer_zerop (low_bound
))
1763 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1766 off_tree
= size_binop (PLUS_EXPR
,
1767 size_binop (MULT_EXPR
,
1768 fold_convert (sizetype
,
1772 t2
= TREE_OPERAND (t2
, 0);
1774 while (TREE_CODE (t2
) == ARRAY_REF
);
1779 attrs
.offset_known_p
= false;
1780 if (host_integerp (off_tree
, 1))
1782 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1783 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1784 attrs
.align
= DECL_ALIGN (t2
);
1785 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< attrs
.align
)
1787 align_computed
= true;
1788 attrs
.offset_known_p
= true;
1789 attrs
.offset
= ioff
;
1790 apply_bitpos
= bitpos
;
1793 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1796 attrs
.offset_known_p
= false;
1797 if (host_integerp (off_tree
, 1))
1799 attrs
.offset_known_p
= true;
1800 attrs
.offset
= tree_low_cst (off_tree
, 1);
1801 apply_bitpos
= bitpos
;
1803 /* ??? Any reason the field size would be different than
1804 the size we got from the type? */
1807 /* If this is an indirect reference, record it. */
1808 else if (TREE_CODE (t
) == MEM_REF
)
1811 attrs
.offset_known_p
= true;
1813 apply_bitpos
= bitpos
;
1817 /* If this is an indirect reference, record it. */
1818 else if (TREE_CODE (t
) == MEM_REF
1819 || TREE_CODE (t
) == TARGET_MEM_REF
)
1822 attrs
.offset_known_p
= true;
1824 apply_bitpos
= bitpos
;
1827 if (!align_computed
)
1829 unsigned int obj_align
= get_object_alignment (t
);
1830 attrs
.align
= MAX (attrs
.align
, obj_align
);
1834 /* If we modified OFFSET based on T, then subtract the outstanding
1835 bit position offset. Similarly, increase the size of the accessed
1836 object to contain the negative offset. */
1839 gcc_assert (attrs
.offset_known_p
);
1840 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1841 if (attrs
.size_known_p
)
1842 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1845 /* Now set the attributes we computed above. */
1846 attrs
.addrspace
= TYPE_ADDR_SPACE (type
);
1847 set_mem_attrs (ref
, &attrs
);
1851 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1853 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1856 /* Set the alias set of MEM to SET. */
1859 set_mem_alias_set (rtx mem
, alias_set_type set
)
1861 struct mem_attrs attrs
;
1863 /* If the new and old alias sets don't conflict, something is wrong. */
1864 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1865 attrs
= *get_mem_attrs (mem
);
1867 set_mem_attrs (mem
, &attrs
);
1870 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1873 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1875 struct mem_attrs attrs
;
1877 attrs
= *get_mem_attrs (mem
);
1878 attrs
.addrspace
= addrspace
;
1879 set_mem_attrs (mem
, &attrs
);
1882 /* Set the alignment of MEM to ALIGN bits. */
1885 set_mem_align (rtx mem
, unsigned int align
)
1887 struct mem_attrs attrs
;
1889 attrs
= *get_mem_attrs (mem
);
1890 attrs
.align
= align
;
1891 set_mem_attrs (mem
, &attrs
);
1894 /* Set the expr for MEM to EXPR. */
1897 set_mem_expr (rtx mem
, tree expr
)
1899 struct mem_attrs attrs
;
1901 attrs
= *get_mem_attrs (mem
);
1903 set_mem_attrs (mem
, &attrs
);
1906 /* Set the offset of MEM to OFFSET. */
1909 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1911 struct mem_attrs attrs
;
1913 attrs
= *get_mem_attrs (mem
);
1914 attrs
.offset_known_p
= true;
1915 attrs
.offset
= offset
;
1916 set_mem_attrs (mem
, &attrs
);
1919 /* Clear the offset of MEM. */
1922 clear_mem_offset (rtx mem
)
1924 struct mem_attrs attrs
;
1926 attrs
= *get_mem_attrs (mem
);
1927 attrs
.offset_known_p
= false;
1928 set_mem_attrs (mem
, &attrs
);
1931 /* Set the size of MEM to SIZE. */
1934 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1936 struct mem_attrs attrs
;
1938 attrs
= *get_mem_attrs (mem
);
1939 attrs
.size_known_p
= true;
1941 set_mem_attrs (mem
, &attrs
);
1944 /* Clear the size of MEM. */
1947 clear_mem_size (rtx mem
)
1949 struct mem_attrs attrs
;
1951 attrs
= *get_mem_attrs (mem
);
1952 attrs
.size_known_p
= false;
1953 set_mem_attrs (mem
, &attrs
);
1956 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1957 and its address changed to ADDR. (VOIDmode means don't change the mode.
1958 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1959 returned memory location is required to be valid. The memory
1960 attributes are not changed. */
1963 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1968 gcc_assert (MEM_P (memref
));
1969 as
= MEM_ADDR_SPACE (memref
);
1970 if (mode
== VOIDmode
)
1971 mode
= GET_MODE (memref
);
1973 addr
= XEXP (memref
, 0);
1974 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1975 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
1980 if (reload_in_progress
|| reload_completed
)
1981 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
1983 addr
= memory_address_addr_space (mode
, addr
, as
);
1986 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1989 new_rtx
= gen_rtx_MEM (mode
, addr
);
1990 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1994 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1995 way we are changing MEMREF, so we only preserve the alias set. */
1998 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2000 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
2001 enum machine_mode mmode
= GET_MODE (new_rtx
);
2002 struct mem_attrs attrs
, *defattrs
;
2004 attrs
= *get_mem_attrs (memref
);
2005 defattrs
= mode_mem_attrs
[(int) mmode
];
2006 attrs
.expr
= NULL_TREE
;
2007 attrs
.offset_known_p
= false;
2008 attrs
.size_known_p
= defattrs
->size_known_p
;
2009 attrs
.size
= defattrs
->size
;
2010 attrs
.align
= defattrs
->align
;
2012 /* If there are no changes, just return the original memory reference. */
2013 if (new_rtx
== memref
)
2015 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2018 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2019 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2022 set_mem_attrs (new_rtx
, &attrs
);
2026 /* Return a memory reference like MEMREF, but with its mode changed
2027 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2028 nonzero, the memory address is forced to be valid.
2029 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2030 and caller is responsible for adjusting MEMREF base register. */
2033 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2034 int validate
, int adjust
)
2036 rtx addr
= XEXP (memref
, 0);
2038 enum machine_mode address_mode
;
2040 struct mem_attrs attrs
, *defattrs
;
2041 unsigned HOST_WIDE_INT max_align
;
2043 attrs
= *get_mem_attrs (memref
);
2045 /* If there are no changes, just return the original memory reference. */
2046 if (mode
== GET_MODE (memref
) && !offset
2047 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2051 /* ??? Prefer to create garbage instead of creating shared rtl.
2052 This may happen even if offset is nonzero -- consider
2053 (plus (plus reg reg) const_int) -- so do this always. */
2054 addr
= copy_rtx (addr
);
2056 /* Convert a possibly large offset to a signed value within the
2057 range of the target address space. */
2058 address_mode
= targetm
.addr_space
.address_mode (attrs
.addrspace
);
2059 pbits
= GET_MODE_BITSIZE (address_mode
);
2060 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2062 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2063 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2069 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2070 object, we can merge it into the LO_SUM. */
2071 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2073 && (unsigned HOST_WIDE_INT
) offset
2074 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2075 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2076 plus_constant (XEXP (addr
, 1), offset
));
2078 addr
= plus_constant (addr
, offset
);
2081 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2083 /* If the address is a REG, change_address_1 rightfully returns memref,
2084 but this would destroy memref's MEM_ATTRS. */
2085 if (new_rtx
== memref
&& offset
!= 0)
2086 new_rtx
= copy_rtx (new_rtx
);
2088 /* Compute the new values of the memory attributes due to this adjustment.
2089 We add the offsets and update the alignment. */
2090 if (attrs
.offset_known_p
)
2091 attrs
.offset
+= offset
;
2093 /* Compute the new alignment by taking the MIN of the alignment and the
2094 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2098 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2099 attrs
.align
= MIN (attrs
.align
, max_align
);
2102 /* We can compute the size in a number of ways. */
2103 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2104 if (defattrs
->size_known_p
)
2106 attrs
.size_known_p
= true;
2107 attrs
.size
= defattrs
->size
;
2109 else if (attrs
.size_known_p
)
2110 attrs
.size
-= offset
;
2112 set_mem_attrs (new_rtx
, &attrs
);
2114 /* At some point, we should validate that this offset is within the object,
2115 if all the appropriate values are known. */
2119 /* Return a memory reference like MEMREF, but with its mode changed
2120 to MODE and its address changed to ADDR, which is assumed to be
2121 MEMREF offset by OFFSET bytes. If VALIDATE is
2122 nonzero, the memory address is forced to be valid. */
2125 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2126 HOST_WIDE_INT offset
, int validate
)
2128 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2129 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2132 /* Return a memory reference like MEMREF, but whose address is changed by
2133 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2134 known to be in OFFSET (possibly 1). */
2137 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2139 rtx new_rtx
, addr
= XEXP (memref
, 0);
2140 enum machine_mode address_mode
;
2141 struct mem_attrs attrs
, *defattrs
;
2143 attrs
= *get_mem_attrs (memref
);
2144 address_mode
= targetm
.addr_space
.address_mode (attrs
.addrspace
);
2145 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2147 /* At this point we don't know _why_ the address is invalid. It
2148 could have secondary memory references, multiplies or anything.
2150 However, if we did go and rearrange things, we can wind up not
2151 being able to recognize the magic around pic_offset_table_rtx.
2152 This stuff is fragile, and is yet another example of why it is
2153 bad to expose PIC machinery too early. */
2154 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2156 && GET_CODE (addr
) == PLUS
2157 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2159 addr
= force_reg (GET_MODE (addr
), addr
);
2160 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2163 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2164 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2166 /* If there are no changes, just return the original memory reference. */
2167 if (new_rtx
== memref
)
2170 /* Update the alignment to reflect the offset. Reset the offset, which
2172 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2173 attrs
.offset_known_p
= false;
2174 attrs
.size_known_p
= defattrs
->size_known_p
;
2175 attrs
.size
= defattrs
->size
;
2176 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2177 set_mem_attrs (new_rtx
, &attrs
);
2181 /* Return a memory reference like MEMREF, but with its address changed to
2182 ADDR. The caller is asserting that the actual piece of memory pointed
2183 to is the same, just the form of the address is being changed, such as
2184 by putting something into a register. */
2187 replace_equiv_address (rtx memref
, rtx addr
)
2189 /* change_address_1 copies the memory attribute structure without change
2190 and that's exactly what we want here. */
2191 update_temp_slot_address (XEXP (memref
, 0), addr
);
2192 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2195 /* Likewise, but the reference is not required to be valid. */
2198 replace_equiv_address_nv (rtx memref
, rtx addr
)
2200 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2203 /* Return a memory reference like MEMREF, but with its mode widened to
2204 MODE and offset by OFFSET. This would be used by targets that e.g.
2205 cannot issue QImode memory operations and have to use SImode memory
2206 operations plus masking logic. */
2209 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2211 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1);
2212 struct mem_attrs attrs
;
2213 unsigned int size
= GET_MODE_SIZE (mode
);
2215 /* If there are no changes, just return the original memory reference. */
2216 if (new_rtx
== memref
)
2219 attrs
= *get_mem_attrs (new_rtx
);
2221 /* If we don't know what offset we were at within the expression, then
2222 we can't know if we've overstepped the bounds. */
2223 if (! attrs
.offset_known_p
)
2224 attrs
.expr
= NULL_TREE
;
2228 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2230 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2231 tree offset
= component_ref_field_offset (attrs
.expr
);
2233 if (! DECL_SIZE_UNIT (field
))
2235 attrs
.expr
= NULL_TREE
;
2239 /* Is the field at least as large as the access? If so, ok,
2240 otherwise strip back to the containing structure. */
2241 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2242 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2243 && attrs
.offset
>= 0)
2246 if (! host_integerp (offset
, 1))
2248 attrs
.expr
= NULL_TREE
;
2252 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2253 attrs
.offset
+= tree_low_cst (offset
, 1);
2254 attrs
.offset
+= (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2257 /* Similarly for the decl. */
2258 else if (DECL_P (attrs
.expr
)
2259 && DECL_SIZE_UNIT (attrs
.expr
)
2260 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2261 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2262 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2266 /* The widened memory access overflows the expression, which means
2267 that it could alias another expression. Zap it. */
2268 attrs
.expr
= NULL_TREE
;
2274 attrs
.offset_known_p
= false;
2276 /* The widened memory may alias other stuff, so zap the alias set. */
2277 /* ??? Maybe use get_alias_set on any remaining expression. */
2279 attrs
.size_known_p
= true;
2281 set_mem_attrs (new_rtx
, &attrs
);
2285 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2286 static GTY(()) tree spill_slot_decl
;
2289 get_spill_slot_decl (bool force_build_p
)
2291 tree d
= spill_slot_decl
;
2293 struct mem_attrs attrs
;
2295 if (d
|| !force_build_p
)
2298 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2299 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2300 DECL_ARTIFICIAL (d
) = 1;
2301 DECL_IGNORED_P (d
) = 1;
2303 spill_slot_decl
= d
;
2305 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2306 MEM_NOTRAP_P (rd
) = 1;
2307 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2308 attrs
.alias
= new_alias_set ();
2310 set_mem_attrs (rd
, &attrs
);
2311 SET_DECL_RTL (d
, rd
);
2316 /* Given MEM, a result from assign_stack_local, fill in the memory
2317 attributes as appropriate for a register allocator spill slot.
2318 These slots are not aliasable by other memory. We arrange for
2319 them all to use a single MEM_EXPR, so that the aliasing code can
2320 work properly in the case of shared spill slots. */
2323 set_mem_attrs_for_spill (rtx mem
)
2325 struct mem_attrs attrs
;
2328 attrs
= *get_mem_attrs (mem
);
2329 attrs
.expr
= get_spill_slot_decl (true);
2330 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2331 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2333 /* We expect the incoming memory to be of the form:
2334 (mem:MODE (plus (reg sfp) (const_int offset)))
2335 with perhaps the plus missing for offset = 0. */
2336 addr
= XEXP (mem
, 0);
2337 attrs
.offset_known_p
= true;
2339 if (GET_CODE (addr
) == PLUS
2340 && CONST_INT_P (XEXP (addr
, 1)))
2341 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2343 set_mem_attrs (mem
, &attrs
);
2344 MEM_NOTRAP_P (mem
) = 1;
2347 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2350 gen_label_rtx (void)
2352 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2353 NULL
, label_num
++, NULL
);
2356 /* For procedure integration. */
2358 /* Install new pointers to the first and last insns in the chain.
2359 Also, set cur_insn_uid to one higher than the last in use.
2360 Used for an inline-procedure after copying the insn chain. */
2363 set_new_first_and_last_insn (rtx first
, rtx last
)
2367 set_first_insn (first
);
2368 set_last_insn (last
);
2371 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2373 int debug_count
= 0;
2375 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2376 cur_debug_insn_uid
= 0;
2378 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2379 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2380 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2383 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2384 if (DEBUG_INSN_P (insn
))
2389 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2391 cur_debug_insn_uid
++;
2394 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2395 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2400 /* Go through all the RTL insn bodies and copy any invalid shared
2401 structure. This routine should only be called once. */
2404 unshare_all_rtl_1 (rtx insn
)
2406 /* Unshare just about everything else. */
2407 unshare_all_rtl_in_chain (insn
);
2409 /* Make sure the addresses of stack slots found outside the insn chain
2410 (such as, in DECL_RTL of a variable) are not shared
2411 with the insn chain.
2413 This special care is necessary when the stack slot MEM does not
2414 actually appear in the insn chain. If it does appear, its address
2415 is unshared from all else at that point. */
2416 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2419 /* Go through all the RTL insn bodies and copy any invalid shared
2420 structure, again. This is a fairly expensive thing to do so it
2421 should be done sparingly. */
2424 unshare_all_rtl_again (rtx insn
)
2429 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2432 reset_used_flags (PATTERN (p
));
2433 reset_used_flags (REG_NOTES (p
));
2435 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2438 /* Make sure that virtual stack slots are not shared. */
2439 set_used_decls (DECL_INITIAL (cfun
->decl
));
2441 /* Make sure that virtual parameters are not shared. */
2442 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2443 set_used_flags (DECL_RTL (decl
));
2445 reset_used_flags (stack_slot_list
);
2447 unshare_all_rtl_1 (insn
);
2451 unshare_all_rtl (void)
2453 unshare_all_rtl_1 (get_insns ());
2457 struct rtl_opt_pass pass_unshare_all_rtl
=
2461 "unshare", /* name */
2463 unshare_all_rtl
, /* execute */
2466 0, /* static_pass_number */
2467 TV_NONE
, /* tv_id */
2468 0, /* properties_required */
2469 0, /* properties_provided */
2470 0, /* properties_destroyed */
2471 0, /* todo_flags_start */
2472 TODO_verify_rtl_sharing
/* todo_flags_finish */
2477 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2478 Recursively does the same for subexpressions. */
2481 verify_rtx_sharing (rtx orig
, rtx insn
)
2486 const char *format_ptr
;
2491 code
= GET_CODE (x
);
2493 /* These types may be freely shared. */
2513 /* SCRATCH must be shared because they represent distinct values. */
2515 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2520 if (shared_const_p (orig
))
2525 /* A MEM is allowed to be shared if its address is constant. */
2526 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2527 || reload_completed
|| reload_in_progress
)
2536 /* This rtx may not be shared. If it has already been seen,
2537 replace it with a copy of itself. */
2538 #ifdef ENABLE_CHECKING
2539 if (RTX_FLAG (x
, used
))
2541 error ("invalid rtl sharing found in the insn");
2543 error ("shared rtx");
2545 internal_error ("internal consistency failure");
2548 gcc_assert (!RTX_FLAG (x
, used
));
2550 RTX_FLAG (x
, used
) = 1;
2552 /* Now scan the subexpressions recursively. */
2554 format_ptr
= GET_RTX_FORMAT (code
);
2556 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2558 switch (*format_ptr
++)
2561 verify_rtx_sharing (XEXP (x
, i
), insn
);
2565 if (XVEC (x
, i
) != NULL
)
2568 int len
= XVECLEN (x
, i
);
2570 for (j
= 0; j
< len
; j
++)
2572 /* We allow sharing of ASM_OPERANDS inside single
2574 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2575 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2577 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2579 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2588 /* Go through all the RTL insn bodies and check that there is no unexpected
2589 sharing in between the subexpressions. */
2592 verify_rtl_sharing (void)
2596 timevar_push (TV_VERIFY_RTL_SHARING
);
2598 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2601 reset_used_flags (PATTERN (p
));
2602 reset_used_flags (REG_NOTES (p
));
2604 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2605 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2608 rtx q
, sequence
= PATTERN (p
);
2610 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2612 q
= XVECEXP (sequence
, 0, i
);
2613 gcc_assert (INSN_P (q
));
2614 reset_used_flags (PATTERN (q
));
2615 reset_used_flags (REG_NOTES (q
));
2617 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q
));
2622 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2625 verify_rtx_sharing (PATTERN (p
), p
);
2626 verify_rtx_sharing (REG_NOTES (p
), p
);
2628 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p
), p
);
2631 timevar_pop (TV_VERIFY_RTL_SHARING
);
2634 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2635 Assumes the mark bits are cleared at entry. */
2638 unshare_all_rtl_in_chain (rtx insn
)
2640 for (; insn
; insn
= NEXT_INSN (insn
))
2643 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2644 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2646 CALL_INSN_FUNCTION_USAGE (insn
)
2647 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2651 /* Go through all virtual stack slots of a function and mark them as
2652 shared. We never replace the DECL_RTLs themselves with a copy,
2653 but expressions mentioned into a DECL_RTL cannot be shared with
2654 expressions in the instruction stream.
2656 Note that reload may convert pseudo registers into memories in-place.
2657 Pseudo registers are always shared, but MEMs never are. Thus if we
2658 reset the used flags on MEMs in the instruction stream, we must set
2659 them again on MEMs that appear in DECL_RTLs. */
2662 set_used_decls (tree blk
)
2667 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2668 if (DECL_RTL_SET_P (t
))
2669 set_used_flags (DECL_RTL (t
));
2671 /* Now process sub-blocks. */
2672 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2676 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2677 Recursively does the same for subexpressions. Uses
2678 copy_rtx_if_shared_1 to reduce stack space. */
2681 copy_rtx_if_shared (rtx orig
)
2683 copy_rtx_if_shared_1 (&orig
);
2687 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2688 use. Recursively does the same for subexpressions. */
2691 copy_rtx_if_shared_1 (rtx
*orig1
)
2697 const char *format_ptr
;
2701 /* Repeat is used to turn tail-recursion into iteration. */
2708 code
= GET_CODE (x
);
2710 /* These types may be freely shared. */
2729 /* SCRATCH must be shared because they represent distinct values. */
2732 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2737 if (shared_const_p (x
))
2747 /* The chain of insns is not being copied. */
2754 /* This rtx may not be shared. If it has already been seen,
2755 replace it with a copy of itself. */
2757 if (RTX_FLAG (x
, used
))
2759 x
= shallow_copy_rtx (x
);
2762 RTX_FLAG (x
, used
) = 1;
2764 /* Now scan the subexpressions recursively.
2765 We can store any replaced subexpressions directly into X
2766 since we know X is not shared! Any vectors in X
2767 must be copied if X was copied. */
2769 format_ptr
= GET_RTX_FORMAT (code
);
2770 length
= GET_RTX_LENGTH (code
);
2773 for (i
= 0; i
< length
; i
++)
2775 switch (*format_ptr
++)
2779 copy_rtx_if_shared_1 (last_ptr
);
2780 last_ptr
= &XEXP (x
, i
);
2784 if (XVEC (x
, i
) != NULL
)
2787 int len
= XVECLEN (x
, i
);
2789 /* Copy the vector iff I copied the rtx and the length
2791 if (copied
&& len
> 0)
2792 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2794 /* Call recursively on all inside the vector. */
2795 for (j
= 0; j
< len
; j
++)
2798 copy_rtx_if_shared_1 (last_ptr
);
2799 last_ptr
= &XVECEXP (x
, i
, j
);
2814 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2817 mark_used_flags (rtx x
, int flag
)
2821 const char *format_ptr
;
2824 /* Repeat is used to turn tail-recursion into iteration. */
2829 code
= GET_CODE (x
);
2831 /* These types may be freely shared so we needn't do any resetting
2858 /* The chain of insns is not being copied. */
2865 RTX_FLAG (x
, used
) = flag
;
2867 format_ptr
= GET_RTX_FORMAT (code
);
2868 length
= GET_RTX_LENGTH (code
);
2870 for (i
= 0; i
< length
; i
++)
2872 switch (*format_ptr
++)
2880 mark_used_flags (XEXP (x
, i
), flag
);
2884 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2885 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2891 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2892 to look for shared sub-parts. */
2895 reset_used_flags (rtx x
)
2897 mark_used_flags (x
, 0);
2900 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2901 to look for shared sub-parts. */
2904 set_used_flags (rtx x
)
2906 mark_used_flags (x
, 1);
2909 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2910 Return X or the rtx for the pseudo reg the value of X was copied into.
2911 OTHER must be valid as a SET_DEST. */
2914 make_safe_from (rtx x
, rtx other
)
2917 switch (GET_CODE (other
))
2920 other
= SUBREG_REG (other
);
2922 case STRICT_LOW_PART
:
2925 other
= XEXP (other
, 0);
2934 && GET_CODE (x
) != SUBREG
)
2936 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2937 || reg_mentioned_p (other
, x
))))
2939 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2940 emit_move_insn (temp
, x
);
2946 /* Emission of insns (adding them to the doubly-linked list). */
2948 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2951 get_last_insn_anywhere (void)
2953 struct sequence_stack
*stack
;
2954 if (get_last_insn ())
2955 return get_last_insn ();
2956 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2957 if (stack
->last
!= 0)
2962 /* Return the first nonnote insn emitted in current sequence or current
2963 function. This routine looks inside SEQUENCEs. */
2966 get_first_nonnote_insn (void)
2968 rtx insn
= get_insns ();
2973 for (insn
= next_insn (insn
);
2974 insn
&& NOTE_P (insn
);
2975 insn
= next_insn (insn
))
2979 if (NONJUMP_INSN_P (insn
)
2980 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2981 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2988 /* Return the last nonnote insn emitted in current sequence or current
2989 function. This routine looks inside SEQUENCEs. */
2992 get_last_nonnote_insn (void)
2994 rtx insn
= get_last_insn ();
2999 for (insn
= previous_insn (insn
);
3000 insn
&& NOTE_P (insn
);
3001 insn
= previous_insn (insn
))
3005 if (NONJUMP_INSN_P (insn
)
3006 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3007 insn
= XVECEXP (PATTERN (insn
), 0,
3008 XVECLEN (PATTERN (insn
), 0) - 1);
3015 /* Return the number of actual (non-debug) insns emitted in this
3019 get_max_insn_count (void)
3021 int n
= cur_insn_uid
;
3023 /* The table size must be stable across -g, to avoid codegen
3024 differences due to debug insns, and not be affected by
3025 -fmin-insn-uid, to avoid excessive table size and to simplify
3026 debugging of -fcompare-debug failures. */
3027 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3028 n
-= cur_debug_insn_uid
;
3030 n
-= MIN_NONDEBUG_INSN_UID
;
3036 /* Return the next insn. If it is a SEQUENCE, return the first insn
3040 next_insn (rtx insn
)
3044 insn
= NEXT_INSN (insn
);
3045 if (insn
&& NONJUMP_INSN_P (insn
)
3046 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3047 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3053 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3057 previous_insn (rtx insn
)
3061 insn
= PREV_INSN (insn
);
3062 if (insn
&& NONJUMP_INSN_P (insn
)
3063 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3064 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3070 /* Return the next insn after INSN that is not a NOTE. This routine does not
3071 look inside SEQUENCEs. */
3074 next_nonnote_insn (rtx insn
)
3078 insn
= NEXT_INSN (insn
);
3079 if (insn
== 0 || !NOTE_P (insn
))
3086 /* Return the next insn after INSN that is not a NOTE, but stop the
3087 search before we enter another basic block. This routine does not
3088 look inside SEQUENCEs. */
3091 next_nonnote_insn_bb (rtx insn
)
3095 insn
= NEXT_INSN (insn
);
3096 if (insn
== 0 || !NOTE_P (insn
))
3098 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3105 /* Return the previous insn before INSN that is not a NOTE. This routine does
3106 not look inside SEQUENCEs. */
3109 prev_nonnote_insn (rtx insn
)
3113 insn
= PREV_INSN (insn
);
3114 if (insn
== 0 || !NOTE_P (insn
))
3121 /* Return the previous insn before INSN that is not a NOTE, but stop
3122 the search before we enter another basic block. This routine does
3123 not look inside SEQUENCEs. */
3126 prev_nonnote_insn_bb (rtx insn
)
3130 insn
= PREV_INSN (insn
);
3131 if (insn
== 0 || !NOTE_P (insn
))
3133 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3140 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3141 routine does not look inside SEQUENCEs. */
3144 next_nondebug_insn (rtx insn
)
3148 insn
= NEXT_INSN (insn
);
3149 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3156 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3157 This routine does not look inside SEQUENCEs. */
3160 prev_nondebug_insn (rtx insn
)
3164 insn
= PREV_INSN (insn
);
3165 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3172 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3173 This routine does not look inside SEQUENCEs. */
3176 next_nonnote_nondebug_insn (rtx insn
)
3180 insn
= NEXT_INSN (insn
);
3181 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3188 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3189 This routine does not look inside SEQUENCEs. */
3192 prev_nonnote_nondebug_insn (rtx insn
)
3196 insn
= PREV_INSN (insn
);
3197 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3204 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3205 or 0, if there is none. This routine does not look inside
3209 next_real_insn (rtx insn
)
3213 insn
= NEXT_INSN (insn
);
3214 if (insn
== 0 || INSN_P (insn
))
3221 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3222 or 0, if there is none. This routine does not look inside
3226 prev_real_insn (rtx insn
)
3230 insn
= PREV_INSN (insn
);
3231 if (insn
== 0 || INSN_P (insn
))
3238 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3239 This routine does not look inside SEQUENCEs. */
3242 last_call_insn (void)
3246 for (insn
= get_last_insn ();
3247 insn
&& !CALL_P (insn
);
3248 insn
= PREV_INSN (insn
))
3254 /* Find the next insn after INSN that really does something. This routine
3255 does not look inside SEQUENCEs. After reload this also skips over
3256 standalone USE and CLOBBER insn. */
3259 active_insn_p (const_rtx insn
)
3261 return (CALL_P (insn
) || JUMP_P (insn
)
3262 || (NONJUMP_INSN_P (insn
)
3263 && (! reload_completed
3264 || (GET_CODE (PATTERN (insn
)) != USE
3265 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3269 next_active_insn (rtx insn
)
3273 insn
= NEXT_INSN (insn
);
3274 if (insn
== 0 || active_insn_p (insn
))
3281 /* Find the last insn before INSN that really does something. This routine
3282 does not look inside SEQUENCEs. After reload this also skips over
3283 standalone USE and CLOBBER insn. */
3286 prev_active_insn (rtx insn
)
3290 insn
= PREV_INSN (insn
);
3291 if (insn
== 0 || active_insn_p (insn
))
3298 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3301 next_label (rtx insn
)
3305 insn
= NEXT_INSN (insn
);
3306 if (insn
== 0 || LABEL_P (insn
))
3313 /* Return the last label to mark the same position as LABEL. Return LABEL
3314 itself if it is null or any return rtx. */
3317 skip_consecutive_labels (rtx label
)
3321 if (label
&& ANY_RETURN_P (label
))
3324 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3332 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3333 and REG_CC_USER notes so we can find it. */
3336 link_cc0_insns (rtx insn
)
3338 rtx user
= next_nonnote_insn (insn
);
3340 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3341 user
= XVECEXP (PATTERN (user
), 0, 0);
3343 add_reg_note (user
, REG_CC_SETTER
, insn
);
3344 add_reg_note (insn
, REG_CC_USER
, user
);
3347 /* Return the next insn that uses CC0 after INSN, which is assumed to
3348 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3349 applied to the result of this function should yield INSN).
3351 Normally, this is simply the next insn. However, if a REG_CC_USER note
3352 is present, it contains the insn that uses CC0.
3354 Return 0 if we can't find the insn. */
3357 next_cc0_user (rtx insn
)
3359 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3362 return XEXP (note
, 0);
3364 insn
= next_nonnote_insn (insn
);
3365 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3366 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3368 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3374 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3375 note, it is the previous insn. */
3378 prev_cc0_setter (rtx insn
)
3380 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3383 return XEXP (note
, 0);
3385 insn
= prev_nonnote_insn (insn
);
3386 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3393 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3396 find_auto_inc (rtx
*xp
, void *data
)
3399 rtx reg
= (rtx
) data
;
3401 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3404 switch (GET_CODE (x
))
3412 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3423 /* Increment the label uses for all labels present in rtx. */
3426 mark_label_nuses (rtx x
)
3432 code
= GET_CODE (x
);
3433 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3434 LABEL_NUSES (XEXP (x
, 0))++;
3436 fmt
= GET_RTX_FORMAT (code
);
3437 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3440 mark_label_nuses (XEXP (x
, i
));
3441 else if (fmt
[i
] == 'E')
3442 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3443 mark_label_nuses (XVECEXP (x
, i
, j
));
3448 /* Try splitting insns that can be split for better scheduling.
3449 PAT is the pattern which might split.
3450 TRIAL is the insn providing PAT.
3451 LAST is nonzero if we should return the last insn of the sequence produced.
3453 If this routine succeeds in splitting, it returns the first or last
3454 replacement insn depending on the value of LAST. Otherwise, it
3455 returns TRIAL. If the insn to be returned can be split, it will be. */
3458 try_split (rtx pat
, rtx trial
, int last
)
3460 rtx before
= PREV_INSN (trial
);
3461 rtx after
= NEXT_INSN (trial
);
3462 int has_barrier
= 0;
3465 rtx insn_last
, insn
;
3468 /* We're not good at redistributing frame information. */
3469 if (RTX_FRAME_RELATED_P (trial
))
3472 if (any_condjump_p (trial
)
3473 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3474 split_branch_probability
= INTVAL (XEXP (note
, 0));
3475 probability
= split_branch_probability
;
3477 seq
= split_insns (pat
, trial
);
3479 split_branch_probability
= -1;
3481 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3482 We may need to handle this specially. */
3483 if (after
&& BARRIER_P (after
))
3486 after
= NEXT_INSN (after
);
3492 /* Avoid infinite loop if any insn of the result matches
3493 the original pattern. */
3497 if (INSN_P (insn_last
)
3498 && rtx_equal_p (PATTERN (insn_last
), pat
))
3500 if (!NEXT_INSN (insn_last
))
3502 insn_last
= NEXT_INSN (insn_last
);
3505 /* We will be adding the new sequence to the function. The splitters
3506 may have introduced invalid RTL sharing, so unshare the sequence now. */
3507 unshare_all_rtl_in_chain (seq
);
3510 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3514 mark_jump_label (PATTERN (insn
), insn
, 0);
3516 if (probability
!= -1
3517 && any_condjump_p (insn
)
3518 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3520 /* We can preserve the REG_BR_PROB notes only if exactly
3521 one jump is created, otherwise the machine description
3522 is responsible for this step using
3523 split_branch_probability variable. */
3524 gcc_assert (njumps
== 1);
3525 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3530 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3531 in SEQ and copy any additional information across. */
3534 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3539 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3540 target may have explicitly specified. */
3541 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3544 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3546 /* If the old call was a sibling call, the new one must
3548 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3550 /* If the new call is the last instruction in the sequence,
3551 it will effectively replace the old call in-situ. Otherwise
3552 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3553 so that it comes immediately after the new call. */
3554 if (NEXT_INSN (insn
))
3555 for (next
= NEXT_INSN (trial
);
3556 next
&& NOTE_P (next
);
3557 next
= NEXT_INSN (next
))
3558 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3561 add_insn_after (next
, insn
, NULL
);
3567 /* Copy notes, particularly those related to the CFG. */
3568 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3570 switch (REG_NOTE_KIND (note
))
3573 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3579 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3582 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3586 case REG_NON_LOCAL_GOTO
:
3587 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3590 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3596 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3598 rtx reg
= XEXP (note
, 0);
3599 if (!FIND_REG_INC_NOTE (insn
, reg
)
3600 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3601 add_reg_note (insn
, REG_INC
, reg
);
3607 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3615 /* If there are LABELS inside the split insns increment the
3616 usage count so we don't delete the label. */
3620 while (insn
!= NULL_RTX
)
3622 /* JUMP_P insns have already been "marked" above. */
3623 if (NONJUMP_INSN_P (insn
))
3624 mark_label_nuses (PATTERN (insn
));
3626 insn
= PREV_INSN (insn
);
3630 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3632 delete_insn (trial
);
3634 emit_barrier_after (tem
);
3636 /* Recursively call try_split for each new insn created; by the
3637 time control returns here that insn will be fully split, so
3638 set LAST and continue from the insn after the one returned.
3639 We can't use next_active_insn here since AFTER may be a note.
3640 Ignore deleted insns, which can be occur if not optimizing. */
3641 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3642 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3643 tem
= try_split (PATTERN (tem
), tem
, 1);
3645 /* Return either the first or the last insn, depending on which was
3648 ? (after
? PREV_INSN (after
) : get_last_insn ())
3649 : NEXT_INSN (before
);
3652 /* Make and return an INSN rtx, initializing all its slots.
3653 Store PATTERN in the pattern slots. */
3656 make_insn_raw (rtx pattern
)
3660 insn
= rtx_alloc (INSN
);
3662 INSN_UID (insn
) = cur_insn_uid
++;
3663 PATTERN (insn
) = pattern
;
3664 INSN_CODE (insn
) = -1;
3665 REG_NOTES (insn
) = NULL
;
3666 INSN_LOCATOR (insn
) = curr_insn_locator ();
3667 BLOCK_FOR_INSN (insn
) = NULL
;
3669 #ifdef ENABLE_RTL_CHECKING
3672 && (returnjump_p (insn
)
3673 || (GET_CODE (insn
) == SET
3674 && SET_DEST (insn
) == pc_rtx
)))
3676 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3684 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3687 make_debug_insn_raw (rtx pattern
)
3691 insn
= rtx_alloc (DEBUG_INSN
);
3692 INSN_UID (insn
) = cur_debug_insn_uid
++;
3693 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3694 INSN_UID (insn
) = cur_insn_uid
++;
3696 PATTERN (insn
) = pattern
;
3697 INSN_CODE (insn
) = -1;
3698 REG_NOTES (insn
) = NULL
;
3699 INSN_LOCATOR (insn
) = curr_insn_locator ();
3700 BLOCK_FOR_INSN (insn
) = NULL
;
3705 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3708 make_jump_insn_raw (rtx pattern
)
3712 insn
= rtx_alloc (JUMP_INSN
);
3713 INSN_UID (insn
) = cur_insn_uid
++;
3715 PATTERN (insn
) = pattern
;
3716 INSN_CODE (insn
) = -1;
3717 REG_NOTES (insn
) = NULL
;
3718 JUMP_LABEL (insn
) = NULL
;
3719 INSN_LOCATOR (insn
) = curr_insn_locator ();
3720 BLOCK_FOR_INSN (insn
) = NULL
;
3725 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3728 make_call_insn_raw (rtx pattern
)
3732 insn
= rtx_alloc (CALL_INSN
);
3733 INSN_UID (insn
) = cur_insn_uid
++;
3735 PATTERN (insn
) = pattern
;
3736 INSN_CODE (insn
) = -1;
3737 REG_NOTES (insn
) = NULL
;
3738 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3739 INSN_LOCATOR (insn
) = curr_insn_locator ();
3740 BLOCK_FOR_INSN (insn
) = NULL
;
3745 /* Add INSN to the end of the doubly-linked list.
3746 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3751 PREV_INSN (insn
) = get_last_insn();
3752 NEXT_INSN (insn
) = 0;
3754 if (NULL
!= get_last_insn())
3755 NEXT_INSN (get_last_insn ()) = insn
;
3757 if (NULL
== get_insns ())
3758 set_first_insn (insn
);
3760 set_last_insn (insn
);
3763 /* Add INSN into the doubly-linked list after insn AFTER. This and
3764 the next should be the only functions called to insert an insn once
3765 delay slots have been filled since only they know how to update a
3769 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3771 rtx next
= NEXT_INSN (after
);
3773 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3775 NEXT_INSN (insn
) = next
;
3776 PREV_INSN (insn
) = after
;
3780 PREV_INSN (next
) = insn
;
3781 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3782 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3784 else if (get_last_insn () == after
)
3785 set_last_insn (insn
);
3788 struct sequence_stack
*stack
= seq_stack
;
3789 /* Scan all pending sequences too. */
3790 for (; stack
; stack
= stack
->next
)
3791 if (after
== stack
->last
)
3800 if (!BARRIER_P (after
)
3801 && !BARRIER_P (insn
)
3802 && (bb
= BLOCK_FOR_INSN (after
)))
3804 set_block_for_insn (insn
, bb
);
3806 df_insn_rescan (insn
);
3807 /* Should not happen as first in the BB is always
3808 either NOTE or LABEL. */
3809 if (BB_END (bb
) == after
3810 /* Avoid clobbering of structure when creating new BB. */
3811 && !BARRIER_P (insn
)
3812 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3816 NEXT_INSN (after
) = insn
;
3817 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3819 rtx sequence
= PATTERN (after
);
3820 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3824 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3825 the previous should be the only functions called to insert an insn
3826 once delay slots have been filled since only they know how to
3827 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3831 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3833 rtx prev
= PREV_INSN (before
);
3835 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3837 PREV_INSN (insn
) = prev
;
3838 NEXT_INSN (insn
) = before
;
3842 NEXT_INSN (prev
) = insn
;
3843 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3845 rtx sequence
= PATTERN (prev
);
3846 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3849 else if (get_insns () == before
)
3850 set_first_insn (insn
);
3853 struct sequence_stack
*stack
= seq_stack
;
3854 /* Scan all pending sequences too. */
3855 for (; stack
; stack
= stack
->next
)
3856 if (before
== stack
->first
)
3858 stack
->first
= insn
;
3866 && !BARRIER_P (before
)
3867 && !BARRIER_P (insn
))
3868 bb
= BLOCK_FOR_INSN (before
);
3872 set_block_for_insn (insn
, bb
);
3874 df_insn_rescan (insn
);
3875 /* Should not happen as first in the BB is always either NOTE or
3877 gcc_assert (BB_HEAD (bb
) != insn
3878 /* Avoid clobbering of structure when creating new BB. */
3880 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3883 PREV_INSN (before
) = insn
;
3884 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3885 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3889 /* Replace insn with an deleted instruction note. */
3892 set_insn_deleted (rtx insn
)
3894 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3895 PUT_CODE (insn
, NOTE
);
3896 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3900 /* Remove an insn from its doubly-linked list. This function knows how
3901 to handle sequences. */
3903 remove_insn (rtx insn
)
3905 rtx next
= NEXT_INSN (insn
);
3906 rtx prev
= PREV_INSN (insn
);
3909 /* Later in the code, the block will be marked dirty. */
3910 df_insn_delete (NULL
, INSN_UID (insn
));
3914 NEXT_INSN (prev
) = next
;
3915 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3917 rtx sequence
= PATTERN (prev
);
3918 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3921 else if (get_insns () == insn
)
3924 PREV_INSN (next
) = NULL
;
3925 set_first_insn (next
);
3929 struct sequence_stack
*stack
= seq_stack
;
3930 /* Scan all pending sequences too. */
3931 for (; stack
; stack
= stack
->next
)
3932 if (insn
== stack
->first
)
3934 stack
->first
= next
;
3943 PREV_INSN (next
) = prev
;
3944 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3945 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3947 else if (get_last_insn () == insn
)
3948 set_last_insn (prev
);
3951 struct sequence_stack
*stack
= seq_stack
;
3952 /* Scan all pending sequences too. */
3953 for (; stack
; stack
= stack
->next
)
3954 if (insn
== stack
->last
)
3962 if (!BARRIER_P (insn
)
3963 && (bb
= BLOCK_FOR_INSN (insn
)))
3965 if (NONDEBUG_INSN_P (insn
))
3966 df_set_bb_dirty (bb
);
3967 if (BB_HEAD (bb
) == insn
)
3969 /* Never ever delete the basic block note without deleting whole
3971 gcc_assert (!NOTE_P (insn
));
3972 BB_HEAD (bb
) = next
;
3974 if (BB_END (bb
) == insn
)
3979 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3982 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3984 gcc_assert (call_insn
&& CALL_P (call_insn
));
3986 /* Put the register usage information on the CALL. If there is already
3987 some usage information, put ours at the end. */
3988 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3992 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3993 link
= XEXP (link
, 1))
3996 XEXP (link
, 1) = call_fusage
;
3999 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4002 /* Delete all insns made since FROM.
4003 FROM becomes the new last instruction. */
4006 delete_insns_since (rtx from
)
4011 NEXT_INSN (from
) = 0;
4012 set_last_insn (from
);
4015 /* This function is deprecated, please use sequences instead.
4017 Move a consecutive bunch of insns to a different place in the chain.
4018 The insns to be moved are those between FROM and TO.
4019 They are moved to a new position after the insn AFTER.
4020 AFTER must not be FROM or TO or any insn in between.
4022 This function does not know about SEQUENCEs and hence should not be
4023 called after delay-slot filling has been done. */
4026 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4028 #ifdef ENABLE_CHECKING
4030 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4031 gcc_assert (after
!= x
);
4032 gcc_assert (after
!= to
);
4035 /* Splice this bunch out of where it is now. */
4036 if (PREV_INSN (from
))
4037 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4039 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4040 if (get_last_insn () == to
)
4041 set_last_insn (PREV_INSN (from
));
4042 if (get_insns () == from
)
4043 set_first_insn (NEXT_INSN (to
));
4045 /* Make the new neighbors point to it and it to them. */
4046 if (NEXT_INSN (after
))
4047 PREV_INSN (NEXT_INSN (after
)) = to
;
4049 NEXT_INSN (to
) = NEXT_INSN (after
);
4050 PREV_INSN (from
) = after
;
4051 NEXT_INSN (after
) = from
;
4052 if (after
== get_last_insn())
4056 /* Same as function above, but take care to update BB boundaries. */
4058 reorder_insns (rtx from
, rtx to
, rtx after
)
4060 rtx prev
= PREV_INSN (from
);
4061 basic_block bb
, bb2
;
4063 reorder_insns_nobb (from
, to
, after
);
4065 if (!BARRIER_P (after
)
4066 && (bb
= BLOCK_FOR_INSN (after
)))
4069 df_set_bb_dirty (bb
);
4071 if (!BARRIER_P (from
)
4072 && (bb2
= BLOCK_FOR_INSN (from
)))
4074 if (BB_END (bb2
) == to
)
4075 BB_END (bb2
) = prev
;
4076 df_set_bb_dirty (bb2
);
4079 if (BB_END (bb
) == after
)
4082 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4084 df_insn_change_bb (x
, bb
);
4089 /* Emit insn(s) of given code and pattern
4090 at a specified place within the doubly-linked list.
4092 All of the emit_foo global entry points accept an object
4093 X which is either an insn list or a PATTERN of a single
4096 There are thus a few canonical ways to generate code and
4097 emit it at a specific place in the instruction stream. For
4098 example, consider the instruction named SPOT and the fact that
4099 we would like to emit some instructions before SPOT. We might
4103 ... emit the new instructions ...
4104 insns_head = get_insns ();
4107 emit_insn_before (insns_head, SPOT);
4109 It used to be common to generate SEQUENCE rtl instead, but that
4110 is a relic of the past which no longer occurs. The reason is that
4111 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4112 generated would almost certainly die right after it was created. */
4115 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4116 rtx (*make_raw
) (rtx
))
4120 gcc_assert (before
);
4125 switch (GET_CODE (x
))
4137 rtx next
= NEXT_INSN (insn
);
4138 add_insn_before (insn
, before
, bb
);
4144 #ifdef ENABLE_RTL_CHECKING
4151 last
= (*make_raw
) (x
);
4152 add_insn_before (last
, before
, bb
);
4159 /* Make X be output before the instruction BEFORE. */
4162 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4164 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4167 /* Make an instruction with body X and code JUMP_INSN
4168 and output it before the instruction BEFORE. */
4171 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4173 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4174 make_jump_insn_raw
);
4177 /* Make an instruction with body X and code CALL_INSN
4178 and output it before the instruction BEFORE. */
4181 emit_call_insn_before_noloc (rtx x
, rtx before
)
4183 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4184 make_call_insn_raw
);
4187 /* Make an instruction with body X and code DEBUG_INSN
4188 and output it before the instruction BEFORE. */
4191 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4193 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4194 make_debug_insn_raw
);
4197 /* Make an insn of code BARRIER
4198 and output it before the insn BEFORE. */
4201 emit_barrier_before (rtx before
)
4203 rtx insn
= rtx_alloc (BARRIER
);
4205 INSN_UID (insn
) = cur_insn_uid
++;
4207 add_insn_before (insn
, before
, NULL
);
4211 /* Emit the label LABEL before the insn BEFORE. */
4214 emit_label_before (rtx label
, rtx before
)
4216 /* This can be called twice for the same label as a result of the
4217 confusion that follows a syntax error! So make it harmless. */
4218 if (INSN_UID (label
) == 0)
4220 INSN_UID (label
) = cur_insn_uid
++;
4221 add_insn_before (label
, before
, NULL
);
4227 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4230 emit_note_before (enum insn_note subtype
, rtx before
)
4232 rtx note
= rtx_alloc (NOTE
);
4233 INSN_UID (note
) = cur_insn_uid
++;
4234 NOTE_KIND (note
) = subtype
;
4235 BLOCK_FOR_INSN (note
) = NULL
;
4236 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4238 add_insn_before (note
, before
, NULL
);
4242 /* Helper for emit_insn_after, handles lists of instructions
4246 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4250 if (!bb
&& !BARRIER_P (after
))
4251 bb
= BLOCK_FOR_INSN (after
);
4255 df_set_bb_dirty (bb
);
4256 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4257 if (!BARRIER_P (last
))
4259 set_block_for_insn (last
, bb
);
4260 df_insn_rescan (last
);
4262 if (!BARRIER_P (last
))
4264 set_block_for_insn (last
, bb
);
4265 df_insn_rescan (last
);
4267 if (BB_END (bb
) == after
)
4271 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4274 after_after
= NEXT_INSN (after
);
4276 NEXT_INSN (after
) = first
;
4277 PREV_INSN (first
) = after
;
4278 NEXT_INSN (last
) = after_after
;
4280 PREV_INSN (after_after
) = last
;
4282 if (after
== get_last_insn())
4283 set_last_insn (last
);
4289 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4290 rtx (*make_raw
)(rtx
))
4299 switch (GET_CODE (x
))
4308 last
= emit_insn_after_1 (x
, after
, bb
);
4311 #ifdef ENABLE_RTL_CHECKING
4318 last
= (*make_raw
) (x
);
4319 add_insn_after (last
, after
, bb
);
4326 /* Make X be output after the insn AFTER and set the BB of insn. If
4327 BB is NULL, an attempt is made to infer the BB from AFTER. */
4330 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4332 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4336 /* Make an insn of code JUMP_INSN with body X
4337 and output it after the insn AFTER. */
4340 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4342 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4345 /* Make an instruction with body X and code CALL_INSN
4346 and output it after the instruction AFTER. */
4349 emit_call_insn_after_noloc (rtx x
, rtx after
)
4351 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4354 /* Make an instruction with body X and code CALL_INSN
4355 and output it after the instruction AFTER. */
4358 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4360 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4363 /* Make an insn of code BARRIER
4364 and output it after the insn AFTER. */
4367 emit_barrier_after (rtx after
)
4369 rtx insn
= rtx_alloc (BARRIER
);
4371 INSN_UID (insn
) = cur_insn_uid
++;
4373 add_insn_after (insn
, after
, NULL
);
4377 /* Emit the label LABEL after the insn AFTER. */
4380 emit_label_after (rtx label
, rtx after
)
4382 /* This can be called twice for the same label
4383 as a result of the confusion that follows a syntax error!
4384 So make it harmless. */
4385 if (INSN_UID (label
) == 0)
4387 INSN_UID (label
) = cur_insn_uid
++;
4388 add_insn_after (label
, after
, NULL
);
4394 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4397 emit_note_after (enum insn_note subtype
, rtx after
)
4399 rtx note
= rtx_alloc (NOTE
);
4400 INSN_UID (note
) = cur_insn_uid
++;
4401 NOTE_KIND (note
) = subtype
;
4402 BLOCK_FOR_INSN (note
) = NULL
;
4403 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4404 add_insn_after (note
, after
, NULL
);
4408 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4409 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4412 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4413 rtx (*make_raw
) (rtx
))
4415 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4417 if (pattern
== NULL_RTX
|| !loc
)
4420 after
= NEXT_INSN (after
);
4423 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4424 INSN_LOCATOR (after
) = loc
;
4427 after
= NEXT_INSN (after
);
4432 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4433 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4437 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4438 rtx (*make_raw
) (rtx
))
4442 if (skip_debug_insns
)
4443 while (DEBUG_INSN_P (prev
))
4444 prev
= PREV_INSN (prev
);
4447 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATOR (prev
),
4450 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4453 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4455 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4457 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4460 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4462 emit_insn_after (rtx pattern
, rtx after
)
4464 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4467 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4469 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4471 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4474 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4476 emit_jump_insn_after (rtx pattern
, rtx after
)
4478 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4481 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4483 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4485 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4488 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4490 emit_call_insn_after (rtx pattern
, rtx after
)
4492 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4495 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4497 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4499 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4502 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4504 emit_debug_insn_after (rtx pattern
, rtx after
)
4506 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4509 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4510 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4511 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4515 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4516 rtx (*make_raw
) (rtx
))
4518 rtx first
= PREV_INSN (before
);
4519 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4520 insnp
? before
: NULL_RTX
,
4523 if (pattern
== NULL_RTX
|| !loc
)
4527 first
= get_insns ();
4529 first
= NEXT_INSN (first
);
4532 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4533 INSN_LOCATOR (first
) = loc
;
4536 first
= NEXT_INSN (first
);
4541 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4542 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4543 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4544 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4547 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4548 bool insnp
, rtx (*make_raw
) (rtx
))
4552 if (skip_debug_insns
)
4553 while (DEBUG_INSN_P (next
))
4554 next
= PREV_INSN (next
);
4557 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATOR (next
),
4560 return emit_pattern_before_noloc (pattern
, before
,
4561 insnp
? before
: NULL_RTX
,
4565 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4567 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4569 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4573 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4575 emit_insn_before (rtx pattern
, rtx before
)
4577 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4580 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4582 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4584 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4585 make_jump_insn_raw
);
4588 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4590 emit_jump_insn_before (rtx pattern
, rtx before
)
4592 return emit_pattern_before (pattern
, before
, true, false,
4593 make_jump_insn_raw
);
4596 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4598 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4600 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4601 make_call_insn_raw
);
4604 /* Like emit_call_insn_before_noloc,
4605 but set insn_locator according to BEFORE. */
4607 emit_call_insn_before (rtx pattern
, rtx before
)
4609 return emit_pattern_before (pattern
, before
, true, false,
4610 make_call_insn_raw
);
4613 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4615 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4617 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4618 make_debug_insn_raw
);
4621 /* Like emit_debug_insn_before_noloc,
4622 but set insn_locator according to BEFORE. */
4624 emit_debug_insn_before (rtx pattern
, rtx before
)
4626 return emit_pattern_before (pattern
, before
, false, false,
4627 make_debug_insn_raw
);
4630 /* Take X and emit it at the end of the doubly-linked
4633 Returns the last insn emitted. */
4638 rtx last
= get_last_insn();
4644 switch (GET_CODE (x
))
4656 rtx next
= NEXT_INSN (insn
);
4663 #ifdef ENABLE_RTL_CHECKING
4670 last
= make_insn_raw (x
);
4678 /* Make an insn of code DEBUG_INSN with pattern X
4679 and add it to the end of the doubly-linked list. */
4682 emit_debug_insn (rtx x
)
4684 rtx last
= get_last_insn();
4690 switch (GET_CODE (x
))
4702 rtx next
= NEXT_INSN (insn
);
4709 #ifdef ENABLE_RTL_CHECKING
4716 last
= make_debug_insn_raw (x
);
4724 /* Make an insn of code JUMP_INSN with pattern X
4725 and add it to the end of the doubly-linked list. */
4728 emit_jump_insn (rtx x
)
4730 rtx last
= NULL_RTX
, insn
;
4732 switch (GET_CODE (x
))
4744 rtx next
= NEXT_INSN (insn
);
4751 #ifdef ENABLE_RTL_CHECKING
4758 last
= make_jump_insn_raw (x
);
4766 /* Make an insn of code CALL_INSN with pattern X
4767 and add it to the end of the doubly-linked list. */
4770 emit_call_insn (rtx x
)
4774 switch (GET_CODE (x
))
4783 insn
= emit_insn (x
);
4786 #ifdef ENABLE_RTL_CHECKING
4793 insn
= make_call_insn_raw (x
);
4801 /* Add the label LABEL to the end of the doubly-linked list. */
4804 emit_label (rtx label
)
4806 /* This can be called twice for the same label
4807 as a result of the confusion that follows a syntax error!
4808 So make it harmless. */
4809 if (INSN_UID (label
) == 0)
4811 INSN_UID (label
) = cur_insn_uid
++;
4817 /* Make an insn of code BARRIER
4818 and add it to the end of the doubly-linked list. */
4823 rtx barrier
= rtx_alloc (BARRIER
);
4824 INSN_UID (barrier
) = cur_insn_uid
++;
4829 /* Emit a copy of note ORIG. */
4832 emit_note_copy (rtx orig
)
4836 note
= rtx_alloc (NOTE
);
4838 INSN_UID (note
) = cur_insn_uid
++;
4839 NOTE_DATA (note
) = NOTE_DATA (orig
);
4840 NOTE_KIND (note
) = NOTE_KIND (orig
);
4841 BLOCK_FOR_INSN (note
) = NULL
;
4847 /* Make an insn of code NOTE or type NOTE_NO
4848 and add it to the end of the doubly-linked list. */
4851 emit_note (enum insn_note kind
)
4855 note
= rtx_alloc (NOTE
);
4856 INSN_UID (note
) = cur_insn_uid
++;
4857 NOTE_KIND (note
) = kind
;
4858 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4859 BLOCK_FOR_INSN (note
) = NULL
;
4864 /* Emit a clobber of lvalue X. */
4867 emit_clobber (rtx x
)
4869 /* CONCATs should not appear in the insn stream. */
4870 if (GET_CODE (x
) == CONCAT
)
4872 emit_clobber (XEXP (x
, 0));
4873 return emit_clobber (XEXP (x
, 1));
4875 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4878 /* Return a sequence of insns to clobber lvalue X. */
4892 /* Emit a use of rvalue X. */
4897 /* CONCATs should not appear in the insn stream. */
4898 if (GET_CODE (x
) == CONCAT
)
4900 emit_use (XEXP (x
, 0));
4901 return emit_use (XEXP (x
, 1));
4903 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4906 /* Return a sequence of insns to use rvalue X. */
4920 /* Cause next statement to emit a line note even if the line number
4924 force_next_line_note (void)
4929 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4930 note of this type already exists, remove it first. */
4933 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4935 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4941 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4942 has multiple sets (some callers assume single_set
4943 means the insn only has one set, when in fact it
4944 means the insn only has one * useful * set). */
4945 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4951 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4952 It serves no useful purpose and breaks eliminate_regs. */
4953 if (GET_CODE (datum
) == ASM_OPERANDS
)
4958 XEXP (note
, 0) = datum
;
4959 df_notes_rescan (insn
);
4967 XEXP (note
, 0) = datum
;
4973 add_reg_note (insn
, kind
, datum
);
4979 df_notes_rescan (insn
);
4985 return REG_NOTES (insn
);
4988 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
4990 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
4992 rtx set
= single_set (insn
);
4994 if (set
&& SET_DEST (set
) == dst
)
4995 return set_unique_reg_note (insn
, kind
, datum
);
4999 /* Return an indication of which type of insn should have X as a body.
5000 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5002 static enum rtx_code
5003 classify_insn (rtx x
)
5007 if (GET_CODE (x
) == CALL
)
5009 if (ANY_RETURN_P (x
))
5011 if (GET_CODE (x
) == SET
)
5013 if (SET_DEST (x
) == pc_rtx
)
5015 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5020 if (GET_CODE (x
) == PARALLEL
)
5023 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5024 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5026 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5027 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5029 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5030 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5036 /* Emit the rtl pattern X as an appropriate kind of insn.
5037 If X is a label, it is simply added into the insn chain. */
5042 enum rtx_code code
= classify_insn (x
);
5047 return emit_label (x
);
5049 return emit_insn (x
);
5052 rtx insn
= emit_jump_insn (x
);
5053 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5054 return emit_barrier ();
5058 return emit_call_insn (x
);
5060 return emit_debug_insn (x
);
5066 /* Space for free sequence stack entries. */
5067 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5069 /* Begin emitting insns to a sequence. If this sequence will contain
5070 something that might cause the compiler to pop arguments to function
5071 calls (because those pops have previously been deferred; see
5072 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5073 before calling this function. That will ensure that the deferred
5074 pops are not accidentally emitted in the middle of this sequence. */
5077 start_sequence (void)
5079 struct sequence_stack
*tem
;
5081 if (free_sequence_stack
!= NULL
)
5083 tem
= free_sequence_stack
;
5084 free_sequence_stack
= tem
->next
;
5087 tem
= ggc_alloc_sequence_stack ();
5089 tem
->next
= seq_stack
;
5090 tem
->first
= get_insns ();
5091 tem
->last
= get_last_insn ();
5099 /* Set up the insn chain starting with FIRST as the current sequence,
5100 saving the previously current one. See the documentation for
5101 start_sequence for more information about how to use this function. */
5104 push_to_sequence (rtx first
)
5110 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5113 set_first_insn (first
);
5114 set_last_insn (last
);
5117 /* Like push_to_sequence, but take the last insn as an argument to avoid
5118 looping through the list. */
5121 push_to_sequence2 (rtx first
, rtx last
)
5125 set_first_insn (first
);
5126 set_last_insn (last
);
5129 /* Set up the outer-level insn chain
5130 as the current sequence, saving the previously current one. */
5133 push_topmost_sequence (void)
5135 struct sequence_stack
*stack
, *top
= NULL
;
5139 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5142 set_first_insn (top
->first
);
5143 set_last_insn (top
->last
);
5146 /* After emitting to the outer-level insn chain, update the outer-level
5147 insn chain, and restore the previous saved state. */
5150 pop_topmost_sequence (void)
5152 struct sequence_stack
*stack
, *top
= NULL
;
5154 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5157 top
->first
= get_insns ();
5158 top
->last
= get_last_insn ();
5163 /* After emitting to a sequence, restore previous saved state.
5165 To get the contents of the sequence just made, you must call
5166 `get_insns' *before* calling here.
5168 If the compiler might have deferred popping arguments while
5169 generating this sequence, and this sequence will not be immediately
5170 inserted into the instruction stream, use do_pending_stack_adjust
5171 before calling get_insns. That will ensure that the deferred
5172 pops are inserted into this sequence, and not into some random
5173 location in the instruction stream. See INHIBIT_DEFER_POP for more
5174 information about deferred popping of arguments. */
5179 struct sequence_stack
*tem
= seq_stack
;
5181 set_first_insn (tem
->first
);
5182 set_last_insn (tem
->last
);
5183 seq_stack
= tem
->next
;
5185 memset (tem
, 0, sizeof (*tem
));
5186 tem
->next
= free_sequence_stack
;
5187 free_sequence_stack
= tem
;
5190 /* Return 1 if currently emitting into a sequence. */
5193 in_sequence_p (void)
5195 return seq_stack
!= 0;
5198 /* Put the various virtual registers into REGNO_REG_RTX. */
5201 init_virtual_regs (void)
5203 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5204 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5205 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5206 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5207 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5208 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5209 = virtual_preferred_stack_boundary_rtx
;
5213 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5214 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5215 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5216 static int copy_insn_n_scratches
;
5218 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5219 copied an ASM_OPERANDS.
5220 In that case, it is the original input-operand vector. */
5221 static rtvec orig_asm_operands_vector
;
5223 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5224 copied an ASM_OPERANDS.
5225 In that case, it is the copied input-operand vector. */
5226 static rtvec copy_asm_operands_vector
;
5228 /* Likewise for the constraints vector. */
5229 static rtvec orig_asm_constraints_vector
;
5230 static rtvec copy_asm_constraints_vector
;
5232 /* Recursively create a new copy of an rtx for copy_insn.
5233 This function differs from copy_rtx in that it handles SCRATCHes and
5234 ASM_OPERANDs properly.
5235 Normally, this function is not used directly; use copy_insn as front end.
5236 However, you could first copy an insn pattern with copy_insn and then use
5237 this function afterwards to properly copy any REG_NOTEs containing
5241 copy_insn_1 (rtx orig
)
5246 const char *format_ptr
;
5251 code
= GET_CODE (orig
);
5269 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5274 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5275 if (copy_insn_scratch_in
[i
] == orig
)
5276 return copy_insn_scratch_out
[i
];
5280 if (shared_const_p (orig
))
5284 /* A MEM with a constant address is not sharable. The problem is that
5285 the constant address may need to be reloaded. If the mem is shared,
5286 then reloading one copy of this mem will cause all copies to appear
5287 to have been reloaded. */
5293 /* Copy the various flags, fields, and other information. We assume
5294 that all fields need copying, and then clear the fields that should
5295 not be copied. That is the sensible default behavior, and forces
5296 us to explicitly document why we are *not* copying a flag. */
5297 copy
= shallow_copy_rtx (orig
);
5299 /* We do not copy the USED flag, which is used as a mark bit during
5300 walks over the RTL. */
5301 RTX_FLAG (copy
, used
) = 0;
5303 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5306 RTX_FLAG (copy
, jump
) = 0;
5307 RTX_FLAG (copy
, call
) = 0;
5308 RTX_FLAG (copy
, frame_related
) = 0;
5311 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5313 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5314 switch (*format_ptr
++)
5317 if (XEXP (orig
, i
) != NULL
)
5318 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5323 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5324 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5325 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5326 XVEC (copy
, i
) = copy_asm_operands_vector
;
5327 else if (XVEC (orig
, i
) != NULL
)
5329 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5330 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5331 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5342 /* These are left unchanged. */
5349 if (code
== SCRATCH
)
5351 i
= copy_insn_n_scratches
++;
5352 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5353 copy_insn_scratch_in
[i
] = orig
;
5354 copy_insn_scratch_out
[i
] = copy
;
5356 else if (code
== ASM_OPERANDS
)
5358 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5359 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5360 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5361 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5367 /* Create a new copy of an rtx.
5368 This function differs from copy_rtx in that it handles SCRATCHes and
5369 ASM_OPERANDs properly.
5370 INSN doesn't really have to be a full INSN; it could be just the
5373 copy_insn (rtx insn
)
5375 copy_insn_n_scratches
= 0;
5376 orig_asm_operands_vector
= 0;
5377 orig_asm_constraints_vector
= 0;
5378 copy_asm_operands_vector
= 0;
5379 copy_asm_constraints_vector
= 0;
5380 return copy_insn_1 (insn
);
5383 /* Initialize data structures and variables in this file
5384 before generating rtl for each function. */
5389 set_first_insn (NULL
);
5390 set_last_insn (NULL
);
5391 if (MIN_NONDEBUG_INSN_UID
)
5392 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5395 cur_debug_insn_uid
= 1;
5396 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5397 last_location
= UNKNOWN_LOCATION
;
5398 first_label_num
= label_num
;
5401 /* Init the tables that describe all the pseudo regs. */
5403 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5405 crtl
->emit
.regno_pointer_align
5406 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5408 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5410 /* Put copies of all the hard registers into regno_reg_rtx. */
5411 memcpy (regno_reg_rtx
,
5412 initial_regno_reg_rtx
,
5413 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5415 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5416 init_virtual_regs ();
5418 /* Indicate that the virtual registers and stack locations are
5420 REG_POINTER (stack_pointer_rtx
) = 1;
5421 REG_POINTER (frame_pointer_rtx
) = 1;
5422 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5423 REG_POINTER (arg_pointer_rtx
) = 1;
5425 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5426 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5427 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5428 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5429 REG_POINTER (virtual_cfa_rtx
) = 1;
5431 #ifdef STACK_BOUNDARY
5432 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5433 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5434 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5435 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5437 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5438 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5439 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5440 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5441 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5444 #ifdef INIT_EXPANDERS
5449 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5452 gen_const_vector (enum machine_mode mode
, int constant
)
5457 enum machine_mode inner
;
5459 units
= GET_MODE_NUNITS (mode
);
5460 inner
= GET_MODE_INNER (mode
);
5462 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5464 v
= rtvec_alloc (units
);
5466 /* We need to call this function after we set the scalar const_tiny_rtx
5468 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5470 for (i
= 0; i
< units
; ++i
)
5471 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5473 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5477 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5478 all elements are zero, and the one vector when all elements are one. */
5480 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5482 enum machine_mode inner
= GET_MODE_INNER (mode
);
5483 int nunits
= GET_MODE_NUNITS (mode
);
5487 /* Check to see if all of the elements have the same value. */
5488 x
= RTVEC_ELT (v
, nunits
- 1);
5489 for (i
= nunits
- 2; i
>= 0; i
--)
5490 if (RTVEC_ELT (v
, i
) != x
)
5493 /* If the values are all the same, check to see if we can use one of the
5494 standard constant vectors. */
5497 if (x
== CONST0_RTX (inner
))
5498 return CONST0_RTX (mode
);
5499 else if (x
== CONST1_RTX (inner
))
5500 return CONST1_RTX (mode
);
5501 else if (x
== CONSTM1_RTX (inner
))
5502 return CONSTM1_RTX (mode
);
5505 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5508 /* Initialise global register information required by all functions. */
5511 init_emit_regs (void)
5514 enum machine_mode mode
;
5517 /* Reset register attributes */
5518 htab_empty (reg_attrs_htab
);
5520 /* We need reg_raw_mode, so initialize the modes now. */
5521 init_reg_modes_target ();
5523 /* Assign register numbers to the globally defined register rtx. */
5524 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5525 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5526 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5527 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5528 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5529 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5530 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5531 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5532 virtual_incoming_args_rtx
=
5533 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5534 virtual_stack_vars_rtx
=
5535 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5536 virtual_stack_dynamic_rtx
=
5537 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5538 virtual_outgoing_args_rtx
=
5539 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5540 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5541 virtual_preferred_stack_boundary_rtx
=
5542 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5544 /* Initialize RTL for commonly used hard registers. These are
5545 copied into regno_reg_rtx as we begin to compile each function. */
5546 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5547 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5549 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5550 return_address_pointer_rtx
5551 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5554 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5555 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5557 pic_offset_table_rtx
= NULL_RTX
;
5559 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5561 mode
= (enum machine_mode
) i
;
5562 attrs
= ggc_alloc_cleared_mem_attrs ();
5563 attrs
->align
= BITS_PER_UNIT
;
5564 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5565 if (mode
!= BLKmode
)
5567 attrs
->size_known_p
= true;
5568 attrs
->size
= GET_MODE_SIZE (mode
);
5569 if (STRICT_ALIGNMENT
)
5570 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5572 mode_mem_attrs
[i
] = attrs
;
5576 /* Create some permanent unique rtl objects shared between all functions. */
5579 init_emit_once (void)
5582 enum machine_mode mode
;
5583 enum machine_mode double_mode
;
5585 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5587 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5588 const_int_htab_eq
, NULL
);
5590 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5591 const_double_htab_eq
, NULL
);
5593 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5594 const_fixed_htab_eq
, NULL
);
5596 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5597 mem_attrs_htab_eq
, NULL
);
5598 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5599 reg_attrs_htab_eq
, NULL
);
5601 /* Compute the word and byte modes. */
5603 byte_mode
= VOIDmode
;
5604 word_mode
= VOIDmode
;
5605 double_mode
= VOIDmode
;
5607 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5609 mode
= GET_MODE_WIDER_MODE (mode
))
5611 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5612 && byte_mode
== VOIDmode
)
5615 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5616 && word_mode
== VOIDmode
)
5620 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5622 mode
= GET_MODE_WIDER_MODE (mode
))
5624 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5625 && double_mode
== VOIDmode
)
5629 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5631 #ifdef INIT_EXPANDERS
5632 /* This is to initialize {init|mark|free}_machine_status before the first
5633 call to push_function_context_to. This is needed by the Chill front
5634 end which calls push_function_context_to before the first call to
5635 init_function_start. */
5639 /* Create the unique rtx's for certain rtx codes and operand values. */
5641 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5642 tries to use these variables. */
5643 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5644 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5645 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5647 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5648 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5649 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5651 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5653 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5654 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5655 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5660 dconsthalf
= dconst1
;
5661 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5663 for (i
= 0; i
< 3; i
++)
5665 const REAL_VALUE_TYPE
*const r
=
5666 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5668 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5670 mode
= GET_MODE_WIDER_MODE (mode
))
5671 const_tiny_rtx
[i
][(int) mode
] =
5672 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5674 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5676 mode
= GET_MODE_WIDER_MODE (mode
))
5677 const_tiny_rtx
[i
][(int) mode
] =
5678 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5680 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5682 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5684 mode
= GET_MODE_WIDER_MODE (mode
))
5685 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5687 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5689 mode
= GET_MODE_WIDER_MODE (mode
))
5690 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5693 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5695 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5697 mode
= GET_MODE_WIDER_MODE (mode
))
5698 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5700 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5702 mode
= GET_MODE_WIDER_MODE (mode
))
5703 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5705 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5707 mode
= GET_MODE_WIDER_MODE (mode
))
5709 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5710 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5713 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5715 mode
= GET_MODE_WIDER_MODE (mode
))
5717 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5718 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5721 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5723 mode
= GET_MODE_WIDER_MODE (mode
))
5725 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5726 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5727 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5730 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5732 mode
= GET_MODE_WIDER_MODE (mode
))
5734 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5735 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5738 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5740 mode
= GET_MODE_WIDER_MODE (mode
))
5742 FCONST0(mode
).data
.high
= 0;
5743 FCONST0(mode
).data
.low
= 0;
5744 FCONST0(mode
).mode
= mode
;
5745 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5746 FCONST0 (mode
), mode
);
5749 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5751 mode
= GET_MODE_WIDER_MODE (mode
))
5753 FCONST0(mode
).data
.high
= 0;
5754 FCONST0(mode
).data
.low
= 0;
5755 FCONST0(mode
).mode
= mode
;
5756 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5757 FCONST0 (mode
), mode
);
5760 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5762 mode
= GET_MODE_WIDER_MODE (mode
))
5764 FCONST0(mode
).data
.high
= 0;
5765 FCONST0(mode
).data
.low
= 0;
5766 FCONST0(mode
).mode
= mode
;
5767 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5768 FCONST0 (mode
), mode
);
5770 /* We store the value 1. */
5771 FCONST1(mode
).data
.high
= 0;
5772 FCONST1(mode
).data
.low
= 0;
5773 FCONST1(mode
).mode
= mode
;
5774 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5775 2 * HOST_BITS_PER_WIDE_INT
,
5776 &FCONST1(mode
).data
.low
,
5777 &FCONST1(mode
).data
.high
,
5778 SIGNED_FIXED_POINT_MODE_P (mode
));
5779 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5780 FCONST1 (mode
), mode
);
5783 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5785 mode
= GET_MODE_WIDER_MODE (mode
))
5787 FCONST0(mode
).data
.high
= 0;
5788 FCONST0(mode
).data
.low
= 0;
5789 FCONST0(mode
).mode
= mode
;
5790 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5791 FCONST0 (mode
), mode
);
5793 /* We store the value 1. */
5794 FCONST1(mode
).data
.high
= 0;
5795 FCONST1(mode
).data
.low
= 0;
5796 FCONST1(mode
).mode
= mode
;
5797 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5798 2 * HOST_BITS_PER_WIDE_INT
,
5799 &FCONST1(mode
).data
.low
,
5800 &FCONST1(mode
).data
.high
,
5801 SIGNED_FIXED_POINT_MODE_P (mode
));
5802 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5803 FCONST1 (mode
), mode
);
5806 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5808 mode
= GET_MODE_WIDER_MODE (mode
))
5810 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5813 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5815 mode
= GET_MODE_WIDER_MODE (mode
))
5817 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5820 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5822 mode
= GET_MODE_WIDER_MODE (mode
))
5824 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5825 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5828 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5830 mode
= GET_MODE_WIDER_MODE (mode
))
5832 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5833 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5836 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5837 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5838 const_tiny_rtx
[0][i
] = const0_rtx
;
5840 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5841 if (STORE_FLAG_VALUE
== 1)
5842 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5845 /* Produce exact duplicate of insn INSN after AFTER.
5846 Care updating of libcall regions if present. */
5849 emit_copy_of_insn_after (rtx insn
, rtx after
)
5853 switch (GET_CODE (insn
))
5856 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5860 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5864 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5868 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5869 if (CALL_INSN_FUNCTION_USAGE (insn
))
5870 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5871 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5872 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5873 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5874 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5875 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5876 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5883 /* Update LABEL_NUSES. */
5884 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5886 INSN_LOCATOR (new_rtx
) = INSN_LOCATOR (insn
);
5888 /* If the old insn is frame related, then so is the new one. This is
5889 primarily needed for IA-64 unwind info which marks epilogue insns,
5890 which may be duplicated by the basic block reordering code. */
5891 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5893 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5894 will make them. REG_LABEL_TARGETs are created there too, but are
5895 supposed to be sticky, so we copy them. */
5896 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5897 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5899 if (GET_CODE (link
) == EXPR_LIST
)
5900 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5901 copy_insn_1 (XEXP (link
, 0)));
5903 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
5906 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5910 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5912 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5914 if (hard_reg_clobbers
[mode
][regno
])
5915 return hard_reg_clobbers
[mode
][regno
];
5917 return (hard_reg_clobbers
[mode
][regno
] =
5918 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5921 #include "gt-emit-rtl.h"