1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
60 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
61 After rtl generation, it is 1 plus the largest register number used. */
63 int reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
65 /* This is *not* reset after each function. It gives each CODE_LABEL
66 in the entire compilation a unique label number. */
68 static int label_num
= 1;
70 /* Lowest label number in current function. */
72 static int first_label_num
;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these except perhaps the floating-point CONST_DOUBLEs
92 are unique; no other rtx-object will be equal to any of these. */
94 /* Avoid warnings by initializing the `fld' field. Since its a union,
95 bypass problems with KNR compilers by only doing so when __GNUC__. */
102 struct _global_rtl global_rtl
=
104 {PC
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* pc_rtx */
105 {CC0
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* cc0_rtx */
106 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* stack_pointer_rtx */
107 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* frame_pointer_rtx */
108 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* hard_frame_pointer_rtx */
109 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* arg_pointer_rtx */
110 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_incoming_args_rtx */
111 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_stack_vars_rtx */
112 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_stack_dynamic_rtx */
113 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_outgoing_args_rtx */
114 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_cfa_rtx */
117 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
118 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
119 record a copy of const[012]_rtx. */
121 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
125 REAL_VALUE_TYPE dconst0
;
126 REAL_VALUE_TYPE dconst1
;
127 REAL_VALUE_TYPE dconst2
;
128 REAL_VALUE_TYPE dconstm1
;
130 /* All references to the following fixed hard registers go through
131 these unique rtl objects. On machines where the frame-pointer and
132 arg-pointer are the same register, they use the same unique object.
134 After register allocation, other rtl objects which used to be pseudo-regs
135 may be clobbered to refer to the frame-pointer register.
136 But references that were originally to the frame-pointer can be
137 distinguished from the others because they contain frame_pointer_rtx.
139 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
140 tricky: until register elimination has taken place hard_frame_pointer_rtx
141 should be used if it is being set, and frame_pointer_rtx otherwise. After
142 register elimination hard_frame_pointer_rtx should always be used.
143 On machines where the two registers are same (most) then these are the
146 In an inline procedure, the stack and frame pointer rtxs may not be
147 used for anything else. */
148 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
149 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
150 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
151 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
152 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
154 /* This is used to implement __builtin_return_address for some machines.
155 See for instance the MIPS port. */
156 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
158 /* We make one copy of (const_int C) where C is in
159 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
160 to save space during the compilation and simplify comparisons of
163 struct rtx_def const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
165 /* The ends of the doubly-linked chain of rtl for the current function.
166 Both are reset to null at the start of rtl generation for the function.
168 start_sequence saves both of these on `sequence_stack' along with
169 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
171 static rtx first_insn
= NULL
;
172 static rtx last_insn
= NULL
;
174 /* RTL_EXPR within which the current sequence will be placed. Use to
175 prevent reuse of any temporaries within the sequence until after the
176 RTL_EXPR is emitted. */
178 tree sequence_rtl_expr
= NULL
;
180 /* INSN_UID for next insn emitted.
181 Reset to 1 for each function compiled. */
183 static int cur_insn_uid
= 1;
185 /* Line number and source file of the last line-number NOTE emitted.
186 This is used to avoid generating duplicates. */
188 static int last_linenum
= 0;
189 static char *last_filename
= 0;
191 /* A vector indexed by pseudo reg number. The allocated length
192 of this vector is regno_pointer_flag_length. Since this
193 vector is needed during the expansion phase when the total
194 number of registers in the function is not yet known,
195 it is copied and made bigger when necessary. */
197 char *regno_pointer_flag
;
198 int regno_pointer_flag_length
;
200 /* Indexed by pseudo register number, if nonzero gives the known alignment
201 for that pseudo (if regno_pointer_flag is set).
202 Allocated in parallel with regno_pointer_flag. */
203 char *regno_pointer_align
;
205 /* Indexed by pseudo register number, gives the rtx for that pseudo.
206 Allocated in parallel with regno_pointer_flag. */
210 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
211 Each element describes one pending sequence.
212 The main insn-chain is saved in the last element of the chain,
213 unless the chain is empty. */
215 struct sequence_stack
*sequence_stack
;
217 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
218 shortly thrown away. We use two mechanisms to prevent this waste:
220 First, we keep a list of the expressions used to represent the sequence
221 stack in sequence_element_free_list.
223 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
224 rtvec for use by gen_sequence. One entry for each size is sufficient
225 because most cases are calls to gen_sequence followed by immediately
226 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
227 destructive on the insn in it anyway and hence can't be redone.
229 We do not bother to save this cached data over nested function calls.
230 Instead, we just reinitialize them. */
232 #define SEQUENCE_RESULT_SIZE 5
234 static struct sequence_stack
*sequence_element_free_list
;
235 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
237 /* During RTL generation, we also keep a list of free INSN rtl codes. */
238 static rtx free_insn
;
240 extern int rtx_equal_function_value_matters
;
242 /* Filename and line number of last line-number note,
243 whether we actually emitted it or not. */
244 extern char *emit_filename
;
245 extern int emit_lineno
;
247 static rtx make_jump_insn_raw
PROTO((rtx
));
248 static rtx make_call_insn_raw
PROTO((rtx
));
249 static rtx find_line_note
PROTO((rtx
));
252 gen_rtx_CONST_INT (mode
, arg
)
253 enum machine_mode mode
;
256 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
257 return &const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
261 return const_true_rtx
;
264 return gen_rtx_raw_CONST_INT (mode
, arg
);
268 gen_rtx_REG (mode
, regno
)
269 enum machine_mode mode
;
272 /* In case the MD file explicitly references the frame pointer, have
273 all such references point to the same frame pointer. This is
274 used during frame pointer elimination to distinguish the explicit
275 references to these registers from pseudos that happened to be
278 If we have eliminated the frame pointer or arg pointer, we will
279 be using it as a normal register, for example as a spill
280 register. In such cases, we might be accessing it in a mode that
281 is not Pmode and therefore cannot use the pre-allocated rtx.
283 Also don't do this when we are making new REGs in reload, since
284 we don't want to get confused with the real pointers. */
286 if (mode
== Pmode
&& !reload_in_progress
)
288 if (regno
== FRAME_POINTER_REGNUM
)
289 return frame_pointer_rtx
;
290 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
291 if (regno
== HARD_FRAME_POINTER_REGNUM
)
292 return hard_frame_pointer_rtx
;
294 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
295 if (regno
== ARG_POINTER_REGNUM
)
296 return arg_pointer_rtx
;
298 #ifdef RETURN_ADDRESS_POINTER_REGNUM
299 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
300 return return_address_pointer_rtx
;
302 if (regno
== STACK_POINTER_REGNUM
)
303 return stack_pointer_rtx
;
306 return gen_rtx_raw_REG (mode
, regno
);
310 gen_rtx_MEM (mode
, addr
)
311 enum machine_mode mode
;
314 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
316 /* This field is not cleared by the mere allocation of the rtx, so
318 MEM_ALIAS_SET (rt
) = 0;
323 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
325 ** This routine generates an RTX of the size specified by
326 ** <code>, which is an RTX code. The RTX structure is initialized
327 ** from the arguments <element1> through <elementn>, which are
328 ** interpreted according to the specific RTX type's format. The
329 ** special machine mode associated with the rtx (if any) is specified
332 ** gen_rtx can be invoked in a way which resembles the lisp-like
333 ** rtx it will generate. For example, the following rtx structure:
335 ** (plus:QI (mem:QI (reg:SI 1))
336 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
338 ** ...would be generated by the following C code:
340 ** gen_rtx (PLUS, QImode,
341 ** gen_rtx (MEM, QImode,
342 ** gen_rtx (REG, SImode, 1)),
343 ** gen_rtx (MEM, QImode,
344 ** gen_rtx (PLUS, SImode,
345 ** gen_rtx (REG, SImode, 2),
346 ** gen_rtx (REG, SImode, 3)))),
351 gen_rtx
VPROTO((enum rtx_code code
, enum machine_mode mode
, ...))
353 #ifndef ANSI_PROTOTYPES
355 enum machine_mode mode
;
358 register int i
; /* Array indices... */
359 register char *fmt
; /* Current rtx's format... */
360 register rtx rt_val
; /* RTX to return to caller... */
364 #ifndef ANSI_PROTOTYPES
365 code
= va_arg (p
, enum rtx_code
);
366 mode
= va_arg (p
, enum machine_mode
);
369 if (code
== CONST_INT
)
370 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
371 else if (code
== REG
)
372 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
373 else if (code
== MEM
)
374 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
377 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
378 rt_val
->mode
= mode
; /* Store the machine mode... */
380 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
381 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
385 case '0': /* Unused field. */
388 case 'i': /* An integer? */
389 XINT (rt_val
, i
) = va_arg (p
, int);
392 case 'w': /* A wide integer? */
393 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
396 case 's': /* A string? */
397 XSTR (rt_val
, i
) = va_arg (p
, char *);
400 case 'e': /* An expression? */
401 case 'u': /* An insn? Same except when printing. */
402 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
405 case 'E': /* An RTX vector? */
406 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
409 case 'b': /* A bitmap? */
410 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
413 case 't': /* A tree? */
414 XTREE (rt_val
, i
) = va_arg (p
, tree
);
423 return rt_val
; /* Return the new RTX... */
426 /* gen_rtvec (n, [rt1, ..., rtn])
428 ** This routine creates an rtvec and stores within it the
429 ** pointers to rtx's which are its arguments.
434 gen_rtvec
VPROTO((int n
, ...))
436 #ifndef ANSI_PROTOTYPES
445 #ifndef ANSI_PROTOTYPES
450 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
452 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
454 for (i
= 0; i
< n
; i
++)
455 vector
[i
] = va_arg (p
, rtx
);
458 return gen_rtvec_v (n
, vector
);
462 gen_rtvec_v (n
, argp
)
467 register rtvec rt_val
;
470 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
472 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
474 for (i
= 0; i
< n
; i
++)
475 rt_val
->elem
[i
].rtx
= *argp
++;
481 gen_rtvec_vv (n
, argp
)
486 register rtvec rt_val
;
489 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
491 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
493 for (i
= 0; i
< n
; i
++)
494 rt_val
->elem
[i
].rtx
= (argp
++)->rtx
;
499 /* Generate a REG rtx for a new pseudo register of mode MODE.
500 This pseudo is assigned the next sequential register number. */
504 enum machine_mode mode
;
508 /* Don't let anything called after initial flow analysis create new
513 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
514 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
)
516 /* For complex modes, don't make a single pseudo.
517 Instead, make a CONCAT of two pseudos.
518 This allows noncontiguous allocation of the real and imaginary parts,
519 which makes much better code. Besides, allocating DCmode
520 pseudos overstrains reload on some machines like the 386. */
521 rtx realpart
, imagpart
;
522 int size
= GET_MODE_UNIT_SIZE (mode
);
523 enum machine_mode partmode
524 = mode_for_size (size
* BITS_PER_UNIT
,
525 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
526 ? MODE_FLOAT
: MODE_INT
),
529 realpart
= gen_reg_rtx (partmode
);
530 imagpart
= gen_reg_rtx (partmode
);
531 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
534 /* Make sure regno_pointer_flag and regno_reg_rtx are large
535 enough to have an element for this pseudo reg number. */
537 if (reg_rtx_no
== regno_pointer_flag_length
)
541 (char *) savealloc (regno_pointer_flag_length
* 2);
542 bcopy (regno_pointer_flag
, new, regno_pointer_flag_length
);
543 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
544 regno_pointer_flag
= new;
546 new = (char *) savealloc (regno_pointer_flag_length
* 2);
547 bcopy (regno_pointer_align
, new, regno_pointer_flag_length
);
548 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
549 regno_pointer_align
= new;
551 new1
= (rtx
*) savealloc (regno_pointer_flag_length
* 2 * sizeof (rtx
));
552 bcopy ((char *) regno_reg_rtx
, (char *) new1
,
553 regno_pointer_flag_length
* sizeof (rtx
));
554 bzero ((char *) &new1
[regno_pointer_flag_length
],
555 regno_pointer_flag_length
* sizeof (rtx
));
556 regno_reg_rtx
= new1
;
558 regno_pointer_flag_length
*= 2;
561 val
= gen_rtx_raw_REG (mode
, reg_rtx_no
);
562 regno_reg_rtx
[reg_rtx_no
++] = val
;
566 /* Identify REG (which may be a CONCAT) as a user register. */
572 if (GET_CODE (reg
) == CONCAT
)
574 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
575 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
577 else if (GET_CODE (reg
) == REG
)
578 REG_USERVAR_P (reg
) = 1;
583 /* Identify REG as a probable pointer register and show its alignment
584 as ALIGN, if nonzero. */
587 mark_reg_pointer (reg
, align
)
591 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
594 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
597 /* Return 1 plus largest pseudo reg number used in the current function. */
605 /* Return 1 + the largest label number used so far in the current function. */
610 if (last_label_num
&& label_num
== base_label_num
)
611 return last_label_num
;
615 /* Return first label number used in this function (if any were used). */
618 get_first_label_num ()
620 return first_label_num
;
623 /* Return a value representing some low-order bits of X, where the number
624 of low-order bits is given by MODE. Note that no conversion is done
625 between floating-point and fixed-point values, rather, the bit
626 representation is returned.
628 This function handles the cases in common between gen_lowpart, below,
629 and two variants in cse.c and combine.c. These are the cases that can
630 be safely handled at all points in the compilation.
632 If this is not a case we can handle, return 0. */
635 gen_lowpart_common (mode
, x
)
636 enum machine_mode mode
;
641 if (GET_MODE (x
) == mode
)
644 /* MODE must occupy no more words than the mode of X. */
645 if (GET_MODE (x
) != VOIDmode
646 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
647 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
651 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
652 word
= ((GET_MODE_SIZE (GET_MODE (x
))
653 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
656 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
657 && (GET_MODE_CLASS (mode
) == MODE_INT
658 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
660 /* If we are getting the low-order part of something that has been
661 sign- or zero-extended, we can either just use the object being
662 extended or make a narrower extension. If we want an even smaller
663 piece than the size of the object being extended, call ourselves
666 This case is used mostly by combine and cse. */
668 if (GET_MODE (XEXP (x
, 0)) == mode
)
670 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
671 return gen_lowpart_common (mode
, XEXP (x
, 0));
672 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
673 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
675 else if (GET_CODE (x
) == SUBREG
676 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
677 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
678 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
680 : gen_rtx_SUBREG (mode
, SUBREG_REG (x
), SUBREG_WORD (x
) + word
));
681 else if (GET_CODE (x
) == REG
)
683 /* Let the backend decide how many registers to skip. This is needed
684 in particular for Sparc64 where fp regs are smaller than a word. */
685 /* ??? Note that subregs are now ambiguous, in that those against
686 pseudos are sized by the Word Size, while those against hard
687 regs are sized by the underlying register size. Better would be
688 to always interpret the subreg offset parameter as bytes or bits. */
690 if (WORDS_BIG_ENDIAN
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
691 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
692 - HARD_REGNO_NREGS (REGNO (x
), mode
));
694 /* If the register is not valid for MODE, return 0. If we don't
695 do this, there is no way to fix up the resulting REG later.
696 But we do do this if the current REG is not valid for its
697 mode. This latter is a kludge, but is required due to the
698 way that parameters are passed on some machines, most
700 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
701 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
702 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
704 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
705 /* integrate.c can't handle parts of a return value register. */
706 && (! REG_FUNCTION_VALUE_P (x
)
707 || ! rtx_equal_function_value_matters
)
708 #ifdef CLASS_CANNOT_CHANGE_SIZE
709 && ! (GET_MODE_SIZE (mode
) != GET_MODE_SIZE (GET_MODE (x
))
710 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_INT
711 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_FLOAT
712 && (TEST_HARD_REG_BIT
713 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
716 /* We want to keep the stack, frame, and arg pointers
718 && x
!= frame_pointer_rtx
719 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
720 && x
!= arg_pointer_rtx
722 && x
!= stack_pointer_rtx
)
723 return gen_rtx_REG (mode
, REGNO (x
) + word
);
725 return gen_rtx_SUBREG (mode
, x
, word
);
727 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
728 from the low-order part of the constant. */
729 else if ((GET_MODE_CLASS (mode
) == MODE_INT
730 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
731 && GET_MODE (x
) == VOIDmode
732 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
734 /* If MODE is twice the host word size, X is already the desired
735 representation. Otherwise, if MODE is wider than a word, we can't
736 do this. If MODE is exactly a word, return just one CONST_INT.
737 If MODE is smaller than a word, clear the bits that don't belong
738 in our mode, unless they and our sign bit are all one. So we get
739 either a reasonable negative value or a reasonable unsigned value
742 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
744 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
746 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
747 return (GET_CODE (x
) == CONST_INT
? x
748 : GEN_INT (CONST_DOUBLE_LOW (x
)));
751 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
752 int width
= GET_MODE_BITSIZE (mode
);
753 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
754 : CONST_DOUBLE_LOW (x
));
756 /* Sign extend to HOST_WIDE_INT. */
757 val
= val
<< (HOST_BITS_PER_WIDE_INT
- width
) >> (HOST_BITS_PER_WIDE_INT
- width
);
759 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
764 /* If X is an integral constant but we want it in floating-point, it
765 must be the case that we have a union of an integer and a floating-point
766 value. If the machine-parameters allow it, simulate that union here
767 and return the result. The two-word and single-word cases are
770 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
771 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
772 || flag_pretend_float
)
773 && GET_MODE_CLASS (mode
) == MODE_FLOAT
774 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
775 && GET_CODE (x
) == CONST_INT
776 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
777 #ifdef REAL_ARITHMETIC
783 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
784 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
788 union {HOST_WIDE_INT i
; float d
; } u
;
791 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
794 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
795 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
796 || flag_pretend_float
)
797 && GET_MODE_CLASS (mode
) == MODE_FLOAT
798 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
799 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
800 && GET_MODE (x
) == VOIDmode
801 && (sizeof (double) * HOST_BITS_PER_CHAR
802 == 2 * HOST_BITS_PER_WIDE_INT
))
803 #ifdef REAL_ARITHMETIC
807 HOST_WIDE_INT low
, high
;
809 if (GET_CODE (x
) == CONST_INT
)
810 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
812 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
814 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
816 if (WORDS_BIG_ENDIAN
)
817 i
[0] = high
, i
[1] = low
;
819 i
[0] = low
, i
[1] = high
;
821 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
822 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
826 union {HOST_WIDE_INT i
[2]; double d
; } u
;
827 HOST_WIDE_INT low
, high
;
829 if (GET_CODE (x
) == CONST_INT
)
830 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
832 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
834 #ifdef HOST_WORDS_BIG_ENDIAN
835 u
.i
[0] = high
, u
.i
[1] = low
;
837 u
.i
[0] = low
, u
.i
[1] = high
;
840 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
844 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
845 same as sizeof (double) or when sizeof (float) is larger than the
846 size of a word on the target machine. */
847 #ifdef REAL_ARITHMETIC
848 else if (mode
== SFmode
&& GET_CODE (x
) == CONST_INT
)
854 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
855 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
859 /* Similarly, if this is converting a floating-point value into a
860 single-word integer. Only do this is the host and target parameters are
863 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
864 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
865 || flag_pretend_float
)
866 && (GET_MODE_CLASS (mode
) == MODE_INT
867 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
868 && GET_CODE (x
) == CONST_DOUBLE
869 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
870 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
871 return operand_subword (x
, word
, 0, GET_MODE (x
));
873 /* Similarly, if this is converting a floating-point value into a
874 two-word integer, we can do this one word at a time and make an
875 integer. Only do this is the host and target parameters are
878 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
879 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
880 || flag_pretend_float
)
881 && (GET_MODE_CLASS (mode
) == MODE_INT
882 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
883 && GET_CODE (x
) == CONST_DOUBLE
884 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
885 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
888 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
890 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
892 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
893 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
894 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
897 /* Otherwise, we can't do this. */
901 /* Return the real part (which has mode MODE) of a complex value X.
902 This always comes at the low address in memory. */
905 gen_realpart (mode
, x
)
906 enum machine_mode mode
;
909 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
911 else if (WORDS_BIG_ENDIAN
)
912 return gen_highpart (mode
, x
);
914 return gen_lowpart (mode
, x
);
917 /* Return the imaginary part (which has mode MODE) of a complex value X.
918 This always comes at the high address in memory. */
921 gen_imagpart (mode
, x
)
922 enum machine_mode mode
;
925 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
927 else if (WORDS_BIG_ENDIAN
)
928 return gen_lowpart (mode
, x
);
930 return gen_highpart (mode
, x
);
933 /* Return 1 iff X, assumed to be a SUBREG,
934 refers to the real part of the complex value in its containing reg.
935 Complex values are always stored with the real part in the first word,
936 regardless of WORDS_BIG_ENDIAN. */
939 subreg_realpart_p (x
)
942 if (GET_CODE (x
) != SUBREG
)
945 return SUBREG_WORD (x
) * UNITS_PER_WORD
< GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
)));
948 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
949 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
950 least-significant part of X.
951 MODE specifies how big a part of X to return;
952 it usually should not be larger than a word.
953 If X is a MEM whose address is a QUEUED, the value may be so also. */
956 gen_lowpart (mode
, x
)
957 enum machine_mode mode
;
960 rtx result
= gen_lowpart_common (mode
, x
);
964 else if (GET_CODE (x
) == REG
)
966 /* Must be a hard reg that's not valid in MODE. */
967 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
972 else if (GET_CODE (x
) == MEM
)
974 /* The only additional case we can do is MEM. */
975 register int offset
= 0;
976 if (WORDS_BIG_ENDIAN
)
977 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
978 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
980 if (BYTES_BIG_ENDIAN
)
981 /* Adjust the address so that the address-after-the-data
983 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
984 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
986 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
988 else if (GET_CODE (x
) == ADDRESSOF
)
989 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
994 /* Like `gen_lowpart', but refer to the most significant part.
995 This is used to access the imaginary part of a complex number. */
998 gen_highpart (mode
, x
)
999 enum machine_mode mode
;
1002 /* This case loses if X is a subreg. To catch bugs early,
1003 complain if an invalid MODE is used even in other cases. */
1004 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1005 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1007 if (GET_CODE (x
) == CONST_DOUBLE
1008 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1009 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
1012 return GEN_INT (CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
1013 else if (GET_CODE (x
) == CONST_INT
)
1015 if (HOST_BITS_PER_WIDE_INT
<= BITS_PER_WORD
)
1017 return GEN_INT (INTVAL (x
) >> (HOST_BITS_PER_WIDE_INT
- BITS_PER_WORD
));
1019 else if (GET_CODE (x
) == MEM
)
1021 register int offset
= 0;
1022 if (! WORDS_BIG_ENDIAN
)
1023 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1024 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1026 if (! BYTES_BIG_ENDIAN
1027 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
1028 offset
-= (GET_MODE_SIZE (mode
)
1029 - MIN (UNITS_PER_WORD
,
1030 GET_MODE_SIZE (GET_MODE (x
))));
1032 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1034 else if (GET_CODE (x
) == SUBREG
)
1036 /* The only time this should occur is when we are looking at a
1037 multi-word item with a SUBREG whose mode is the same as that of the
1038 item. It isn't clear what we would do if it wasn't. */
1039 if (SUBREG_WORD (x
) != 0)
1041 return gen_highpart (mode
, SUBREG_REG (x
));
1043 else if (GET_CODE (x
) == REG
)
1047 /* Let the backend decide how many registers to skip. This is needed
1048 in particular for sparc64 where fp regs are smaller than a word. */
1049 /* ??? Note that subregs are now ambiguous, in that those against
1050 pseudos are sized by the word size, while those against hard
1051 regs are sized by the underlying register size. Better would be
1052 to always interpret the subreg offset parameter as bytes or bits. */
1054 if (WORDS_BIG_ENDIAN
)
1056 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1057 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
1058 - HARD_REGNO_NREGS (REGNO (x
), mode
));
1060 word
= ((GET_MODE_SIZE (GET_MODE (x
))
1061 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
1064 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
1065 /* integrate.c can't handle parts of a return value register. */
1066 && (! REG_FUNCTION_VALUE_P (x
)
1067 || ! rtx_equal_function_value_matters
)
1068 /* We want to keep the stack, frame, and arg pointers special. */
1069 && x
!= frame_pointer_rtx
1070 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1071 && x
!= arg_pointer_rtx
1073 && x
!= stack_pointer_rtx
)
1074 return gen_rtx_REG (mode
, REGNO (x
) + word
);
1076 return gen_rtx_SUBREG (mode
, x
, word
);
1082 /* Return 1 iff X, assumed to be a SUBREG,
1083 refers to the least significant part of its containing reg.
1084 If X is not a SUBREG, always return 1 (it is its own low part!). */
1087 subreg_lowpart_p (x
)
1090 if (GET_CODE (x
) != SUBREG
)
1092 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1095 if (WORDS_BIG_ENDIAN
1096 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1097 return (SUBREG_WORD (x
)
1098 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1099 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1102 return SUBREG_WORD (x
) == 0;
1105 /* Return subword I of operand OP.
1106 The word number, I, is interpreted as the word number starting at the
1107 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1108 otherwise it is the high-order word.
1110 If we cannot extract the required word, we return zero. Otherwise, an
1111 rtx corresponding to the requested word will be returned.
1113 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1114 reload has completed, a valid address will always be returned. After
1115 reload, if a valid address cannot be returned, we return zero.
1117 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1118 it is the responsibility of the caller.
1120 MODE is the mode of OP in case it is a CONST_INT. */
1123 operand_subword (op
, i
, validate_address
, mode
)
1126 int validate_address
;
1127 enum machine_mode mode
;
1130 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1131 int bits_per_word
= BITS_PER_WORD
;
1133 if (mode
== VOIDmode
)
1134 mode
= GET_MODE (op
);
1136 if (mode
== VOIDmode
)
1139 /* If OP is narrower than a word, fail. */
1141 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1144 /* If we want a word outside OP, return zero. */
1146 && (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1149 /* If OP is already an integer word, return it. */
1150 if (GET_MODE_CLASS (mode
) == MODE_INT
1151 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1154 /* If OP is a REG or SUBREG, we can handle it very simply. */
1155 if (GET_CODE (op
) == REG
)
1157 /* If the register is not valid for MODE, return 0. If we don't
1158 do this, there is no way to fix up the resulting REG later. */
1159 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1160 && ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
))
1162 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1163 || (REG_FUNCTION_VALUE_P (op
)
1164 && rtx_equal_function_value_matters
)
1165 /* We want to keep the stack, frame, and arg pointers
1167 || op
== frame_pointer_rtx
1168 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1169 || op
== arg_pointer_rtx
1171 || op
== stack_pointer_rtx
)
1172 return gen_rtx_SUBREG (word_mode
, op
, i
);
1174 return gen_rtx_REG (word_mode
, REGNO (op
) + i
);
1176 else if (GET_CODE (op
) == SUBREG
)
1177 return gen_rtx_SUBREG (word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1178 else if (GET_CODE (op
) == CONCAT
)
1180 int partwords
= GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1182 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1183 return operand_subword (XEXP (op
, 1), i
- partwords
,
1184 validate_address
, mode
);
1187 /* Form a new MEM at the requested address. */
1188 if (GET_CODE (op
) == MEM
)
1190 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1193 if (validate_address
)
1195 if (reload_completed
)
1197 if (! strict_memory_address_p (word_mode
, addr
))
1201 addr
= memory_address (word_mode
, addr
);
1204 new = gen_rtx_MEM (word_mode
, addr
);
1206 MEM_COPY_ATTRIBUTES (new, op
);
1207 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1212 /* The only remaining cases are when OP is a constant. If the host and
1213 target floating formats are the same, handling two-word floating
1214 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1215 are defined as returning one or two 32 bit values, respectively,
1216 and not values of BITS_PER_WORD bits. */
1217 #ifdef REAL_ARITHMETIC
1218 /* The output is some bits, the width of the target machine's word.
1219 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1221 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1222 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1223 && GET_MODE_BITSIZE (mode
) == 64
1224 && GET_CODE (op
) == CONST_DOUBLE
)
1229 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1230 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1232 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1233 which the words are written depends on the word endianness.
1235 ??? This is a potential portability problem and should
1236 be fixed at some point. */
1237 if (BITS_PER_WORD
== 32)
1238 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1239 #if HOST_BITS_PER_WIDE_INT > 32
1240 else if (BITS_PER_WORD
>= 64 && i
== 0)
1241 return GEN_INT ((((HOST_WIDE_INT
) k
[! WORDS_BIG_ENDIAN
]) << 32)
1242 | (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
]);
1244 else if (BITS_PER_WORD
== 16)
1248 if ((i
& 0x1) == !WORDS_BIG_ENDIAN
)
1251 return GEN_INT ((HOST_WIDE_INT
) value
);
1256 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1257 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1258 && GET_MODE_BITSIZE (mode
) > 64
1259 && GET_CODE (op
) == CONST_DOUBLE
)
1264 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1265 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1267 if (BITS_PER_WORD
== 32)
1268 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1270 #else /* no REAL_ARITHMETIC */
1271 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1272 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1273 || flag_pretend_float
)
1274 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1275 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1276 && GET_CODE (op
) == CONST_DOUBLE
)
1278 /* The constant is stored in the host's word-ordering,
1279 but we want to access it in the target's word-ordering. Some
1280 compilers don't like a conditional inside macro args, so we have two
1281 copies of the return. */
1282 #ifdef HOST_WORDS_BIG_ENDIAN
1283 return GEN_INT (i
== WORDS_BIG_ENDIAN
1284 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1286 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1287 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1290 #endif /* no REAL_ARITHMETIC */
1292 /* Single word float is a little harder, since single- and double-word
1293 values often do not have the same high-order bits. We have already
1294 verified that we want the only defined word of the single-word value. */
1295 #ifdef REAL_ARITHMETIC
1296 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1297 && GET_MODE_BITSIZE (mode
) == 32
1298 && GET_CODE (op
) == CONST_DOUBLE
)
1303 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1304 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1306 if (BITS_PER_WORD
== 16)
1308 if ((i
& 0x1) == !WORDS_BIG_ENDIAN
)
1312 return GEN_INT ((HOST_WIDE_INT
) l
);
1315 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1316 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1317 || flag_pretend_float
)
1318 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1319 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1320 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1321 && GET_CODE (op
) == CONST_DOUBLE
)
1324 union {float f
; HOST_WIDE_INT i
; } u
;
1326 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1329 return GEN_INT (u
.i
);
1331 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1332 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1333 || flag_pretend_float
)
1334 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1335 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1336 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1337 && GET_CODE (op
) == CONST_DOUBLE
)
1340 union {double d
; HOST_WIDE_INT i
; } u
;
1342 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1345 return GEN_INT (u
.i
);
1347 #endif /* no REAL_ARITHMETIC */
1349 /* The only remaining cases that we can handle are integers.
1350 Convert to proper endianness now since these cases need it.
1351 At this point, i == 0 means the low-order word.
1353 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1354 in general. However, if OP is (const_int 0), we can just return
1357 if (op
== const0_rtx
)
1360 if (GET_MODE_CLASS (mode
) != MODE_INT
1361 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1362 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1365 if (WORDS_BIG_ENDIAN
)
1366 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1368 /* Find out which word on the host machine this value is in and get
1369 it from the constant. */
1370 val
= (i
/ size_ratio
== 0
1371 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1372 : (GET_CODE (op
) == CONST_INT
1373 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1375 /* Get the value we want into the low bits of val. */
1376 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1377 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
)));
1379 /* Clear the bits that don't belong in our mode, unless they and our sign
1380 bit are all one. So we get either a reasonable negative value or a
1381 reasonable unsigned value for this mode. */
1382 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
1383 && ((val
& ((HOST_WIDE_INT
) (-1) << (bits_per_word
- 1)))
1384 != ((HOST_WIDE_INT
) (-1) << (bits_per_word
- 1))))
1385 val
&= ((HOST_WIDE_INT
) 1 << bits_per_word
) - 1;
1387 /* If this would be an entire word for the target, but is not for
1388 the host, then sign-extend on the host so that the number will look
1389 the same way on the host that it would on the target.
1391 For example, when building a 64 bit alpha hosted 32 bit sparc
1392 targeted compiler, then we want the 32 bit unsigned value -1 to be
1393 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1394 The later confuses the sparc backend. */
1396 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
1397 && (val
& ((HOST_WIDE_INT
) 1 << (bits_per_word
- 1))))
1398 val
|= ((HOST_WIDE_INT
) (-1) << bits_per_word
);
1400 return GEN_INT (val
);
1403 /* Similar to `operand_subword', but never return 0. If we can't extract
1404 the required subword, put OP into a register and try again. If that fails,
1405 abort. We always validate the address in this case. It is not valid
1406 to call this function after reload; it is mostly meant for RTL
1409 MODE is the mode of OP, in case it is CONST_INT. */
1412 operand_subword_force (op
, i
, mode
)
1415 enum machine_mode mode
;
1417 rtx result
= operand_subword (op
, i
, 1, mode
);
1422 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1424 /* If this is a register which can not be accessed by words, copy it
1425 to a pseudo register. */
1426 if (GET_CODE (op
) == REG
)
1427 op
= copy_to_reg (op
);
1429 op
= force_reg (mode
, op
);
1432 result
= operand_subword (op
, i
, 1, mode
);
1439 /* Given a compare instruction, swap the operands.
1440 A test instruction is changed into a compare of 0 against the operand. */
1443 reverse_comparison (insn
)
1446 rtx body
= PATTERN (insn
);
1449 if (GET_CODE (body
) == SET
)
1450 comp
= SET_SRC (body
);
1452 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1454 if (GET_CODE (comp
) == COMPARE
)
1456 rtx op0
= XEXP (comp
, 0);
1457 rtx op1
= XEXP (comp
, 1);
1458 XEXP (comp
, 0) = op1
;
1459 XEXP (comp
, 1) = op0
;
1463 rtx
new = gen_rtx_COMPARE (VOIDmode
, CONST0_RTX (GET_MODE (comp
)), comp
);
1464 if (GET_CODE (body
) == SET
)
1465 SET_SRC (body
) = new;
1467 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1471 /* Return a memory reference like MEMREF, but with its mode changed
1472 to MODE and its address changed to ADDR.
1473 (VOIDmode means don't change the mode.
1474 NULL for ADDR means don't change the address.) */
1477 change_address (memref
, mode
, addr
)
1479 enum machine_mode mode
;
1484 if (GET_CODE (memref
) != MEM
)
1486 if (mode
== VOIDmode
)
1487 mode
= GET_MODE (memref
);
1489 addr
= XEXP (memref
, 0);
1491 /* If reload is in progress or has completed, ADDR must be valid.
1492 Otherwise, we can call memory_address to make it valid. */
1493 if (reload_completed
|| reload_in_progress
)
1495 if (! memory_address_p (mode
, addr
))
1499 addr
= memory_address (mode
, addr
);
1501 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1504 new = gen_rtx_MEM (mode
, addr
);
1505 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref
);
1506 MEM_COPY_ATTRIBUTES (new, memref
);
1510 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1517 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1518 NULL_RTX
, label_num
++, NULL_PTR
);
1520 LABEL_NUSES (label
) = 0;
1524 /* For procedure integration. */
1526 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1527 from a permanent obstack when the opportunity arises. */
1530 gen_inline_header_rtx (first_insn
, first_parm_insn
, first_labelno
,
1531 last_labelno
, max_parm_regnum
, max_regnum
, args_size
,
1532 pops_args
, stack_slots
, forced_labels
, function_flags
,
1533 outgoing_args_size
, original_arg_vector
,
1534 original_decl_initial
, regno_rtx
, regno_flag
,
1535 regno_align
, parm_reg_stack_loc
)
1536 rtx first_insn
, first_parm_insn
;
1537 int first_labelno
, last_labelno
, max_parm_regnum
, max_regnum
, args_size
;
1542 int outgoing_args_size
;
1543 rtvec original_arg_vector
;
1544 rtx original_decl_initial
;
1548 rtvec parm_reg_stack_loc
;
1550 rtx header
= gen_rtx_INLINE_HEADER (VOIDmode
,
1551 cur_insn_uid
++, NULL_RTX
,
1552 first_insn
, first_parm_insn
,
1553 first_labelno
, last_labelno
,
1554 max_parm_regnum
, max_regnum
, args_size
,
1555 pops_args
, stack_slots
, forced_labels
,
1556 function_flags
, outgoing_args_size
,
1557 original_arg_vector
,
1558 original_decl_initial
,
1559 regno_rtx
, regno_flag
, regno_align
,
1560 parm_reg_stack_loc
);
1564 /* Install new pointers to the first and last insns in the chain.
1565 Also, set cur_insn_uid to one higher than the last in use.
1566 Used for an inline-procedure after copying the insn chain. */
1569 set_new_first_and_last_insn (first
, last
)
1578 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1579 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1584 /* Set the range of label numbers found in the current function.
1585 This is used when belatedly compiling an inline function. */
1588 set_new_first_and_last_label_num (first
, last
)
1591 base_label_num
= label_num
;
1592 first_label_num
= first
;
1593 last_label_num
= last
;
1596 /* Save all variables describing the current status into the structure *P.
1597 This is used before starting a nested function. */
1600 save_emit_status (p
)
1603 p
->reg_rtx_no
= reg_rtx_no
;
1604 p
->first_label_num
= first_label_num
;
1605 p
->first_insn
= first_insn
;
1606 p
->last_insn
= last_insn
;
1607 p
->sequence_rtl_expr
= sequence_rtl_expr
;
1608 p
->sequence_stack
= sequence_stack
;
1609 p
->cur_insn_uid
= cur_insn_uid
;
1610 p
->last_linenum
= last_linenum
;
1611 p
->last_filename
= last_filename
;
1612 p
->regno_pointer_flag
= regno_pointer_flag
;
1613 p
->regno_pointer_align
= regno_pointer_align
;
1614 p
->regno_pointer_flag_length
= regno_pointer_flag_length
;
1615 p
->regno_reg_rtx
= regno_reg_rtx
;
1618 /* Restore all variables describing the current status from the structure *P.
1619 This is used after a nested function. */
1622 restore_emit_status (p
)
1627 reg_rtx_no
= p
->reg_rtx_no
;
1628 first_label_num
= p
->first_label_num
;
1630 first_insn
= p
->first_insn
;
1631 last_insn
= p
->last_insn
;
1632 sequence_rtl_expr
= p
->sequence_rtl_expr
;
1633 sequence_stack
= p
->sequence_stack
;
1634 cur_insn_uid
= p
->cur_insn_uid
;
1635 last_linenum
= p
->last_linenum
;
1636 last_filename
= p
->last_filename
;
1637 regno_pointer_flag
= p
->regno_pointer_flag
;
1638 regno_pointer_align
= p
->regno_pointer_align
;
1639 regno_pointer_flag_length
= p
->regno_pointer_flag_length
;
1640 regno_reg_rtx
= p
->regno_reg_rtx
;
1642 /* Clear our cache of rtx expressions for start_sequence and
1644 sequence_element_free_list
= 0;
1645 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
1646 sequence_result
[i
] = 0;
1651 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1652 It does not work to do this twice, because the mark bits set here
1653 are not cleared afterwards. */
1656 unshare_all_rtl (insn
)
1659 for (; insn
; insn
= NEXT_INSN (insn
))
1660 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
1661 || GET_CODE (insn
) == CALL_INSN
)
1663 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1664 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1665 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1668 /* Make sure the addresses of stack slots found outside the insn chain
1669 (such as, in DECL_RTL of a variable) are not shared
1670 with the insn chain.
1672 This special care is necessary when the stack slot MEM does not
1673 actually appear in the insn chain. If it does appear, its address
1674 is unshared from all else at that point. */
1676 copy_rtx_if_shared (stack_slot_list
);
1679 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1680 Recursively does the same for subexpressions. */
1683 copy_rtx_if_shared (orig
)
1686 register rtx x
= orig
;
1688 register enum rtx_code code
;
1689 register char *format_ptr
;
1695 code
= GET_CODE (x
);
1697 /* These types may be freely shared. */
1710 /* SCRATCH must be shared because they represent distinct values. */
1714 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1715 a LABEL_REF, it isn't sharable. */
1716 if (GET_CODE (XEXP (x
, 0)) == PLUS
1717 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1718 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1727 /* The chain of insns is not being copied. */
1731 /* A MEM is allowed to be shared if its address is constant
1732 or is a constant plus one of the special registers. */
1733 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
1734 || XEXP (x
, 0) == virtual_stack_vars_rtx
1735 || XEXP (x
, 0) == virtual_incoming_args_rtx
)
1738 if (GET_CODE (XEXP (x
, 0)) == PLUS
1739 && (XEXP (XEXP (x
, 0), 0) == virtual_stack_vars_rtx
1740 || XEXP (XEXP (x
, 0), 0) == virtual_incoming_args_rtx
)
1741 && CONSTANT_ADDRESS_P (XEXP (XEXP (x
, 0), 1)))
1743 /* This MEM can appear in more than one place,
1744 but its address better not be shared with anything else. */
1746 XEXP (x
, 0) = copy_rtx_if_shared (XEXP (x
, 0));
1756 /* This rtx may not be shared. If it has already been seen,
1757 replace it with a copy of itself. */
1763 copy
= rtx_alloc (code
);
1764 bcopy ((char *) x
, (char *) copy
,
1765 (sizeof (*copy
) - sizeof (copy
->fld
)
1766 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1772 /* Now scan the subexpressions recursively.
1773 We can store any replaced subexpressions directly into X
1774 since we know X is not shared! Any vectors in X
1775 must be copied if X was copied. */
1777 format_ptr
= GET_RTX_FORMAT (code
);
1779 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1781 switch (*format_ptr
++)
1784 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1788 if (XVEC (x
, i
) != NULL
)
1791 int len
= XVECLEN (x
, i
);
1793 if (copied
&& len
> 0)
1794 XVEC (x
, i
) = gen_rtvec_vv (len
, XVEC (x
, i
)->elem
);
1795 for (j
= 0; j
< len
; j
++)
1796 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1804 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1805 to look for shared sub-parts. */
1808 reset_used_flags (x
)
1812 register enum rtx_code code
;
1813 register char *format_ptr
;
1818 code
= GET_CODE (x
);
1820 /* These types may be freely shared so we needn't do any resetting
1841 /* The chain of insns is not being copied. */
1850 format_ptr
= GET_RTX_FORMAT (code
);
1851 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1853 switch (*format_ptr
++)
1856 reset_used_flags (XEXP (x
, i
));
1860 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1861 reset_used_flags (XVECEXP (x
, i
, j
));
1867 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1868 Return X or the rtx for the pseudo reg the value of X was copied into.
1869 OTHER must be valid as a SET_DEST. */
1872 make_safe_from (x
, other
)
1876 switch (GET_CODE (other
))
1879 other
= SUBREG_REG (other
);
1881 case STRICT_LOW_PART
:
1884 other
= XEXP (other
, 0);
1890 if ((GET_CODE (other
) == MEM
1892 && GET_CODE (x
) != REG
1893 && GET_CODE (x
) != SUBREG
)
1894 || (GET_CODE (other
) == REG
1895 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
1896 || reg_mentioned_p (other
, x
))))
1898 rtx temp
= gen_reg_rtx (GET_MODE (x
));
1899 emit_move_insn (temp
, x
);
1905 /* Emission of insns (adding them to the doubly-linked list). */
1907 /* Return the first insn of the current sequence or current function. */
1915 /* Return the last insn emitted in current sequence or current function. */
1923 /* Specify a new insn as the last in the chain. */
1926 set_last_insn (insn
)
1929 if (NEXT_INSN (insn
) != 0)
1934 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1937 get_last_insn_anywhere ()
1939 struct sequence_stack
*stack
;
1942 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
1943 if (stack
->last
!= 0)
1948 /* Return a number larger than any instruction's uid in this function. */
1953 return cur_insn_uid
;
1956 /* Return the next insn. If it is a SEQUENCE, return the first insn
1965 insn
= NEXT_INSN (insn
);
1966 if (insn
&& GET_CODE (insn
) == INSN
1967 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1968 insn
= XVECEXP (PATTERN (insn
), 0, 0);
1974 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1978 previous_insn (insn
)
1983 insn
= PREV_INSN (insn
);
1984 if (insn
&& GET_CODE (insn
) == INSN
1985 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1986 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
1992 /* Return the next insn after INSN that is not a NOTE. This routine does not
1993 look inside SEQUENCEs. */
1996 next_nonnote_insn (insn
)
2001 insn
= NEXT_INSN (insn
);
2002 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2009 /* Return the previous insn before INSN that is not a NOTE. This routine does
2010 not look inside SEQUENCEs. */
2013 prev_nonnote_insn (insn
)
2018 insn
= PREV_INSN (insn
);
2019 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2026 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2027 or 0, if there is none. This routine does not look inside
2031 next_real_insn (insn
)
2036 insn
= NEXT_INSN (insn
);
2037 if (insn
== 0 || GET_CODE (insn
) == INSN
2038 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2045 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2046 or 0, if there is none. This routine does not look inside
2050 prev_real_insn (insn
)
2055 insn
= PREV_INSN (insn
);
2056 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2057 || GET_CODE (insn
) == JUMP_INSN
)
2064 /* Find the next insn after INSN that really does something. This routine
2065 does not look inside SEQUENCEs. Until reload has completed, this is the
2066 same as next_real_insn. */
2069 next_active_insn (insn
)
2074 insn
= NEXT_INSN (insn
);
2076 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2077 || (GET_CODE (insn
) == INSN
2078 && (! reload_completed
2079 || (GET_CODE (PATTERN (insn
)) != USE
2080 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2087 /* Find the last insn before INSN that really does something. This routine
2088 does not look inside SEQUENCEs. Until reload has completed, this is the
2089 same as prev_real_insn. */
2092 prev_active_insn (insn
)
2097 insn
= PREV_INSN (insn
);
2099 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2100 || (GET_CODE (insn
) == INSN
2101 && (! reload_completed
2102 || (GET_CODE (PATTERN (insn
)) != USE
2103 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2110 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2118 insn
= NEXT_INSN (insn
);
2119 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2126 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2134 insn
= PREV_INSN (insn
);
2135 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2143 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2144 and REG_CC_USER notes so we can find it. */
2147 link_cc0_insns (insn
)
2150 rtx user
= next_nonnote_insn (insn
);
2152 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2153 user
= XVECEXP (PATTERN (user
), 0, 0);
2155 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
, REG_NOTES (user
));
2156 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2159 /* Return the next insn that uses CC0 after INSN, which is assumed to
2160 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2161 applied to the result of this function should yield INSN).
2163 Normally, this is simply the next insn. However, if a REG_CC_USER note
2164 is present, it contains the insn that uses CC0.
2166 Return 0 if we can't find the insn. */
2169 next_cc0_user (insn
)
2172 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2175 return XEXP (note
, 0);
2177 insn
= next_nonnote_insn (insn
);
2178 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2179 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2181 if (insn
&& GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2182 && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2188 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2189 note, it is the previous insn. */
2192 prev_cc0_setter (insn
)
2195 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2198 return XEXP (note
, 0);
2200 insn
= prev_nonnote_insn (insn
);
2201 if (! sets_cc0_p (PATTERN (insn
)))
2208 /* Try splitting insns that can be split for better scheduling.
2209 PAT is the pattern which might split.
2210 TRIAL is the insn providing PAT.
2211 LAST is non-zero if we should return the last insn of the sequence produced.
2213 If this routine succeeds in splitting, it returns the first or last
2214 replacement insn depending on the value of LAST. Otherwise, it
2215 returns TRIAL. If the insn to be returned can be split, it will be. */
2218 try_split (pat
, trial
, last
)
2222 rtx before
= PREV_INSN (trial
);
2223 rtx after
= NEXT_INSN (trial
);
2224 rtx seq
= split_insns (pat
, trial
);
2225 int has_barrier
= 0;
2228 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2229 We may need to handle this specially. */
2230 if (after
&& GET_CODE (after
) == BARRIER
)
2233 after
= NEXT_INSN (after
);
2238 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2239 The latter case will normally arise only when being done so that
2240 it, in turn, will be split (SFmode on the 29k is an example). */
2241 if (GET_CODE (seq
) == SEQUENCE
)
2243 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2244 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2245 increment the usage count so we don't delete the label. */
2248 if (GET_CODE (trial
) == JUMP_INSN
)
2249 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2250 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2252 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
2254 if (JUMP_LABEL (trial
))
2255 LABEL_NUSES (JUMP_LABEL (trial
))++;
2258 tem
= emit_insn_after (seq
, before
);
2260 delete_insn (trial
);
2262 emit_barrier_after (tem
);
2264 /* Recursively call try_split for each new insn created; by the
2265 time control returns here that insn will be fully split, so
2266 set LAST and continue from the insn after the one returned.
2267 We can't use next_active_insn here since AFTER may be a note.
2268 Ignore deleted insns, which can be occur if not optimizing. */
2269 for (tem
= NEXT_INSN (before
); tem
!= after
;
2270 tem
= NEXT_INSN (tem
))
2271 if (! INSN_DELETED_P (tem
)
2272 && GET_RTX_CLASS (GET_CODE (tem
)) == 'i')
2273 tem
= try_split (PATTERN (tem
), tem
, 1);
2275 /* Avoid infinite loop if the result matches the original pattern. */
2276 else if (rtx_equal_p (seq
, pat
))
2280 PATTERN (trial
) = seq
;
2281 INSN_CODE (trial
) = -1;
2282 try_split (seq
, trial
, last
);
2285 /* Return either the first or the last insn, depending on which was
2287 return last
? prev_active_insn (after
) : next_active_insn (before
);
2293 /* Make and return an INSN rtx, initializing all its slots.
2294 Store PATTERN in the pattern slots. */
2297 make_insn_raw (pattern
)
2302 /* If in RTL generation phase, see if FREE_INSN can be used. */
2303 if (free_insn
!= 0 && rtx_equal_function_value_matters
)
2306 free_insn
= NEXT_INSN (free_insn
);
2307 PUT_CODE (insn
, INSN
);
2310 insn
= rtx_alloc (INSN
);
2312 INSN_UID (insn
) = cur_insn_uid
++;
2313 PATTERN (insn
) = pattern
;
2314 INSN_CODE (insn
) = -1;
2315 LOG_LINKS (insn
) = NULL
;
2316 REG_NOTES (insn
) = NULL
;
2321 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2324 make_jump_insn_raw (pattern
)
2329 insn
= rtx_alloc (JUMP_INSN
);
2330 INSN_UID (insn
) = cur_insn_uid
++;
2332 PATTERN (insn
) = pattern
;
2333 INSN_CODE (insn
) = -1;
2334 LOG_LINKS (insn
) = NULL
;
2335 REG_NOTES (insn
) = NULL
;
2336 JUMP_LABEL (insn
) = NULL
;
2341 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2344 make_call_insn_raw (pattern
)
2349 insn
= rtx_alloc (CALL_INSN
);
2350 INSN_UID (insn
) = cur_insn_uid
++;
2352 PATTERN (insn
) = pattern
;
2353 INSN_CODE (insn
) = -1;
2354 LOG_LINKS (insn
) = NULL
;
2355 REG_NOTES (insn
) = NULL
;
2356 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2361 /* Add INSN to the end of the doubly-linked list.
2362 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2368 PREV_INSN (insn
) = last_insn
;
2369 NEXT_INSN (insn
) = 0;
2371 if (NULL
!= last_insn
)
2372 NEXT_INSN (last_insn
) = insn
;
2374 if (NULL
== first_insn
)
2380 /* Add INSN into the doubly-linked list after insn AFTER. This and
2381 the next should be the only functions called to insert an insn once
2382 delay slots have been filled since only they know how to update a
2386 add_insn_after (insn
, after
)
2389 rtx next
= NEXT_INSN (after
);
2391 if (optimize
&& INSN_DELETED_P (after
))
2394 NEXT_INSN (insn
) = next
;
2395 PREV_INSN (insn
) = after
;
2399 PREV_INSN (next
) = insn
;
2400 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2401 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2403 else if (last_insn
== after
)
2407 struct sequence_stack
*stack
= sequence_stack
;
2408 /* Scan all pending sequences too. */
2409 for (; stack
; stack
= stack
->next
)
2410 if (after
== stack
->last
)
2420 NEXT_INSN (after
) = insn
;
2421 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2423 rtx sequence
= PATTERN (after
);
2424 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2428 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2429 the previous should be the only functions called to insert an insn once
2430 delay slots have been filled since only they know how to update a
2434 add_insn_before (insn
, before
)
2437 rtx prev
= PREV_INSN (before
);
2439 if (optimize
&& INSN_DELETED_P (before
))
2442 PREV_INSN (insn
) = prev
;
2443 NEXT_INSN (insn
) = before
;
2447 NEXT_INSN (prev
) = insn
;
2448 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2450 rtx sequence
= PATTERN (prev
);
2451 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2454 else if (first_insn
== before
)
2458 struct sequence_stack
*stack
= sequence_stack
;
2459 /* Scan all pending sequences too. */
2460 for (; stack
; stack
= stack
->next
)
2461 if (before
== stack
->first
)
2463 stack
->first
= insn
;
2471 PREV_INSN (before
) = insn
;
2472 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2473 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2476 /* Delete all insns made since FROM.
2477 FROM becomes the new last instruction. */
2480 delete_insns_since (from
)
2486 NEXT_INSN (from
) = 0;
2490 /* This function is deprecated, please use sequences instead.
2492 Move a consecutive bunch of insns to a different place in the chain.
2493 The insns to be moved are those between FROM and TO.
2494 They are moved to a new position after the insn AFTER.
2495 AFTER must not be FROM or TO or any insn in between.
2497 This function does not know about SEQUENCEs and hence should not be
2498 called after delay-slot filling has been done. */
2501 reorder_insns (from
, to
, after
)
2502 rtx from
, to
, after
;
2504 /* Splice this bunch out of where it is now. */
2505 if (PREV_INSN (from
))
2506 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2508 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2509 if (last_insn
== to
)
2510 last_insn
= PREV_INSN (from
);
2511 if (first_insn
== from
)
2512 first_insn
= NEXT_INSN (to
);
2514 /* Make the new neighbors point to it and it to them. */
2515 if (NEXT_INSN (after
))
2516 PREV_INSN (NEXT_INSN (after
)) = to
;
2518 NEXT_INSN (to
) = NEXT_INSN (after
);
2519 PREV_INSN (from
) = after
;
2520 NEXT_INSN (after
) = from
;
2521 if (after
== last_insn
)
2525 /* Return the line note insn preceding INSN. */
2528 find_line_note (insn
)
2531 if (no_line_numbers
)
2534 for (; insn
; insn
= PREV_INSN (insn
))
2535 if (GET_CODE (insn
) == NOTE
2536 && NOTE_LINE_NUMBER (insn
) >= 0)
2542 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2543 of the moved insns when debugging. This may insert a note between AFTER
2544 and FROM, and another one after TO. */
2547 reorder_insns_with_line_notes (from
, to
, after
)
2548 rtx from
, to
, after
;
2550 rtx from_line
= find_line_note (from
);
2551 rtx after_line
= find_line_note (after
);
2553 reorder_insns (from
, to
, after
);
2555 if (from_line
== after_line
)
2559 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2560 NOTE_LINE_NUMBER (from_line
),
2563 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2564 NOTE_LINE_NUMBER (after_line
),
2568 /* Emit an insn of given code and pattern
2569 at a specified place within the doubly-linked list. */
2571 /* Make an instruction with body PATTERN
2572 and output it before the instruction BEFORE. */
2575 emit_insn_before (pattern
, before
)
2576 register rtx pattern
, before
;
2578 register rtx insn
= before
;
2580 if (GET_CODE (pattern
) == SEQUENCE
)
2584 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2586 insn
= XVECEXP (pattern
, 0, i
);
2587 add_insn_before (insn
, before
);
2589 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2590 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2594 insn
= make_insn_raw (pattern
);
2595 add_insn_before (insn
, before
);
2601 /* Make an instruction with body PATTERN and code JUMP_INSN
2602 and output it before the instruction BEFORE. */
2605 emit_jump_insn_before (pattern
, before
)
2606 register rtx pattern
, before
;
2610 if (GET_CODE (pattern
) == SEQUENCE
)
2611 insn
= emit_insn_before (pattern
, before
);
2614 insn
= make_jump_insn_raw (pattern
);
2615 add_insn_before (insn
, before
);
2621 /* Make an instruction with body PATTERN and code CALL_INSN
2622 and output it before the instruction BEFORE. */
2625 emit_call_insn_before (pattern
, before
)
2626 register rtx pattern
, before
;
2630 if (GET_CODE (pattern
) == SEQUENCE
)
2631 insn
= emit_insn_before (pattern
, before
);
2634 insn
= make_call_insn_raw (pattern
);
2635 add_insn_before (insn
, before
);
2636 PUT_CODE (insn
, CALL_INSN
);
2642 /* Make an insn of code BARRIER
2643 and output it before the insn AFTER. */
2646 emit_barrier_before (before
)
2647 register rtx before
;
2649 register rtx insn
= rtx_alloc (BARRIER
);
2651 INSN_UID (insn
) = cur_insn_uid
++;
2653 add_insn_before (insn
, before
);
2657 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2660 emit_note_before (subtype
, before
)
2664 register rtx note
= rtx_alloc (NOTE
);
2665 INSN_UID (note
) = cur_insn_uid
++;
2666 NOTE_SOURCE_FILE (note
) = 0;
2667 NOTE_LINE_NUMBER (note
) = subtype
;
2669 add_insn_before (note
, before
);
2673 /* Make an insn of code INSN with body PATTERN
2674 and output it after the insn AFTER. */
2677 emit_insn_after (pattern
, after
)
2678 register rtx pattern
, after
;
2680 register rtx insn
= after
;
2682 if (GET_CODE (pattern
) == SEQUENCE
)
2686 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2688 insn
= XVECEXP (pattern
, 0, i
);
2689 add_insn_after (insn
, after
);
2692 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2693 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2697 insn
= make_insn_raw (pattern
);
2698 add_insn_after (insn
, after
);
2704 /* Similar to emit_insn_after, except that line notes are to be inserted so
2705 as to act as if this insn were at FROM. */
2708 emit_insn_after_with_line_notes (pattern
, after
, from
)
2709 rtx pattern
, after
, from
;
2711 rtx from_line
= find_line_note (from
);
2712 rtx after_line
= find_line_note (after
);
2713 rtx insn
= emit_insn_after (pattern
, after
);
2716 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2717 NOTE_LINE_NUMBER (from_line
),
2721 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2722 NOTE_LINE_NUMBER (after_line
),
2726 /* Make an insn of code JUMP_INSN with body PATTERN
2727 and output it after the insn AFTER. */
2730 emit_jump_insn_after (pattern
, after
)
2731 register rtx pattern
, after
;
2735 if (GET_CODE (pattern
) == SEQUENCE
)
2736 insn
= emit_insn_after (pattern
, after
);
2739 insn
= make_jump_insn_raw (pattern
);
2740 add_insn_after (insn
, after
);
2746 /* Make an insn of code BARRIER
2747 and output it after the insn AFTER. */
2750 emit_barrier_after (after
)
2753 register rtx insn
= rtx_alloc (BARRIER
);
2755 INSN_UID (insn
) = cur_insn_uid
++;
2757 add_insn_after (insn
, after
);
2761 /* Emit the label LABEL after the insn AFTER. */
2764 emit_label_after (label
, after
)
2767 /* This can be called twice for the same label
2768 as a result of the confusion that follows a syntax error!
2769 So make it harmless. */
2770 if (INSN_UID (label
) == 0)
2772 INSN_UID (label
) = cur_insn_uid
++;
2773 add_insn_after (label
, after
);
2779 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2782 emit_note_after (subtype
, after
)
2786 register rtx note
= rtx_alloc (NOTE
);
2787 INSN_UID (note
) = cur_insn_uid
++;
2788 NOTE_SOURCE_FILE (note
) = 0;
2789 NOTE_LINE_NUMBER (note
) = subtype
;
2790 add_insn_after (note
, after
);
2794 /* Emit a line note for FILE and LINE after the insn AFTER. */
2797 emit_line_note_after (file
, line
, after
)
2804 if (no_line_numbers
&& line
> 0)
2810 note
= rtx_alloc (NOTE
);
2811 INSN_UID (note
) = cur_insn_uid
++;
2812 NOTE_SOURCE_FILE (note
) = file
;
2813 NOTE_LINE_NUMBER (note
) = line
;
2814 add_insn_after (note
, after
);
2818 /* Make an insn of code INSN with pattern PATTERN
2819 and add it to the end of the doubly-linked list.
2820 If PATTERN is a SEQUENCE, take the elements of it
2821 and emit an insn for each element.
2823 Returns the last insn emitted. */
2829 rtx insn
= last_insn
;
2831 if (GET_CODE (pattern
) == SEQUENCE
)
2835 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2837 insn
= XVECEXP (pattern
, 0, i
);
2840 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2841 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2845 insn
= make_insn_raw (pattern
);
2852 /* Emit the insns in a chain starting with INSN.
2853 Return the last insn emitted. */
2863 rtx next
= NEXT_INSN (insn
);
2872 /* Emit the insns in a chain starting with INSN and place them in front of
2873 the insn BEFORE. Return the last insn emitted. */
2876 emit_insns_before (insn
, before
)
2884 rtx next
= NEXT_INSN (insn
);
2885 add_insn_before (insn
, before
);
2893 /* Emit the insns in a chain starting with FIRST and place them in back of
2894 the insn AFTER. Return the last insn emitted. */
2897 emit_insns_after (first
, after
)
2902 register rtx after_after
;
2910 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
2913 after_after
= NEXT_INSN (after
);
2915 NEXT_INSN (after
) = first
;
2916 PREV_INSN (first
) = after
;
2917 NEXT_INSN (last
) = after_after
;
2919 PREV_INSN (after_after
) = last
;
2921 if (after
== last_insn
)
2926 /* Make an insn of code JUMP_INSN with pattern PATTERN
2927 and add it to the end of the doubly-linked list. */
2930 emit_jump_insn (pattern
)
2933 if (GET_CODE (pattern
) == SEQUENCE
)
2934 return emit_insn (pattern
);
2937 register rtx insn
= make_jump_insn_raw (pattern
);
2943 /* Make an insn of code CALL_INSN with pattern PATTERN
2944 and add it to the end of the doubly-linked list. */
2947 emit_call_insn (pattern
)
2950 if (GET_CODE (pattern
) == SEQUENCE
)
2951 return emit_insn (pattern
);
2954 register rtx insn
= make_call_insn_raw (pattern
);
2956 PUT_CODE (insn
, CALL_INSN
);
2961 /* Add the label LABEL to the end of the doubly-linked list. */
2967 /* This can be called twice for the same label
2968 as a result of the confusion that follows a syntax error!
2969 So make it harmless. */
2970 if (INSN_UID (label
) == 0)
2972 INSN_UID (label
) = cur_insn_uid
++;
2978 /* Make an insn of code BARRIER
2979 and add it to the end of the doubly-linked list. */
2984 register rtx barrier
= rtx_alloc (BARRIER
);
2985 INSN_UID (barrier
) = cur_insn_uid
++;
2990 /* Make an insn of code NOTE
2991 with data-fields specified by FILE and LINE
2992 and add it to the end of the doubly-linked list,
2993 but only if line-numbers are desired for debugging info. */
2996 emit_line_note (file
, line
)
3000 emit_filename
= file
;
3004 if (no_line_numbers
)
3008 return emit_note (file
, line
);
3011 /* Make an insn of code NOTE
3012 with data-fields specified by FILE and LINE
3013 and add it to the end of the doubly-linked list.
3014 If it is a line-number NOTE, omit it if it matches the previous one. */
3017 emit_note (file
, line
)
3025 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3026 && line
== last_linenum
)
3028 last_filename
= file
;
3029 last_linenum
= line
;
3032 if (no_line_numbers
&& line
> 0)
3038 note
= rtx_alloc (NOTE
);
3039 INSN_UID (note
) = cur_insn_uid
++;
3040 NOTE_SOURCE_FILE (note
) = file
;
3041 NOTE_LINE_NUMBER (note
) = line
;
3046 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3049 emit_line_note_force (file
, line
)
3054 return emit_line_note (file
, line
);
3057 /* Cause next statement to emit a line note even if the line number
3058 has not changed. This is used at the beginning of a function. */
3061 force_next_line_note ()
3066 /* Return an indication of which type of insn should have X as a body.
3067 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3073 if (GET_CODE (x
) == CODE_LABEL
)
3075 if (GET_CODE (x
) == CALL
)
3077 if (GET_CODE (x
) == RETURN
)
3079 if (GET_CODE (x
) == SET
)
3081 if (SET_DEST (x
) == pc_rtx
)
3083 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3088 if (GET_CODE (x
) == PARALLEL
)
3091 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3092 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3094 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3095 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3097 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3098 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3104 /* Emit the rtl pattern X as an appropriate kind of insn.
3105 If X is a label, it is simply added into the insn chain. */
3111 enum rtx_code code
= classify_insn (x
);
3113 if (code
== CODE_LABEL
)
3114 return emit_label (x
);
3115 else if (code
== INSN
)
3116 return emit_insn (x
);
3117 else if (code
== JUMP_INSN
)
3119 register rtx insn
= emit_jump_insn (x
);
3120 if (simplejump_p (insn
) || GET_CODE (x
) == RETURN
)
3121 return emit_barrier ();
3124 else if (code
== CALL_INSN
)
3125 return emit_call_insn (x
);
3130 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3135 struct sequence_stack
*tem
;
3137 if (sequence_element_free_list
)
3139 /* Reuse a previously-saved struct sequence_stack. */
3140 tem
= sequence_element_free_list
;
3141 sequence_element_free_list
= tem
->next
;
3144 tem
= (struct sequence_stack
*) permalloc (sizeof (struct sequence_stack
));
3146 tem
->next
= sequence_stack
;
3147 tem
->first
= first_insn
;
3148 tem
->last
= last_insn
;
3149 tem
->sequence_rtl_expr
= sequence_rtl_expr
;
3151 sequence_stack
= tem
;
3157 /* Similarly, but indicate that this sequence will be placed in
3161 start_sequence_for_rtl_expr (t
)
3166 sequence_rtl_expr
= t
;
3169 /* Set up the insn chain starting with FIRST
3170 as the current sequence, saving the previously current one. */
3173 push_to_sequence (first
)
3180 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3186 /* Set up the outer-level insn chain
3187 as the current sequence, saving the previously current one. */
3190 push_topmost_sequence ()
3192 struct sequence_stack
*stack
, *top
= NULL
;
3196 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3199 first_insn
= top
->first
;
3200 last_insn
= top
->last
;
3201 sequence_rtl_expr
= top
->sequence_rtl_expr
;
3204 /* After emitting to the outer-level insn chain, update the outer-level
3205 insn chain, and restore the previous saved state. */
3208 pop_topmost_sequence ()
3210 struct sequence_stack
*stack
, *top
= NULL
;
3212 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3215 top
->first
= first_insn
;
3216 top
->last
= last_insn
;
3217 /* ??? Why don't we save sequence_rtl_expr here? */
3222 /* After emitting to a sequence, restore previous saved state.
3224 To get the contents of the sequence just made,
3225 you must call `gen_sequence' *before* calling here. */
3230 struct sequence_stack
*tem
= sequence_stack
;
3232 first_insn
= tem
->first
;
3233 last_insn
= tem
->last
;
3234 sequence_rtl_expr
= tem
->sequence_rtl_expr
;
3235 sequence_stack
= tem
->next
;
3237 tem
->next
= sequence_element_free_list
;
3238 sequence_element_free_list
= tem
;
3241 /* Return 1 if currently emitting into a sequence. */
3246 return sequence_stack
!= 0;
3249 /* Generate a SEQUENCE rtx containing the insns already emitted
3250 to the current sequence.
3252 This is how the gen_... function from a DEFINE_EXPAND
3253 constructs the SEQUENCE that it returns. */
3263 /* Count the insns in the chain. */
3265 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3268 /* If only one insn, return its pattern rather than a SEQUENCE.
3269 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3270 the case of an empty list.) */
3272 && ! RTX_FRAME_RELATED_P (first_insn
)
3273 && (GET_CODE (first_insn
) == INSN
3274 || GET_CODE (first_insn
) == JUMP_INSN
3275 /* Don't discard the call usage field. */
3276 || (GET_CODE (first_insn
) == CALL_INSN
3277 && CALL_INSN_FUNCTION_USAGE (first_insn
) == NULL_RTX
)))
3279 NEXT_INSN (first_insn
) = free_insn
;
3280 free_insn
= first_insn
;
3281 return PATTERN (first_insn
);
3284 /* Put them in a vector. See if we already have a SEQUENCE of the
3285 appropriate length around. */
3286 if (len
< SEQUENCE_RESULT_SIZE
&& (result
= sequence_result
[len
]) != 0)
3287 sequence_result
[len
] = 0;
3290 /* Ensure that this rtl goes in saveable_obstack, since we may
3292 push_obstacks_nochange ();
3293 rtl_in_saveable_obstack ();
3294 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3298 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3299 XVECEXP (result
, 0, i
) = tem
;
3304 /* Put the various virtual registers into REGNO_REG_RTX. */
3307 init_virtual_regs ()
3309 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3310 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3311 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3312 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3313 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3316 /* Initialize data structures and variables in this file
3317 before generating rtl for each function. */
3326 sequence_rtl_expr
= NULL
;
3328 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3331 first_label_num
= label_num
;
3333 sequence_stack
= NULL
;
3335 /* Clear the start_sequence/gen_sequence cache. */
3336 sequence_element_free_list
= 0;
3337 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3338 sequence_result
[i
] = 0;
3341 /* Init the tables that describe all the pseudo regs. */
3343 regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
3346 = (char *) savealloc (regno_pointer_flag_length
);
3347 bzero (regno_pointer_flag
, regno_pointer_flag_length
);
3350 = (char *) savealloc (regno_pointer_flag_length
);
3351 bzero (regno_pointer_align
, regno_pointer_flag_length
);
3354 = (rtx
*) savealloc (regno_pointer_flag_length
* sizeof (rtx
));
3355 bzero ((char *) regno_reg_rtx
, regno_pointer_flag_length
* sizeof (rtx
));
3357 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3358 init_virtual_regs ();
3360 /* Indicate that the virtual registers and stack locations are
3362 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
3363 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
3364 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM
) = 1;
3365 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
3367 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
3368 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
3369 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
3370 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
3371 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM
) = 1;
3373 #ifdef STACK_BOUNDARY
3374 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3375 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3376 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
)
3377 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3378 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3380 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
)
3381 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3382 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
)
3383 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3384 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
)
3385 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3386 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
)
3387 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3388 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = UNITS_PER_WORD
;
3391 #ifdef INIT_EXPANDERS
3396 /* Create some permanent unique rtl objects shared between all functions.
3397 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3400 init_emit_once (line_numbers
)
3404 enum machine_mode mode
;
3405 enum machine_mode double_mode
;
3407 no_line_numbers
= ! line_numbers
;
3409 sequence_stack
= NULL
;
3411 /* Compute the word and byte modes. */
3413 byte_mode
= VOIDmode
;
3414 word_mode
= VOIDmode
;
3415 double_mode
= VOIDmode
;
3417 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3418 mode
= GET_MODE_WIDER_MODE (mode
))
3420 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
3421 && byte_mode
== VOIDmode
)
3424 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
3425 && word_mode
== VOIDmode
)
3429 #ifndef DOUBLE_TYPE_SIZE
3430 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3433 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3434 mode
= GET_MODE_WIDER_MODE (mode
))
3436 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
3437 && double_mode
== VOIDmode
)
3441 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
3443 /* Create the unique rtx's for certain rtx codes and operand values. */
3445 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
3447 PUT_CODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], CONST_INT
);
3448 PUT_MODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], VOIDmode
);
3449 INTVAL (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
]) = i
;
3452 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
3453 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
3454 const_true_rtx
= &const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
3456 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
3458 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
3459 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
3460 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
3461 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
3463 for (i
= 0; i
<= 2; i
++)
3465 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3466 mode
= GET_MODE_WIDER_MODE (mode
))
3468 rtx tem
= rtx_alloc (CONST_DOUBLE
);
3469 union real_extract u
;
3471 bzero ((char *) &u
, sizeof u
); /* Zero any holes in a structure. */
3472 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
3474 bcopy ((char *) &u
, (char *) &CONST_DOUBLE_LOW (tem
), sizeof u
);
3475 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
3476 PUT_MODE (tem
, mode
);
3478 const_tiny_rtx
[i
][(int) mode
] = tem
;
3481 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
3483 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3484 mode
= GET_MODE_WIDER_MODE (mode
))
3485 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3487 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
3489 mode
= GET_MODE_WIDER_MODE (mode
))
3490 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3493 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_CC
); mode
!= VOIDmode
;
3494 mode
= GET_MODE_WIDER_MODE (mode
))
3495 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
3498 /* Assign register numbers to the globally defined register rtx.
3499 This must be done at runtime because the register number field
3500 is in a union and some compilers can't initialize unions. */
3502 REGNO (stack_pointer_rtx
) = STACK_POINTER_REGNUM
;
3503 PUT_MODE (stack_pointer_rtx
, Pmode
);
3504 REGNO (frame_pointer_rtx
) = FRAME_POINTER_REGNUM
;
3505 PUT_MODE (frame_pointer_rtx
, Pmode
);
3506 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3507 REGNO (hard_frame_pointer_rtx
) = HARD_FRAME_POINTER_REGNUM
;
3508 PUT_MODE (hard_frame_pointer_rtx
, Pmode
);
3510 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3511 REGNO (arg_pointer_rtx
) = ARG_POINTER_REGNUM
;
3512 PUT_MODE (arg_pointer_rtx
, Pmode
);
3515 REGNO (virtual_incoming_args_rtx
) = VIRTUAL_INCOMING_ARGS_REGNUM
;
3516 PUT_MODE (virtual_incoming_args_rtx
, Pmode
);
3517 REGNO (virtual_stack_vars_rtx
) = VIRTUAL_STACK_VARS_REGNUM
;
3518 PUT_MODE (virtual_stack_vars_rtx
, Pmode
);
3519 REGNO (virtual_stack_dynamic_rtx
) = VIRTUAL_STACK_DYNAMIC_REGNUM
;
3520 PUT_MODE (virtual_stack_dynamic_rtx
, Pmode
);
3521 REGNO (virtual_outgoing_args_rtx
) = VIRTUAL_OUTGOING_ARGS_REGNUM
;
3522 PUT_MODE (virtual_outgoing_args_rtx
, Pmode
);
3523 REGNO (virtual_cfa_rtx
) = VIRTUAL_CFA_REGNUM
;
3524 PUT_MODE (virtual_cfa_rtx
, Pmode
);
3526 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3527 return_address_pointer_rtx
3528 = gen_rtx_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
3532 struct_value_rtx
= STRUCT_VALUE
;
3534 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
3537 #ifdef STRUCT_VALUE_INCOMING
3538 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
3540 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3541 struct_value_incoming_rtx
3542 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
3544 struct_value_incoming_rtx
= struct_value_rtx
;
3548 #ifdef STATIC_CHAIN_REGNUM
3549 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
3551 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3552 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
3553 static_chain_incoming_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
3556 static_chain_incoming_rtx
= static_chain_rtx
;
3560 static_chain_rtx
= STATIC_CHAIN
;
3562 #ifdef STATIC_CHAIN_INCOMING
3563 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
3565 static_chain_incoming_rtx
= static_chain_rtx
;
3569 #ifdef PIC_OFFSET_TABLE_REGNUM
3570 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
3573 #ifdef INIT_EXPANDERS
3574 /* This is to initialize save_machine_status and restore_machine_status before
3575 the first call to push_function_context_to. This is needed by the Chill
3576 front end which calls push_function_context_to before the first cal to
3577 init_function_start. */
3582 /* Query and clear/ restore no_line_numbers. This is used by the
3583 switch / case handling in stmt.c to give proper line numbers in
3584 warnings about unreachable code. */
3587 force_line_numbers ()
3589 int old
= no_line_numbers
;
3591 no_line_numbers
= 0;
3593 force_next_line_note ();
3598 restore_line_number_status (old_value
)
3601 no_line_numbers
= old_value
;