1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
49 #include "insn-config.h"
54 #include "basic-block.h"
57 /* Commonly used modes. */
59 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
60 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
61 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
62 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
65 /* This is *not* reset after each function. It gives each CODE_LABEL
66 in the entire compilation a unique label number. */
68 static int label_num
= 1;
70 /* Highest label number in current function.
71 Zero means use the value of label_num instead.
72 This is nonzero only when belatedly compiling an inline function. */
74 static int last_label_num
;
76 /* Value label_num had when set_new_first_and_last_label_number was called.
77 If label_num has not changed since then, last_label_num is valid. */
79 static int base_label_num
;
81 /* Nonzero means do not generate NOTEs for source line numbers. */
83 static int no_line_numbers
;
85 /* Commonly used rtx's, so that we only need space for one copy.
86 These are initialized once for the entire compilation.
87 All of these except perhaps the floating-point CONST_DOUBLEs
88 are unique; no other rtx-object will be equal to any of these. */
90 rtx global_rtl
[GR_MAX
];
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx. */
96 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
100 REAL_VALUE_TYPE dconst0
;
101 REAL_VALUE_TYPE dconst1
;
102 REAL_VALUE_TYPE dconst2
;
103 REAL_VALUE_TYPE dconstm1
;
105 /* All references to the following fixed hard registers go through
106 these unique rtl objects. On machines where the frame-pointer and
107 arg-pointer are the same register, they use the same unique object.
109 After register allocation, other rtl objects which used to be pseudo-regs
110 may be clobbered to refer to the frame-pointer register.
111 But references that were originally to the frame-pointer can be
112 distinguished from the others because they contain frame_pointer_rtx.
114 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
115 tricky: until register elimination has taken place hard_frame_pointer_rtx
116 should be used if it is being set, and frame_pointer_rtx otherwise. After
117 register elimination hard_frame_pointer_rtx should always be used.
118 On machines where the two registers are same (most) then these are the
121 In an inline procedure, the stack and frame pointer rtxs may not be
122 used for anything else. */
123 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
124 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
125 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
126 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
127 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
129 /* This is used to implement __builtin_return_address for some machines.
130 See for instance the MIPS port. */
131 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
133 /* We make one copy of (const_int C) where C is in
134 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
135 to save space during the compilation and simplify comparisons of
138 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
140 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
141 shortly thrown away. We use two mechanisms to prevent this waste:
143 For sizes up to 5 elements, we keep a SEQUENCE and its associated
144 rtvec for use by gen_sequence. One entry for each size is
145 sufficient because most cases are calls to gen_sequence followed by
146 immediately emitting the SEQUENCE. Reuse is safe since emitting a
147 sequence is destructive on the insn in it anyway and hence can't be
150 We do not bother to save this cached data over nested function calls.
151 Instead, we just reinitialize them. */
153 #define SEQUENCE_RESULT_SIZE 5
155 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
157 /* During RTL generation, we also keep a list of free INSN rtl codes. */
158 static rtx free_insn
;
160 #define first_insn (cfun->emit->x_first_insn)
161 #define last_insn (cfun->emit->x_last_insn)
162 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
163 #define last_linenum (cfun->emit->x_last_linenum)
164 #define last_filename (cfun->emit->x_last_filename)
165 #define first_label_num (cfun->emit->x_first_label_num)
167 /* This is where the pointer to the obstack being used for RTL is stored. */
168 extern struct obstack
*rtl_obstack
;
170 static rtx make_jump_insn_raw
PARAMS ((rtx
));
171 static rtx make_call_insn_raw
PARAMS ((rtx
));
172 static rtx find_line_note
PARAMS ((rtx
));
173 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
174 static void unshare_all_rtl_1
PARAMS ((rtx
));
176 /* There are some RTL codes that require special attention; the generation
177 functions do the raw handling. If you add to this list, modify
178 special_rtx in gengenrtl.c as well. */
181 gen_rtx_CONST_INT (mode
, arg
)
182 enum machine_mode mode
;
185 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
186 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
188 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
189 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
190 return const_true_rtx
;
193 return gen_rtx_raw_CONST_INT (mode
, arg
);
196 /* CONST_DOUBLEs needs special handling because its length is known
199 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
200 enum machine_mode mode
;
202 HOST_WIDE_INT arg1
, arg2
;
204 rtx r
= rtx_alloc (CONST_DOUBLE
);
209 X0EXP (r
, 1) = NULL_RTX
;
213 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
220 gen_rtx_REG (mode
, regno
)
221 enum machine_mode mode
;
224 /* In case the MD file explicitly references the frame pointer, have
225 all such references point to the same frame pointer. This is
226 used during frame pointer elimination to distinguish the explicit
227 references to these registers from pseudos that happened to be
230 If we have eliminated the frame pointer or arg pointer, we will
231 be using it as a normal register, for example as a spill
232 register. In such cases, we might be accessing it in a mode that
233 is not Pmode and therefore cannot use the pre-allocated rtx.
235 Also don't do this when we are making new REGs in reload, since
236 we don't want to get confused with the real pointers. */
238 if (mode
== Pmode
&& !reload_in_progress
)
240 if (regno
== FRAME_POINTER_REGNUM
)
241 return frame_pointer_rtx
;
242 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
243 if (regno
== HARD_FRAME_POINTER_REGNUM
)
244 return hard_frame_pointer_rtx
;
246 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
247 if (regno
== ARG_POINTER_REGNUM
)
248 return arg_pointer_rtx
;
250 #ifdef RETURN_ADDRESS_POINTER_REGNUM
251 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
252 return return_address_pointer_rtx
;
254 if (regno
== STACK_POINTER_REGNUM
)
255 return stack_pointer_rtx
;
258 return gen_rtx_raw_REG (mode
, regno
);
262 gen_rtx_MEM (mode
, addr
)
263 enum machine_mode mode
;
266 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
268 /* This field is not cleared by the mere allocation of the rtx, so
270 MEM_ALIAS_SET (rt
) = 0;
275 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
277 ** This routine generates an RTX of the size specified by
278 ** <code>, which is an RTX code. The RTX structure is initialized
279 ** from the arguments <element1> through <elementn>, which are
280 ** interpreted according to the specific RTX type's format. The
281 ** special machine mode associated with the rtx (if any) is specified
284 ** gen_rtx can be invoked in a way which resembles the lisp-like
285 ** rtx it will generate. For example, the following rtx structure:
287 ** (plus:QI (mem:QI (reg:SI 1))
288 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
290 ** ...would be generated by the following C code:
292 ** gen_rtx (PLUS, QImode,
293 ** gen_rtx (MEM, QImode,
294 ** gen_rtx (REG, SImode, 1)),
295 ** gen_rtx (MEM, QImode,
296 ** gen_rtx (PLUS, SImode,
297 ** gen_rtx (REG, SImode, 2),
298 ** gen_rtx (REG, SImode, 3)))),
303 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
305 #ifndef ANSI_PROTOTYPES
307 enum machine_mode mode
;
310 register int i
; /* Array indices... */
311 register const char *fmt
; /* Current rtx's format... */
312 register rtx rt_val
; /* RTX to return to caller... */
316 #ifndef ANSI_PROTOTYPES
317 code
= va_arg (p
, enum rtx_code
);
318 mode
= va_arg (p
, enum machine_mode
);
324 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
329 rtx arg0
= va_arg (p
, rtx
);
330 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
331 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
332 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
337 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
341 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
345 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
346 rt_val
->mode
= mode
; /* Store the machine mode... */
348 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
349 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
353 case '0': /* Unused field. */
356 case 'i': /* An integer? */
357 XINT (rt_val
, i
) = va_arg (p
, int);
360 case 'w': /* A wide integer? */
361 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
364 case 's': /* A string? */
365 XSTR (rt_val
, i
) = va_arg (p
, char *);
368 case 'e': /* An expression? */
369 case 'u': /* An insn? Same except when printing. */
370 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
373 case 'E': /* An RTX vector? */
374 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
377 case 'b': /* A bitmap? */
378 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
381 case 't': /* A tree? */
382 XTREE (rt_val
, i
) = va_arg (p
, tree
);
396 /* gen_rtvec (n, [rt1, ..., rtn])
398 ** This routine creates an rtvec and stores within it the
399 ** pointers to rtx's which are its arguments.
404 gen_rtvec
VPARAMS ((int n
, ...))
406 #ifndef ANSI_PROTOTYPES
415 #ifndef ANSI_PROTOTYPES
420 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
422 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
424 for (i
= 0; i
< n
; i
++)
425 vector
[i
] = va_arg (p
, rtx
);
428 return gen_rtvec_v (n
, vector
);
432 gen_rtvec_v (n
, argp
)
437 register rtvec rt_val
;
440 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
442 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
444 for (i
= 0; i
< n
; i
++)
445 rt_val
->elem
[i
] = *argp
++;
451 /* Generate a REG rtx for a new pseudo register of mode MODE.
452 This pseudo is assigned the next sequential register number. */
456 enum machine_mode mode
;
458 struct function
*f
= cfun
;
461 /* Don't let anything called after initial flow analysis create new
466 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
467 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
)
469 /* For complex modes, don't make a single pseudo.
470 Instead, make a CONCAT of two pseudos.
471 This allows noncontiguous allocation of the real and imaginary parts,
472 which makes much better code. Besides, allocating DCmode
473 pseudos overstrains reload on some machines like the 386. */
474 rtx realpart
, imagpart
;
475 int size
= GET_MODE_UNIT_SIZE (mode
);
476 enum machine_mode partmode
477 = mode_for_size (size
* BITS_PER_UNIT
,
478 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
479 ? MODE_FLOAT
: MODE_INT
),
482 realpart
= gen_reg_rtx (partmode
);
483 imagpart
= gen_reg_rtx (partmode
);
484 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
487 /* Make sure regno_pointer_flag and regno_reg_rtx are large
488 enough to have an element for this pseudo reg number. */
490 if (reg_rtx_no
== f
->emit
->regno_pointer_flag_length
)
492 int old_size
= f
->emit
->regno_pointer_flag_length
;
495 new = xrealloc (f
->emit
->regno_pointer_flag
, old_size
* 2);
496 memset (new + old_size
, 0, old_size
);
497 f
->emit
->regno_pointer_flag
= new;
499 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
500 memset (new + old_size
, 0, old_size
);
501 f
->emit
->regno_pointer_align
= new;
503 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
504 old_size
* 2 * sizeof (rtx
));
505 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
506 regno_reg_rtx
= new1
;
508 f
->emit
->regno_pointer_flag_length
= old_size
* 2;
511 val
= gen_rtx_raw_REG (mode
, reg_rtx_no
);
512 regno_reg_rtx
[reg_rtx_no
++] = val
;
516 /* Identify REG (which may be a CONCAT) as a user register. */
522 if (GET_CODE (reg
) == CONCAT
)
524 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
525 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
527 else if (GET_CODE (reg
) == REG
)
528 REG_USERVAR_P (reg
) = 1;
533 /* Identify REG as a probable pointer register and show its alignment
534 as ALIGN, if nonzero. */
537 mark_reg_pointer (reg
, align
)
541 if (! REGNO_POINTER_FLAG (REGNO (reg
)))
543 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
546 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
548 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
549 /* We can no-longer be sure just how aligned this pointer is */
550 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
553 /* Return 1 plus largest pseudo reg number used in the current function. */
561 /* Return 1 + the largest label number used so far in the current function. */
566 if (last_label_num
&& label_num
== base_label_num
)
567 return last_label_num
;
571 /* Return first label number used in this function (if any were used). */
574 get_first_label_num ()
576 return first_label_num
;
579 /* Return a value representing some low-order bits of X, where the number
580 of low-order bits is given by MODE. Note that no conversion is done
581 between floating-point and fixed-point values, rather, the bit
582 representation is returned.
584 This function handles the cases in common between gen_lowpart, below,
585 and two variants in cse.c and combine.c. These are the cases that can
586 be safely handled at all points in the compilation.
588 If this is not a case we can handle, return 0. */
591 gen_lowpart_common (mode
, x
)
592 enum machine_mode mode
;
597 if (GET_MODE (x
) == mode
)
600 /* MODE must occupy no more words than the mode of X. */
601 if (GET_MODE (x
) != VOIDmode
602 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
603 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
607 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
608 word
= ((GET_MODE_SIZE (GET_MODE (x
))
609 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
612 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
613 && (GET_MODE_CLASS (mode
) == MODE_INT
614 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
616 /* If we are getting the low-order part of something that has been
617 sign- or zero-extended, we can either just use the object being
618 extended or make a narrower extension. If we want an even smaller
619 piece than the size of the object being extended, call ourselves
622 This case is used mostly by combine and cse. */
624 if (GET_MODE (XEXP (x
, 0)) == mode
)
626 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
627 return gen_lowpart_common (mode
, XEXP (x
, 0));
628 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
629 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
631 else if (GET_CODE (x
) == SUBREG
632 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
633 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
634 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
636 : gen_rtx_SUBREG (mode
, SUBREG_REG (x
), SUBREG_WORD (x
) + word
));
637 else if (GET_CODE (x
) == REG
)
639 /* Let the backend decide how many registers to skip. This is needed
640 in particular for Sparc64 where fp regs are smaller than a word. */
641 /* ??? Note that subregs are now ambiguous, in that those against
642 pseudos are sized by the Word Size, while those against hard
643 regs are sized by the underlying register size. Better would be
644 to always interpret the subreg offset parameter as bytes or bits. */
646 if (WORDS_BIG_ENDIAN
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
647 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
648 - HARD_REGNO_NREGS (REGNO (x
), mode
));
650 /* If the register is not valid for MODE, return 0. If we don't
651 do this, there is no way to fix up the resulting REG later.
652 But we do do this if the current REG is not valid for its
653 mode. This latter is a kludge, but is required due to the
654 way that parameters are passed on some machines, most
656 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
657 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
658 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
660 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
661 /* integrate.c can't handle parts of a return value register. */
662 && (! REG_FUNCTION_VALUE_P (x
)
663 || ! rtx_equal_function_value_matters
)
664 #ifdef CLASS_CANNOT_CHANGE_SIZE
665 && ! (GET_MODE_SIZE (mode
) != GET_MODE_SIZE (GET_MODE (x
))
666 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_INT
667 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_FLOAT
668 && (TEST_HARD_REG_BIT
669 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
672 /* We want to keep the stack, frame, and arg pointers
674 && x
!= frame_pointer_rtx
675 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
676 && x
!= arg_pointer_rtx
678 && x
!= stack_pointer_rtx
)
679 return gen_rtx_REG (mode
, REGNO (x
) + word
);
681 return gen_rtx_SUBREG (mode
, x
, word
);
683 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
684 from the low-order part of the constant. */
685 else if ((GET_MODE_CLASS (mode
) == MODE_INT
686 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
687 && GET_MODE (x
) == VOIDmode
688 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
690 /* If MODE is twice the host word size, X is already the desired
691 representation. Otherwise, if MODE is wider than a word, we can't
692 do this. If MODE is exactly a word, return just one CONST_INT.
693 If MODE is smaller than a word, clear the bits that don't belong
694 in our mode, unless they and our sign bit are all one. So we get
695 either a reasonable negative value or a reasonable unsigned value
698 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
700 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
702 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
703 return (GET_CODE (x
) == CONST_INT
? x
704 : GEN_INT (CONST_DOUBLE_LOW (x
)));
707 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
708 int width
= GET_MODE_BITSIZE (mode
);
709 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
710 : CONST_DOUBLE_LOW (x
));
712 /* Sign extend to HOST_WIDE_INT. */
713 val
= val
<< (HOST_BITS_PER_WIDE_INT
- width
) >> (HOST_BITS_PER_WIDE_INT
- width
);
715 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
720 /* If X is an integral constant but we want it in floating-point, it
721 must be the case that we have a union of an integer and a floating-point
722 value. If the machine-parameters allow it, simulate that union here
723 and return the result. The two-word and single-word cases are
726 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
727 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
728 || flag_pretend_float
)
729 && GET_MODE_CLASS (mode
) == MODE_FLOAT
730 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
731 && GET_CODE (x
) == CONST_INT
732 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
733 #ifdef REAL_ARITHMETIC
739 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
740 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
744 union {HOST_WIDE_INT i
; float d
; } u
;
747 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
750 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
751 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
752 || flag_pretend_float
)
753 && GET_MODE_CLASS (mode
) == MODE_FLOAT
754 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
755 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
756 && GET_MODE (x
) == VOIDmode
757 && (sizeof (double) * HOST_BITS_PER_CHAR
758 == 2 * HOST_BITS_PER_WIDE_INT
))
759 #ifdef REAL_ARITHMETIC
763 HOST_WIDE_INT low
, high
;
765 if (GET_CODE (x
) == CONST_INT
)
766 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
768 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
770 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
772 if (WORDS_BIG_ENDIAN
)
773 i
[0] = high
, i
[1] = low
;
775 i
[0] = low
, i
[1] = high
;
777 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
778 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
782 union {HOST_WIDE_INT i
[2]; double d
; } u
;
783 HOST_WIDE_INT low
, high
;
785 if (GET_CODE (x
) == CONST_INT
)
786 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
788 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
790 #ifdef HOST_WORDS_BIG_ENDIAN
791 u
.i
[0] = high
, u
.i
[1] = low
;
793 u
.i
[0] = low
, u
.i
[1] = high
;
796 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
800 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
801 same as sizeof (double) or when sizeof (float) is larger than the
802 size of a word on the target machine. */
803 #ifdef REAL_ARITHMETIC
804 else if (mode
== SFmode
&& GET_CODE (x
) == CONST_INT
)
810 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
811 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
813 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
814 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
815 || flag_pretend_float
)
816 && GET_MODE_CLASS (mode
) == MODE_FLOAT
817 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
818 && GET_CODE (x
) == CONST_INT
819 && (sizeof (double) * HOST_BITS_PER_CHAR
820 == HOST_BITS_PER_WIDE_INT
))
826 r
= REAL_VALUE_FROM_TARGET_DOUBLE (&i
);
827 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
831 /* Similarly, if this is converting a floating-point value into a
832 single-word integer. Only do this is the host and target parameters are
835 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
836 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
837 || flag_pretend_float
)
838 && (GET_MODE_CLASS (mode
) == MODE_INT
839 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
840 && GET_CODE (x
) == CONST_DOUBLE
841 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
842 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
843 return operand_subword (x
, word
, 0, GET_MODE (x
));
845 /* Similarly, if this is converting a floating-point value into a
846 two-word integer, we can do this one word at a time and make an
847 integer. Only do this is the host and target parameters are
850 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
851 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
852 || flag_pretend_float
)
853 && (GET_MODE_CLASS (mode
) == MODE_INT
854 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
855 && GET_CODE (x
) == CONST_DOUBLE
856 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
857 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
860 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
862 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
864 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
865 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
866 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
869 /* Otherwise, we can't do this. */
873 /* Return the real part (which has mode MODE) of a complex value X.
874 This always comes at the low address in memory. */
877 gen_realpart (mode
, x
)
878 enum machine_mode mode
;
881 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
883 else if (WORDS_BIG_ENDIAN
884 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
886 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
887 fatal ("Unable to access real part of complex value in a hard register on this target");
888 else if (WORDS_BIG_ENDIAN
)
889 return gen_highpart (mode
, x
);
891 return gen_lowpart (mode
, x
);
894 /* Return the imaginary part (which has mode MODE) of a complex value X.
895 This always comes at the high address in memory. */
898 gen_imagpart (mode
, x
)
899 enum machine_mode mode
;
902 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
904 else if (WORDS_BIG_ENDIAN
)
905 return gen_lowpart (mode
, x
);
906 else if (!WORDS_BIG_ENDIAN
907 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
909 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
910 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
912 return gen_highpart (mode
, x
);
915 /* Return 1 iff X, assumed to be a SUBREG,
916 refers to the real part of the complex value in its containing reg.
917 Complex values are always stored with the real part in the first word,
918 regardless of WORDS_BIG_ENDIAN. */
921 subreg_realpart_p (x
)
924 if (GET_CODE (x
) != SUBREG
)
927 return SUBREG_WORD (x
) * UNITS_PER_WORD
< GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
)));
930 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
931 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
932 least-significant part of X.
933 MODE specifies how big a part of X to return;
934 it usually should not be larger than a word.
935 If X is a MEM whose address is a QUEUED, the value may be so also. */
938 gen_lowpart (mode
, x
)
939 enum machine_mode mode
;
942 rtx result
= gen_lowpart_common (mode
, x
);
946 else if (GET_CODE (x
) == REG
)
948 /* Must be a hard reg that's not valid in MODE. */
949 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
954 else if (GET_CODE (x
) == MEM
)
956 /* The only additional case we can do is MEM. */
957 register int offset
= 0;
958 if (WORDS_BIG_ENDIAN
)
959 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
960 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
962 if (BYTES_BIG_ENDIAN
)
963 /* Adjust the address so that the address-after-the-data
965 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
966 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
968 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
970 else if (GET_CODE (x
) == ADDRESSOF
)
971 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
976 /* Like `gen_lowpart', but refer to the most significant part.
977 This is used to access the imaginary part of a complex number. */
980 gen_highpart (mode
, x
)
981 enum machine_mode mode
;
984 /* This case loses if X is a subreg. To catch bugs early,
985 complain if an invalid MODE is used even in other cases. */
986 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
987 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
989 if (GET_CODE (x
) == CONST_DOUBLE
990 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
991 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
994 return GEN_INT (CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
995 else if (GET_CODE (x
) == CONST_INT
)
997 if (HOST_BITS_PER_WIDE_INT
<= BITS_PER_WORD
)
999 return GEN_INT (INTVAL (x
) >> (HOST_BITS_PER_WIDE_INT
- BITS_PER_WORD
));
1001 else if (GET_CODE (x
) == MEM
)
1003 register int offset
= 0;
1004 if (! WORDS_BIG_ENDIAN
)
1005 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1006 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1008 if (! BYTES_BIG_ENDIAN
1009 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
1010 offset
-= (GET_MODE_SIZE (mode
)
1011 - MIN (UNITS_PER_WORD
,
1012 GET_MODE_SIZE (GET_MODE (x
))));
1014 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1016 else if (GET_CODE (x
) == SUBREG
)
1018 /* The only time this should occur is when we are looking at a
1019 multi-word item with a SUBREG whose mode is the same as that of the
1020 item. It isn't clear what we would do if it wasn't. */
1021 if (SUBREG_WORD (x
) != 0)
1023 return gen_highpart (mode
, SUBREG_REG (x
));
1025 else if (GET_CODE (x
) == REG
)
1029 /* Let the backend decide how many registers to skip. This is needed
1030 in particular for sparc64 where fp regs are smaller than a word. */
1031 /* ??? Note that subregs are now ambiguous, in that those against
1032 pseudos are sized by the word size, while those against hard
1033 regs are sized by the underlying register size. Better would be
1034 to always interpret the subreg offset parameter as bytes or bits. */
1036 if (WORDS_BIG_ENDIAN
)
1038 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1039 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
1040 - HARD_REGNO_NREGS (REGNO (x
), mode
));
1042 word
= ((GET_MODE_SIZE (GET_MODE (x
))
1043 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
1046 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
1047 /* integrate.c can't handle parts of a return value register. */
1048 && (! REG_FUNCTION_VALUE_P (x
)
1049 || ! rtx_equal_function_value_matters
)
1050 /* We want to keep the stack, frame, and arg pointers special. */
1051 && x
!= frame_pointer_rtx
1052 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1053 && x
!= arg_pointer_rtx
1055 && x
!= stack_pointer_rtx
)
1056 return gen_rtx_REG (mode
, REGNO (x
) + word
);
1058 return gen_rtx_SUBREG (mode
, x
, word
);
1064 /* Return 1 iff X, assumed to be a SUBREG,
1065 refers to the least significant part of its containing reg.
1066 If X is not a SUBREG, always return 1 (it is its own low part!). */
1069 subreg_lowpart_p (x
)
1072 if (GET_CODE (x
) != SUBREG
)
1074 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1077 if (WORDS_BIG_ENDIAN
1078 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1079 return (SUBREG_WORD (x
)
1080 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1081 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1084 return SUBREG_WORD (x
) == 0;
1087 /* Return subword I of operand OP.
1088 The word number, I, is interpreted as the word number starting at the
1089 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1090 otherwise it is the high-order word.
1092 If we cannot extract the required word, we return zero. Otherwise, an
1093 rtx corresponding to the requested word will be returned.
1095 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1096 reload has completed, a valid address will always be returned. After
1097 reload, if a valid address cannot be returned, we return zero.
1099 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1100 it is the responsibility of the caller.
1102 MODE is the mode of OP in case it is a CONST_INT. */
1105 operand_subword (op
, i
, validate_address
, mode
)
1108 int validate_address
;
1109 enum machine_mode mode
;
1112 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1114 if (mode
== VOIDmode
)
1115 mode
= GET_MODE (op
);
1117 if (mode
== VOIDmode
)
1120 /* If OP is narrower than a word, fail. */
1122 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1125 /* If we want a word outside OP, return zero. */
1127 && (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1130 /* If OP is already an integer word, return it. */
1131 if (GET_MODE_CLASS (mode
) == MODE_INT
1132 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1135 /* If OP is a REG or SUBREG, we can handle it very simply. */
1136 if (GET_CODE (op
) == REG
)
1138 /* ??? There is a potential problem with this code. It does not
1139 properly handle extractions of a subword from a hard register
1140 that is larger than word_mode. Presumably the check for
1141 HARD_REGNO_MODE_OK catches these most of these cases. */
1143 /* If OP is a hard register, but OP + I is not a hard register,
1144 then extracting a subword is impossible.
1146 For example, consider if OP is the last hard register and it is
1147 larger than word_mode. If we wanted word N (for N > 0) because a
1148 part of that hard register was known to contain a useful value,
1149 then OP + I would refer to a pseudo, not the hard register we
1151 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1152 && REGNO (op
) + i
>= FIRST_PSEUDO_REGISTER
)
1155 /* If the register is not valid for MODE, return 0. Note we
1156 have to check both OP and OP + I since they may refer to
1157 different parts of the register file.
1159 Consider if OP refers to the last 96bit FP register and we want
1160 subword 3 because that subword is known to contain a value we
1162 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1163 && (! HARD_REGNO_MODE_OK (REGNO (op
), word_mode
)
1164 || ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
)))
1166 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1167 || (REG_FUNCTION_VALUE_P (op
)
1168 && rtx_equal_function_value_matters
)
1169 /* We want to keep the stack, frame, and arg pointers
1171 || op
== frame_pointer_rtx
1172 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1173 || op
== arg_pointer_rtx
1175 || op
== stack_pointer_rtx
)
1176 return gen_rtx_SUBREG (word_mode
, op
, i
);
1178 return gen_rtx_REG (word_mode
, REGNO (op
) + i
);
1180 else if (GET_CODE (op
) == SUBREG
)
1181 return gen_rtx_SUBREG (word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1182 else if (GET_CODE (op
) == CONCAT
)
1184 int partwords
= GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1186 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1187 return operand_subword (XEXP (op
, 1), i
- partwords
,
1188 validate_address
, mode
);
1191 /* Form a new MEM at the requested address. */
1192 if (GET_CODE (op
) == MEM
)
1194 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1197 if (validate_address
)
1199 if (reload_completed
)
1201 if (! strict_memory_address_p (word_mode
, addr
))
1205 addr
= memory_address (word_mode
, addr
);
1208 new = gen_rtx_MEM (word_mode
, addr
);
1210 MEM_COPY_ATTRIBUTES (new, op
);
1211 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1212 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op
);
1217 /* The only remaining cases are when OP is a constant. If the host and
1218 target floating formats are the same, handling two-word floating
1219 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1220 are defined as returning one or two 32 bit values, respectively,
1221 and not values of BITS_PER_WORD bits. */
1222 #ifdef REAL_ARITHMETIC
1223 /* The output is some bits, the width of the target machine's word.
1224 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1226 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1227 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1228 && GET_MODE_BITSIZE (mode
) == 64
1229 && GET_CODE (op
) == CONST_DOUBLE
)
1234 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1235 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1237 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1238 which the words are written depends on the word endianness.
1239 ??? This is a potential portability problem and should
1240 be fixed at some point.
1242 We must excercise caution with the sign bit. By definition there
1243 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1244 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1245 So we explicitly mask and sign-extend as necessary. */
1246 if (BITS_PER_WORD
== 32)
1249 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1250 return GEN_INT (val
);
1252 #if HOST_BITS_PER_WIDE_INT >= 64
1253 else if (BITS_PER_WORD
>= 64 && i
== 0)
1255 val
= k
[! WORDS_BIG_ENDIAN
];
1256 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1257 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1258 return GEN_INT (val
);
1261 else if (BITS_PER_WORD
== 16)
1264 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1267 return GEN_INT (val
);
1272 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1273 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1274 && GET_MODE_BITSIZE (mode
) > 64
1275 && GET_CODE (op
) == CONST_DOUBLE
)
1280 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1281 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1283 if (BITS_PER_WORD
== 32)
1286 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1287 return GEN_INT (val
);
1289 #if HOST_BITS_PER_WIDE_INT >= 64
1290 else if (BITS_PER_WORD
>= 64 && i
<= 1)
1292 val
= k
[i
*2 + ! WORDS_BIG_ENDIAN
];
1293 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1294 val
|= (HOST_WIDE_INT
) k
[i
*2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1295 return GEN_INT (val
);
1301 #else /* no REAL_ARITHMETIC */
1302 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1303 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1304 || flag_pretend_float
)
1305 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1306 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1307 && GET_CODE (op
) == CONST_DOUBLE
)
1309 /* The constant is stored in the host's word-ordering,
1310 but we want to access it in the target's word-ordering. Some
1311 compilers don't like a conditional inside macro args, so we have two
1312 copies of the return. */
1313 #ifdef HOST_WORDS_BIG_ENDIAN
1314 return GEN_INT (i
== WORDS_BIG_ENDIAN
1315 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1317 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1318 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1321 #endif /* no REAL_ARITHMETIC */
1323 /* Single word float is a little harder, since single- and double-word
1324 values often do not have the same high-order bits. We have already
1325 verified that we want the only defined word of the single-word value. */
1326 #ifdef REAL_ARITHMETIC
1327 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1328 && GET_MODE_BITSIZE (mode
) == 32
1329 && GET_CODE (op
) == CONST_DOUBLE
)
1334 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1335 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1337 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1339 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1341 if (BITS_PER_WORD
== 16)
1343 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1348 return GEN_INT (val
);
1351 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1352 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1353 || flag_pretend_float
)
1354 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1355 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1356 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1357 && GET_CODE (op
) == CONST_DOUBLE
)
1360 union {float f
; HOST_WIDE_INT i
; } u
;
1362 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1365 return GEN_INT (u
.i
);
1367 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1368 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1369 || flag_pretend_float
)
1370 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1371 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1372 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1373 && GET_CODE (op
) == CONST_DOUBLE
)
1376 union {double d
; HOST_WIDE_INT i
; } u
;
1378 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1381 return GEN_INT (u
.i
);
1383 #endif /* no REAL_ARITHMETIC */
1385 /* The only remaining cases that we can handle are integers.
1386 Convert to proper endianness now since these cases need it.
1387 At this point, i == 0 means the low-order word.
1389 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1390 in general. However, if OP is (const_int 0), we can just return
1393 if (op
== const0_rtx
)
1396 if (GET_MODE_CLASS (mode
) != MODE_INT
1397 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1398 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1401 if (WORDS_BIG_ENDIAN
)
1402 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1404 /* Find out which word on the host machine this value is in and get
1405 it from the constant. */
1406 val
= (i
/ size_ratio
== 0
1407 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1408 : (GET_CODE (op
) == CONST_INT
1409 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1411 /* Get the value we want into the low bits of val. */
1412 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1413 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
)));
1415 val
= trunc_int_for_mode (val
, word_mode
);
1417 return GEN_INT (val
);
1420 /* Similar to `operand_subword', but never return 0. If we can't extract
1421 the required subword, put OP into a register and try again. If that fails,
1422 abort. We always validate the address in this case. It is not valid
1423 to call this function after reload; it is mostly meant for RTL
1426 MODE is the mode of OP, in case it is CONST_INT. */
1429 operand_subword_force (op
, i
, mode
)
1432 enum machine_mode mode
;
1434 rtx result
= operand_subword (op
, i
, 1, mode
);
1439 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1441 /* If this is a register which can not be accessed by words, copy it
1442 to a pseudo register. */
1443 if (GET_CODE (op
) == REG
)
1444 op
= copy_to_reg (op
);
1446 op
= force_reg (mode
, op
);
1449 result
= operand_subword (op
, i
, 1, mode
);
1456 /* Given a compare instruction, swap the operands.
1457 A test instruction is changed into a compare of 0 against the operand. */
1460 reverse_comparison (insn
)
1463 rtx body
= PATTERN (insn
);
1466 if (GET_CODE (body
) == SET
)
1467 comp
= SET_SRC (body
);
1469 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1471 if (GET_CODE (comp
) == COMPARE
)
1473 rtx op0
= XEXP (comp
, 0);
1474 rtx op1
= XEXP (comp
, 1);
1475 XEXP (comp
, 0) = op1
;
1476 XEXP (comp
, 1) = op0
;
1480 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1481 CONST0_RTX (GET_MODE (comp
)), comp
);
1482 if (GET_CODE (body
) == SET
)
1483 SET_SRC (body
) = new;
1485 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1489 /* Return a memory reference like MEMREF, but with its mode changed
1490 to MODE and its address changed to ADDR.
1491 (VOIDmode means don't change the mode.
1492 NULL for ADDR means don't change the address.) */
1495 change_address (memref
, mode
, addr
)
1497 enum machine_mode mode
;
1502 if (GET_CODE (memref
) != MEM
)
1504 if (mode
== VOIDmode
)
1505 mode
= GET_MODE (memref
);
1507 addr
= XEXP (memref
, 0);
1509 /* If reload is in progress or has completed, ADDR must be valid.
1510 Otherwise, we can call memory_address to make it valid. */
1511 if (reload_completed
|| reload_in_progress
)
1513 if (! memory_address_p (mode
, addr
))
1517 addr
= memory_address (mode
, addr
);
1519 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1522 new = gen_rtx_MEM (mode
, addr
);
1523 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref
);
1524 MEM_COPY_ATTRIBUTES (new, memref
);
1525 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref
);
1529 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1536 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1537 NULL_RTX
, label_num
++, NULL_PTR
, NULL_PTR
);
1539 LABEL_NUSES (label
) = 0;
1540 LABEL_ALTERNATE_NAME (label
) = NULL
;
1544 /* For procedure integration. */
1546 /* Install new pointers to the first and last insns in the chain.
1547 Also, set cur_insn_uid to one higher than the last in use.
1548 Used for an inline-procedure after copying the insn chain. */
1551 set_new_first_and_last_insn (first
, last
)
1560 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1561 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1566 /* Set the range of label numbers found in the current function.
1567 This is used when belatedly compiling an inline function. */
1570 set_new_first_and_last_label_num (first
, last
)
1573 base_label_num
= label_num
;
1574 first_label_num
= first
;
1575 last_label_num
= last
;
1578 /* Set the last label number found in the current function.
1579 This is used when belatedly compiling an inline function. */
1582 set_new_last_label_num (last
)
1585 base_label_num
= label_num
;
1586 last_label_num
= last
;
1589 /* Restore all variables describing the current status from the structure *P.
1590 This is used after a nested function. */
1593 restore_emit_status (p
)
1594 struct function
*p ATTRIBUTE_UNUSED
;
1597 clear_emit_caches ();
1600 /* Clear out all parts of the state in F that can safely be discarded
1601 after the function has been compiled, to let garbage collection
1602 reclaim the memory. */
1605 free_emit_status (f
)
1608 free (f
->emit
->x_regno_reg_rtx
);
1609 free (f
->emit
->regno_pointer_flag
);
1610 free (f
->emit
->regno_pointer_align
);
1615 /* Go through all the RTL insn bodies and copy any invalid shared
1616 structure. This routine should only be called once. */
1619 unshare_all_rtl (fndecl
, insn
)
1625 /* Make sure that virtual parameters are not shared. */
1626 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
1628 copy_rtx_if_shared (DECL_RTL (decl
));
1631 /* Unshare just about everything else. */
1632 unshare_all_rtl_1 (insn
);
1634 /* Make sure the addresses of stack slots found outside the insn chain
1635 (such as, in DECL_RTL of a variable) are not shared
1636 with the insn chain.
1638 This special care is necessary when the stack slot MEM does not
1639 actually appear in the insn chain. If it does appear, its address
1640 is unshared from all else at that point. */
1641 copy_rtx_if_shared (stack_slot_list
);
1644 /* Go through all the RTL insn bodies and copy any invalid shared
1645 structure, again. This is a fairly expensive thing to do so it
1646 should be done sparingly. */
1649 unshare_all_rtl_again (insn
)
1653 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1654 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
1656 reset_used_flags (PATTERN (p
));
1657 reset_used_flags (REG_NOTES (p
));
1658 reset_used_flags (LOG_LINKS (p
));
1660 unshare_all_rtl_1 (insn
);
1663 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1664 Assumes the mark bits are cleared at entry. */
1667 unshare_all_rtl_1 (insn
)
1670 for (; insn
; insn
= NEXT_INSN (insn
))
1671 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
1673 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1674 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1675 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1679 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1680 Recursively does the same for subexpressions. */
1683 copy_rtx_if_shared (orig
)
1686 register rtx x
= orig
;
1688 register enum rtx_code code
;
1689 register const char *format_ptr
;
1695 code
= GET_CODE (x
);
1697 /* These types may be freely shared. */
1710 /* SCRATCH must be shared because they represent distinct values. */
1714 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1715 a LABEL_REF, it isn't sharable. */
1716 if (GET_CODE (XEXP (x
, 0)) == PLUS
1717 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1718 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1727 /* The chain of insns is not being copied. */
1731 /* A MEM is allowed to be shared if its address is constant.
1733 We used to allow sharing of MEMs which referenced
1734 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1735 that can lose. instantiate_virtual_regs will not unshare
1736 the MEMs, and combine may change the structure of the address
1737 because it looks safe and profitable in one context, but
1738 in some other context it creates unrecognizable RTL. */
1739 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
1748 /* This rtx may not be shared. If it has already been seen,
1749 replace it with a copy of itself. */
1755 copy
= rtx_alloc (code
);
1756 bcopy ((char *) x
, (char *) copy
,
1757 (sizeof (*copy
) - sizeof (copy
->fld
)
1758 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1764 /* Now scan the subexpressions recursively.
1765 We can store any replaced subexpressions directly into X
1766 since we know X is not shared! Any vectors in X
1767 must be copied if X was copied. */
1769 format_ptr
= GET_RTX_FORMAT (code
);
1771 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1773 switch (*format_ptr
++)
1776 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1780 if (XVEC (x
, i
) != NULL
)
1783 int len
= XVECLEN (x
, i
);
1785 if (copied
&& len
> 0)
1786 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
1787 for (j
= 0; j
< len
; j
++)
1788 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1796 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1797 to look for shared sub-parts. */
1800 reset_used_flags (x
)
1804 register enum rtx_code code
;
1805 register const char *format_ptr
;
1810 code
= GET_CODE (x
);
1812 /* These types may be freely shared so we needn't do any resetting
1833 /* The chain of insns is not being copied. */
1842 format_ptr
= GET_RTX_FORMAT (code
);
1843 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1845 switch (*format_ptr
++)
1848 reset_used_flags (XEXP (x
, i
));
1852 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1853 reset_used_flags (XVECEXP (x
, i
, j
));
1859 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1860 Return X or the rtx for the pseudo reg the value of X was copied into.
1861 OTHER must be valid as a SET_DEST. */
1864 make_safe_from (x
, other
)
1868 switch (GET_CODE (other
))
1871 other
= SUBREG_REG (other
);
1873 case STRICT_LOW_PART
:
1876 other
= XEXP (other
, 0);
1882 if ((GET_CODE (other
) == MEM
1884 && GET_CODE (x
) != REG
1885 && GET_CODE (x
) != SUBREG
)
1886 || (GET_CODE (other
) == REG
1887 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
1888 || reg_mentioned_p (other
, x
))))
1890 rtx temp
= gen_reg_rtx (GET_MODE (x
));
1891 emit_move_insn (temp
, x
);
1897 /* Emission of insns (adding them to the doubly-linked list). */
1899 /* Return the first insn of the current sequence or current function. */
1907 /* Return the last insn emitted in current sequence or current function. */
1915 /* Specify a new insn as the last in the chain. */
1918 set_last_insn (insn
)
1921 if (NEXT_INSN (insn
) != 0)
1926 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1929 get_last_insn_anywhere ()
1931 struct sequence_stack
*stack
;
1934 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
1935 if (stack
->last
!= 0)
1940 /* Return a number larger than any instruction's uid in this function. */
1945 return cur_insn_uid
;
1948 /* Renumber instructions so that no instruction UIDs are wasted. */
1951 renumber_insns (stream
)
1956 /* If we're not supposed to renumber instructions, don't. */
1957 if (!flag_renumber_insns
)
1960 /* If there aren't that many instructions, then it's not really
1961 worth renumbering them. */
1962 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
1967 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1970 fprintf (stream
, "Renumbering insn %d to %d\n",
1971 INSN_UID (insn
), cur_insn_uid
);
1972 INSN_UID (insn
) = cur_insn_uid
++;
1976 /* Return the next insn. If it is a SEQUENCE, return the first insn
1985 insn
= NEXT_INSN (insn
);
1986 if (insn
&& GET_CODE (insn
) == INSN
1987 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1988 insn
= XVECEXP (PATTERN (insn
), 0, 0);
1994 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1998 previous_insn (insn
)
2003 insn
= PREV_INSN (insn
);
2004 if (insn
&& GET_CODE (insn
) == INSN
2005 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2006 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2012 /* Return the next insn after INSN that is not a NOTE. This routine does not
2013 look inside SEQUENCEs. */
2016 next_nonnote_insn (insn
)
2021 insn
= NEXT_INSN (insn
);
2022 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2029 /* Return the previous insn before INSN that is not a NOTE. This routine does
2030 not look inside SEQUENCEs. */
2033 prev_nonnote_insn (insn
)
2038 insn
= PREV_INSN (insn
);
2039 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2046 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2047 or 0, if there is none. This routine does not look inside
2051 next_real_insn (insn
)
2056 insn
= NEXT_INSN (insn
);
2057 if (insn
== 0 || GET_CODE (insn
) == INSN
2058 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2065 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2066 or 0, if there is none. This routine does not look inside
2070 prev_real_insn (insn
)
2075 insn
= PREV_INSN (insn
);
2076 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2077 || GET_CODE (insn
) == JUMP_INSN
)
2084 /* Find the next insn after INSN that really does something. This routine
2085 does not look inside SEQUENCEs. Until reload has completed, this is the
2086 same as next_real_insn. */
2089 active_insn_p (insn
)
2092 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2093 || (GET_CODE (insn
) == INSN
2094 && (! reload_completed
2095 || (GET_CODE (PATTERN (insn
)) != USE
2096 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2100 next_active_insn (insn
)
2105 insn
= NEXT_INSN (insn
);
2106 if (insn
== 0 || active_insn_p (insn
))
2113 /* Find the last insn before INSN that really does something. This routine
2114 does not look inside SEQUENCEs. Until reload has completed, this is the
2115 same as prev_real_insn. */
2118 prev_active_insn (insn
)
2123 insn
= PREV_INSN (insn
);
2124 if (insn
== 0 || active_insn_p (insn
))
2131 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2139 insn
= NEXT_INSN (insn
);
2140 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2147 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2155 insn
= PREV_INSN (insn
);
2156 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2164 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2165 and REG_CC_USER notes so we can find it. */
2168 link_cc0_insns (insn
)
2171 rtx user
= next_nonnote_insn (insn
);
2173 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2174 user
= XVECEXP (PATTERN (user
), 0, 0);
2176 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2178 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2181 /* Return the next insn that uses CC0 after INSN, which is assumed to
2182 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2183 applied to the result of this function should yield INSN).
2185 Normally, this is simply the next insn. However, if a REG_CC_USER note
2186 is present, it contains the insn that uses CC0.
2188 Return 0 if we can't find the insn. */
2191 next_cc0_user (insn
)
2194 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2197 return XEXP (note
, 0);
2199 insn
= next_nonnote_insn (insn
);
2200 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2201 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2203 if (insn
&& GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2204 && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2210 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2211 note, it is the previous insn. */
2214 prev_cc0_setter (insn
)
2217 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2220 return XEXP (note
, 0);
2222 insn
= prev_nonnote_insn (insn
);
2223 if (! sets_cc0_p (PATTERN (insn
)))
2230 /* Try splitting insns that can be split for better scheduling.
2231 PAT is the pattern which might split.
2232 TRIAL is the insn providing PAT.
2233 LAST is non-zero if we should return the last insn of the sequence produced.
2235 If this routine succeeds in splitting, it returns the first or last
2236 replacement insn depending on the value of LAST. Otherwise, it
2237 returns TRIAL. If the insn to be returned can be split, it will be. */
2240 try_split (pat
, trial
, last
)
2244 rtx before
= PREV_INSN (trial
);
2245 rtx after
= NEXT_INSN (trial
);
2246 rtx seq
= split_insns (pat
, trial
);
2247 int has_barrier
= 0;
2250 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2251 We may need to handle this specially. */
2252 if (after
&& GET_CODE (after
) == BARRIER
)
2255 after
= NEXT_INSN (after
);
2260 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2261 The latter case will normally arise only when being done so that
2262 it, in turn, will be split (SFmode on the 29k is an example). */
2263 if (GET_CODE (seq
) == SEQUENCE
)
2265 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2266 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2267 increment the usage count so we don't delete the label. */
2270 if (GET_CODE (trial
) == JUMP_INSN
)
2271 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2272 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2274 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
2276 if (JUMP_LABEL (trial
))
2277 LABEL_NUSES (JUMP_LABEL (trial
))++;
2280 tem
= emit_insn_after (seq
, before
);
2282 delete_insn (trial
);
2284 emit_barrier_after (tem
);
2286 /* Recursively call try_split for each new insn created; by the
2287 time control returns here that insn will be fully split, so
2288 set LAST and continue from the insn after the one returned.
2289 We can't use next_active_insn here since AFTER may be a note.
2290 Ignore deleted insns, which can be occur if not optimizing. */
2291 for (tem
= NEXT_INSN (before
); tem
!= after
;
2292 tem
= NEXT_INSN (tem
))
2293 if (! INSN_DELETED_P (tem
)
2294 && GET_RTX_CLASS (GET_CODE (tem
)) == 'i')
2295 tem
= try_split (PATTERN (tem
), tem
, 1);
2297 /* Avoid infinite loop if the result matches the original pattern. */
2298 else if (rtx_equal_p (seq
, pat
))
2302 PATTERN (trial
) = seq
;
2303 INSN_CODE (trial
) = -1;
2304 try_split (seq
, trial
, last
);
2307 /* Return either the first or the last insn, depending on which was
2310 ? (after
? prev_active_insn (after
) : last_insn
)
2311 : next_active_insn (before
);
2317 /* Make and return an INSN rtx, initializing all its slots.
2318 Store PATTERN in the pattern slots. */
2321 make_insn_raw (pattern
)
2326 /* If in RTL generation phase, see if FREE_INSN can be used. */
2327 if (!ggc_p
&& free_insn
!= 0 && rtx_equal_function_value_matters
)
2330 free_insn
= NEXT_INSN (free_insn
);
2331 PUT_CODE (insn
, INSN
);
2334 insn
= rtx_alloc (INSN
);
2336 INSN_UID (insn
) = cur_insn_uid
++;
2337 PATTERN (insn
) = pattern
;
2338 INSN_CODE (insn
) = -1;
2339 LOG_LINKS (insn
) = NULL
;
2340 REG_NOTES (insn
) = NULL
;
2342 #ifdef ENABLE_RTL_CHECKING
2344 && GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2345 && (returnjump_p (insn
)
2346 || (GET_CODE (insn
) == SET
2347 && SET_DEST (insn
) == pc_rtx
)))
2349 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2357 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2360 make_jump_insn_raw (pattern
)
2365 insn
= rtx_alloc (JUMP_INSN
);
2366 INSN_UID (insn
) = cur_insn_uid
++;
2368 PATTERN (insn
) = pattern
;
2369 INSN_CODE (insn
) = -1;
2370 LOG_LINKS (insn
) = NULL
;
2371 REG_NOTES (insn
) = NULL
;
2372 JUMP_LABEL (insn
) = NULL
;
2377 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2380 make_call_insn_raw (pattern
)
2385 insn
= rtx_alloc (CALL_INSN
);
2386 INSN_UID (insn
) = cur_insn_uid
++;
2388 PATTERN (insn
) = pattern
;
2389 INSN_CODE (insn
) = -1;
2390 LOG_LINKS (insn
) = NULL
;
2391 REG_NOTES (insn
) = NULL
;
2392 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2397 /* Add INSN to the end of the doubly-linked list.
2398 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2404 PREV_INSN (insn
) = last_insn
;
2405 NEXT_INSN (insn
) = 0;
2407 if (NULL
!= last_insn
)
2408 NEXT_INSN (last_insn
) = insn
;
2410 if (NULL
== first_insn
)
2416 /* Add INSN into the doubly-linked list after insn AFTER. This and
2417 the next should be the only functions called to insert an insn once
2418 delay slots have been filled since only they know how to update a
2422 add_insn_after (insn
, after
)
2425 rtx next
= NEXT_INSN (after
);
2427 if (optimize
&& INSN_DELETED_P (after
))
2430 NEXT_INSN (insn
) = next
;
2431 PREV_INSN (insn
) = after
;
2435 PREV_INSN (next
) = insn
;
2436 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2437 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2439 else if (last_insn
== after
)
2443 struct sequence_stack
*stack
= seq_stack
;
2444 /* Scan all pending sequences too. */
2445 for (; stack
; stack
= stack
->next
)
2446 if (after
== stack
->last
)
2456 NEXT_INSN (after
) = insn
;
2457 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2459 rtx sequence
= PATTERN (after
);
2460 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2464 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2465 the previous should be the only functions called to insert an insn once
2466 delay slots have been filled since only they know how to update a
2470 add_insn_before (insn
, before
)
2473 rtx prev
= PREV_INSN (before
);
2475 if (optimize
&& INSN_DELETED_P (before
))
2478 PREV_INSN (insn
) = prev
;
2479 NEXT_INSN (insn
) = before
;
2483 NEXT_INSN (prev
) = insn
;
2484 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2486 rtx sequence
= PATTERN (prev
);
2487 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2490 else if (first_insn
== before
)
2494 struct sequence_stack
*stack
= seq_stack
;
2495 /* Scan all pending sequences too. */
2496 for (; stack
; stack
= stack
->next
)
2497 if (before
== stack
->first
)
2499 stack
->first
= insn
;
2507 PREV_INSN (before
) = insn
;
2508 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2509 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2512 /* Remove an insn from its doubly-linked list. This function knows how
2513 to handle sequences. */
2518 rtx next
= NEXT_INSN (insn
);
2519 rtx prev
= PREV_INSN (insn
);
2522 NEXT_INSN (prev
) = next
;
2523 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2525 rtx sequence
= PATTERN (prev
);
2526 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
2529 else if (first_insn
== insn
)
2533 struct sequence_stack
*stack
= seq_stack
;
2534 /* Scan all pending sequences too. */
2535 for (; stack
; stack
= stack
->next
)
2536 if (insn
== stack
->first
)
2538 stack
->first
= next
;
2548 PREV_INSN (next
) = prev
;
2549 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2550 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
2552 else if (last_insn
== insn
)
2556 struct sequence_stack
*stack
= seq_stack
;
2557 /* Scan all pending sequences too. */
2558 for (; stack
; stack
= stack
->next
)
2559 if (insn
== stack
->last
)
2570 /* Delete all insns made since FROM.
2571 FROM becomes the new last instruction. */
2574 delete_insns_since (from
)
2580 NEXT_INSN (from
) = 0;
2584 /* This function is deprecated, please use sequences instead.
2586 Move a consecutive bunch of insns to a different place in the chain.
2587 The insns to be moved are those between FROM and TO.
2588 They are moved to a new position after the insn AFTER.
2589 AFTER must not be FROM or TO or any insn in between.
2591 This function does not know about SEQUENCEs and hence should not be
2592 called after delay-slot filling has been done. */
2595 reorder_insns (from
, to
, after
)
2596 rtx from
, to
, after
;
2598 /* Splice this bunch out of where it is now. */
2599 if (PREV_INSN (from
))
2600 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2602 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2603 if (last_insn
== to
)
2604 last_insn
= PREV_INSN (from
);
2605 if (first_insn
== from
)
2606 first_insn
= NEXT_INSN (to
);
2608 /* Make the new neighbors point to it and it to them. */
2609 if (NEXT_INSN (after
))
2610 PREV_INSN (NEXT_INSN (after
)) = to
;
2612 NEXT_INSN (to
) = NEXT_INSN (after
);
2613 PREV_INSN (from
) = after
;
2614 NEXT_INSN (after
) = from
;
2615 if (after
== last_insn
)
2619 /* Return the line note insn preceding INSN. */
2622 find_line_note (insn
)
2625 if (no_line_numbers
)
2628 for (; insn
; insn
= PREV_INSN (insn
))
2629 if (GET_CODE (insn
) == NOTE
2630 && NOTE_LINE_NUMBER (insn
) >= 0)
2636 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2637 of the moved insns when debugging. This may insert a note between AFTER
2638 and FROM, and another one after TO. */
2641 reorder_insns_with_line_notes (from
, to
, after
)
2642 rtx from
, to
, after
;
2644 rtx from_line
= find_line_note (from
);
2645 rtx after_line
= find_line_note (after
);
2647 reorder_insns (from
, to
, after
);
2649 if (from_line
== after_line
)
2653 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2654 NOTE_LINE_NUMBER (from_line
),
2657 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2658 NOTE_LINE_NUMBER (after_line
),
2662 /* Remove unncessary notes from the instruction stream. */
2665 remove_unncessary_notes ()
2670 /* Remove NOTE_INSN_DELETED notes. We must not remove the first
2671 instruction in the function because the compiler depends on the
2672 first instruction being a note. */
2673 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
2675 /* Remember what's next. */
2676 next
= NEXT_INSN (insn
);
2678 /* We're only interested in notes. */
2679 if (GET_CODE (insn
) != NOTE
)
2682 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_DELETED
)
2688 /* Emit an insn of given code and pattern
2689 at a specified place within the doubly-linked list. */
2691 /* Make an instruction with body PATTERN
2692 and output it before the instruction BEFORE. */
2695 emit_insn_before (pattern
, before
)
2696 register rtx pattern
, before
;
2698 register rtx insn
= before
;
2700 if (GET_CODE (pattern
) == SEQUENCE
)
2704 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2706 insn
= XVECEXP (pattern
, 0, i
);
2707 add_insn_before (insn
, before
);
2709 if (!ggc_p
&& XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2710 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2714 insn
= make_insn_raw (pattern
);
2715 add_insn_before (insn
, before
);
2721 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2724 emit_block_insn_before (pattern
, before
, block
)
2725 rtx pattern
, before
;
2728 rtx prev
= PREV_INSN (before
);
2729 rtx r
= emit_insn_before (pattern
, before
);
2730 if (block
&& block
->head
== before
)
2731 block
->head
= NEXT_INSN (prev
);
2735 /* Make an instruction with body PATTERN and code JUMP_INSN
2736 and output it before the instruction BEFORE. */
2739 emit_jump_insn_before (pattern
, before
)
2740 register rtx pattern
, before
;
2744 if (GET_CODE (pattern
) == SEQUENCE
)
2745 insn
= emit_insn_before (pattern
, before
);
2748 insn
= make_jump_insn_raw (pattern
);
2749 add_insn_before (insn
, before
);
2755 /* Make an instruction with body PATTERN and code CALL_INSN
2756 and output it before the instruction BEFORE. */
2759 emit_call_insn_before (pattern
, before
)
2760 register rtx pattern
, before
;
2764 if (GET_CODE (pattern
) == SEQUENCE
)
2765 insn
= emit_insn_before (pattern
, before
);
2768 insn
= make_call_insn_raw (pattern
);
2769 add_insn_before (insn
, before
);
2770 PUT_CODE (insn
, CALL_INSN
);
2776 /* Make an insn of code BARRIER
2777 and output it before the insn BEFORE. */
2780 emit_barrier_before (before
)
2781 register rtx before
;
2783 register rtx insn
= rtx_alloc (BARRIER
);
2785 INSN_UID (insn
) = cur_insn_uid
++;
2787 add_insn_before (insn
, before
);
2791 /* Emit the label LABEL before the insn BEFORE. */
2794 emit_label_before (label
, before
)
2797 /* This can be called twice for the same label as a result of the
2798 confusion that follows a syntax error! So make it harmless. */
2799 if (INSN_UID (label
) == 0)
2801 INSN_UID (label
) = cur_insn_uid
++;
2802 add_insn_before (label
, before
);
2808 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2811 emit_note_before (subtype
, before
)
2815 register rtx note
= rtx_alloc (NOTE
);
2816 INSN_UID (note
) = cur_insn_uid
++;
2817 NOTE_SOURCE_FILE (note
) = 0;
2818 NOTE_LINE_NUMBER (note
) = subtype
;
2820 add_insn_before (note
, before
);
2824 /* Make an insn of code INSN with body PATTERN
2825 and output it after the insn AFTER. */
2828 emit_insn_after (pattern
, after
)
2829 register rtx pattern
, after
;
2831 register rtx insn
= after
;
2833 if (GET_CODE (pattern
) == SEQUENCE
)
2837 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2839 insn
= XVECEXP (pattern
, 0, i
);
2840 add_insn_after (insn
, after
);
2843 if (!ggc_p
&& XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2844 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2848 insn
= make_insn_raw (pattern
);
2849 add_insn_after (insn
, after
);
2855 /* Similar to emit_insn_after, except that line notes are to be inserted so
2856 as to act as if this insn were at FROM. */
2859 emit_insn_after_with_line_notes (pattern
, after
, from
)
2860 rtx pattern
, after
, from
;
2862 rtx from_line
= find_line_note (from
);
2863 rtx after_line
= find_line_note (after
);
2864 rtx insn
= emit_insn_after (pattern
, after
);
2867 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2868 NOTE_LINE_NUMBER (from_line
),
2872 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2873 NOTE_LINE_NUMBER (after_line
),
2877 /* Similar to emit_insn_after, but update basic block boundaries as well. */
2880 emit_block_insn_after (pattern
, after
, block
)
2884 rtx r
= emit_insn_after (pattern
, after
);
2885 if (block
&& block
->end
== after
)
2890 /* Make an insn of code JUMP_INSN with body PATTERN
2891 and output it after the insn AFTER. */
2894 emit_jump_insn_after (pattern
, after
)
2895 register rtx pattern
, after
;
2899 if (GET_CODE (pattern
) == SEQUENCE
)
2900 insn
= emit_insn_after (pattern
, after
);
2903 insn
= make_jump_insn_raw (pattern
);
2904 add_insn_after (insn
, after
);
2910 /* Make an insn of code BARRIER
2911 and output it after the insn AFTER. */
2914 emit_barrier_after (after
)
2917 register rtx insn
= rtx_alloc (BARRIER
);
2919 INSN_UID (insn
) = cur_insn_uid
++;
2921 add_insn_after (insn
, after
);
2925 /* Emit the label LABEL after the insn AFTER. */
2928 emit_label_after (label
, after
)
2931 /* This can be called twice for the same label
2932 as a result of the confusion that follows a syntax error!
2933 So make it harmless. */
2934 if (INSN_UID (label
) == 0)
2936 INSN_UID (label
) = cur_insn_uid
++;
2937 add_insn_after (label
, after
);
2943 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2946 emit_note_after (subtype
, after
)
2950 register rtx note
= rtx_alloc (NOTE
);
2951 INSN_UID (note
) = cur_insn_uid
++;
2952 NOTE_SOURCE_FILE (note
) = 0;
2953 NOTE_LINE_NUMBER (note
) = subtype
;
2954 add_insn_after (note
, after
);
2958 /* Emit a line note for FILE and LINE after the insn AFTER. */
2961 emit_line_note_after (file
, line
, after
)
2968 if (no_line_numbers
&& line
> 0)
2974 note
= rtx_alloc (NOTE
);
2975 INSN_UID (note
) = cur_insn_uid
++;
2976 NOTE_SOURCE_FILE (note
) = file
;
2977 NOTE_LINE_NUMBER (note
) = line
;
2978 add_insn_after (note
, after
);
2982 /* Make an insn of code INSN with pattern PATTERN
2983 and add it to the end of the doubly-linked list.
2984 If PATTERN is a SEQUENCE, take the elements of it
2985 and emit an insn for each element.
2987 Returns the last insn emitted. */
2993 rtx insn
= last_insn
;
2995 if (GET_CODE (pattern
) == SEQUENCE
)
2999 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3001 insn
= XVECEXP (pattern
, 0, i
);
3004 if (!ggc_p
&& XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
3005 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
3009 insn
= make_insn_raw (pattern
);
3016 /* Emit the insns in a chain starting with INSN.
3017 Return the last insn emitted. */
3027 rtx next
= NEXT_INSN (insn
);
3036 /* Emit the insns in a chain starting with INSN and place them in front of
3037 the insn BEFORE. Return the last insn emitted. */
3040 emit_insns_before (insn
, before
)
3048 rtx next
= NEXT_INSN (insn
);
3049 add_insn_before (insn
, before
);
3057 /* Emit the insns in a chain starting with FIRST and place them in back of
3058 the insn AFTER. Return the last insn emitted. */
3061 emit_insns_after (first
, after
)
3066 register rtx after_after
;
3074 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3077 after_after
= NEXT_INSN (after
);
3079 NEXT_INSN (after
) = first
;
3080 PREV_INSN (first
) = after
;
3081 NEXT_INSN (last
) = after_after
;
3083 PREV_INSN (after_after
) = last
;
3085 if (after
== last_insn
)
3090 /* Make an insn of code JUMP_INSN with pattern PATTERN
3091 and add it to the end of the doubly-linked list. */
3094 emit_jump_insn (pattern
)
3097 if (GET_CODE (pattern
) == SEQUENCE
)
3098 return emit_insn (pattern
);
3101 register rtx insn
= make_jump_insn_raw (pattern
);
3107 /* Make an insn of code CALL_INSN with pattern PATTERN
3108 and add it to the end of the doubly-linked list. */
3111 emit_call_insn (pattern
)
3114 if (GET_CODE (pattern
) == SEQUENCE
)
3115 return emit_insn (pattern
);
3118 register rtx insn
= make_call_insn_raw (pattern
);
3120 PUT_CODE (insn
, CALL_INSN
);
3125 /* Add the label LABEL to the end of the doubly-linked list. */
3131 /* This can be called twice for the same label
3132 as a result of the confusion that follows a syntax error!
3133 So make it harmless. */
3134 if (INSN_UID (label
) == 0)
3136 INSN_UID (label
) = cur_insn_uid
++;
3142 /* Make an insn of code BARRIER
3143 and add it to the end of the doubly-linked list. */
3148 register rtx barrier
= rtx_alloc (BARRIER
);
3149 INSN_UID (barrier
) = cur_insn_uid
++;
3154 /* Make an insn of code NOTE
3155 with data-fields specified by FILE and LINE
3156 and add it to the end of the doubly-linked list,
3157 but only if line-numbers are desired for debugging info. */
3160 emit_line_note (file
, line
)
3164 set_file_and_line_for_stmt (file
, line
);
3167 if (no_line_numbers
)
3171 return emit_note (file
, line
);
3174 /* Make an insn of code NOTE
3175 with data-fields specified by FILE and LINE
3176 and add it to the end of the doubly-linked list.
3177 If it is a line-number NOTE, omit it if it matches the previous one. */
3180 emit_note (file
, line
)
3188 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3189 && line
== last_linenum
)
3191 last_filename
= file
;
3192 last_linenum
= line
;
3195 if (no_line_numbers
&& line
> 0)
3201 note
= rtx_alloc (NOTE
);
3202 INSN_UID (note
) = cur_insn_uid
++;
3203 NOTE_SOURCE_FILE (note
) = file
;
3204 NOTE_LINE_NUMBER (note
) = line
;
3209 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3212 emit_line_note_force (file
, line
)
3217 return emit_line_note (file
, line
);
3220 /* Cause next statement to emit a line note even if the line number
3221 has not changed. This is used at the beginning of a function. */
3224 force_next_line_note ()
3229 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3230 note of this type already exists, remove it first. */
3233 set_unique_reg_note (insn
, kind
, datum
)
3238 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3240 /* First remove the note if there already is one. */
3242 remove_note (insn
, note
);
3244 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3247 /* Return an indication of which type of insn should have X as a body.
3248 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3254 if (GET_CODE (x
) == CODE_LABEL
)
3256 if (GET_CODE (x
) == CALL
)
3258 if (GET_CODE (x
) == RETURN
)
3260 if (GET_CODE (x
) == SET
)
3262 if (SET_DEST (x
) == pc_rtx
)
3264 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3269 if (GET_CODE (x
) == PARALLEL
)
3272 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3273 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3275 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3276 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3278 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3279 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3285 /* Emit the rtl pattern X as an appropriate kind of insn.
3286 If X is a label, it is simply added into the insn chain. */
3292 enum rtx_code code
= classify_insn (x
);
3294 if (code
== CODE_LABEL
)
3295 return emit_label (x
);
3296 else if (code
== INSN
)
3297 return emit_insn (x
);
3298 else if (code
== JUMP_INSN
)
3300 register rtx insn
= emit_jump_insn (x
);
3301 if (simplejump_p (insn
) || GET_CODE (x
) == RETURN
)
3302 return emit_barrier ();
3305 else if (code
== CALL_INSN
)
3306 return emit_call_insn (x
);
3311 /* Begin emitting insns to a sequence which can be packaged in an
3312 RTL_EXPR. If this sequence will contain something that might cause
3313 the compiler to pop arguments to function calls (because those
3314 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3315 details), use do_pending_stack_adjust before calling this function.
3316 That will ensure that the deferred pops are not accidentally
3317 emitted in the middel of this sequence. */
3322 struct sequence_stack
*tem
;
3324 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
3326 tem
->next
= seq_stack
;
3327 tem
->first
= first_insn
;
3328 tem
->last
= last_insn
;
3329 tem
->sequence_rtl_expr
= seq_rtl_expr
;
3337 /* Similarly, but indicate that this sequence will be placed in T, an
3338 RTL_EXPR. See the documentation for start_sequence for more
3339 information about how to use this function. */
3342 start_sequence_for_rtl_expr (t
)
3350 /* Set up the insn chain starting with FIRST as the current sequence,
3351 saving the previously current one. See the documentation for
3352 start_sequence for more information about how to use this function. */
3355 push_to_sequence (first
)
3362 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3368 /* Set up the outer-level insn chain
3369 as the current sequence, saving the previously current one. */
3372 push_topmost_sequence ()
3374 struct sequence_stack
*stack
, *top
= NULL
;
3378 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3381 first_insn
= top
->first
;
3382 last_insn
= top
->last
;
3383 seq_rtl_expr
= top
->sequence_rtl_expr
;
3386 /* After emitting to the outer-level insn chain, update the outer-level
3387 insn chain, and restore the previous saved state. */
3390 pop_topmost_sequence ()
3392 struct sequence_stack
*stack
, *top
= NULL
;
3394 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3397 top
->first
= first_insn
;
3398 top
->last
= last_insn
;
3399 /* ??? Why don't we save seq_rtl_expr here? */
3404 /* After emitting to a sequence, restore previous saved state.
3406 To get the contents of the sequence just made, you must call
3407 `gen_sequence' *before* calling here.
3409 If the compiler might have deferred popping arguments while
3410 generating this sequence, and this sequence will not be immediately
3411 inserted into the instruction stream, use do_pending_stack_adjust
3412 before calling gen_sequence. That will ensure that the deferred
3413 pops are inserted into this sequence, and not into some random
3414 location in the instruction stream. See INHIBIT_DEFER_POP for more
3415 information about deferred popping of arguments. */
3420 struct sequence_stack
*tem
= seq_stack
;
3422 first_insn
= tem
->first
;
3423 last_insn
= tem
->last
;
3424 seq_rtl_expr
= tem
->sequence_rtl_expr
;
3425 seq_stack
= tem
->next
;
3430 /* Return 1 if currently emitting into a sequence. */
3435 return seq_stack
!= 0;
3438 /* Generate a SEQUENCE rtx containing the insns already emitted
3439 to the current sequence.
3441 This is how the gen_... function from a DEFINE_EXPAND
3442 constructs the SEQUENCE that it returns. */
3452 /* Count the insns in the chain. */
3454 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3457 /* If only one insn, return it rather than a SEQUENCE.
3458 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3459 the case of an empty list.)
3460 We only return the pattern of an insn if its code is INSN and it
3461 has no notes. This ensures that no information gets lost. */
3463 && ! RTX_FRAME_RELATED_P (first_insn
)
3464 && GET_CODE (first_insn
) == INSN
3465 /* Don't throw away any reg notes. */
3466 && REG_NOTES (first_insn
) == 0)
3470 NEXT_INSN (first_insn
) = free_insn
;
3471 free_insn
= first_insn
;
3473 return PATTERN (first_insn
);
3476 /* Put them in a vector. See if we already have a SEQUENCE of the
3477 appropriate length around. */
3478 if (!ggc_p
&& len
< SEQUENCE_RESULT_SIZE
3479 && (result
= sequence_result
[len
]) != 0)
3480 sequence_result
[len
] = 0;
3483 /* Ensure that this rtl goes in saveable_obstack, since we may
3485 push_obstacks_nochange ();
3486 rtl_in_saveable_obstack ();
3487 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3491 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3492 XVECEXP (result
, 0, i
) = tem
;
3497 /* Put the various virtual registers into REGNO_REG_RTX. */
3500 init_virtual_regs (es
)
3501 struct emit_status
*es
;
3503 rtx
*ptr
= es
->x_regno_reg_rtx
;
3504 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3505 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3506 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3507 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3508 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3512 clear_emit_caches ()
3516 /* Clear the start_sequence/gen_sequence cache. */
3517 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3518 sequence_result
[i
] = 0;
3522 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3523 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
3524 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
3525 static int copy_insn_n_scratches
;
3527 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3528 copied an ASM_OPERANDS.
3529 In that case, it is the original input-operand vector. */
3530 static rtvec orig_asm_operands_vector
;
3532 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3533 copied an ASM_OPERANDS.
3534 In that case, it is the copied input-operand vector. */
3535 static rtvec copy_asm_operands_vector
;
3537 /* Likewise for the constraints vector. */
3538 static rtvec orig_asm_constraints_vector
;
3539 static rtvec copy_asm_constraints_vector
;
3541 /* Recursively create a new copy of an rtx for copy_insn.
3542 This function differs from copy_rtx in that it handles SCRATCHes and
3543 ASM_OPERANDs properly.
3544 Normally, this function is not used directly; use copy_insn as front end.
3545 However, you could first copy an insn pattern with copy_insn and then use
3546 this function afterwards to properly copy any REG_NOTEs containing
3555 register RTX_CODE code
;
3556 register const char *format_ptr
;
3558 code
= GET_CODE (orig
);
3574 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
3575 if (copy_insn_scratch_in
[i
] == orig
)
3576 return copy_insn_scratch_out
[i
];
3580 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3581 a LABEL_REF, it isn't sharable. */
3582 if (GET_CODE (XEXP (orig
, 0)) == PLUS
3583 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
3584 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
3588 /* A MEM with a constant address is not sharable. The problem is that
3589 the constant address may need to be reloaded. If the mem is shared,
3590 then reloading one copy of this mem will cause all copies to appear
3591 to have been reloaded. */
3597 copy
= rtx_alloc (code
);
3599 /* Copy the various flags, and other information. We assume that
3600 all fields need copying, and then clear the fields that should
3601 not be copied. That is the sensible default behavior, and forces
3602 us to explicitly document why we are *not* copying a flag. */
3603 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
3605 /* We do not copy the USED flag, which is used as a mark bit during
3606 walks over the RTL. */
3609 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3610 if (GET_RTX_CLASS (code
) == 'i')
3614 copy
->frame_related
= 0;
3617 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
3619 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
3621 copy
->fld
[i
] = orig
->fld
[i
];
3622 switch (*format_ptr
++)
3625 if (XEXP (orig
, i
) != NULL
)
3626 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
3631 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
3632 XVEC (copy
, i
) = copy_asm_constraints_vector
;
3633 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
3634 XVEC (copy
, i
) = copy_asm_operands_vector
;
3635 else if (XVEC (orig
, i
) != NULL
)
3637 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
3638 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
3639 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
3645 bitmap new_bits
= BITMAP_OBSTACK_ALLOC (rtl_obstack
);
3646 bitmap_copy (new_bits
, XBITMAP (orig
, i
));
3647 XBITMAP (copy
, i
) = new_bits
;
3658 /* These are left unchanged. */
3666 if (code
== SCRATCH
)
3668 i
= copy_insn_n_scratches
++;
3669 if (i
>= MAX_RECOG_OPERANDS
)
3671 copy_insn_scratch_in
[i
] = orig
;
3672 copy_insn_scratch_out
[i
] = copy
;
3674 else if (code
== ASM_OPERANDS
)
3676 orig_asm_operands_vector
= XVEC (orig
, 3);
3677 copy_asm_operands_vector
= XVEC (copy
, 3);
3678 orig_asm_constraints_vector
= XVEC (orig
, 4);
3679 copy_asm_constraints_vector
= XVEC (copy
, 4);
3685 /* Create a new copy of an rtx.
3686 This function differs from copy_rtx in that it handles SCRATCHes and
3687 ASM_OPERANDs properly.
3688 INSN doesn't really have to be a full INSN; it could be just the
3694 copy_insn_n_scratches
= 0;
3695 orig_asm_operands_vector
= 0;
3696 orig_asm_constraints_vector
= 0;
3697 copy_asm_operands_vector
= 0;
3698 copy_asm_constraints_vector
= 0;
3699 return copy_insn_1 (insn
);
3702 /* Initialize data structures and variables in this file
3703 before generating rtl for each function. */
3708 struct function
*f
= cfun
;
3710 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
3713 seq_rtl_expr
= NULL
;
3715 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3718 first_label_num
= label_num
;
3722 clear_emit_caches ();
3724 /* Init the tables that describe all the pseudo regs. */
3726 f
->emit
->regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
3728 f
->emit
->regno_pointer_flag
3729 = (char *) xcalloc (f
->emit
->regno_pointer_flag_length
, sizeof (char));
3731 f
->emit
->regno_pointer_align
3732 = (char *) xcalloc (f
->emit
->regno_pointer_flag_length
,
3736 = (rtx
*) xcalloc (f
->emit
->regno_pointer_flag_length
* sizeof (rtx
),
3739 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3740 init_virtual_regs (f
->emit
);
3742 /* Indicate that the virtual registers and stack locations are
3744 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
3745 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
3746 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM
) = 1;
3747 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
3749 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
3750 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
3751 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
3752 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
3753 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM
) = 1;
3755 #ifdef STACK_BOUNDARY
3756 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3757 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3758 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
)
3759 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3760 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3762 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
)
3763 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3764 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
)
3765 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3766 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
)
3767 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3768 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
)
3769 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3770 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = UNITS_PER_WORD
;
3773 #ifdef INIT_EXPANDERS
3778 /* Mark SS for GC. */
3781 mark_sequence_stack (ss
)
3782 struct sequence_stack
*ss
;
3786 ggc_mark_rtx (ss
->first
);
3787 ggc_mark_tree (ss
->sequence_rtl_expr
);
3792 /* Mark ES for GC. */
3795 mark_emit_status (es
)
3796 struct emit_status
*es
;
3804 for (i
= es
->regno_pointer_flag_length
, r
= es
->x_regno_reg_rtx
;
3808 mark_sequence_stack (es
->sequence_stack
);
3809 ggc_mark_tree (es
->sequence_rtl_expr
);
3810 ggc_mark_rtx (es
->x_first_insn
);
3813 /* Create some permanent unique rtl objects shared between all functions.
3814 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3817 init_emit_once (line_numbers
)
3821 enum machine_mode mode
;
3822 enum machine_mode double_mode
;
3824 no_line_numbers
= ! line_numbers
;
3826 /* Compute the word and byte modes. */
3828 byte_mode
= VOIDmode
;
3829 word_mode
= VOIDmode
;
3830 double_mode
= VOIDmode
;
3832 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3833 mode
= GET_MODE_WIDER_MODE (mode
))
3835 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
3836 && byte_mode
== VOIDmode
)
3839 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
3840 && word_mode
== VOIDmode
)
3844 #ifndef DOUBLE_TYPE_SIZE
3845 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3848 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3849 mode
= GET_MODE_WIDER_MODE (mode
))
3851 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
3852 && double_mode
== VOIDmode
)
3856 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
3858 /* Assign register numbers to the globally defined register rtx.
3859 This must be done at runtime because the register number field
3860 is in a union and some compilers can't initialize unions. */
3862 pc_rtx
= gen_rtx (PC
, VOIDmode
);
3863 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
3864 stack_pointer_rtx
= gen_rtx_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
3865 frame_pointer_rtx
= gen_rtx_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
3866 if (hard_frame_pointer_rtx
== 0)
3867 hard_frame_pointer_rtx
= gen_rtx_raw_REG (Pmode
,
3868 HARD_FRAME_POINTER_REGNUM
);
3869 if (arg_pointer_rtx
== 0)
3870 arg_pointer_rtx
= gen_rtx_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
3871 virtual_incoming_args_rtx
=
3872 gen_rtx_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
3873 virtual_stack_vars_rtx
=
3874 gen_rtx_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
3875 virtual_stack_dynamic_rtx
=
3876 gen_rtx_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
3877 virtual_outgoing_args_rtx
=
3878 gen_rtx_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
3879 virtual_cfa_rtx
= gen_rtx_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
3881 /* These rtx must be roots if GC is enabled. */
3883 ggc_add_rtx_root (global_rtl
, GR_MAX
);
3885 #ifdef INIT_EXPANDERS
3886 /* This is to initialize save_machine_status and restore_machine_status before
3887 the first call to push_function_context_to. This is needed by the Chill
3888 front end which calls push_function_context_to before the first cal to
3889 init_function_start. */
3893 /* Create the unique rtx's for certain rtx codes and operand values. */
3895 /* Don't use gen_rtx here since gen_rtx in this case
3896 tries to use these variables. */
3897 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
3898 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
3899 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
3901 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
3903 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
3904 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
3905 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
3907 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
3909 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
3910 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
3911 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
3912 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
3914 for (i
= 0; i
<= 2; i
++)
3916 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3917 mode
= GET_MODE_WIDER_MODE (mode
))
3919 rtx tem
= rtx_alloc (CONST_DOUBLE
);
3920 union real_extract u
;
3922 bzero ((char *) &u
, sizeof u
); /* Zero any holes in a structure. */
3923 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
3925 bcopy ((char *) &u
, (char *) &CONST_DOUBLE_LOW (tem
), sizeof u
);
3926 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
3927 PUT_MODE (tem
, mode
);
3929 const_tiny_rtx
[i
][(int) mode
] = tem
;
3932 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
3934 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3935 mode
= GET_MODE_WIDER_MODE (mode
))
3936 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3938 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
3940 mode
= GET_MODE_WIDER_MODE (mode
))
3941 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3944 for (mode
= CCmode
; mode
< MAX_MACHINE_MODE
; ++mode
)
3945 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3946 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
3948 ggc_add_rtx_root (&const_tiny_rtx
[0][0], sizeof(const_tiny_rtx
)/sizeof(rtx
));
3949 ggc_add_rtx_root (&const_true_rtx
, 1);
3951 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3952 return_address_pointer_rtx
3953 = gen_rtx_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
3957 struct_value_rtx
= STRUCT_VALUE
;
3959 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
3962 #ifdef STRUCT_VALUE_INCOMING
3963 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
3965 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3966 struct_value_incoming_rtx
3967 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
3969 struct_value_incoming_rtx
= struct_value_rtx
;
3973 #ifdef STATIC_CHAIN_REGNUM
3974 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
3976 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3977 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
3978 static_chain_incoming_rtx
3979 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
3982 static_chain_incoming_rtx
= static_chain_rtx
;
3986 static_chain_rtx
= STATIC_CHAIN
;
3988 #ifdef STATIC_CHAIN_INCOMING
3989 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
3991 static_chain_incoming_rtx
= static_chain_rtx
;
3995 #ifdef PIC_OFFSET_TABLE_REGNUM
3996 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
3999 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4000 ggc_add_rtx_root (&struct_value_rtx
, 1);
4001 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4002 ggc_add_rtx_root (&static_chain_rtx
, 1);
4003 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4004 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4007 /* Query and clear/ restore no_line_numbers. This is used by the
4008 switch / case handling in stmt.c to give proper line numbers in
4009 warnings about unreachable code. */
4012 force_line_numbers ()
4014 int old
= no_line_numbers
;
4016 no_line_numbers
= 0;
4018 force_next_line_note ();
4023 restore_line_number_status (old_value
)
4026 no_line_numbers
= old_value
;