1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992-2012 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
47 #include "hard-reg-set.h"
49 #include "insn-config.h"
52 #include "basic-block.h"
55 #include "langhooks.h"
60 struct target_rtl default_target_rtl
;
62 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
65 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
67 /* Commonly used modes. */
69 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
70 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
71 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
72 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
74 /* Datastructures maintained for currently processed function in RTL form. */
76 struct rtl_data x_rtl
;
78 /* Indexed by pseudo register number, gives the rtx for that pseudo.
79 Allocated in parallel with regno_pointer_align.
80 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
81 with length attribute nested in top level structures. */
85 /* This is *not* reset after each function. It gives each CODE_LABEL
86 in the entire compilation a unique label number. */
88 static GTY(()) int label_num
= 1;
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
93 is set only for MODE_INT and MODE_VECTOR_INT modes. */
95 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
99 REAL_VALUE_TYPE dconst0
;
100 REAL_VALUE_TYPE dconst1
;
101 REAL_VALUE_TYPE dconst2
;
102 REAL_VALUE_TYPE dconstm1
;
103 REAL_VALUE_TYPE dconsthalf
;
105 /* Record fixed-point constant 0 and 1. */
106 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
107 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
109 /* We make one copy of (const_int C) where C is in
110 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
111 to save space during the compilation and simplify comparisons of
114 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
116 /* Standard pieces of rtx, to be substituted directly into things. */
119 rtx simple_return_rtx
;
122 /* A hash table storing CONST_INTs whose absolute value is greater
123 than MAX_SAVED_CONST_INT. */
125 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
126 htab_t const_int_htab
;
128 /* A hash table storing memory attribute structures. */
129 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
130 htab_t mem_attrs_htab
;
132 /* A hash table storing register attribute structures. */
133 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
134 htab_t reg_attrs_htab
;
136 /* A hash table storing all CONST_DOUBLEs. */
137 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
138 htab_t const_double_htab
;
140 /* A hash table storing all CONST_FIXEDs. */
141 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
142 htab_t const_fixed_htab
;
144 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
145 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
146 #define first_label_num (crtl->emit.x_first_label_num)
148 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
149 static void set_used_decls (tree
);
150 static void mark_label_nuses (rtx
);
151 static hashval_t
const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 static hashval_t
const_double_htab_hash (const void *);
154 static int const_double_htab_eq (const void *, const void *);
155 static rtx
lookup_const_double (rtx
);
156 static hashval_t
const_fixed_htab_hash (const void *);
157 static int const_fixed_htab_eq (const void *, const void *);
158 static rtx
lookup_const_fixed (rtx
);
159 static hashval_t
mem_attrs_htab_hash (const void *);
160 static int mem_attrs_htab_eq (const void *, const void *);
161 static hashval_t
reg_attrs_htab_hash (const void *);
162 static int reg_attrs_htab_eq (const void *, const void *);
163 static reg_attrs
*get_reg_attrs (tree
, int);
164 static rtx
gen_const_vector (enum machine_mode
, int);
165 static void copy_rtx_if_shared_1 (rtx
*orig
);
167 /* Probability of the conditional branch currently proceeded by try_split.
168 Set to -1 otherwise. */
169 int split_branch_probability
= -1;
171 /* Returns a hash code for X (which is a really a CONST_INT). */
174 const_int_htab_hash (const void *x
)
176 return (hashval_t
) INTVAL ((const_rtx
) x
);
179 /* Returns nonzero if the value represented by X (which is really a
180 CONST_INT) is the same as that given by Y (which is really a
184 const_int_htab_eq (const void *x
, const void *y
)
186 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
189 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
191 const_double_htab_hash (const void *x
)
193 const_rtx
const value
= (const_rtx
) x
;
196 if (GET_MODE (value
) == VOIDmode
)
197 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
200 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
201 /* MODE is used in the comparison, so it should be in the hash. */
202 h
^= GET_MODE (value
);
207 /* Returns nonzero if the value represented by X (really a ...)
208 is the same as that represented by Y (really a ...) */
210 const_double_htab_eq (const void *x
, const void *y
)
212 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
214 if (GET_MODE (a
) != GET_MODE (b
))
216 if (GET_MODE (a
) == VOIDmode
)
217 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
218 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
220 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
221 CONST_DOUBLE_REAL_VALUE (b
));
224 /* Returns a hash code for X (which is really a CONST_FIXED). */
227 const_fixed_htab_hash (const void *x
)
229 const_rtx
const value
= (const_rtx
) x
;
232 h
= fixed_hash (CONST_FIXED_VALUE (value
));
233 /* MODE is used in the comparison, so it should be in the hash. */
234 h
^= GET_MODE (value
);
238 /* Returns nonzero if the value represented by X (really a ...)
239 is the same as that represented by Y (really a ...). */
242 const_fixed_htab_eq (const void *x
, const void *y
)
244 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
246 if (GET_MODE (a
) != GET_MODE (b
))
248 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
251 /* Returns a hash code for X (which is a really a mem_attrs *). */
254 mem_attrs_htab_hash (const void *x
)
256 const mem_attrs
*const p
= (const mem_attrs
*) x
;
258 return (p
->alias
^ (p
->align
* 1000)
259 ^ (p
->addrspace
* 4000)
260 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
261 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
262 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
265 /* Return true if the given memory attributes are equal. */
268 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
270 return (p
->alias
== q
->alias
271 && p
->offset_known_p
== q
->offset_known_p
272 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
273 && p
->size_known_p
== q
->size_known_p
274 && (!p
->size_known_p
|| p
->size
== q
->size
)
275 && p
->align
== q
->align
276 && p
->addrspace
== q
->addrspace
277 && (p
->expr
== q
->expr
278 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
279 && operand_equal_p (p
->expr
, q
->expr
, 0))));
282 /* Returns nonzero if the value represented by X (which is really a
283 mem_attrs *) is the same as that given by Y (which is also really a
287 mem_attrs_htab_eq (const void *x
, const void *y
)
289 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
292 /* Set MEM's memory attributes so that they are the same as ATTRS. */
295 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
299 /* If everything is the default, we can just clear the attributes. */
300 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
306 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
309 *slot
= ggc_alloc_mem_attrs ();
310 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
313 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
316 /* Returns a hash code for X (which is a really a reg_attrs *). */
319 reg_attrs_htab_hash (const void *x
)
321 const reg_attrs
*const p
= (const reg_attrs
*) x
;
323 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
326 /* Returns nonzero if the value represented by X (which is really a
327 reg_attrs *) is the same as that given by Y (which is also really a
331 reg_attrs_htab_eq (const void *x
, const void *y
)
333 const reg_attrs
*const p
= (const reg_attrs
*) x
;
334 const reg_attrs
*const q
= (const reg_attrs
*) y
;
336 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
338 /* Allocate a new reg_attrs structure and insert it into the hash table if
339 one identical to it is not already in the table. We are doing this for
343 get_reg_attrs (tree decl
, int offset
)
348 /* If everything is the default, we can just return zero. */
349 if (decl
== 0 && offset
== 0)
353 attrs
.offset
= offset
;
355 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
358 *slot
= ggc_alloc_reg_attrs ();
359 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
362 return (reg_attrs
*) *slot
;
367 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
373 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
374 MEM_VOLATILE_P (x
) = true;
380 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
381 don't attempt to share with the various global pieces of rtl (such as
382 frame_pointer_rtx). */
385 gen_raw_REG (enum machine_mode mode
, int regno
)
387 rtx x
= gen_rtx_raw_REG (mode
, regno
);
388 ORIGINAL_REGNO (x
) = regno
;
392 /* There are some RTL codes that require special attention; the generation
393 functions do the raw handling. If you add to this list, modify
394 special_rtx in gengenrtl.c as well. */
397 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
401 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
402 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
404 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
405 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
406 return const_true_rtx
;
409 /* Look up the CONST_INT in the hash table. */
410 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
411 (hashval_t
) arg
, INSERT
);
413 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
419 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
421 return GEN_INT (trunc_int_for_mode (c
, mode
));
424 /* CONST_DOUBLEs might be created from pairs of integers, or from
425 REAL_VALUE_TYPEs. Also, their length is known only at run time,
426 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
428 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
429 hash table. If so, return its counterpart; otherwise add it
430 to the hash table and return it. */
432 lookup_const_double (rtx real
)
434 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
441 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
442 VALUE in mode MODE. */
444 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
446 rtx real
= rtx_alloc (CONST_DOUBLE
);
447 PUT_MODE (real
, mode
);
451 return lookup_const_double (real
);
454 /* Determine whether FIXED, a CONST_FIXED, already exists in the
455 hash table. If so, return its counterpart; otherwise add it
456 to the hash table and return it. */
459 lookup_const_fixed (rtx fixed
)
461 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
468 /* Return a CONST_FIXED rtx for a fixed-point value specified by
469 VALUE in mode MODE. */
472 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
474 rtx fixed
= rtx_alloc (CONST_FIXED
);
475 PUT_MODE (fixed
, mode
);
479 return lookup_const_fixed (fixed
);
482 /* Constructs double_int from rtx CST. */
485 rtx_to_double_int (const_rtx cst
)
489 if (CONST_INT_P (cst
))
490 r
= double_int::from_shwi (INTVAL (cst
));
491 else if (CONST_DOUBLE_AS_INT_P (cst
))
493 r
.low
= CONST_DOUBLE_LOW (cst
);
494 r
.high
= CONST_DOUBLE_HIGH (cst
);
503 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
507 immed_double_int_const (double_int i
, enum machine_mode mode
)
509 return immed_double_const (i
.low
, i
.high
, mode
);
512 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
513 of ints: I0 is the low-order word and I1 is the high-order word.
514 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
515 implied upper bits are copies of the high bit of i1. The value
516 itself is neither signed nor unsigned. Do not use this routine for
517 non-integer modes; convert to REAL_VALUE_TYPE and use
518 CONST_DOUBLE_FROM_REAL_VALUE. */
521 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
526 /* There are the following cases (note that there are no modes with
527 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
529 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
531 2) If the value of the integer fits into HOST_WIDE_INT anyway
532 (i.e., i1 consists only from copies of the sign bit, and sign
533 of i0 and i1 are the same), then we return a CONST_INT for i0.
534 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
535 if (mode
!= VOIDmode
)
537 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
538 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
539 /* We can get a 0 for an error mark. */
540 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
541 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
543 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
544 return gen_int_mode (i0
, mode
);
547 /* If this integer fits in one word, return a CONST_INT. */
548 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
551 /* We use VOIDmode for integers. */
552 value
= rtx_alloc (CONST_DOUBLE
);
553 PUT_MODE (value
, VOIDmode
);
555 CONST_DOUBLE_LOW (value
) = i0
;
556 CONST_DOUBLE_HIGH (value
) = i1
;
558 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
559 XWINT (value
, i
) = 0;
561 return lookup_const_double (value
);
565 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
567 /* In case the MD file explicitly references the frame pointer, have
568 all such references point to the same frame pointer. This is
569 used during frame pointer elimination to distinguish the explicit
570 references to these registers from pseudos that happened to be
573 If we have eliminated the frame pointer or arg pointer, we will
574 be using it as a normal register, for example as a spill
575 register. In such cases, we might be accessing it in a mode that
576 is not Pmode and therefore cannot use the pre-allocated rtx.
578 Also don't do this when we are making new REGs in reload, since
579 we don't want to get confused with the real pointers. */
581 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
583 if (regno
== FRAME_POINTER_REGNUM
584 && (!reload_completed
|| frame_pointer_needed
))
585 return frame_pointer_rtx
;
586 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
587 if (regno
== HARD_FRAME_POINTER_REGNUM
588 && (!reload_completed
|| frame_pointer_needed
))
589 return hard_frame_pointer_rtx
;
591 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
592 if (regno
== ARG_POINTER_REGNUM
)
593 return arg_pointer_rtx
;
595 #ifdef RETURN_ADDRESS_POINTER_REGNUM
596 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
597 return return_address_pointer_rtx
;
599 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
600 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
601 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
602 return pic_offset_table_rtx
;
603 if (regno
== STACK_POINTER_REGNUM
)
604 return stack_pointer_rtx
;
608 /* If the per-function register table has been set up, try to re-use
609 an existing entry in that table to avoid useless generation of RTL.
611 This code is disabled for now until we can fix the various backends
612 which depend on having non-shared hard registers in some cases. Long
613 term we want to re-enable this code as it can significantly cut down
614 on the amount of useless RTL that gets generated.
616 We'll also need to fix some code that runs after reload that wants to
617 set ORIGINAL_REGNO. */
622 && regno
< FIRST_PSEUDO_REGISTER
623 && reg_raw_mode
[regno
] == mode
)
624 return regno_reg_rtx
[regno
];
627 return gen_raw_REG (mode
, regno
);
631 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
633 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
635 /* This field is not cleared by the mere allocation of the rtx, so
642 /* Generate a memory referring to non-trapping constant memory. */
645 gen_const_mem (enum machine_mode mode
, rtx addr
)
647 rtx mem
= gen_rtx_MEM (mode
, addr
);
648 MEM_READONLY_P (mem
) = 1;
649 MEM_NOTRAP_P (mem
) = 1;
653 /* Generate a MEM referring to fixed portions of the frame, e.g., register
657 gen_frame_mem (enum machine_mode mode
, rtx addr
)
659 rtx mem
= gen_rtx_MEM (mode
, addr
);
660 MEM_NOTRAP_P (mem
) = 1;
661 set_mem_alias_set (mem
, get_frame_alias_set ());
665 /* Generate a MEM referring to a temporary use of the stack, not part
666 of the fixed stack frame. For example, something which is pushed
667 by a target splitter. */
669 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
671 rtx mem
= gen_rtx_MEM (mode
, addr
);
672 MEM_NOTRAP_P (mem
) = 1;
673 if (!cfun
->calls_alloca
)
674 set_mem_alias_set (mem
, get_frame_alias_set ());
678 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
679 this construct would be valid, and false otherwise. */
682 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
683 const_rtx reg
, unsigned int offset
)
685 unsigned int isize
= GET_MODE_SIZE (imode
);
686 unsigned int osize
= GET_MODE_SIZE (omode
);
688 /* All subregs must be aligned. */
689 if (offset
% osize
!= 0)
692 /* The subreg offset cannot be outside the inner object. */
696 /* ??? This should not be here. Temporarily continue to allow word_mode
697 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
698 Generally, backends are doing something sketchy but it'll take time to
700 if (omode
== word_mode
)
702 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
703 is the culprit here, and not the backends. */
704 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
706 /* Allow component subregs of complex and vector. Though given the below
707 extraction rules, it's not always clear what that means. */
708 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
709 && GET_MODE_INNER (imode
) == omode
)
711 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
712 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
713 represent this. It's questionable if this ought to be represented at
714 all -- why can't this all be hidden in post-reload splitters that make
715 arbitrarily mode changes to the registers themselves. */
716 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
718 /* Subregs involving floating point modes are not allowed to
719 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
720 (subreg:SI (reg:DF) 0) isn't. */
721 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
723 if (! (isize
== osize
724 /* LRA can use subreg to store a floating point value in
725 an integer mode. Although the floating point and the
726 integer modes need the same number of hard registers,
727 the size of floating point mode can be less than the
728 integer mode. LRA also uses subregs for a register
729 should be used in different mode in on insn. */
734 /* Paradoxical subregs must have offset zero. */
738 /* This is a normal subreg. Verify that the offset is representable. */
740 /* For hard registers, we already have most of these rules collected in
741 subreg_offset_representable_p. */
742 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
744 unsigned int regno
= REGNO (reg
);
746 #ifdef CANNOT_CHANGE_MODE_CLASS
747 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
748 && GET_MODE_INNER (imode
) == omode
)
750 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
754 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
757 /* For pseudo registers, we want most of the same checks. Namely:
758 If the register no larger than a word, the subreg must be lowpart.
759 If the register is larger than a word, the subreg must be the lowpart
760 of a subword. A subreg does *not* perform arbitrary bit extraction.
761 Given that we've already checked mode/offset alignment, we only have
762 to check subword subregs here. */
763 if (osize
< UNITS_PER_WORD
764 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
766 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
767 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
768 if (offset
% UNITS_PER_WORD
!= low_off
)
775 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
777 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
778 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
787 enum machine_mode inmode
;
789 inmode
= GET_MODE (reg
);
790 if (inmode
== VOIDmode
)
792 return gen_rtx_SUBREG (mode
, reg
,
793 subreg_lowpart_offset (mode
, inmode
));
797 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
800 gen_rtvec (int n
, ...)
808 /* Don't allocate an empty rtvec... */
815 rt_val
= rtvec_alloc (n
);
817 for (i
= 0; i
< n
; i
++)
818 rt_val
->elem
[i
] = va_arg (p
, rtx
);
825 gen_rtvec_v (int n
, rtx
*argp
)
830 /* Don't allocate an empty rtvec... */
834 rt_val
= rtvec_alloc (n
);
836 for (i
= 0; i
< n
; i
++)
837 rt_val
->elem
[i
] = *argp
++;
842 /* Return the number of bytes between the start of an OUTER_MODE
843 in-memory value and the start of an INNER_MODE in-memory value,
844 given that the former is a lowpart of the latter. It may be a
845 paradoxical lowpart, in which case the offset will be negative
846 on big-endian targets. */
849 byte_lowpart_offset (enum machine_mode outer_mode
,
850 enum machine_mode inner_mode
)
852 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
853 return subreg_lowpart_offset (outer_mode
, inner_mode
);
855 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
858 /* Generate a REG rtx for a new pseudo register of mode MODE.
859 This pseudo is assigned the next sequential register number. */
862 gen_reg_rtx (enum machine_mode mode
)
865 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
867 gcc_assert (can_create_pseudo_p ());
869 /* If a virtual register with bigger mode alignment is generated,
870 increase stack alignment estimation because it might be spilled
872 if (SUPPORTS_STACK_ALIGNMENT
873 && crtl
->stack_alignment_estimated
< align
874 && !crtl
->stack_realign_processed
)
876 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
877 if (crtl
->stack_alignment_estimated
< min_align
)
878 crtl
->stack_alignment_estimated
= min_align
;
881 if (generating_concat_p
882 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
883 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
885 /* For complex modes, don't make a single pseudo.
886 Instead, make a CONCAT of two pseudos.
887 This allows noncontiguous allocation of the real and imaginary parts,
888 which makes much better code. Besides, allocating DCmode
889 pseudos overstrains reload on some machines like the 386. */
890 rtx realpart
, imagpart
;
891 enum machine_mode partmode
= GET_MODE_INNER (mode
);
893 realpart
= gen_reg_rtx (partmode
);
894 imagpart
= gen_reg_rtx (partmode
);
895 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
898 /* Make sure regno_pointer_align, and regno_reg_rtx are large
899 enough to have an element for this pseudo reg number. */
901 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
903 int old_size
= crtl
->emit
.regno_pointer_align_length
;
907 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
908 memset (tmp
+ old_size
, 0, old_size
);
909 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
911 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
912 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
913 regno_reg_rtx
= new1
;
915 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
918 val
= gen_raw_REG (mode
, reg_rtx_no
);
919 regno_reg_rtx
[reg_rtx_no
++] = val
;
923 /* Update NEW with the same attributes as REG, but with OFFSET added
924 to the REG_OFFSET. */
927 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
929 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
930 REG_OFFSET (reg
) + offset
);
933 /* Generate a register with same attributes as REG, but with OFFSET
934 added to the REG_OFFSET. */
937 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
940 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
942 update_reg_offset (new_rtx
, reg
, offset
);
946 /* Generate a new pseudo-register with the same attributes as REG, but
947 with OFFSET added to the REG_OFFSET. */
950 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
952 rtx new_rtx
= gen_reg_rtx (mode
);
954 update_reg_offset (new_rtx
, reg
, offset
);
958 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
959 new register is a (possibly paradoxical) lowpart of the old one. */
962 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
964 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
965 PUT_MODE (reg
, mode
);
968 /* Copy REG's attributes from X, if X has any attributes. If REG and X
969 have different modes, REG is a (possibly paradoxical) lowpart of X. */
972 set_reg_attrs_from_value (rtx reg
, rtx x
)
975 bool can_be_reg_pointer
= true;
977 /* Don't call mark_reg_pointer for incompatible pointer sign
979 while (GET_CODE (x
) == SIGN_EXTEND
980 || GET_CODE (x
) == ZERO_EXTEND
981 || GET_CODE (x
) == TRUNCATE
982 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
984 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
985 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
986 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
987 can_be_reg_pointer
= false;
992 /* Hard registers can be reused for multiple purposes within the same
993 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
995 if (HARD_REGISTER_P (reg
))
998 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1001 if (MEM_OFFSET_KNOWN_P (x
))
1002 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1003 MEM_OFFSET (x
) + offset
);
1004 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1005 mark_reg_pointer (reg
, 0);
1010 update_reg_offset (reg
, x
, offset
);
1011 if (can_be_reg_pointer
&& REG_POINTER (x
))
1012 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1016 /* Generate a REG rtx for a new pseudo register, copying the mode
1017 and attributes from X. */
1020 gen_reg_rtx_and_attrs (rtx x
)
1022 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1023 set_reg_attrs_from_value (reg
, x
);
1027 /* Set the register attributes for registers contained in PARM_RTX.
1028 Use needed values from memory attributes of MEM. */
1031 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1033 if (REG_P (parm_rtx
))
1034 set_reg_attrs_from_value (parm_rtx
, mem
);
1035 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1037 /* Check for a NULL entry in the first slot, used to indicate that the
1038 parameter goes both on the stack and in registers. */
1039 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1040 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1042 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1043 if (REG_P (XEXP (x
, 0)))
1044 REG_ATTRS (XEXP (x
, 0))
1045 = get_reg_attrs (MEM_EXPR (mem
),
1046 INTVAL (XEXP (x
, 1)));
1051 /* Set the REG_ATTRS for registers in value X, given that X represents
1055 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1057 if (GET_CODE (x
) == SUBREG
)
1059 gcc_assert (subreg_lowpart_p (x
));
1064 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1066 if (GET_CODE (x
) == CONCAT
)
1068 if (REG_P (XEXP (x
, 0)))
1069 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1070 if (REG_P (XEXP (x
, 1)))
1071 REG_ATTRS (XEXP (x
, 1))
1072 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1074 if (GET_CODE (x
) == PARALLEL
)
1078 /* Check for a NULL entry, used to indicate that the parameter goes
1079 both on the stack and in registers. */
1080 if (XEXP (XVECEXP (x
, 0, 0), 0))
1085 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1087 rtx y
= XVECEXP (x
, 0, i
);
1088 if (REG_P (XEXP (y
, 0)))
1089 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1094 /* Assign the RTX X to declaration T. */
1097 set_decl_rtl (tree t
, rtx x
)
1099 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1101 set_reg_attrs_for_decl_rtl (t
, x
);
1104 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1105 if the ABI requires the parameter to be passed by reference. */
1108 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1110 DECL_INCOMING_RTL (t
) = x
;
1111 if (x
&& !by_reference_p
)
1112 set_reg_attrs_for_decl_rtl (t
, x
);
1115 /* Identify REG (which may be a CONCAT) as a user register. */
1118 mark_user_reg (rtx reg
)
1120 if (GET_CODE (reg
) == CONCAT
)
1122 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1123 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1127 gcc_assert (REG_P (reg
));
1128 REG_USERVAR_P (reg
) = 1;
1132 /* Identify REG as a probable pointer register and show its alignment
1133 as ALIGN, if nonzero. */
1136 mark_reg_pointer (rtx reg
, int align
)
1138 if (! REG_POINTER (reg
))
1140 REG_POINTER (reg
) = 1;
1143 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1145 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1146 /* We can no-longer be sure just how aligned this pointer is. */
1147 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1150 /* Return 1 plus largest pseudo reg number used in the current function. */
1158 /* Return 1 + the largest label number used so far in the current function. */
1161 max_label_num (void)
1166 /* Return first label number used in this function (if any were used). */
1169 get_first_label_num (void)
1171 return first_label_num
;
1174 /* If the rtx for label was created during the expansion of a nested
1175 function, then first_label_num won't include this label number.
1176 Fix this now so that array indices work later. */
1179 maybe_set_first_label_num (rtx x
)
1181 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1182 first_label_num
= CODE_LABEL_NUMBER (x
);
1185 /* Return a value representing some low-order bits of X, where the number
1186 of low-order bits is given by MODE. Note that no conversion is done
1187 between floating-point and fixed-point values, rather, the bit
1188 representation is returned.
1190 This function handles the cases in common between gen_lowpart, below,
1191 and two variants in cse.c and combine.c. These are the cases that can
1192 be safely handled at all points in the compilation.
1194 If this is not a case we can handle, return 0. */
1197 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1199 int msize
= GET_MODE_SIZE (mode
);
1202 enum machine_mode innermode
;
1204 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1205 so we have to make one up. Yuk. */
1206 innermode
= GET_MODE (x
);
1208 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1209 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1210 else if (innermode
== VOIDmode
)
1211 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1213 xsize
= GET_MODE_SIZE (innermode
);
1215 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1217 if (innermode
== mode
)
1220 /* MODE must occupy no more words than the mode of X. */
1221 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1222 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1225 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1226 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1229 offset
= subreg_lowpart_offset (mode
, innermode
);
1231 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1232 && (GET_MODE_CLASS (mode
) == MODE_INT
1233 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1235 /* If we are getting the low-order part of something that has been
1236 sign- or zero-extended, we can either just use the object being
1237 extended or make a narrower extension. If we want an even smaller
1238 piece than the size of the object being extended, call ourselves
1241 This case is used mostly by combine and cse. */
1243 if (GET_MODE (XEXP (x
, 0)) == mode
)
1245 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1246 return gen_lowpart_common (mode
, XEXP (x
, 0));
1247 else if (msize
< xsize
)
1248 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1250 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1251 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1252 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1253 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1255 /* Otherwise, we can't do this. */
1260 gen_highpart (enum machine_mode mode
, rtx x
)
1262 unsigned int msize
= GET_MODE_SIZE (mode
);
1265 /* This case loses if X is a subreg. To catch bugs early,
1266 complain if an invalid MODE is used even in other cases. */
1267 gcc_assert (msize
<= UNITS_PER_WORD
1268 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1270 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1271 subreg_highpart_offset (mode
, GET_MODE (x
)));
1272 gcc_assert (result
);
1274 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1275 the target if we have a MEM. gen_highpart must return a valid operand,
1276 emitting code if necessary to do so. */
1279 result
= validize_mem (result
);
1280 gcc_assert (result
);
1286 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1287 be VOIDmode constant. */
1289 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1291 if (GET_MODE (exp
) != VOIDmode
)
1293 gcc_assert (GET_MODE (exp
) == innermode
);
1294 return gen_highpart (outermode
, exp
);
1296 return simplify_gen_subreg (outermode
, exp
, innermode
,
1297 subreg_highpart_offset (outermode
, innermode
));
1300 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1303 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1305 unsigned int offset
= 0;
1306 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1310 if (WORDS_BIG_ENDIAN
)
1311 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1312 if (BYTES_BIG_ENDIAN
)
1313 offset
+= difference
% UNITS_PER_WORD
;
1319 /* Return offset in bytes to get OUTERMODE high part
1320 of the value in mode INNERMODE stored in memory in target format. */
1322 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1324 unsigned int offset
= 0;
1325 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1327 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1331 if (! WORDS_BIG_ENDIAN
)
1332 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1333 if (! BYTES_BIG_ENDIAN
)
1334 offset
+= difference
% UNITS_PER_WORD
;
1340 /* Return 1 iff X, assumed to be a SUBREG,
1341 refers to the least significant part of its containing reg.
1342 If X is not a SUBREG, always return 1 (it is its own low part!). */
1345 subreg_lowpart_p (const_rtx x
)
1347 if (GET_CODE (x
) != SUBREG
)
1349 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1352 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1353 == SUBREG_BYTE (x
));
1356 /* Return true if X is a paradoxical subreg, false otherwise. */
1358 paradoxical_subreg_p (const_rtx x
)
1360 if (GET_CODE (x
) != SUBREG
)
1362 return (GET_MODE_PRECISION (GET_MODE (x
))
1363 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1366 /* Return subword OFFSET of operand OP.
1367 The word number, OFFSET, is interpreted as the word number starting
1368 at the low-order address. OFFSET 0 is the low-order word if not
1369 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1371 If we cannot extract the required word, we return zero. Otherwise,
1372 an rtx corresponding to the requested word will be returned.
1374 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1375 reload has completed, a valid address will always be returned. After
1376 reload, if a valid address cannot be returned, we return zero.
1378 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1379 it is the responsibility of the caller.
1381 MODE is the mode of OP in case it is a CONST_INT.
1383 ??? This is still rather broken for some cases. The problem for the
1384 moment is that all callers of this thing provide no 'goal mode' to
1385 tell us to work with. This exists because all callers were written
1386 in a word based SUBREG world.
1387 Now use of this function can be deprecated by simplify_subreg in most
1392 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1394 if (mode
== VOIDmode
)
1395 mode
= GET_MODE (op
);
1397 gcc_assert (mode
!= VOIDmode
);
1399 /* If OP is narrower than a word, fail. */
1401 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1404 /* If we want a word outside OP, return zero. */
1406 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1409 /* Form a new MEM at the requested address. */
1412 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1414 if (! validate_address
)
1417 else if (reload_completed
)
1419 if (! strict_memory_address_addr_space_p (word_mode
,
1421 MEM_ADDR_SPACE (op
)))
1425 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1428 /* Rest can be handled by simplify_subreg. */
1429 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1432 /* Similar to `operand_subword', but never return 0. If we can't
1433 extract the required subword, put OP into a register and try again.
1434 The second attempt must succeed. We always validate the address in
1437 MODE is the mode of OP, in case it is CONST_INT. */
1440 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1442 rtx result
= operand_subword (op
, offset
, 1, mode
);
1447 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1449 /* If this is a register which can not be accessed by words, copy it
1450 to a pseudo register. */
1452 op
= copy_to_reg (op
);
1454 op
= force_reg (mode
, op
);
1457 result
= operand_subword (op
, offset
, 1, mode
);
1458 gcc_assert (result
);
1463 /* Returns 1 if both MEM_EXPR can be considered equal
1467 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1472 if (! expr1
|| ! expr2
)
1475 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1478 return operand_equal_p (expr1
, expr2
, 0);
1481 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1482 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1486 get_mem_align_offset (rtx mem
, unsigned int align
)
1489 unsigned HOST_WIDE_INT offset
;
1491 /* This function can't use
1492 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1493 || (MAX (MEM_ALIGN (mem),
1494 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1498 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1500 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1501 for <variable>. get_inner_reference doesn't handle it and
1502 even if it did, the alignment in that case needs to be determined
1503 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1504 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1505 isn't sufficiently aligned, the object it is in might be. */
1506 gcc_assert (MEM_P (mem
));
1507 expr
= MEM_EXPR (mem
);
1508 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1511 offset
= MEM_OFFSET (mem
);
1514 if (DECL_ALIGN (expr
) < align
)
1517 else if (INDIRECT_REF_P (expr
))
1519 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1522 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1526 tree inner
= TREE_OPERAND (expr
, 0);
1527 tree field
= TREE_OPERAND (expr
, 1);
1528 tree byte_offset
= component_ref_field_offset (expr
);
1529 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1532 || !host_integerp (byte_offset
, 1)
1533 || !host_integerp (bit_offset
, 1))
1536 offset
+= tree_low_cst (byte_offset
, 1);
1537 offset
+= tree_low_cst (bit_offset
, 1) / BITS_PER_UNIT
;
1539 if (inner
== NULL_TREE
)
1541 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1542 < (unsigned int) align
)
1546 else if (DECL_P (inner
))
1548 if (DECL_ALIGN (inner
) < align
)
1552 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1560 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1563 /* Given REF (a MEM) and T, either the type of X or the expression
1564 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1565 if we are making a new object of this type. BITPOS is nonzero if
1566 there is an offset outstanding on T that will be applied later. */
1569 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1570 HOST_WIDE_INT bitpos
)
1572 HOST_WIDE_INT apply_bitpos
= 0;
1574 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1577 /* It can happen that type_for_mode was given a mode for which there
1578 is no language-level type. In which case it returns NULL, which
1583 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1584 if (type
== error_mark_node
)
1587 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1588 wrong answer, as it assumes that DECL_RTL already has the right alias
1589 info. Callers should not set DECL_RTL until after the call to
1590 set_mem_attributes. */
1591 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1593 memset (&attrs
, 0, sizeof (attrs
));
1595 /* Get the alias set from the expression or type (perhaps using a
1596 front-end routine) and use it. */
1597 attrs
.alias
= get_alias_set (t
);
1599 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1600 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1602 /* Default values from pre-existing memory attributes if present. */
1603 refattrs
= MEM_ATTRS (ref
);
1606 /* ??? Can this ever happen? Calling this routine on a MEM that
1607 already carries memory attributes should probably be invalid. */
1608 attrs
.expr
= refattrs
->expr
;
1609 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1610 attrs
.offset
= refattrs
->offset
;
1611 attrs
.size_known_p
= refattrs
->size_known_p
;
1612 attrs
.size
= refattrs
->size
;
1613 attrs
.align
= refattrs
->align
;
1616 /* Otherwise, default values from the mode of the MEM reference. */
1619 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1620 gcc_assert (!defattrs
->expr
);
1621 gcc_assert (!defattrs
->offset_known_p
);
1623 /* Respect mode size. */
1624 attrs
.size_known_p
= defattrs
->size_known_p
;
1625 attrs
.size
= defattrs
->size
;
1626 /* ??? Is this really necessary? We probably should always get
1627 the size from the type below. */
1629 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1630 if T is an object, always compute the object alignment below. */
1632 attrs
.align
= defattrs
->align
;
1634 attrs
.align
= BITS_PER_UNIT
;
1635 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1636 e.g. if the type carries an alignment attribute. Should we be
1637 able to simply always use TYPE_ALIGN? */
1640 /* We can set the alignment from the type if we are making an object,
1641 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1642 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1643 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1645 else if (TREE_CODE (t
) == MEM_REF
)
1647 tree op0
= TREE_OPERAND (t
, 0);
1648 if (TREE_CODE (op0
) == ADDR_EXPR
1649 && (DECL_P (TREE_OPERAND (op0
, 0))
1650 || CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0))))
1652 if (DECL_P (TREE_OPERAND (op0
, 0)))
1653 attrs
.align
= DECL_ALIGN (TREE_OPERAND (op0
, 0));
1654 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0
, 0)))
1656 attrs
.align
= TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0
, 0)));
1657 #ifdef CONSTANT_ALIGNMENT
1658 attrs
.align
= CONSTANT_ALIGNMENT (TREE_OPERAND (op0
, 0),
1662 if (TREE_INT_CST_LOW (TREE_OPERAND (t
, 1)) != 0)
1664 unsigned HOST_WIDE_INT ioff
1665 = TREE_INT_CST_LOW (TREE_OPERAND (t
, 1));
1666 unsigned HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1667 attrs
.align
= MIN (aoff
, attrs
.align
);
1671 /* ??? This isn't fully correct, we can't set the alignment from the
1672 type in all cases. */
1673 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1676 else if (TREE_CODE (t
) == TARGET_MEM_REF
)
1677 /* ??? This isn't fully correct, we can't set the alignment from the
1678 type in all cases. */
1679 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1681 /* If the size is known, we can set that. */
1682 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1684 attrs
.size_known_p
= true;
1685 attrs
.size
= tree_low_cst (TYPE_SIZE_UNIT (type
), 1);
1688 /* If T is not a type, we may be able to deduce some more information about
1693 bool align_computed
= false;
1695 if (TREE_THIS_VOLATILE (t
))
1696 MEM_VOLATILE_P (ref
) = 1;
1698 /* Now remove any conversions: they don't change what the underlying
1699 object is. Likewise for SAVE_EXPR. */
1700 while (CONVERT_EXPR_P (t
)
1701 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1702 || TREE_CODE (t
) == SAVE_EXPR
)
1703 t
= TREE_OPERAND (t
, 0);
1705 /* Note whether this expression can trap. */
1706 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1708 base
= get_base_address (t
);
1712 && TREE_READONLY (base
)
1713 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1714 && !TREE_THIS_VOLATILE (base
))
1715 MEM_READONLY_P (ref
) = 1;
1717 /* Mark static const strings readonly as well. */
1718 if (TREE_CODE (base
) == STRING_CST
1719 && TREE_READONLY (base
)
1720 && TREE_STATIC (base
))
1721 MEM_READONLY_P (ref
) = 1;
1723 if (TREE_CODE (base
) == MEM_REF
1724 || TREE_CODE (base
) == TARGET_MEM_REF
)
1725 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1728 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1731 as
= TYPE_ADDR_SPACE (type
);
1733 /* If this expression uses it's parent's alias set, mark it such
1734 that we won't change it. */
1735 if (component_uses_parent_alias_set (t
))
1736 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1738 /* If this is a decl, set the attributes of the MEM from it. */
1742 attrs
.offset_known_p
= true;
1744 apply_bitpos
= bitpos
;
1745 if (DECL_SIZE_UNIT (t
) && host_integerp (DECL_SIZE_UNIT (t
), 1))
1747 attrs
.size_known_p
= true;
1748 attrs
.size
= tree_low_cst (DECL_SIZE_UNIT (t
), 1);
1751 attrs
.size_known_p
= false;
1752 attrs
.align
= DECL_ALIGN (t
);
1753 align_computed
= true;
1756 /* If this is a constant, we know the alignment. */
1757 else if (CONSTANT_CLASS_P (t
))
1759 attrs
.align
= TYPE_ALIGN (type
);
1760 #ifdef CONSTANT_ALIGNMENT
1761 attrs
.align
= CONSTANT_ALIGNMENT (t
, attrs
.align
);
1763 align_computed
= true;
1766 /* If this is a field reference and not a bit-field, record it. */
1767 /* ??? There is some information that can be gleaned from bit-fields,
1768 such as the word offset in the structure that might be modified.
1769 But skip it for now. */
1770 else if (TREE_CODE (t
) == COMPONENT_REF
1771 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1774 attrs
.offset_known_p
= true;
1776 apply_bitpos
= bitpos
;
1777 /* ??? Any reason the field size would be different than
1778 the size we got from the type? */
1781 /* If this is an array reference, look for an outer field reference. */
1782 else if (TREE_CODE (t
) == ARRAY_REF
)
1784 tree off_tree
= size_zero_node
;
1785 /* We can't modify t, because we use it at the end of the
1791 tree index
= TREE_OPERAND (t2
, 1);
1792 tree low_bound
= array_ref_low_bound (t2
);
1793 tree unit_size
= array_ref_element_size (t2
);
1795 /* We assume all arrays have sizes that are a multiple of a byte.
1796 First subtract the lower bound, if any, in the type of the
1797 index, then convert to sizetype and multiply by the size of
1798 the array element. */
1799 if (! integer_zerop (low_bound
))
1800 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1803 off_tree
= size_binop (PLUS_EXPR
,
1804 size_binop (MULT_EXPR
,
1805 fold_convert (sizetype
,
1809 t2
= TREE_OPERAND (t2
, 0);
1811 while (TREE_CODE (t2
) == ARRAY_REF
);
1816 attrs
.offset_known_p
= false;
1817 if (host_integerp (off_tree
, 1))
1819 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1820 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1821 attrs
.align
= DECL_ALIGN (t2
);
1822 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< attrs
.align
)
1824 align_computed
= true;
1825 attrs
.offset_known_p
= true;
1826 attrs
.offset
= ioff
;
1827 apply_bitpos
= bitpos
;
1830 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1833 attrs
.offset_known_p
= false;
1834 if (host_integerp (off_tree
, 1))
1836 attrs
.offset_known_p
= true;
1837 attrs
.offset
= tree_low_cst (off_tree
, 1);
1838 apply_bitpos
= bitpos
;
1840 /* ??? Any reason the field size would be different than
1841 the size we got from the type? */
1845 /* If this is an indirect reference, record it. */
1846 else if (TREE_CODE (t
) == MEM_REF
1847 || TREE_CODE (t
) == TARGET_MEM_REF
)
1850 attrs
.offset_known_p
= true;
1852 apply_bitpos
= bitpos
;
1855 if (!align_computed
)
1857 unsigned int obj_align
= get_object_alignment (t
);
1858 attrs
.align
= MAX (attrs
.align
, obj_align
);
1862 as
= TYPE_ADDR_SPACE (type
);
1864 /* If we modified OFFSET based on T, then subtract the outstanding
1865 bit position offset. Similarly, increase the size of the accessed
1866 object to contain the negative offset. */
1869 gcc_assert (attrs
.offset_known_p
);
1870 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1871 if (attrs
.size_known_p
)
1872 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1875 /* Now set the attributes we computed above. */
1876 attrs
.addrspace
= as
;
1877 set_mem_attrs (ref
, &attrs
);
1881 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1883 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1886 /* Set the alias set of MEM to SET. */
1889 set_mem_alias_set (rtx mem
, alias_set_type set
)
1891 struct mem_attrs attrs
;
1893 /* If the new and old alias sets don't conflict, something is wrong. */
1894 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1895 attrs
= *get_mem_attrs (mem
);
1897 set_mem_attrs (mem
, &attrs
);
1900 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1903 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1905 struct mem_attrs attrs
;
1907 attrs
= *get_mem_attrs (mem
);
1908 attrs
.addrspace
= addrspace
;
1909 set_mem_attrs (mem
, &attrs
);
1912 /* Set the alignment of MEM to ALIGN bits. */
1915 set_mem_align (rtx mem
, unsigned int align
)
1917 struct mem_attrs attrs
;
1919 attrs
= *get_mem_attrs (mem
);
1920 attrs
.align
= align
;
1921 set_mem_attrs (mem
, &attrs
);
1924 /* Set the expr for MEM to EXPR. */
1927 set_mem_expr (rtx mem
, tree expr
)
1929 struct mem_attrs attrs
;
1931 attrs
= *get_mem_attrs (mem
);
1933 set_mem_attrs (mem
, &attrs
);
1936 /* Set the offset of MEM to OFFSET. */
1939 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1941 struct mem_attrs attrs
;
1943 attrs
= *get_mem_attrs (mem
);
1944 attrs
.offset_known_p
= true;
1945 attrs
.offset
= offset
;
1946 set_mem_attrs (mem
, &attrs
);
1949 /* Clear the offset of MEM. */
1952 clear_mem_offset (rtx mem
)
1954 struct mem_attrs attrs
;
1956 attrs
= *get_mem_attrs (mem
);
1957 attrs
.offset_known_p
= false;
1958 set_mem_attrs (mem
, &attrs
);
1961 /* Set the size of MEM to SIZE. */
1964 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1966 struct mem_attrs attrs
;
1968 attrs
= *get_mem_attrs (mem
);
1969 attrs
.size_known_p
= true;
1971 set_mem_attrs (mem
, &attrs
);
1974 /* Clear the size of MEM. */
1977 clear_mem_size (rtx mem
)
1979 struct mem_attrs attrs
;
1981 attrs
= *get_mem_attrs (mem
);
1982 attrs
.size_known_p
= false;
1983 set_mem_attrs (mem
, &attrs
);
1986 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1987 and its address changed to ADDR. (VOIDmode means don't change the mode.
1988 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1989 returned memory location is required to be valid. The memory
1990 attributes are not changed. */
1993 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1998 gcc_assert (MEM_P (memref
));
1999 as
= MEM_ADDR_SPACE (memref
);
2000 if (mode
== VOIDmode
)
2001 mode
= GET_MODE (memref
);
2003 addr
= XEXP (memref
, 0);
2004 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2005 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2010 if (reload_in_progress
|| reload_completed
)
2011 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2013 addr
= memory_address_addr_space (mode
, addr
, as
);
2016 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2019 new_rtx
= gen_rtx_MEM (mode
, addr
);
2020 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2024 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2025 way we are changing MEMREF, so we only preserve the alias set. */
2028 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2030 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
2031 enum machine_mode mmode
= GET_MODE (new_rtx
);
2032 struct mem_attrs attrs
, *defattrs
;
2034 attrs
= *get_mem_attrs (memref
);
2035 defattrs
= mode_mem_attrs
[(int) mmode
];
2036 attrs
.expr
= NULL_TREE
;
2037 attrs
.offset_known_p
= false;
2038 attrs
.size_known_p
= defattrs
->size_known_p
;
2039 attrs
.size
= defattrs
->size
;
2040 attrs
.align
= defattrs
->align
;
2042 /* If there are no changes, just return the original memory reference. */
2043 if (new_rtx
== memref
)
2045 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2048 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2049 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2052 set_mem_attrs (new_rtx
, &attrs
);
2056 /* Return a memory reference like MEMREF, but with its mode changed
2057 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2058 nonzero, the memory address is forced to be valid.
2059 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2060 and the caller is responsible for adjusting MEMREF base register.
2061 If ADJUST_OBJECT is zero, the underlying object associated with the
2062 memory reference is left unchanged and the caller is responsible for
2063 dealing with it. Otherwise, if the new memory reference is outside
2064 the underlying object, even partially, then the object is dropped. */
2067 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2068 int validate
, int adjust_address
, int adjust_object
)
2070 rtx addr
= XEXP (memref
, 0);
2072 enum machine_mode address_mode
;
2074 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2075 unsigned HOST_WIDE_INT max_align
;
2076 #ifdef POINTERS_EXTEND_UNSIGNED
2077 enum machine_mode pointer_mode
2078 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2081 /* If there are no changes, just return the original memory reference. */
2082 if (mode
== GET_MODE (memref
) && !offset
2083 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2087 /* ??? Prefer to create garbage instead of creating shared rtl.
2088 This may happen even if offset is nonzero -- consider
2089 (plus (plus reg reg) const_int) -- so do this always. */
2090 addr
= copy_rtx (addr
);
2092 /* Convert a possibly large offset to a signed value within the
2093 range of the target address space. */
2094 address_mode
= get_address_mode (memref
);
2095 pbits
= GET_MODE_BITSIZE (address_mode
);
2096 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2098 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2099 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2105 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2106 object, we can merge it into the LO_SUM. */
2107 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2109 && (unsigned HOST_WIDE_INT
) offset
2110 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2111 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2112 plus_constant (address_mode
,
2113 XEXP (addr
, 1), offset
));
2114 #ifdef POINTERS_EXTEND_UNSIGNED
2115 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2116 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2117 the fact that pointers are not allowed to overflow. */
2118 else if (POINTERS_EXTEND_UNSIGNED
> 0
2119 && GET_CODE (addr
) == ZERO_EXTEND
2120 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2121 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2122 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2123 plus_constant (pointer_mode
,
2124 XEXP (addr
, 0), offset
));
2127 addr
= plus_constant (address_mode
, addr
, offset
);
2130 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2132 /* If the address is a REG, change_address_1 rightfully returns memref,
2133 but this would destroy memref's MEM_ATTRS. */
2134 if (new_rtx
== memref
&& offset
!= 0)
2135 new_rtx
= copy_rtx (new_rtx
);
2137 /* Conservatively drop the object if we don't know where we start from. */
2138 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2140 attrs
.expr
= NULL_TREE
;
2144 /* Compute the new values of the memory attributes due to this adjustment.
2145 We add the offsets and update the alignment. */
2146 if (attrs
.offset_known_p
)
2148 attrs
.offset
+= offset
;
2150 /* Drop the object if the new left end is not within its bounds. */
2151 if (adjust_object
&& attrs
.offset
< 0)
2153 attrs
.expr
= NULL_TREE
;
2158 /* Compute the new alignment by taking the MIN of the alignment and the
2159 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2163 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2164 attrs
.align
= MIN (attrs
.align
, max_align
);
2167 /* We can compute the size in a number of ways. */
2168 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2169 if (defattrs
->size_known_p
)
2171 /* Drop the object if the new right end is not within its bounds. */
2172 if (adjust_object
&& (offset
+ defattrs
->size
) > attrs
.size
)
2174 attrs
.expr
= NULL_TREE
;
2177 attrs
.size_known_p
= true;
2178 attrs
.size
= defattrs
->size
;
2180 else if (attrs
.size_known_p
)
2182 attrs
.size
-= offset
;
2183 /* ??? The store_by_pieces machinery generates negative sizes. */
2184 gcc_assert (!(adjust_object
&& attrs
.size
< 0));
2187 set_mem_attrs (new_rtx
, &attrs
);
2192 /* Return a memory reference like MEMREF, but with its mode changed
2193 to MODE and its address changed to ADDR, which is assumed to be
2194 MEMREF offset by OFFSET bytes. If VALIDATE is
2195 nonzero, the memory address is forced to be valid. */
2198 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2199 HOST_WIDE_INT offset
, int validate
)
2201 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2202 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0);
2205 /* Return a memory reference like MEMREF, but whose address is changed by
2206 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2207 known to be in OFFSET (possibly 1). */
2210 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2212 rtx new_rtx
, addr
= XEXP (memref
, 0);
2213 enum machine_mode address_mode
;
2214 struct mem_attrs attrs
, *defattrs
;
2216 attrs
= *get_mem_attrs (memref
);
2217 address_mode
= get_address_mode (memref
);
2218 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2220 /* At this point we don't know _why_ the address is invalid. It
2221 could have secondary memory references, multiplies or anything.
2223 However, if we did go and rearrange things, we can wind up not
2224 being able to recognize the magic around pic_offset_table_rtx.
2225 This stuff is fragile, and is yet another example of why it is
2226 bad to expose PIC machinery too early. */
2227 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2229 && GET_CODE (addr
) == PLUS
2230 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2232 addr
= force_reg (GET_MODE (addr
), addr
);
2233 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2236 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2237 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2239 /* If there are no changes, just return the original memory reference. */
2240 if (new_rtx
== memref
)
2243 /* Update the alignment to reflect the offset. Reset the offset, which
2245 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2246 attrs
.offset_known_p
= false;
2247 attrs
.size_known_p
= defattrs
->size_known_p
;
2248 attrs
.size
= defattrs
->size
;
2249 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2250 set_mem_attrs (new_rtx
, &attrs
);
2254 /* Return a memory reference like MEMREF, but with its address changed to
2255 ADDR. The caller is asserting that the actual piece of memory pointed
2256 to is the same, just the form of the address is being changed, such as
2257 by putting something into a register. */
2260 replace_equiv_address (rtx memref
, rtx addr
)
2262 /* change_address_1 copies the memory attribute structure without change
2263 and that's exactly what we want here. */
2264 update_temp_slot_address (XEXP (memref
, 0), addr
);
2265 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2268 /* Likewise, but the reference is not required to be valid. */
2271 replace_equiv_address_nv (rtx memref
, rtx addr
)
2273 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2276 /* Return a memory reference like MEMREF, but with its mode widened to
2277 MODE and offset by OFFSET. This would be used by targets that e.g.
2278 cannot issue QImode memory operations and have to use SImode memory
2279 operations plus masking logic. */
2282 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2284 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0);
2285 struct mem_attrs attrs
;
2286 unsigned int size
= GET_MODE_SIZE (mode
);
2288 /* If there are no changes, just return the original memory reference. */
2289 if (new_rtx
== memref
)
2292 attrs
= *get_mem_attrs (new_rtx
);
2294 /* If we don't know what offset we were at within the expression, then
2295 we can't know if we've overstepped the bounds. */
2296 if (! attrs
.offset_known_p
)
2297 attrs
.expr
= NULL_TREE
;
2301 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2303 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2304 tree offset
= component_ref_field_offset (attrs
.expr
);
2306 if (! DECL_SIZE_UNIT (field
))
2308 attrs
.expr
= NULL_TREE
;
2312 /* Is the field at least as large as the access? If so, ok,
2313 otherwise strip back to the containing structure. */
2314 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2315 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2316 && attrs
.offset
>= 0)
2319 if (! host_integerp (offset
, 1))
2321 attrs
.expr
= NULL_TREE
;
2325 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2326 attrs
.offset
+= tree_low_cst (offset
, 1);
2327 attrs
.offset
+= (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2330 /* Similarly for the decl. */
2331 else if (DECL_P (attrs
.expr
)
2332 && DECL_SIZE_UNIT (attrs
.expr
)
2333 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2334 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2335 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2339 /* The widened memory access overflows the expression, which means
2340 that it could alias another expression. Zap it. */
2341 attrs
.expr
= NULL_TREE
;
2347 attrs
.offset_known_p
= false;
2349 /* The widened memory may alias other stuff, so zap the alias set. */
2350 /* ??? Maybe use get_alias_set on any remaining expression. */
2352 attrs
.size_known_p
= true;
2354 set_mem_attrs (new_rtx
, &attrs
);
2358 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2359 static GTY(()) tree spill_slot_decl
;
2362 get_spill_slot_decl (bool force_build_p
)
2364 tree d
= spill_slot_decl
;
2366 struct mem_attrs attrs
;
2368 if (d
|| !force_build_p
)
2371 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2372 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2373 DECL_ARTIFICIAL (d
) = 1;
2374 DECL_IGNORED_P (d
) = 1;
2376 spill_slot_decl
= d
;
2378 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2379 MEM_NOTRAP_P (rd
) = 1;
2380 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2381 attrs
.alias
= new_alias_set ();
2383 set_mem_attrs (rd
, &attrs
);
2384 SET_DECL_RTL (d
, rd
);
2389 /* Given MEM, a result from assign_stack_local, fill in the memory
2390 attributes as appropriate for a register allocator spill slot.
2391 These slots are not aliasable by other memory. We arrange for
2392 them all to use a single MEM_EXPR, so that the aliasing code can
2393 work properly in the case of shared spill slots. */
2396 set_mem_attrs_for_spill (rtx mem
)
2398 struct mem_attrs attrs
;
2401 attrs
= *get_mem_attrs (mem
);
2402 attrs
.expr
= get_spill_slot_decl (true);
2403 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2404 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2406 /* We expect the incoming memory to be of the form:
2407 (mem:MODE (plus (reg sfp) (const_int offset)))
2408 with perhaps the plus missing for offset = 0. */
2409 addr
= XEXP (mem
, 0);
2410 attrs
.offset_known_p
= true;
2412 if (GET_CODE (addr
) == PLUS
2413 && CONST_INT_P (XEXP (addr
, 1)))
2414 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2416 set_mem_attrs (mem
, &attrs
);
2417 MEM_NOTRAP_P (mem
) = 1;
2420 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2423 gen_label_rtx (void)
2425 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2426 NULL
, label_num
++, NULL
);
2429 /* For procedure integration. */
2431 /* Install new pointers to the first and last insns in the chain.
2432 Also, set cur_insn_uid to one higher than the last in use.
2433 Used for an inline-procedure after copying the insn chain. */
2436 set_new_first_and_last_insn (rtx first
, rtx last
)
2440 set_first_insn (first
);
2441 set_last_insn (last
);
2444 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2446 int debug_count
= 0;
2448 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2449 cur_debug_insn_uid
= 0;
2451 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2452 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2453 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2456 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2457 if (DEBUG_INSN_P (insn
))
2462 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2464 cur_debug_insn_uid
++;
2467 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2468 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2473 /* Go through all the RTL insn bodies and copy any invalid shared
2474 structure. This routine should only be called once. */
2477 unshare_all_rtl_1 (rtx insn
)
2479 /* Unshare just about everything else. */
2480 unshare_all_rtl_in_chain (insn
);
2482 /* Make sure the addresses of stack slots found outside the insn chain
2483 (such as, in DECL_RTL of a variable) are not shared
2484 with the insn chain.
2486 This special care is necessary when the stack slot MEM does not
2487 actually appear in the insn chain. If it does appear, its address
2488 is unshared from all else at that point. */
2489 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2492 /* Go through all the RTL insn bodies and copy any invalid shared
2493 structure, again. This is a fairly expensive thing to do so it
2494 should be done sparingly. */
2497 unshare_all_rtl_again (rtx insn
)
2502 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2505 reset_used_flags (PATTERN (p
));
2506 reset_used_flags (REG_NOTES (p
));
2508 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2511 /* Make sure that virtual stack slots are not shared. */
2512 set_used_decls (DECL_INITIAL (cfun
->decl
));
2514 /* Make sure that virtual parameters are not shared. */
2515 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2516 set_used_flags (DECL_RTL (decl
));
2518 reset_used_flags (stack_slot_list
);
2520 unshare_all_rtl_1 (insn
);
2524 unshare_all_rtl (void)
2526 unshare_all_rtl_1 (get_insns ());
2531 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2532 Recursively does the same for subexpressions. */
2535 verify_rtx_sharing (rtx orig
, rtx insn
)
2540 const char *format_ptr
;
2545 code
= GET_CODE (x
);
2547 /* These types may be freely shared. */
2564 /* SCRATCH must be shared because they represent distinct values. */
2566 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2571 if (shared_const_p (orig
))
2576 /* A MEM is allowed to be shared if its address is constant. */
2577 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2578 || reload_completed
|| reload_in_progress
)
2587 /* This rtx may not be shared. If it has already been seen,
2588 replace it with a copy of itself. */
2589 #ifdef ENABLE_CHECKING
2590 if (RTX_FLAG (x
, used
))
2592 error ("invalid rtl sharing found in the insn");
2594 error ("shared rtx");
2596 internal_error ("internal consistency failure");
2599 gcc_assert (!RTX_FLAG (x
, used
));
2601 RTX_FLAG (x
, used
) = 1;
2603 /* Now scan the subexpressions recursively. */
2605 format_ptr
= GET_RTX_FORMAT (code
);
2607 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2609 switch (*format_ptr
++)
2612 verify_rtx_sharing (XEXP (x
, i
), insn
);
2616 if (XVEC (x
, i
) != NULL
)
2619 int len
= XVECLEN (x
, i
);
2621 for (j
= 0; j
< len
; j
++)
2623 /* We allow sharing of ASM_OPERANDS inside single
2625 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2626 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2628 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2630 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2639 /* Go through all the RTL insn bodies and check that there is no unexpected
2640 sharing in between the subexpressions. */
2643 verify_rtl_sharing (void)
2647 timevar_push (TV_VERIFY_RTL_SHARING
);
2649 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2652 reset_used_flags (PATTERN (p
));
2653 reset_used_flags (REG_NOTES (p
));
2655 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2656 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2659 rtx q
, sequence
= PATTERN (p
);
2661 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2663 q
= XVECEXP (sequence
, 0, i
);
2664 gcc_assert (INSN_P (q
));
2665 reset_used_flags (PATTERN (q
));
2666 reset_used_flags (REG_NOTES (q
));
2668 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q
));
2673 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2676 verify_rtx_sharing (PATTERN (p
), p
);
2677 verify_rtx_sharing (REG_NOTES (p
), p
);
2679 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p
), p
);
2682 timevar_pop (TV_VERIFY_RTL_SHARING
);
2685 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2686 Assumes the mark bits are cleared at entry. */
2689 unshare_all_rtl_in_chain (rtx insn
)
2691 for (; insn
; insn
= NEXT_INSN (insn
))
2694 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2695 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2697 CALL_INSN_FUNCTION_USAGE (insn
)
2698 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2702 /* Go through all virtual stack slots of a function and mark them as
2703 shared. We never replace the DECL_RTLs themselves with a copy,
2704 but expressions mentioned into a DECL_RTL cannot be shared with
2705 expressions in the instruction stream.
2707 Note that reload may convert pseudo registers into memories in-place.
2708 Pseudo registers are always shared, but MEMs never are. Thus if we
2709 reset the used flags on MEMs in the instruction stream, we must set
2710 them again on MEMs that appear in DECL_RTLs. */
2713 set_used_decls (tree blk
)
2718 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2719 if (DECL_RTL_SET_P (t
))
2720 set_used_flags (DECL_RTL (t
));
2722 /* Now process sub-blocks. */
2723 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2727 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2728 Recursively does the same for subexpressions. Uses
2729 copy_rtx_if_shared_1 to reduce stack space. */
2732 copy_rtx_if_shared (rtx orig
)
2734 copy_rtx_if_shared_1 (&orig
);
2738 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2739 use. Recursively does the same for subexpressions. */
2742 copy_rtx_if_shared_1 (rtx
*orig1
)
2748 const char *format_ptr
;
2752 /* Repeat is used to turn tail-recursion into iteration. */
2759 code
= GET_CODE (x
);
2761 /* These types may be freely shared. */
2777 /* SCRATCH must be shared because they represent distinct values. */
2780 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2785 if (shared_const_p (x
))
2795 /* The chain of insns is not being copied. */
2802 /* This rtx may not be shared. If it has already been seen,
2803 replace it with a copy of itself. */
2805 if (RTX_FLAG (x
, used
))
2807 x
= shallow_copy_rtx (x
);
2810 RTX_FLAG (x
, used
) = 1;
2812 /* Now scan the subexpressions recursively.
2813 We can store any replaced subexpressions directly into X
2814 since we know X is not shared! Any vectors in X
2815 must be copied if X was copied. */
2817 format_ptr
= GET_RTX_FORMAT (code
);
2818 length
= GET_RTX_LENGTH (code
);
2821 for (i
= 0; i
< length
; i
++)
2823 switch (*format_ptr
++)
2827 copy_rtx_if_shared_1 (last_ptr
);
2828 last_ptr
= &XEXP (x
, i
);
2832 if (XVEC (x
, i
) != NULL
)
2835 int len
= XVECLEN (x
, i
);
2837 /* Copy the vector iff I copied the rtx and the length
2839 if (copied
&& len
> 0)
2840 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2842 /* Call recursively on all inside the vector. */
2843 for (j
= 0; j
< len
; j
++)
2846 copy_rtx_if_shared_1 (last_ptr
);
2847 last_ptr
= &XVECEXP (x
, i
, j
);
2862 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2865 mark_used_flags (rtx x
, int flag
)
2869 const char *format_ptr
;
2872 /* Repeat is used to turn tail-recursion into iteration. */
2877 code
= GET_CODE (x
);
2879 /* These types may be freely shared so we needn't do any resetting
2903 /* The chain of insns is not being copied. */
2910 RTX_FLAG (x
, used
) = flag
;
2912 format_ptr
= GET_RTX_FORMAT (code
);
2913 length
= GET_RTX_LENGTH (code
);
2915 for (i
= 0; i
< length
; i
++)
2917 switch (*format_ptr
++)
2925 mark_used_flags (XEXP (x
, i
), flag
);
2929 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2930 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2936 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2937 to look for shared sub-parts. */
2940 reset_used_flags (rtx x
)
2942 mark_used_flags (x
, 0);
2945 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2946 to look for shared sub-parts. */
2949 set_used_flags (rtx x
)
2951 mark_used_flags (x
, 1);
2954 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2955 Return X or the rtx for the pseudo reg the value of X was copied into.
2956 OTHER must be valid as a SET_DEST. */
2959 make_safe_from (rtx x
, rtx other
)
2962 switch (GET_CODE (other
))
2965 other
= SUBREG_REG (other
);
2967 case STRICT_LOW_PART
:
2970 other
= XEXP (other
, 0);
2979 && GET_CODE (x
) != SUBREG
)
2981 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2982 || reg_mentioned_p (other
, x
))))
2984 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2985 emit_move_insn (temp
, x
);
2991 /* Emission of insns (adding them to the doubly-linked list). */
2993 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2996 get_last_insn_anywhere (void)
2998 struct sequence_stack
*stack
;
2999 if (get_last_insn ())
3000 return get_last_insn ();
3001 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3002 if (stack
->last
!= 0)
3007 /* Return the first nonnote insn emitted in current sequence or current
3008 function. This routine looks inside SEQUENCEs. */
3011 get_first_nonnote_insn (void)
3013 rtx insn
= get_insns ();
3018 for (insn
= next_insn (insn
);
3019 insn
&& NOTE_P (insn
);
3020 insn
= next_insn (insn
))
3024 if (NONJUMP_INSN_P (insn
)
3025 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3026 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3033 /* Return the last nonnote insn emitted in current sequence or current
3034 function. This routine looks inside SEQUENCEs. */
3037 get_last_nonnote_insn (void)
3039 rtx insn
= get_last_insn ();
3044 for (insn
= previous_insn (insn
);
3045 insn
&& NOTE_P (insn
);
3046 insn
= previous_insn (insn
))
3050 if (NONJUMP_INSN_P (insn
)
3051 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3052 insn
= XVECEXP (PATTERN (insn
), 0,
3053 XVECLEN (PATTERN (insn
), 0) - 1);
3060 /* Return the number of actual (non-debug) insns emitted in this
3064 get_max_insn_count (void)
3066 int n
= cur_insn_uid
;
3068 /* The table size must be stable across -g, to avoid codegen
3069 differences due to debug insns, and not be affected by
3070 -fmin-insn-uid, to avoid excessive table size and to simplify
3071 debugging of -fcompare-debug failures. */
3072 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3073 n
-= cur_debug_insn_uid
;
3075 n
-= MIN_NONDEBUG_INSN_UID
;
3081 /* Return the next insn. If it is a SEQUENCE, return the first insn
3085 next_insn (rtx insn
)
3089 insn
= NEXT_INSN (insn
);
3090 if (insn
&& NONJUMP_INSN_P (insn
)
3091 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3092 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3098 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3102 previous_insn (rtx insn
)
3106 insn
= PREV_INSN (insn
);
3107 if (insn
&& NONJUMP_INSN_P (insn
)
3108 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3109 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3115 /* Return the next insn after INSN that is not a NOTE. This routine does not
3116 look inside SEQUENCEs. */
3119 next_nonnote_insn (rtx insn
)
3123 insn
= NEXT_INSN (insn
);
3124 if (insn
== 0 || !NOTE_P (insn
))
3131 /* Return the next insn after INSN that is not a NOTE, but stop the
3132 search before we enter another basic block. This routine does not
3133 look inside SEQUENCEs. */
3136 next_nonnote_insn_bb (rtx insn
)
3140 insn
= NEXT_INSN (insn
);
3141 if (insn
== 0 || !NOTE_P (insn
))
3143 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3150 /* Return the previous insn before INSN that is not a NOTE. This routine does
3151 not look inside SEQUENCEs. */
3154 prev_nonnote_insn (rtx insn
)
3158 insn
= PREV_INSN (insn
);
3159 if (insn
== 0 || !NOTE_P (insn
))
3166 /* Return the previous insn before INSN that is not a NOTE, but stop
3167 the search before we enter another basic block. This routine does
3168 not look inside SEQUENCEs. */
3171 prev_nonnote_insn_bb (rtx insn
)
3175 insn
= PREV_INSN (insn
);
3176 if (insn
== 0 || !NOTE_P (insn
))
3178 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3185 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3186 routine does not look inside SEQUENCEs. */
3189 next_nondebug_insn (rtx insn
)
3193 insn
= NEXT_INSN (insn
);
3194 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3201 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3202 This routine does not look inside SEQUENCEs. */
3205 prev_nondebug_insn (rtx insn
)
3209 insn
= PREV_INSN (insn
);
3210 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3217 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3218 This routine does not look inside SEQUENCEs. */
3221 next_nonnote_nondebug_insn (rtx insn
)
3225 insn
= NEXT_INSN (insn
);
3226 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3233 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3234 This routine does not look inside SEQUENCEs. */
3237 prev_nonnote_nondebug_insn (rtx insn
)
3241 insn
= PREV_INSN (insn
);
3242 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3249 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3250 or 0, if there is none. This routine does not look inside
3254 next_real_insn (rtx insn
)
3258 insn
= NEXT_INSN (insn
);
3259 if (insn
== 0 || INSN_P (insn
))
3266 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3267 or 0, if there is none. This routine does not look inside
3271 prev_real_insn (rtx insn
)
3275 insn
= PREV_INSN (insn
);
3276 if (insn
== 0 || INSN_P (insn
))
3283 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3284 This routine does not look inside SEQUENCEs. */
3287 last_call_insn (void)
3291 for (insn
= get_last_insn ();
3292 insn
&& !CALL_P (insn
);
3293 insn
= PREV_INSN (insn
))
3299 /* Find the next insn after INSN that really does something. This routine
3300 does not look inside SEQUENCEs. After reload this also skips over
3301 standalone USE and CLOBBER insn. */
3304 active_insn_p (const_rtx insn
)
3306 return (CALL_P (insn
) || JUMP_P (insn
)
3307 || (NONJUMP_INSN_P (insn
)
3308 && (! reload_completed
3309 || (GET_CODE (PATTERN (insn
)) != USE
3310 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3314 next_active_insn (rtx insn
)
3318 insn
= NEXT_INSN (insn
);
3319 if (insn
== 0 || active_insn_p (insn
))
3326 /* Find the last insn before INSN that really does something. This routine
3327 does not look inside SEQUENCEs. After reload this also skips over
3328 standalone USE and CLOBBER insn. */
3331 prev_active_insn (rtx insn
)
3335 insn
= PREV_INSN (insn
);
3336 if (insn
== 0 || active_insn_p (insn
))
3343 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3346 next_label (rtx insn
)
3350 insn
= NEXT_INSN (insn
);
3351 if (insn
== 0 || LABEL_P (insn
))
3358 /* Return the last label to mark the same position as LABEL. Return LABEL
3359 itself if it is null or any return rtx. */
3362 skip_consecutive_labels (rtx label
)
3366 if (label
&& ANY_RETURN_P (label
))
3369 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3377 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3378 and REG_CC_USER notes so we can find it. */
3381 link_cc0_insns (rtx insn
)
3383 rtx user
= next_nonnote_insn (insn
);
3385 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3386 user
= XVECEXP (PATTERN (user
), 0, 0);
3388 add_reg_note (user
, REG_CC_SETTER
, insn
);
3389 add_reg_note (insn
, REG_CC_USER
, user
);
3392 /* Return the next insn that uses CC0 after INSN, which is assumed to
3393 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3394 applied to the result of this function should yield INSN).
3396 Normally, this is simply the next insn. However, if a REG_CC_USER note
3397 is present, it contains the insn that uses CC0.
3399 Return 0 if we can't find the insn. */
3402 next_cc0_user (rtx insn
)
3404 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3407 return XEXP (note
, 0);
3409 insn
= next_nonnote_insn (insn
);
3410 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3411 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3413 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3419 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3420 note, it is the previous insn. */
3423 prev_cc0_setter (rtx insn
)
3425 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3428 return XEXP (note
, 0);
3430 insn
= prev_nonnote_insn (insn
);
3431 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3438 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3441 find_auto_inc (rtx
*xp
, void *data
)
3444 rtx reg
= (rtx
) data
;
3446 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3449 switch (GET_CODE (x
))
3457 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3468 /* Increment the label uses for all labels present in rtx. */
3471 mark_label_nuses (rtx x
)
3477 code
= GET_CODE (x
);
3478 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3479 LABEL_NUSES (XEXP (x
, 0))++;
3481 fmt
= GET_RTX_FORMAT (code
);
3482 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3485 mark_label_nuses (XEXP (x
, i
));
3486 else if (fmt
[i
] == 'E')
3487 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3488 mark_label_nuses (XVECEXP (x
, i
, j
));
3493 /* Try splitting insns that can be split for better scheduling.
3494 PAT is the pattern which might split.
3495 TRIAL is the insn providing PAT.
3496 LAST is nonzero if we should return the last insn of the sequence produced.
3498 If this routine succeeds in splitting, it returns the first or last
3499 replacement insn depending on the value of LAST. Otherwise, it
3500 returns TRIAL. If the insn to be returned can be split, it will be. */
3503 try_split (rtx pat
, rtx trial
, int last
)
3505 rtx before
= PREV_INSN (trial
);
3506 rtx after
= NEXT_INSN (trial
);
3507 int has_barrier
= 0;
3510 rtx insn_last
, insn
;
3513 /* We're not good at redistributing frame information. */
3514 if (RTX_FRAME_RELATED_P (trial
))
3517 if (any_condjump_p (trial
)
3518 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3519 split_branch_probability
= INTVAL (XEXP (note
, 0));
3520 probability
= split_branch_probability
;
3522 seq
= split_insns (pat
, trial
);
3524 split_branch_probability
= -1;
3526 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3527 We may need to handle this specially. */
3528 if (after
&& BARRIER_P (after
))
3531 after
= NEXT_INSN (after
);
3537 /* Avoid infinite loop if any insn of the result matches
3538 the original pattern. */
3542 if (INSN_P (insn_last
)
3543 && rtx_equal_p (PATTERN (insn_last
), pat
))
3545 if (!NEXT_INSN (insn_last
))
3547 insn_last
= NEXT_INSN (insn_last
);
3550 /* We will be adding the new sequence to the function. The splitters
3551 may have introduced invalid RTL sharing, so unshare the sequence now. */
3552 unshare_all_rtl_in_chain (seq
);
3555 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3559 mark_jump_label (PATTERN (insn
), insn
, 0);
3561 if (probability
!= -1
3562 && any_condjump_p (insn
)
3563 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3565 /* We can preserve the REG_BR_PROB notes only if exactly
3566 one jump is created, otherwise the machine description
3567 is responsible for this step using
3568 split_branch_probability variable. */
3569 gcc_assert (njumps
== 1);
3570 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (probability
));
3575 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3576 in SEQ and copy any additional information across. */
3579 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3584 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3585 target may have explicitly specified. */
3586 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3589 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3591 /* If the old call was a sibling call, the new one must
3593 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3595 /* If the new call is the last instruction in the sequence,
3596 it will effectively replace the old call in-situ. Otherwise
3597 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3598 so that it comes immediately after the new call. */
3599 if (NEXT_INSN (insn
))
3600 for (next
= NEXT_INSN (trial
);
3601 next
&& NOTE_P (next
);
3602 next
= NEXT_INSN (next
))
3603 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3606 add_insn_after (next
, insn
, NULL
);
3612 /* Copy notes, particularly those related to the CFG. */
3613 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3615 switch (REG_NOTE_KIND (note
))
3618 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3624 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3627 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3631 case REG_NON_LOCAL_GOTO
:
3632 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3635 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3641 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3643 rtx reg
= XEXP (note
, 0);
3644 if (!FIND_REG_INC_NOTE (insn
, reg
)
3645 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3646 add_reg_note (insn
, REG_INC
, reg
);
3652 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3660 /* If there are LABELS inside the split insns increment the
3661 usage count so we don't delete the label. */
3665 while (insn
!= NULL_RTX
)
3667 /* JUMP_P insns have already been "marked" above. */
3668 if (NONJUMP_INSN_P (insn
))
3669 mark_label_nuses (PATTERN (insn
));
3671 insn
= PREV_INSN (insn
);
3675 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3677 delete_insn (trial
);
3679 emit_barrier_after (tem
);
3681 /* Recursively call try_split for each new insn created; by the
3682 time control returns here that insn will be fully split, so
3683 set LAST and continue from the insn after the one returned.
3684 We can't use next_active_insn here since AFTER may be a note.
3685 Ignore deleted insns, which can be occur if not optimizing. */
3686 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3687 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3688 tem
= try_split (PATTERN (tem
), tem
, 1);
3690 /* Return either the first or the last insn, depending on which was
3693 ? (after
? PREV_INSN (after
) : get_last_insn ())
3694 : NEXT_INSN (before
);
3697 /* Make and return an INSN rtx, initializing all its slots.
3698 Store PATTERN in the pattern slots. */
3701 make_insn_raw (rtx pattern
)
3705 insn
= rtx_alloc (INSN
);
3707 INSN_UID (insn
) = cur_insn_uid
++;
3708 PATTERN (insn
) = pattern
;
3709 INSN_CODE (insn
) = -1;
3710 REG_NOTES (insn
) = NULL
;
3711 INSN_LOCATION (insn
) = curr_insn_location ();
3712 BLOCK_FOR_INSN (insn
) = NULL
;
3714 #ifdef ENABLE_RTL_CHECKING
3717 && (returnjump_p (insn
)
3718 || (GET_CODE (insn
) == SET
3719 && SET_DEST (insn
) == pc_rtx
)))
3721 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3729 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3732 make_debug_insn_raw (rtx pattern
)
3736 insn
= rtx_alloc (DEBUG_INSN
);
3737 INSN_UID (insn
) = cur_debug_insn_uid
++;
3738 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3739 INSN_UID (insn
) = cur_insn_uid
++;
3741 PATTERN (insn
) = pattern
;
3742 INSN_CODE (insn
) = -1;
3743 REG_NOTES (insn
) = NULL
;
3744 INSN_LOCATION (insn
) = curr_insn_location ();
3745 BLOCK_FOR_INSN (insn
) = NULL
;
3750 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3753 make_jump_insn_raw (rtx pattern
)
3757 insn
= rtx_alloc (JUMP_INSN
);
3758 INSN_UID (insn
) = cur_insn_uid
++;
3760 PATTERN (insn
) = pattern
;
3761 INSN_CODE (insn
) = -1;
3762 REG_NOTES (insn
) = NULL
;
3763 JUMP_LABEL (insn
) = NULL
;
3764 INSN_LOCATION (insn
) = curr_insn_location ();
3765 BLOCK_FOR_INSN (insn
) = NULL
;
3770 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3773 make_call_insn_raw (rtx pattern
)
3777 insn
= rtx_alloc (CALL_INSN
);
3778 INSN_UID (insn
) = cur_insn_uid
++;
3780 PATTERN (insn
) = pattern
;
3781 INSN_CODE (insn
) = -1;
3782 REG_NOTES (insn
) = NULL
;
3783 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3784 INSN_LOCATION (insn
) = curr_insn_location ();
3785 BLOCK_FOR_INSN (insn
) = NULL
;
3790 /* Add INSN to the end of the doubly-linked list.
3791 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3796 PREV_INSN (insn
) = get_last_insn();
3797 NEXT_INSN (insn
) = 0;
3799 if (NULL
!= get_last_insn())
3800 NEXT_INSN (get_last_insn ()) = insn
;
3802 if (NULL
== get_insns ())
3803 set_first_insn (insn
);
3805 set_last_insn (insn
);
3808 /* Add INSN into the doubly-linked list after insn AFTER. This and
3809 the next should be the only functions called to insert an insn once
3810 delay slots have been filled since only they know how to update a
3814 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3816 rtx next
= NEXT_INSN (after
);
3818 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3820 NEXT_INSN (insn
) = next
;
3821 PREV_INSN (insn
) = after
;
3825 PREV_INSN (next
) = insn
;
3826 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3827 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3829 else if (get_last_insn () == after
)
3830 set_last_insn (insn
);
3833 struct sequence_stack
*stack
= seq_stack
;
3834 /* Scan all pending sequences too. */
3835 for (; stack
; stack
= stack
->next
)
3836 if (after
== stack
->last
)
3845 if (!BARRIER_P (after
)
3846 && !BARRIER_P (insn
)
3847 && (bb
= BLOCK_FOR_INSN (after
)))
3849 set_block_for_insn (insn
, bb
);
3851 df_insn_rescan (insn
);
3852 /* Should not happen as first in the BB is always
3853 either NOTE or LABEL. */
3854 if (BB_END (bb
) == after
3855 /* Avoid clobbering of structure when creating new BB. */
3856 && !BARRIER_P (insn
)
3857 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3861 NEXT_INSN (after
) = insn
;
3862 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3864 rtx sequence
= PATTERN (after
);
3865 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3869 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3870 the previous should be the only functions called to insert an insn
3871 once delay slots have been filled since only they know how to
3872 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3876 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3878 rtx prev
= PREV_INSN (before
);
3880 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3882 PREV_INSN (insn
) = prev
;
3883 NEXT_INSN (insn
) = before
;
3887 NEXT_INSN (prev
) = insn
;
3888 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3890 rtx sequence
= PATTERN (prev
);
3891 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3894 else if (get_insns () == before
)
3895 set_first_insn (insn
);
3898 struct sequence_stack
*stack
= seq_stack
;
3899 /* Scan all pending sequences too. */
3900 for (; stack
; stack
= stack
->next
)
3901 if (before
== stack
->first
)
3903 stack
->first
= insn
;
3911 && !BARRIER_P (before
)
3912 && !BARRIER_P (insn
))
3913 bb
= BLOCK_FOR_INSN (before
);
3917 set_block_for_insn (insn
, bb
);
3919 df_insn_rescan (insn
);
3920 /* Should not happen as first in the BB is always either NOTE or
3922 gcc_assert (BB_HEAD (bb
) != insn
3923 /* Avoid clobbering of structure when creating new BB. */
3925 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3928 PREV_INSN (before
) = insn
;
3929 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3930 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3934 /* Replace insn with an deleted instruction note. */
3937 set_insn_deleted (rtx insn
)
3939 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3940 PUT_CODE (insn
, NOTE
);
3941 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3945 /* Remove an insn from its doubly-linked list. This function knows how
3946 to handle sequences. */
3948 remove_insn (rtx insn
)
3950 rtx next
= NEXT_INSN (insn
);
3951 rtx prev
= PREV_INSN (insn
);
3954 /* Later in the code, the block will be marked dirty. */
3955 df_insn_delete (NULL
, INSN_UID (insn
));
3959 NEXT_INSN (prev
) = next
;
3960 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3962 rtx sequence
= PATTERN (prev
);
3963 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3966 else if (get_insns () == insn
)
3969 PREV_INSN (next
) = NULL
;
3970 set_first_insn (next
);
3974 struct sequence_stack
*stack
= seq_stack
;
3975 /* Scan all pending sequences too. */
3976 for (; stack
; stack
= stack
->next
)
3977 if (insn
== stack
->first
)
3979 stack
->first
= next
;
3988 PREV_INSN (next
) = prev
;
3989 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3990 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3992 else if (get_last_insn () == insn
)
3993 set_last_insn (prev
);
3996 struct sequence_stack
*stack
= seq_stack
;
3997 /* Scan all pending sequences too. */
3998 for (; stack
; stack
= stack
->next
)
3999 if (insn
== stack
->last
)
4007 if (!BARRIER_P (insn
)
4008 && (bb
= BLOCK_FOR_INSN (insn
)))
4010 if (NONDEBUG_INSN_P (insn
))
4011 df_set_bb_dirty (bb
);
4012 if (BB_HEAD (bb
) == insn
)
4014 /* Never ever delete the basic block note without deleting whole
4016 gcc_assert (!NOTE_P (insn
));
4017 BB_HEAD (bb
) = next
;
4019 if (BB_END (bb
) == insn
)
4024 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4027 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4029 gcc_assert (call_insn
&& CALL_P (call_insn
));
4031 /* Put the register usage information on the CALL. If there is already
4032 some usage information, put ours at the end. */
4033 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4037 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4038 link
= XEXP (link
, 1))
4041 XEXP (link
, 1) = call_fusage
;
4044 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4047 /* Delete all insns made since FROM.
4048 FROM becomes the new last instruction. */
4051 delete_insns_since (rtx from
)
4056 NEXT_INSN (from
) = 0;
4057 set_last_insn (from
);
4060 /* This function is deprecated, please use sequences instead.
4062 Move a consecutive bunch of insns to a different place in the chain.
4063 The insns to be moved are those between FROM and TO.
4064 They are moved to a new position after the insn AFTER.
4065 AFTER must not be FROM or TO or any insn in between.
4067 This function does not know about SEQUENCEs and hence should not be
4068 called after delay-slot filling has been done. */
4071 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4073 #ifdef ENABLE_CHECKING
4075 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4076 gcc_assert (after
!= x
);
4077 gcc_assert (after
!= to
);
4080 /* Splice this bunch out of where it is now. */
4081 if (PREV_INSN (from
))
4082 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4084 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4085 if (get_last_insn () == to
)
4086 set_last_insn (PREV_INSN (from
));
4087 if (get_insns () == from
)
4088 set_first_insn (NEXT_INSN (to
));
4090 /* Make the new neighbors point to it and it to them. */
4091 if (NEXT_INSN (after
))
4092 PREV_INSN (NEXT_INSN (after
)) = to
;
4094 NEXT_INSN (to
) = NEXT_INSN (after
);
4095 PREV_INSN (from
) = after
;
4096 NEXT_INSN (after
) = from
;
4097 if (after
== get_last_insn())
4101 /* Same as function above, but take care to update BB boundaries. */
4103 reorder_insns (rtx from
, rtx to
, rtx after
)
4105 rtx prev
= PREV_INSN (from
);
4106 basic_block bb
, bb2
;
4108 reorder_insns_nobb (from
, to
, after
);
4110 if (!BARRIER_P (after
)
4111 && (bb
= BLOCK_FOR_INSN (after
)))
4114 df_set_bb_dirty (bb
);
4116 if (!BARRIER_P (from
)
4117 && (bb2
= BLOCK_FOR_INSN (from
)))
4119 if (BB_END (bb2
) == to
)
4120 BB_END (bb2
) = prev
;
4121 df_set_bb_dirty (bb2
);
4124 if (BB_END (bb
) == after
)
4127 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4129 df_insn_change_bb (x
, bb
);
4134 /* Emit insn(s) of given code and pattern
4135 at a specified place within the doubly-linked list.
4137 All of the emit_foo global entry points accept an object
4138 X which is either an insn list or a PATTERN of a single
4141 There are thus a few canonical ways to generate code and
4142 emit it at a specific place in the instruction stream. For
4143 example, consider the instruction named SPOT and the fact that
4144 we would like to emit some instructions before SPOT. We might
4148 ... emit the new instructions ...
4149 insns_head = get_insns ();
4152 emit_insn_before (insns_head, SPOT);
4154 It used to be common to generate SEQUENCE rtl instead, but that
4155 is a relic of the past which no longer occurs. The reason is that
4156 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4157 generated would almost certainly die right after it was created. */
4160 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4161 rtx (*make_raw
) (rtx
))
4165 gcc_assert (before
);
4170 switch (GET_CODE (x
))
4182 rtx next
= NEXT_INSN (insn
);
4183 add_insn_before (insn
, before
, bb
);
4189 #ifdef ENABLE_RTL_CHECKING
4196 last
= (*make_raw
) (x
);
4197 add_insn_before (last
, before
, bb
);
4204 /* Make X be output before the instruction BEFORE. */
4207 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4209 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4212 /* Make an instruction with body X and code JUMP_INSN
4213 and output it before the instruction BEFORE. */
4216 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4218 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4219 make_jump_insn_raw
);
4222 /* Make an instruction with body X and code CALL_INSN
4223 and output it before the instruction BEFORE. */
4226 emit_call_insn_before_noloc (rtx x
, rtx before
)
4228 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4229 make_call_insn_raw
);
4232 /* Make an instruction with body X and code DEBUG_INSN
4233 and output it before the instruction BEFORE. */
4236 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4238 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4239 make_debug_insn_raw
);
4242 /* Make an insn of code BARRIER
4243 and output it before the insn BEFORE. */
4246 emit_barrier_before (rtx before
)
4248 rtx insn
= rtx_alloc (BARRIER
);
4250 INSN_UID (insn
) = cur_insn_uid
++;
4252 add_insn_before (insn
, before
, NULL
);
4256 /* Emit the label LABEL before the insn BEFORE. */
4259 emit_label_before (rtx label
, rtx before
)
4261 gcc_checking_assert (INSN_UID (label
) == 0);
4262 INSN_UID (label
) = cur_insn_uid
++;
4263 add_insn_before (label
, before
, NULL
);
4267 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4270 emit_note_before (enum insn_note subtype
, rtx before
)
4272 rtx note
= rtx_alloc (NOTE
);
4273 INSN_UID (note
) = cur_insn_uid
++;
4274 NOTE_KIND (note
) = subtype
;
4275 BLOCK_FOR_INSN (note
) = NULL
;
4276 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4278 add_insn_before (note
, before
, NULL
);
4282 /* Helper for emit_insn_after, handles lists of instructions
4286 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4290 if (!bb
&& !BARRIER_P (after
))
4291 bb
= BLOCK_FOR_INSN (after
);
4295 df_set_bb_dirty (bb
);
4296 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4297 if (!BARRIER_P (last
))
4299 set_block_for_insn (last
, bb
);
4300 df_insn_rescan (last
);
4302 if (!BARRIER_P (last
))
4304 set_block_for_insn (last
, bb
);
4305 df_insn_rescan (last
);
4307 if (BB_END (bb
) == after
)
4311 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4314 after_after
= NEXT_INSN (after
);
4316 NEXT_INSN (after
) = first
;
4317 PREV_INSN (first
) = after
;
4318 NEXT_INSN (last
) = after_after
;
4320 PREV_INSN (after_after
) = last
;
4322 if (after
== get_last_insn())
4323 set_last_insn (last
);
4329 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4330 rtx (*make_raw
)(rtx
))
4339 switch (GET_CODE (x
))
4348 last
= emit_insn_after_1 (x
, after
, bb
);
4351 #ifdef ENABLE_RTL_CHECKING
4358 last
= (*make_raw
) (x
);
4359 add_insn_after (last
, after
, bb
);
4366 /* Make X be output after the insn AFTER and set the BB of insn. If
4367 BB is NULL, an attempt is made to infer the BB from AFTER. */
4370 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4372 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4376 /* Make an insn of code JUMP_INSN with body X
4377 and output it after the insn AFTER. */
4380 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4382 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4385 /* Make an instruction with body X and code CALL_INSN
4386 and output it after the instruction AFTER. */
4389 emit_call_insn_after_noloc (rtx x
, rtx after
)
4391 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4394 /* Make an instruction with body X and code CALL_INSN
4395 and output it after the instruction AFTER. */
4398 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4400 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4403 /* Make an insn of code BARRIER
4404 and output it after the insn AFTER. */
4407 emit_barrier_after (rtx after
)
4409 rtx insn
= rtx_alloc (BARRIER
);
4411 INSN_UID (insn
) = cur_insn_uid
++;
4413 add_insn_after (insn
, after
, NULL
);
4417 /* Emit the label LABEL after the insn AFTER. */
4420 emit_label_after (rtx label
, rtx after
)
4422 gcc_checking_assert (INSN_UID (label
) == 0);
4423 INSN_UID (label
) = cur_insn_uid
++;
4424 add_insn_after (label
, after
, NULL
);
4428 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4431 emit_note_after (enum insn_note subtype
, rtx after
)
4433 rtx note
= rtx_alloc (NOTE
);
4434 INSN_UID (note
) = cur_insn_uid
++;
4435 NOTE_KIND (note
) = subtype
;
4436 BLOCK_FOR_INSN (note
) = NULL
;
4437 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4438 add_insn_after (note
, after
, NULL
);
4442 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4443 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4446 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4447 rtx (*make_raw
) (rtx
))
4449 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4451 if (pattern
== NULL_RTX
|| !loc
)
4454 after
= NEXT_INSN (after
);
4457 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4458 INSN_LOCATION (after
) = loc
;
4461 after
= NEXT_INSN (after
);
4466 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4467 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4471 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4472 rtx (*make_raw
) (rtx
))
4476 if (skip_debug_insns
)
4477 while (DEBUG_INSN_P (prev
))
4478 prev
= PREV_INSN (prev
);
4481 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4484 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4487 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4489 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4491 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4494 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4496 emit_insn_after (rtx pattern
, rtx after
)
4498 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4501 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4503 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4505 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4508 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4510 emit_jump_insn_after (rtx pattern
, rtx after
)
4512 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4515 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4517 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4519 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4522 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4524 emit_call_insn_after (rtx pattern
, rtx after
)
4526 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4529 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4531 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4533 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4536 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4538 emit_debug_insn_after (rtx pattern
, rtx after
)
4540 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4543 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4544 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4545 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4549 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4550 rtx (*make_raw
) (rtx
))
4552 rtx first
= PREV_INSN (before
);
4553 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4554 insnp
? before
: NULL_RTX
,
4557 if (pattern
== NULL_RTX
|| !loc
)
4561 first
= get_insns ();
4563 first
= NEXT_INSN (first
);
4566 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4567 INSN_LOCATION (first
) = loc
;
4570 first
= NEXT_INSN (first
);
4575 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4576 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4577 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4578 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4581 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4582 bool insnp
, rtx (*make_raw
) (rtx
))
4586 if (skip_debug_insns
)
4587 while (DEBUG_INSN_P (next
))
4588 next
= PREV_INSN (next
);
4591 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4594 return emit_pattern_before_noloc (pattern
, before
,
4595 insnp
? before
: NULL_RTX
,
4599 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4601 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4603 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4607 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4609 emit_insn_before (rtx pattern
, rtx before
)
4611 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4614 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4616 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4618 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4619 make_jump_insn_raw
);
4622 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4624 emit_jump_insn_before (rtx pattern
, rtx before
)
4626 return emit_pattern_before (pattern
, before
, true, false,
4627 make_jump_insn_raw
);
4630 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4632 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4634 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4635 make_call_insn_raw
);
4638 /* Like emit_call_insn_before_noloc,
4639 but set insn_location according to BEFORE. */
4641 emit_call_insn_before (rtx pattern
, rtx before
)
4643 return emit_pattern_before (pattern
, before
, true, false,
4644 make_call_insn_raw
);
4647 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4649 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4651 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4652 make_debug_insn_raw
);
4655 /* Like emit_debug_insn_before_noloc,
4656 but set insn_location according to BEFORE. */
4658 emit_debug_insn_before (rtx pattern
, rtx before
)
4660 return emit_pattern_before (pattern
, before
, false, false,
4661 make_debug_insn_raw
);
4664 /* Take X and emit it at the end of the doubly-linked
4667 Returns the last insn emitted. */
4672 rtx last
= get_last_insn();
4678 switch (GET_CODE (x
))
4690 rtx next
= NEXT_INSN (insn
);
4697 #ifdef ENABLE_RTL_CHECKING
4704 last
= make_insn_raw (x
);
4712 /* Make an insn of code DEBUG_INSN with pattern X
4713 and add it to the end of the doubly-linked list. */
4716 emit_debug_insn (rtx x
)
4718 rtx last
= get_last_insn();
4724 switch (GET_CODE (x
))
4736 rtx next
= NEXT_INSN (insn
);
4743 #ifdef ENABLE_RTL_CHECKING
4750 last
= make_debug_insn_raw (x
);
4758 /* Make an insn of code JUMP_INSN with pattern X
4759 and add it to the end of the doubly-linked list. */
4762 emit_jump_insn (rtx x
)
4764 rtx last
= NULL_RTX
, insn
;
4766 switch (GET_CODE (x
))
4778 rtx next
= NEXT_INSN (insn
);
4785 #ifdef ENABLE_RTL_CHECKING
4792 last
= make_jump_insn_raw (x
);
4800 /* Make an insn of code CALL_INSN with pattern X
4801 and add it to the end of the doubly-linked list. */
4804 emit_call_insn (rtx x
)
4808 switch (GET_CODE (x
))
4817 insn
= emit_insn (x
);
4820 #ifdef ENABLE_RTL_CHECKING
4827 insn
= make_call_insn_raw (x
);
4835 /* Add the label LABEL to the end of the doubly-linked list. */
4838 emit_label (rtx label
)
4840 gcc_checking_assert (INSN_UID (label
) == 0);
4841 INSN_UID (label
) = cur_insn_uid
++;
4846 /* Make an insn of code BARRIER
4847 and add it to the end of the doubly-linked list. */
4852 rtx barrier
= rtx_alloc (BARRIER
);
4853 INSN_UID (barrier
) = cur_insn_uid
++;
4858 /* Emit a copy of note ORIG. */
4861 emit_note_copy (rtx orig
)
4865 note
= rtx_alloc (NOTE
);
4867 INSN_UID (note
) = cur_insn_uid
++;
4868 NOTE_DATA (note
) = NOTE_DATA (orig
);
4869 NOTE_KIND (note
) = NOTE_KIND (orig
);
4870 BLOCK_FOR_INSN (note
) = NULL
;
4876 /* Make an insn of code NOTE or type NOTE_NO
4877 and add it to the end of the doubly-linked list. */
4880 emit_note (enum insn_note kind
)
4884 note
= rtx_alloc (NOTE
);
4885 INSN_UID (note
) = cur_insn_uid
++;
4886 NOTE_KIND (note
) = kind
;
4887 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4888 BLOCK_FOR_INSN (note
) = NULL
;
4893 /* Emit a clobber of lvalue X. */
4896 emit_clobber (rtx x
)
4898 /* CONCATs should not appear in the insn stream. */
4899 if (GET_CODE (x
) == CONCAT
)
4901 emit_clobber (XEXP (x
, 0));
4902 return emit_clobber (XEXP (x
, 1));
4904 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4907 /* Return a sequence of insns to clobber lvalue X. */
4921 /* Emit a use of rvalue X. */
4926 /* CONCATs should not appear in the insn stream. */
4927 if (GET_CODE (x
) == CONCAT
)
4929 emit_use (XEXP (x
, 0));
4930 return emit_use (XEXP (x
, 1));
4932 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4935 /* Return a sequence of insns to use rvalue X. */
4949 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4950 note of this type already exists, remove it first. */
4953 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4955 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4961 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4962 has multiple sets (some callers assume single_set
4963 means the insn only has one set, when in fact it
4964 means the insn only has one * useful * set). */
4965 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4971 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4972 It serves no useful purpose and breaks eliminate_regs. */
4973 if (GET_CODE (datum
) == ASM_OPERANDS
)
4978 XEXP (note
, 0) = datum
;
4979 df_notes_rescan (insn
);
4987 XEXP (note
, 0) = datum
;
4993 add_reg_note (insn
, kind
, datum
);
4999 df_notes_rescan (insn
);
5005 return REG_NOTES (insn
);
5008 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5010 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5012 rtx set
= single_set (insn
);
5014 if (set
&& SET_DEST (set
) == dst
)
5015 return set_unique_reg_note (insn
, kind
, datum
);
5019 /* Return an indication of which type of insn should have X as a body.
5020 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5022 static enum rtx_code
5023 classify_insn (rtx x
)
5027 if (GET_CODE (x
) == CALL
)
5029 if (ANY_RETURN_P (x
))
5031 if (GET_CODE (x
) == SET
)
5033 if (SET_DEST (x
) == pc_rtx
)
5035 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5040 if (GET_CODE (x
) == PARALLEL
)
5043 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5044 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5046 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5047 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5049 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5050 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5056 /* Emit the rtl pattern X as an appropriate kind of insn.
5057 If X is a label, it is simply added into the insn chain. */
5062 enum rtx_code code
= classify_insn (x
);
5067 return emit_label (x
);
5069 return emit_insn (x
);
5072 rtx insn
= emit_jump_insn (x
);
5073 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5074 return emit_barrier ();
5078 return emit_call_insn (x
);
5080 return emit_debug_insn (x
);
5086 /* Space for free sequence stack entries. */
5087 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5089 /* Begin emitting insns to a sequence. If this sequence will contain
5090 something that might cause the compiler to pop arguments to function
5091 calls (because those pops have previously been deferred; see
5092 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5093 before calling this function. That will ensure that the deferred
5094 pops are not accidentally emitted in the middle of this sequence. */
5097 start_sequence (void)
5099 struct sequence_stack
*tem
;
5101 if (free_sequence_stack
!= NULL
)
5103 tem
= free_sequence_stack
;
5104 free_sequence_stack
= tem
->next
;
5107 tem
= ggc_alloc_sequence_stack ();
5109 tem
->next
= seq_stack
;
5110 tem
->first
= get_insns ();
5111 tem
->last
= get_last_insn ();
5119 /* Set up the insn chain starting with FIRST as the current sequence,
5120 saving the previously current one. See the documentation for
5121 start_sequence for more information about how to use this function. */
5124 push_to_sequence (rtx first
)
5130 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5133 set_first_insn (first
);
5134 set_last_insn (last
);
5137 /* Like push_to_sequence, but take the last insn as an argument to avoid
5138 looping through the list. */
5141 push_to_sequence2 (rtx first
, rtx last
)
5145 set_first_insn (first
);
5146 set_last_insn (last
);
5149 /* Set up the outer-level insn chain
5150 as the current sequence, saving the previously current one. */
5153 push_topmost_sequence (void)
5155 struct sequence_stack
*stack
, *top
= NULL
;
5159 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5162 set_first_insn (top
->first
);
5163 set_last_insn (top
->last
);
5166 /* After emitting to the outer-level insn chain, update the outer-level
5167 insn chain, and restore the previous saved state. */
5170 pop_topmost_sequence (void)
5172 struct sequence_stack
*stack
, *top
= NULL
;
5174 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5177 top
->first
= get_insns ();
5178 top
->last
= get_last_insn ();
5183 /* After emitting to a sequence, restore previous saved state.
5185 To get the contents of the sequence just made, you must call
5186 `get_insns' *before* calling here.
5188 If the compiler might have deferred popping arguments while
5189 generating this sequence, and this sequence will not be immediately
5190 inserted into the instruction stream, use do_pending_stack_adjust
5191 before calling get_insns. That will ensure that the deferred
5192 pops are inserted into this sequence, and not into some random
5193 location in the instruction stream. See INHIBIT_DEFER_POP for more
5194 information about deferred popping of arguments. */
5199 struct sequence_stack
*tem
= seq_stack
;
5201 set_first_insn (tem
->first
);
5202 set_last_insn (tem
->last
);
5203 seq_stack
= tem
->next
;
5205 memset (tem
, 0, sizeof (*tem
));
5206 tem
->next
= free_sequence_stack
;
5207 free_sequence_stack
= tem
;
5210 /* Return 1 if currently emitting into a sequence. */
5213 in_sequence_p (void)
5215 return seq_stack
!= 0;
5218 /* Put the various virtual registers into REGNO_REG_RTX. */
5221 init_virtual_regs (void)
5223 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5224 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5225 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5226 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5227 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5228 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5229 = virtual_preferred_stack_boundary_rtx
;
5233 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5234 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5235 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5236 static int copy_insn_n_scratches
;
5238 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5239 copied an ASM_OPERANDS.
5240 In that case, it is the original input-operand vector. */
5241 static rtvec orig_asm_operands_vector
;
5243 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5244 copied an ASM_OPERANDS.
5245 In that case, it is the copied input-operand vector. */
5246 static rtvec copy_asm_operands_vector
;
5248 /* Likewise for the constraints vector. */
5249 static rtvec orig_asm_constraints_vector
;
5250 static rtvec copy_asm_constraints_vector
;
5252 /* Recursively create a new copy of an rtx for copy_insn.
5253 This function differs from copy_rtx in that it handles SCRATCHes and
5254 ASM_OPERANDs properly.
5255 Normally, this function is not used directly; use copy_insn as front end.
5256 However, you could first copy an insn pattern with copy_insn and then use
5257 this function afterwards to properly copy any REG_NOTEs containing
5261 copy_insn_1 (rtx orig
)
5266 const char *format_ptr
;
5271 code
= GET_CODE (orig
);
5286 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5291 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5292 if (copy_insn_scratch_in
[i
] == orig
)
5293 return copy_insn_scratch_out
[i
];
5297 if (shared_const_p (orig
))
5301 /* A MEM with a constant address is not sharable. The problem is that
5302 the constant address may need to be reloaded. If the mem is shared,
5303 then reloading one copy of this mem will cause all copies to appear
5304 to have been reloaded. */
5310 /* Copy the various flags, fields, and other information. We assume
5311 that all fields need copying, and then clear the fields that should
5312 not be copied. That is the sensible default behavior, and forces
5313 us to explicitly document why we are *not* copying a flag. */
5314 copy
= shallow_copy_rtx (orig
);
5316 /* We do not copy the USED flag, which is used as a mark bit during
5317 walks over the RTL. */
5318 RTX_FLAG (copy
, used
) = 0;
5320 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5323 RTX_FLAG (copy
, jump
) = 0;
5324 RTX_FLAG (copy
, call
) = 0;
5325 RTX_FLAG (copy
, frame_related
) = 0;
5328 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5330 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5331 switch (*format_ptr
++)
5334 if (XEXP (orig
, i
) != NULL
)
5335 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5340 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5341 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5342 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5343 XVEC (copy
, i
) = copy_asm_operands_vector
;
5344 else if (XVEC (orig
, i
) != NULL
)
5346 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5347 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5348 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5359 /* These are left unchanged. */
5366 if (code
== SCRATCH
)
5368 i
= copy_insn_n_scratches
++;
5369 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5370 copy_insn_scratch_in
[i
] = orig
;
5371 copy_insn_scratch_out
[i
] = copy
;
5373 else if (code
== ASM_OPERANDS
)
5375 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5376 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5377 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5378 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5384 /* Create a new copy of an rtx.
5385 This function differs from copy_rtx in that it handles SCRATCHes and
5386 ASM_OPERANDs properly.
5387 INSN doesn't really have to be a full INSN; it could be just the
5390 copy_insn (rtx insn
)
5392 copy_insn_n_scratches
= 0;
5393 orig_asm_operands_vector
= 0;
5394 orig_asm_constraints_vector
= 0;
5395 copy_asm_operands_vector
= 0;
5396 copy_asm_constraints_vector
= 0;
5397 return copy_insn_1 (insn
);
5400 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5401 on that assumption that INSN itself remains in its original place. */
5404 copy_delay_slot_insn (rtx insn
)
5406 /* Copy INSN with its rtx_code, all its notes, location etc. */
5407 insn
= copy_rtx (insn
);
5408 INSN_UID (insn
) = cur_insn_uid
++;
5412 /* Initialize data structures and variables in this file
5413 before generating rtl for each function. */
5418 set_first_insn (NULL
);
5419 set_last_insn (NULL
);
5420 if (MIN_NONDEBUG_INSN_UID
)
5421 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5424 cur_debug_insn_uid
= 1;
5425 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5426 first_label_num
= label_num
;
5429 /* Init the tables that describe all the pseudo regs. */
5431 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5433 crtl
->emit
.regno_pointer_align
5434 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5436 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5438 /* Put copies of all the hard registers into regno_reg_rtx. */
5439 memcpy (regno_reg_rtx
,
5440 initial_regno_reg_rtx
,
5441 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5443 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5444 init_virtual_regs ();
5446 /* Indicate that the virtual registers and stack locations are
5448 REG_POINTER (stack_pointer_rtx
) = 1;
5449 REG_POINTER (frame_pointer_rtx
) = 1;
5450 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5451 REG_POINTER (arg_pointer_rtx
) = 1;
5453 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5454 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5455 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5456 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5457 REG_POINTER (virtual_cfa_rtx
) = 1;
5459 #ifdef STACK_BOUNDARY
5460 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5461 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5462 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5463 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5465 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5466 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5467 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5468 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5469 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5472 #ifdef INIT_EXPANDERS
5477 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5480 gen_const_vector (enum machine_mode mode
, int constant
)
5485 enum machine_mode inner
;
5487 units
= GET_MODE_NUNITS (mode
);
5488 inner
= GET_MODE_INNER (mode
);
5490 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5492 v
= rtvec_alloc (units
);
5494 /* We need to call this function after we set the scalar const_tiny_rtx
5496 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5498 for (i
= 0; i
< units
; ++i
)
5499 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5501 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5505 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5506 all elements are zero, and the one vector when all elements are one. */
5508 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5510 enum machine_mode inner
= GET_MODE_INNER (mode
);
5511 int nunits
= GET_MODE_NUNITS (mode
);
5515 /* Check to see if all of the elements have the same value. */
5516 x
= RTVEC_ELT (v
, nunits
- 1);
5517 for (i
= nunits
- 2; i
>= 0; i
--)
5518 if (RTVEC_ELT (v
, i
) != x
)
5521 /* If the values are all the same, check to see if we can use one of the
5522 standard constant vectors. */
5525 if (x
== CONST0_RTX (inner
))
5526 return CONST0_RTX (mode
);
5527 else if (x
== CONST1_RTX (inner
))
5528 return CONST1_RTX (mode
);
5529 else if (x
== CONSTM1_RTX (inner
))
5530 return CONSTM1_RTX (mode
);
5533 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5536 /* Initialise global register information required by all functions. */
5539 init_emit_regs (void)
5542 enum machine_mode mode
;
5545 /* Reset register attributes */
5546 htab_empty (reg_attrs_htab
);
5548 /* We need reg_raw_mode, so initialize the modes now. */
5549 init_reg_modes_target ();
5551 /* Assign register numbers to the globally defined register rtx. */
5552 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5553 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5554 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5555 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5556 virtual_incoming_args_rtx
=
5557 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5558 virtual_stack_vars_rtx
=
5559 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5560 virtual_stack_dynamic_rtx
=
5561 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5562 virtual_outgoing_args_rtx
=
5563 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5564 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5565 virtual_preferred_stack_boundary_rtx
=
5566 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5568 /* Initialize RTL for commonly used hard registers. These are
5569 copied into regno_reg_rtx as we begin to compile each function. */
5570 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5571 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5573 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5574 return_address_pointer_rtx
5575 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5578 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5579 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5581 pic_offset_table_rtx
= NULL_RTX
;
5583 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5585 mode
= (enum machine_mode
) i
;
5586 attrs
= ggc_alloc_cleared_mem_attrs ();
5587 attrs
->align
= BITS_PER_UNIT
;
5588 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5589 if (mode
!= BLKmode
)
5591 attrs
->size_known_p
= true;
5592 attrs
->size
= GET_MODE_SIZE (mode
);
5593 if (STRICT_ALIGNMENT
)
5594 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5596 mode_mem_attrs
[i
] = attrs
;
5600 /* Create some permanent unique rtl objects shared between all functions. */
5603 init_emit_once (void)
5606 enum machine_mode mode
;
5607 enum machine_mode double_mode
;
5609 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5611 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5612 const_int_htab_eq
, NULL
);
5614 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5615 const_double_htab_eq
, NULL
);
5617 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5618 const_fixed_htab_eq
, NULL
);
5620 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5621 mem_attrs_htab_eq
, NULL
);
5622 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5623 reg_attrs_htab_eq
, NULL
);
5625 /* Compute the word and byte modes. */
5627 byte_mode
= VOIDmode
;
5628 word_mode
= VOIDmode
;
5629 double_mode
= VOIDmode
;
5631 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5633 mode
= GET_MODE_WIDER_MODE (mode
))
5635 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5636 && byte_mode
== VOIDmode
)
5639 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5640 && word_mode
== VOIDmode
)
5644 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5646 mode
= GET_MODE_WIDER_MODE (mode
))
5648 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5649 && double_mode
== VOIDmode
)
5653 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5655 #ifdef INIT_EXPANDERS
5656 /* This is to initialize {init|mark|free}_machine_status before the first
5657 call to push_function_context_to. This is needed by the Chill front
5658 end which calls push_function_context_to before the first call to
5659 init_function_start. */
5663 /* Create the unique rtx's for certain rtx codes and operand values. */
5665 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5666 tries to use these variables. */
5667 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5668 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5669 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5671 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5672 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5673 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5675 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5677 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5678 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5679 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5684 dconsthalf
= dconst1
;
5685 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5687 for (i
= 0; i
< 3; i
++)
5689 const REAL_VALUE_TYPE
*const r
=
5690 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5692 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5694 mode
= GET_MODE_WIDER_MODE (mode
))
5695 const_tiny_rtx
[i
][(int) mode
] =
5696 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5698 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5700 mode
= GET_MODE_WIDER_MODE (mode
))
5701 const_tiny_rtx
[i
][(int) mode
] =
5702 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5704 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5706 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5708 mode
= GET_MODE_WIDER_MODE (mode
))
5709 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5711 for (mode
= MIN_MODE_PARTIAL_INT
;
5712 mode
<= MAX_MODE_PARTIAL_INT
;
5713 mode
= (enum machine_mode
)((int)(mode
) + 1))
5714 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5717 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5719 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5721 mode
= GET_MODE_WIDER_MODE (mode
))
5722 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5724 for (mode
= MIN_MODE_PARTIAL_INT
;
5725 mode
<= MAX_MODE_PARTIAL_INT
;
5726 mode
= (enum machine_mode
)((int)(mode
) + 1))
5727 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5729 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5731 mode
= GET_MODE_WIDER_MODE (mode
))
5733 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5734 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5737 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5739 mode
= GET_MODE_WIDER_MODE (mode
))
5741 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5742 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5745 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5747 mode
= GET_MODE_WIDER_MODE (mode
))
5749 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5750 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5751 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5754 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5756 mode
= GET_MODE_WIDER_MODE (mode
))
5758 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5759 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5762 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5764 mode
= GET_MODE_WIDER_MODE (mode
))
5766 FCONST0(mode
).data
.high
= 0;
5767 FCONST0(mode
).data
.low
= 0;
5768 FCONST0(mode
).mode
= mode
;
5769 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5770 FCONST0 (mode
), mode
);
5773 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5775 mode
= GET_MODE_WIDER_MODE (mode
))
5777 FCONST0(mode
).data
.high
= 0;
5778 FCONST0(mode
).data
.low
= 0;
5779 FCONST0(mode
).mode
= mode
;
5780 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5781 FCONST0 (mode
), mode
);
5784 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5786 mode
= GET_MODE_WIDER_MODE (mode
))
5788 FCONST0(mode
).data
.high
= 0;
5789 FCONST0(mode
).data
.low
= 0;
5790 FCONST0(mode
).mode
= mode
;
5791 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5792 FCONST0 (mode
), mode
);
5794 /* We store the value 1. */
5795 FCONST1(mode
).data
.high
= 0;
5796 FCONST1(mode
).data
.low
= 0;
5797 FCONST1(mode
).mode
= mode
;
5799 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5800 HOST_BITS_PER_DOUBLE_INT
,
5801 SIGNED_FIXED_POINT_MODE_P (mode
));
5802 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5803 FCONST1 (mode
), mode
);
5806 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5808 mode
= GET_MODE_WIDER_MODE (mode
))
5810 FCONST0(mode
).data
.high
= 0;
5811 FCONST0(mode
).data
.low
= 0;
5812 FCONST0(mode
).mode
= mode
;
5813 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5814 FCONST0 (mode
), mode
);
5816 /* We store the value 1. */
5817 FCONST1(mode
).data
.high
= 0;
5818 FCONST1(mode
).data
.low
= 0;
5819 FCONST1(mode
).mode
= mode
;
5821 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5822 HOST_BITS_PER_DOUBLE_INT
,
5823 SIGNED_FIXED_POINT_MODE_P (mode
));
5824 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5825 FCONST1 (mode
), mode
);
5828 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5830 mode
= GET_MODE_WIDER_MODE (mode
))
5832 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5835 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5837 mode
= GET_MODE_WIDER_MODE (mode
))
5839 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5842 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5844 mode
= GET_MODE_WIDER_MODE (mode
))
5846 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5847 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5850 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5852 mode
= GET_MODE_WIDER_MODE (mode
))
5854 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5855 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5858 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5859 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5860 const_tiny_rtx
[0][i
] = const0_rtx
;
5862 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5863 if (STORE_FLAG_VALUE
== 1)
5864 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5866 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5867 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5868 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5869 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5872 /* Produce exact duplicate of insn INSN after AFTER.
5873 Care updating of libcall regions if present. */
5876 emit_copy_of_insn_after (rtx insn
, rtx after
)
5880 switch (GET_CODE (insn
))
5883 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5887 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5891 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5895 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5896 if (CALL_INSN_FUNCTION_USAGE (insn
))
5897 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5898 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5899 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5900 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5901 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5902 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5903 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5910 /* Update LABEL_NUSES. */
5911 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5913 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
5915 /* If the old insn is frame related, then so is the new one. This is
5916 primarily needed for IA-64 unwind info which marks epilogue insns,
5917 which may be duplicated by the basic block reordering code. */
5918 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5920 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5921 will make them. REG_LABEL_TARGETs are created there too, but are
5922 supposed to be sticky, so we copy them. */
5923 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5924 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5926 if (GET_CODE (link
) == EXPR_LIST
)
5927 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5928 copy_insn_1 (XEXP (link
, 0)));
5930 add_reg_note (new_rtx
, REG_NOTE_KIND (link
), XEXP (link
, 0));
5933 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5937 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5939 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5941 if (hard_reg_clobbers
[mode
][regno
])
5942 return hard_reg_clobbers
[mode
][regno
];
5944 return (hard_reg_clobbers
[mode
][regno
] =
5945 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5948 location_t prologue_location
;
5949 location_t epilogue_location
;
5951 /* Hold current location information and last location information, so the
5952 datastructures are built lazily only when some instructions in given
5953 place are needed. */
5954 static location_t curr_location
, last_location
;
5956 /* Allocate insn location datastructure. */
5958 insn_locations_init (void)
5960 prologue_location
= epilogue_location
= 0;
5961 curr_location
= UNKNOWN_LOCATION
;
5962 last_location
= UNKNOWN_LOCATION
;
5965 /* At the end of emit stage, clear current location. */
5967 insn_locations_finalize (void)
5969 epilogue_location
= curr_location
;
5970 curr_location
= UNKNOWN_LOCATION
;
5973 /* Set current location. */
5975 set_curr_insn_location (location_t location
)
5977 curr_location
= location
;
5980 /* Get current location. */
5982 curr_insn_location (void)
5984 return curr_location
;
5987 /* Return lexical scope block insn belongs to. */
5989 insn_scope (const_rtx insn
)
5991 return LOCATION_BLOCK (INSN_LOCATION (insn
));
5994 /* Return line number of the statement that produced this insn. */
5996 insn_line (const_rtx insn
)
5998 return LOCATION_LINE (INSN_LOCATION (insn
));
6001 /* Return source file of the statement that produced this insn. */
6003 insn_file (const_rtx insn
)
6005 return LOCATION_FILE (INSN_LOCATION (insn
));
6008 /* Return true if memory model MODEL requires a pre-operation (release-style)
6009 barrier or a post-operation (acquire-style) barrier. While not universal,
6010 this function matches behavior of several targets. */
6013 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6017 case MEMMODEL_RELAXED
:
6018 case MEMMODEL_CONSUME
:
6020 case MEMMODEL_RELEASE
:
6022 case MEMMODEL_ACQUIRE
:
6024 case MEMMODEL_ACQ_REL
:
6025 case MEMMODEL_SEQ_CST
:
6032 #include "gt-emit-rtl.h"