1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl
[GR_MAX
];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
108 REAL_VALUE_TYPE dconst0
;
109 REAL_VALUE_TYPE dconst1
;
110 REAL_VALUE_TYPE dconst2
;
111 REAL_VALUE_TYPE dconstm1
;
113 /* All references to the following fixed hard registers go through
114 these unique rtl objects. On machines where the frame-pointer and
115 arg-pointer are the same register, they use the same unique object.
117 After register allocation, other rtl objects which used to be pseudo-regs
118 may be clobbered to refer to the frame-pointer register.
119 But references that were originally to the frame-pointer can be
120 distinguished from the others because they contain frame_pointer_rtx.
122 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
123 tricky: until register elimination has taken place hard_frame_pointer_rtx
124 should be used if it is being set, and frame_pointer_rtx otherwise. After
125 register elimination hard_frame_pointer_rtx should always be used.
126 On machines where the two registers are same (most) then these are the
129 In an inline procedure, the stack and frame pointer rtxs may not be
130 used for anything else. */
131 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
132 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
133 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
134 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
135 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
152 htab_t const_int_htab
;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
156 htab_t mem_attrs_htab
;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
160 htab_t const_double_htab
;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_linenum (cfun->emit->x_last_linenum)
166 #define last_filename (cfun->emit->x_last_filename)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx make_jump_insn_raw
PARAMS ((rtx
));
170 static rtx make_call_insn_raw
PARAMS ((rtx
));
171 static rtx find_line_note
PARAMS ((rtx
));
172 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
174 static void unshare_all_rtl_1
PARAMS ((rtx
));
175 static void unshare_all_decls
PARAMS ((tree
));
176 static void reset_used_decls
PARAMS ((tree
));
177 static void mark_label_nuses
PARAMS ((rtx
));
178 static hashval_t const_int_htab_hash
PARAMS ((const void *));
179 static int const_int_htab_eq
PARAMS ((const void *,
181 static hashval_t const_double_htab_hash
PARAMS ((const void *));
182 static int const_double_htab_eq
PARAMS ((const void *,
184 static rtx lookup_const_double
PARAMS ((rtx
));
185 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
186 static int mem_attrs_htab_eq
PARAMS ((const void *,
188 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
191 static tree component_ref_for_mem_expr
PARAMS ((tree
));
192 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
194 /* Probability of the conditional branch currently proceeded by try_split.
195 Set to -1 otherwise. */
196 int split_branch_probability
= -1;
198 /* Returns a hash code for X (which is a really a CONST_INT). */
201 const_int_htab_hash (x
)
204 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
207 /* Returns nonzero if the value represented by X (which is really a
208 CONST_INT) is the same as that given by Y (which is really a
212 const_int_htab_eq (x
, y
)
216 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (x
)
227 if (GET_MODE (value
) == VOIDmode
)
228 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
230 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
234 /* Returns nonzero if the value represented by X (really a ...)
235 is the same as that represented by Y (really a ...) */
237 const_double_htab_eq (x
, y
)
241 rtx a
= (rtx
)x
, b
= (rtx
)y
;
244 if (GET_MODE (a
) != GET_MODE (b
))
246 if (GET_MODE (a
) == VOIDmode
)
247 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
248 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
250 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
251 CONST_DOUBLE_REAL_VALUE (b
));
254 /* Returns a hash code for X (which is a really a mem_attrs *). */
257 mem_attrs_htab_hash (x
)
260 mem_attrs
*p
= (mem_attrs
*) x
;
262 return (p
->alias
^ (p
->align
* 1000)
263 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
264 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
268 /* Returns nonzero if the value represented by X (which is really a
269 mem_attrs *) is the same as that given by Y (which is also really a
273 mem_attrs_htab_eq (x
, y
)
277 mem_attrs
*p
= (mem_attrs
*) x
;
278 mem_attrs
*q
= (mem_attrs
*) y
;
280 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
281 && p
->size
== q
->size
&& p
->align
== q
->align
);
284 /* Allocate a new mem_attrs structure and insert it into the hash table if
285 one identical to it is not already in the table. We are doing this for
289 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
295 enum machine_mode mode
;
300 /* If everything is the default, we can just return zero. */
301 if (alias
== 0 && expr
== 0 && offset
== 0
303 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
304 && (align
== BITS_PER_UNIT
306 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
311 attrs
.offset
= offset
;
315 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
318 *slot
= ggc_alloc (sizeof (mem_attrs
));
319 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
325 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
326 don't attempt to share with the various global pieces of rtl (such as
327 frame_pointer_rtx). */
330 gen_raw_REG (mode
, regno
)
331 enum machine_mode mode
;
334 rtx x
= gen_rtx_raw_REG (mode
, regno
);
335 ORIGINAL_REGNO (x
) = regno
;
339 /* There are some RTL codes that require special attention; the generation
340 functions do the raw handling. If you add to this list, modify
341 special_rtx in gengenrtl.c as well. */
344 gen_rtx_CONST_INT (mode
, arg
)
345 enum machine_mode mode ATTRIBUTE_UNUSED
;
350 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
351 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
353 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
354 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
355 return const_true_rtx
;
358 /* Look up the CONST_INT in the hash table. */
359 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
360 (hashval_t
) arg
, INSERT
);
362 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
368 gen_int_mode (c
, mode
)
370 enum machine_mode mode
;
372 return GEN_INT (trunc_int_for_mode (c
, mode
));
375 /* CONST_DOUBLEs might be created from pairs of integers, or from
376 REAL_VALUE_TYPEs. Also, their length is known only at run time,
377 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
379 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
380 hash table. If so, return its counterpart; otherwise add it
381 to the hash table and return it. */
383 lookup_const_double (real
)
386 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
393 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
394 VALUE in mode MODE. */
396 const_double_from_real_value (value
, mode
)
397 REAL_VALUE_TYPE value
;
398 enum machine_mode mode
;
400 rtx real
= rtx_alloc (CONST_DOUBLE
);
401 PUT_MODE (real
, mode
);
403 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
405 return lookup_const_double (real
);
408 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
409 of ints: I0 is the low-order word and I1 is the high-order word.
410 Do not use this routine for non-integer modes; convert to
411 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
414 immed_double_const (i0
, i1
, mode
)
415 HOST_WIDE_INT i0
, i1
;
416 enum machine_mode mode
;
421 if (mode
!= VOIDmode
)
424 if (GET_MODE_CLASS (mode
) != MODE_INT
425 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
426 /* We can get a 0 for an error mark. */
427 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
428 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
431 /* We clear out all bits that don't belong in MODE, unless they and
432 our sign bit are all one. So we get either a reasonable negative
433 value or a reasonable unsigned value for this mode. */
434 width
= GET_MODE_BITSIZE (mode
);
435 if (width
< HOST_BITS_PER_WIDE_INT
436 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
437 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
438 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
439 else if (width
== HOST_BITS_PER_WIDE_INT
440 && ! (i1
== ~0 && i0
< 0))
442 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
443 /* We cannot represent this value as a constant. */
446 /* If this would be an entire word for the target, but is not for
447 the host, then sign-extend on the host so that the number will
448 look the same way on the host that it would on the target.
450 For example, when building a 64 bit alpha hosted 32 bit sparc
451 targeted compiler, then we want the 32 bit unsigned value -1 to be
452 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
453 The latter confuses the sparc backend. */
455 if (width
< HOST_BITS_PER_WIDE_INT
456 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
457 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
459 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
462 ??? Strictly speaking, this is wrong if we create a CONST_INT for
463 a large unsigned constant with the size of MODE being
464 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
465 in a wider mode. In that case we will mis-interpret it as a
468 Unfortunately, the only alternative is to make a CONST_DOUBLE for
469 any constant in any mode if it is an unsigned constant larger
470 than the maximum signed integer in an int on the host. However,
471 doing this will break everyone that always expects to see a
472 CONST_INT for SImode and smaller.
474 We have always been making CONST_INTs in this case, so nothing
475 new is being broken. */
477 if (width
<= HOST_BITS_PER_WIDE_INT
)
478 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
481 /* If this integer fits in one word, return a CONST_INT. */
482 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
485 /* We use VOIDmode for integers. */
486 value
= rtx_alloc (CONST_DOUBLE
);
487 PUT_MODE (value
, VOIDmode
);
489 CONST_DOUBLE_LOW (value
) = i0
;
490 CONST_DOUBLE_HIGH (value
) = i1
;
492 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
493 XWINT (value
, i
) = 0;
495 return lookup_const_double (value
);
499 gen_rtx_REG (mode
, regno
)
500 enum machine_mode mode
;
503 /* In case the MD file explicitly references the frame pointer, have
504 all such references point to the same frame pointer. This is
505 used during frame pointer elimination to distinguish the explicit
506 references to these registers from pseudos that happened to be
509 If we have eliminated the frame pointer or arg pointer, we will
510 be using it as a normal register, for example as a spill
511 register. In such cases, we might be accessing it in a mode that
512 is not Pmode and therefore cannot use the pre-allocated rtx.
514 Also don't do this when we are making new REGs in reload, since
515 we don't want to get confused with the real pointers. */
517 if (mode
== Pmode
&& !reload_in_progress
)
519 if (regno
== FRAME_POINTER_REGNUM
520 && (!reload_completed
|| frame_pointer_needed
))
521 return frame_pointer_rtx
;
522 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
523 if (regno
== HARD_FRAME_POINTER_REGNUM
524 && (!reload_completed
|| frame_pointer_needed
))
525 return hard_frame_pointer_rtx
;
527 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
528 if (regno
== ARG_POINTER_REGNUM
)
529 return arg_pointer_rtx
;
531 #ifdef RETURN_ADDRESS_POINTER_REGNUM
532 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
533 return return_address_pointer_rtx
;
535 if (regno
== PIC_OFFSET_TABLE_REGNUM
536 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
537 return pic_offset_table_rtx
;
538 if (regno
== STACK_POINTER_REGNUM
)
539 return stack_pointer_rtx
;
543 /* If the per-function register table has been set up, try to re-use
544 an existing entry in that table to avoid useless generation of RTL.
546 This code is disabled for now until we can fix the various backends
547 which depend on having non-shared hard registers in some cases. Long
548 term we want to re-enable this code as it can significantly cut down
549 on the amount of useless RTL that gets generated.
551 We'll also need to fix some code that runs after reload that wants to
552 set ORIGINAL_REGNO. */
557 && regno
< FIRST_PSEUDO_REGISTER
558 && reg_raw_mode
[regno
] == mode
)
559 return regno_reg_rtx
[regno
];
562 return gen_raw_REG (mode
, regno
);
566 gen_rtx_MEM (mode
, addr
)
567 enum machine_mode mode
;
570 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
572 /* This field is not cleared by the mere allocation of the rtx, so
580 gen_rtx_SUBREG (mode
, reg
, offset
)
581 enum machine_mode mode
;
585 /* This is the most common failure type.
586 Catch it early so we can see who does it. */
587 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
590 /* This check isn't usable right now because combine will
591 throw arbitrary crap like a CALL into a SUBREG in
592 gen_lowpart_for_combine so we must just eat it. */
594 /* Check for this too. */
595 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
598 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
601 /* Generate a SUBREG representing the least-significant part of REG if MODE
602 is smaller than mode of REG, otherwise paradoxical SUBREG. */
605 gen_lowpart_SUBREG (mode
, reg
)
606 enum machine_mode mode
;
609 enum machine_mode inmode
;
611 inmode
= GET_MODE (reg
);
612 if (inmode
== VOIDmode
)
614 return gen_rtx_SUBREG (mode
, reg
,
615 subreg_lowpart_offset (mode
, inmode
));
618 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
620 ** This routine generates an RTX of the size specified by
621 ** <code>, which is an RTX code. The RTX structure is initialized
622 ** from the arguments <element1> through <elementn>, which are
623 ** interpreted according to the specific RTX type's format. The
624 ** special machine mode associated with the rtx (if any) is specified
627 ** gen_rtx can be invoked in a way which resembles the lisp-like
628 ** rtx it will generate. For example, the following rtx structure:
630 ** (plus:QI (mem:QI (reg:SI 1))
631 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
633 ** ...would be generated by the following C code:
635 ** gen_rtx (PLUS, QImode,
636 ** gen_rtx (MEM, QImode,
637 ** gen_rtx (REG, SImode, 1)),
638 ** gen_rtx (MEM, QImode,
639 ** gen_rtx (PLUS, SImode,
640 ** gen_rtx (REG, SImode, 2),
641 ** gen_rtx (REG, SImode, 3)))),
646 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
648 int i
; /* Array indices... */
649 const char *fmt
; /* Current rtx's format... */
650 rtx rt_val
; /* RTX to return to caller... */
653 VA_FIXEDARG (p
, enum rtx_code
, code
);
654 VA_FIXEDARG (p
, enum machine_mode
, mode
);
659 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
664 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
665 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
667 rt_val
= immed_double_const (arg0
, arg1
, mode
);
672 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
676 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
680 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
681 rt_val
->mode
= mode
; /* Store the machine mode... */
683 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
684 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
688 case '0': /* Unused field. */
691 case 'i': /* An integer? */
692 XINT (rt_val
, i
) = va_arg (p
, int);
695 case 'w': /* A wide integer? */
696 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
699 case 's': /* A string? */
700 XSTR (rt_val
, i
) = va_arg (p
, char *);
703 case 'e': /* An expression? */
704 case 'u': /* An insn? Same except when printing. */
705 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
708 case 'E': /* An RTX vector? */
709 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
712 case 'b': /* A bitmap? */
713 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
716 case 't': /* A tree? */
717 XTREE (rt_val
, i
) = va_arg (p
, tree
);
731 /* gen_rtvec (n, [rt1, ..., rtn])
733 ** This routine creates an rtvec and stores within it the
734 ** pointers to rtx's which are its arguments.
739 gen_rtvec
VPARAMS ((int n
, ...))
745 VA_FIXEDARG (p
, int, n
);
748 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
750 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
752 for (i
= 0; i
< n
; i
++)
753 vector
[i
] = va_arg (p
, rtx
);
755 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
759 return gen_rtvec_v (save_n
, vector
);
763 gen_rtvec_v (n
, argp
)
771 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
773 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
775 for (i
= 0; i
< n
; i
++)
776 rt_val
->elem
[i
] = *argp
++;
781 /* Generate a REG rtx for a new pseudo register of mode MODE.
782 This pseudo is assigned the next sequential register number. */
786 enum machine_mode mode
;
788 struct function
*f
= cfun
;
791 /* Don't let anything called after initial flow analysis create new
796 if (generating_concat_p
797 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
798 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
800 /* For complex modes, don't make a single pseudo.
801 Instead, make a CONCAT of two pseudos.
802 This allows noncontiguous allocation of the real and imaginary parts,
803 which makes much better code. Besides, allocating DCmode
804 pseudos overstrains reload on some machines like the 386. */
805 rtx realpart
, imagpart
;
806 int size
= GET_MODE_UNIT_SIZE (mode
);
807 enum machine_mode partmode
808 = mode_for_size (size
* BITS_PER_UNIT
,
809 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
810 ? MODE_FLOAT
: MODE_INT
),
813 realpart
= gen_reg_rtx (partmode
);
814 imagpart
= gen_reg_rtx (partmode
);
815 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
818 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
819 enough to have an element for this pseudo reg number. */
821 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
823 int old_size
= f
->emit
->regno_pointer_align_length
;
828 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
829 memset (new + old_size
, 0, old_size
);
830 f
->emit
->regno_pointer_align
= (unsigned char *) new;
832 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
833 old_size
* 2 * sizeof (rtx
));
834 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
835 regno_reg_rtx
= new1
;
837 new2
= (tree
*) ggc_realloc (f
->emit
->regno_decl
,
838 old_size
* 2 * sizeof (tree
));
839 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
840 f
->emit
->regno_decl
= new2
;
842 f
->emit
->regno_pointer_align_length
= old_size
* 2;
845 val
= gen_raw_REG (mode
, reg_rtx_no
);
846 regno_reg_rtx
[reg_rtx_no
++] = val
;
850 /* Identify REG (which may be a CONCAT) as a user register. */
856 if (GET_CODE (reg
) == CONCAT
)
858 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
859 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
861 else if (GET_CODE (reg
) == REG
)
862 REG_USERVAR_P (reg
) = 1;
867 /* Identify REG as a probable pointer register and show its alignment
868 as ALIGN, if nonzero. */
871 mark_reg_pointer (reg
, align
)
875 if (! REG_POINTER (reg
))
877 REG_POINTER (reg
) = 1;
880 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
882 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
883 /* We can no-longer be sure just how aligned this pointer is */
884 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
887 /* Return 1 plus largest pseudo reg number used in the current function. */
895 /* Return 1 + the largest label number used so far in the current function. */
900 if (last_label_num
&& label_num
== base_label_num
)
901 return last_label_num
;
905 /* Return first label number used in this function (if any were used). */
908 get_first_label_num ()
910 return first_label_num
;
913 /* Return the final regno of X, which is a SUBREG of a hard
916 subreg_hard_regno (x
, check_mode
)
920 enum machine_mode mode
= GET_MODE (x
);
921 unsigned int byte_offset
, base_regno
, final_regno
;
922 rtx reg
= SUBREG_REG (x
);
924 /* This is where we attempt to catch illegal subregs
925 created by the compiler. */
926 if (GET_CODE (x
) != SUBREG
927 || GET_CODE (reg
) != REG
)
929 base_regno
= REGNO (reg
);
930 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
932 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
935 /* Catch non-congruent offsets too. */
936 byte_offset
= SUBREG_BYTE (x
);
937 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
940 final_regno
= subreg_regno (x
);
945 /* Return a value representing some low-order bits of X, where the number
946 of low-order bits is given by MODE. Note that no conversion is done
947 between floating-point and fixed-point values, rather, the bit
948 representation is returned.
950 This function handles the cases in common between gen_lowpart, below,
951 and two variants in cse.c and combine.c. These are the cases that can
952 be safely handled at all points in the compilation.
954 If this is not a case we can handle, return 0. */
957 gen_lowpart_common (mode
, x
)
958 enum machine_mode mode
;
961 int msize
= GET_MODE_SIZE (mode
);
962 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
965 if (GET_MODE (x
) == mode
)
968 /* MODE must occupy no more words than the mode of X. */
969 if (GET_MODE (x
) != VOIDmode
970 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
971 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
974 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
975 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
976 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
979 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
981 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
982 && (GET_MODE_CLASS (mode
) == MODE_INT
983 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
985 /* If we are getting the low-order part of something that has been
986 sign- or zero-extended, we can either just use the object being
987 extended or make a narrower extension. If we want an even smaller
988 piece than the size of the object being extended, call ourselves
991 This case is used mostly by combine and cse. */
993 if (GET_MODE (XEXP (x
, 0)) == mode
)
995 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
996 return gen_lowpart_common (mode
, XEXP (x
, 0));
997 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
998 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1000 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1001 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
1002 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
1003 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1004 from the low-order part of the constant. */
1005 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1006 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1007 && GET_MODE (x
) == VOIDmode
1008 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1010 /* If MODE is twice the host word size, X is already the desired
1011 representation. Otherwise, if MODE is wider than a word, we can't
1012 do this. If MODE is exactly a word, return just one CONST_INT. */
1014 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1016 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1018 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1019 return (GET_CODE (x
) == CONST_INT
? x
1020 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1023 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1024 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1025 : CONST_DOUBLE_LOW (x
));
1027 /* Sign extend to HOST_WIDE_INT. */
1028 val
= trunc_int_for_mode (val
, mode
);
1030 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1035 /* The floating-point emulator can handle all conversions between
1036 FP and integer operands. This simplifies reload because it
1037 doesn't have to deal with constructs like (subreg:DI
1038 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1039 /* Single-precision floats are always 32-bits and double-precision
1040 floats are always 64-bits. */
1042 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1043 && GET_MODE_BITSIZE (mode
) == 32
1044 && GET_CODE (x
) == CONST_INT
)
1047 long i
= INTVAL (x
);
1049 real_from_target (&r
, &i
, mode
);
1050 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1052 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1053 && GET_MODE_BITSIZE (mode
) == 64
1054 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1055 && GET_MODE (x
) == VOIDmode
)
1058 HOST_WIDE_INT low
, high
;
1061 if (GET_CODE (x
) == CONST_INT
)
1064 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1068 low
= CONST_DOUBLE_LOW (x
);
1069 high
= CONST_DOUBLE_HIGH (x
);
1072 if (HOST_BITS_PER_WIDE_INT
> 32)
1073 high
= low
>> 31 >> 1;
1075 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1077 if (WORDS_BIG_ENDIAN
)
1078 i
[0] = high
, i
[1] = low
;
1080 i
[0] = low
, i
[1] = high
;
1082 real_from_target (&r
, i
, mode
);
1083 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1085 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1086 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1087 && GET_CODE (x
) == CONST_DOUBLE
1088 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1091 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1092 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1094 /* Convert 'r' into an array of four 32-bit words in target word
1096 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1097 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1100 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1103 i
[3 - 3 * endian
] = 0;
1106 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1107 i
[2 - 2 * endian
] = 0;
1108 i
[3 - 2 * endian
] = 0;
1111 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1112 i
[3 - 3 * endian
] = 0;
1115 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1120 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1122 #if HOST_BITS_PER_WIDE_INT == 32
1123 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1125 if (HOST_BITS_PER_WIDE_INT
!= 64)
1128 return immed_double_const ((((unsigned long) i
[3 * endian
])
1129 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1130 (((unsigned long) i
[2 - endian
])
1131 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1136 /* Otherwise, we can't do this. */
1140 /* Return the real part (which has mode MODE) of a complex value X.
1141 This always comes at the low address in memory. */
1144 gen_realpart (mode
, x
)
1145 enum machine_mode mode
;
1148 if (WORDS_BIG_ENDIAN
1149 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1151 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1153 ("can't access real part of complex value in hard register");
1154 else if (WORDS_BIG_ENDIAN
)
1155 return gen_highpart (mode
, x
);
1157 return gen_lowpart (mode
, x
);
1160 /* Return the imaginary part (which has mode MODE) of a complex value X.
1161 This always comes at the high address in memory. */
1164 gen_imagpart (mode
, x
)
1165 enum machine_mode mode
;
1168 if (WORDS_BIG_ENDIAN
)
1169 return gen_lowpart (mode
, x
);
1170 else if (! WORDS_BIG_ENDIAN
1171 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1173 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1175 ("can't access imaginary part of complex value in hard register");
1177 return gen_highpart (mode
, x
);
1180 /* Return 1 iff X, assumed to be a SUBREG,
1181 refers to the real part of the complex value in its containing reg.
1182 Complex values are always stored with the real part in the first word,
1183 regardless of WORDS_BIG_ENDIAN. */
1186 subreg_realpart_p (x
)
1189 if (GET_CODE (x
) != SUBREG
)
1192 return ((unsigned int) SUBREG_BYTE (x
)
1193 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1196 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1197 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1198 least-significant part of X.
1199 MODE specifies how big a part of X to return;
1200 it usually should not be larger than a word.
1201 If X is a MEM whose address is a QUEUED, the value may be so also. */
1204 gen_lowpart (mode
, x
)
1205 enum machine_mode mode
;
1208 rtx result
= gen_lowpart_common (mode
, x
);
1212 else if (GET_CODE (x
) == REG
)
1214 /* Must be a hard reg that's not valid in MODE. */
1215 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1220 else if (GET_CODE (x
) == MEM
)
1222 /* The only additional case we can do is MEM. */
1224 if (WORDS_BIG_ENDIAN
)
1225 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1226 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1228 if (BYTES_BIG_ENDIAN
)
1229 /* Adjust the address so that the address-after-the-data
1231 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1232 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1234 return adjust_address (x
, mode
, offset
);
1236 else if (GET_CODE (x
) == ADDRESSOF
)
1237 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1242 /* Like `gen_lowpart', but refer to the most significant part.
1243 This is used to access the imaginary part of a complex number. */
1246 gen_highpart (mode
, x
)
1247 enum machine_mode mode
;
1250 unsigned int msize
= GET_MODE_SIZE (mode
);
1253 /* This case loses if X is a subreg. To catch bugs early,
1254 complain if an invalid MODE is used even in other cases. */
1255 if (msize
> UNITS_PER_WORD
1256 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1259 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1260 subreg_highpart_offset (mode
, GET_MODE (x
)));
1262 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1263 the target if we have a MEM. gen_highpart must return a valid operand,
1264 emitting code if necessary to do so. */
1265 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1266 result
= validize_mem (result
);
1273 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1274 be VOIDmode constant. */
1276 gen_highpart_mode (outermode
, innermode
, exp
)
1277 enum machine_mode outermode
, innermode
;
1280 if (GET_MODE (exp
) != VOIDmode
)
1282 if (GET_MODE (exp
) != innermode
)
1284 return gen_highpart (outermode
, exp
);
1286 return simplify_gen_subreg (outermode
, exp
, innermode
,
1287 subreg_highpart_offset (outermode
, innermode
));
1290 /* Return offset in bytes to get OUTERMODE low part
1291 of the value in mode INNERMODE stored in memory in target format. */
1294 subreg_lowpart_offset (outermode
, innermode
)
1295 enum machine_mode outermode
, innermode
;
1297 unsigned int offset
= 0;
1298 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1302 if (WORDS_BIG_ENDIAN
)
1303 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1304 if (BYTES_BIG_ENDIAN
)
1305 offset
+= difference
% UNITS_PER_WORD
;
1311 /* Return offset in bytes to get OUTERMODE high part
1312 of the value in mode INNERMODE stored in memory in target format. */
1314 subreg_highpart_offset (outermode
, innermode
)
1315 enum machine_mode outermode
, innermode
;
1317 unsigned int offset
= 0;
1318 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1320 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1325 if (! WORDS_BIG_ENDIAN
)
1326 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1327 if (! BYTES_BIG_ENDIAN
)
1328 offset
+= difference
% UNITS_PER_WORD
;
1334 /* Return 1 iff X, assumed to be a SUBREG,
1335 refers to the least significant part of its containing reg.
1336 If X is not a SUBREG, always return 1 (it is its own low part!). */
1339 subreg_lowpart_p (x
)
1342 if (GET_CODE (x
) != SUBREG
)
1344 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1347 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1348 == SUBREG_BYTE (x
));
1352 /* Helper routine for all the constant cases of operand_subword.
1353 Some places invoke this directly. */
1356 constant_subword (op
, offset
, mode
)
1359 enum machine_mode mode
;
1361 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1364 /* If OP is already an integer word, return it. */
1365 if (GET_MODE_CLASS (mode
) == MODE_INT
1366 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1369 /* The output is some bits, the width of the target machine's word.
1370 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1372 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1373 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1374 && GET_MODE_BITSIZE (mode
) == 64
1375 && GET_CODE (op
) == CONST_DOUBLE
)
1380 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1381 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1383 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1384 which the words are written depends on the word endianness.
1385 ??? This is a potential portability problem and should
1386 be fixed at some point.
1388 We must exercise caution with the sign bit. By definition there
1389 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1390 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1391 So we explicitly mask and sign-extend as necessary. */
1392 if (BITS_PER_WORD
== 32)
1395 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1396 return GEN_INT (val
);
1398 #if HOST_BITS_PER_WIDE_INT >= 64
1399 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1401 val
= k
[! WORDS_BIG_ENDIAN
];
1402 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1403 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1404 return GEN_INT (val
);
1407 else if (BITS_PER_WORD
== 16)
1409 val
= k
[offset
>> 1];
1410 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1412 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1413 return GEN_INT (val
);
1418 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1419 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1420 && GET_MODE_BITSIZE (mode
) > 64
1421 && GET_CODE (op
) == CONST_DOUBLE
)
1426 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1427 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1429 if (BITS_PER_WORD
== 32)
1432 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1433 return GEN_INT (val
);
1435 #if HOST_BITS_PER_WIDE_INT >= 64
1436 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1438 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1439 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1440 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1441 return GEN_INT (val
);
1448 /* Single word float is a little harder, since single- and double-word
1449 values often do not have the same high-order bits. We have already
1450 verified that we want the only defined word of the single-word value. */
1451 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1452 && GET_MODE_BITSIZE (mode
) == 32
1453 && GET_CODE (op
) == CONST_DOUBLE
)
1458 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1459 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1461 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1463 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1465 if (BITS_PER_WORD
== 16)
1467 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1469 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1472 return GEN_INT (val
);
1475 /* The only remaining cases that we can handle are integers.
1476 Convert to proper endianness now since these cases need it.
1477 At this point, offset == 0 means the low-order word.
1479 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1480 in general. However, if OP is (const_int 0), we can just return
1483 if (op
== const0_rtx
)
1486 if (GET_MODE_CLASS (mode
) != MODE_INT
1487 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1488 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1491 if (WORDS_BIG_ENDIAN
)
1492 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1494 /* Find out which word on the host machine this value is in and get
1495 it from the constant. */
1496 val
= (offset
/ size_ratio
== 0
1497 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1498 : (GET_CODE (op
) == CONST_INT
1499 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1501 /* Get the value we want into the low bits of val. */
1502 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1503 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1505 val
= trunc_int_for_mode (val
, word_mode
);
1507 return GEN_INT (val
);
1510 /* Return subword OFFSET of operand OP.
1511 The word number, OFFSET, is interpreted as the word number starting
1512 at the low-order address. OFFSET 0 is the low-order word if not
1513 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1515 If we cannot extract the required word, we return zero. Otherwise,
1516 an rtx corresponding to the requested word will be returned.
1518 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1519 reload has completed, a valid address will always be returned. After
1520 reload, if a valid address cannot be returned, we return zero.
1522 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1523 it is the responsibility of the caller.
1525 MODE is the mode of OP in case it is a CONST_INT.
1527 ??? This is still rather broken for some cases. The problem for the
1528 moment is that all callers of this thing provide no 'goal mode' to
1529 tell us to work with. This exists because all callers were written
1530 in a word based SUBREG world.
1531 Now use of this function can be deprecated by simplify_subreg in most
1536 operand_subword (op
, offset
, validate_address
, mode
)
1538 unsigned int offset
;
1539 int validate_address
;
1540 enum machine_mode mode
;
1542 if (mode
== VOIDmode
)
1543 mode
= GET_MODE (op
);
1545 if (mode
== VOIDmode
)
1548 /* If OP is narrower than a word, fail. */
1550 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1553 /* If we want a word outside OP, return zero. */
1555 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1558 /* Form a new MEM at the requested address. */
1559 if (GET_CODE (op
) == MEM
)
1561 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1563 if (! validate_address
)
1566 else if (reload_completed
)
1568 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1572 return replace_equiv_address (new, XEXP (new, 0));
1575 /* Rest can be handled by simplify_subreg. */
1576 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1579 /* Similar to `operand_subword', but never return 0. If we can't extract
1580 the required subword, put OP into a register and try again. If that fails,
1581 abort. We always validate the address in this case.
1583 MODE is the mode of OP, in case it is CONST_INT. */
1586 operand_subword_force (op
, offset
, mode
)
1588 unsigned int offset
;
1589 enum machine_mode mode
;
1591 rtx result
= operand_subword (op
, offset
, 1, mode
);
1596 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1598 /* If this is a register which can not be accessed by words, copy it
1599 to a pseudo register. */
1600 if (GET_CODE (op
) == REG
)
1601 op
= copy_to_reg (op
);
1603 op
= force_reg (mode
, op
);
1606 result
= operand_subword (op
, offset
, 1, mode
);
1613 /* Given a compare instruction, swap the operands.
1614 A test instruction is changed into a compare of 0 against the operand. */
1617 reverse_comparison (insn
)
1620 rtx body
= PATTERN (insn
);
1623 if (GET_CODE (body
) == SET
)
1624 comp
= SET_SRC (body
);
1626 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1628 if (GET_CODE (comp
) == COMPARE
)
1630 rtx op0
= XEXP (comp
, 0);
1631 rtx op1
= XEXP (comp
, 1);
1632 XEXP (comp
, 0) = op1
;
1633 XEXP (comp
, 1) = op0
;
1637 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1638 CONST0_RTX (GET_MODE (comp
)), comp
);
1639 if (GET_CODE (body
) == SET
)
1640 SET_SRC (body
) = new;
1642 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1646 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1647 or (2) a component ref of something variable. Represent the later with
1648 a NULL expression. */
1651 component_ref_for_mem_expr (ref
)
1654 tree inner
= TREE_OPERAND (ref
, 0);
1656 if (TREE_CODE (inner
) == COMPONENT_REF
)
1657 inner
= component_ref_for_mem_expr (inner
);
1660 tree placeholder_ptr
= 0;
1662 /* Now remove any conversions: they don't change what the underlying
1663 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1664 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1665 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1666 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1667 || TREE_CODE (inner
) == SAVE_EXPR
1668 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1669 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1670 inner
= find_placeholder (inner
, &placeholder_ptr
);
1672 inner
= TREE_OPERAND (inner
, 0);
1674 if (! DECL_P (inner
))
1678 if (inner
== TREE_OPERAND (ref
, 0))
1681 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1682 TREE_OPERAND (ref
, 1));
1685 /* Given REF, a MEM, and T, either the type of X or the expression
1686 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1687 if we are making a new object of this type. BITPOS is nonzero if
1688 there is an offset outstanding on T that will be applied later. */
1691 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1695 HOST_WIDE_INT bitpos
;
1697 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1698 tree expr
= MEM_EXPR (ref
);
1699 rtx offset
= MEM_OFFSET (ref
);
1700 rtx size
= MEM_SIZE (ref
);
1701 unsigned int align
= MEM_ALIGN (ref
);
1702 HOST_WIDE_INT apply_bitpos
= 0;
1705 /* It can happen that type_for_mode was given a mode for which there
1706 is no language-level type. In which case it returns NULL, which
1711 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1713 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1714 wrong answer, as it assumes that DECL_RTL already has the right alias
1715 info. Callers should not set DECL_RTL until after the call to
1716 set_mem_attributes. */
1717 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1720 /* Get the alias set from the expression or type (perhaps using a
1721 front-end routine) and use it. */
1722 alias
= get_alias_set (t
);
1724 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1725 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1726 RTX_UNCHANGING_P (ref
)
1727 |= ((lang_hooks
.honor_readonly
1728 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1729 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1731 /* If we are making an object of this type, or if this is a DECL, we know
1732 that it is a scalar if the type is not an aggregate. */
1733 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1734 MEM_SCALAR_P (ref
) = 1;
1736 /* We can set the alignment from the type if we are making an object,
1737 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1738 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1739 align
= MAX (align
, TYPE_ALIGN (type
));
1741 /* If the size is known, we can set that. */
1742 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1743 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1745 /* If T is not a type, we may be able to deduce some more information about
1749 maybe_set_unchanging (ref
, t
);
1750 if (TREE_THIS_VOLATILE (t
))
1751 MEM_VOLATILE_P (ref
) = 1;
1753 /* Now remove any conversions: they don't change what the underlying
1754 object is. Likewise for SAVE_EXPR. */
1755 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1756 || TREE_CODE (t
) == NON_LVALUE_EXPR
1757 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1758 || TREE_CODE (t
) == SAVE_EXPR
)
1759 t
= TREE_OPERAND (t
, 0);
1761 /* If this expression can't be addressed (e.g., it contains a reference
1762 to a non-addressable field), show we don't change its alias set. */
1763 if (! can_address_p (t
))
1764 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1766 /* If this is a decl, set the attributes of the MEM from it. */
1770 offset
= const0_rtx
;
1771 apply_bitpos
= bitpos
;
1772 size
= (DECL_SIZE_UNIT (t
)
1773 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1774 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1775 align
= DECL_ALIGN (t
);
1778 /* If this is a constant, we know the alignment. */
1779 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1781 align
= TYPE_ALIGN (type
);
1782 #ifdef CONSTANT_ALIGNMENT
1783 align
= CONSTANT_ALIGNMENT (t
, align
);
1787 /* If this is a field reference and not a bit-field, record it. */
1788 /* ??? There is some information that can be gleened from bit-fields,
1789 such as the word offset in the structure that might be modified.
1790 But skip it for now. */
1791 else if (TREE_CODE (t
) == COMPONENT_REF
1792 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1794 expr
= component_ref_for_mem_expr (t
);
1795 offset
= const0_rtx
;
1796 apply_bitpos
= bitpos
;
1797 /* ??? Any reason the field size would be different than
1798 the size we got from the type? */
1801 /* If this is an array reference, look for an outer field reference. */
1802 else if (TREE_CODE (t
) == ARRAY_REF
)
1804 tree off_tree
= size_zero_node
;
1808 tree index
= TREE_OPERAND (t
, 1);
1809 tree array
= TREE_OPERAND (t
, 0);
1810 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1811 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1812 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1814 /* We assume all arrays have sizes that are a multiple of a byte.
1815 First subtract the lower bound, if any, in the type of the
1816 index, then convert to sizetype and multiply by the size of the
1818 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1819 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1822 /* If the index has a self-referential type, pass it to a
1823 WITH_RECORD_EXPR; if the component size is, pass our
1824 component to one. */
1825 if (! TREE_CONSTANT (index
)
1826 && contains_placeholder_p (index
))
1827 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t
);
1828 if (! TREE_CONSTANT (unit_size
)
1829 && contains_placeholder_p (unit_size
))
1830 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1834 = fold (build (PLUS_EXPR
, sizetype
,
1835 fold (build (MULT_EXPR
, sizetype
,
1839 t
= TREE_OPERAND (t
, 0);
1841 while (TREE_CODE (t
) == ARRAY_REF
);
1847 if (host_integerp (off_tree
, 1))
1849 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1850 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1851 align
= DECL_ALIGN (t
);
1852 if (aoff
&& aoff
< align
)
1854 offset
= GEN_INT (ioff
);
1855 apply_bitpos
= bitpos
;
1858 else if (TREE_CODE (t
) == COMPONENT_REF
)
1860 expr
= component_ref_for_mem_expr (t
);
1861 if (host_integerp (off_tree
, 1))
1863 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1864 apply_bitpos
= bitpos
;
1866 /* ??? Any reason the field size would be different than
1867 the size we got from the type? */
1869 else if (flag_argument_noalias
> 1
1870 && TREE_CODE (t
) == INDIRECT_REF
1871 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1878 /* If this is a Fortran indirect argument reference, record the
1880 else if (flag_argument_noalias
> 1
1881 && TREE_CODE (t
) == INDIRECT_REF
1882 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1889 /* If we modified OFFSET based on T, then subtract the outstanding
1890 bit position offset. Similarly, increase the size of the accessed
1891 object to contain the negative offset. */
1894 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1896 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1899 /* Now set the attributes we computed above. */
1901 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1903 /* If this is already known to be a scalar or aggregate, we are done. */
1904 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1907 /* If it is a reference into an aggregate, this is part of an aggregate.
1908 Otherwise we don't know. */
1909 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1910 || TREE_CODE (t
) == ARRAY_RANGE_REF
1911 || TREE_CODE (t
) == BIT_FIELD_REF
)
1912 MEM_IN_STRUCT_P (ref
) = 1;
1916 set_mem_attributes (ref
, t
, objectp
)
1921 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1924 /* Set the alias set of MEM to SET. */
1927 set_mem_alias_set (mem
, set
)
1931 #ifdef ENABLE_CHECKING
1932 /* If the new and old alias sets don't conflict, something is wrong. */
1933 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1937 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1938 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1942 /* Set the alignment of MEM to ALIGN bits. */
1945 set_mem_align (mem
, align
)
1949 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1950 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1954 /* Set the expr for MEM to EXPR. */
1957 set_mem_expr (mem
, expr
)
1962 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1963 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1966 /* Set the offset of MEM to OFFSET. */
1969 set_mem_offset (mem
, offset
)
1972 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1973 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1977 /* Set the size of MEM to SIZE. */
1980 set_mem_size (mem
, size
)
1983 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1984 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1988 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1989 and its address changed to ADDR. (VOIDmode means don't change the mode.
1990 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1991 returned memory location is required to be valid. The memory
1992 attributes are not changed. */
1995 change_address_1 (memref
, mode
, addr
, validate
)
1997 enum machine_mode mode
;
2003 if (GET_CODE (memref
) != MEM
)
2005 if (mode
== VOIDmode
)
2006 mode
= GET_MODE (memref
);
2008 addr
= XEXP (memref
, 0);
2012 if (reload_in_progress
|| reload_completed
)
2014 if (! memory_address_p (mode
, addr
))
2018 addr
= memory_address (mode
, addr
);
2021 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2024 new = gen_rtx_MEM (mode
, addr
);
2025 MEM_COPY_ATTRIBUTES (new, memref
);
2029 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2030 way we are changing MEMREF, so we only preserve the alias set. */
2033 change_address (memref
, mode
, addr
)
2035 enum machine_mode mode
;
2038 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
2039 enum machine_mode mmode
= GET_MODE (new);
2042 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
2043 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
2044 (mmode
== BLKmode
? BITS_PER_UNIT
2045 : GET_MODE_ALIGNMENT (mmode
)),
2051 /* Return a memory reference like MEMREF, but with its mode changed
2052 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2053 nonzero, the memory address is forced to be valid.
2054 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2055 and caller is responsible for adjusting MEMREF base register. */
2058 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2060 enum machine_mode mode
;
2061 HOST_WIDE_INT offset
;
2062 int validate
, adjust
;
2064 rtx addr
= XEXP (memref
, 0);
2066 rtx memoffset
= MEM_OFFSET (memref
);
2068 unsigned int memalign
= MEM_ALIGN (memref
);
2070 /* ??? Prefer to create garbage instead of creating shared rtl.
2071 This may happen even if offset is nonzero -- consider
2072 (plus (plus reg reg) const_int) -- so do this always. */
2073 addr
= copy_rtx (addr
);
2077 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2078 object, we can merge it into the LO_SUM. */
2079 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2081 && (unsigned HOST_WIDE_INT
) offset
2082 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2083 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2084 plus_constant (XEXP (addr
, 1), offset
));
2086 addr
= plus_constant (addr
, offset
);
2089 new = change_address_1 (memref
, mode
, addr
, validate
);
2091 /* Compute the new values of the memory attributes due to this adjustment.
2092 We add the offsets and update the alignment. */
2094 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2096 /* Compute the new alignment by taking the MIN of the alignment and the
2097 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2102 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2104 /* We can compute the size in a number of ways. */
2105 if (GET_MODE (new) != BLKmode
)
2106 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2107 else if (MEM_SIZE (memref
))
2108 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2110 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2111 memoffset
, size
, memalign
, GET_MODE (new));
2113 /* At some point, we should validate that this offset is within the object,
2114 if all the appropriate values are known. */
2118 /* Return a memory reference like MEMREF, but with its mode changed
2119 to MODE and its address changed to ADDR, which is assumed to be
2120 MEMREF offseted by OFFSET bytes. If VALIDATE is
2121 nonzero, the memory address is forced to be valid. */
2124 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2126 enum machine_mode mode
;
2128 HOST_WIDE_INT offset
;
2131 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2132 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2135 /* Return a memory reference like MEMREF, but whose address is changed by
2136 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2137 known to be in OFFSET (possibly 1). */
2140 offset_address (memref
, offset
, pow2
)
2145 rtx
new, addr
= XEXP (memref
, 0);
2147 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2149 /* At this point we don't know _why_ the address is invalid. It
2150 could have secondary memory refereces, multiplies or anything.
2152 However, if we did go and rearrange things, we can wind up not
2153 being able to recognize the magic around pic_offset_table_rtx.
2154 This stuff is fragile, and is yet another example of why it is
2155 bad to expose PIC machinery too early. */
2156 if (! memory_address_p (GET_MODE (memref
), new)
2157 && GET_CODE (addr
) == PLUS
2158 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2160 addr
= force_reg (GET_MODE (addr
), addr
);
2161 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2164 update_temp_slot_address (XEXP (memref
, 0), new);
2165 new = change_address_1 (memref
, VOIDmode
, new, 1);
2167 /* Update the alignment to reflect the offset. Reset the offset, which
2170 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2171 MIN (MEM_ALIGN (memref
),
2172 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2177 /* Return a memory reference like MEMREF, but with its address changed to
2178 ADDR. The caller is asserting that the actual piece of memory pointed
2179 to is the same, just the form of the address is being changed, such as
2180 by putting something into a register. */
2183 replace_equiv_address (memref
, addr
)
2187 /* change_address_1 copies the memory attribute structure without change
2188 and that's exactly what we want here. */
2189 update_temp_slot_address (XEXP (memref
, 0), addr
);
2190 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2193 /* Likewise, but the reference is not required to be valid. */
2196 replace_equiv_address_nv (memref
, addr
)
2200 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2203 /* Return a memory reference like MEMREF, but with its mode widened to
2204 MODE and offset by OFFSET. This would be used by targets that e.g.
2205 cannot issue QImode memory operations and have to use SImode memory
2206 operations plus masking logic. */
2209 widen_memory_access (memref
, mode
, offset
)
2211 enum machine_mode mode
;
2212 HOST_WIDE_INT offset
;
2214 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2215 tree expr
= MEM_EXPR (new);
2216 rtx memoffset
= MEM_OFFSET (new);
2217 unsigned int size
= GET_MODE_SIZE (mode
);
2219 /* If we don't know what offset we were at within the expression, then
2220 we can't know if we've overstepped the bounds. */
2226 if (TREE_CODE (expr
) == COMPONENT_REF
)
2228 tree field
= TREE_OPERAND (expr
, 1);
2230 if (! DECL_SIZE_UNIT (field
))
2236 /* Is the field at least as large as the access? If so, ok,
2237 otherwise strip back to the containing structure. */
2238 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2239 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2240 && INTVAL (memoffset
) >= 0)
2243 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2249 expr
= TREE_OPERAND (expr
, 0);
2250 memoffset
= (GEN_INT (INTVAL (memoffset
)
2251 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2252 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2255 /* Similarly for the decl. */
2256 else if (DECL_P (expr
)
2257 && DECL_SIZE_UNIT (expr
)
2258 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2259 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2260 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2264 /* The widened memory access overflows the expression, which means
2265 that it could alias another expression. Zap it. */
2272 memoffset
= NULL_RTX
;
2274 /* The widened memory may alias other stuff, so zap the alias set. */
2275 /* ??? Maybe use get_alias_set on any remaining expression. */
2277 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2278 MEM_ALIGN (new), mode
);
2283 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2288 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2289 NULL
, label_num
++, NULL
);
2292 /* For procedure integration. */
2294 /* Install new pointers to the first and last insns in the chain.
2295 Also, set cur_insn_uid to one higher than the last in use.
2296 Used for an inline-procedure after copying the insn chain. */
2299 set_new_first_and_last_insn (first
, last
)
2308 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2309 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2314 /* Set the range of label numbers found in the current function.
2315 This is used when belatedly compiling an inline function. */
2318 set_new_first_and_last_label_num (first
, last
)
2321 base_label_num
= label_num
;
2322 first_label_num
= first
;
2323 last_label_num
= last
;
2326 /* Set the last label number found in the current function.
2327 This is used when belatedly compiling an inline function. */
2330 set_new_last_label_num (last
)
2333 base_label_num
= label_num
;
2334 last_label_num
= last
;
2337 /* Restore all variables describing the current status from the structure *P.
2338 This is used after a nested function. */
2341 restore_emit_status (p
)
2342 struct function
*p ATTRIBUTE_UNUSED
;
2347 /* Go through all the RTL insn bodies and copy any invalid shared
2348 structure. This routine should only be called once. */
2351 unshare_all_rtl (fndecl
, insn
)
2357 /* Make sure that virtual parameters are not shared. */
2358 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2359 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2361 /* Make sure that virtual stack slots are not shared. */
2362 unshare_all_decls (DECL_INITIAL (fndecl
));
2364 /* Unshare just about everything else. */
2365 unshare_all_rtl_1 (insn
);
2367 /* Make sure the addresses of stack slots found outside the insn chain
2368 (such as, in DECL_RTL of a variable) are not shared
2369 with the insn chain.
2371 This special care is necessary when the stack slot MEM does not
2372 actually appear in the insn chain. If it does appear, its address
2373 is unshared from all else at that point. */
2374 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2377 /* Go through all the RTL insn bodies and copy any invalid shared
2378 structure, again. This is a fairly expensive thing to do so it
2379 should be done sparingly. */
2382 unshare_all_rtl_again (insn
)
2388 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2391 reset_used_flags (PATTERN (p
));
2392 reset_used_flags (REG_NOTES (p
));
2393 reset_used_flags (LOG_LINKS (p
));
2396 /* Make sure that virtual stack slots are not shared. */
2397 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2399 /* Make sure that virtual parameters are not shared. */
2400 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2401 reset_used_flags (DECL_RTL (decl
));
2403 reset_used_flags (stack_slot_list
);
2405 unshare_all_rtl (cfun
->decl
, insn
);
2408 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2409 Assumes the mark bits are cleared at entry. */
2412 unshare_all_rtl_1 (insn
)
2415 for (; insn
; insn
= NEXT_INSN (insn
))
2418 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2419 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2420 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2424 /* Go through all virtual stack slots of a function and copy any
2425 shared structure. */
2427 unshare_all_decls (blk
)
2432 /* Copy shared decls. */
2433 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2434 if (DECL_RTL_SET_P (t
))
2435 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2437 /* Now process sub-blocks. */
2438 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2439 unshare_all_decls (t
);
2442 /* Go through all virtual stack slots of a function and mark them as
2445 reset_used_decls (blk
)
2451 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2452 if (DECL_RTL_SET_P (t
))
2453 reset_used_flags (DECL_RTL (t
));
2455 /* Now process sub-blocks. */
2456 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2457 reset_used_decls (t
);
2460 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2461 placed in the result directly, rather than being copied. MAY_SHARE is
2462 either a MEM of an EXPR_LIST of MEMs. */
2465 copy_most_rtx (orig
, may_share
)
2472 const char *format_ptr
;
2474 if (orig
== may_share
2475 || (GET_CODE (may_share
) == EXPR_LIST
2476 && in_expr_list_p (may_share
, orig
)))
2479 code
= GET_CODE (orig
);
2497 copy
= rtx_alloc (code
);
2498 PUT_MODE (copy
, GET_MODE (orig
));
2499 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2500 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2501 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2502 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2503 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2505 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2507 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2509 switch (*format_ptr
++)
2512 XEXP (copy
, i
) = XEXP (orig
, i
);
2513 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2514 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2518 XEXP (copy
, i
) = XEXP (orig
, i
);
2523 XVEC (copy
, i
) = XVEC (orig
, i
);
2524 if (XVEC (orig
, i
) != NULL
)
2526 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2527 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2528 XVECEXP (copy
, i
, j
)
2529 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2534 XWINT (copy
, i
) = XWINT (orig
, i
);
2539 XINT (copy
, i
) = XINT (orig
, i
);
2543 XTREE (copy
, i
) = XTREE (orig
, i
);
2548 XSTR (copy
, i
) = XSTR (orig
, i
);
2552 /* Copy this through the wide int field; that's safest. */
2553 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2563 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2564 Recursively does the same for subexpressions. */
2567 copy_rtx_if_shared (orig
)
2573 const char *format_ptr
;
2579 code
= GET_CODE (x
);
2581 /* These types may be freely shared. */
2595 /* SCRATCH must be shared because they represent distinct values. */
2599 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2600 a LABEL_REF, it isn't sharable. */
2601 if (GET_CODE (XEXP (x
, 0)) == PLUS
2602 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2603 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2612 /* The chain of insns is not being copied. */
2616 /* A MEM is allowed to be shared if its address is constant.
2618 We used to allow sharing of MEMs which referenced
2619 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2620 that can lose. instantiate_virtual_regs will not unshare
2621 the MEMs, and combine may change the structure of the address
2622 because it looks safe and profitable in one context, but
2623 in some other context it creates unrecognizable RTL. */
2624 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2633 /* This rtx may not be shared. If it has already been seen,
2634 replace it with a copy of itself. */
2636 if (RTX_FLAG (x
, used
))
2640 copy
= rtx_alloc (code
);
2642 (sizeof (*copy
) - sizeof (copy
->fld
)
2643 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2647 RTX_FLAG (x
, used
) = 1;
2649 /* Now scan the subexpressions recursively.
2650 We can store any replaced subexpressions directly into X
2651 since we know X is not shared! Any vectors in X
2652 must be copied if X was copied. */
2654 format_ptr
= GET_RTX_FORMAT (code
);
2656 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2658 switch (*format_ptr
++)
2661 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2665 if (XVEC (x
, i
) != NULL
)
2668 int len
= XVECLEN (x
, i
);
2670 if (copied
&& len
> 0)
2671 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2672 for (j
= 0; j
< len
; j
++)
2673 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2681 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2682 to look for shared sub-parts. */
2685 reset_used_flags (x
)
2690 const char *format_ptr
;
2695 code
= GET_CODE (x
);
2697 /* These types may be freely shared so we needn't do any resetting
2719 /* The chain of insns is not being copied. */
2726 RTX_FLAG (x
, used
) = 0;
2728 format_ptr
= GET_RTX_FORMAT (code
);
2729 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2731 switch (*format_ptr
++)
2734 reset_used_flags (XEXP (x
, i
));
2738 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2739 reset_used_flags (XVECEXP (x
, i
, j
));
2745 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2746 Return X or the rtx for the pseudo reg the value of X was copied into.
2747 OTHER must be valid as a SET_DEST. */
2750 make_safe_from (x
, other
)
2754 switch (GET_CODE (other
))
2757 other
= SUBREG_REG (other
);
2759 case STRICT_LOW_PART
:
2762 other
= XEXP (other
, 0);
2768 if ((GET_CODE (other
) == MEM
2770 && GET_CODE (x
) != REG
2771 && GET_CODE (x
) != SUBREG
)
2772 || (GET_CODE (other
) == REG
2773 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2774 || reg_mentioned_p (other
, x
))))
2776 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2777 emit_move_insn (temp
, x
);
2783 /* Emission of insns (adding them to the doubly-linked list). */
2785 /* Return the first insn of the current sequence or current function. */
2793 /* Specify a new insn as the first in the chain. */
2796 set_first_insn (insn
)
2799 if (PREV_INSN (insn
) != 0)
2804 /* Return the last insn emitted in current sequence or current function. */
2812 /* Specify a new insn as the last in the chain. */
2815 set_last_insn (insn
)
2818 if (NEXT_INSN (insn
) != 0)
2823 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2826 get_last_insn_anywhere ()
2828 struct sequence_stack
*stack
;
2831 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2832 if (stack
->last
!= 0)
2837 /* Return the first nonnote insn emitted in current sequence or current
2838 function. This routine looks inside SEQUENCEs. */
2841 get_first_nonnote_insn ()
2843 rtx insn
= first_insn
;
2847 insn
= next_insn (insn
);
2848 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2855 /* Return the last nonnote insn emitted in current sequence or current
2856 function. This routine looks inside SEQUENCEs. */
2859 get_last_nonnote_insn ()
2861 rtx insn
= last_insn
;
2865 insn
= previous_insn (insn
);
2866 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2873 /* Return a number larger than any instruction's uid in this function. */
2878 return cur_insn_uid
;
2881 /* Renumber instructions so that no instruction UIDs are wasted. */
2884 renumber_insns (stream
)
2889 /* If we're not supposed to renumber instructions, don't. */
2890 if (!flag_renumber_insns
)
2893 /* If there aren't that many instructions, then it's not really
2894 worth renumbering them. */
2895 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2900 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2903 fprintf (stream
, "Renumbering insn %d to %d\n",
2904 INSN_UID (insn
), cur_insn_uid
);
2905 INSN_UID (insn
) = cur_insn_uid
++;
2909 /* Return the next insn. If it is a SEQUENCE, return the first insn
2918 insn
= NEXT_INSN (insn
);
2919 if (insn
&& GET_CODE (insn
) == INSN
2920 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2921 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2927 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2931 previous_insn (insn
)
2936 insn
= PREV_INSN (insn
);
2937 if (insn
&& GET_CODE (insn
) == INSN
2938 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2939 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2945 /* Return the next insn after INSN that is not a NOTE. This routine does not
2946 look inside SEQUENCEs. */
2949 next_nonnote_insn (insn
)
2954 insn
= NEXT_INSN (insn
);
2955 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2962 /* Return the previous insn before INSN that is not a NOTE. This routine does
2963 not look inside SEQUENCEs. */
2966 prev_nonnote_insn (insn
)
2971 insn
= PREV_INSN (insn
);
2972 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2979 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2980 or 0, if there is none. This routine does not look inside
2984 next_real_insn (insn
)
2989 insn
= NEXT_INSN (insn
);
2990 if (insn
== 0 || GET_CODE (insn
) == INSN
2991 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2998 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2999 or 0, if there is none. This routine does not look inside
3003 prev_real_insn (insn
)
3008 insn
= PREV_INSN (insn
);
3009 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3010 || GET_CODE (insn
) == JUMP_INSN
)
3017 /* Find the next insn after INSN that really does something. This routine
3018 does not look inside SEQUENCEs. Until reload has completed, this is the
3019 same as next_real_insn. */
3022 active_insn_p (insn
)
3025 if (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3027 if (GET_CODE (insn
) == INSN
)
3029 if (reload_completed
)
3031 rtx pat
= PATTERN (insn
);
3033 /* After reload, remaining USE insns are noops. */
3034 if (GET_CODE (pat
) == USE
)
3037 if (GET_CODE (pat
) == CLOBBER
)
3039 /* ??? Don't skip past the clobber of the return register.
3040 If we eliminate it, we risk a variety of life analysis
3041 problems on broken code. */
3042 if (GET_CODE (XEXP (pat
, 0)) == REG
3043 && REG_FUNCTION_VALUE_P (XEXP (pat
, 0)))
3046 /* Otherwise, clobbers don't do anything either. */
3056 next_active_insn (insn
)
3061 insn
= NEXT_INSN (insn
);
3062 if (insn
== 0 || active_insn_p (insn
))
3069 /* Find the last insn before INSN that really does something. This routine
3070 does not look inside SEQUENCEs. Until reload has completed, this is the
3071 same as prev_real_insn. */
3074 prev_active_insn (insn
)
3079 insn
= PREV_INSN (insn
);
3080 if (insn
== 0 || active_insn_p (insn
))
3087 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3095 insn
= NEXT_INSN (insn
);
3096 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3103 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3111 insn
= PREV_INSN (insn
);
3112 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3120 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3121 and REG_CC_USER notes so we can find it. */
3124 link_cc0_insns (insn
)
3127 rtx user
= next_nonnote_insn (insn
);
3129 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3130 user
= XVECEXP (PATTERN (user
), 0, 0);
3132 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3134 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3137 /* Return the next insn that uses CC0 after INSN, which is assumed to
3138 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3139 applied to the result of this function should yield INSN).
3141 Normally, this is simply the next insn. However, if a REG_CC_USER note
3142 is present, it contains the insn that uses CC0.
3144 Return 0 if we can't find the insn. */
3147 next_cc0_user (insn
)
3150 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3153 return XEXP (note
, 0);
3155 insn
= next_nonnote_insn (insn
);
3156 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3157 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3159 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3165 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3166 note, it is the previous insn. */
3169 prev_cc0_setter (insn
)
3172 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3175 return XEXP (note
, 0);
3177 insn
= prev_nonnote_insn (insn
);
3178 if (! sets_cc0_p (PATTERN (insn
)))
3185 /* Increment the label uses for all labels present in rtx. */
3188 mark_label_nuses (x
)
3195 code
= GET_CODE (x
);
3196 if (code
== LABEL_REF
)
3197 LABEL_NUSES (XEXP (x
, 0))++;
3199 fmt
= GET_RTX_FORMAT (code
);
3200 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3203 mark_label_nuses (XEXP (x
, i
));
3204 else if (fmt
[i
] == 'E')
3205 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3206 mark_label_nuses (XVECEXP (x
, i
, j
));
3211 /* Try splitting insns that can be split for better scheduling.
3212 PAT is the pattern which might split.
3213 TRIAL is the insn providing PAT.
3214 LAST is nonzero if we should return the last insn of the sequence produced.
3216 If this routine succeeds in splitting, it returns the first or last
3217 replacement insn depending on the value of LAST. Otherwise, it
3218 returns TRIAL. If the insn to be returned can be split, it will be. */
3221 try_split (pat
, trial
, last
)
3225 rtx before
= PREV_INSN (trial
);
3226 rtx after
= NEXT_INSN (trial
);
3227 int has_barrier
= 0;
3232 if (any_condjump_p (trial
)
3233 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3234 split_branch_probability
= INTVAL (XEXP (note
, 0));
3235 probability
= split_branch_probability
;
3237 seq
= split_insns (pat
, trial
);
3239 split_branch_probability
= -1;
3241 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3242 We may need to handle this specially. */
3243 if (after
&& GET_CODE (after
) == BARRIER
)
3246 after
= NEXT_INSN (after
);
3251 /* Sometimes there will be only one insn in that list, this case will
3252 normally arise only when we want it in turn to be split (SFmode on
3253 the 29k is an example). */
3254 if (NEXT_INSN (seq
) != NULL_RTX
)
3256 rtx insn_last
, insn
;
3259 /* Avoid infinite loop if any insn of the result matches
3260 the original pattern. */
3264 if (INSN_P (insn_last
)
3265 && rtx_equal_p (PATTERN (insn_last
), pat
))
3267 if (NEXT_INSN (insn_last
) == NULL_RTX
)
3269 insn_last
= NEXT_INSN (insn_last
);
3274 while (insn
!= NULL_RTX
)
3276 if (GET_CODE (insn
) == JUMP_INSN
)
3278 mark_jump_label (PATTERN (insn
), insn
, 0);
3280 if (probability
!= -1
3281 && any_condjump_p (insn
)
3282 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3284 /* We can preserve the REG_BR_PROB notes only if exactly
3285 one jump is created, otherwise the machine description
3286 is responsible for this step using
3287 split_branch_probability variable. */
3291 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3292 GEN_INT (probability
),
3297 insn
= PREV_INSN (insn
);
3300 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3301 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3302 if (GET_CODE (trial
) == CALL_INSN
)
3305 while (insn
!= NULL_RTX
)
3307 if (GET_CODE (insn
) == CALL_INSN
)
3308 CALL_INSN_FUNCTION_USAGE (insn
)
3309 = CALL_INSN_FUNCTION_USAGE (trial
);
3311 insn
= PREV_INSN (insn
);
3315 /* Copy notes, particularly those related to the CFG. */
3316 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3318 switch (REG_NOTE_KIND (note
))
3322 while (insn
!= NULL_RTX
)
3324 if (GET_CODE (insn
) == CALL_INSN
3325 || (flag_non_call_exceptions
3326 && may_trap_p (PATTERN (insn
))))
3328 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3331 insn
= PREV_INSN (insn
);
3337 case REG_ALWAYS_RETURN
:
3339 while (insn
!= NULL_RTX
)
3341 if (GET_CODE (insn
) == CALL_INSN
)
3343 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3346 insn
= PREV_INSN (insn
);
3350 case REG_NON_LOCAL_GOTO
:
3352 while (insn
!= NULL_RTX
)
3354 if (GET_CODE (insn
) == JUMP_INSN
)
3356 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3359 insn
= PREV_INSN (insn
);
3368 /* If there are LABELS inside the split insns increment the
3369 usage count so we don't delete the label. */
3370 if (GET_CODE (trial
) == INSN
)
3373 while (insn
!= NULL_RTX
)
3375 if (GET_CODE (insn
) == INSN
)
3376 mark_label_nuses (PATTERN (insn
));
3378 insn
= PREV_INSN (insn
);
3382 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3384 delete_insn (trial
);
3386 emit_barrier_after (tem
);
3388 /* Recursively call try_split for each new insn created; by the
3389 time control returns here that insn will be fully split, so
3390 set LAST and continue from the insn after the one returned.
3391 We can't use next_active_insn here since AFTER may be a note.
3392 Ignore deleted insns, which can be occur if not optimizing. */
3393 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3394 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3395 tem
= try_split (PATTERN (tem
), tem
, 1);
3397 /* Avoid infinite loop if the result matches the original pattern. */
3398 else if (rtx_equal_p (PATTERN (seq
), pat
))
3402 PATTERN (trial
) = PATTERN (seq
);
3403 INSN_CODE (trial
) = -1;
3404 try_split (PATTERN (trial
), trial
, last
);
3407 /* Return either the first or the last insn, depending on which was
3410 ? (after
? PREV_INSN (after
) : last_insn
)
3411 : NEXT_INSN (before
);
3417 /* Make and return an INSN rtx, initializing all its slots.
3418 Store PATTERN in the pattern slots. */
3421 make_insn_raw (pattern
)
3426 insn
= rtx_alloc (INSN
);
3428 INSN_UID (insn
) = cur_insn_uid
++;
3429 PATTERN (insn
) = pattern
;
3430 INSN_CODE (insn
) = -1;
3431 LOG_LINKS (insn
) = NULL
;
3432 REG_NOTES (insn
) = NULL
;
3433 INSN_SCOPE (insn
) = NULL
;
3434 BLOCK_FOR_INSN (insn
) = NULL
;
3436 #ifdef ENABLE_RTL_CHECKING
3439 && (returnjump_p (insn
)
3440 || (GET_CODE (insn
) == SET
3441 && SET_DEST (insn
) == pc_rtx
)))
3443 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3451 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3454 make_jump_insn_raw (pattern
)
3459 insn
= rtx_alloc (JUMP_INSN
);
3460 INSN_UID (insn
) = cur_insn_uid
++;
3462 PATTERN (insn
) = pattern
;
3463 INSN_CODE (insn
) = -1;
3464 LOG_LINKS (insn
) = NULL
;
3465 REG_NOTES (insn
) = NULL
;
3466 JUMP_LABEL (insn
) = NULL
;
3467 INSN_SCOPE (insn
) = NULL
;
3468 BLOCK_FOR_INSN (insn
) = NULL
;
3473 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3476 make_call_insn_raw (pattern
)
3481 insn
= rtx_alloc (CALL_INSN
);
3482 INSN_UID (insn
) = cur_insn_uid
++;
3484 PATTERN (insn
) = pattern
;
3485 INSN_CODE (insn
) = -1;
3486 LOG_LINKS (insn
) = NULL
;
3487 REG_NOTES (insn
) = NULL
;
3488 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3489 INSN_SCOPE (insn
) = NULL
;
3490 BLOCK_FOR_INSN (insn
) = NULL
;
3495 /* Add INSN to the end of the doubly-linked list.
3496 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3502 PREV_INSN (insn
) = last_insn
;
3503 NEXT_INSN (insn
) = 0;
3505 if (NULL
!= last_insn
)
3506 NEXT_INSN (last_insn
) = insn
;
3508 if (NULL
== first_insn
)
3514 /* Add INSN into the doubly-linked list after insn AFTER. This and
3515 the next should be the only functions called to insert an insn once
3516 delay slots have been filled since only they know how to update a
3520 add_insn_after (insn
, after
)
3523 rtx next
= NEXT_INSN (after
);
3526 if (optimize
&& INSN_DELETED_P (after
))
3529 NEXT_INSN (insn
) = next
;
3530 PREV_INSN (insn
) = after
;
3534 PREV_INSN (next
) = insn
;
3535 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3536 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3538 else if (last_insn
== after
)
3542 struct sequence_stack
*stack
= seq_stack
;
3543 /* Scan all pending sequences too. */
3544 for (; stack
; stack
= stack
->next
)
3545 if (after
== stack
->last
)
3555 if (GET_CODE (after
) != BARRIER
3556 && GET_CODE (insn
) != BARRIER
3557 && (bb
= BLOCK_FOR_INSN (after
)))
3559 set_block_for_insn (insn
, bb
);
3561 bb
->flags
|= BB_DIRTY
;
3562 /* Should not happen as first in the BB is always
3563 either NOTE or LABEL. */
3564 if (bb
->end
== after
3565 /* Avoid clobbering of structure when creating new BB. */
3566 && GET_CODE (insn
) != BARRIER
3567 && (GET_CODE (insn
) != NOTE
3568 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3572 NEXT_INSN (after
) = insn
;
3573 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3575 rtx sequence
= PATTERN (after
);
3576 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3580 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3581 the previous should be the only functions called to insert an insn once
3582 delay slots have been filled since only they know how to update a
3586 add_insn_before (insn
, before
)
3589 rtx prev
= PREV_INSN (before
);
3592 if (optimize
&& INSN_DELETED_P (before
))
3595 PREV_INSN (insn
) = prev
;
3596 NEXT_INSN (insn
) = before
;
3600 NEXT_INSN (prev
) = insn
;
3601 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3603 rtx sequence
= PATTERN (prev
);
3604 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3607 else if (first_insn
== before
)
3611 struct sequence_stack
*stack
= seq_stack
;
3612 /* Scan all pending sequences too. */
3613 for (; stack
; stack
= stack
->next
)
3614 if (before
== stack
->first
)
3616 stack
->first
= insn
;
3624 if (GET_CODE (before
) != BARRIER
3625 && GET_CODE (insn
) != BARRIER
3626 && (bb
= BLOCK_FOR_INSN (before
)))
3628 set_block_for_insn (insn
, bb
);
3630 bb
->flags
|= BB_DIRTY
;
3631 /* Should not happen as first in the BB is always
3632 either NOTE or LABEl. */
3633 if (bb
->head
== insn
3634 /* Avoid clobbering of structure when creating new BB. */
3635 && GET_CODE (insn
) != BARRIER
3636 && (GET_CODE (insn
) != NOTE
3637 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3641 PREV_INSN (before
) = insn
;
3642 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3643 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3646 /* Remove an insn from its doubly-linked list. This function knows how
3647 to handle sequences. */
3652 rtx next
= NEXT_INSN (insn
);
3653 rtx prev
= PREV_INSN (insn
);
3658 NEXT_INSN (prev
) = next
;
3659 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3661 rtx sequence
= PATTERN (prev
);
3662 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3665 else if (first_insn
== insn
)
3669 struct sequence_stack
*stack
= seq_stack
;
3670 /* Scan all pending sequences too. */
3671 for (; stack
; stack
= stack
->next
)
3672 if (insn
== stack
->first
)
3674 stack
->first
= next
;
3684 PREV_INSN (next
) = prev
;
3685 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3686 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3688 else if (last_insn
== insn
)
3692 struct sequence_stack
*stack
= seq_stack
;
3693 /* Scan all pending sequences too. */
3694 for (; stack
; stack
= stack
->next
)
3695 if (insn
== stack
->last
)
3704 if (GET_CODE (insn
) != BARRIER
3705 && (bb
= BLOCK_FOR_INSN (insn
)))
3708 bb
->flags
|= BB_DIRTY
;
3709 if (bb
->head
== insn
)
3711 /* Never ever delete the basic block note without deleting whole
3713 if (GET_CODE (insn
) == NOTE
)
3717 if (bb
->end
== insn
)
3722 /* Delete all insns made since FROM.
3723 FROM becomes the new last instruction. */
3726 delete_insns_since (from
)
3732 NEXT_INSN (from
) = 0;
3736 /* This function is deprecated, please use sequences instead.
3738 Move a consecutive bunch of insns to a different place in the chain.
3739 The insns to be moved are those between FROM and TO.
3740 They are moved to a new position after the insn AFTER.
3741 AFTER must not be FROM or TO or any insn in between.
3743 This function does not know about SEQUENCEs and hence should not be
3744 called after delay-slot filling has been done. */
3747 reorder_insns_nobb (from
, to
, after
)
3748 rtx from
, to
, after
;
3750 /* Splice this bunch out of where it is now. */
3751 if (PREV_INSN (from
))
3752 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3754 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3755 if (last_insn
== to
)
3756 last_insn
= PREV_INSN (from
);
3757 if (first_insn
== from
)
3758 first_insn
= NEXT_INSN (to
);
3760 /* Make the new neighbors point to it and it to them. */
3761 if (NEXT_INSN (after
))
3762 PREV_INSN (NEXT_INSN (after
)) = to
;
3764 NEXT_INSN (to
) = NEXT_INSN (after
);
3765 PREV_INSN (from
) = after
;
3766 NEXT_INSN (after
) = from
;
3767 if (after
== last_insn
)
3771 /* Same as function above, but take care to update BB boundaries. */
3773 reorder_insns (from
, to
, after
)
3774 rtx from
, to
, after
;
3776 rtx prev
= PREV_INSN (from
);
3777 basic_block bb
, bb2
;
3779 reorder_insns_nobb (from
, to
, after
);
3781 if (GET_CODE (after
) != BARRIER
3782 && (bb
= BLOCK_FOR_INSN (after
)))
3785 bb
->flags
|= BB_DIRTY
;
3787 if (GET_CODE (from
) != BARRIER
3788 && (bb2
= BLOCK_FOR_INSN (from
)))
3792 bb2
->flags
|= BB_DIRTY
;
3795 if (bb
->end
== after
)
3798 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3799 set_block_for_insn (x
, bb
);
3803 /* Return the line note insn preceding INSN. */
3806 find_line_note (insn
)
3809 if (no_line_numbers
)
3812 for (; insn
; insn
= PREV_INSN (insn
))
3813 if (GET_CODE (insn
) == NOTE
3814 && NOTE_LINE_NUMBER (insn
) >= 0)
3820 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3821 of the moved insns when debugging. This may insert a note between AFTER
3822 and FROM, and another one after TO. */
3825 reorder_insns_with_line_notes (from
, to
, after
)
3826 rtx from
, to
, after
;
3828 rtx from_line
= find_line_note (from
);
3829 rtx after_line
= find_line_note (after
);
3831 reorder_insns (from
, to
, after
);
3833 if (from_line
== after_line
)
3837 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3838 NOTE_LINE_NUMBER (from_line
),
3841 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3842 NOTE_LINE_NUMBER (after_line
),
3846 /* Remove unnecessary notes from the instruction stream. */
3849 remove_unnecessary_notes ()
3851 rtx block_stack
= NULL_RTX
;
3852 rtx eh_stack
= NULL_RTX
;
3857 /* We must not remove the first instruction in the function because
3858 the compiler depends on the first instruction being a note. */
3859 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3861 /* Remember what's next. */
3862 next
= NEXT_INSN (insn
);
3864 /* We're only interested in notes. */
3865 if (GET_CODE (insn
) != NOTE
)
3868 switch (NOTE_LINE_NUMBER (insn
))
3870 case NOTE_INSN_DELETED
:
3871 case NOTE_INSN_LOOP_END_TOP_COND
:
3875 case NOTE_INSN_EH_REGION_BEG
:
3876 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3879 case NOTE_INSN_EH_REGION_END
:
3880 /* Too many end notes. */
3881 if (eh_stack
== NULL_RTX
)
3883 /* Mismatched nesting. */
3884 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3887 eh_stack
= XEXP (eh_stack
, 1);
3888 free_INSN_LIST_node (tmp
);
3891 case NOTE_INSN_BLOCK_BEG
:
3892 /* By now, all notes indicating lexical blocks should have
3893 NOTE_BLOCK filled in. */
3894 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3896 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3899 case NOTE_INSN_BLOCK_END
:
3900 /* Too many end notes. */
3901 if (block_stack
== NULL_RTX
)
3903 /* Mismatched nesting. */
3904 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3907 block_stack
= XEXP (block_stack
, 1);
3908 free_INSN_LIST_node (tmp
);
3910 /* Scan back to see if there are any non-note instructions
3911 between INSN and the beginning of this block. If not,
3912 then there is no PC range in the generated code that will
3913 actually be in this block, so there's no point in
3914 remembering the existence of the block. */
3915 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3917 /* This block contains a real instruction. Note that we
3918 don't include labels; if the only thing in the block
3919 is a label, then there are still no PC values that
3920 lie within the block. */
3924 /* We're only interested in NOTEs. */
3925 if (GET_CODE (tmp
) != NOTE
)
3928 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3930 /* We just verified that this BLOCK matches us with
3931 the block_stack check above. Never delete the
3932 BLOCK for the outermost scope of the function; we
3933 can refer to names from that scope even if the
3934 block notes are messed up. */
3935 if (! is_body_block (NOTE_BLOCK (insn
))
3936 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3943 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3944 /* There's a nested block. We need to leave the
3945 current block in place since otherwise the debugger
3946 wouldn't be able to show symbols from our block in
3947 the nested block. */
3953 /* Too many begin notes. */
3954 if (block_stack
|| eh_stack
)
3959 /* Emit insn(s) of given code and pattern
3960 at a specified place within the doubly-linked list.
3962 All of the emit_foo global entry points accept an object
3963 X which is either an insn list or a PATTERN of a single
3966 There are thus a few canonical ways to generate code and
3967 emit it at a specific place in the instruction stream. For
3968 example, consider the instruction named SPOT and the fact that
3969 we would like to emit some instructions before SPOT. We might
3973 ... emit the new instructions ...
3974 insns_head = get_insns ();
3977 emit_insn_before (insns_head, SPOT);
3979 It used to be common to generate SEQUENCE rtl instead, but that
3980 is a relic of the past which no longer occurs. The reason is that
3981 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3982 generated would almost certainly die right after it was created. */
3984 /* Make X be output before the instruction BEFORE. */
3987 emit_insn_before (x
, before
)
3993 #ifdef ENABLE_RTL_CHECKING
3994 if (before
== NULL_RTX
)
4001 switch (GET_CODE (x
))
4012 rtx next
= NEXT_INSN (insn
);
4013 add_insn_before (insn
, before
);
4019 #ifdef ENABLE_RTL_CHECKING
4026 last
= make_insn_raw (x
);
4027 add_insn_before (last
, before
);
4034 /* Make an instruction with body X and code JUMP_INSN
4035 and output it before the instruction BEFORE. */
4038 emit_jump_insn_before (x
, before
)
4041 rtx insn
, last
= NULL_RTX
;
4043 #ifdef ENABLE_RTL_CHECKING
4044 if (before
== NULL_RTX
)
4048 switch (GET_CODE (x
))
4059 rtx next
= NEXT_INSN (insn
);
4060 add_insn_before (insn
, before
);
4066 #ifdef ENABLE_RTL_CHECKING
4073 last
= make_jump_insn_raw (x
);
4074 add_insn_before (last
, before
);
4081 /* Make an instruction with body X and code CALL_INSN
4082 and output it before the instruction BEFORE. */
4085 emit_call_insn_before (x
, before
)
4088 rtx last
= NULL_RTX
, insn
;
4090 #ifdef ENABLE_RTL_CHECKING
4091 if (before
== NULL_RTX
)
4095 switch (GET_CODE (x
))
4106 rtx next
= NEXT_INSN (insn
);
4107 add_insn_before (insn
, before
);
4113 #ifdef ENABLE_RTL_CHECKING
4120 last
= make_call_insn_raw (x
);
4121 add_insn_before (last
, before
);
4128 /* Make an insn of code BARRIER
4129 and output it before the insn BEFORE. */
4132 emit_barrier_before (before
)
4135 rtx insn
= rtx_alloc (BARRIER
);
4137 INSN_UID (insn
) = cur_insn_uid
++;
4139 add_insn_before (insn
, before
);
4143 /* Emit the label LABEL before the insn BEFORE. */
4146 emit_label_before (label
, before
)
4149 /* This can be called twice for the same label as a result of the
4150 confusion that follows a syntax error! So make it harmless. */
4151 if (INSN_UID (label
) == 0)
4153 INSN_UID (label
) = cur_insn_uid
++;
4154 add_insn_before (label
, before
);
4160 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4163 emit_note_before (subtype
, before
)
4167 rtx note
= rtx_alloc (NOTE
);
4168 INSN_UID (note
) = cur_insn_uid
++;
4169 NOTE_SOURCE_FILE (note
) = 0;
4170 NOTE_LINE_NUMBER (note
) = subtype
;
4171 BLOCK_FOR_INSN (note
) = NULL
;
4173 add_insn_before (note
, before
);
4177 /* Helper for emit_insn_after, handles lists of instructions
4180 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4183 emit_insn_after_1 (first
, after
)
4190 if (GET_CODE (after
) != BARRIER
4191 && (bb
= BLOCK_FOR_INSN (after
)))
4193 bb
->flags
|= BB_DIRTY
;
4194 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4195 if (GET_CODE (last
) != BARRIER
)
4196 set_block_for_insn (last
, bb
);
4197 if (GET_CODE (last
) != BARRIER
)
4198 set_block_for_insn (last
, bb
);
4199 if (bb
->end
== after
)
4203 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4206 after_after
= NEXT_INSN (after
);
4208 NEXT_INSN (after
) = first
;
4209 PREV_INSN (first
) = after
;
4210 NEXT_INSN (last
) = after_after
;
4212 PREV_INSN (after_after
) = last
;
4214 if (after
== last_insn
)
4219 /* Make X be output after the insn AFTER. */
4222 emit_insn_after (x
, after
)
4227 #ifdef ENABLE_RTL_CHECKING
4228 if (after
== NULL_RTX
)
4235 switch (GET_CODE (x
))
4243 last
= emit_insn_after_1 (x
, after
);
4246 #ifdef ENABLE_RTL_CHECKING
4253 last
= make_insn_raw (x
);
4254 add_insn_after (last
, after
);
4261 /* Similar to emit_insn_after, except that line notes are to be inserted so
4262 as to act as if this insn were at FROM. */
4265 emit_insn_after_with_line_notes (x
, after
, from
)
4268 rtx from_line
= find_line_note (from
);
4269 rtx after_line
= find_line_note (after
);
4270 rtx insn
= emit_insn_after (x
, after
);
4273 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4274 NOTE_LINE_NUMBER (from_line
),
4278 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4279 NOTE_LINE_NUMBER (after_line
),
4283 /* Make an insn of code JUMP_INSN with body X
4284 and output it after the insn AFTER. */
4287 emit_jump_insn_after (x
, after
)
4292 #ifdef ENABLE_RTL_CHECKING
4293 if (after
== NULL_RTX
)
4297 switch (GET_CODE (x
))
4305 last
= emit_insn_after_1 (x
, after
);
4308 #ifdef ENABLE_RTL_CHECKING
4315 last
= make_jump_insn_raw (x
);
4316 add_insn_after (last
, after
);
4323 /* Make an instruction with body X and code CALL_INSN
4324 and output it after the instruction AFTER. */
4327 emit_call_insn_after (x
, after
)
4332 #ifdef ENABLE_RTL_CHECKING
4333 if (after
== NULL_RTX
)
4337 switch (GET_CODE (x
))
4345 last
= emit_insn_after_1 (x
, after
);
4348 #ifdef ENABLE_RTL_CHECKING
4355 last
= make_call_insn_raw (x
);
4356 add_insn_after (last
, after
);
4363 /* Make an insn of code BARRIER
4364 and output it after the insn AFTER. */
4367 emit_barrier_after (after
)
4370 rtx insn
= rtx_alloc (BARRIER
);
4372 INSN_UID (insn
) = cur_insn_uid
++;
4374 add_insn_after (insn
, after
);
4378 /* Emit the label LABEL after the insn AFTER. */
4381 emit_label_after (label
, after
)
4384 /* This can be called twice for the same label
4385 as a result of the confusion that follows a syntax error!
4386 So make it harmless. */
4387 if (INSN_UID (label
) == 0)
4389 INSN_UID (label
) = cur_insn_uid
++;
4390 add_insn_after (label
, after
);
4396 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4399 emit_note_after (subtype
, after
)
4403 rtx note
= rtx_alloc (NOTE
);
4404 INSN_UID (note
) = cur_insn_uid
++;
4405 NOTE_SOURCE_FILE (note
) = 0;
4406 NOTE_LINE_NUMBER (note
) = subtype
;
4407 BLOCK_FOR_INSN (note
) = NULL
;
4408 add_insn_after (note
, after
);
4412 /* Emit a line note for FILE and LINE after the insn AFTER. */
4415 emit_line_note_after (file
, line
, after
)
4422 if (no_line_numbers
&& line
> 0)
4428 note
= rtx_alloc (NOTE
);
4429 INSN_UID (note
) = cur_insn_uid
++;
4430 NOTE_SOURCE_FILE (note
) = file
;
4431 NOTE_LINE_NUMBER (note
) = line
;
4432 BLOCK_FOR_INSN (note
) = NULL
;
4433 add_insn_after (note
, after
);
4437 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4439 emit_insn_after_scope (pattern
, after
, scope
)
4443 rtx last
= emit_insn_after (pattern
, after
);
4445 after
= NEXT_INSN (after
);
4448 if (active_insn_p (after
))
4449 INSN_SCOPE (after
) = scope
;
4452 after
= NEXT_INSN (after
);
4457 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4459 emit_jump_insn_after_scope (pattern
, after
, scope
)
4463 rtx last
= emit_jump_insn_after (pattern
, after
);
4465 after
= NEXT_INSN (after
);
4468 if (active_insn_p (after
))
4469 INSN_SCOPE (after
) = scope
;
4472 after
= NEXT_INSN (after
);
4477 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4479 emit_call_insn_after_scope (pattern
, after
, scope
)
4483 rtx last
= emit_call_insn_after (pattern
, after
);
4485 after
= NEXT_INSN (after
);
4488 if (active_insn_p (after
))
4489 INSN_SCOPE (after
) = scope
;
4492 after
= NEXT_INSN (after
);
4497 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4499 emit_insn_before_scope (pattern
, before
, scope
)
4500 rtx pattern
, before
;
4503 rtx first
= PREV_INSN (before
);
4504 rtx last
= emit_insn_before (pattern
, before
);
4506 first
= NEXT_INSN (first
);
4509 if (active_insn_p (first
))
4510 INSN_SCOPE (first
) = scope
;
4513 first
= NEXT_INSN (first
);
4518 /* Take X and emit it at the end of the doubly-linked
4521 Returns the last insn emitted. */
4527 rtx last
= last_insn
;
4533 switch (GET_CODE (x
))
4544 rtx next
= NEXT_INSN (insn
);
4551 #ifdef ENABLE_RTL_CHECKING
4558 last
= make_insn_raw (x
);
4566 /* Make an insn of code JUMP_INSN with pattern X
4567 and add it to the end of the doubly-linked list. */
4573 rtx last
= NULL_RTX
, insn
;
4575 switch (GET_CODE (x
))
4586 rtx next
= NEXT_INSN (insn
);
4593 #ifdef ENABLE_RTL_CHECKING
4600 last
= make_jump_insn_raw (x
);
4608 /* Make an insn of code CALL_INSN with pattern X
4609 and add it to the end of the doubly-linked list. */
4617 switch (GET_CODE (x
))
4625 insn
= emit_insn (x
);
4628 #ifdef ENABLE_RTL_CHECKING
4635 insn
= make_call_insn_raw (x
);
4643 /* Add the label LABEL to the end of the doubly-linked list. */
4649 /* This can be called twice for the same label
4650 as a result of the confusion that follows a syntax error!
4651 So make it harmless. */
4652 if (INSN_UID (label
) == 0)
4654 INSN_UID (label
) = cur_insn_uid
++;
4660 /* Make an insn of code BARRIER
4661 and add it to the end of the doubly-linked list. */
4666 rtx barrier
= rtx_alloc (BARRIER
);
4667 INSN_UID (barrier
) = cur_insn_uid
++;
4672 /* Make an insn of code NOTE
4673 with data-fields specified by FILE and LINE
4674 and add it to the end of the doubly-linked list,
4675 but only if line-numbers are desired for debugging info. */
4678 emit_line_note (file
, line
)
4682 set_file_and_line_for_stmt (file
, line
);
4685 if (no_line_numbers
)
4689 return emit_note (file
, line
);
4692 /* Make an insn of code NOTE
4693 with data-fields specified by FILE and LINE
4694 and add it to the end of the doubly-linked list.
4695 If it is a line-number NOTE, omit it if it matches the previous one. */
4698 emit_note (file
, line
)
4706 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4707 && line
== last_linenum
)
4709 last_filename
= file
;
4710 last_linenum
= line
;
4713 if (no_line_numbers
&& line
> 0)
4719 note
= rtx_alloc (NOTE
);
4720 INSN_UID (note
) = cur_insn_uid
++;
4721 NOTE_SOURCE_FILE (note
) = file
;
4722 NOTE_LINE_NUMBER (note
) = line
;
4723 BLOCK_FOR_INSN (note
) = NULL
;
4728 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4731 emit_line_note_force (file
, line
)
4736 return emit_line_note (file
, line
);
4739 /* Cause next statement to emit a line note even if the line number
4740 has not changed. This is used at the beginning of a function. */
4743 force_next_line_note ()
4748 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4749 note of this type already exists, remove it first. */
4752 set_unique_reg_note (insn
, kind
, datum
)
4757 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4763 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4764 has multiple sets (some callers assume single_set
4765 means the insn only has one set, when in fact it
4766 means the insn only has one * useful * set). */
4767 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4774 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4775 It serves no useful purpose and breaks eliminate_regs. */
4776 if (GET_CODE (datum
) == ASM_OPERANDS
)
4786 XEXP (note
, 0) = datum
;
4790 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4791 return REG_NOTES (insn
);
4794 /* Return an indication of which type of insn should have X as a body.
4795 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4801 if (GET_CODE (x
) == CODE_LABEL
)
4803 if (GET_CODE (x
) == CALL
)
4805 if (GET_CODE (x
) == RETURN
)
4807 if (GET_CODE (x
) == SET
)
4809 if (SET_DEST (x
) == pc_rtx
)
4811 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4816 if (GET_CODE (x
) == PARALLEL
)
4819 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4820 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4822 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4823 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4825 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4826 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4832 /* Emit the rtl pattern X as an appropriate kind of insn.
4833 If X is a label, it is simply added into the insn chain. */
4839 enum rtx_code code
= classify_insn (x
);
4841 if (code
== CODE_LABEL
)
4842 return emit_label (x
);
4843 else if (code
== INSN
)
4844 return emit_insn (x
);
4845 else if (code
== JUMP_INSN
)
4847 rtx insn
= emit_jump_insn (x
);
4848 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4849 return emit_barrier ();
4852 else if (code
== CALL_INSN
)
4853 return emit_call_insn (x
);
4858 /* Space for free sequence stack entries. */
4859 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4861 /* Begin emitting insns to a sequence which can be packaged in an
4862 RTL_EXPR. If this sequence will contain something that might cause
4863 the compiler to pop arguments to function calls (because those
4864 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4865 details), use do_pending_stack_adjust before calling this function.
4866 That will ensure that the deferred pops are not accidentally
4867 emitted in the middle of this sequence. */
4872 struct sequence_stack
*tem
;
4874 if (free_sequence_stack
!= NULL
)
4876 tem
= free_sequence_stack
;
4877 free_sequence_stack
= tem
->next
;
4880 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
4882 tem
->next
= seq_stack
;
4883 tem
->first
= first_insn
;
4884 tem
->last
= last_insn
;
4885 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4893 /* Similarly, but indicate that this sequence will be placed in T, an
4894 RTL_EXPR. See the documentation for start_sequence for more
4895 information about how to use this function. */
4898 start_sequence_for_rtl_expr (t
)
4906 /* Set up the insn chain starting with FIRST as the current sequence,
4907 saving the previously current one. See the documentation for
4908 start_sequence for more information about how to use this function. */
4911 push_to_sequence (first
)
4918 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4924 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4927 push_to_full_sequence (first
, last
)
4933 /* We really should have the end of the insn chain here. */
4934 if (last
&& NEXT_INSN (last
))
4938 /* Set up the outer-level insn chain
4939 as the current sequence, saving the previously current one. */
4942 push_topmost_sequence ()
4944 struct sequence_stack
*stack
, *top
= NULL
;
4948 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4951 first_insn
= top
->first
;
4952 last_insn
= top
->last
;
4953 seq_rtl_expr
= top
->sequence_rtl_expr
;
4956 /* After emitting to the outer-level insn chain, update the outer-level
4957 insn chain, and restore the previous saved state. */
4960 pop_topmost_sequence ()
4962 struct sequence_stack
*stack
, *top
= NULL
;
4964 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4967 top
->first
= first_insn
;
4968 top
->last
= last_insn
;
4969 /* ??? Why don't we save seq_rtl_expr here? */
4974 /* After emitting to a sequence, restore previous saved state.
4976 To get the contents of the sequence just made, you must call
4977 `get_insns' *before* calling here.
4979 If the compiler might have deferred popping arguments while
4980 generating this sequence, and this sequence will not be immediately
4981 inserted into the instruction stream, use do_pending_stack_adjust
4982 before calling get_insns. That will ensure that the deferred
4983 pops are inserted into this sequence, and not into some random
4984 location in the instruction stream. See INHIBIT_DEFER_POP for more
4985 information about deferred popping of arguments. */
4990 struct sequence_stack
*tem
= seq_stack
;
4992 first_insn
= tem
->first
;
4993 last_insn
= tem
->last
;
4994 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4995 seq_stack
= tem
->next
;
4997 memset (tem
, 0, sizeof (*tem
));
4998 tem
->next
= free_sequence_stack
;
4999 free_sequence_stack
= tem
;
5002 /* This works like end_sequence, but records the old sequence in FIRST
5006 end_full_sequence (first
, last
)
5009 *first
= first_insn
;
5014 /* Return 1 if currently emitting into a sequence. */
5019 return seq_stack
!= 0;
5022 /* Put the various virtual registers into REGNO_REG_RTX. */
5025 init_virtual_regs (es
)
5026 struct emit_status
*es
;
5028 rtx
*ptr
= es
->x_regno_reg_rtx
;
5029 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5030 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5031 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5032 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5033 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5037 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5038 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5039 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5040 static int copy_insn_n_scratches
;
5042 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5043 copied an ASM_OPERANDS.
5044 In that case, it is the original input-operand vector. */
5045 static rtvec orig_asm_operands_vector
;
5047 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5048 copied an ASM_OPERANDS.
5049 In that case, it is the copied input-operand vector. */
5050 static rtvec copy_asm_operands_vector
;
5052 /* Likewise for the constraints vector. */
5053 static rtvec orig_asm_constraints_vector
;
5054 static rtvec copy_asm_constraints_vector
;
5056 /* Recursively create a new copy of an rtx for copy_insn.
5057 This function differs from copy_rtx in that it handles SCRATCHes and
5058 ASM_OPERANDs properly.
5059 Normally, this function is not used directly; use copy_insn as front end.
5060 However, you could first copy an insn pattern with copy_insn and then use
5061 this function afterwards to properly copy any REG_NOTEs containing
5071 const char *format_ptr
;
5073 code
= GET_CODE (orig
);
5090 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5091 if (copy_insn_scratch_in
[i
] == orig
)
5092 return copy_insn_scratch_out
[i
];
5096 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5097 a LABEL_REF, it isn't sharable. */
5098 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5099 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5100 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5104 /* A MEM with a constant address is not sharable. The problem is that
5105 the constant address may need to be reloaded. If the mem is shared,
5106 then reloading one copy of this mem will cause all copies to appear
5107 to have been reloaded. */
5113 copy
= rtx_alloc (code
);
5115 /* Copy the various flags, and other information. We assume that
5116 all fields need copying, and then clear the fields that should
5117 not be copied. That is the sensible default behavior, and forces
5118 us to explicitly document why we are *not* copying a flag. */
5119 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5121 /* We do not copy the USED flag, which is used as a mark bit during
5122 walks over the RTL. */
5123 RTX_FLAG (copy
, used
) = 0;
5125 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5126 if (GET_RTX_CLASS (code
) == 'i')
5128 RTX_FLAG (copy
, jump
) = 0;
5129 RTX_FLAG (copy
, call
) = 0;
5130 RTX_FLAG (copy
, frame_related
) = 0;
5133 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5135 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5137 copy
->fld
[i
] = orig
->fld
[i
];
5138 switch (*format_ptr
++)
5141 if (XEXP (orig
, i
) != NULL
)
5142 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5147 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5148 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5149 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5150 XVEC (copy
, i
) = copy_asm_operands_vector
;
5151 else if (XVEC (orig
, i
) != NULL
)
5153 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5154 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5155 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5166 /* These are left unchanged. */
5174 if (code
== SCRATCH
)
5176 i
= copy_insn_n_scratches
++;
5177 if (i
>= MAX_RECOG_OPERANDS
)
5179 copy_insn_scratch_in
[i
] = orig
;
5180 copy_insn_scratch_out
[i
] = copy
;
5182 else if (code
== ASM_OPERANDS
)
5184 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5185 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5186 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5187 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5193 /* Create a new copy of an rtx.
5194 This function differs from copy_rtx in that it handles SCRATCHes and
5195 ASM_OPERANDs properly.
5196 INSN doesn't really have to be a full INSN; it could be just the
5202 copy_insn_n_scratches
= 0;
5203 orig_asm_operands_vector
= 0;
5204 orig_asm_constraints_vector
= 0;
5205 copy_asm_operands_vector
= 0;
5206 copy_asm_constraints_vector
= 0;
5207 return copy_insn_1 (insn
);
5210 /* Initialize data structures and variables in this file
5211 before generating rtl for each function. */
5216 struct function
*f
= cfun
;
5218 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5221 seq_rtl_expr
= NULL
;
5223 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5226 first_label_num
= label_num
;
5230 /* Init the tables that describe all the pseudo regs. */
5232 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5234 f
->emit
->regno_pointer_align
5235 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5236 * sizeof (unsigned char));
5239 = (rtx
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5243 = (tree
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5246 /* Put copies of all the hard registers into regno_reg_rtx. */
5247 memcpy (regno_reg_rtx
,
5248 static_regno_reg_rtx
,
5249 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5251 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5252 init_virtual_regs (f
->emit
);
5254 /* Indicate that the virtual registers and stack locations are
5256 REG_POINTER (stack_pointer_rtx
) = 1;
5257 REG_POINTER (frame_pointer_rtx
) = 1;
5258 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5259 REG_POINTER (arg_pointer_rtx
) = 1;
5261 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5262 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5263 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5264 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5265 REG_POINTER (virtual_cfa_rtx
) = 1;
5267 #ifdef STACK_BOUNDARY
5268 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5269 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5270 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5271 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5273 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5274 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5275 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5276 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5277 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5280 #ifdef INIT_EXPANDERS
5285 /* Generate the constant 0. */
5288 gen_const_vector_0 (mode
)
5289 enum machine_mode mode
;
5294 enum machine_mode inner
;
5296 units
= GET_MODE_NUNITS (mode
);
5297 inner
= GET_MODE_INNER (mode
);
5299 v
= rtvec_alloc (units
);
5301 /* We need to call this function after we to set CONST0_RTX first. */
5302 if (!CONST0_RTX (inner
))
5305 for (i
= 0; i
< units
; ++i
)
5306 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5308 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5312 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5313 all elements are zero. */
5315 gen_rtx_CONST_VECTOR (mode
, v
)
5316 enum machine_mode mode
;
5319 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5322 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5323 if (RTVEC_ELT (v
, i
) != inner_zero
)
5324 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5325 return CONST0_RTX (mode
);
5328 /* Create some permanent unique rtl objects shared between all functions.
5329 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5332 init_emit_once (line_numbers
)
5336 enum machine_mode mode
;
5337 enum machine_mode double_mode
;
5339 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5341 const_int_htab
= htab_create (37, const_int_htab_hash
,
5342 const_int_htab_eq
, NULL
);
5344 const_double_htab
= htab_create (37, const_double_htab_hash
,
5345 const_double_htab_eq
, NULL
);
5347 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
5348 mem_attrs_htab_eq
, NULL
);
5350 no_line_numbers
= ! line_numbers
;
5352 /* Compute the word and byte modes. */
5354 byte_mode
= VOIDmode
;
5355 word_mode
= VOIDmode
;
5356 double_mode
= VOIDmode
;
5358 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5359 mode
= GET_MODE_WIDER_MODE (mode
))
5361 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5362 && byte_mode
== VOIDmode
)
5365 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5366 && word_mode
== VOIDmode
)
5370 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5371 mode
= GET_MODE_WIDER_MODE (mode
))
5373 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5374 && double_mode
== VOIDmode
)
5378 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5380 /* Assign register numbers to the globally defined register rtx.
5381 This must be done at runtime because the register number field
5382 is in a union and some compilers can't initialize unions. */
5384 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5385 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5386 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5387 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5388 if (hard_frame_pointer_rtx
== 0)
5389 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5390 HARD_FRAME_POINTER_REGNUM
);
5391 if (arg_pointer_rtx
== 0)
5392 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5393 virtual_incoming_args_rtx
=
5394 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5395 virtual_stack_vars_rtx
=
5396 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5397 virtual_stack_dynamic_rtx
=
5398 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5399 virtual_outgoing_args_rtx
=
5400 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5401 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5403 /* Initialize RTL for commonly used hard registers. These are
5404 copied into regno_reg_rtx as we begin to compile each function. */
5405 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5406 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5408 #ifdef INIT_EXPANDERS
5409 /* This is to initialize {init|mark|free}_machine_status before the first
5410 call to push_function_context_to. This is needed by the Chill front
5411 end which calls push_function_context_to before the first call to
5412 init_function_start. */
5416 /* Create the unique rtx's for certain rtx codes and operand values. */
5418 /* Don't use gen_rtx here since gen_rtx in this case
5419 tries to use these variables. */
5420 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5421 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5422 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5424 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5425 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5426 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5428 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5430 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5431 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5432 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5433 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5435 for (i
= 0; i
<= 2; i
++)
5437 REAL_VALUE_TYPE
*r
=
5438 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5440 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5441 mode
= GET_MODE_WIDER_MODE (mode
))
5442 const_tiny_rtx
[i
][(int) mode
] =
5443 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5445 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5447 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5448 mode
= GET_MODE_WIDER_MODE (mode
))
5449 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5451 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5453 mode
= GET_MODE_WIDER_MODE (mode
))
5454 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5457 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5459 mode
= GET_MODE_WIDER_MODE (mode
))
5460 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5462 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5464 mode
= GET_MODE_WIDER_MODE (mode
))
5465 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5467 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5468 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5469 const_tiny_rtx
[0][i
] = const0_rtx
;
5471 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5472 if (STORE_FLAG_VALUE
== 1)
5473 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5475 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5476 return_address_pointer_rtx
5477 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5481 struct_value_rtx
= STRUCT_VALUE
;
5483 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5486 #ifdef STRUCT_VALUE_INCOMING
5487 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5489 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5490 struct_value_incoming_rtx
5491 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5493 struct_value_incoming_rtx
= struct_value_rtx
;
5497 #ifdef STATIC_CHAIN_REGNUM
5498 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5500 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5501 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5502 static_chain_incoming_rtx
5503 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5506 static_chain_incoming_rtx
= static_chain_rtx
;
5510 static_chain_rtx
= STATIC_CHAIN
;
5512 #ifdef STATIC_CHAIN_INCOMING
5513 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5515 static_chain_incoming_rtx
= static_chain_rtx
;
5519 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5520 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5523 /* Query and clear/ restore no_line_numbers. This is used by the
5524 switch / case handling in stmt.c to give proper line numbers in
5525 warnings about unreachable code. */
5528 force_line_numbers ()
5530 int old
= no_line_numbers
;
5532 no_line_numbers
= 0;
5534 force_next_line_note ();
5539 restore_line_number_status (old_value
)
5542 no_line_numbers
= old_value
;
5545 /* Produce exact duplicate of insn INSN after AFTER.
5546 Care updating of libcall regions if present. */
5549 emit_copy_of_insn_after (insn
, after
)
5553 rtx note1
, note2
, link
;
5555 switch (GET_CODE (insn
))
5558 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5562 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5566 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5567 if (CALL_INSN_FUNCTION_USAGE (insn
))
5568 CALL_INSN_FUNCTION_USAGE (new)
5569 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5570 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5571 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5578 /* Update LABEL_NUSES. */
5579 mark_jump_label (PATTERN (new), new, 0);
5581 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5583 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5585 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5586 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5588 if (GET_CODE (link
) == EXPR_LIST
)
5590 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5595 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5600 /* Fix the libcall sequences. */
5601 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5604 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5606 XEXP (note1
, 0) = p
;
5607 XEXP (note2
, 0) = new;
5612 #include "gt-emit-rtl.h"