1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
62 struct target_rtl default_target_rtl
;
64 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
67 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
69 /* Commonly used modes. */
71 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
72 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
73 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
74 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
76 /* Datastructures maintained for currently processed function in RTL form. */
78 struct rtl_data x_rtl
;
80 /* Indexed by pseudo register number, gives the rtx for that pseudo.
81 Allocated in parallel with regno_pointer_align.
82 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
83 with length attribute nested in top level structures. */
87 /* This is *not* reset after each function. It gives each CODE_LABEL
88 in the entire compilation a unique label number. */
90 static GTY(()) int label_num
= 1;
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
95 is set only for MODE_INT and MODE_VECTOR_INT modes. */
97 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
101 REAL_VALUE_TYPE dconst0
;
102 REAL_VALUE_TYPE dconst1
;
103 REAL_VALUE_TYPE dconst2
;
104 REAL_VALUE_TYPE dconstm1
;
105 REAL_VALUE_TYPE dconsthalf
;
107 /* Record fixed-point constant 0 and 1. */
108 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
109 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
111 /* We make one copy of (const_int C) where C is in
112 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
113 to save space during the compilation and simplify comparisons of
116 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
118 /* Standard pieces of rtx, to be substituted directly into things. */
121 rtx simple_return_rtx
;
124 /* A hash table storing CONST_INTs whose absolute value is greater
125 than MAX_SAVED_CONST_INT. */
127 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
128 htab_t const_int_htab
;
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
131 htab_t const_wide_int_htab
;
133 /* A hash table storing register attribute structures. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
135 htab_t reg_attrs_htab
;
137 /* A hash table storing all CONST_DOUBLEs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
139 htab_t const_double_htab
;
141 /* A hash table storing all CONST_FIXEDs. */
142 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
143 htab_t const_fixed_htab
;
145 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
146 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
147 #define first_label_num (crtl->emit.x_first_label_num)
149 static void set_used_decls (tree
);
150 static void mark_label_nuses (rtx
);
151 static hashval_t
const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 #if TARGET_SUPPORTS_WIDE_INT
154 static hashval_t
const_wide_int_htab_hash (const void *);
155 static int const_wide_int_htab_eq (const void *, const void *);
156 static rtx
lookup_const_wide_int (rtx
);
158 static hashval_t
const_double_htab_hash (const void *);
159 static int const_double_htab_eq (const void *, const void *);
160 static rtx
lookup_const_double (rtx
);
161 static hashval_t
const_fixed_htab_hash (const void *);
162 static int const_fixed_htab_eq (const void *, const void *);
163 static rtx
lookup_const_fixed (rtx
);
164 static hashval_t
reg_attrs_htab_hash (const void *);
165 static int reg_attrs_htab_eq (const void *, const void *);
166 static reg_attrs
*get_reg_attrs (tree
, int);
167 static rtx
gen_const_vector (enum machine_mode
, int);
168 static void copy_rtx_if_shared_1 (rtx
*orig
);
170 /* Probability of the conditional branch currently proceeded by try_split.
171 Set to -1 otherwise. */
172 int split_branch_probability
= -1;
174 /* Returns a hash code for X (which is a really a CONST_INT). */
177 const_int_htab_hash (const void *x
)
179 return (hashval_t
) INTVAL ((const_rtx
) x
);
182 /* Returns nonzero if the value represented by X (which is really a
183 CONST_INT) is the same as that given by Y (which is really a
187 const_int_htab_eq (const void *x
, const void *y
)
189 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
192 #if TARGET_SUPPORTS_WIDE_INT
193 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
196 const_wide_int_htab_hash (const void *x
)
199 HOST_WIDE_INT hash
= 0;
200 const_rtx xr
= (const_rtx
) x
;
202 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
203 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
205 return (hashval_t
) hash
;
208 /* Returns nonzero if the value represented by X (which is really a
209 CONST_WIDE_INT) is the same as that given by Y (which is really a
213 const_wide_int_htab_eq (const void *x
, const void *y
)
216 const_rtx xr
= (const_rtx
) x
;
217 const_rtx yr
= (const_rtx
) y
;
218 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
221 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
222 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
229 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
231 const_double_htab_hash (const void *x
)
233 const_rtx
const value
= (const_rtx
) x
;
236 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
237 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
240 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
241 /* MODE is used in the comparison, so it should be in the hash. */
242 h
^= GET_MODE (value
);
247 /* Returns nonzero if the value represented by X (really a ...)
248 is the same as that represented by Y (really a ...) */
250 const_double_htab_eq (const void *x
, const void *y
)
252 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
254 if (GET_MODE (a
) != GET_MODE (b
))
256 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
257 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
258 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
260 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
261 CONST_DOUBLE_REAL_VALUE (b
));
264 /* Returns a hash code for X (which is really a CONST_FIXED). */
267 const_fixed_htab_hash (const void *x
)
269 const_rtx
const value
= (const_rtx
) x
;
272 h
= fixed_hash (CONST_FIXED_VALUE (value
));
273 /* MODE is used in the comparison, so it should be in the hash. */
274 h
^= GET_MODE (value
);
278 /* Returns nonzero if the value represented by X (really a ...)
279 is the same as that represented by Y (really a ...). */
282 const_fixed_htab_eq (const void *x
, const void *y
)
284 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
286 if (GET_MODE (a
) != GET_MODE (b
))
288 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
291 /* Return true if the given memory attributes are equal. */
294 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
300 return (p
->alias
== q
->alias
301 && p
->offset_known_p
== q
->offset_known_p
302 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
303 && p
->size_known_p
== q
->size_known_p
304 && (!p
->size_known_p
|| p
->size
== q
->size
)
305 && p
->align
== q
->align
306 && p
->addrspace
== q
->addrspace
307 && (p
->expr
== q
->expr
308 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
309 && operand_equal_p (p
->expr
, q
->expr
, 0))));
312 /* Set MEM's memory attributes so that they are the same as ATTRS. */
315 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
317 /* If everything is the default, we can just clear the attributes. */
318 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
325 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
327 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
328 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
332 /* Returns a hash code for X (which is a really a reg_attrs *). */
335 reg_attrs_htab_hash (const void *x
)
337 const reg_attrs
*const p
= (const reg_attrs
*) x
;
339 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
342 /* Returns nonzero if the value represented by X (which is really a
343 reg_attrs *) is the same as that given by Y (which is also really a
347 reg_attrs_htab_eq (const void *x
, const void *y
)
349 const reg_attrs
*const p
= (const reg_attrs
*) x
;
350 const reg_attrs
*const q
= (const reg_attrs
*) y
;
352 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
354 /* Allocate a new reg_attrs structure and insert it into the hash table if
355 one identical to it is not already in the table. We are doing this for
359 get_reg_attrs (tree decl
, int offset
)
364 /* If everything is the default, we can just return zero. */
365 if (decl
== 0 && offset
== 0)
369 attrs
.offset
= offset
;
371 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
374 *slot
= ggc_alloc
<reg_attrs
> ();
375 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
378 return (reg_attrs
*) *slot
;
383 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
384 and to block register equivalences to be seen across this insn. */
389 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
390 MEM_VOLATILE_P (x
) = true;
396 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
397 don't attempt to share with the various global pieces of rtl (such as
398 frame_pointer_rtx). */
401 gen_raw_REG (enum machine_mode mode
, int regno
)
403 rtx x
= gen_rtx_raw_REG (mode
, regno
);
404 ORIGINAL_REGNO (x
) = regno
;
408 /* There are some RTL codes that require special attention; the generation
409 functions do the raw handling. If you add to this list, modify
410 special_rtx in gengenrtl.c as well. */
413 gen_rtx_EXPR_LIST (enum machine_mode mode
, rtx expr
, rtx expr_list
)
415 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
420 gen_rtx_INSN_LIST (enum machine_mode mode
, rtx insn
, rtx insn_list
)
422 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
427 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
431 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
432 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
434 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
435 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
436 return const_true_rtx
;
439 /* Look up the CONST_INT in the hash table. */
440 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
441 (hashval_t
) arg
, INSERT
);
443 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
449 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
451 return GEN_INT (trunc_int_for_mode (c
, mode
));
454 /* CONST_DOUBLEs might be created from pairs of integers, or from
455 REAL_VALUE_TYPEs. Also, their length is known only at run time,
456 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
458 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
459 hash table. If so, return its counterpart; otherwise add it
460 to the hash table and return it. */
462 lookup_const_double (rtx real
)
464 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
471 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
472 VALUE in mode MODE. */
474 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
476 rtx real
= rtx_alloc (CONST_DOUBLE
);
477 PUT_MODE (real
, mode
);
481 return lookup_const_double (real
);
484 /* Determine whether FIXED, a CONST_FIXED, already exists in the
485 hash table. If so, return its counterpart; otherwise add it
486 to the hash table and return it. */
489 lookup_const_fixed (rtx fixed
)
491 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
498 /* Return a CONST_FIXED rtx for a fixed-point value specified by
499 VALUE in mode MODE. */
502 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
504 rtx fixed
= rtx_alloc (CONST_FIXED
);
505 PUT_MODE (fixed
, mode
);
509 return lookup_const_fixed (fixed
);
512 #if TARGET_SUPPORTS_WIDE_INT == 0
513 /* Constructs double_int from rtx CST. */
516 rtx_to_double_int (const_rtx cst
)
520 if (CONST_INT_P (cst
))
521 r
= double_int::from_shwi (INTVAL (cst
));
522 else if (CONST_DOUBLE_AS_INT_P (cst
))
524 r
.low
= CONST_DOUBLE_LOW (cst
);
525 r
.high
= CONST_DOUBLE_HIGH (cst
);
534 #if TARGET_SUPPORTS_WIDE_INT
535 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
536 If so, return its counterpart; otherwise add it to the hash table and
540 lookup_const_wide_int (rtx wint
)
542 void **slot
= htab_find_slot (const_wide_int_htab
, wint
, INSERT
);
550 /* Return an rtx constant for V, given that the constant has mode MODE.
551 The returned rtx will be a CONST_INT if V fits, otherwise it will be
552 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
553 (if TARGET_SUPPORTS_WIDE_INT). */
556 immed_wide_int_const (const wide_int_ref
&v
, enum machine_mode mode
)
558 unsigned int len
= v
.get_len ();
559 unsigned int prec
= GET_MODE_PRECISION (mode
);
561 /* Allow truncation but not extension since we do not know if the
562 number is signed or unsigned. */
563 gcc_assert (prec
<= v
.get_precision ());
565 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
566 return gen_int_mode (v
.elt (0), mode
);
568 #if TARGET_SUPPORTS_WIDE_INT
572 unsigned int blocks_needed
573 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
575 if (len
> blocks_needed
)
578 value
= const_wide_int_alloc (len
);
580 /* It is so tempting to just put the mode in here. Must control
582 PUT_MODE (value
, VOIDmode
);
583 CWI_PUT_NUM_ELEM (value
, len
);
585 for (i
= 0; i
< len
; i
++)
586 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
588 return lookup_const_wide_int (value
);
591 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
595 #if TARGET_SUPPORTS_WIDE_INT == 0
596 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
597 of ints: I0 is the low-order word and I1 is the high-order word.
598 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
599 implied upper bits are copies of the high bit of i1. The value
600 itself is neither signed nor unsigned. Do not use this routine for
601 non-integer modes; convert to REAL_VALUE_TYPE and use
602 CONST_DOUBLE_FROM_REAL_VALUE. */
605 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
610 /* There are the following cases (note that there are no modes with
611 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
613 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
615 2) If the value of the integer fits into HOST_WIDE_INT anyway
616 (i.e., i1 consists only from copies of the sign bit, and sign
617 of i0 and i1 are the same), then we return a CONST_INT for i0.
618 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
619 if (mode
!= VOIDmode
)
621 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
622 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
623 /* We can get a 0 for an error mark. */
624 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
625 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
627 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
628 return gen_int_mode (i0
, mode
);
631 /* If this integer fits in one word, return a CONST_INT. */
632 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
635 /* We use VOIDmode for integers. */
636 value
= rtx_alloc (CONST_DOUBLE
);
637 PUT_MODE (value
, VOIDmode
);
639 CONST_DOUBLE_LOW (value
) = i0
;
640 CONST_DOUBLE_HIGH (value
) = i1
;
642 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
643 XWINT (value
, i
) = 0;
645 return lookup_const_double (value
);
650 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
652 /* In case the MD file explicitly references the frame pointer, have
653 all such references point to the same frame pointer. This is
654 used during frame pointer elimination to distinguish the explicit
655 references to these registers from pseudos that happened to be
658 If we have eliminated the frame pointer or arg pointer, we will
659 be using it as a normal register, for example as a spill
660 register. In such cases, we might be accessing it in a mode that
661 is not Pmode and therefore cannot use the pre-allocated rtx.
663 Also don't do this when we are making new REGs in reload, since
664 we don't want to get confused with the real pointers. */
666 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
668 if (regno
== FRAME_POINTER_REGNUM
669 && (!reload_completed
|| frame_pointer_needed
))
670 return frame_pointer_rtx
;
671 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
672 if (regno
== HARD_FRAME_POINTER_REGNUM
673 && (!reload_completed
|| frame_pointer_needed
))
674 return hard_frame_pointer_rtx
;
676 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
677 if (regno
== ARG_POINTER_REGNUM
)
678 return arg_pointer_rtx
;
680 #ifdef RETURN_ADDRESS_POINTER_REGNUM
681 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
682 return return_address_pointer_rtx
;
684 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
685 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
686 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
687 return pic_offset_table_rtx
;
688 if (regno
== STACK_POINTER_REGNUM
)
689 return stack_pointer_rtx
;
693 /* If the per-function register table has been set up, try to re-use
694 an existing entry in that table to avoid useless generation of RTL.
696 This code is disabled for now until we can fix the various backends
697 which depend on having non-shared hard registers in some cases. Long
698 term we want to re-enable this code as it can significantly cut down
699 on the amount of useless RTL that gets generated.
701 We'll also need to fix some code that runs after reload that wants to
702 set ORIGINAL_REGNO. */
707 && regno
< FIRST_PSEUDO_REGISTER
708 && reg_raw_mode
[regno
] == mode
)
709 return regno_reg_rtx
[regno
];
712 return gen_raw_REG (mode
, regno
);
716 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
718 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
720 /* This field is not cleared by the mere allocation of the rtx, so
727 /* Generate a memory referring to non-trapping constant memory. */
730 gen_const_mem (enum machine_mode mode
, rtx addr
)
732 rtx mem
= gen_rtx_MEM (mode
, addr
);
733 MEM_READONLY_P (mem
) = 1;
734 MEM_NOTRAP_P (mem
) = 1;
738 /* Generate a MEM referring to fixed portions of the frame, e.g., register
742 gen_frame_mem (enum machine_mode mode
, rtx addr
)
744 rtx mem
= gen_rtx_MEM (mode
, addr
);
745 MEM_NOTRAP_P (mem
) = 1;
746 set_mem_alias_set (mem
, get_frame_alias_set ());
750 /* Generate a MEM referring to a temporary use of the stack, not part
751 of the fixed stack frame. For example, something which is pushed
752 by a target splitter. */
754 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
756 rtx mem
= gen_rtx_MEM (mode
, addr
);
757 MEM_NOTRAP_P (mem
) = 1;
758 if (!cfun
->calls_alloca
)
759 set_mem_alias_set (mem
, get_frame_alias_set ());
763 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
764 this construct would be valid, and false otherwise. */
767 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
768 const_rtx reg
, unsigned int offset
)
770 unsigned int isize
= GET_MODE_SIZE (imode
);
771 unsigned int osize
= GET_MODE_SIZE (omode
);
773 /* All subregs must be aligned. */
774 if (offset
% osize
!= 0)
777 /* The subreg offset cannot be outside the inner object. */
781 /* ??? This should not be here. Temporarily continue to allow word_mode
782 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
783 Generally, backends are doing something sketchy but it'll take time to
785 if (omode
== word_mode
)
787 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
788 is the culprit here, and not the backends. */
789 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
791 /* Allow component subregs of complex and vector. Though given the below
792 extraction rules, it's not always clear what that means. */
793 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
794 && GET_MODE_INNER (imode
) == omode
)
796 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
797 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
798 represent this. It's questionable if this ought to be represented at
799 all -- why can't this all be hidden in post-reload splitters that make
800 arbitrarily mode changes to the registers themselves. */
801 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
803 /* Subregs involving floating point modes are not allowed to
804 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
805 (subreg:SI (reg:DF) 0) isn't. */
806 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
808 if (! (isize
== osize
809 /* LRA can use subreg to store a floating point value in
810 an integer mode. Although the floating point and the
811 integer modes need the same number of hard registers,
812 the size of floating point mode can be less than the
813 integer mode. LRA also uses subregs for a register
814 should be used in different mode in on insn. */
819 /* Paradoxical subregs must have offset zero. */
823 /* This is a normal subreg. Verify that the offset is representable. */
825 /* For hard registers, we already have most of these rules collected in
826 subreg_offset_representable_p. */
827 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
829 unsigned int regno
= REGNO (reg
);
831 #ifdef CANNOT_CHANGE_MODE_CLASS
832 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
833 && GET_MODE_INNER (imode
) == omode
)
835 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
839 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
842 /* For pseudo registers, we want most of the same checks. Namely:
843 If the register no larger than a word, the subreg must be lowpart.
844 If the register is larger than a word, the subreg must be the lowpart
845 of a subword. A subreg does *not* perform arbitrary bit extraction.
846 Given that we've already checked mode/offset alignment, we only have
847 to check subword subregs here. */
848 if (osize
< UNITS_PER_WORD
849 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
851 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
852 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
853 if (offset
% UNITS_PER_WORD
!= low_off
)
860 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
862 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
863 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
866 /* Generate a SUBREG representing the least-significant part of REG if MODE
867 is smaller than mode of REG, otherwise paradoxical SUBREG. */
870 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
872 enum machine_mode inmode
;
874 inmode
= GET_MODE (reg
);
875 if (inmode
== VOIDmode
)
877 return gen_rtx_SUBREG (mode
, reg
,
878 subreg_lowpart_offset (mode
, inmode
));
882 gen_rtx_VAR_LOCATION (enum machine_mode mode
, tree decl
, rtx loc
,
883 enum var_init_status status
)
885 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
886 PAT_VAR_LOCATION_STATUS (x
) = status
;
891 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
894 gen_rtvec (int n
, ...)
902 /* Don't allocate an empty rtvec... */
909 rt_val
= rtvec_alloc (n
);
911 for (i
= 0; i
< n
; i
++)
912 rt_val
->elem
[i
] = va_arg (p
, rtx
);
919 gen_rtvec_v (int n
, rtx
*argp
)
924 /* Don't allocate an empty rtvec... */
928 rt_val
= rtvec_alloc (n
);
930 for (i
= 0; i
< n
; i
++)
931 rt_val
->elem
[i
] = *argp
++;
936 /* Return the number of bytes between the start of an OUTER_MODE
937 in-memory value and the start of an INNER_MODE in-memory value,
938 given that the former is a lowpart of the latter. It may be a
939 paradoxical lowpart, in which case the offset will be negative
940 on big-endian targets. */
943 byte_lowpart_offset (enum machine_mode outer_mode
,
944 enum machine_mode inner_mode
)
946 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
947 return subreg_lowpart_offset (outer_mode
, inner_mode
);
949 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
952 /* Generate a REG rtx for a new pseudo register of mode MODE.
953 This pseudo is assigned the next sequential register number. */
956 gen_reg_rtx (enum machine_mode mode
)
959 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
961 gcc_assert (can_create_pseudo_p ());
963 /* If a virtual register with bigger mode alignment is generated,
964 increase stack alignment estimation because it might be spilled
966 if (SUPPORTS_STACK_ALIGNMENT
967 && crtl
->stack_alignment_estimated
< align
968 && !crtl
->stack_realign_processed
)
970 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
971 if (crtl
->stack_alignment_estimated
< min_align
)
972 crtl
->stack_alignment_estimated
= min_align
;
975 if (generating_concat_p
976 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
977 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
979 /* For complex modes, don't make a single pseudo.
980 Instead, make a CONCAT of two pseudos.
981 This allows noncontiguous allocation of the real and imaginary parts,
982 which makes much better code. Besides, allocating DCmode
983 pseudos overstrains reload on some machines like the 386. */
984 rtx realpart
, imagpart
;
985 enum machine_mode partmode
= GET_MODE_INNER (mode
);
987 realpart
= gen_reg_rtx (partmode
);
988 imagpart
= gen_reg_rtx (partmode
);
989 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
992 /* Do not call gen_reg_rtx with uninitialized crtl. */
993 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
995 /* Make sure regno_pointer_align, and regno_reg_rtx are large
996 enough to have an element for this pseudo reg number. */
998 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1000 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1004 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1005 memset (tmp
+ old_size
, 0, old_size
);
1006 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1008 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1009 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1010 regno_reg_rtx
= new1
;
1012 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1015 val
= gen_raw_REG (mode
, reg_rtx_no
);
1016 regno_reg_rtx
[reg_rtx_no
++] = val
;
1020 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1023 reg_is_parm_p (rtx reg
)
1027 gcc_assert (REG_P (reg
));
1028 decl
= REG_EXPR (reg
);
1029 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1032 /* Update NEW with the same attributes as REG, but with OFFSET added
1033 to the REG_OFFSET. */
1036 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1038 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1039 REG_OFFSET (reg
) + offset
);
1042 /* Generate a register with same attributes as REG, but with OFFSET
1043 added to the REG_OFFSET. */
1046 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
1049 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1051 update_reg_offset (new_rtx
, reg
, offset
);
1055 /* Generate a new pseudo-register with the same attributes as REG, but
1056 with OFFSET added to the REG_OFFSET. */
1059 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
1061 rtx new_rtx
= gen_reg_rtx (mode
);
1063 update_reg_offset (new_rtx
, reg
, offset
);
1067 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1068 new register is a (possibly paradoxical) lowpart of the old one. */
1071 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
1073 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1074 PUT_MODE (reg
, mode
);
1077 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1078 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1081 set_reg_attrs_from_value (rtx reg
, rtx x
)
1084 bool can_be_reg_pointer
= true;
1086 /* Don't call mark_reg_pointer for incompatible pointer sign
1088 while (GET_CODE (x
) == SIGN_EXTEND
1089 || GET_CODE (x
) == ZERO_EXTEND
1090 || GET_CODE (x
) == TRUNCATE
1091 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1093 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1094 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1095 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1096 can_be_reg_pointer
= false;
1101 /* Hard registers can be reused for multiple purposes within the same
1102 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1103 on them is wrong. */
1104 if (HARD_REGISTER_P (reg
))
1107 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1110 if (MEM_OFFSET_KNOWN_P (x
))
1111 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1112 MEM_OFFSET (x
) + offset
);
1113 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1114 mark_reg_pointer (reg
, 0);
1119 update_reg_offset (reg
, x
, offset
);
1120 if (can_be_reg_pointer
&& REG_POINTER (x
))
1121 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1125 /* Generate a REG rtx for a new pseudo register, copying the mode
1126 and attributes from X. */
1129 gen_reg_rtx_and_attrs (rtx x
)
1131 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1132 set_reg_attrs_from_value (reg
, x
);
1136 /* Set the register attributes for registers contained in PARM_RTX.
1137 Use needed values from memory attributes of MEM. */
1140 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1142 if (REG_P (parm_rtx
))
1143 set_reg_attrs_from_value (parm_rtx
, mem
);
1144 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1146 /* Check for a NULL entry in the first slot, used to indicate that the
1147 parameter goes both on the stack and in registers. */
1148 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1149 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1151 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1152 if (REG_P (XEXP (x
, 0)))
1153 REG_ATTRS (XEXP (x
, 0))
1154 = get_reg_attrs (MEM_EXPR (mem
),
1155 INTVAL (XEXP (x
, 1)));
1160 /* Set the REG_ATTRS for registers in value X, given that X represents
1164 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1166 if (GET_CODE (x
) == SUBREG
)
1168 gcc_assert (subreg_lowpart_p (x
));
1173 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1175 if (GET_CODE (x
) == CONCAT
)
1177 if (REG_P (XEXP (x
, 0)))
1178 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1179 if (REG_P (XEXP (x
, 1)))
1180 REG_ATTRS (XEXP (x
, 1))
1181 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1183 if (GET_CODE (x
) == PARALLEL
)
1187 /* Check for a NULL entry, used to indicate that the parameter goes
1188 both on the stack and in registers. */
1189 if (XEXP (XVECEXP (x
, 0, 0), 0))
1194 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1196 rtx y
= XVECEXP (x
, 0, i
);
1197 if (REG_P (XEXP (y
, 0)))
1198 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1203 /* Assign the RTX X to declaration T. */
1206 set_decl_rtl (tree t
, rtx x
)
1208 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1210 set_reg_attrs_for_decl_rtl (t
, x
);
1213 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1214 if the ABI requires the parameter to be passed by reference. */
1217 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1219 DECL_INCOMING_RTL (t
) = x
;
1220 if (x
&& !by_reference_p
)
1221 set_reg_attrs_for_decl_rtl (t
, x
);
1224 /* Identify REG (which may be a CONCAT) as a user register. */
1227 mark_user_reg (rtx reg
)
1229 if (GET_CODE (reg
) == CONCAT
)
1231 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1232 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1236 gcc_assert (REG_P (reg
));
1237 REG_USERVAR_P (reg
) = 1;
1241 /* Identify REG as a probable pointer register and show its alignment
1242 as ALIGN, if nonzero. */
1245 mark_reg_pointer (rtx reg
, int align
)
1247 if (! REG_POINTER (reg
))
1249 REG_POINTER (reg
) = 1;
1252 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1254 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1255 /* We can no-longer be sure just how aligned this pointer is. */
1256 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1259 /* Return 1 plus largest pseudo reg number used in the current function. */
1267 /* Return 1 + the largest label number used so far in the current function. */
1270 max_label_num (void)
1275 /* Return first label number used in this function (if any were used). */
1278 get_first_label_num (void)
1280 return first_label_num
;
1283 /* If the rtx for label was created during the expansion of a nested
1284 function, then first_label_num won't include this label number.
1285 Fix this now so that array indices work later. */
1288 maybe_set_first_label_num (rtx x
)
1290 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1291 first_label_num
= CODE_LABEL_NUMBER (x
);
1294 /* Return a value representing some low-order bits of X, where the number
1295 of low-order bits is given by MODE. Note that no conversion is done
1296 between floating-point and fixed-point values, rather, the bit
1297 representation is returned.
1299 This function handles the cases in common between gen_lowpart, below,
1300 and two variants in cse.c and combine.c. These are the cases that can
1301 be safely handled at all points in the compilation.
1303 If this is not a case we can handle, return 0. */
1306 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1308 int msize
= GET_MODE_SIZE (mode
);
1311 enum machine_mode innermode
;
1313 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1314 so we have to make one up. Yuk. */
1315 innermode
= GET_MODE (x
);
1317 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1318 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1319 else if (innermode
== VOIDmode
)
1320 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1322 xsize
= GET_MODE_SIZE (innermode
);
1324 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1326 if (innermode
== mode
)
1329 /* MODE must occupy no more words than the mode of X. */
1330 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1331 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1334 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1335 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1338 offset
= subreg_lowpart_offset (mode
, innermode
);
1340 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1341 && (GET_MODE_CLASS (mode
) == MODE_INT
1342 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1344 /* If we are getting the low-order part of something that has been
1345 sign- or zero-extended, we can either just use the object being
1346 extended or make a narrower extension. If we want an even smaller
1347 piece than the size of the object being extended, call ourselves
1350 This case is used mostly by combine and cse. */
1352 if (GET_MODE (XEXP (x
, 0)) == mode
)
1354 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1355 return gen_lowpart_common (mode
, XEXP (x
, 0));
1356 else if (msize
< xsize
)
1357 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1359 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1360 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1361 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1362 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1364 /* Otherwise, we can't do this. */
1369 gen_highpart (enum machine_mode mode
, rtx x
)
1371 unsigned int msize
= GET_MODE_SIZE (mode
);
1374 /* This case loses if X is a subreg. To catch bugs early,
1375 complain if an invalid MODE is used even in other cases. */
1376 gcc_assert (msize
<= UNITS_PER_WORD
1377 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1379 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1380 subreg_highpart_offset (mode
, GET_MODE (x
)));
1381 gcc_assert (result
);
1383 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1384 the target if we have a MEM. gen_highpart must return a valid operand,
1385 emitting code if necessary to do so. */
1388 result
= validize_mem (result
);
1389 gcc_assert (result
);
1395 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1396 be VOIDmode constant. */
1398 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1400 if (GET_MODE (exp
) != VOIDmode
)
1402 gcc_assert (GET_MODE (exp
) == innermode
);
1403 return gen_highpart (outermode
, exp
);
1405 return simplify_gen_subreg (outermode
, exp
, innermode
,
1406 subreg_highpart_offset (outermode
, innermode
));
1409 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1412 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1414 unsigned int offset
= 0;
1415 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1419 if (WORDS_BIG_ENDIAN
)
1420 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1421 if (BYTES_BIG_ENDIAN
)
1422 offset
+= difference
% UNITS_PER_WORD
;
1428 /* Return offset in bytes to get OUTERMODE high part
1429 of the value in mode INNERMODE stored in memory in target format. */
1431 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1433 unsigned int offset
= 0;
1434 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1436 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1440 if (! WORDS_BIG_ENDIAN
)
1441 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1442 if (! BYTES_BIG_ENDIAN
)
1443 offset
+= difference
% UNITS_PER_WORD
;
1449 /* Return 1 iff X, assumed to be a SUBREG,
1450 refers to the least significant part of its containing reg.
1451 If X is not a SUBREG, always return 1 (it is its own low part!). */
1454 subreg_lowpart_p (const_rtx x
)
1456 if (GET_CODE (x
) != SUBREG
)
1458 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1461 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1462 == SUBREG_BYTE (x
));
1465 /* Return true if X is a paradoxical subreg, false otherwise. */
1467 paradoxical_subreg_p (const_rtx x
)
1469 if (GET_CODE (x
) != SUBREG
)
1471 return (GET_MODE_PRECISION (GET_MODE (x
))
1472 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1475 /* Return subword OFFSET of operand OP.
1476 The word number, OFFSET, is interpreted as the word number starting
1477 at the low-order address. OFFSET 0 is the low-order word if not
1478 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1480 If we cannot extract the required word, we return zero. Otherwise,
1481 an rtx corresponding to the requested word will be returned.
1483 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1484 reload has completed, a valid address will always be returned. After
1485 reload, if a valid address cannot be returned, we return zero.
1487 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1488 it is the responsibility of the caller.
1490 MODE is the mode of OP in case it is a CONST_INT.
1492 ??? This is still rather broken for some cases. The problem for the
1493 moment is that all callers of this thing provide no 'goal mode' to
1494 tell us to work with. This exists because all callers were written
1495 in a word based SUBREG world.
1496 Now use of this function can be deprecated by simplify_subreg in most
1501 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1503 if (mode
== VOIDmode
)
1504 mode
= GET_MODE (op
);
1506 gcc_assert (mode
!= VOIDmode
);
1508 /* If OP is narrower than a word, fail. */
1510 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1513 /* If we want a word outside OP, return zero. */
1515 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1518 /* Form a new MEM at the requested address. */
1521 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1523 if (! validate_address
)
1526 else if (reload_completed
)
1528 if (! strict_memory_address_addr_space_p (word_mode
,
1530 MEM_ADDR_SPACE (op
)))
1534 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1537 /* Rest can be handled by simplify_subreg. */
1538 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1541 /* Similar to `operand_subword', but never return 0. If we can't
1542 extract the required subword, put OP into a register and try again.
1543 The second attempt must succeed. We always validate the address in
1546 MODE is the mode of OP, in case it is CONST_INT. */
1549 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1551 rtx result
= operand_subword (op
, offset
, 1, mode
);
1556 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1558 /* If this is a register which can not be accessed by words, copy it
1559 to a pseudo register. */
1561 op
= copy_to_reg (op
);
1563 op
= force_reg (mode
, op
);
1566 result
= operand_subword (op
, offset
, 1, mode
);
1567 gcc_assert (result
);
1572 /* Returns 1 if both MEM_EXPR can be considered equal
1576 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1581 if (! expr1
|| ! expr2
)
1584 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1587 return operand_equal_p (expr1
, expr2
, 0);
1590 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1591 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1595 get_mem_align_offset (rtx mem
, unsigned int align
)
1598 unsigned HOST_WIDE_INT offset
;
1600 /* This function can't use
1601 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1602 || (MAX (MEM_ALIGN (mem),
1603 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1607 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1609 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1610 for <variable>. get_inner_reference doesn't handle it and
1611 even if it did, the alignment in that case needs to be determined
1612 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1613 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1614 isn't sufficiently aligned, the object it is in might be. */
1615 gcc_assert (MEM_P (mem
));
1616 expr
= MEM_EXPR (mem
);
1617 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1620 offset
= MEM_OFFSET (mem
);
1623 if (DECL_ALIGN (expr
) < align
)
1626 else if (INDIRECT_REF_P (expr
))
1628 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1631 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1635 tree inner
= TREE_OPERAND (expr
, 0);
1636 tree field
= TREE_OPERAND (expr
, 1);
1637 tree byte_offset
= component_ref_field_offset (expr
);
1638 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1641 || !tree_fits_uhwi_p (byte_offset
)
1642 || !tree_fits_uhwi_p (bit_offset
))
1645 offset
+= tree_to_uhwi (byte_offset
);
1646 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1648 if (inner
== NULL_TREE
)
1650 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1651 < (unsigned int) align
)
1655 else if (DECL_P (inner
))
1657 if (DECL_ALIGN (inner
) < align
)
1661 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1669 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1672 /* Given REF (a MEM) and T, either the type of X or the expression
1673 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1674 if we are making a new object of this type. BITPOS is nonzero if
1675 there is an offset outstanding on T that will be applied later. */
1678 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1679 HOST_WIDE_INT bitpos
)
1681 HOST_WIDE_INT apply_bitpos
= 0;
1683 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1686 /* It can happen that type_for_mode was given a mode for which there
1687 is no language-level type. In which case it returns NULL, which
1692 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1693 if (type
== error_mark_node
)
1696 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1697 wrong answer, as it assumes that DECL_RTL already has the right alias
1698 info. Callers should not set DECL_RTL until after the call to
1699 set_mem_attributes. */
1700 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1702 memset (&attrs
, 0, sizeof (attrs
));
1704 /* Get the alias set from the expression or type (perhaps using a
1705 front-end routine) and use it. */
1706 attrs
.alias
= get_alias_set (t
);
1708 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1709 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1711 /* Default values from pre-existing memory attributes if present. */
1712 refattrs
= MEM_ATTRS (ref
);
1715 /* ??? Can this ever happen? Calling this routine on a MEM that
1716 already carries memory attributes should probably be invalid. */
1717 attrs
.expr
= refattrs
->expr
;
1718 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1719 attrs
.offset
= refattrs
->offset
;
1720 attrs
.size_known_p
= refattrs
->size_known_p
;
1721 attrs
.size
= refattrs
->size
;
1722 attrs
.align
= refattrs
->align
;
1725 /* Otherwise, default values from the mode of the MEM reference. */
1728 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1729 gcc_assert (!defattrs
->expr
);
1730 gcc_assert (!defattrs
->offset_known_p
);
1732 /* Respect mode size. */
1733 attrs
.size_known_p
= defattrs
->size_known_p
;
1734 attrs
.size
= defattrs
->size
;
1735 /* ??? Is this really necessary? We probably should always get
1736 the size from the type below. */
1738 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1739 if T is an object, always compute the object alignment below. */
1741 attrs
.align
= defattrs
->align
;
1743 attrs
.align
= BITS_PER_UNIT
;
1744 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1745 e.g. if the type carries an alignment attribute. Should we be
1746 able to simply always use TYPE_ALIGN? */
1749 /* We can set the alignment from the type if we are making an object,
1750 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1751 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1752 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1754 /* If the size is known, we can set that. */
1755 tree new_size
= TYPE_SIZE_UNIT (type
);
1757 /* The address-space is that of the type. */
1758 as
= TYPE_ADDR_SPACE (type
);
1760 /* If T is not a type, we may be able to deduce some more information about
1766 if (TREE_THIS_VOLATILE (t
))
1767 MEM_VOLATILE_P (ref
) = 1;
1769 /* Now remove any conversions: they don't change what the underlying
1770 object is. Likewise for SAVE_EXPR. */
1771 while (CONVERT_EXPR_P (t
)
1772 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1773 || TREE_CODE (t
) == SAVE_EXPR
)
1774 t
= TREE_OPERAND (t
, 0);
1776 /* Note whether this expression can trap. */
1777 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1779 base
= get_base_address (t
);
1783 && TREE_READONLY (base
)
1784 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1785 && !TREE_THIS_VOLATILE (base
))
1786 MEM_READONLY_P (ref
) = 1;
1788 /* Mark static const strings readonly as well. */
1789 if (TREE_CODE (base
) == STRING_CST
1790 && TREE_READONLY (base
)
1791 && TREE_STATIC (base
))
1792 MEM_READONLY_P (ref
) = 1;
1794 /* Address-space information is on the base object. */
1795 if (TREE_CODE (base
) == MEM_REF
1796 || TREE_CODE (base
) == TARGET_MEM_REF
)
1797 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1800 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1803 /* If this expression uses it's parent's alias set, mark it such
1804 that we won't change it. */
1805 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1806 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1808 /* If this is a decl, set the attributes of the MEM from it. */
1812 attrs
.offset_known_p
= true;
1814 apply_bitpos
= bitpos
;
1815 new_size
= DECL_SIZE_UNIT (t
);
1818 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1819 else if (CONSTANT_CLASS_P (t
))
1822 /* If this is a field reference, record it. */
1823 else if (TREE_CODE (t
) == COMPONENT_REF
)
1826 attrs
.offset_known_p
= true;
1828 apply_bitpos
= bitpos
;
1829 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1830 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1833 /* If this is an array reference, look for an outer field reference. */
1834 else if (TREE_CODE (t
) == ARRAY_REF
)
1836 tree off_tree
= size_zero_node
;
1837 /* We can't modify t, because we use it at the end of the
1843 tree index
= TREE_OPERAND (t2
, 1);
1844 tree low_bound
= array_ref_low_bound (t2
);
1845 tree unit_size
= array_ref_element_size (t2
);
1847 /* We assume all arrays have sizes that are a multiple of a byte.
1848 First subtract the lower bound, if any, in the type of the
1849 index, then convert to sizetype and multiply by the size of
1850 the array element. */
1851 if (! integer_zerop (low_bound
))
1852 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1855 off_tree
= size_binop (PLUS_EXPR
,
1856 size_binop (MULT_EXPR
,
1857 fold_convert (sizetype
,
1861 t2
= TREE_OPERAND (t2
, 0);
1863 while (TREE_CODE (t2
) == ARRAY_REF
);
1866 || TREE_CODE (t2
) == COMPONENT_REF
)
1869 attrs
.offset_known_p
= false;
1870 if (tree_fits_uhwi_p (off_tree
))
1872 attrs
.offset_known_p
= true;
1873 attrs
.offset
= tree_to_uhwi (off_tree
);
1874 apply_bitpos
= bitpos
;
1877 /* Else do not record a MEM_EXPR. */
1880 /* If this is an indirect reference, record it. */
1881 else if (TREE_CODE (t
) == MEM_REF
1882 || TREE_CODE (t
) == TARGET_MEM_REF
)
1885 attrs
.offset_known_p
= true;
1887 apply_bitpos
= bitpos
;
1890 /* Compute the alignment. */
1891 unsigned int obj_align
;
1892 unsigned HOST_WIDE_INT obj_bitpos
;
1893 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1894 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1895 if (obj_bitpos
!= 0)
1896 obj_align
= (obj_bitpos
& -obj_bitpos
);
1897 attrs
.align
= MAX (attrs
.align
, obj_align
);
1900 if (tree_fits_uhwi_p (new_size
))
1902 attrs
.size_known_p
= true;
1903 attrs
.size
= tree_to_uhwi (new_size
);
1906 /* If we modified OFFSET based on T, then subtract the outstanding
1907 bit position offset. Similarly, increase the size of the accessed
1908 object to contain the negative offset. */
1911 gcc_assert (attrs
.offset_known_p
);
1912 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1913 if (attrs
.size_known_p
)
1914 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1917 /* Now set the attributes we computed above. */
1918 attrs
.addrspace
= as
;
1919 set_mem_attrs (ref
, &attrs
);
1923 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1925 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1928 /* Set the alias set of MEM to SET. */
1931 set_mem_alias_set (rtx mem
, alias_set_type set
)
1933 struct mem_attrs attrs
;
1935 /* If the new and old alias sets don't conflict, something is wrong. */
1936 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1937 attrs
= *get_mem_attrs (mem
);
1939 set_mem_attrs (mem
, &attrs
);
1942 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1945 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1947 struct mem_attrs attrs
;
1949 attrs
= *get_mem_attrs (mem
);
1950 attrs
.addrspace
= addrspace
;
1951 set_mem_attrs (mem
, &attrs
);
1954 /* Set the alignment of MEM to ALIGN bits. */
1957 set_mem_align (rtx mem
, unsigned int align
)
1959 struct mem_attrs attrs
;
1961 attrs
= *get_mem_attrs (mem
);
1962 attrs
.align
= align
;
1963 set_mem_attrs (mem
, &attrs
);
1966 /* Set the expr for MEM to EXPR. */
1969 set_mem_expr (rtx mem
, tree expr
)
1971 struct mem_attrs attrs
;
1973 attrs
= *get_mem_attrs (mem
);
1975 set_mem_attrs (mem
, &attrs
);
1978 /* Set the offset of MEM to OFFSET. */
1981 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1983 struct mem_attrs attrs
;
1985 attrs
= *get_mem_attrs (mem
);
1986 attrs
.offset_known_p
= true;
1987 attrs
.offset
= offset
;
1988 set_mem_attrs (mem
, &attrs
);
1991 /* Clear the offset of MEM. */
1994 clear_mem_offset (rtx mem
)
1996 struct mem_attrs attrs
;
1998 attrs
= *get_mem_attrs (mem
);
1999 attrs
.offset_known_p
= false;
2000 set_mem_attrs (mem
, &attrs
);
2003 /* Set the size of MEM to SIZE. */
2006 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2008 struct mem_attrs attrs
;
2010 attrs
= *get_mem_attrs (mem
);
2011 attrs
.size_known_p
= true;
2013 set_mem_attrs (mem
, &attrs
);
2016 /* Clear the size of MEM. */
2019 clear_mem_size (rtx mem
)
2021 struct mem_attrs attrs
;
2023 attrs
= *get_mem_attrs (mem
);
2024 attrs
.size_known_p
= false;
2025 set_mem_attrs (mem
, &attrs
);
2028 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2029 and its address changed to ADDR. (VOIDmode means don't change the mode.
2030 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2031 returned memory location is required to be valid. INPLACE is true if any
2032 changes can be made directly to MEMREF or false if MEMREF must be treated
2035 The memory attributes are not changed. */
2038 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
,
2044 gcc_assert (MEM_P (memref
));
2045 as
= MEM_ADDR_SPACE (memref
);
2046 if (mode
== VOIDmode
)
2047 mode
= GET_MODE (memref
);
2049 addr
= XEXP (memref
, 0);
2050 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2051 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2054 /* Don't validate address for LRA. LRA can make the address valid
2055 by itself in most efficient way. */
2056 if (validate
&& !lra_in_progress
)
2058 if (reload_in_progress
|| reload_completed
)
2059 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2061 addr
= memory_address_addr_space (mode
, addr
, as
);
2064 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2069 XEXP (memref
, 0) = addr
;
2073 new_rtx
= gen_rtx_MEM (mode
, addr
);
2074 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2078 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2079 way we are changing MEMREF, so we only preserve the alias set. */
2082 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2084 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2085 enum machine_mode mmode
= GET_MODE (new_rtx
);
2086 struct mem_attrs attrs
, *defattrs
;
2088 attrs
= *get_mem_attrs (memref
);
2089 defattrs
= mode_mem_attrs
[(int) mmode
];
2090 attrs
.expr
= NULL_TREE
;
2091 attrs
.offset_known_p
= false;
2092 attrs
.size_known_p
= defattrs
->size_known_p
;
2093 attrs
.size
= defattrs
->size
;
2094 attrs
.align
= defattrs
->align
;
2096 /* If there are no changes, just return the original memory reference. */
2097 if (new_rtx
== memref
)
2099 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2102 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2103 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2106 set_mem_attrs (new_rtx
, &attrs
);
2110 /* Return a memory reference like MEMREF, but with its mode changed
2111 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2112 nonzero, the memory address is forced to be valid.
2113 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2114 and the caller is responsible for adjusting MEMREF base register.
2115 If ADJUST_OBJECT is zero, the underlying object associated with the
2116 memory reference is left unchanged and the caller is responsible for
2117 dealing with it. Otherwise, if the new memory reference is outside
2118 the underlying object, even partially, then the object is dropped.
2119 SIZE, if nonzero, is the size of an access in cases where MODE
2120 has no inherent size. */
2123 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2124 int validate
, int adjust_address
, int adjust_object
,
2127 rtx addr
= XEXP (memref
, 0);
2129 enum machine_mode address_mode
;
2131 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2132 unsigned HOST_WIDE_INT max_align
;
2133 #ifdef POINTERS_EXTEND_UNSIGNED
2134 enum machine_mode pointer_mode
2135 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2138 /* VOIDmode means no mode change for change_address_1. */
2139 if (mode
== VOIDmode
)
2140 mode
= GET_MODE (memref
);
2142 /* Take the size of non-BLKmode accesses from the mode. */
2143 defattrs
= mode_mem_attrs
[(int) mode
];
2144 if (defattrs
->size_known_p
)
2145 size
= defattrs
->size
;
2147 /* If there are no changes, just return the original memory reference. */
2148 if (mode
== GET_MODE (memref
) && !offset
2149 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2150 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2154 /* ??? Prefer to create garbage instead of creating shared rtl.
2155 This may happen even if offset is nonzero -- consider
2156 (plus (plus reg reg) const_int) -- so do this always. */
2157 addr
= copy_rtx (addr
);
2159 /* Convert a possibly large offset to a signed value within the
2160 range of the target address space. */
2161 address_mode
= get_address_mode (memref
);
2162 pbits
= GET_MODE_BITSIZE (address_mode
);
2163 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2165 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2166 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2172 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2173 object, we can merge it into the LO_SUM. */
2174 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2176 && (unsigned HOST_WIDE_INT
) offset
2177 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2178 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2179 plus_constant (address_mode
,
2180 XEXP (addr
, 1), offset
));
2181 #ifdef POINTERS_EXTEND_UNSIGNED
2182 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2183 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2184 the fact that pointers are not allowed to overflow. */
2185 else if (POINTERS_EXTEND_UNSIGNED
> 0
2186 && GET_CODE (addr
) == ZERO_EXTEND
2187 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2188 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2189 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2190 plus_constant (pointer_mode
,
2191 XEXP (addr
, 0), offset
));
2194 addr
= plus_constant (address_mode
, addr
, offset
);
2197 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2199 /* If the address is a REG, change_address_1 rightfully returns memref,
2200 but this would destroy memref's MEM_ATTRS. */
2201 if (new_rtx
== memref
&& offset
!= 0)
2202 new_rtx
= copy_rtx (new_rtx
);
2204 /* Conservatively drop the object if we don't know where we start from. */
2205 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2207 attrs
.expr
= NULL_TREE
;
2211 /* Compute the new values of the memory attributes due to this adjustment.
2212 We add the offsets and update the alignment. */
2213 if (attrs
.offset_known_p
)
2215 attrs
.offset
+= offset
;
2217 /* Drop the object if the new left end is not within its bounds. */
2218 if (adjust_object
&& attrs
.offset
< 0)
2220 attrs
.expr
= NULL_TREE
;
2225 /* Compute the new alignment by taking the MIN of the alignment and the
2226 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2230 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2231 attrs
.align
= MIN (attrs
.align
, max_align
);
2236 /* Drop the object if the new right end is not within its bounds. */
2237 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2239 attrs
.expr
= NULL_TREE
;
2242 attrs
.size_known_p
= true;
2245 else if (attrs
.size_known_p
)
2247 gcc_assert (!adjust_object
);
2248 attrs
.size
-= offset
;
2249 /* ??? The store_by_pieces machinery generates negative sizes,
2250 so don't assert for that here. */
2253 set_mem_attrs (new_rtx
, &attrs
);
2258 /* Return a memory reference like MEMREF, but with its mode changed
2259 to MODE and its address changed to ADDR, which is assumed to be
2260 MEMREF offset by OFFSET bytes. If VALIDATE is
2261 nonzero, the memory address is forced to be valid. */
2264 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2265 HOST_WIDE_INT offset
, int validate
)
2267 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2268 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2271 /* Return a memory reference like MEMREF, but whose address is changed by
2272 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2273 known to be in OFFSET (possibly 1). */
2276 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2278 rtx new_rtx
, addr
= XEXP (memref
, 0);
2279 enum machine_mode address_mode
;
2280 struct mem_attrs attrs
, *defattrs
;
2282 attrs
= *get_mem_attrs (memref
);
2283 address_mode
= get_address_mode (memref
);
2284 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2286 /* At this point we don't know _why_ the address is invalid. It
2287 could have secondary memory references, multiplies or anything.
2289 However, if we did go and rearrange things, we can wind up not
2290 being able to recognize the magic around pic_offset_table_rtx.
2291 This stuff is fragile, and is yet another example of why it is
2292 bad to expose PIC machinery too early. */
2293 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2295 && GET_CODE (addr
) == PLUS
2296 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2298 addr
= force_reg (GET_MODE (addr
), addr
);
2299 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2302 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2303 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2305 /* If there are no changes, just return the original memory reference. */
2306 if (new_rtx
== memref
)
2309 /* Update the alignment to reflect the offset. Reset the offset, which
2311 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2312 attrs
.offset_known_p
= false;
2313 attrs
.size_known_p
= defattrs
->size_known_p
;
2314 attrs
.size
= defattrs
->size
;
2315 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2316 set_mem_attrs (new_rtx
, &attrs
);
2320 /* Return a memory reference like MEMREF, but with its address changed to
2321 ADDR. The caller is asserting that the actual piece of memory pointed
2322 to is the same, just the form of the address is being changed, such as
2323 by putting something into a register. INPLACE is true if any changes
2324 can be made directly to MEMREF or false if MEMREF must be treated as
2328 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2330 /* change_address_1 copies the memory attribute structure without change
2331 and that's exactly what we want here. */
2332 update_temp_slot_address (XEXP (memref
, 0), addr
);
2333 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2336 /* Likewise, but the reference is not required to be valid. */
2339 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2341 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2344 /* Return a memory reference like MEMREF, but with its mode widened to
2345 MODE and offset by OFFSET. This would be used by targets that e.g.
2346 cannot issue QImode memory operations and have to use SImode memory
2347 operations plus masking logic. */
2350 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2352 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2353 struct mem_attrs attrs
;
2354 unsigned int size
= GET_MODE_SIZE (mode
);
2356 /* If there are no changes, just return the original memory reference. */
2357 if (new_rtx
== memref
)
2360 attrs
= *get_mem_attrs (new_rtx
);
2362 /* If we don't know what offset we were at within the expression, then
2363 we can't know if we've overstepped the bounds. */
2364 if (! attrs
.offset_known_p
)
2365 attrs
.expr
= NULL_TREE
;
2369 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2371 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2372 tree offset
= component_ref_field_offset (attrs
.expr
);
2374 if (! DECL_SIZE_UNIT (field
))
2376 attrs
.expr
= NULL_TREE
;
2380 /* Is the field at least as large as the access? If so, ok,
2381 otherwise strip back to the containing structure. */
2382 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2383 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2384 && attrs
.offset
>= 0)
2387 if (! tree_fits_uhwi_p (offset
))
2389 attrs
.expr
= NULL_TREE
;
2393 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2394 attrs
.offset
+= tree_to_uhwi (offset
);
2395 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2398 /* Similarly for the decl. */
2399 else if (DECL_P (attrs
.expr
)
2400 && DECL_SIZE_UNIT (attrs
.expr
)
2401 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2402 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2403 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2407 /* The widened memory access overflows the expression, which means
2408 that it could alias another expression. Zap it. */
2409 attrs
.expr
= NULL_TREE
;
2415 attrs
.offset_known_p
= false;
2417 /* The widened memory may alias other stuff, so zap the alias set. */
2418 /* ??? Maybe use get_alias_set on any remaining expression. */
2420 attrs
.size_known_p
= true;
2422 set_mem_attrs (new_rtx
, &attrs
);
2426 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2427 static GTY(()) tree spill_slot_decl
;
2430 get_spill_slot_decl (bool force_build_p
)
2432 tree d
= spill_slot_decl
;
2434 struct mem_attrs attrs
;
2436 if (d
|| !force_build_p
)
2439 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2440 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2441 DECL_ARTIFICIAL (d
) = 1;
2442 DECL_IGNORED_P (d
) = 1;
2444 spill_slot_decl
= d
;
2446 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2447 MEM_NOTRAP_P (rd
) = 1;
2448 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2449 attrs
.alias
= new_alias_set ();
2451 set_mem_attrs (rd
, &attrs
);
2452 SET_DECL_RTL (d
, rd
);
2457 /* Given MEM, a result from assign_stack_local, fill in the memory
2458 attributes as appropriate for a register allocator spill slot.
2459 These slots are not aliasable by other memory. We arrange for
2460 them all to use a single MEM_EXPR, so that the aliasing code can
2461 work properly in the case of shared spill slots. */
2464 set_mem_attrs_for_spill (rtx mem
)
2466 struct mem_attrs attrs
;
2469 attrs
= *get_mem_attrs (mem
);
2470 attrs
.expr
= get_spill_slot_decl (true);
2471 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2472 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2474 /* We expect the incoming memory to be of the form:
2475 (mem:MODE (plus (reg sfp) (const_int offset)))
2476 with perhaps the plus missing for offset = 0. */
2477 addr
= XEXP (mem
, 0);
2478 attrs
.offset_known_p
= true;
2480 if (GET_CODE (addr
) == PLUS
2481 && CONST_INT_P (XEXP (addr
, 1)))
2482 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2484 set_mem_attrs (mem
, &attrs
);
2485 MEM_NOTRAP_P (mem
) = 1;
2488 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2491 gen_label_rtx (void)
2493 return as_a
<rtx_code_label
*> (
2494 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2495 NULL
, label_num
++, NULL
));
2498 /* For procedure integration. */
2500 /* Install new pointers to the first and last insns in the chain.
2501 Also, set cur_insn_uid to one higher than the last in use.
2502 Used for an inline-procedure after copying the insn chain. */
2505 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2509 set_first_insn (first
);
2510 set_last_insn (last
);
2513 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2515 int debug_count
= 0;
2517 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2518 cur_debug_insn_uid
= 0;
2520 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2521 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2522 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2525 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2526 if (DEBUG_INSN_P (insn
))
2531 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2533 cur_debug_insn_uid
++;
2536 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2537 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2542 /* Go through all the RTL insn bodies and copy any invalid shared
2543 structure. This routine should only be called once. */
2546 unshare_all_rtl_1 (rtx_insn
*insn
)
2548 /* Unshare just about everything else. */
2549 unshare_all_rtl_in_chain (insn
);
2551 /* Make sure the addresses of stack slots found outside the insn chain
2552 (such as, in DECL_RTL of a variable) are not shared
2553 with the insn chain.
2555 This special care is necessary when the stack slot MEM does not
2556 actually appear in the insn chain. If it does appear, its address
2557 is unshared from all else at that point. */
2558 stack_slot_list
= safe_as_a
<rtx_expr_list
*> (
2559 copy_rtx_if_shared (stack_slot_list
));
2562 /* Go through all the RTL insn bodies and copy any invalid shared
2563 structure, again. This is a fairly expensive thing to do so it
2564 should be done sparingly. */
2567 unshare_all_rtl_again (rtx_insn
*insn
)
2572 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2575 reset_used_flags (PATTERN (p
));
2576 reset_used_flags (REG_NOTES (p
));
2578 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2581 /* Make sure that virtual stack slots are not shared. */
2582 set_used_decls (DECL_INITIAL (cfun
->decl
));
2584 /* Make sure that virtual parameters are not shared. */
2585 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2586 set_used_flags (DECL_RTL (decl
));
2588 reset_used_flags (stack_slot_list
);
2590 unshare_all_rtl_1 (insn
);
2594 unshare_all_rtl (void)
2596 unshare_all_rtl_1 (get_insns ());
2601 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2602 Recursively does the same for subexpressions. */
2605 verify_rtx_sharing (rtx orig
, rtx insn
)
2610 const char *format_ptr
;
2615 code
= GET_CODE (x
);
2617 /* These types may be freely shared. */
2633 /* SCRATCH must be shared because they represent distinct values. */
2636 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2637 clobbers or clobbers of hard registers that originated as pseudos.
2638 This is needed to allow safe register renaming. */
2639 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2640 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2645 if (shared_const_p (orig
))
2650 /* A MEM is allowed to be shared if its address is constant. */
2651 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2652 || reload_completed
|| reload_in_progress
)
2661 /* This rtx may not be shared. If it has already been seen,
2662 replace it with a copy of itself. */
2663 #ifdef ENABLE_CHECKING
2664 if (RTX_FLAG (x
, used
))
2666 error ("invalid rtl sharing found in the insn");
2668 error ("shared rtx");
2670 internal_error ("internal consistency failure");
2673 gcc_assert (!RTX_FLAG (x
, used
));
2675 RTX_FLAG (x
, used
) = 1;
2677 /* Now scan the subexpressions recursively. */
2679 format_ptr
= GET_RTX_FORMAT (code
);
2681 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2683 switch (*format_ptr
++)
2686 verify_rtx_sharing (XEXP (x
, i
), insn
);
2690 if (XVEC (x
, i
) != NULL
)
2693 int len
= XVECLEN (x
, i
);
2695 for (j
= 0; j
< len
; j
++)
2697 /* We allow sharing of ASM_OPERANDS inside single
2699 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2700 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2702 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2704 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2713 /* Reset used-flags for INSN. */
2716 reset_insn_used_flags (rtx insn
)
2718 gcc_assert (INSN_P (insn
));
2719 reset_used_flags (PATTERN (insn
));
2720 reset_used_flags (REG_NOTES (insn
));
2722 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2725 /* Go through all the RTL insn bodies and clear all the USED bits. */
2728 reset_all_used_flags (void)
2732 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2735 rtx pat
= PATTERN (p
);
2736 if (GET_CODE (pat
) != SEQUENCE
)
2737 reset_insn_used_flags (p
);
2740 gcc_assert (REG_NOTES (p
) == NULL
);
2741 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2743 rtx insn
= XVECEXP (pat
, 0, i
);
2745 reset_insn_used_flags (insn
);
2751 /* Verify sharing in INSN. */
2754 verify_insn_sharing (rtx insn
)
2756 gcc_assert (INSN_P (insn
));
2757 reset_used_flags (PATTERN (insn
));
2758 reset_used_flags (REG_NOTES (insn
));
2760 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2763 /* Go through all the RTL insn bodies and check that there is no unexpected
2764 sharing in between the subexpressions. */
2767 verify_rtl_sharing (void)
2771 timevar_push (TV_VERIFY_RTL_SHARING
);
2773 reset_all_used_flags ();
2775 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2778 rtx pat
= PATTERN (p
);
2779 if (GET_CODE (pat
) != SEQUENCE
)
2780 verify_insn_sharing (p
);
2782 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2784 rtx insn
= XVECEXP (pat
, 0, i
);
2786 verify_insn_sharing (insn
);
2790 reset_all_used_flags ();
2792 timevar_pop (TV_VERIFY_RTL_SHARING
);
2795 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2796 Assumes the mark bits are cleared at entry. */
2799 unshare_all_rtl_in_chain (rtx insn
)
2801 for (; insn
; insn
= NEXT_INSN (insn
))
2804 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2805 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2807 CALL_INSN_FUNCTION_USAGE (insn
)
2808 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2812 /* Go through all virtual stack slots of a function and mark them as
2813 shared. We never replace the DECL_RTLs themselves with a copy,
2814 but expressions mentioned into a DECL_RTL cannot be shared with
2815 expressions in the instruction stream.
2817 Note that reload may convert pseudo registers into memories in-place.
2818 Pseudo registers are always shared, but MEMs never are. Thus if we
2819 reset the used flags on MEMs in the instruction stream, we must set
2820 them again on MEMs that appear in DECL_RTLs. */
2823 set_used_decls (tree blk
)
2828 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2829 if (DECL_RTL_SET_P (t
))
2830 set_used_flags (DECL_RTL (t
));
2832 /* Now process sub-blocks. */
2833 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2837 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2838 Recursively does the same for subexpressions. Uses
2839 copy_rtx_if_shared_1 to reduce stack space. */
2842 copy_rtx_if_shared (rtx orig
)
2844 copy_rtx_if_shared_1 (&orig
);
2848 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2849 use. Recursively does the same for subexpressions. */
2852 copy_rtx_if_shared_1 (rtx
*orig1
)
2858 const char *format_ptr
;
2862 /* Repeat is used to turn tail-recursion into iteration. */
2869 code
= GET_CODE (x
);
2871 /* These types may be freely shared. */
2887 /* SCRATCH must be shared because they represent distinct values. */
2890 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2891 clobbers or clobbers of hard registers that originated as pseudos.
2892 This is needed to allow safe register renaming. */
2893 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2894 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2899 if (shared_const_p (x
))
2909 /* The chain of insns is not being copied. */
2916 /* This rtx may not be shared. If it has already been seen,
2917 replace it with a copy of itself. */
2919 if (RTX_FLAG (x
, used
))
2921 x
= shallow_copy_rtx (x
);
2924 RTX_FLAG (x
, used
) = 1;
2926 /* Now scan the subexpressions recursively.
2927 We can store any replaced subexpressions directly into X
2928 since we know X is not shared! Any vectors in X
2929 must be copied if X was copied. */
2931 format_ptr
= GET_RTX_FORMAT (code
);
2932 length
= GET_RTX_LENGTH (code
);
2935 for (i
= 0; i
< length
; i
++)
2937 switch (*format_ptr
++)
2941 copy_rtx_if_shared_1 (last_ptr
);
2942 last_ptr
= &XEXP (x
, i
);
2946 if (XVEC (x
, i
) != NULL
)
2949 int len
= XVECLEN (x
, i
);
2951 /* Copy the vector iff I copied the rtx and the length
2953 if (copied
&& len
> 0)
2954 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2956 /* Call recursively on all inside the vector. */
2957 for (j
= 0; j
< len
; j
++)
2960 copy_rtx_if_shared_1 (last_ptr
);
2961 last_ptr
= &XVECEXP (x
, i
, j
);
2976 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2979 mark_used_flags (rtx x
, int flag
)
2983 const char *format_ptr
;
2986 /* Repeat is used to turn tail-recursion into iteration. */
2991 code
= GET_CODE (x
);
2993 /* These types may be freely shared so we needn't do any resetting
3017 /* The chain of insns is not being copied. */
3024 RTX_FLAG (x
, used
) = flag
;
3026 format_ptr
= GET_RTX_FORMAT (code
);
3027 length
= GET_RTX_LENGTH (code
);
3029 for (i
= 0; i
< length
; i
++)
3031 switch (*format_ptr
++)
3039 mark_used_flags (XEXP (x
, i
), flag
);
3043 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3044 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3050 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3051 to look for shared sub-parts. */
3054 reset_used_flags (rtx x
)
3056 mark_used_flags (x
, 0);
3059 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3060 to look for shared sub-parts. */
3063 set_used_flags (rtx x
)
3065 mark_used_flags (x
, 1);
3068 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3069 Return X or the rtx for the pseudo reg the value of X was copied into.
3070 OTHER must be valid as a SET_DEST. */
3073 make_safe_from (rtx x
, rtx other
)
3076 switch (GET_CODE (other
))
3079 other
= SUBREG_REG (other
);
3081 case STRICT_LOW_PART
:
3084 other
= XEXP (other
, 0);
3093 && GET_CODE (x
) != SUBREG
)
3095 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3096 || reg_mentioned_p (other
, x
))))
3098 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3099 emit_move_insn (temp
, x
);
3105 /* Emission of insns (adding them to the doubly-linked list). */
3107 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3110 get_last_insn_anywhere (void)
3112 struct sequence_stack
*stack
;
3113 if (get_last_insn ())
3114 return get_last_insn ();
3115 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3116 if (stack
->last
!= 0)
3121 /* Return the first nonnote insn emitted in current sequence or current
3122 function. This routine looks inside SEQUENCEs. */
3125 get_first_nonnote_insn (void)
3127 rtx insn
= get_insns ();
3132 for (insn
= next_insn (insn
);
3133 insn
&& NOTE_P (insn
);
3134 insn
= next_insn (insn
))
3138 if (NONJUMP_INSN_P (insn
)
3139 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3140 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3147 /* Return the last nonnote insn emitted in current sequence or current
3148 function. This routine looks inside SEQUENCEs. */
3151 get_last_nonnote_insn (void)
3153 rtx insn
= get_last_insn ();
3158 for (insn
= previous_insn (insn
);
3159 insn
&& NOTE_P (insn
);
3160 insn
= previous_insn (insn
))
3164 if (NONJUMP_INSN_P (insn
)
3165 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3166 insn
= XVECEXP (PATTERN (insn
), 0,
3167 XVECLEN (PATTERN (insn
), 0) - 1);
3174 /* Return the number of actual (non-debug) insns emitted in this
3178 get_max_insn_count (void)
3180 int n
= cur_insn_uid
;
3182 /* The table size must be stable across -g, to avoid codegen
3183 differences due to debug insns, and not be affected by
3184 -fmin-insn-uid, to avoid excessive table size and to simplify
3185 debugging of -fcompare-debug failures. */
3186 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3187 n
-= cur_debug_insn_uid
;
3189 n
-= MIN_NONDEBUG_INSN_UID
;
3195 /* Return the next insn. If it is a SEQUENCE, return the first insn
3199 next_insn (rtx insn
)
3203 insn
= NEXT_INSN (insn
);
3204 if (insn
&& NONJUMP_INSN_P (insn
)
3205 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3206 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3209 return safe_as_a
<rtx_insn
*> (insn
);
3212 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3216 previous_insn (rtx insn
)
3220 insn
= PREV_INSN (insn
);
3221 if (insn
&& NONJUMP_INSN_P (insn
)
3222 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3223 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3226 return safe_as_a
<rtx_insn
*> (insn
);
3229 /* Return the next insn after INSN that is not a NOTE. This routine does not
3230 look inside SEQUENCEs. */
3233 next_nonnote_insn (rtx insn
)
3237 insn
= NEXT_INSN (insn
);
3238 if (insn
== 0 || !NOTE_P (insn
))
3242 return safe_as_a
<rtx_insn
*> (insn
);
3245 /* Return the next insn after INSN that is not a NOTE, but stop the
3246 search before we enter another basic block. This routine does not
3247 look inside SEQUENCEs. */
3250 next_nonnote_insn_bb (rtx insn
)
3254 insn
= NEXT_INSN (insn
);
3255 if (insn
== 0 || !NOTE_P (insn
))
3257 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3261 return safe_as_a
<rtx_insn
*> (insn
);
3264 /* Return the previous insn before INSN that is not a NOTE. This routine does
3265 not look inside SEQUENCEs. */
3268 prev_nonnote_insn (rtx insn
)
3272 insn
= PREV_INSN (insn
);
3273 if (insn
== 0 || !NOTE_P (insn
))
3277 return safe_as_a
<rtx_insn
*> (insn
);
3280 /* Return the previous insn before INSN that is not a NOTE, but stop
3281 the search before we enter another basic block. This routine does
3282 not look inside SEQUENCEs. */
3285 prev_nonnote_insn_bb (rtx insn
)
3289 insn
= PREV_INSN (insn
);
3290 if (insn
== 0 || !NOTE_P (insn
))
3292 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3296 return safe_as_a
<rtx_insn
*> (insn
);
3299 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3300 routine does not look inside SEQUENCEs. */
3303 next_nondebug_insn (rtx insn
)
3307 insn
= NEXT_INSN (insn
);
3308 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3312 return safe_as_a
<rtx_insn
*> (insn
);
3315 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3316 This routine does not look inside SEQUENCEs. */
3319 prev_nondebug_insn (rtx insn
)
3323 insn
= PREV_INSN (insn
);
3324 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3328 return safe_as_a
<rtx_insn
*> (insn
);
3331 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3332 This routine does not look inside SEQUENCEs. */
3335 next_nonnote_nondebug_insn (rtx insn
)
3339 insn
= NEXT_INSN (insn
);
3340 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3344 return safe_as_a
<rtx_insn
*> (insn
);
3347 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3348 This routine does not look inside SEQUENCEs. */
3351 prev_nonnote_nondebug_insn (rtx insn
)
3355 insn
= PREV_INSN (insn
);
3356 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3360 return safe_as_a
<rtx_insn
*> (insn
);
3363 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3364 or 0, if there is none. This routine does not look inside
3368 next_real_insn (rtx insn
)
3372 insn
= NEXT_INSN (insn
);
3373 if (insn
== 0 || INSN_P (insn
))
3377 return safe_as_a
<rtx_insn
*> (insn
);
3380 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3381 or 0, if there is none. This routine does not look inside
3385 prev_real_insn (rtx insn
)
3389 insn
= PREV_INSN (insn
);
3390 if (insn
== 0 || INSN_P (insn
))
3394 return safe_as_a
<rtx_insn
*> (insn
);
3397 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3398 This routine does not look inside SEQUENCEs. */
3401 last_call_insn (void)
3405 for (insn
= get_last_insn ();
3406 insn
&& !CALL_P (insn
);
3407 insn
= PREV_INSN (insn
))
3410 return safe_as_a
<rtx_call_insn
*> (insn
);
3413 /* Find the next insn after INSN that really does something. This routine
3414 does not look inside SEQUENCEs. After reload this also skips over
3415 standalone USE and CLOBBER insn. */
3418 active_insn_p (const_rtx insn
)
3420 return (CALL_P (insn
) || JUMP_P (insn
)
3421 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3422 || (NONJUMP_INSN_P (insn
)
3423 && (! reload_completed
3424 || (GET_CODE (PATTERN (insn
)) != USE
3425 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3429 next_active_insn (rtx insn
)
3433 insn
= NEXT_INSN (insn
);
3434 if (insn
== 0 || active_insn_p (insn
))
3438 return safe_as_a
<rtx_insn
*> (insn
);
3441 /* Find the last insn before INSN that really does something. This routine
3442 does not look inside SEQUENCEs. After reload this also skips over
3443 standalone USE and CLOBBER insn. */
3446 prev_active_insn (rtx insn
)
3450 insn
= PREV_INSN (insn
);
3451 if (insn
== 0 || active_insn_p (insn
))
3455 return safe_as_a
<rtx_insn
*> (insn
);
3459 /* Return the next insn that uses CC0 after INSN, which is assumed to
3460 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3461 applied to the result of this function should yield INSN).
3463 Normally, this is simply the next insn. However, if a REG_CC_USER note
3464 is present, it contains the insn that uses CC0.
3466 Return 0 if we can't find the insn. */
3469 next_cc0_user (rtx insn
)
3471 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3474 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3476 insn
= next_nonnote_insn (insn
);
3477 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3478 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3480 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3481 return safe_as_a
<rtx_insn
*> (insn
);
3486 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3487 note, it is the previous insn. */
3490 prev_cc0_setter (rtx insn
)
3492 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3495 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3497 insn
= prev_nonnote_insn (insn
);
3498 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3500 return safe_as_a
<rtx_insn
*> (insn
);
3505 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3508 find_auto_inc (rtx
*xp
, void *data
)
3511 rtx reg
= (rtx
) data
;
3513 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3516 switch (GET_CODE (x
))
3524 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3535 /* Increment the label uses for all labels present in rtx. */
3538 mark_label_nuses (rtx x
)
3544 code
= GET_CODE (x
);
3545 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3546 LABEL_NUSES (XEXP (x
, 0))++;
3548 fmt
= GET_RTX_FORMAT (code
);
3549 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3552 mark_label_nuses (XEXP (x
, i
));
3553 else if (fmt
[i
] == 'E')
3554 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3555 mark_label_nuses (XVECEXP (x
, i
, j
));
3560 /* Try splitting insns that can be split for better scheduling.
3561 PAT is the pattern which might split.
3562 TRIAL is the insn providing PAT.
3563 LAST is nonzero if we should return the last insn of the sequence produced.
3565 If this routine succeeds in splitting, it returns the first or last
3566 replacement insn depending on the value of LAST. Otherwise, it
3567 returns TRIAL. If the insn to be returned can be split, it will be. */
3570 try_split (rtx pat
, rtx trial
, int last
)
3572 rtx_insn
*before
= PREV_INSN (trial
);
3573 rtx_insn
*after
= NEXT_INSN (trial
);
3574 int has_barrier
= 0;
3577 rtx insn_last
, insn
;
3579 rtx call_insn
= NULL_RTX
;
3581 /* We're not good at redistributing frame information. */
3582 if (RTX_FRAME_RELATED_P (trial
))
3583 return as_a
<rtx_insn
*> (trial
);
3585 if (any_condjump_p (trial
)
3586 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3587 split_branch_probability
= XINT (note
, 0);
3588 probability
= split_branch_probability
;
3590 seq
= split_insns (pat
, trial
);
3592 split_branch_probability
= -1;
3594 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3595 We may need to handle this specially. */
3596 if (after
&& BARRIER_P (after
))
3599 after
= NEXT_INSN (after
);
3603 return as_a
<rtx_insn
*> (trial
);
3605 /* Avoid infinite loop if any insn of the result matches
3606 the original pattern. */
3610 if (INSN_P (insn_last
)
3611 && rtx_equal_p (PATTERN (insn_last
), pat
))
3612 return as_a
<rtx_insn
*> (trial
);
3613 if (!NEXT_INSN (insn_last
))
3615 insn_last
= NEXT_INSN (insn_last
);
3618 /* We will be adding the new sequence to the function. The splitters
3619 may have introduced invalid RTL sharing, so unshare the sequence now. */
3620 unshare_all_rtl_in_chain (seq
);
3622 /* Mark labels and copy flags. */
3623 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3628 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3629 mark_jump_label (PATTERN (insn
), insn
, 0);
3631 if (probability
!= -1
3632 && any_condjump_p (insn
)
3633 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3635 /* We can preserve the REG_BR_PROB notes only if exactly
3636 one jump is created, otherwise the machine description
3637 is responsible for this step using
3638 split_branch_probability variable. */
3639 gcc_assert (njumps
== 1);
3640 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3645 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3646 in SEQ and copy any additional information across. */
3649 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3654 gcc_assert (call_insn
== NULL_RTX
);
3657 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3658 target may have explicitly specified. */
3659 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3662 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3664 /* If the old call was a sibling call, the new one must
3666 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3668 /* If the new call is the last instruction in the sequence,
3669 it will effectively replace the old call in-situ. Otherwise
3670 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3671 so that it comes immediately after the new call. */
3672 if (NEXT_INSN (insn
))
3673 for (next
= NEXT_INSN (trial
);
3674 next
&& NOTE_P (next
);
3675 next
= NEXT_INSN (next
))
3676 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3679 add_insn_after (next
, insn
, NULL
);
3685 /* Copy notes, particularly those related to the CFG. */
3686 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3688 switch (REG_NOTE_KIND (note
))
3691 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3697 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3700 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3704 case REG_NON_LOCAL_GOTO
:
3705 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3708 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3714 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3716 rtx reg
= XEXP (note
, 0);
3717 if (!FIND_REG_INC_NOTE (insn
, reg
)
3718 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3719 add_reg_note (insn
, REG_INC
, reg
);
3725 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3729 gcc_assert (call_insn
!= NULL_RTX
);
3730 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3738 /* If there are LABELS inside the split insns increment the
3739 usage count so we don't delete the label. */
3743 while (insn
!= NULL_RTX
)
3745 /* JUMP_P insns have already been "marked" above. */
3746 if (NONJUMP_INSN_P (insn
))
3747 mark_label_nuses (PATTERN (insn
));
3749 insn
= PREV_INSN (insn
);
3753 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3755 delete_insn (trial
);
3757 emit_barrier_after (tem
);
3759 /* Recursively call try_split for each new insn created; by the
3760 time control returns here that insn will be fully split, so
3761 set LAST and continue from the insn after the one returned.
3762 We can't use next_active_insn here since AFTER may be a note.
3763 Ignore deleted insns, which can be occur if not optimizing. */
3764 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3765 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3766 tem
= try_split (PATTERN (tem
), tem
, 1);
3768 /* Return either the first or the last insn, depending on which was
3771 ? (after
? PREV_INSN (after
) : get_last_insn ())
3772 : NEXT_INSN (before
);
3775 /* Make and return an INSN rtx, initializing all its slots.
3776 Store PATTERN in the pattern slots. */
3779 make_insn_raw (rtx pattern
)
3783 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3785 INSN_UID (insn
) = cur_insn_uid
++;
3786 PATTERN (insn
) = pattern
;
3787 INSN_CODE (insn
) = -1;
3788 REG_NOTES (insn
) = NULL
;
3789 INSN_LOCATION (insn
) = curr_insn_location ();
3790 BLOCK_FOR_INSN (insn
) = NULL
;
3792 #ifdef ENABLE_RTL_CHECKING
3795 && (returnjump_p (insn
)
3796 || (GET_CODE (insn
) == SET
3797 && SET_DEST (insn
) == pc_rtx
)))
3799 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3807 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3810 make_debug_insn_raw (rtx pattern
)
3812 rtx_debug_insn
*insn
;
3814 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3815 INSN_UID (insn
) = cur_debug_insn_uid
++;
3816 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3817 INSN_UID (insn
) = cur_insn_uid
++;
3819 PATTERN (insn
) = pattern
;
3820 INSN_CODE (insn
) = -1;
3821 REG_NOTES (insn
) = NULL
;
3822 INSN_LOCATION (insn
) = curr_insn_location ();
3823 BLOCK_FOR_INSN (insn
) = NULL
;
3828 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3831 make_jump_insn_raw (rtx pattern
)
3833 rtx_jump_insn
*insn
;
3835 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3836 INSN_UID (insn
) = cur_insn_uid
++;
3838 PATTERN (insn
) = pattern
;
3839 INSN_CODE (insn
) = -1;
3840 REG_NOTES (insn
) = NULL
;
3841 JUMP_LABEL (insn
) = NULL
;
3842 INSN_LOCATION (insn
) = curr_insn_location ();
3843 BLOCK_FOR_INSN (insn
) = NULL
;
3848 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3851 make_call_insn_raw (rtx pattern
)
3853 rtx_call_insn
*insn
;
3855 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3856 INSN_UID (insn
) = cur_insn_uid
++;
3858 PATTERN (insn
) = pattern
;
3859 INSN_CODE (insn
) = -1;
3860 REG_NOTES (insn
) = NULL
;
3861 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3862 INSN_LOCATION (insn
) = curr_insn_location ();
3863 BLOCK_FOR_INSN (insn
) = NULL
;
3868 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3871 make_note_raw (enum insn_note subtype
)
3873 /* Some notes are never created this way at all. These notes are
3874 only created by patching out insns. */
3875 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3876 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3878 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3879 INSN_UID (note
) = cur_insn_uid
++;
3880 NOTE_KIND (note
) = subtype
;
3881 BLOCK_FOR_INSN (note
) = NULL
;
3882 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3886 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3887 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3888 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3891 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3893 SET_PREV_INSN (insn
) = prev
;
3894 SET_NEXT_INSN (insn
) = next
;
3897 SET_NEXT_INSN (prev
) = insn
;
3898 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3900 rtx sequence
= PATTERN (prev
);
3901 SET_NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3906 SET_PREV_INSN (next
) = insn
;
3907 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3908 SET_PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3911 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3913 rtx sequence
= PATTERN (insn
);
3914 SET_PREV_INSN (XVECEXP (sequence
, 0, 0)) = prev
;
3915 SET_NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3919 /* Add INSN to the end of the doubly-linked list.
3920 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3923 add_insn (rtx_insn
*insn
)
3925 rtx_insn
*prev
= get_last_insn ();
3926 link_insn_into_chain (insn
, prev
, NULL
);
3927 if (NULL
== get_insns ())
3928 set_first_insn (insn
);
3929 set_last_insn (insn
);
3932 /* Add INSN into the doubly-linked list after insn AFTER. */
3935 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
3937 rtx_insn
*next
= NEXT_INSN (after
);
3939 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3941 link_insn_into_chain (insn
, after
, next
);
3945 if (get_last_insn () == after
)
3946 set_last_insn (insn
);
3949 struct sequence_stack
*stack
= seq_stack
;
3950 /* Scan all pending sequences too. */
3951 for (; stack
; stack
= stack
->next
)
3952 if (after
== stack
->last
)
3961 /* Add INSN into the doubly-linked list before insn BEFORE. */
3964 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
3966 rtx_insn
*prev
= PREV_INSN (before
);
3968 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3970 link_insn_into_chain (insn
, prev
, before
);
3974 if (get_insns () == before
)
3975 set_first_insn (insn
);
3978 struct sequence_stack
*stack
= seq_stack
;
3979 /* Scan all pending sequences too. */
3980 for (; stack
; stack
= stack
->next
)
3981 if (before
== stack
->first
)
3983 stack
->first
= insn
;
3992 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3993 If BB is NULL, an attempt is made to infer the bb from before.
3995 This and the next function should be the only functions called
3996 to insert an insn once delay slots have been filled since only
3997 they know how to update a SEQUENCE. */
4000 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4002 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4003 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4004 add_insn_after_nobb (insn
, after
);
4005 if (!BARRIER_P (after
)
4006 && !BARRIER_P (insn
)
4007 && (bb
= BLOCK_FOR_INSN (after
)))
4009 set_block_for_insn (insn
, bb
);
4011 df_insn_rescan (insn
);
4012 /* Should not happen as first in the BB is always
4013 either NOTE or LABEL. */
4014 if (BB_END (bb
) == after
4015 /* Avoid clobbering of structure when creating new BB. */
4016 && !BARRIER_P (insn
)
4017 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4022 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4023 If BB is NULL, an attempt is made to infer the bb from before.
4025 This and the previous function should be the only functions called
4026 to insert an insn once delay slots have been filled since only
4027 they know how to update a SEQUENCE. */
4030 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4032 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4033 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4034 add_insn_before_nobb (insn
, before
);
4037 && !BARRIER_P (before
)
4038 && !BARRIER_P (insn
))
4039 bb
= BLOCK_FOR_INSN (before
);
4043 set_block_for_insn (insn
, bb
);
4045 df_insn_rescan (insn
);
4046 /* Should not happen as first in the BB is always either NOTE or
4048 gcc_assert (BB_HEAD (bb
) != insn
4049 /* Avoid clobbering of structure when creating new BB. */
4051 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4055 /* Replace insn with an deleted instruction note. */
4058 set_insn_deleted (rtx insn
)
4061 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4062 PUT_CODE (insn
, NOTE
);
4063 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4067 /* Unlink INSN from the insn chain.
4069 This function knows how to handle sequences.
4071 This function does not invalidate data flow information associated with
4072 INSN (i.e. does not call df_insn_delete). That makes this function
4073 usable for only disconnecting an insn from the chain, and re-emit it
4076 To later insert INSN elsewhere in the insn chain via add_insn and
4077 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4078 the caller. Nullifying them here breaks many insn chain walks.
4080 To really delete an insn and related DF information, use delete_insn. */
4083 remove_insn (rtx insn
)
4085 rtx_insn
*next
= NEXT_INSN (insn
);
4086 rtx_insn
*prev
= PREV_INSN (insn
);
4091 SET_NEXT_INSN (prev
) = next
;
4092 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4094 rtx sequence
= PATTERN (prev
);
4095 SET_NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
4098 else if (get_insns () == insn
)
4101 SET_PREV_INSN (next
) = NULL
;
4102 set_first_insn (next
);
4106 struct sequence_stack
*stack
= seq_stack
;
4107 /* Scan all pending sequences too. */
4108 for (; stack
; stack
= stack
->next
)
4109 if (insn
== stack
->first
)
4111 stack
->first
= next
;
4120 SET_PREV_INSN (next
) = prev
;
4121 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4122 SET_PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
4124 else if (get_last_insn () == insn
)
4125 set_last_insn (prev
);
4128 struct sequence_stack
*stack
= seq_stack
;
4129 /* Scan all pending sequences too. */
4130 for (; stack
; stack
= stack
->next
)
4131 if (insn
== stack
->last
)
4140 /* Fix up basic block boundaries, if necessary. */
4141 if (!BARRIER_P (insn
)
4142 && (bb
= BLOCK_FOR_INSN (insn
)))
4144 if (BB_HEAD (bb
) == insn
)
4146 /* Never ever delete the basic block note without deleting whole
4148 gcc_assert (!NOTE_P (insn
));
4149 BB_HEAD (bb
) = next
;
4151 if (BB_END (bb
) == insn
)
4156 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4159 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4161 gcc_assert (call_insn
&& CALL_P (call_insn
));
4163 /* Put the register usage information on the CALL. If there is already
4164 some usage information, put ours at the end. */
4165 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4169 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4170 link
= XEXP (link
, 1))
4173 XEXP (link
, 1) = call_fusage
;
4176 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4179 /* Delete all insns made since FROM.
4180 FROM becomes the new last instruction. */
4183 delete_insns_since (rtx_insn
*from
)
4188 SET_NEXT_INSN (from
) = 0;
4189 set_last_insn (from
);
4192 /* This function is deprecated, please use sequences instead.
4194 Move a consecutive bunch of insns to a different place in the chain.
4195 The insns to be moved are those between FROM and TO.
4196 They are moved to a new position after the insn AFTER.
4197 AFTER must not be FROM or TO or any insn in between.
4199 This function does not know about SEQUENCEs and hence should not be
4200 called after delay-slot filling has been done. */
4203 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4205 #ifdef ENABLE_CHECKING
4207 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4208 gcc_assert (after
!= x
);
4209 gcc_assert (after
!= to
);
4212 /* Splice this bunch out of where it is now. */
4213 if (PREV_INSN (from
))
4214 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4216 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4217 if (get_last_insn () == to
)
4218 set_last_insn (PREV_INSN (from
));
4219 if (get_insns () == from
)
4220 set_first_insn (NEXT_INSN (to
));
4222 /* Make the new neighbors point to it and it to them. */
4223 if (NEXT_INSN (after
))
4224 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4226 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4227 SET_PREV_INSN (from
) = after
;
4228 SET_NEXT_INSN (after
) = from
;
4229 if (after
== get_last_insn ())
4233 /* Same as function above, but take care to update BB boundaries. */
4235 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4237 rtx_insn
*prev
= PREV_INSN (from
);
4238 basic_block bb
, bb2
;
4240 reorder_insns_nobb (from
, to
, after
);
4242 if (!BARRIER_P (after
)
4243 && (bb
= BLOCK_FOR_INSN (after
)))
4246 df_set_bb_dirty (bb
);
4248 if (!BARRIER_P (from
)
4249 && (bb2
= BLOCK_FOR_INSN (from
)))
4251 if (BB_END (bb2
) == to
)
4252 BB_END (bb2
) = prev
;
4253 df_set_bb_dirty (bb2
);
4256 if (BB_END (bb
) == after
)
4259 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4261 df_insn_change_bb (x
, bb
);
4266 /* Emit insn(s) of given code and pattern
4267 at a specified place within the doubly-linked list.
4269 All of the emit_foo global entry points accept an object
4270 X which is either an insn list or a PATTERN of a single
4273 There are thus a few canonical ways to generate code and
4274 emit it at a specific place in the instruction stream. For
4275 example, consider the instruction named SPOT and the fact that
4276 we would like to emit some instructions before SPOT. We might
4280 ... emit the new instructions ...
4281 insns_head = get_insns ();
4284 emit_insn_before (insns_head, SPOT);
4286 It used to be common to generate SEQUENCE rtl instead, but that
4287 is a relic of the past which no longer occurs. The reason is that
4288 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4289 generated would almost certainly die right after it was created. */
4292 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4293 rtx_insn
*(*make_raw
) (rtx
))
4297 gcc_assert (before
);
4300 return safe_as_a
<rtx_insn
*> (last
);
4302 switch (GET_CODE (x
))
4311 insn
= as_a
<rtx_insn
*> (x
);
4314 rtx_insn
*next
= NEXT_INSN (insn
);
4315 add_insn_before (insn
, before
, bb
);
4321 #ifdef ENABLE_RTL_CHECKING
4328 last
= (*make_raw
) (x
);
4329 add_insn_before (last
, before
, bb
);
4333 return safe_as_a
<rtx_insn
*> (last
);
4336 /* Make X be output before the instruction BEFORE. */
4339 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4341 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4344 /* Make an instruction with body X and code JUMP_INSN
4345 and output it before the instruction BEFORE. */
4348 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4350 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4351 make_jump_insn_raw
);
4354 /* Make an instruction with body X and code CALL_INSN
4355 and output it before the instruction BEFORE. */
4358 emit_call_insn_before_noloc (rtx x
, rtx before
)
4360 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4361 make_call_insn_raw
);
4364 /* Make an instruction with body X and code DEBUG_INSN
4365 and output it before the instruction BEFORE. */
4368 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4370 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4371 make_debug_insn_raw
);
4374 /* Make an insn of code BARRIER
4375 and output it before the insn BEFORE. */
4378 emit_barrier_before (rtx before
)
4380 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4382 INSN_UID (insn
) = cur_insn_uid
++;
4384 add_insn_before (insn
, before
, NULL
);
4388 /* Emit the label LABEL before the insn BEFORE. */
4391 emit_label_before (rtx label
, rtx before
)
4393 gcc_checking_assert (INSN_UID (label
) == 0);
4394 INSN_UID (label
) = cur_insn_uid
++;
4395 add_insn_before (label
, before
, NULL
);
4396 return as_a
<rtx_insn
*> (label
);
4399 /* Helper for emit_insn_after, handles lists of instructions
4403 emit_insn_after_1 (rtx_insn
*first
, rtx after
, basic_block bb
)
4406 rtx_insn
*after_after
;
4407 if (!bb
&& !BARRIER_P (after
))
4408 bb
= BLOCK_FOR_INSN (after
);
4412 df_set_bb_dirty (bb
);
4413 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4414 if (!BARRIER_P (last
))
4416 set_block_for_insn (last
, bb
);
4417 df_insn_rescan (last
);
4419 if (!BARRIER_P (last
))
4421 set_block_for_insn (last
, bb
);
4422 df_insn_rescan (last
);
4424 if (BB_END (bb
) == after
)
4428 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4431 after_after
= NEXT_INSN (after
);
4433 SET_NEXT_INSN (after
) = first
;
4434 SET_PREV_INSN (first
) = after
;
4435 SET_NEXT_INSN (last
) = after_after
;
4437 SET_PREV_INSN (after_after
) = last
;
4439 if (after
== get_last_insn ())
4440 set_last_insn (last
);
4446 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4447 rtx_insn
*(*make_raw
)(rtx
))
4454 return safe_as_a
<rtx_insn
*> (last
);
4456 switch (GET_CODE (x
))
4465 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4468 #ifdef ENABLE_RTL_CHECKING
4475 last
= (*make_raw
) (x
);
4476 add_insn_after (last
, after
, bb
);
4480 return safe_as_a
<rtx_insn
*> (last
);
4483 /* Make X be output after the insn AFTER and set the BB of insn. If
4484 BB is NULL, an attempt is made to infer the BB from AFTER. */
4487 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4489 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4493 /* Make an insn of code JUMP_INSN with body X
4494 and output it after the insn AFTER. */
4497 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4499 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4502 /* Make an instruction with body X and code CALL_INSN
4503 and output it after the instruction AFTER. */
4506 emit_call_insn_after_noloc (rtx x
, rtx after
)
4508 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4511 /* Make an instruction with body X and code CALL_INSN
4512 and output it after the instruction AFTER. */
4515 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4517 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4520 /* Make an insn of code BARRIER
4521 and output it after the insn AFTER. */
4524 emit_barrier_after (rtx after
)
4526 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4528 INSN_UID (insn
) = cur_insn_uid
++;
4530 add_insn_after (insn
, after
, NULL
);
4534 /* Emit the label LABEL after the insn AFTER. */
4537 emit_label_after (rtx label
, rtx after
)
4539 gcc_checking_assert (INSN_UID (label
) == 0);
4540 INSN_UID (label
) = cur_insn_uid
++;
4541 add_insn_after (label
, after
, NULL
);
4542 return as_a
<rtx_insn
*> (label
);
4545 /* Notes require a bit of special handling: Some notes need to have their
4546 BLOCK_FOR_INSN set, others should never have it set, and some should
4547 have it set or clear depending on the context. */
4549 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4550 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4551 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4554 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4558 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4559 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4562 /* Notes for var tracking and EH region markers can appear between or
4563 inside basic blocks. If the caller is emitting on the basic block
4564 boundary, do not set BLOCK_FOR_INSN on the new note. */
4565 case NOTE_INSN_VAR_LOCATION
:
4566 case NOTE_INSN_CALL_ARG_LOCATION
:
4567 case NOTE_INSN_EH_REGION_BEG
:
4568 case NOTE_INSN_EH_REGION_END
:
4569 return on_bb_boundary_p
;
4571 /* Otherwise, BLOCK_FOR_INSN must be set. */
4577 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4580 emit_note_after (enum insn_note subtype
, rtx uncast_after
)
4582 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4583 rtx_note
*note
= make_note_raw (subtype
);
4584 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4585 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4587 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4588 add_insn_after_nobb (note
, after
);
4590 add_insn_after (note
, after
, bb
);
4594 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4597 emit_note_before (enum insn_note subtype
, rtx uncast_before
)
4599 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4600 rtx_note
*note
= make_note_raw (subtype
);
4601 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4602 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4604 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4605 add_insn_before_nobb (note
, before
);
4607 add_insn_before (note
, before
, bb
);
4611 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4612 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4615 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4616 rtx_insn
*(*make_raw
) (rtx
))
4618 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4620 if (pattern
== NULL_RTX
|| !loc
)
4621 return safe_as_a
<rtx_insn
*> (last
);
4623 after
= NEXT_INSN (after
);
4626 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4627 INSN_LOCATION (after
) = loc
;
4630 after
= NEXT_INSN (after
);
4632 return safe_as_a
<rtx_insn
*> (last
);
4635 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4636 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4640 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4641 rtx_insn
*(*make_raw
) (rtx
))
4645 if (skip_debug_insns
)
4646 while (DEBUG_INSN_P (prev
))
4647 prev
= PREV_INSN (prev
);
4650 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4653 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4656 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4658 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4660 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4663 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4665 emit_insn_after (rtx pattern
, rtx after
)
4667 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4670 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4672 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4674 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4677 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4679 emit_jump_insn_after (rtx pattern
, rtx after
)
4681 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4684 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4686 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4688 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4691 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4693 emit_call_insn_after (rtx pattern
, rtx after
)
4695 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4698 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4700 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4702 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4705 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4707 emit_debug_insn_after (rtx pattern
, rtx after
)
4709 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4712 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4713 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4714 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4718 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4719 rtx_insn
*(*make_raw
) (rtx
))
4721 rtx first
= PREV_INSN (before
);
4722 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4723 insnp
? before
: NULL_RTX
,
4726 if (pattern
== NULL_RTX
|| !loc
)
4727 return safe_as_a
<rtx_insn
*> (last
);
4730 first
= get_insns ();
4732 first
= NEXT_INSN (first
);
4735 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4736 INSN_LOCATION (first
) = loc
;
4739 first
= NEXT_INSN (first
);
4741 return safe_as_a
<rtx_insn
*> (last
);
4744 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4745 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4746 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4747 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4750 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4751 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4755 if (skip_debug_insns
)
4756 while (DEBUG_INSN_P (next
))
4757 next
= PREV_INSN (next
);
4760 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4763 return emit_pattern_before_noloc (pattern
, before
,
4764 insnp
? before
: NULL_RTX
,
4768 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4770 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4772 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4776 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4778 emit_insn_before (rtx pattern
, rtx before
)
4780 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4783 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4785 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4787 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4788 make_jump_insn_raw
);
4791 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4793 emit_jump_insn_before (rtx pattern
, rtx before
)
4795 return emit_pattern_before (pattern
, before
, true, false,
4796 make_jump_insn_raw
);
4799 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4801 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4803 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4804 make_call_insn_raw
);
4807 /* Like emit_call_insn_before_noloc,
4808 but set insn_location according to BEFORE. */
4810 emit_call_insn_before (rtx pattern
, rtx before
)
4812 return emit_pattern_before (pattern
, before
, true, false,
4813 make_call_insn_raw
);
4816 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4818 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4820 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4821 make_debug_insn_raw
);
4824 /* Like emit_debug_insn_before_noloc,
4825 but set insn_location according to BEFORE. */
4827 emit_debug_insn_before (rtx pattern
, rtx before
)
4829 return emit_pattern_before (pattern
, before
, false, false,
4830 make_debug_insn_raw
);
4833 /* Take X and emit it at the end of the doubly-linked
4836 Returns the last insn emitted. */
4841 rtx_insn
*last
= get_last_insn ();
4847 switch (GET_CODE (x
))
4856 insn
= as_a
<rtx_insn
*> (x
);
4859 rtx_insn
*next
= NEXT_INSN (insn
);
4866 #ifdef ENABLE_RTL_CHECKING
4867 case JUMP_TABLE_DATA
:
4874 last
= make_insn_raw (x
);
4882 /* Make an insn of code DEBUG_INSN with pattern X
4883 and add it to the end of the doubly-linked list. */
4886 emit_debug_insn (rtx x
)
4888 rtx_insn
*last
= get_last_insn ();
4894 switch (GET_CODE (x
))
4903 insn
= as_a
<rtx_insn
*> (x
);
4906 rtx_insn
*next
= NEXT_INSN (insn
);
4913 #ifdef ENABLE_RTL_CHECKING
4914 case JUMP_TABLE_DATA
:
4921 last
= make_debug_insn_raw (x
);
4929 /* Make an insn of code JUMP_INSN with pattern X
4930 and add it to the end of the doubly-linked list. */
4933 emit_jump_insn (rtx x
)
4935 rtx_insn
*last
= NULL
;
4938 switch (GET_CODE (x
))
4947 insn
= as_a
<rtx_insn
*> (x
);
4950 rtx_insn
*next
= NEXT_INSN (insn
);
4957 #ifdef ENABLE_RTL_CHECKING
4958 case JUMP_TABLE_DATA
:
4965 last
= make_jump_insn_raw (x
);
4973 /* Make an insn of code CALL_INSN with pattern X
4974 and add it to the end of the doubly-linked list. */
4977 emit_call_insn (rtx x
)
4981 switch (GET_CODE (x
))
4990 insn
= emit_insn (x
);
4993 #ifdef ENABLE_RTL_CHECKING
4995 case JUMP_TABLE_DATA
:
5001 insn
= make_call_insn_raw (x
);
5009 /* Add the label LABEL to the end of the doubly-linked list. */
5012 emit_label (rtx label
)
5014 gcc_checking_assert (INSN_UID (label
) == 0);
5015 INSN_UID (label
) = cur_insn_uid
++;
5016 add_insn (as_a
<rtx_insn
*> (label
));
5017 return as_a
<rtx_insn
*> (label
);
5020 /* Make an insn of code JUMP_TABLE_DATA
5021 and add it to the end of the doubly-linked list. */
5023 rtx_jump_table_data
*
5024 emit_jump_table_data (rtx table
)
5026 rtx_jump_table_data
*jump_table_data
=
5027 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5028 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5029 PATTERN (jump_table_data
) = table
;
5030 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5031 add_insn (jump_table_data
);
5032 return jump_table_data
;
5035 /* Make an insn of code BARRIER
5036 and add it to the end of the doubly-linked list. */
5041 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5042 INSN_UID (barrier
) = cur_insn_uid
++;
5047 /* Emit a copy of note ORIG. */
5050 emit_note_copy (rtx_note
*orig
)
5052 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5053 rtx_note
*note
= make_note_raw (kind
);
5054 NOTE_DATA (note
) = NOTE_DATA (orig
);
5059 /* Make an insn of code NOTE or type NOTE_NO
5060 and add it to the end of the doubly-linked list. */
5063 emit_note (enum insn_note kind
)
5065 rtx_note
*note
= make_note_raw (kind
);
5070 /* Emit a clobber of lvalue X. */
5073 emit_clobber (rtx x
)
5075 /* CONCATs should not appear in the insn stream. */
5076 if (GET_CODE (x
) == CONCAT
)
5078 emit_clobber (XEXP (x
, 0));
5079 return emit_clobber (XEXP (x
, 1));
5081 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5084 /* Return a sequence of insns to clobber lvalue X. */
5098 /* Emit a use of rvalue X. */
5103 /* CONCATs should not appear in the insn stream. */
5104 if (GET_CODE (x
) == CONCAT
)
5106 emit_use (XEXP (x
, 0));
5107 return emit_use (XEXP (x
, 1));
5109 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5112 /* Return a sequence of insns to use rvalue X. */
5126 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5127 Return the set in INSN that such notes describe, or NULL if the notes
5128 have no meaning for INSN. */
5131 set_for_reg_notes (rtx insn
)
5138 pat
= PATTERN (insn
);
5139 if (GET_CODE (pat
) == PARALLEL
)
5141 /* We do not use single_set because that ignores SETs of unused
5142 registers. REG_EQUAL and REG_EQUIV notes really do require the
5143 PARALLEL to have a single SET. */
5144 if (multiple_sets (insn
))
5146 pat
= XVECEXP (pat
, 0, 0);
5149 if (GET_CODE (pat
) != SET
)
5152 reg
= SET_DEST (pat
);
5154 /* Notes apply to the contents of a STRICT_LOW_PART. */
5155 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5156 reg
= XEXP (reg
, 0);
5158 /* Check that we have a register. */
5159 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5165 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5166 note of this type already exists, remove it first. */
5169 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5171 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5177 if (!set_for_reg_notes (insn
))
5180 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5181 It serves no useful purpose and breaks eliminate_regs. */
5182 if (GET_CODE (datum
) == ASM_OPERANDS
)
5191 XEXP (note
, 0) = datum
;
5194 add_reg_note (insn
, kind
, datum
);
5195 note
= REG_NOTES (insn
);
5202 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5211 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5213 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5215 rtx set
= set_for_reg_notes (insn
);
5217 if (set
&& SET_DEST (set
) == dst
)
5218 return set_unique_reg_note (insn
, kind
, datum
);
5222 /* Return an indication of which type of insn should have X as a body.
5223 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5225 static enum rtx_code
5226 classify_insn (rtx x
)
5230 if (GET_CODE (x
) == CALL
)
5232 if (ANY_RETURN_P (x
))
5234 if (GET_CODE (x
) == SET
)
5236 if (SET_DEST (x
) == pc_rtx
)
5238 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5243 if (GET_CODE (x
) == PARALLEL
)
5246 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5247 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5249 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5250 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5252 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5253 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5259 /* Emit the rtl pattern X as an appropriate kind of insn.
5260 If X is a label, it is simply added into the insn chain. */
5265 enum rtx_code code
= classify_insn (x
);
5270 return emit_label (x
);
5272 return emit_insn (x
);
5275 rtx_insn
*insn
= emit_jump_insn (x
);
5276 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5277 return emit_barrier ();
5281 return emit_call_insn (x
);
5283 return emit_debug_insn (x
);
5289 /* Space for free sequence stack entries. */
5290 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5292 /* Begin emitting insns to a sequence. If this sequence will contain
5293 something that might cause the compiler to pop arguments to function
5294 calls (because those pops have previously been deferred; see
5295 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5296 before calling this function. That will ensure that the deferred
5297 pops are not accidentally emitted in the middle of this sequence. */
5300 start_sequence (void)
5302 struct sequence_stack
*tem
;
5304 if (free_sequence_stack
!= NULL
)
5306 tem
= free_sequence_stack
;
5307 free_sequence_stack
= tem
->next
;
5310 tem
= ggc_alloc
<sequence_stack
> ();
5312 tem
->next
= seq_stack
;
5313 tem
->first
= get_insns ();
5314 tem
->last
= get_last_insn ();
5322 /* Set up the insn chain starting with FIRST as the current sequence,
5323 saving the previously current one. See the documentation for
5324 start_sequence for more information about how to use this function. */
5327 push_to_sequence (rtx_insn
*first
)
5333 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5336 set_first_insn (first
);
5337 set_last_insn (last
);
5340 /* Like push_to_sequence, but take the last insn as an argument to avoid
5341 looping through the list. */
5344 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5348 set_first_insn (first
);
5349 set_last_insn (last
);
5352 /* Set up the outer-level insn chain
5353 as the current sequence, saving the previously current one. */
5356 push_topmost_sequence (void)
5358 struct sequence_stack
*stack
, *top
= NULL
;
5362 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5365 set_first_insn (top
->first
);
5366 set_last_insn (top
->last
);
5369 /* After emitting to the outer-level insn chain, update the outer-level
5370 insn chain, and restore the previous saved state. */
5373 pop_topmost_sequence (void)
5375 struct sequence_stack
*stack
, *top
= NULL
;
5377 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5380 top
->first
= get_insns ();
5381 top
->last
= get_last_insn ();
5386 /* After emitting to a sequence, restore previous saved state.
5388 To get the contents of the sequence just made, you must call
5389 `get_insns' *before* calling here.
5391 If the compiler might have deferred popping arguments while
5392 generating this sequence, and this sequence will not be immediately
5393 inserted into the instruction stream, use do_pending_stack_adjust
5394 before calling get_insns. That will ensure that the deferred
5395 pops are inserted into this sequence, and not into some random
5396 location in the instruction stream. See INHIBIT_DEFER_POP for more
5397 information about deferred popping of arguments. */
5402 struct sequence_stack
*tem
= seq_stack
;
5404 set_first_insn (tem
->first
);
5405 set_last_insn (tem
->last
);
5406 seq_stack
= tem
->next
;
5408 memset (tem
, 0, sizeof (*tem
));
5409 tem
->next
= free_sequence_stack
;
5410 free_sequence_stack
= tem
;
5413 /* Return 1 if currently emitting into a sequence. */
5416 in_sequence_p (void)
5418 return seq_stack
!= 0;
5421 /* Put the various virtual registers into REGNO_REG_RTX. */
5424 init_virtual_regs (void)
5426 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5427 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5428 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5429 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5430 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5431 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5432 = virtual_preferred_stack_boundary_rtx
;
5436 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5437 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5438 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5439 static int copy_insn_n_scratches
;
5441 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5442 copied an ASM_OPERANDS.
5443 In that case, it is the original input-operand vector. */
5444 static rtvec orig_asm_operands_vector
;
5446 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5447 copied an ASM_OPERANDS.
5448 In that case, it is the copied input-operand vector. */
5449 static rtvec copy_asm_operands_vector
;
5451 /* Likewise for the constraints vector. */
5452 static rtvec orig_asm_constraints_vector
;
5453 static rtvec copy_asm_constraints_vector
;
5455 /* Recursively create a new copy of an rtx for copy_insn.
5456 This function differs from copy_rtx in that it handles SCRATCHes and
5457 ASM_OPERANDs properly.
5458 Normally, this function is not used directly; use copy_insn as front end.
5459 However, you could first copy an insn pattern with copy_insn and then use
5460 this function afterwards to properly copy any REG_NOTEs containing
5464 copy_insn_1 (rtx orig
)
5469 const char *format_ptr
;
5474 code
= GET_CODE (orig
);
5489 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5490 clobbers or clobbers of hard registers that originated as pseudos.
5491 This is needed to allow safe register renaming. */
5492 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5493 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5498 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5499 if (copy_insn_scratch_in
[i
] == orig
)
5500 return copy_insn_scratch_out
[i
];
5504 if (shared_const_p (orig
))
5508 /* A MEM with a constant address is not sharable. The problem is that
5509 the constant address may need to be reloaded. If the mem is shared,
5510 then reloading one copy of this mem will cause all copies to appear
5511 to have been reloaded. */
5517 /* Copy the various flags, fields, and other information. We assume
5518 that all fields need copying, and then clear the fields that should
5519 not be copied. That is the sensible default behavior, and forces
5520 us to explicitly document why we are *not* copying a flag. */
5521 copy
= shallow_copy_rtx (orig
);
5523 /* We do not copy the USED flag, which is used as a mark bit during
5524 walks over the RTL. */
5525 RTX_FLAG (copy
, used
) = 0;
5527 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5530 RTX_FLAG (copy
, jump
) = 0;
5531 RTX_FLAG (copy
, call
) = 0;
5532 RTX_FLAG (copy
, frame_related
) = 0;
5535 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5537 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5538 switch (*format_ptr
++)
5541 if (XEXP (orig
, i
) != NULL
)
5542 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5547 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5548 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5549 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5550 XVEC (copy
, i
) = copy_asm_operands_vector
;
5551 else if (XVEC (orig
, i
) != NULL
)
5553 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5554 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5555 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5566 /* These are left unchanged. */
5573 if (code
== SCRATCH
)
5575 i
= copy_insn_n_scratches
++;
5576 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5577 copy_insn_scratch_in
[i
] = orig
;
5578 copy_insn_scratch_out
[i
] = copy
;
5580 else if (code
== ASM_OPERANDS
)
5582 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5583 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5584 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5585 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5591 /* Create a new copy of an rtx.
5592 This function differs from copy_rtx in that it handles SCRATCHes and
5593 ASM_OPERANDs properly.
5594 INSN doesn't really have to be a full INSN; it could be just the
5597 copy_insn (rtx insn
)
5599 copy_insn_n_scratches
= 0;
5600 orig_asm_operands_vector
= 0;
5601 orig_asm_constraints_vector
= 0;
5602 copy_asm_operands_vector
= 0;
5603 copy_asm_constraints_vector
= 0;
5604 return copy_insn_1 (insn
);
5607 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5608 on that assumption that INSN itself remains in its original place. */
5611 copy_delay_slot_insn (rtx insn
)
5613 /* Copy INSN with its rtx_code, all its notes, location etc. */
5614 insn
= copy_rtx (insn
);
5615 INSN_UID (insn
) = cur_insn_uid
++;
5619 /* Initialize data structures and variables in this file
5620 before generating rtl for each function. */
5625 set_first_insn (NULL
);
5626 set_last_insn (NULL
);
5627 if (MIN_NONDEBUG_INSN_UID
)
5628 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5631 cur_debug_insn_uid
= 1;
5632 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5633 first_label_num
= label_num
;
5636 /* Init the tables that describe all the pseudo regs. */
5638 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5640 crtl
->emit
.regno_pointer_align
5641 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5643 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5645 /* Put copies of all the hard registers into regno_reg_rtx. */
5646 memcpy (regno_reg_rtx
,
5647 initial_regno_reg_rtx
,
5648 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5650 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5651 init_virtual_regs ();
5653 /* Indicate that the virtual registers and stack locations are
5655 REG_POINTER (stack_pointer_rtx
) = 1;
5656 REG_POINTER (frame_pointer_rtx
) = 1;
5657 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5658 REG_POINTER (arg_pointer_rtx
) = 1;
5660 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5661 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5662 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5663 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5664 REG_POINTER (virtual_cfa_rtx
) = 1;
5666 #ifdef STACK_BOUNDARY
5667 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5668 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5669 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5670 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5672 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5673 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5674 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5675 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5676 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5679 #ifdef INIT_EXPANDERS
5684 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5687 gen_const_vector (enum machine_mode mode
, int constant
)
5692 enum machine_mode inner
;
5694 units
= GET_MODE_NUNITS (mode
);
5695 inner
= GET_MODE_INNER (mode
);
5697 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5699 v
= rtvec_alloc (units
);
5701 /* We need to call this function after we set the scalar const_tiny_rtx
5703 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5705 for (i
= 0; i
< units
; ++i
)
5706 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5708 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5712 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5713 all elements are zero, and the one vector when all elements are one. */
5715 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5717 enum machine_mode inner
= GET_MODE_INNER (mode
);
5718 int nunits
= GET_MODE_NUNITS (mode
);
5722 /* Check to see if all of the elements have the same value. */
5723 x
= RTVEC_ELT (v
, nunits
- 1);
5724 for (i
= nunits
- 2; i
>= 0; i
--)
5725 if (RTVEC_ELT (v
, i
) != x
)
5728 /* If the values are all the same, check to see if we can use one of the
5729 standard constant vectors. */
5732 if (x
== CONST0_RTX (inner
))
5733 return CONST0_RTX (mode
);
5734 else if (x
== CONST1_RTX (inner
))
5735 return CONST1_RTX (mode
);
5736 else if (x
== CONSTM1_RTX (inner
))
5737 return CONSTM1_RTX (mode
);
5740 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5743 /* Initialise global register information required by all functions. */
5746 init_emit_regs (void)
5749 enum machine_mode mode
;
5752 /* Reset register attributes */
5753 htab_empty (reg_attrs_htab
);
5755 /* We need reg_raw_mode, so initialize the modes now. */
5756 init_reg_modes_target ();
5758 /* Assign register numbers to the globally defined register rtx. */
5759 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5760 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5761 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5762 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5763 virtual_incoming_args_rtx
=
5764 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5765 virtual_stack_vars_rtx
=
5766 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5767 virtual_stack_dynamic_rtx
=
5768 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5769 virtual_outgoing_args_rtx
=
5770 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5771 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5772 virtual_preferred_stack_boundary_rtx
=
5773 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5775 /* Initialize RTL for commonly used hard registers. These are
5776 copied into regno_reg_rtx as we begin to compile each function. */
5777 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5778 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5780 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5781 return_address_pointer_rtx
5782 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5785 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5786 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5788 pic_offset_table_rtx
= NULL_RTX
;
5790 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5792 mode
= (enum machine_mode
) i
;
5793 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5794 attrs
->align
= BITS_PER_UNIT
;
5795 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5796 if (mode
!= BLKmode
)
5798 attrs
->size_known_p
= true;
5799 attrs
->size
= GET_MODE_SIZE (mode
);
5800 if (STRICT_ALIGNMENT
)
5801 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5803 mode_mem_attrs
[i
] = attrs
;
5807 /* Initialize global machine_mode variables. */
5810 init_derived_machine_modes (void)
5812 byte_mode
= VOIDmode
;
5813 word_mode
= VOIDmode
;
5815 for (enum machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5817 mode
= GET_MODE_WIDER_MODE (mode
))
5819 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5820 && byte_mode
== VOIDmode
)
5823 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5824 && word_mode
== VOIDmode
)
5828 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5831 /* Create some permanent unique rtl objects shared between all functions. */
5834 init_emit_once (void)
5837 enum machine_mode mode
;
5838 enum machine_mode double_mode
;
5840 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5841 CONST_FIXED, and memory attribute hash tables. */
5842 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5843 const_int_htab_eq
, NULL
);
5845 #if TARGET_SUPPORTS_WIDE_INT
5846 const_wide_int_htab
= htab_create_ggc (37, const_wide_int_htab_hash
,
5847 const_wide_int_htab_eq
, NULL
);
5849 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5850 const_double_htab_eq
, NULL
);
5852 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5853 const_fixed_htab_eq
, NULL
);
5855 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5856 reg_attrs_htab_eq
, NULL
);
5858 #ifdef INIT_EXPANDERS
5859 /* This is to initialize {init|mark|free}_machine_status before the first
5860 call to push_function_context_to. This is needed by the Chill front
5861 end which calls push_function_context_to before the first call to
5862 init_function_start. */
5866 /* Create the unique rtx's for certain rtx codes and operand values. */
5868 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5869 tries to use these variables. */
5870 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5871 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5872 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5874 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5875 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5876 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5878 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5880 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5882 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5883 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5884 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5889 dconsthalf
= dconst1
;
5890 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5892 for (i
= 0; i
< 3; i
++)
5894 const REAL_VALUE_TYPE
*const r
=
5895 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5897 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5899 mode
= GET_MODE_WIDER_MODE (mode
))
5900 const_tiny_rtx
[i
][(int) mode
] =
5901 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5903 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5905 mode
= GET_MODE_WIDER_MODE (mode
))
5906 const_tiny_rtx
[i
][(int) mode
] =
5907 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5909 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5911 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5913 mode
= GET_MODE_WIDER_MODE (mode
))
5914 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5916 for (mode
= MIN_MODE_PARTIAL_INT
;
5917 mode
<= MAX_MODE_PARTIAL_INT
;
5918 mode
= (enum machine_mode
)((int)(mode
) + 1))
5919 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5922 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5924 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5926 mode
= GET_MODE_WIDER_MODE (mode
))
5927 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5929 for (mode
= MIN_MODE_PARTIAL_INT
;
5930 mode
<= MAX_MODE_PARTIAL_INT
;
5931 mode
= (enum machine_mode
)((int)(mode
) + 1))
5932 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5934 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5936 mode
= GET_MODE_WIDER_MODE (mode
))
5938 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5939 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5942 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5944 mode
= GET_MODE_WIDER_MODE (mode
))
5946 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5947 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5950 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5952 mode
= GET_MODE_WIDER_MODE (mode
))
5954 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5955 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5956 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5959 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5961 mode
= GET_MODE_WIDER_MODE (mode
))
5963 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5964 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5967 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5969 mode
= GET_MODE_WIDER_MODE (mode
))
5971 FCONST0 (mode
).data
.high
= 0;
5972 FCONST0 (mode
).data
.low
= 0;
5973 FCONST0 (mode
).mode
= mode
;
5974 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5975 FCONST0 (mode
), mode
);
5978 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5980 mode
= GET_MODE_WIDER_MODE (mode
))
5982 FCONST0 (mode
).data
.high
= 0;
5983 FCONST0 (mode
).data
.low
= 0;
5984 FCONST0 (mode
).mode
= mode
;
5985 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5986 FCONST0 (mode
), mode
);
5989 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5991 mode
= GET_MODE_WIDER_MODE (mode
))
5993 FCONST0 (mode
).data
.high
= 0;
5994 FCONST0 (mode
).data
.low
= 0;
5995 FCONST0 (mode
).mode
= mode
;
5996 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5997 FCONST0 (mode
), mode
);
5999 /* We store the value 1. */
6000 FCONST1 (mode
).data
.high
= 0;
6001 FCONST1 (mode
).data
.low
= 0;
6002 FCONST1 (mode
).mode
= mode
;
6004 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6005 HOST_BITS_PER_DOUBLE_INT
,
6006 SIGNED_FIXED_POINT_MODE_P (mode
));
6007 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6008 FCONST1 (mode
), mode
);
6011 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6013 mode
= GET_MODE_WIDER_MODE (mode
))
6015 FCONST0 (mode
).data
.high
= 0;
6016 FCONST0 (mode
).data
.low
= 0;
6017 FCONST0 (mode
).mode
= mode
;
6018 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6019 FCONST0 (mode
), mode
);
6021 /* We store the value 1. */
6022 FCONST1 (mode
).data
.high
= 0;
6023 FCONST1 (mode
).data
.low
= 0;
6024 FCONST1 (mode
).mode
= mode
;
6026 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6027 HOST_BITS_PER_DOUBLE_INT
,
6028 SIGNED_FIXED_POINT_MODE_P (mode
));
6029 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6030 FCONST1 (mode
), mode
);
6033 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6035 mode
= GET_MODE_WIDER_MODE (mode
))
6037 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6040 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6042 mode
= GET_MODE_WIDER_MODE (mode
))
6044 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6047 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6049 mode
= GET_MODE_WIDER_MODE (mode
))
6051 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6052 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6055 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6057 mode
= GET_MODE_WIDER_MODE (mode
))
6059 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6060 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6063 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6064 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
6065 const_tiny_rtx
[0][i
] = const0_rtx
;
6067 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6068 if (STORE_FLAG_VALUE
== 1)
6069 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6071 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6072 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6073 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6074 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6077 /* Produce exact duplicate of insn INSN after AFTER.
6078 Care updating of libcall regions if present. */
6081 emit_copy_of_insn_after (rtx insn
, rtx after
)
6086 switch (GET_CODE (insn
))
6089 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6093 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6094 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6098 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6102 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6103 if (CALL_INSN_FUNCTION_USAGE (insn
))
6104 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6105 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6106 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6107 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6108 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6109 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6110 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6117 /* Update LABEL_NUSES. */
6118 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6120 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6122 /* If the old insn is frame related, then so is the new one. This is
6123 primarily needed for IA-64 unwind info which marks epilogue insns,
6124 which may be duplicated by the basic block reordering code. */
6125 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6127 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6128 will make them. REG_LABEL_TARGETs are created there too, but are
6129 supposed to be sticky, so we copy them. */
6130 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6131 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6133 if (GET_CODE (link
) == EXPR_LIST
)
6134 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6135 copy_insn_1 (XEXP (link
, 0)));
6137 add_shallow_copy_of_reg_note (new_rtx
, link
);
6140 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6144 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6146 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6148 if (hard_reg_clobbers
[mode
][regno
])
6149 return hard_reg_clobbers
[mode
][regno
];
6151 return (hard_reg_clobbers
[mode
][regno
] =
6152 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6155 location_t prologue_location
;
6156 location_t epilogue_location
;
6158 /* Hold current location information and last location information, so the
6159 datastructures are built lazily only when some instructions in given
6160 place are needed. */
6161 static location_t curr_location
;
6163 /* Allocate insn location datastructure. */
6165 insn_locations_init (void)
6167 prologue_location
= epilogue_location
= 0;
6168 curr_location
= UNKNOWN_LOCATION
;
6171 /* At the end of emit stage, clear current location. */
6173 insn_locations_finalize (void)
6175 epilogue_location
= curr_location
;
6176 curr_location
= UNKNOWN_LOCATION
;
6179 /* Set current location. */
6181 set_curr_insn_location (location_t location
)
6183 curr_location
= location
;
6186 /* Get current location. */
6188 curr_insn_location (void)
6190 return curr_location
;
6193 /* Return lexical scope block insn belongs to. */
6195 insn_scope (const_rtx insn
)
6197 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6200 /* Return line number of the statement that produced this insn. */
6202 insn_line (const_rtx insn
)
6204 return LOCATION_LINE (INSN_LOCATION (insn
));
6207 /* Return source file of the statement that produced this insn. */
6209 insn_file (const_rtx insn
)
6211 return LOCATION_FILE (INSN_LOCATION (insn
));
6214 /* Return expanded location of the statement that produced this insn. */
6216 insn_location (const_rtx insn
)
6218 return expand_location (INSN_LOCATION (insn
));
6221 /* Return true if memory model MODEL requires a pre-operation (release-style)
6222 barrier or a post-operation (acquire-style) barrier. While not universal,
6223 this function matches behavior of several targets. */
6226 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6228 switch (model
& MEMMODEL_MASK
)
6230 case MEMMODEL_RELAXED
:
6231 case MEMMODEL_CONSUME
:
6233 case MEMMODEL_RELEASE
:
6235 case MEMMODEL_ACQUIRE
:
6237 case MEMMODEL_ACQ_REL
:
6238 case MEMMODEL_SEQ_CST
:
6245 #include "gt-emit-rtl.h"