1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
43 #include "double-int.h"
51 #include "fold-const.h"
54 #include "hard-reg-set.h"
57 #include "basic-block.h"
61 #include "stringpool.h"
63 #include "statistics.h"
64 #include "fixed-value.h"
65 #include "insn-config.h"
77 #include "langhooks.h"
84 struct target_rtl default_target_rtl
;
86 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
89 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
91 /* Commonly used modes. */
93 machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
94 machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
95 machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
96 machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
98 /* Datastructures maintained for currently processed function in RTL form. */
100 struct rtl_data x_rtl
;
102 /* Indexed by pseudo register number, gives the rtx for that pseudo.
103 Allocated in parallel with regno_pointer_align.
104 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
105 with length attribute nested in top level structures. */
109 /* This is *not* reset after each function. It gives each CODE_LABEL
110 in the entire compilation a unique label number. */
112 static GTY(()) int label_num
= 1;
114 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
115 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
116 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
117 is set only for MODE_INT and MODE_VECTOR_INT modes. */
119 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
123 REAL_VALUE_TYPE dconst0
;
124 REAL_VALUE_TYPE dconst1
;
125 REAL_VALUE_TYPE dconst2
;
126 REAL_VALUE_TYPE dconstm1
;
127 REAL_VALUE_TYPE dconsthalf
;
129 /* Record fixed-point constant 0 and 1. */
130 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
131 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
133 /* We make one copy of (const_int C) where C is in
134 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
135 to save space during the compilation and simplify comparisons of
138 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
140 /* Standard pieces of rtx, to be substituted directly into things. */
143 rtx simple_return_rtx
;
146 /* Marker used for denoting an INSN, which should never be accessed (i.e.,
147 this pointer should normally never be dereferenced), but is required to be
148 distinct from NULL_RTX. Currently used by peephole2 pass. */
149 rtx_insn
*invalid_insn_rtx
;
151 /* A hash table storing CONST_INTs whose absolute value is greater
152 than MAX_SAVED_CONST_INT. */
154 struct const_int_hasher
: ggc_cache_hasher
<rtx
>
156 typedef HOST_WIDE_INT compare_type
;
158 static hashval_t
hash (rtx i
);
159 static bool equal (rtx i
, HOST_WIDE_INT h
);
162 static GTY ((cache
)) hash_table
<const_int_hasher
> *const_int_htab
;
164 struct const_wide_int_hasher
: ggc_cache_hasher
<rtx
>
166 static hashval_t
hash (rtx x
);
167 static bool equal (rtx x
, rtx y
);
170 static GTY ((cache
)) hash_table
<const_wide_int_hasher
> *const_wide_int_htab
;
172 /* A hash table storing register attribute structures. */
173 struct reg_attr_hasher
: ggc_cache_hasher
<reg_attrs
*>
175 static hashval_t
hash (reg_attrs
*x
);
176 static bool equal (reg_attrs
*a
, reg_attrs
*b
);
179 static GTY ((cache
)) hash_table
<reg_attr_hasher
> *reg_attrs_htab
;
181 /* A hash table storing all CONST_DOUBLEs. */
182 struct const_double_hasher
: ggc_cache_hasher
<rtx
>
184 static hashval_t
hash (rtx x
);
185 static bool equal (rtx x
, rtx y
);
188 static GTY ((cache
)) hash_table
<const_double_hasher
> *const_double_htab
;
190 /* A hash table storing all CONST_FIXEDs. */
191 struct const_fixed_hasher
: ggc_cache_hasher
<rtx
>
193 static hashval_t
hash (rtx x
);
194 static bool equal (rtx x
, rtx y
);
197 static GTY ((cache
)) hash_table
<const_fixed_hasher
> *const_fixed_htab
;
199 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
200 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
201 #define first_label_num (crtl->emit.x_first_label_num)
203 static void set_used_decls (tree
);
204 static void mark_label_nuses (rtx
);
205 #if TARGET_SUPPORTS_WIDE_INT
206 static rtx
lookup_const_wide_int (rtx
);
208 static rtx
lookup_const_double (rtx
);
209 static rtx
lookup_const_fixed (rtx
);
210 static reg_attrs
*get_reg_attrs (tree
, int);
211 static rtx
gen_const_vector (machine_mode
, int);
212 static void copy_rtx_if_shared_1 (rtx
*orig
);
214 /* Probability of the conditional branch currently proceeded by try_split.
215 Set to -1 otherwise. */
216 int split_branch_probability
= -1;
218 /* Returns a hash code for X (which is a really a CONST_INT). */
221 const_int_hasher::hash (rtx x
)
223 return (hashval_t
) INTVAL (x
);
226 /* Returns nonzero if the value represented by X (which is really a
227 CONST_INT) is the same as that given by Y (which is really a
231 const_int_hasher::equal (rtx x
, HOST_WIDE_INT y
)
233 return (INTVAL (x
) == y
);
236 #if TARGET_SUPPORTS_WIDE_INT
237 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
240 const_wide_int_hasher::hash (rtx x
)
243 unsigned HOST_WIDE_INT hash
= 0;
246 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
247 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
249 return (hashval_t
) hash
;
252 /* Returns nonzero if the value represented by X (which is really a
253 CONST_WIDE_INT) is the same as that given by Y (which is really a
257 const_wide_int_hasher::equal (rtx x
, rtx y
)
262 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
265 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
266 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
273 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
275 const_double_hasher::hash (rtx x
)
277 const_rtx
const value
= x
;
280 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
281 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
284 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
285 /* MODE is used in the comparison, so it should be in the hash. */
286 h
^= GET_MODE (value
);
291 /* Returns nonzero if the value represented by X (really a ...)
292 is the same as that represented by Y (really a ...) */
294 const_double_hasher::equal (rtx x
, rtx y
)
296 const_rtx
const a
= x
, b
= y
;
298 if (GET_MODE (a
) != GET_MODE (b
))
300 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
301 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
302 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
304 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
305 CONST_DOUBLE_REAL_VALUE (b
));
308 /* Returns a hash code for X (which is really a CONST_FIXED). */
311 const_fixed_hasher::hash (rtx x
)
313 const_rtx
const value
= x
;
316 h
= fixed_hash (CONST_FIXED_VALUE (value
));
317 /* MODE is used in the comparison, so it should be in the hash. */
318 h
^= GET_MODE (value
);
322 /* Returns nonzero if the value represented by X is the same as that
326 const_fixed_hasher::equal (rtx x
, rtx y
)
328 const_rtx
const a
= x
, b
= y
;
330 if (GET_MODE (a
) != GET_MODE (b
))
332 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
335 /* Return true if the given memory attributes are equal. */
338 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
344 return (p
->alias
== q
->alias
345 && p
->offset_known_p
== q
->offset_known_p
346 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
347 && p
->size_known_p
== q
->size_known_p
348 && (!p
->size_known_p
|| p
->size
== q
->size
)
349 && p
->align
== q
->align
350 && p
->addrspace
== q
->addrspace
351 && (p
->expr
== q
->expr
352 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
353 && operand_equal_p (p
->expr
, q
->expr
, 0))));
356 /* Set MEM's memory attributes so that they are the same as ATTRS. */
359 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
361 /* If everything is the default, we can just clear the attributes. */
362 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
369 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
371 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
372 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
376 /* Returns a hash code for X (which is a really a reg_attrs *). */
379 reg_attr_hasher::hash (reg_attrs
*x
)
381 const reg_attrs
*const p
= x
;
383 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
386 /* Returns nonzero if the value represented by X is the same as that given by
390 reg_attr_hasher::equal (reg_attrs
*x
, reg_attrs
*y
)
392 const reg_attrs
*const p
= x
;
393 const reg_attrs
*const q
= y
;
395 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
397 /* Allocate a new reg_attrs structure and insert it into the hash table if
398 one identical to it is not already in the table. We are doing this for
402 get_reg_attrs (tree decl
, int offset
)
406 /* If everything is the default, we can just return zero. */
407 if (decl
== 0 && offset
== 0)
411 attrs
.offset
= offset
;
413 reg_attrs
**slot
= reg_attrs_htab
->find_slot (&attrs
, INSERT
);
416 *slot
= ggc_alloc
<reg_attrs
> ();
417 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
425 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
426 and to block register equivalences to be seen across this insn. */
431 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
432 MEM_VOLATILE_P (x
) = true;
438 /* Set the mode and register number of X to MODE and REGNO. */
441 set_mode_and_regno (rtx x
, machine_mode mode
, unsigned int regno
)
443 unsigned int nregs
= (HARD_REGISTER_NUM_P (regno
)
444 ? hard_regno_nregs
[regno
][mode
]
446 PUT_MODE_RAW (x
, mode
);
447 set_regno_raw (x
, regno
, nregs
);
450 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
451 don't attempt to share with the various global pieces of rtl (such as
452 frame_pointer_rtx). */
455 gen_raw_REG (machine_mode mode
, unsigned int regno
)
457 rtx x
= rtx_alloc_stat (REG PASS_MEM_STAT
);
458 set_mode_and_regno (x
, mode
, regno
);
459 REG_ATTRS (x
) = NULL
;
460 ORIGINAL_REGNO (x
) = regno
;
464 /* There are some RTL codes that require special attention; the generation
465 functions do the raw handling. If you add to this list, modify
466 special_rtx in gengenrtl.c as well. */
469 gen_rtx_EXPR_LIST (machine_mode mode
, rtx expr
, rtx expr_list
)
471 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
476 gen_rtx_INSN_LIST (machine_mode mode
, rtx insn
, rtx insn_list
)
478 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
483 gen_rtx_INSN (machine_mode mode
, rtx_insn
*prev_insn
, rtx_insn
*next_insn
,
484 basic_block bb
, rtx pattern
, int location
, int code
,
487 return as_a
<rtx_insn
*> (gen_rtx_fmt_uuBeiie (INSN
, mode
,
488 prev_insn
, next_insn
,
489 bb
, pattern
, location
, code
,
494 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
496 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
497 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
499 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
500 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
501 return const_true_rtx
;
504 /* Look up the CONST_INT in the hash table. */
505 rtx
*slot
= const_int_htab
->find_slot_with_hash (arg
, (hashval_t
) arg
,
508 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
514 gen_int_mode (HOST_WIDE_INT c
, machine_mode mode
)
516 return GEN_INT (trunc_int_for_mode (c
, mode
));
519 /* CONST_DOUBLEs might be created from pairs of integers, or from
520 REAL_VALUE_TYPEs. Also, their length is known only at run time,
521 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
523 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
524 hash table. If so, return its counterpart; otherwise add it
525 to the hash table and return it. */
527 lookup_const_double (rtx real
)
529 rtx
*slot
= const_double_htab
->find_slot (real
, INSERT
);
536 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
537 VALUE in mode MODE. */
539 const_double_from_real_value (REAL_VALUE_TYPE value
, machine_mode mode
)
541 rtx real
= rtx_alloc (CONST_DOUBLE
);
542 PUT_MODE (real
, mode
);
546 return lookup_const_double (real
);
549 /* Determine whether FIXED, a CONST_FIXED, already exists in the
550 hash table. If so, return its counterpart; otherwise add it
551 to the hash table and return it. */
554 lookup_const_fixed (rtx fixed
)
556 rtx
*slot
= const_fixed_htab
->find_slot (fixed
, INSERT
);
563 /* Return a CONST_FIXED rtx for a fixed-point value specified by
564 VALUE in mode MODE. */
567 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, machine_mode mode
)
569 rtx fixed
= rtx_alloc (CONST_FIXED
);
570 PUT_MODE (fixed
, mode
);
574 return lookup_const_fixed (fixed
);
577 #if TARGET_SUPPORTS_WIDE_INT == 0
578 /* Constructs double_int from rtx CST. */
581 rtx_to_double_int (const_rtx cst
)
585 if (CONST_INT_P (cst
))
586 r
= double_int::from_shwi (INTVAL (cst
));
587 else if (CONST_DOUBLE_AS_INT_P (cst
))
589 r
.low
= CONST_DOUBLE_LOW (cst
);
590 r
.high
= CONST_DOUBLE_HIGH (cst
);
599 #if TARGET_SUPPORTS_WIDE_INT
600 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
601 If so, return its counterpart; otherwise add it to the hash table and
605 lookup_const_wide_int (rtx wint
)
607 rtx
*slot
= const_wide_int_htab
->find_slot (wint
, INSERT
);
615 /* Return an rtx constant for V, given that the constant has mode MODE.
616 The returned rtx will be a CONST_INT if V fits, otherwise it will be
617 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
618 (if TARGET_SUPPORTS_WIDE_INT). */
621 immed_wide_int_const (const wide_int_ref
&v
, machine_mode mode
)
623 unsigned int len
= v
.get_len ();
624 unsigned int prec
= GET_MODE_PRECISION (mode
);
626 /* Allow truncation but not extension since we do not know if the
627 number is signed or unsigned. */
628 gcc_assert (prec
<= v
.get_precision ());
630 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
631 return gen_int_mode (v
.elt (0), mode
);
633 #if TARGET_SUPPORTS_WIDE_INT
637 unsigned int blocks_needed
638 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
640 if (len
> blocks_needed
)
643 value
= const_wide_int_alloc (len
);
645 /* It is so tempting to just put the mode in here. Must control
647 PUT_MODE (value
, VOIDmode
);
648 CWI_PUT_NUM_ELEM (value
, len
);
650 for (i
= 0; i
< len
; i
++)
651 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
653 return lookup_const_wide_int (value
);
656 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
660 #if TARGET_SUPPORTS_WIDE_INT == 0
661 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
662 of ints: I0 is the low-order word and I1 is the high-order word.
663 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
664 implied upper bits are copies of the high bit of i1. The value
665 itself is neither signed nor unsigned. Do not use this routine for
666 non-integer modes; convert to REAL_VALUE_TYPE and use
667 CONST_DOUBLE_FROM_REAL_VALUE. */
670 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, machine_mode mode
)
675 /* There are the following cases (note that there are no modes with
676 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
678 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
680 2) If the value of the integer fits into HOST_WIDE_INT anyway
681 (i.e., i1 consists only from copies of the sign bit, and sign
682 of i0 and i1 are the same), then we return a CONST_INT for i0.
683 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
684 if (mode
!= VOIDmode
)
686 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
687 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
688 /* We can get a 0 for an error mark. */
689 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
690 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
691 || GET_MODE_CLASS (mode
) == MODE_POINTER_BOUNDS
);
693 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
694 return gen_int_mode (i0
, mode
);
697 /* If this integer fits in one word, return a CONST_INT. */
698 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
701 /* We use VOIDmode for integers. */
702 value
= rtx_alloc (CONST_DOUBLE
);
703 PUT_MODE (value
, VOIDmode
);
705 CONST_DOUBLE_LOW (value
) = i0
;
706 CONST_DOUBLE_HIGH (value
) = i1
;
708 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
709 XWINT (value
, i
) = 0;
711 return lookup_const_double (value
);
716 gen_rtx_REG (machine_mode mode
, unsigned int regno
)
718 /* In case the MD file explicitly references the frame pointer, have
719 all such references point to the same frame pointer. This is
720 used during frame pointer elimination to distinguish the explicit
721 references to these registers from pseudos that happened to be
724 If we have eliminated the frame pointer or arg pointer, we will
725 be using it as a normal register, for example as a spill
726 register. In such cases, we might be accessing it in a mode that
727 is not Pmode and therefore cannot use the pre-allocated rtx.
729 Also don't do this when we are making new REGs in reload, since
730 we don't want to get confused with the real pointers. */
732 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
734 if (regno
== FRAME_POINTER_REGNUM
735 && (!reload_completed
|| frame_pointer_needed
))
736 return frame_pointer_rtx
;
738 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
739 && regno
== HARD_FRAME_POINTER_REGNUM
740 && (!reload_completed
|| frame_pointer_needed
))
741 return hard_frame_pointer_rtx
;
742 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
743 if (regno
== ARG_POINTER_REGNUM
)
744 return arg_pointer_rtx
;
746 #ifdef RETURN_ADDRESS_POINTER_REGNUM
747 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
748 return return_address_pointer_rtx
;
750 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
751 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
752 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
753 return pic_offset_table_rtx
;
754 if (regno
== STACK_POINTER_REGNUM
)
755 return stack_pointer_rtx
;
759 /* If the per-function register table has been set up, try to re-use
760 an existing entry in that table to avoid useless generation of RTL.
762 This code is disabled for now until we can fix the various backends
763 which depend on having non-shared hard registers in some cases. Long
764 term we want to re-enable this code as it can significantly cut down
765 on the amount of useless RTL that gets generated.
767 We'll also need to fix some code that runs after reload that wants to
768 set ORIGINAL_REGNO. */
773 && regno
< FIRST_PSEUDO_REGISTER
774 && reg_raw_mode
[regno
] == mode
)
775 return regno_reg_rtx
[regno
];
778 return gen_raw_REG (mode
, regno
);
782 gen_rtx_MEM (machine_mode mode
, rtx addr
)
784 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
786 /* This field is not cleared by the mere allocation of the rtx, so
793 /* Generate a memory referring to non-trapping constant memory. */
796 gen_const_mem (machine_mode mode
, rtx addr
)
798 rtx mem
= gen_rtx_MEM (mode
, addr
);
799 MEM_READONLY_P (mem
) = 1;
800 MEM_NOTRAP_P (mem
) = 1;
804 /* Generate a MEM referring to fixed portions of the frame, e.g., register
808 gen_frame_mem (machine_mode mode
, rtx addr
)
810 rtx mem
= gen_rtx_MEM (mode
, addr
);
811 MEM_NOTRAP_P (mem
) = 1;
812 set_mem_alias_set (mem
, get_frame_alias_set ());
816 /* Generate a MEM referring to a temporary use of the stack, not part
817 of the fixed stack frame. For example, something which is pushed
818 by a target splitter. */
820 gen_tmp_stack_mem (machine_mode mode
, rtx addr
)
822 rtx mem
= gen_rtx_MEM (mode
, addr
);
823 MEM_NOTRAP_P (mem
) = 1;
824 if (!cfun
->calls_alloca
)
825 set_mem_alias_set (mem
, get_frame_alias_set ());
829 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
830 this construct would be valid, and false otherwise. */
833 validate_subreg (machine_mode omode
, machine_mode imode
,
834 const_rtx reg
, unsigned int offset
)
836 unsigned int isize
= GET_MODE_SIZE (imode
);
837 unsigned int osize
= GET_MODE_SIZE (omode
);
839 /* All subregs must be aligned. */
840 if (offset
% osize
!= 0)
843 /* The subreg offset cannot be outside the inner object. */
847 /* ??? This should not be here. Temporarily continue to allow word_mode
848 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
849 Generally, backends are doing something sketchy but it'll take time to
851 if (omode
== word_mode
)
853 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
854 is the culprit here, and not the backends. */
855 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
857 /* Allow component subregs of complex and vector. Though given the below
858 extraction rules, it's not always clear what that means. */
859 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
860 && GET_MODE_INNER (imode
) == omode
)
862 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
863 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
864 represent this. It's questionable if this ought to be represented at
865 all -- why can't this all be hidden in post-reload splitters that make
866 arbitrarily mode changes to the registers themselves. */
867 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
869 /* Subregs involving floating point modes are not allowed to
870 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
871 (subreg:SI (reg:DF) 0) isn't. */
872 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
874 if (! (isize
== osize
875 /* LRA can use subreg to store a floating point value in
876 an integer mode. Although the floating point and the
877 integer modes need the same number of hard registers,
878 the size of floating point mode can be less than the
879 integer mode. LRA also uses subregs for a register
880 should be used in different mode in on insn. */
885 /* Paradoxical subregs must have offset zero. */
889 /* This is a normal subreg. Verify that the offset is representable. */
891 /* For hard registers, we already have most of these rules collected in
892 subreg_offset_representable_p. */
893 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
895 unsigned int regno
= REGNO (reg
);
897 #ifdef CANNOT_CHANGE_MODE_CLASS
898 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
899 && GET_MODE_INNER (imode
) == omode
)
901 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
905 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
908 /* For pseudo registers, we want most of the same checks. Namely:
909 If the register no larger than a word, the subreg must be lowpart.
910 If the register is larger than a word, the subreg must be the lowpart
911 of a subword. A subreg does *not* perform arbitrary bit extraction.
912 Given that we've already checked mode/offset alignment, we only have
913 to check subword subregs here. */
914 if (osize
< UNITS_PER_WORD
915 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
917 machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
918 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
919 if (offset
% UNITS_PER_WORD
!= low_off
)
926 gen_rtx_SUBREG (machine_mode mode
, rtx reg
, int offset
)
928 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
929 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
932 /* Generate a SUBREG representing the least-significant part of REG if MODE
933 is smaller than mode of REG, otherwise paradoxical SUBREG. */
936 gen_lowpart_SUBREG (machine_mode mode
, rtx reg
)
940 inmode
= GET_MODE (reg
);
941 if (inmode
== VOIDmode
)
943 return gen_rtx_SUBREG (mode
, reg
,
944 subreg_lowpart_offset (mode
, inmode
));
948 gen_rtx_VAR_LOCATION (machine_mode mode
, tree decl
, rtx loc
,
949 enum var_init_status status
)
951 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
952 PAT_VAR_LOCATION_STATUS (x
) = status
;
957 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
960 gen_rtvec (int n
, ...)
968 /* Don't allocate an empty rtvec... */
975 rt_val
= rtvec_alloc (n
);
977 for (i
= 0; i
< n
; i
++)
978 rt_val
->elem
[i
] = va_arg (p
, rtx
);
985 gen_rtvec_v (int n
, rtx
*argp
)
990 /* Don't allocate an empty rtvec... */
994 rt_val
= rtvec_alloc (n
);
996 for (i
= 0; i
< n
; i
++)
997 rt_val
->elem
[i
] = *argp
++;
1003 gen_rtvec_v (int n
, rtx_insn
**argp
)
1008 /* Don't allocate an empty rtvec... */
1012 rt_val
= rtvec_alloc (n
);
1014 for (i
= 0; i
< n
; i
++)
1015 rt_val
->elem
[i
] = *argp
++;
1021 /* Return the number of bytes between the start of an OUTER_MODE
1022 in-memory value and the start of an INNER_MODE in-memory value,
1023 given that the former is a lowpart of the latter. It may be a
1024 paradoxical lowpart, in which case the offset will be negative
1025 on big-endian targets. */
1028 byte_lowpart_offset (machine_mode outer_mode
,
1029 machine_mode inner_mode
)
1031 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
1032 return subreg_lowpart_offset (outer_mode
, inner_mode
);
1034 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1037 /* Generate a REG rtx for a new pseudo register of mode MODE.
1038 This pseudo is assigned the next sequential register number. */
1041 gen_reg_rtx (machine_mode mode
)
1044 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
1046 gcc_assert (can_create_pseudo_p ());
1048 /* If a virtual register with bigger mode alignment is generated,
1049 increase stack alignment estimation because it might be spilled
1051 if (SUPPORTS_STACK_ALIGNMENT
1052 && crtl
->stack_alignment_estimated
< align
1053 && !crtl
->stack_realign_processed
)
1055 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
1056 if (crtl
->stack_alignment_estimated
< min_align
)
1057 crtl
->stack_alignment_estimated
= min_align
;
1060 if (generating_concat_p
1061 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
1062 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
1064 /* For complex modes, don't make a single pseudo.
1065 Instead, make a CONCAT of two pseudos.
1066 This allows noncontiguous allocation of the real and imaginary parts,
1067 which makes much better code. Besides, allocating DCmode
1068 pseudos overstrains reload on some machines like the 386. */
1069 rtx realpart
, imagpart
;
1070 machine_mode partmode
= GET_MODE_INNER (mode
);
1072 realpart
= gen_reg_rtx (partmode
);
1073 imagpart
= gen_reg_rtx (partmode
);
1074 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1077 /* Do not call gen_reg_rtx with uninitialized crtl. */
1078 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1080 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1081 enough to have an element for this pseudo reg number. */
1083 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1085 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1089 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1090 memset (tmp
+ old_size
, 0, old_size
);
1091 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1093 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1094 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1095 regno_reg_rtx
= new1
;
1097 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1100 val
= gen_raw_REG (mode
, reg_rtx_no
);
1101 regno_reg_rtx
[reg_rtx_no
++] = val
;
1105 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1108 reg_is_parm_p (rtx reg
)
1112 gcc_assert (REG_P (reg
));
1113 decl
= REG_EXPR (reg
);
1114 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1117 /* Update NEW with the same attributes as REG, but with OFFSET added
1118 to the REG_OFFSET. */
1121 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1123 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1124 REG_OFFSET (reg
) + offset
);
1127 /* Generate a register with same attributes as REG, but with OFFSET
1128 added to the REG_OFFSET. */
1131 gen_rtx_REG_offset (rtx reg
, machine_mode mode
, unsigned int regno
,
1134 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1136 update_reg_offset (new_rtx
, reg
, offset
);
1140 /* Generate a new pseudo-register with the same attributes as REG, but
1141 with OFFSET added to the REG_OFFSET. */
1144 gen_reg_rtx_offset (rtx reg
, machine_mode mode
, int offset
)
1146 rtx new_rtx
= gen_reg_rtx (mode
);
1148 update_reg_offset (new_rtx
, reg
, offset
);
1152 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1153 new register is a (possibly paradoxical) lowpart of the old one. */
1156 adjust_reg_mode (rtx reg
, machine_mode mode
)
1158 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1159 PUT_MODE (reg
, mode
);
1162 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1163 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1166 set_reg_attrs_from_value (rtx reg
, rtx x
)
1169 bool can_be_reg_pointer
= true;
1171 /* Don't call mark_reg_pointer for incompatible pointer sign
1173 while (GET_CODE (x
) == SIGN_EXTEND
1174 || GET_CODE (x
) == ZERO_EXTEND
1175 || GET_CODE (x
) == TRUNCATE
1176 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1178 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1179 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1180 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1181 can_be_reg_pointer
= false;
1186 /* Hard registers can be reused for multiple purposes within the same
1187 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1188 on them is wrong. */
1189 if (HARD_REGISTER_P (reg
))
1192 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1195 if (MEM_OFFSET_KNOWN_P (x
))
1196 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1197 MEM_OFFSET (x
) + offset
);
1198 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1199 mark_reg_pointer (reg
, 0);
1204 update_reg_offset (reg
, x
, offset
);
1205 if (can_be_reg_pointer
&& REG_POINTER (x
))
1206 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1210 /* Generate a REG rtx for a new pseudo register, copying the mode
1211 and attributes from X. */
1214 gen_reg_rtx_and_attrs (rtx x
)
1216 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1217 set_reg_attrs_from_value (reg
, x
);
1221 /* Set the register attributes for registers contained in PARM_RTX.
1222 Use needed values from memory attributes of MEM. */
1225 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1227 if (REG_P (parm_rtx
))
1228 set_reg_attrs_from_value (parm_rtx
, mem
);
1229 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1231 /* Check for a NULL entry in the first slot, used to indicate that the
1232 parameter goes both on the stack and in registers. */
1233 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1234 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1236 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1237 if (REG_P (XEXP (x
, 0)))
1238 REG_ATTRS (XEXP (x
, 0))
1239 = get_reg_attrs (MEM_EXPR (mem
),
1240 INTVAL (XEXP (x
, 1)));
1245 /* Set the REG_ATTRS for registers in value X, given that X represents
1249 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1251 if (GET_CODE (x
) == SUBREG
)
1253 gcc_assert (subreg_lowpart_p (x
));
1258 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1260 if (GET_CODE (x
) == CONCAT
)
1262 if (REG_P (XEXP (x
, 0)))
1263 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1264 if (REG_P (XEXP (x
, 1)))
1265 REG_ATTRS (XEXP (x
, 1))
1266 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1268 if (GET_CODE (x
) == PARALLEL
)
1272 /* Check for a NULL entry, used to indicate that the parameter goes
1273 both on the stack and in registers. */
1274 if (XEXP (XVECEXP (x
, 0, 0), 0))
1279 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1281 rtx y
= XVECEXP (x
, 0, i
);
1282 if (REG_P (XEXP (y
, 0)))
1283 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1288 /* Assign the RTX X to declaration T. */
1291 set_decl_rtl (tree t
, rtx x
)
1293 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1295 set_reg_attrs_for_decl_rtl (t
, x
);
1298 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1299 if the ABI requires the parameter to be passed by reference. */
1302 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1304 DECL_INCOMING_RTL (t
) = x
;
1305 if (x
&& !by_reference_p
)
1306 set_reg_attrs_for_decl_rtl (t
, x
);
1309 /* Identify REG (which may be a CONCAT) as a user register. */
1312 mark_user_reg (rtx reg
)
1314 if (GET_CODE (reg
) == CONCAT
)
1316 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1317 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1321 gcc_assert (REG_P (reg
));
1322 REG_USERVAR_P (reg
) = 1;
1326 /* Identify REG as a probable pointer register and show its alignment
1327 as ALIGN, if nonzero. */
1330 mark_reg_pointer (rtx reg
, int align
)
1332 if (! REG_POINTER (reg
))
1334 REG_POINTER (reg
) = 1;
1337 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1339 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1340 /* We can no-longer be sure just how aligned this pointer is. */
1341 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1344 /* Return 1 plus largest pseudo reg number used in the current function. */
1352 /* Return 1 + the largest label number used so far in the current function. */
1355 max_label_num (void)
1360 /* Return first label number used in this function (if any were used). */
1363 get_first_label_num (void)
1365 return first_label_num
;
1368 /* If the rtx for label was created during the expansion of a nested
1369 function, then first_label_num won't include this label number.
1370 Fix this now so that array indices work later. */
1373 maybe_set_first_label_num (rtx x
)
1375 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1376 first_label_num
= CODE_LABEL_NUMBER (x
);
1379 /* Return a value representing some low-order bits of X, where the number
1380 of low-order bits is given by MODE. Note that no conversion is done
1381 between floating-point and fixed-point values, rather, the bit
1382 representation is returned.
1384 This function handles the cases in common between gen_lowpart, below,
1385 and two variants in cse.c and combine.c. These are the cases that can
1386 be safely handled at all points in the compilation.
1388 If this is not a case we can handle, return 0. */
1391 gen_lowpart_common (machine_mode mode
, rtx x
)
1393 int msize
= GET_MODE_SIZE (mode
);
1396 machine_mode innermode
;
1398 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1399 so we have to make one up. Yuk. */
1400 innermode
= GET_MODE (x
);
1402 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1403 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1404 else if (innermode
== VOIDmode
)
1405 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1407 xsize
= GET_MODE_SIZE (innermode
);
1409 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1411 if (innermode
== mode
)
1414 /* MODE must occupy no more words than the mode of X. */
1415 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1416 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1419 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1420 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1423 offset
= subreg_lowpart_offset (mode
, innermode
);
1425 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1426 && (GET_MODE_CLASS (mode
) == MODE_INT
1427 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1429 /* If we are getting the low-order part of something that has been
1430 sign- or zero-extended, we can either just use the object being
1431 extended or make a narrower extension. If we want an even smaller
1432 piece than the size of the object being extended, call ourselves
1435 This case is used mostly by combine and cse. */
1437 if (GET_MODE (XEXP (x
, 0)) == mode
)
1439 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1440 return gen_lowpart_common (mode
, XEXP (x
, 0));
1441 else if (msize
< xsize
)
1442 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1444 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1445 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1446 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1447 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1449 /* Otherwise, we can't do this. */
1454 gen_highpart (machine_mode mode
, rtx x
)
1456 unsigned int msize
= GET_MODE_SIZE (mode
);
1459 /* This case loses if X is a subreg. To catch bugs early,
1460 complain if an invalid MODE is used even in other cases. */
1461 gcc_assert (msize
<= UNITS_PER_WORD
1462 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1464 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1465 subreg_highpart_offset (mode
, GET_MODE (x
)));
1466 gcc_assert (result
);
1468 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1469 the target if we have a MEM. gen_highpart must return a valid operand,
1470 emitting code if necessary to do so. */
1473 result
= validize_mem (result
);
1474 gcc_assert (result
);
1480 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1481 be VOIDmode constant. */
1483 gen_highpart_mode (machine_mode outermode
, machine_mode innermode
, rtx exp
)
1485 if (GET_MODE (exp
) != VOIDmode
)
1487 gcc_assert (GET_MODE (exp
) == innermode
);
1488 return gen_highpart (outermode
, exp
);
1490 return simplify_gen_subreg (outermode
, exp
, innermode
,
1491 subreg_highpart_offset (outermode
, innermode
));
1494 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1497 subreg_lowpart_offset (machine_mode outermode
, machine_mode innermode
)
1499 unsigned int offset
= 0;
1500 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1504 if (WORDS_BIG_ENDIAN
)
1505 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1506 if (BYTES_BIG_ENDIAN
)
1507 offset
+= difference
% UNITS_PER_WORD
;
1513 /* Return offset in bytes to get OUTERMODE high part
1514 of the value in mode INNERMODE stored in memory in target format. */
1516 subreg_highpart_offset (machine_mode outermode
, machine_mode innermode
)
1518 unsigned int offset
= 0;
1519 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1521 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1525 if (! WORDS_BIG_ENDIAN
)
1526 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1527 if (! BYTES_BIG_ENDIAN
)
1528 offset
+= difference
% UNITS_PER_WORD
;
1534 /* Return 1 iff X, assumed to be a SUBREG,
1535 refers to the least significant part of its containing reg.
1536 If X is not a SUBREG, always return 1 (it is its own low part!). */
1539 subreg_lowpart_p (const_rtx x
)
1541 if (GET_CODE (x
) != SUBREG
)
1543 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1546 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1547 == SUBREG_BYTE (x
));
1550 /* Return true if X is a paradoxical subreg, false otherwise. */
1552 paradoxical_subreg_p (const_rtx x
)
1554 if (GET_CODE (x
) != SUBREG
)
1556 return (GET_MODE_PRECISION (GET_MODE (x
))
1557 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1560 /* Return subword OFFSET of operand OP.
1561 The word number, OFFSET, is interpreted as the word number starting
1562 at the low-order address. OFFSET 0 is the low-order word if not
1563 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1565 If we cannot extract the required word, we return zero. Otherwise,
1566 an rtx corresponding to the requested word will be returned.
1568 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1569 reload has completed, a valid address will always be returned. After
1570 reload, if a valid address cannot be returned, we return zero.
1572 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1573 it is the responsibility of the caller.
1575 MODE is the mode of OP in case it is a CONST_INT.
1577 ??? This is still rather broken for some cases. The problem for the
1578 moment is that all callers of this thing provide no 'goal mode' to
1579 tell us to work with. This exists because all callers were written
1580 in a word based SUBREG world.
1581 Now use of this function can be deprecated by simplify_subreg in most
1586 operand_subword (rtx op
, unsigned int offset
, int validate_address
, machine_mode mode
)
1588 if (mode
== VOIDmode
)
1589 mode
= GET_MODE (op
);
1591 gcc_assert (mode
!= VOIDmode
);
1593 /* If OP is narrower than a word, fail. */
1595 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1598 /* If we want a word outside OP, return zero. */
1600 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1603 /* Form a new MEM at the requested address. */
1606 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1608 if (! validate_address
)
1611 else if (reload_completed
)
1613 if (! strict_memory_address_addr_space_p (word_mode
,
1615 MEM_ADDR_SPACE (op
)))
1619 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1622 /* Rest can be handled by simplify_subreg. */
1623 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1626 /* Similar to `operand_subword', but never return 0. If we can't
1627 extract the required subword, put OP into a register and try again.
1628 The second attempt must succeed. We always validate the address in
1631 MODE is the mode of OP, in case it is CONST_INT. */
1634 operand_subword_force (rtx op
, unsigned int offset
, machine_mode mode
)
1636 rtx result
= operand_subword (op
, offset
, 1, mode
);
1641 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1643 /* If this is a register which can not be accessed by words, copy it
1644 to a pseudo register. */
1646 op
= copy_to_reg (op
);
1648 op
= force_reg (mode
, op
);
1651 result
= operand_subword (op
, offset
, 1, mode
);
1652 gcc_assert (result
);
1657 /* Returns 1 if both MEM_EXPR can be considered equal
1661 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1666 if (! expr1
|| ! expr2
)
1669 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1672 return operand_equal_p (expr1
, expr2
, 0);
1675 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1676 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1680 get_mem_align_offset (rtx mem
, unsigned int align
)
1683 unsigned HOST_WIDE_INT offset
;
1685 /* This function can't use
1686 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1687 || (MAX (MEM_ALIGN (mem),
1688 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1692 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1694 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1695 for <variable>. get_inner_reference doesn't handle it and
1696 even if it did, the alignment in that case needs to be determined
1697 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1698 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1699 isn't sufficiently aligned, the object it is in might be. */
1700 gcc_assert (MEM_P (mem
));
1701 expr
= MEM_EXPR (mem
);
1702 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1705 offset
= MEM_OFFSET (mem
);
1708 if (DECL_ALIGN (expr
) < align
)
1711 else if (INDIRECT_REF_P (expr
))
1713 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1716 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1720 tree inner
= TREE_OPERAND (expr
, 0);
1721 tree field
= TREE_OPERAND (expr
, 1);
1722 tree byte_offset
= component_ref_field_offset (expr
);
1723 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1726 || !tree_fits_uhwi_p (byte_offset
)
1727 || !tree_fits_uhwi_p (bit_offset
))
1730 offset
+= tree_to_uhwi (byte_offset
);
1731 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1733 if (inner
== NULL_TREE
)
1735 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1736 < (unsigned int) align
)
1740 else if (DECL_P (inner
))
1742 if (DECL_ALIGN (inner
) < align
)
1746 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1754 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1757 /* Given REF (a MEM) and T, either the type of X or the expression
1758 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1759 if we are making a new object of this type. BITPOS is nonzero if
1760 there is an offset outstanding on T that will be applied later. */
1763 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1764 HOST_WIDE_INT bitpos
)
1766 HOST_WIDE_INT apply_bitpos
= 0;
1768 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1771 /* It can happen that type_for_mode was given a mode for which there
1772 is no language-level type. In which case it returns NULL, which
1777 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1778 if (type
== error_mark_node
)
1781 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1782 wrong answer, as it assumes that DECL_RTL already has the right alias
1783 info. Callers should not set DECL_RTL until after the call to
1784 set_mem_attributes. */
1785 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1787 memset (&attrs
, 0, sizeof (attrs
));
1789 /* Get the alias set from the expression or type (perhaps using a
1790 front-end routine) and use it. */
1791 attrs
.alias
= get_alias_set (t
);
1793 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1794 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1796 /* Default values from pre-existing memory attributes if present. */
1797 refattrs
= MEM_ATTRS (ref
);
1800 /* ??? Can this ever happen? Calling this routine on a MEM that
1801 already carries memory attributes should probably be invalid. */
1802 attrs
.expr
= refattrs
->expr
;
1803 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1804 attrs
.offset
= refattrs
->offset
;
1805 attrs
.size_known_p
= refattrs
->size_known_p
;
1806 attrs
.size
= refattrs
->size
;
1807 attrs
.align
= refattrs
->align
;
1810 /* Otherwise, default values from the mode of the MEM reference. */
1813 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1814 gcc_assert (!defattrs
->expr
);
1815 gcc_assert (!defattrs
->offset_known_p
);
1817 /* Respect mode size. */
1818 attrs
.size_known_p
= defattrs
->size_known_p
;
1819 attrs
.size
= defattrs
->size
;
1820 /* ??? Is this really necessary? We probably should always get
1821 the size from the type below. */
1823 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1824 if T is an object, always compute the object alignment below. */
1826 attrs
.align
= defattrs
->align
;
1828 attrs
.align
= BITS_PER_UNIT
;
1829 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1830 e.g. if the type carries an alignment attribute. Should we be
1831 able to simply always use TYPE_ALIGN? */
1834 /* We can set the alignment from the type if we are making an object,
1835 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1836 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1837 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1839 /* If the size is known, we can set that. */
1840 tree new_size
= TYPE_SIZE_UNIT (type
);
1842 /* The address-space is that of the type. */
1843 as
= TYPE_ADDR_SPACE (type
);
1845 /* If T is not a type, we may be able to deduce some more information about
1851 if (TREE_THIS_VOLATILE (t
))
1852 MEM_VOLATILE_P (ref
) = 1;
1854 /* Now remove any conversions: they don't change what the underlying
1855 object is. Likewise for SAVE_EXPR. */
1856 while (CONVERT_EXPR_P (t
)
1857 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1858 || TREE_CODE (t
) == SAVE_EXPR
)
1859 t
= TREE_OPERAND (t
, 0);
1861 /* Note whether this expression can trap. */
1862 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1864 base
= get_base_address (t
);
1868 && TREE_READONLY (base
)
1869 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1870 && !TREE_THIS_VOLATILE (base
))
1871 MEM_READONLY_P (ref
) = 1;
1873 /* Mark static const strings readonly as well. */
1874 if (TREE_CODE (base
) == STRING_CST
1875 && TREE_READONLY (base
)
1876 && TREE_STATIC (base
))
1877 MEM_READONLY_P (ref
) = 1;
1879 /* Address-space information is on the base object. */
1880 if (TREE_CODE (base
) == MEM_REF
1881 || TREE_CODE (base
) == TARGET_MEM_REF
)
1882 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1885 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1888 /* If this expression uses it's parent's alias set, mark it such
1889 that we won't change it. */
1890 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1891 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1893 /* If this is a decl, set the attributes of the MEM from it. */
1897 attrs
.offset_known_p
= true;
1899 apply_bitpos
= bitpos
;
1900 new_size
= DECL_SIZE_UNIT (t
);
1903 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1904 else if (CONSTANT_CLASS_P (t
))
1907 /* If this is a field reference, record it. */
1908 else if (TREE_CODE (t
) == COMPONENT_REF
)
1911 attrs
.offset_known_p
= true;
1913 apply_bitpos
= bitpos
;
1914 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1915 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1918 /* If this is an array reference, look for an outer field reference. */
1919 else if (TREE_CODE (t
) == ARRAY_REF
)
1921 tree off_tree
= size_zero_node
;
1922 /* We can't modify t, because we use it at the end of the
1928 tree index
= TREE_OPERAND (t2
, 1);
1929 tree low_bound
= array_ref_low_bound (t2
);
1930 tree unit_size
= array_ref_element_size (t2
);
1932 /* We assume all arrays have sizes that are a multiple of a byte.
1933 First subtract the lower bound, if any, in the type of the
1934 index, then convert to sizetype and multiply by the size of
1935 the array element. */
1936 if (! integer_zerop (low_bound
))
1937 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1940 off_tree
= size_binop (PLUS_EXPR
,
1941 size_binop (MULT_EXPR
,
1942 fold_convert (sizetype
,
1946 t2
= TREE_OPERAND (t2
, 0);
1948 while (TREE_CODE (t2
) == ARRAY_REF
);
1951 || TREE_CODE (t2
) == COMPONENT_REF
)
1954 attrs
.offset_known_p
= false;
1955 if (tree_fits_uhwi_p (off_tree
))
1957 attrs
.offset_known_p
= true;
1958 attrs
.offset
= tree_to_uhwi (off_tree
);
1959 apply_bitpos
= bitpos
;
1962 /* Else do not record a MEM_EXPR. */
1965 /* If this is an indirect reference, record it. */
1966 else if (TREE_CODE (t
) == MEM_REF
1967 || TREE_CODE (t
) == TARGET_MEM_REF
)
1970 attrs
.offset_known_p
= true;
1972 apply_bitpos
= bitpos
;
1975 /* Compute the alignment. */
1976 unsigned int obj_align
;
1977 unsigned HOST_WIDE_INT obj_bitpos
;
1978 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1979 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1980 if (obj_bitpos
!= 0)
1981 obj_align
= (obj_bitpos
& -obj_bitpos
);
1982 attrs
.align
= MAX (attrs
.align
, obj_align
);
1985 if (tree_fits_uhwi_p (new_size
))
1987 attrs
.size_known_p
= true;
1988 attrs
.size
= tree_to_uhwi (new_size
);
1991 /* If we modified OFFSET based on T, then subtract the outstanding
1992 bit position offset. Similarly, increase the size of the accessed
1993 object to contain the negative offset. */
1996 gcc_assert (attrs
.offset_known_p
);
1997 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1998 if (attrs
.size_known_p
)
1999 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
2002 /* Now set the attributes we computed above. */
2003 attrs
.addrspace
= as
;
2004 set_mem_attrs (ref
, &attrs
);
2008 set_mem_attributes (rtx ref
, tree t
, int objectp
)
2010 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2013 /* Set the alias set of MEM to SET. */
2016 set_mem_alias_set (rtx mem
, alias_set_type set
)
2018 struct mem_attrs attrs
;
2020 /* If the new and old alias sets don't conflict, something is wrong. */
2021 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
2022 attrs
= *get_mem_attrs (mem
);
2024 set_mem_attrs (mem
, &attrs
);
2027 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2030 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
2032 struct mem_attrs attrs
;
2034 attrs
= *get_mem_attrs (mem
);
2035 attrs
.addrspace
= addrspace
;
2036 set_mem_attrs (mem
, &attrs
);
2039 /* Set the alignment of MEM to ALIGN bits. */
2042 set_mem_align (rtx mem
, unsigned int align
)
2044 struct mem_attrs attrs
;
2046 attrs
= *get_mem_attrs (mem
);
2047 attrs
.align
= align
;
2048 set_mem_attrs (mem
, &attrs
);
2051 /* Set the expr for MEM to EXPR. */
2054 set_mem_expr (rtx mem
, tree expr
)
2056 struct mem_attrs attrs
;
2058 attrs
= *get_mem_attrs (mem
);
2060 set_mem_attrs (mem
, &attrs
);
2063 /* Set the offset of MEM to OFFSET. */
2066 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2068 struct mem_attrs attrs
;
2070 attrs
= *get_mem_attrs (mem
);
2071 attrs
.offset_known_p
= true;
2072 attrs
.offset
= offset
;
2073 set_mem_attrs (mem
, &attrs
);
2076 /* Clear the offset of MEM. */
2079 clear_mem_offset (rtx mem
)
2081 struct mem_attrs attrs
;
2083 attrs
= *get_mem_attrs (mem
);
2084 attrs
.offset_known_p
= false;
2085 set_mem_attrs (mem
, &attrs
);
2088 /* Set the size of MEM to SIZE. */
2091 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2093 struct mem_attrs attrs
;
2095 attrs
= *get_mem_attrs (mem
);
2096 attrs
.size_known_p
= true;
2098 set_mem_attrs (mem
, &attrs
);
2101 /* Clear the size of MEM. */
2104 clear_mem_size (rtx mem
)
2106 struct mem_attrs attrs
;
2108 attrs
= *get_mem_attrs (mem
);
2109 attrs
.size_known_p
= false;
2110 set_mem_attrs (mem
, &attrs
);
2113 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2114 and its address changed to ADDR. (VOIDmode means don't change the mode.
2115 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2116 returned memory location is required to be valid. INPLACE is true if any
2117 changes can be made directly to MEMREF or false if MEMREF must be treated
2120 The memory attributes are not changed. */
2123 change_address_1 (rtx memref
, machine_mode mode
, rtx addr
, int validate
,
2129 gcc_assert (MEM_P (memref
));
2130 as
= MEM_ADDR_SPACE (memref
);
2131 if (mode
== VOIDmode
)
2132 mode
= GET_MODE (memref
);
2134 addr
= XEXP (memref
, 0);
2135 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2136 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2139 /* Don't validate address for LRA. LRA can make the address valid
2140 by itself in most efficient way. */
2141 if (validate
&& !lra_in_progress
)
2143 if (reload_in_progress
|| reload_completed
)
2144 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2146 addr
= memory_address_addr_space (mode
, addr
, as
);
2149 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2154 XEXP (memref
, 0) = addr
;
2158 new_rtx
= gen_rtx_MEM (mode
, addr
);
2159 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2163 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2164 way we are changing MEMREF, so we only preserve the alias set. */
2167 change_address (rtx memref
, machine_mode mode
, rtx addr
)
2169 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2170 machine_mode mmode
= GET_MODE (new_rtx
);
2171 struct mem_attrs attrs
, *defattrs
;
2173 attrs
= *get_mem_attrs (memref
);
2174 defattrs
= mode_mem_attrs
[(int) mmode
];
2175 attrs
.expr
= NULL_TREE
;
2176 attrs
.offset_known_p
= false;
2177 attrs
.size_known_p
= defattrs
->size_known_p
;
2178 attrs
.size
= defattrs
->size
;
2179 attrs
.align
= defattrs
->align
;
2181 /* If there are no changes, just return the original memory reference. */
2182 if (new_rtx
== memref
)
2184 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2187 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2188 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2191 set_mem_attrs (new_rtx
, &attrs
);
2195 /* Return a memory reference like MEMREF, but with its mode changed
2196 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2197 nonzero, the memory address is forced to be valid.
2198 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2199 and the caller is responsible for adjusting MEMREF base register.
2200 If ADJUST_OBJECT is zero, the underlying object associated with the
2201 memory reference is left unchanged and the caller is responsible for
2202 dealing with it. Otherwise, if the new memory reference is outside
2203 the underlying object, even partially, then the object is dropped.
2204 SIZE, if nonzero, is the size of an access in cases where MODE
2205 has no inherent size. */
2208 adjust_address_1 (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
,
2209 int validate
, int adjust_address
, int adjust_object
,
2212 rtx addr
= XEXP (memref
, 0);
2214 machine_mode address_mode
;
2216 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2217 unsigned HOST_WIDE_INT max_align
;
2218 #ifdef POINTERS_EXTEND_UNSIGNED
2219 machine_mode pointer_mode
2220 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2223 /* VOIDmode means no mode change for change_address_1. */
2224 if (mode
== VOIDmode
)
2225 mode
= GET_MODE (memref
);
2227 /* Take the size of non-BLKmode accesses from the mode. */
2228 defattrs
= mode_mem_attrs
[(int) mode
];
2229 if (defattrs
->size_known_p
)
2230 size
= defattrs
->size
;
2232 /* If there are no changes, just return the original memory reference. */
2233 if (mode
== GET_MODE (memref
) && !offset
2234 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2235 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2239 /* ??? Prefer to create garbage instead of creating shared rtl.
2240 This may happen even if offset is nonzero -- consider
2241 (plus (plus reg reg) const_int) -- so do this always. */
2242 addr
= copy_rtx (addr
);
2244 /* Convert a possibly large offset to a signed value within the
2245 range of the target address space. */
2246 address_mode
= get_address_mode (memref
);
2247 pbits
= GET_MODE_BITSIZE (address_mode
);
2248 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2250 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2251 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2257 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2258 object, we can merge it into the LO_SUM. */
2259 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2261 && (unsigned HOST_WIDE_INT
) offset
2262 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2263 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2264 plus_constant (address_mode
,
2265 XEXP (addr
, 1), offset
));
2266 #ifdef POINTERS_EXTEND_UNSIGNED
2267 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2268 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2269 the fact that pointers are not allowed to overflow. */
2270 else if (POINTERS_EXTEND_UNSIGNED
> 0
2271 && GET_CODE (addr
) == ZERO_EXTEND
2272 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2273 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2274 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2275 plus_constant (pointer_mode
,
2276 XEXP (addr
, 0), offset
));
2279 addr
= plus_constant (address_mode
, addr
, offset
);
2282 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2284 /* If the address is a REG, change_address_1 rightfully returns memref,
2285 but this would destroy memref's MEM_ATTRS. */
2286 if (new_rtx
== memref
&& offset
!= 0)
2287 new_rtx
= copy_rtx (new_rtx
);
2289 /* Conservatively drop the object if we don't know where we start from. */
2290 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2292 attrs
.expr
= NULL_TREE
;
2296 /* Compute the new values of the memory attributes due to this adjustment.
2297 We add the offsets and update the alignment. */
2298 if (attrs
.offset_known_p
)
2300 attrs
.offset
+= offset
;
2302 /* Drop the object if the new left end is not within its bounds. */
2303 if (adjust_object
&& attrs
.offset
< 0)
2305 attrs
.expr
= NULL_TREE
;
2310 /* Compute the new alignment by taking the MIN of the alignment and the
2311 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2315 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2316 attrs
.align
= MIN (attrs
.align
, max_align
);
2321 /* Drop the object if the new right end is not within its bounds. */
2322 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2324 attrs
.expr
= NULL_TREE
;
2327 attrs
.size_known_p
= true;
2330 else if (attrs
.size_known_p
)
2332 gcc_assert (!adjust_object
);
2333 attrs
.size
-= offset
;
2334 /* ??? The store_by_pieces machinery generates negative sizes,
2335 so don't assert for that here. */
2338 set_mem_attrs (new_rtx
, &attrs
);
2343 /* Return a memory reference like MEMREF, but with its mode changed
2344 to MODE and its address changed to ADDR, which is assumed to be
2345 MEMREF offset by OFFSET bytes. If VALIDATE is
2346 nonzero, the memory address is forced to be valid. */
2349 adjust_automodify_address_1 (rtx memref
, machine_mode mode
, rtx addr
,
2350 HOST_WIDE_INT offset
, int validate
)
2352 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2353 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2356 /* Return a memory reference like MEMREF, but whose address is changed by
2357 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2358 known to be in OFFSET (possibly 1). */
2361 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2363 rtx new_rtx
, addr
= XEXP (memref
, 0);
2364 machine_mode address_mode
;
2365 struct mem_attrs attrs
, *defattrs
;
2367 attrs
= *get_mem_attrs (memref
);
2368 address_mode
= get_address_mode (memref
);
2369 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2371 /* At this point we don't know _why_ the address is invalid. It
2372 could have secondary memory references, multiplies or anything.
2374 However, if we did go and rearrange things, we can wind up not
2375 being able to recognize the magic around pic_offset_table_rtx.
2376 This stuff is fragile, and is yet another example of why it is
2377 bad to expose PIC machinery too early. */
2378 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2380 && GET_CODE (addr
) == PLUS
2381 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2383 addr
= force_reg (GET_MODE (addr
), addr
);
2384 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2387 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2388 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2390 /* If there are no changes, just return the original memory reference. */
2391 if (new_rtx
== memref
)
2394 /* Update the alignment to reflect the offset. Reset the offset, which
2396 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2397 attrs
.offset_known_p
= false;
2398 attrs
.size_known_p
= defattrs
->size_known_p
;
2399 attrs
.size
= defattrs
->size
;
2400 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2401 set_mem_attrs (new_rtx
, &attrs
);
2405 /* Return a memory reference like MEMREF, but with its address changed to
2406 ADDR. The caller is asserting that the actual piece of memory pointed
2407 to is the same, just the form of the address is being changed, such as
2408 by putting something into a register. INPLACE is true if any changes
2409 can be made directly to MEMREF or false if MEMREF must be treated as
2413 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2415 /* change_address_1 copies the memory attribute structure without change
2416 and that's exactly what we want here. */
2417 update_temp_slot_address (XEXP (memref
, 0), addr
);
2418 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2421 /* Likewise, but the reference is not required to be valid. */
2424 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2426 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2429 /* Return a memory reference like MEMREF, but with its mode widened to
2430 MODE and offset by OFFSET. This would be used by targets that e.g.
2431 cannot issue QImode memory operations and have to use SImode memory
2432 operations plus masking logic. */
2435 widen_memory_access (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
)
2437 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2438 struct mem_attrs attrs
;
2439 unsigned int size
= GET_MODE_SIZE (mode
);
2441 /* If there are no changes, just return the original memory reference. */
2442 if (new_rtx
== memref
)
2445 attrs
= *get_mem_attrs (new_rtx
);
2447 /* If we don't know what offset we were at within the expression, then
2448 we can't know if we've overstepped the bounds. */
2449 if (! attrs
.offset_known_p
)
2450 attrs
.expr
= NULL_TREE
;
2454 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2456 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2457 tree offset
= component_ref_field_offset (attrs
.expr
);
2459 if (! DECL_SIZE_UNIT (field
))
2461 attrs
.expr
= NULL_TREE
;
2465 /* Is the field at least as large as the access? If so, ok,
2466 otherwise strip back to the containing structure. */
2467 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2468 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2469 && attrs
.offset
>= 0)
2472 if (! tree_fits_uhwi_p (offset
))
2474 attrs
.expr
= NULL_TREE
;
2478 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2479 attrs
.offset
+= tree_to_uhwi (offset
);
2480 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2483 /* Similarly for the decl. */
2484 else if (DECL_P (attrs
.expr
)
2485 && DECL_SIZE_UNIT (attrs
.expr
)
2486 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2487 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2488 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2492 /* The widened memory access overflows the expression, which means
2493 that it could alias another expression. Zap it. */
2494 attrs
.expr
= NULL_TREE
;
2500 attrs
.offset_known_p
= false;
2502 /* The widened memory may alias other stuff, so zap the alias set. */
2503 /* ??? Maybe use get_alias_set on any remaining expression. */
2505 attrs
.size_known_p
= true;
2507 set_mem_attrs (new_rtx
, &attrs
);
2511 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2512 static GTY(()) tree spill_slot_decl
;
2515 get_spill_slot_decl (bool force_build_p
)
2517 tree d
= spill_slot_decl
;
2519 struct mem_attrs attrs
;
2521 if (d
|| !force_build_p
)
2524 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2525 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2526 DECL_ARTIFICIAL (d
) = 1;
2527 DECL_IGNORED_P (d
) = 1;
2529 spill_slot_decl
= d
;
2531 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2532 MEM_NOTRAP_P (rd
) = 1;
2533 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2534 attrs
.alias
= new_alias_set ();
2536 set_mem_attrs (rd
, &attrs
);
2537 SET_DECL_RTL (d
, rd
);
2542 /* Given MEM, a result from assign_stack_local, fill in the memory
2543 attributes as appropriate for a register allocator spill slot.
2544 These slots are not aliasable by other memory. We arrange for
2545 them all to use a single MEM_EXPR, so that the aliasing code can
2546 work properly in the case of shared spill slots. */
2549 set_mem_attrs_for_spill (rtx mem
)
2551 struct mem_attrs attrs
;
2554 attrs
= *get_mem_attrs (mem
);
2555 attrs
.expr
= get_spill_slot_decl (true);
2556 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2557 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2559 /* We expect the incoming memory to be of the form:
2560 (mem:MODE (plus (reg sfp) (const_int offset)))
2561 with perhaps the plus missing for offset = 0. */
2562 addr
= XEXP (mem
, 0);
2563 attrs
.offset_known_p
= true;
2565 if (GET_CODE (addr
) == PLUS
2566 && CONST_INT_P (XEXP (addr
, 1)))
2567 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2569 set_mem_attrs (mem
, &attrs
);
2570 MEM_NOTRAP_P (mem
) = 1;
2573 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2576 gen_label_rtx (void)
2578 return as_a
<rtx_code_label
*> (
2579 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2580 NULL
, label_num
++, NULL
));
2583 /* For procedure integration. */
2585 /* Install new pointers to the first and last insns in the chain.
2586 Also, set cur_insn_uid to one higher than the last in use.
2587 Used for an inline-procedure after copying the insn chain. */
2590 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2594 set_first_insn (first
);
2595 set_last_insn (last
);
2598 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2600 int debug_count
= 0;
2602 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2603 cur_debug_insn_uid
= 0;
2605 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2606 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2607 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2610 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2611 if (DEBUG_INSN_P (insn
))
2616 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2618 cur_debug_insn_uid
++;
2621 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2622 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2627 /* Go through all the RTL insn bodies and copy any invalid shared
2628 structure. This routine should only be called once. */
2631 unshare_all_rtl_1 (rtx_insn
*insn
)
2633 /* Unshare just about everything else. */
2634 unshare_all_rtl_in_chain (insn
);
2636 /* Make sure the addresses of stack slots found outside the insn chain
2637 (such as, in DECL_RTL of a variable) are not shared
2638 with the insn chain.
2640 This special care is necessary when the stack slot MEM does not
2641 actually appear in the insn chain. If it does appear, its address
2642 is unshared from all else at that point. */
2643 stack_slot_list
= safe_as_a
<rtx_expr_list
*> (
2644 copy_rtx_if_shared (stack_slot_list
));
2647 /* Go through all the RTL insn bodies and copy any invalid shared
2648 structure, again. This is a fairly expensive thing to do so it
2649 should be done sparingly. */
2652 unshare_all_rtl_again (rtx_insn
*insn
)
2657 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2660 reset_used_flags (PATTERN (p
));
2661 reset_used_flags (REG_NOTES (p
));
2663 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2666 /* Make sure that virtual stack slots are not shared. */
2667 set_used_decls (DECL_INITIAL (cfun
->decl
));
2669 /* Make sure that virtual parameters are not shared. */
2670 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2671 set_used_flags (DECL_RTL (decl
));
2673 reset_used_flags (stack_slot_list
);
2675 unshare_all_rtl_1 (insn
);
2679 unshare_all_rtl (void)
2681 unshare_all_rtl_1 (get_insns ());
2686 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2687 Recursively does the same for subexpressions. */
2690 verify_rtx_sharing (rtx orig
, rtx insn
)
2695 const char *format_ptr
;
2700 code
= GET_CODE (x
);
2702 /* These types may be freely shared. */
2718 /* SCRATCH must be shared because they represent distinct values. */
2721 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2722 clobbers or clobbers of hard registers that originated as pseudos.
2723 This is needed to allow safe register renaming. */
2724 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2725 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2730 if (shared_const_p (orig
))
2735 /* A MEM is allowed to be shared if its address is constant. */
2736 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2737 || reload_completed
|| reload_in_progress
)
2746 /* This rtx may not be shared. If it has already been seen,
2747 replace it with a copy of itself. */
2748 #ifdef ENABLE_CHECKING
2749 if (RTX_FLAG (x
, used
))
2751 error ("invalid rtl sharing found in the insn");
2753 error ("shared rtx");
2755 internal_error ("internal consistency failure");
2758 gcc_assert (!RTX_FLAG (x
, used
));
2760 RTX_FLAG (x
, used
) = 1;
2762 /* Now scan the subexpressions recursively. */
2764 format_ptr
= GET_RTX_FORMAT (code
);
2766 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2768 switch (*format_ptr
++)
2771 verify_rtx_sharing (XEXP (x
, i
), insn
);
2775 if (XVEC (x
, i
) != NULL
)
2778 int len
= XVECLEN (x
, i
);
2780 for (j
= 0; j
< len
; j
++)
2782 /* We allow sharing of ASM_OPERANDS inside single
2784 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2785 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2787 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2789 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2798 /* Reset used-flags for INSN. */
2801 reset_insn_used_flags (rtx insn
)
2803 gcc_assert (INSN_P (insn
));
2804 reset_used_flags (PATTERN (insn
));
2805 reset_used_flags (REG_NOTES (insn
));
2807 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2810 /* Go through all the RTL insn bodies and clear all the USED bits. */
2813 reset_all_used_flags (void)
2817 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2820 rtx pat
= PATTERN (p
);
2821 if (GET_CODE (pat
) != SEQUENCE
)
2822 reset_insn_used_flags (p
);
2825 gcc_assert (REG_NOTES (p
) == NULL
);
2826 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2828 rtx insn
= XVECEXP (pat
, 0, i
);
2830 reset_insn_used_flags (insn
);
2836 /* Verify sharing in INSN. */
2839 verify_insn_sharing (rtx insn
)
2841 gcc_assert (INSN_P (insn
));
2842 reset_used_flags (PATTERN (insn
));
2843 reset_used_flags (REG_NOTES (insn
));
2845 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2848 /* Go through all the RTL insn bodies and check that there is no unexpected
2849 sharing in between the subexpressions. */
2852 verify_rtl_sharing (void)
2856 timevar_push (TV_VERIFY_RTL_SHARING
);
2858 reset_all_used_flags ();
2860 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2863 rtx pat
= PATTERN (p
);
2864 if (GET_CODE (pat
) != SEQUENCE
)
2865 verify_insn_sharing (p
);
2867 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2869 rtx insn
= XVECEXP (pat
, 0, i
);
2871 verify_insn_sharing (insn
);
2875 reset_all_used_flags ();
2877 timevar_pop (TV_VERIFY_RTL_SHARING
);
2880 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2881 Assumes the mark bits are cleared at entry. */
2884 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2886 for (; insn
; insn
= NEXT_INSN (insn
))
2889 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2890 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2892 CALL_INSN_FUNCTION_USAGE (insn
)
2893 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2897 /* Go through all virtual stack slots of a function and mark them as
2898 shared. We never replace the DECL_RTLs themselves with a copy,
2899 but expressions mentioned into a DECL_RTL cannot be shared with
2900 expressions in the instruction stream.
2902 Note that reload may convert pseudo registers into memories in-place.
2903 Pseudo registers are always shared, but MEMs never are. Thus if we
2904 reset the used flags on MEMs in the instruction stream, we must set
2905 them again on MEMs that appear in DECL_RTLs. */
2908 set_used_decls (tree blk
)
2913 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2914 if (DECL_RTL_SET_P (t
))
2915 set_used_flags (DECL_RTL (t
));
2917 /* Now process sub-blocks. */
2918 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2922 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2923 Recursively does the same for subexpressions. Uses
2924 copy_rtx_if_shared_1 to reduce stack space. */
2927 copy_rtx_if_shared (rtx orig
)
2929 copy_rtx_if_shared_1 (&orig
);
2933 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2934 use. Recursively does the same for subexpressions. */
2937 copy_rtx_if_shared_1 (rtx
*orig1
)
2943 const char *format_ptr
;
2947 /* Repeat is used to turn tail-recursion into iteration. */
2954 code
= GET_CODE (x
);
2956 /* These types may be freely shared. */
2972 /* SCRATCH must be shared because they represent distinct values. */
2975 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2976 clobbers or clobbers of hard registers that originated as pseudos.
2977 This is needed to allow safe register renaming. */
2978 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2979 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2984 if (shared_const_p (x
))
2994 /* The chain of insns is not being copied. */
3001 /* This rtx may not be shared. If it has already been seen,
3002 replace it with a copy of itself. */
3004 if (RTX_FLAG (x
, used
))
3006 x
= shallow_copy_rtx (x
);
3009 RTX_FLAG (x
, used
) = 1;
3011 /* Now scan the subexpressions recursively.
3012 We can store any replaced subexpressions directly into X
3013 since we know X is not shared! Any vectors in X
3014 must be copied if X was copied. */
3016 format_ptr
= GET_RTX_FORMAT (code
);
3017 length
= GET_RTX_LENGTH (code
);
3020 for (i
= 0; i
< length
; i
++)
3022 switch (*format_ptr
++)
3026 copy_rtx_if_shared_1 (last_ptr
);
3027 last_ptr
= &XEXP (x
, i
);
3031 if (XVEC (x
, i
) != NULL
)
3034 int len
= XVECLEN (x
, i
);
3036 /* Copy the vector iff I copied the rtx and the length
3038 if (copied
&& len
> 0)
3039 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
3041 /* Call recursively on all inside the vector. */
3042 for (j
= 0; j
< len
; j
++)
3045 copy_rtx_if_shared_1 (last_ptr
);
3046 last_ptr
= &XVECEXP (x
, i
, j
);
3061 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3064 mark_used_flags (rtx x
, int flag
)
3068 const char *format_ptr
;
3071 /* Repeat is used to turn tail-recursion into iteration. */
3076 code
= GET_CODE (x
);
3078 /* These types may be freely shared so we needn't do any resetting
3102 /* The chain of insns is not being copied. */
3109 RTX_FLAG (x
, used
) = flag
;
3111 format_ptr
= GET_RTX_FORMAT (code
);
3112 length
= GET_RTX_LENGTH (code
);
3114 for (i
= 0; i
< length
; i
++)
3116 switch (*format_ptr
++)
3124 mark_used_flags (XEXP (x
, i
), flag
);
3128 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3129 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3135 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3136 to look for shared sub-parts. */
3139 reset_used_flags (rtx x
)
3141 mark_used_flags (x
, 0);
3144 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3145 to look for shared sub-parts. */
3148 set_used_flags (rtx x
)
3150 mark_used_flags (x
, 1);
3153 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3154 Return X or the rtx for the pseudo reg the value of X was copied into.
3155 OTHER must be valid as a SET_DEST. */
3158 make_safe_from (rtx x
, rtx other
)
3161 switch (GET_CODE (other
))
3164 other
= SUBREG_REG (other
);
3166 case STRICT_LOW_PART
:
3169 other
= XEXP (other
, 0);
3178 && GET_CODE (x
) != SUBREG
)
3180 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3181 || reg_mentioned_p (other
, x
))))
3183 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3184 emit_move_insn (temp
, x
);
3190 /* Emission of insns (adding them to the doubly-linked list). */
3192 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3195 get_last_insn_anywhere (void)
3197 struct sequence_stack
*seq
;
3198 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
3204 /* Return the first nonnote insn emitted in current sequence or current
3205 function. This routine looks inside SEQUENCEs. */
3208 get_first_nonnote_insn (void)
3210 rtx_insn
*insn
= get_insns ();
3215 for (insn
= next_insn (insn
);
3216 insn
&& NOTE_P (insn
);
3217 insn
= next_insn (insn
))
3221 if (NONJUMP_INSN_P (insn
)
3222 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3223 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3230 /* Return the last nonnote insn emitted in current sequence or current
3231 function. This routine looks inside SEQUENCEs. */
3234 get_last_nonnote_insn (void)
3236 rtx_insn
*insn
= get_last_insn ();
3241 for (insn
= previous_insn (insn
);
3242 insn
&& NOTE_P (insn
);
3243 insn
= previous_insn (insn
))
3247 if (NONJUMP_INSN_P (insn
))
3248 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3249 insn
= seq
->insn (seq
->len () - 1);
3256 /* Return the number of actual (non-debug) insns emitted in this
3260 get_max_insn_count (void)
3262 int n
= cur_insn_uid
;
3264 /* The table size must be stable across -g, to avoid codegen
3265 differences due to debug insns, and not be affected by
3266 -fmin-insn-uid, to avoid excessive table size and to simplify
3267 debugging of -fcompare-debug failures. */
3268 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3269 n
-= cur_debug_insn_uid
;
3271 n
-= MIN_NONDEBUG_INSN_UID
;
3277 /* Return the next insn. If it is a SEQUENCE, return the first insn
3281 next_insn (rtx_insn
*insn
)
3285 insn
= NEXT_INSN (insn
);
3286 if (insn
&& NONJUMP_INSN_P (insn
)
3287 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3288 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3294 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3298 previous_insn (rtx_insn
*insn
)
3302 insn
= PREV_INSN (insn
);
3303 if (insn
&& NONJUMP_INSN_P (insn
))
3304 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3305 insn
= seq
->insn (seq
->len () - 1);
3311 /* Return the next insn after INSN that is not a NOTE. This routine does not
3312 look inside SEQUENCEs. */
3315 next_nonnote_insn (rtx uncast_insn
)
3317 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3320 insn
= NEXT_INSN (insn
);
3321 if (insn
== 0 || !NOTE_P (insn
))
3328 /* Return the next insn after INSN that is not a NOTE, but stop the
3329 search before we enter another basic block. This routine does not
3330 look inside SEQUENCEs. */
3333 next_nonnote_insn_bb (rtx_insn
*insn
)
3337 insn
= NEXT_INSN (insn
);
3338 if (insn
== 0 || !NOTE_P (insn
))
3340 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3347 /* Return the previous insn before INSN that is not a NOTE. This routine does
3348 not look inside SEQUENCEs. */
3351 prev_nonnote_insn (rtx uncast_insn
)
3353 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3357 insn
= PREV_INSN (insn
);
3358 if (insn
== 0 || !NOTE_P (insn
))
3365 /* Return the previous insn before INSN that is not a NOTE, but stop
3366 the search before we enter another basic block. This routine does
3367 not look inside SEQUENCEs. */
3370 prev_nonnote_insn_bb (rtx uncast_insn
)
3372 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3376 insn
= PREV_INSN (insn
);
3377 if (insn
== 0 || !NOTE_P (insn
))
3379 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3386 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3387 routine does not look inside SEQUENCEs. */
3390 next_nondebug_insn (rtx uncast_insn
)
3392 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3396 insn
= NEXT_INSN (insn
);
3397 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3404 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3405 This routine does not look inside SEQUENCEs. */
3408 prev_nondebug_insn (rtx uncast_insn
)
3410 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3414 insn
= PREV_INSN (insn
);
3415 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3422 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3423 This routine does not look inside SEQUENCEs. */
3426 next_nonnote_nondebug_insn (rtx uncast_insn
)
3428 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3432 insn
= NEXT_INSN (insn
);
3433 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3440 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3441 This routine does not look inside SEQUENCEs. */
3444 prev_nonnote_nondebug_insn (rtx uncast_insn
)
3446 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3450 insn
= PREV_INSN (insn
);
3451 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3458 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3459 or 0, if there is none. This routine does not look inside
3463 next_real_insn (rtx uncast_insn
)
3465 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3469 insn
= NEXT_INSN (insn
);
3470 if (insn
== 0 || INSN_P (insn
))
3477 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3478 or 0, if there is none. This routine does not look inside
3482 prev_real_insn (rtx uncast_insn
)
3484 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3488 insn
= PREV_INSN (insn
);
3489 if (insn
== 0 || INSN_P (insn
))
3496 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3497 This routine does not look inside SEQUENCEs. */
3500 last_call_insn (void)
3504 for (insn
= get_last_insn ();
3505 insn
&& !CALL_P (insn
);
3506 insn
= PREV_INSN (insn
))
3509 return safe_as_a
<rtx_call_insn
*> (insn
);
3512 /* Find the next insn after INSN that really does something. This routine
3513 does not look inside SEQUENCEs. After reload this also skips over
3514 standalone USE and CLOBBER insn. */
3517 active_insn_p (const_rtx insn
)
3519 return (CALL_P (insn
) || JUMP_P (insn
)
3520 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3521 || (NONJUMP_INSN_P (insn
)
3522 && (! reload_completed
3523 || (GET_CODE (PATTERN (insn
)) != USE
3524 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3528 next_active_insn (rtx uncast_insn
)
3530 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3534 insn
= NEXT_INSN (insn
);
3535 if (insn
== 0 || active_insn_p (insn
))
3542 /* Find the last insn before INSN that really does something. This routine
3543 does not look inside SEQUENCEs. After reload this also skips over
3544 standalone USE and CLOBBER insn. */
3547 prev_active_insn (rtx uncast_insn
)
3549 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3553 insn
= PREV_INSN (insn
);
3554 if (insn
== 0 || active_insn_p (insn
))
3561 /* Return the next insn that uses CC0 after INSN, which is assumed to
3562 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3563 applied to the result of this function should yield INSN).
3565 Normally, this is simply the next insn. However, if a REG_CC_USER note
3566 is present, it contains the insn that uses CC0.
3568 Return 0 if we can't find the insn. */
3571 next_cc0_user (rtx uncast_insn
)
3573 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3575 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3578 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3580 insn
= next_nonnote_insn (insn
);
3581 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3582 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3584 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3590 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3591 note, it is the previous insn. */
3594 prev_cc0_setter (rtx_insn
*insn
)
3596 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3599 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3601 insn
= prev_nonnote_insn (insn
);
3602 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3608 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3611 find_auto_inc (const_rtx x
, const_rtx reg
)
3613 subrtx_iterator::array_type array
;
3614 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3616 const_rtx x
= *iter
;
3617 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3618 && rtx_equal_p (reg
, XEXP (x
, 0)))
3625 /* Increment the label uses for all labels present in rtx. */
3628 mark_label_nuses (rtx x
)
3634 code
= GET_CODE (x
);
3635 if (code
== LABEL_REF
&& LABEL_P (LABEL_REF_LABEL (x
)))
3636 LABEL_NUSES (LABEL_REF_LABEL (x
))++;
3638 fmt
= GET_RTX_FORMAT (code
);
3639 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3642 mark_label_nuses (XEXP (x
, i
));
3643 else if (fmt
[i
] == 'E')
3644 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3645 mark_label_nuses (XVECEXP (x
, i
, j
));
3650 /* Try splitting insns that can be split for better scheduling.
3651 PAT is the pattern which might split.
3652 TRIAL is the insn providing PAT.
3653 LAST is nonzero if we should return the last insn of the sequence produced.
3655 If this routine succeeds in splitting, it returns the first or last
3656 replacement insn depending on the value of LAST. Otherwise, it
3657 returns TRIAL. If the insn to be returned can be split, it will be. */
3660 try_split (rtx pat
, rtx uncast_trial
, int last
)
3662 rtx_insn
*trial
= as_a
<rtx_insn
*> (uncast_trial
);
3663 rtx_insn
*before
= PREV_INSN (trial
);
3664 rtx_insn
*after
= NEXT_INSN (trial
);
3666 rtx_insn
*seq
, *tem
;
3668 rtx_insn
*insn_last
, *insn
;
3670 rtx call_insn
= NULL_RTX
;
3672 /* We're not good at redistributing frame information. */
3673 if (RTX_FRAME_RELATED_P (trial
))
3676 if (any_condjump_p (trial
)
3677 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3678 split_branch_probability
= XINT (note
, 0);
3679 probability
= split_branch_probability
;
3681 seq
= safe_as_a
<rtx_insn
*> (split_insns (pat
, trial
));
3683 split_branch_probability
= -1;
3688 /* Avoid infinite loop if any insn of the result matches
3689 the original pattern. */
3693 if (INSN_P (insn_last
)
3694 && rtx_equal_p (PATTERN (insn_last
), pat
))
3696 if (!NEXT_INSN (insn_last
))
3698 insn_last
= NEXT_INSN (insn_last
);
3701 /* We will be adding the new sequence to the function. The splitters
3702 may have introduced invalid RTL sharing, so unshare the sequence now. */
3703 unshare_all_rtl_in_chain (seq
);
3705 /* Mark labels and copy flags. */
3706 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3711 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3712 mark_jump_label (PATTERN (insn
), insn
, 0);
3714 if (probability
!= -1
3715 && any_condjump_p (insn
)
3716 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3718 /* We can preserve the REG_BR_PROB notes only if exactly
3719 one jump is created, otherwise the machine description
3720 is responsible for this step using
3721 split_branch_probability variable. */
3722 gcc_assert (njumps
== 1);
3723 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3728 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3729 in SEQ and copy any additional information across. */
3732 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3738 gcc_assert (call_insn
== NULL_RTX
);
3741 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3742 target may have explicitly specified. */
3743 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3746 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3748 /* If the old call was a sibling call, the new one must
3750 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3752 /* If the new call is the last instruction in the sequence,
3753 it will effectively replace the old call in-situ. Otherwise
3754 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3755 so that it comes immediately after the new call. */
3756 if (NEXT_INSN (insn
))
3757 for (next
= NEXT_INSN (trial
);
3758 next
&& NOTE_P (next
);
3759 next
= NEXT_INSN (next
))
3760 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3763 add_insn_after (next
, insn
, NULL
);
3769 /* Copy notes, particularly those related to the CFG. */
3770 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3772 switch (REG_NOTE_KIND (note
))
3775 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3781 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3784 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3788 case REG_NON_LOCAL_GOTO
:
3789 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3792 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3798 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3800 rtx reg
= XEXP (note
, 0);
3801 if (!FIND_REG_INC_NOTE (insn
, reg
)
3802 && find_auto_inc (PATTERN (insn
), reg
))
3803 add_reg_note (insn
, REG_INC
, reg
);
3809 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3813 gcc_assert (call_insn
!= NULL_RTX
);
3814 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3822 /* If there are LABELS inside the split insns increment the
3823 usage count so we don't delete the label. */
3827 while (insn
!= NULL_RTX
)
3829 /* JUMP_P insns have already been "marked" above. */
3830 if (NONJUMP_INSN_P (insn
))
3831 mark_label_nuses (PATTERN (insn
));
3833 insn
= PREV_INSN (insn
);
3837 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3839 delete_insn (trial
);
3841 /* Recursively call try_split for each new insn created; by the
3842 time control returns here that insn will be fully split, so
3843 set LAST and continue from the insn after the one returned.
3844 We can't use next_active_insn here since AFTER may be a note.
3845 Ignore deleted insns, which can be occur if not optimizing. */
3846 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3847 if (! tem
->deleted () && INSN_P (tem
))
3848 tem
= try_split (PATTERN (tem
), tem
, 1);
3850 /* Return either the first or the last insn, depending on which was
3853 ? (after
? PREV_INSN (after
) : get_last_insn ())
3854 : NEXT_INSN (before
);
3857 /* Make and return an INSN rtx, initializing all its slots.
3858 Store PATTERN in the pattern slots. */
3861 make_insn_raw (rtx pattern
)
3865 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3867 INSN_UID (insn
) = cur_insn_uid
++;
3868 PATTERN (insn
) = pattern
;
3869 INSN_CODE (insn
) = -1;
3870 REG_NOTES (insn
) = NULL
;
3871 INSN_LOCATION (insn
) = curr_insn_location ();
3872 BLOCK_FOR_INSN (insn
) = NULL
;
3874 #ifdef ENABLE_RTL_CHECKING
3877 && (returnjump_p (insn
)
3878 || (GET_CODE (insn
) == SET
3879 && SET_DEST (insn
) == pc_rtx
)))
3881 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3889 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3892 make_debug_insn_raw (rtx pattern
)
3894 rtx_debug_insn
*insn
;
3896 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3897 INSN_UID (insn
) = cur_debug_insn_uid
++;
3898 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3899 INSN_UID (insn
) = cur_insn_uid
++;
3901 PATTERN (insn
) = pattern
;
3902 INSN_CODE (insn
) = -1;
3903 REG_NOTES (insn
) = NULL
;
3904 INSN_LOCATION (insn
) = curr_insn_location ();
3905 BLOCK_FOR_INSN (insn
) = NULL
;
3910 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3913 make_jump_insn_raw (rtx pattern
)
3915 rtx_jump_insn
*insn
;
3917 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3918 INSN_UID (insn
) = cur_insn_uid
++;
3920 PATTERN (insn
) = pattern
;
3921 INSN_CODE (insn
) = -1;
3922 REG_NOTES (insn
) = NULL
;
3923 JUMP_LABEL (insn
) = NULL
;
3924 INSN_LOCATION (insn
) = curr_insn_location ();
3925 BLOCK_FOR_INSN (insn
) = NULL
;
3930 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3933 make_call_insn_raw (rtx pattern
)
3935 rtx_call_insn
*insn
;
3937 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3938 INSN_UID (insn
) = cur_insn_uid
++;
3940 PATTERN (insn
) = pattern
;
3941 INSN_CODE (insn
) = -1;
3942 REG_NOTES (insn
) = NULL
;
3943 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3944 INSN_LOCATION (insn
) = curr_insn_location ();
3945 BLOCK_FOR_INSN (insn
) = NULL
;
3950 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3953 make_note_raw (enum insn_note subtype
)
3955 /* Some notes are never created this way at all. These notes are
3956 only created by patching out insns. */
3957 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3958 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3960 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3961 INSN_UID (note
) = cur_insn_uid
++;
3962 NOTE_KIND (note
) = subtype
;
3963 BLOCK_FOR_INSN (note
) = NULL
;
3964 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3968 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3969 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3970 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3973 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3975 SET_PREV_INSN (insn
) = prev
;
3976 SET_NEXT_INSN (insn
) = next
;
3979 SET_NEXT_INSN (prev
) = insn
;
3980 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3982 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3983 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
3988 SET_PREV_INSN (next
) = insn
;
3989 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3991 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
3992 SET_PREV_INSN (sequence
->insn (0)) = insn
;
3996 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3998 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3999 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4000 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4004 /* Add INSN to the end of the doubly-linked list.
4005 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4008 add_insn (rtx_insn
*insn
)
4010 rtx_insn
*prev
= get_last_insn ();
4011 link_insn_into_chain (insn
, prev
, NULL
);
4012 if (NULL
== get_insns ())
4013 set_first_insn (insn
);
4014 set_last_insn (insn
);
4017 /* Add INSN into the doubly-linked list after insn AFTER. */
4020 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
4022 rtx_insn
*next
= NEXT_INSN (after
);
4024 gcc_assert (!optimize
|| !after
->deleted ());
4026 link_insn_into_chain (insn
, after
, next
);
4030 struct sequence_stack
*seq
;
4032 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4033 if (after
== seq
->last
)
4041 /* Add INSN into the doubly-linked list before insn BEFORE. */
4044 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4046 rtx_insn
*prev
= PREV_INSN (before
);
4048 gcc_assert (!optimize
|| !before
->deleted ());
4050 link_insn_into_chain (insn
, prev
, before
);
4054 struct sequence_stack
*seq
;
4056 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4057 if (before
== seq
->first
)
4067 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4068 If BB is NULL, an attempt is made to infer the bb from before.
4070 This and the next function should be the only functions called
4071 to insert an insn once delay slots have been filled since only
4072 they know how to update a SEQUENCE. */
4075 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4077 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4078 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4079 add_insn_after_nobb (insn
, after
);
4080 if (!BARRIER_P (after
)
4081 && !BARRIER_P (insn
)
4082 && (bb
= BLOCK_FOR_INSN (after
)))
4084 set_block_for_insn (insn
, bb
);
4086 df_insn_rescan (insn
);
4087 /* Should not happen as first in the BB is always
4088 either NOTE or LABEL. */
4089 if (BB_END (bb
) == after
4090 /* Avoid clobbering of structure when creating new BB. */
4091 && !BARRIER_P (insn
)
4092 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4097 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4098 If BB is NULL, an attempt is made to infer the bb from before.
4100 This and the previous function should be the only functions called
4101 to insert an insn once delay slots have been filled since only
4102 they know how to update a SEQUENCE. */
4105 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4107 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4108 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4109 add_insn_before_nobb (insn
, before
);
4112 && !BARRIER_P (before
)
4113 && !BARRIER_P (insn
))
4114 bb
= BLOCK_FOR_INSN (before
);
4118 set_block_for_insn (insn
, bb
);
4120 df_insn_rescan (insn
);
4121 /* Should not happen as first in the BB is always either NOTE or
4123 gcc_assert (BB_HEAD (bb
) != insn
4124 /* Avoid clobbering of structure when creating new BB. */
4126 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4130 /* Replace insn with an deleted instruction note. */
4133 set_insn_deleted (rtx insn
)
4136 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4137 PUT_CODE (insn
, NOTE
);
4138 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4142 /* Unlink INSN from the insn chain.
4144 This function knows how to handle sequences.
4146 This function does not invalidate data flow information associated with
4147 INSN (i.e. does not call df_insn_delete). That makes this function
4148 usable for only disconnecting an insn from the chain, and re-emit it
4151 To later insert INSN elsewhere in the insn chain via add_insn and
4152 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4153 the caller. Nullifying them here breaks many insn chain walks.
4155 To really delete an insn and related DF information, use delete_insn. */
4158 remove_insn (rtx uncast_insn
)
4160 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4161 rtx_insn
*next
= NEXT_INSN (insn
);
4162 rtx_insn
*prev
= PREV_INSN (insn
);
4167 SET_NEXT_INSN (prev
) = next
;
4168 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4170 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4171 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4176 struct sequence_stack
*seq
;
4178 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4179 if (insn
== seq
->first
)
4190 SET_PREV_INSN (next
) = prev
;
4191 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4193 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4194 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4199 struct sequence_stack
*seq
;
4201 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4202 if (insn
== seq
->last
)
4211 /* Fix up basic block boundaries, if necessary. */
4212 if (!BARRIER_P (insn
)
4213 && (bb
= BLOCK_FOR_INSN (insn
)))
4215 if (BB_HEAD (bb
) == insn
)
4217 /* Never ever delete the basic block note without deleting whole
4219 gcc_assert (!NOTE_P (insn
));
4220 BB_HEAD (bb
) = next
;
4222 if (BB_END (bb
) == insn
)
4227 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4230 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4232 gcc_assert (call_insn
&& CALL_P (call_insn
));
4234 /* Put the register usage information on the CALL. If there is already
4235 some usage information, put ours at the end. */
4236 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4240 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4241 link
= XEXP (link
, 1))
4244 XEXP (link
, 1) = call_fusage
;
4247 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4250 /* Delete all insns made since FROM.
4251 FROM becomes the new last instruction. */
4254 delete_insns_since (rtx_insn
*from
)
4259 SET_NEXT_INSN (from
) = 0;
4260 set_last_insn (from
);
4263 /* This function is deprecated, please use sequences instead.
4265 Move a consecutive bunch of insns to a different place in the chain.
4266 The insns to be moved are those between FROM and TO.
4267 They are moved to a new position after the insn AFTER.
4268 AFTER must not be FROM or TO or any insn in between.
4270 This function does not know about SEQUENCEs and hence should not be
4271 called after delay-slot filling has been done. */
4274 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4276 #ifdef ENABLE_CHECKING
4278 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4279 gcc_assert (after
!= x
);
4280 gcc_assert (after
!= to
);
4283 /* Splice this bunch out of where it is now. */
4284 if (PREV_INSN (from
))
4285 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4287 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4288 if (get_last_insn () == to
)
4289 set_last_insn (PREV_INSN (from
));
4290 if (get_insns () == from
)
4291 set_first_insn (NEXT_INSN (to
));
4293 /* Make the new neighbors point to it and it to them. */
4294 if (NEXT_INSN (after
))
4295 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4297 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4298 SET_PREV_INSN (from
) = after
;
4299 SET_NEXT_INSN (after
) = from
;
4300 if (after
== get_last_insn ())
4304 /* Same as function above, but take care to update BB boundaries. */
4306 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4308 rtx_insn
*prev
= PREV_INSN (from
);
4309 basic_block bb
, bb2
;
4311 reorder_insns_nobb (from
, to
, after
);
4313 if (!BARRIER_P (after
)
4314 && (bb
= BLOCK_FOR_INSN (after
)))
4317 df_set_bb_dirty (bb
);
4319 if (!BARRIER_P (from
)
4320 && (bb2
= BLOCK_FOR_INSN (from
)))
4322 if (BB_END (bb2
) == to
)
4323 BB_END (bb2
) = prev
;
4324 df_set_bb_dirty (bb2
);
4327 if (BB_END (bb
) == after
)
4330 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4332 df_insn_change_bb (x
, bb
);
4337 /* Emit insn(s) of given code and pattern
4338 at a specified place within the doubly-linked list.
4340 All of the emit_foo global entry points accept an object
4341 X which is either an insn list or a PATTERN of a single
4344 There are thus a few canonical ways to generate code and
4345 emit it at a specific place in the instruction stream. For
4346 example, consider the instruction named SPOT and the fact that
4347 we would like to emit some instructions before SPOT. We might
4351 ... emit the new instructions ...
4352 insns_head = get_insns ();
4355 emit_insn_before (insns_head, SPOT);
4357 It used to be common to generate SEQUENCE rtl instead, but that
4358 is a relic of the past which no longer occurs. The reason is that
4359 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4360 generated would almost certainly die right after it was created. */
4363 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4364 rtx_insn
*(*make_raw
) (rtx
))
4368 gcc_assert (before
);
4371 return safe_as_a
<rtx_insn
*> (last
);
4373 switch (GET_CODE (x
))
4382 insn
= as_a
<rtx_insn
*> (x
);
4385 rtx_insn
*next
= NEXT_INSN (insn
);
4386 add_insn_before (insn
, before
, bb
);
4392 #ifdef ENABLE_RTL_CHECKING
4399 last
= (*make_raw
) (x
);
4400 add_insn_before (last
, before
, bb
);
4404 return safe_as_a
<rtx_insn
*> (last
);
4407 /* Make X be output before the instruction BEFORE. */
4410 emit_insn_before_noloc (rtx x
, rtx_insn
*before
, basic_block bb
)
4412 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4415 /* Make an instruction with body X and code JUMP_INSN
4416 and output it before the instruction BEFORE. */
4419 emit_jump_insn_before_noloc (rtx x
, rtx_insn
*before
)
4421 return as_a
<rtx_jump_insn
*> (
4422 emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4423 make_jump_insn_raw
));
4426 /* Make an instruction with body X and code CALL_INSN
4427 and output it before the instruction BEFORE. */
4430 emit_call_insn_before_noloc (rtx x
, rtx_insn
*before
)
4432 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4433 make_call_insn_raw
);
4436 /* Make an instruction with body X and code DEBUG_INSN
4437 and output it before the instruction BEFORE. */
4440 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4442 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4443 make_debug_insn_raw
);
4446 /* Make an insn of code BARRIER
4447 and output it before the insn BEFORE. */
4450 emit_barrier_before (rtx before
)
4452 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4454 INSN_UID (insn
) = cur_insn_uid
++;
4456 add_insn_before (insn
, before
, NULL
);
4460 /* Emit the label LABEL before the insn BEFORE. */
4463 emit_label_before (rtx label
, rtx_insn
*before
)
4465 gcc_checking_assert (INSN_UID (label
) == 0);
4466 INSN_UID (label
) = cur_insn_uid
++;
4467 add_insn_before (label
, before
, NULL
);
4468 return as_a
<rtx_code_label
*> (label
);
4471 /* Helper for emit_insn_after, handles lists of instructions
4475 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4477 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4479 rtx_insn
*after_after
;
4480 if (!bb
&& !BARRIER_P (after
))
4481 bb
= BLOCK_FOR_INSN (after
);
4485 df_set_bb_dirty (bb
);
4486 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4487 if (!BARRIER_P (last
))
4489 set_block_for_insn (last
, bb
);
4490 df_insn_rescan (last
);
4492 if (!BARRIER_P (last
))
4494 set_block_for_insn (last
, bb
);
4495 df_insn_rescan (last
);
4497 if (BB_END (bb
) == after
)
4501 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4504 after_after
= NEXT_INSN (after
);
4506 SET_NEXT_INSN (after
) = first
;
4507 SET_PREV_INSN (first
) = after
;
4508 SET_NEXT_INSN (last
) = after_after
;
4510 SET_PREV_INSN (after_after
) = last
;
4512 if (after
== get_last_insn ())
4513 set_last_insn (last
);
4519 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4520 rtx_insn
*(*make_raw
)(rtx
))
4522 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4523 rtx_insn
*last
= after
;
4530 switch (GET_CODE (x
))
4539 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4542 #ifdef ENABLE_RTL_CHECKING
4549 last
= (*make_raw
) (x
);
4550 add_insn_after (last
, after
, bb
);
4557 /* Make X be output after the insn AFTER and set the BB of insn. If
4558 BB is NULL, an attempt is made to infer the BB from AFTER. */
4561 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4563 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4567 /* Make an insn of code JUMP_INSN with body X
4568 and output it after the insn AFTER. */
4571 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4573 return as_a
<rtx_jump_insn
*> (
4574 emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
));
4577 /* Make an instruction with body X and code CALL_INSN
4578 and output it after the instruction AFTER. */
4581 emit_call_insn_after_noloc (rtx x
, rtx after
)
4583 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4586 /* Make an instruction with body X and code CALL_INSN
4587 and output it after the instruction AFTER. */
4590 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4592 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4595 /* Make an insn of code BARRIER
4596 and output it after the insn AFTER. */
4599 emit_barrier_after (rtx after
)
4601 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4603 INSN_UID (insn
) = cur_insn_uid
++;
4605 add_insn_after (insn
, after
, NULL
);
4609 /* Emit the label LABEL after the insn AFTER. */
4612 emit_label_after (rtx label
, rtx_insn
*after
)
4614 gcc_checking_assert (INSN_UID (label
) == 0);
4615 INSN_UID (label
) = cur_insn_uid
++;
4616 add_insn_after (label
, after
, NULL
);
4617 return as_a
<rtx_insn
*> (label
);
4620 /* Notes require a bit of special handling: Some notes need to have their
4621 BLOCK_FOR_INSN set, others should never have it set, and some should
4622 have it set or clear depending on the context. */
4624 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4625 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4626 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4629 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4633 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4634 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4637 /* Notes for var tracking and EH region markers can appear between or
4638 inside basic blocks. If the caller is emitting on the basic block
4639 boundary, do not set BLOCK_FOR_INSN on the new note. */
4640 case NOTE_INSN_VAR_LOCATION
:
4641 case NOTE_INSN_CALL_ARG_LOCATION
:
4642 case NOTE_INSN_EH_REGION_BEG
:
4643 case NOTE_INSN_EH_REGION_END
:
4644 return on_bb_boundary_p
;
4646 /* Otherwise, BLOCK_FOR_INSN must be set. */
4652 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4655 emit_note_after (enum insn_note subtype
, rtx_insn
*after
)
4657 rtx_note
*note
= make_note_raw (subtype
);
4658 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4659 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4661 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4662 add_insn_after_nobb (note
, after
);
4664 add_insn_after (note
, after
, bb
);
4668 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4671 emit_note_before (enum insn_note subtype
, rtx_insn
*before
)
4673 rtx_note
*note
= make_note_raw (subtype
);
4674 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4675 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4677 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4678 add_insn_before_nobb (note
, before
);
4680 add_insn_before (note
, before
, bb
);
4684 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4685 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4688 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4689 rtx_insn
*(*make_raw
) (rtx
))
4691 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4692 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4694 if (pattern
== NULL_RTX
|| !loc
)
4695 return safe_as_a
<rtx_insn
*> (last
);
4697 after
= NEXT_INSN (after
);
4700 if (active_insn_p (after
)
4701 && !JUMP_TABLE_DATA_P (after
) /* FIXME */
4702 && !INSN_LOCATION (after
))
4703 INSN_LOCATION (after
) = loc
;
4706 after
= NEXT_INSN (after
);
4708 return safe_as_a
<rtx_insn
*> (last
);
4711 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4712 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4716 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4717 rtx_insn
*(*make_raw
) (rtx
))
4719 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4720 rtx_insn
*prev
= after
;
4722 if (skip_debug_insns
)
4723 while (DEBUG_INSN_P (prev
))
4724 prev
= PREV_INSN (prev
);
4727 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4730 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4733 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4735 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4737 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4740 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4742 emit_insn_after (rtx pattern
, rtx after
)
4744 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4747 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4749 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4751 return as_a
<rtx_jump_insn
*> (
4752 emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
));
4755 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4757 emit_jump_insn_after (rtx pattern
, rtx after
)
4759 return as_a
<rtx_jump_insn
*> (
4760 emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
));
4763 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4765 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4767 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4770 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4772 emit_call_insn_after (rtx pattern
, rtx after
)
4774 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4777 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4779 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4781 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4784 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4786 emit_debug_insn_after (rtx pattern
, rtx after
)
4788 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4791 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4792 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4793 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4797 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4798 rtx_insn
*(*make_raw
) (rtx
))
4800 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4801 rtx_insn
*first
= PREV_INSN (before
);
4802 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4803 insnp
? before
: NULL_RTX
,
4806 if (pattern
== NULL_RTX
|| !loc
)
4810 first
= get_insns ();
4812 first
= NEXT_INSN (first
);
4815 if (active_insn_p (first
)
4816 && !JUMP_TABLE_DATA_P (first
) /* FIXME */
4817 && !INSN_LOCATION (first
))
4818 INSN_LOCATION (first
) = loc
;
4821 first
= NEXT_INSN (first
);
4826 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4827 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4828 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4829 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4832 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4833 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4835 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4836 rtx_insn
*next
= before
;
4838 if (skip_debug_insns
)
4839 while (DEBUG_INSN_P (next
))
4840 next
= PREV_INSN (next
);
4843 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4846 return emit_pattern_before_noloc (pattern
, before
,
4847 insnp
? before
: NULL_RTX
,
4851 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4853 emit_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4855 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4859 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4861 emit_insn_before (rtx pattern
, rtx before
)
4863 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4866 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4868 emit_jump_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4870 return as_a
<rtx_jump_insn
*> (
4871 emit_pattern_before_setloc (pattern
, before
, loc
, false,
4872 make_jump_insn_raw
));
4875 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4877 emit_jump_insn_before (rtx pattern
, rtx before
)
4879 return as_a
<rtx_jump_insn
*> (
4880 emit_pattern_before (pattern
, before
, true, false,
4881 make_jump_insn_raw
));
4884 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4886 emit_call_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4888 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4889 make_call_insn_raw
);
4892 /* Like emit_call_insn_before_noloc,
4893 but set insn_location according to BEFORE. */
4895 emit_call_insn_before (rtx pattern
, rtx_insn
*before
)
4897 return emit_pattern_before (pattern
, before
, true, false,
4898 make_call_insn_raw
);
4901 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4903 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4905 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4906 make_debug_insn_raw
);
4909 /* Like emit_debug_insn_before_noloc,
4910 but set insn_location according to BEFORE. */
4912 emit_debug_insn_before (rtx pattern
, rtx_insn
*before
)
4914 return emit_pattern_before (pattern
, before
, false, false,
4915 make_debug_insn_raw
);
4918 /* Take X and emit it at the end of the doubly-linked
4921 Returns the last insn emitted. */
4926 rtx_insn
*last
= get_last_insn ();
4932 switch (GET_CODE (x
))
4941 insn
= as_a
<rtx_insn
*> (x
);
4944 rtx_insn
*next
= NEXT_INSN (insn
);
4951 #ifdef ENABLE_RTL_CHECKING
4952 case JUMP_TABLE_DATA
:
4959 last
= make_insn_raw (x
);
4967 /* Make an insn of code DEBUG_INSN with pattern X
4968 and add it to the end of the doubly-linked list. */
4971 emit_debug_insn (rtx x
)
4973 rtx_insn
*last
= get_last_insn ();
4979 switch (GET_CODE (x
))
4988 insn
= as_a
<rtx_insn
*> (x
);
4991 rtx_insn
*next
= NEXT_INSN (insn
);
4998 #ifdef ENABLE_RTL_CHECKING
4999 case JUMP_TABLE_DATA
:
5006 last
= make_debug_insn_raw (x
);
5014 /* Make an insn of code JUMP_INSN with pattern X
5015 and add it to the end of the doubly-linked list. */
5018 emit_jump_insn (rtx x
)
5020 rtx_insn
*last
= NULL
;
5023 switch (GET_CODE (x
))
5032 insn
= as_a
<rtx_insn
*> (x
);
5035 rtx_insn
*next
= NEXT_INSN (insn
);
5042 #ifdef ENABLE_RTL_CHECKING
5043 case JUMP_TABLE_DATA
:
5050 last
= make_jump_insn_raw (x
);
5058 /* Make an insn of code CALL_INSN with pattern X
5059 and add it to the end of the doubly-linked list. */
5062 emit_call_insn (rtx x
)
5066 switch (GET_CODE (x
))
5075 insn
= emit_insn (x
);
5078 #ifdef ENABLE_RTL_CHECKING
5080 case JUMP_TABLE_DATA
:
5086 insn
= make_call_insn_raw (x
);
5094 /* Add the label LABEL to the end of the doubly-linked list. */
5097 emit_label (rtx uncast_label
)
5099 rtx_code_label
*label
= as_a
<rtx_code_label
*> (uncast_label
);
5101 gcc_checking_assert (INSN_UID (label
) == 0);
5102 INSN_UID (label
) = cur_insn_uid
++;
5107 /* Make an insn of code JUMP_TABLE_DATA
5108 and add it to the end of the doubly-linked list. */
5110 rtx_jump_table_data
*
5111 emit_jump_table_data (rtx table
)
5113 rtx_jump_table_data
*jump_table_data
=
5114 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5115 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5116 PATTERN (jump_table_data
) = table
;
5117 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5118 add_insn (jump_table_data
);
5119 return jump_table_data
;
5122 /* Make an insn of code BARRIER
5123 and add it to the end of the doubly-linked list. */
5128 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5129 INSN_UID (barrier
) = cur_insn_uid
++;
5134 /* Emit a copy of note ORIG. */
5137 emit_note_copy (rtx_note
*orig
)
5139 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5140 rtx_note
*note
= make_note_raw (kind
);
5141 NOTE_DATA (note
) = NOTE_DATA (orig
);
5146 /* Make an insn of code NOTE or type NOTE_NO
5147 and add it to the end of the doubly-linked list. */
5150 emit_note (enum insn_note kind
)
5152 rtx_note
*note
= make_note_raw (kind
);
5157 /* Emit a clobber of lvalue X. */
5160 emit_clobber (rtx x
)
5162 /* CONCATs should not appear in the insn stream. */
5163 if (GET_CODE (x
) == CONCAT
)
5165 emit_clobber (XEXP (x
, 0));
5166 return emit_clobber (XEXP (x
, 1));
5168 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5171 /* Return a sequence of insns to clobber lvalue X. */
5185 /* Emit a use of rvalue X. */
5190 /* CONCATs should not appear in the insn stream. */
5191 if (GET_CODE (x
) == CONCAT
)
5193 emit_use (XEXP (x
, 0));
5194 return emit_use (XEXP (x
, 1));
5196 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5199 /* Return a sequence of insns to use rvalue X. */
5213 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5214 Return the set in INSN that such notes describe, or NULL if the notes
5215 have no meaning for INSN. */
5218 set_for_reg_notes (rtx insn
)
5225 pat
= PATTERN (insn
);
5226 if (GET_CODE (pat
) == PARALLEL
)
5228 /* We do not use single_set because that ignores SETs of unused
5229 registers. REG_EQUAL and REG_EQUIV notes really do require the
5230 PARALLEL to have a single SET. */
5231 if (multiple_sets (insn
))
5233 pat
= XVECEXP (pat
, 0, 0);
5236 if (GET_CODE (pat
) != SET
)
5239 reg
= SET_DEST (pat
);
5241 /* Notes apply to the contents of a STRICT_LOW_PART. */
5242 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5243 reg
= XEXP (reg
, 0);
5245 /* Check that we have a register. */
5246 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5252 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5253 note of this type already exists, remove it first. */
5256 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5258 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5264 if (!set_for_reg_notes (insn
))
5267 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5268 It serves no useful purpose and breaks eliminate_regs. */
5269 if (GET_CODE (datum
) == ASM_OPERANDS
)
5272 /* Notes with side effects are dangerous. Even if the side-effect
5273 initially mirrors one in PATTERN (INSN), later optimizations
5274 might alter the way that the final register value is calculated
5275 and so move or alter the side-effect in some way. The note would
5276 then no longer be a valid substitution for SET_SRC. */
5277 if (side_effects_p (datum
))
5286 XEXP (note
, 0) = datum
;
5289 add_reg_note (insn
, kind
, datum
);
5290 note
= REG_NOTES (insn
);
5297 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5306 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5308 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5310 rtx set
= set_for_reg_notes (insn
);
5312 if (set
&& SET_DEST (set
) == dst
)
5313 return set_unique_reg_note (insn
, kind
, datum
);
5317 /* Return an indication of which type of insn should have X as a body.
5318 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5320 static enum rtx_code
5321 classify_insn (rtx x
)
5325 if (GET_CODE (x
) == CALL
)
5327 if (ANY_RETURN_P (x
))
5329 if (GET_CODE (x
) == SET
)
5331 if (SET_DEST (x
) == pc_rtx
)
5333 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5338 if (GET_CODE (x
) == PARALLEL
)
5341 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5342 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5344 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5345 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5347 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5348 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5354 /* Emit the rtl pattern X as an appropriate kind of insn.
5355 If X is a label, it is simply added into the insn chain. */
5360 enum rtx_code code
= classify_insn (x
);
5365 return emit_label (x
);
5367 return emit_insn (x
);
5370 rtx_insn
*insn
= emit_jump_insn (x
);
5371 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5372 return emit_barrier ();
5376 return emit_call_insn (x
);
5378 return emit_debug_insn (x
);
5384 /* Space for free sequence stack entries. */
5385 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5387 /* Begin emitting insns to a sequence. If this sequence will contain
5388 something that might cause the compiler to pop arguments to function
5389 calls (because those pops have previously been deferred; see
5390 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5391 before calling this function. That will ensure that the deferred
5392 pops are not accidentally emitted in the middle of this sequence. */
5395 start_sequence (void)
5397 struct sequence_stack
*tem
;
5399 if (free_sequence_stack
!= NULL
)
5401 tem
= free_sequence_stack
;
5402 free_sequence_stack
= tem
->next
;
5405 tem
= ggc_alloc
<sequence_stack
> ();
5407 tem
->next
= get_current_sequence ()->next
;
5408 tem
->first
= get_insns ();
5409 tem
->last
= get_last_insn ();
5410 get_current_sequence ()->next
= tem
;
5416 /* Set up the insn chain starting with FIRST as the current sequence,
5417 saving the previously current one. See the documentation for
5418 start_sequence for more information about how to use this function. */
5421 push_to_sequence (rtx_insn
*first
)
5427 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5430 set_first_insn (first
);
5431 set_last_insn (last
);
5434 /* Like push_to_sequence, but take the last insn as an argument to avoid
5435 looping through the list. */
5438 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5442 set_first_insn (first
);
5443 set_last_insn (last
);
5446 /* Set up the outer-level insn chain
5447 as the current sequence, saving the previously current one. */
5450 push_topmost_sequence (void)
5452 struct sequence_stack
*top
;
5456 top
= get_topmost_sequence ();
5457 set_first_insn (top
->first
);
5458 set_last_insn (top
->last
);
5461 /* After emitting to the outer-level insn chain, update the outer-level
5462 insn chain, and restore the previous saved state. */
5465 pop_topmost_sequence (void)
5467 struct sequence_stack
*top
;
5469 top
= get_topmost_sequence ();
5470 top
->first
= get_insns ();
5471 top
->last
= get_last_insn ();
5476 /* After emitting to a sequence, restore previous saved state.
5478 To get the contents of the sequence just made, you must call
5479 `get_insns' *before* calling here.
5481 If the compiler might have deferred popping arguments while
5482 generating this sequence, and this sequence will not be immediately
5483 inserted into the instruction stream, use do_pending_stack_adjust
5484 before calling get_insns. That will ensure that the deferred
5485 pops are inserted into this sequence, and not into some random
5486 location in the instruction stream. See INHIBIT_DEFER_POP for more
5487 information about deferred popping of arguments. */
5492 struct sequence_stack
*tem
= get_current_sequence ()->next
;
5494 set_first_insn (tem
->first
);
5495 set_last_insn (tem
->last
);
5496 get_current_sequence ()->next
= tem
->next
;
5498 memset (tem
, 0, sizeof (*tem
));
5499 tem
->next
= free_sequence_stack
;
5500 free_sequence_stack
= tem
;
5503 /* Return 1 if currently emitting into a sequence. */
5506 in_sequence_p (void)
5508 return get_current_sequence ()->next
!= 0;
5511 /* Put the various virtual registers into REGNO_REG_RTX. */
5514 init_virtual_regs (void)
5516 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5517 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5518 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5519 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5520 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5521 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5522 = virtual_preferred_stack_boundary_rtx
;
5526 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5527 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5528 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5529 static int copy_insn_n_scratches
;
5531 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5532 copied an ASM_OPERANDS.
5533 In that case, it is the original input-operand vector. */
5534 static rtvec orig_asm_operands_vector
;
5536 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5537 copied an ASM_OPERANDS.
5538 In that case, it is the copied input-operand vector. */
5539 static rtvec copy_asm_operands_vector
;
5541 /* Likewise for the constraints vector. */
5542 static rtvec orig_asm_constraints_vector
;
5543 static rtvec copy_asm_constraints_vector
;
5545 /* Recursively create a new copy of an rtx for copy_insn.
5546 This function differs from copy_rtx in that it handles SCRATCHes and
5547 ASM_OPERANDs properly.
5548 Normally, this function is not used directly; use copy_insn as front end.
5549 However, you could first copy an insn pattern with copy_insn and then use
5550 this function afterwards to properly copy any REG_NOTEs containing
5554 copy_insn_1 (rtx orig
)
5559 const char *format_ptr
;
5564 code
= GET_CODE (orig
);
5579 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5580 clobbers or clobbers of hard registers that originated as pseudos.
5581 This is needed to allow safe register renaming. */
5582 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5583 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5588 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5589 if (copy_insn_scratch_in
[i
] == orig
)
5590 return copy_insn_scratch_out
[i
];
5594 if (shared_const_p (orig
))
5598 /* A MEM with a constant address is not sharable. The problem is that
5599 the constant address may need to be reloaded. If the mem is shared,
5600 then reloading one copy of this mem will cause all copies to appear
5601 to have been reloaded. */
5607 /* Copy the various flags, fields, and other information. We assume
5608 that all fields need copying, and then clear the fields that should
5609 not be copied. That is the sensible default behavior, and forces
5610 us to explicitly document why we are *not* copying a flag. */
5611 copy
= shallow_copy_rtx (orig
);
5613 /* We do not copy the USED flag, which is used as a mark bit during
5614 walks over the RTL. */
5615 RTX_FLAG (copy
, used
) = 0;
5617 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5620 RTX_FLAG (copy
, jump
) = 0;
5621 RTX_FLAG (copy
, call
) = 0;
5622 RTX_FLAG (copy
, frame_related
) = 0;
5625 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5627 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5628 switch (*format_ptr
++)
5631 if (XEXP (orig
, i
) != NULL
)
5632 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5637 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5638 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5639 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5640 XVEC (copy
, i
) = copy_asm_operands_vector
;
5641 else if (XVEC (orig
, i
) != NULL
)
5643 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5644 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5645 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5656 /* These are left unchanged. */
5663 if (code
== SCRATCH
)
5665 i
= copy_insn_n_scratches
++;
5666 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5667 copy_insn_scratch_in
[i
] = orig
;
5668 copy_insn_scratch_out
[i
] = copy
;
5670 else if (code
== ASM_OPERANDS
)
5672 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5673 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5674 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5675 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5681 /* Create a new copy of an rtx.
5682 This function differs from copy_rtx in that it handles SCRATCHes and
5683 ASM_OPERANDs properly.
5684 INSN doesn't really have to be a full INSN; it could be just the
5687 copy_insn (rtx insn
)
5689 copy_insn_n_scratches
= 0;
5690 orig_asm_operands_vector
= 0;
5691 orig_asm_constraints_vector
= 0;
5692 copy_asm_operands_vector
= 0;
5693 copy_asm_constraints_vector
= 0;
5694 return copy_insn_1 (insn
);
5697 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5698 on that assumption that INSN itself remains in its original place. */
5701 copy_delay_slot_insn (rtx_insn
*insn
)
5703 /* Copy INSN with its rtx_code, all its notes, location etc. */
5704 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5705 INSN_UID (insn
) = cur_insn_uid
++;
5709 /* Initialize data structures and variables in this file
5710 before generating rtl for each function. */
5715 set_first_insn (NULL
);
5716 set_last_insn (NULL
);
5717 if (MIN_NONDEBUG_INSN_UID
)
5718 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5721 cur_debug_insn_uid
= 1;
5722 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5723 first_label_num
= label_num
;
5724 get_current_sequence ()->next
= NULL
;
5726 /* Init the tables that describe all the pseudo regs. */
5728 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5730 crtl
->emit
.regno_pointer_align
5731 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5733 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5735 /* Put copies of all the hard registers into regno_reg_rtx. */
5736 memcpy (regno_reg_rtx
,
5737 initial_regno_reg_rtx
,
5738 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5740 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5741 init_virtual_regs ();
5743 /* Indicate that the virtual registers and stack locations are
5745 REG_POINTER (stack_pointer_rtx
) = 1;
5746 REG_POINTER (frame_pointer_rtx
) = 1;
5747 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5748 REG_POINTER (arg_pointer_rtx
) = 1;
5750 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5751 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5752 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5753 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5754 REG_POINTER (virtual_cfa_rtx
) = 1;
5756 #ifdef STACK_BOUNDARY
5757 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5758 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5759 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5760 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5762 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5763 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5764 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5765 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5766 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5769 #ifdef INIT_EXPANDERS
5774 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5777 gen_const_vector (machine_mode mode
, int constant
)
5784 units
= GET_MODE_NUNITS (mode
);
5785 inner
= GET_MODE_INNER (mode
);
5787 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5789 v
= rtvec_alloc (units
);
5791 /* We need to call this function after we set the scalar const_tiny_rtx
5793 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5795 for (i
= 0; i
< units
; ++i
)
5796 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5798 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5802 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5803 all elements are zero, and the one vector when all elements are one. */
5805 gen_rtx_CONST_VECTOR (machine_mode mode
, rtvec v
)
5807 machine_mode inner
= GET_MODE_INNER (mode
);
5808 int nunits
= GET_MODE_NUNITS (mode
);
5812 /* Check to see if all of the elements have the same value. */
5813 x
= RTVEC_ELT (v
, nunits
- 1);
5814 for (i
= nunits
- 2; i
>= 0; i
--)
5815 if (RTVEC_ELT (v
, i
) != x
)
5818 /* If the values are all the same, check to see if we can use one of the
5819 standard constant vectors. */
5822 if (x
== CONST0_RTX (inner
))
5823 return CONST0_RTX (mode
);
5824 else if (x
== CONST1_RTX (inner
))
5825 return CONST1_RTX (mode
);
5826 else if (x
== CONSTM1_RTX (inner
))
5827 return CONSTM1_RTX (mode
);
5830 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5833 /* Initialise global register information required by all functions. */
5836 init_emit_regs (void)
5842 /* Reset register attributes */
5843 reg_attrs_htab
->empty ();
5845 /* We need reg_raw_mode, so initialize the modes now. */
5846 init_reg_modes_target ();
5848 /* Assign register numbers to the globally defined register rtx. */
5849 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5850 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5851 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5852 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5853 virtual_incoming_args_rtx
=
5854 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5855 virtual_stack_vars_rtx
=
5856 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5857 virtual_stack_dynamic_rtx
=
5858 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5859 virtual_outgoing_args_rtx
=
5860 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5861 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5862 virtual_preferred_stack_boundary_rtx
=
5863 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5865 /* Initialize RTL for commonly used hard registers. These are
5866 copied into regno_reg_rtx as we begin to compile each function. */
5867 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5868 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5870 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5871 return_address_pointer_rtx
5872 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5875 pic_offset_table_rtx
= NULL_RTX
;
5876 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5877 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5879 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5881 mode
= (machine_mode
) i
;
5882 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5883 attrs
->align
= BITS_PER_UNIT
;
5884 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5885 if (mode
!= BLKmode
)
5887 attrs
->size_known_p
= true;
5888 attrs
->size
= GET_MODE_SIZE (mode
);
5889 if (STRICT_ALIGNMENT
)
5890 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5892 mode_mem_attrs
[i
] = attrs
;
5896 /* Initialize global machine_mode variables. */
5899 init_derived_machine_modes (void)
5901 byte_mode
= VOIDmode
;
5902 word_mode
= VOIDmode
;
5904 for (machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5906 mode
= GET_MODE_WIDER_MODE (mode
))
5908 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5909 && byte_mode
== VOIDmode
)
5912 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5913 && word_mode
== VOIDmode
)
5917 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5920 /* Create some permanent unique rtl objects shared between all functions. */
5923 init_emit_once (void)
5927 machine_mode double_mode
;
5929 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5930 CONST_FIXED, and memory attribute hash tables. */
5931 const_int_htab
= hash_table
<const_int_hasher
>::create_ggc (37);
5933 #if TARGET_SUPPORTS_WIDE_INT
5934 const_wide_int_htab
= hash_table
<const_wide_int_hasher
>::create_ggc (37);
5936 const_double_htab
= hash_table
<const_double_hasher
>::create_ggc (37);
5938 const_fixed_htab
= hash_table
<const_fixed_hasher
>::create_ggc (37);
5940 reg_attrs_htab
= hash_table
<reg_attr_hasher
>::create_ggc (37);
5942 #ifdef INIT_EXPANDERS
5943 /* This is to initialize {init|mark|free}_machine_status before the first
5944 call to push_function_context_to. This is needed by the Chill front
5945 end which calls push_function_context_to before the first call to
5946 init_function_start. */
5950 /* Create the unique rtx's for certain rtx codes and operand values. */
5952 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5953 tries to use these variables. */
5954 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5955 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5956 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5958 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5959 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5960 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5962 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5964 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5966 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5967 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5968 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5973 dconsthalf
= dconst1
;
5974 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5976 for (i
= 0; i
< 3; i
++)
5978 const REAL_VALUE_TYPE
*const r
=
5979 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5981 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5983 mode
= GET_MODE_WIDER_MODE (mode
))
5984 const_tiny_rtx
[i
][(int) mode
] =
5985 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5987 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5989 mode
= GET_MODE_WIDER_MODE (mode
))
5990 const_tiny_rtx
[i
][(int) mode
] =
5991 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5993 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5995 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5997 mode
= GET_MODE_WIDER_MODE (mode
))
5998 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
6000 for (mode
= MIN_MODE_PARTIAL_INT
;
6001 mode
<= MAX_MODE_PARTIAL_INT
;
6002 mode
= (machine_mode
)((int)(mode
) + 1))
6003 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
6006 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
6008 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
6010 mode
= GET_MODE_WIDER_MODE (mode
))
6011 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6013 for (mode
= MIN_MODE_PARTIAL_INT
;
6014 mode
<= MAX_MODE_PARTIAL_INT
;
6015 mode
= (machine_mode
)((int)(mode
) + 1))
6016 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6018 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
6020 mode
= GET_MODE_WIDER_MODE (mode
))
6022 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6023 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6026 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
6028 mode
= GET_MODE_WIDER_MODE (mode
))
6030 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6031 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6034 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
6036 mode
= GET_MODE_WIDER_MODE (mode
))
6038 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6039 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6040 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
6043 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
6045 mode
= GET_MODE_WIDER_MODE (mode
))
6047 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6048 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6051 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
6053 mode
= GET_MODE_WIDER_MODE (mode
))
6055 FCONST0 (mode
).data
.high
= 0;
6056 FCONST0 (mode
).data
.low
= 0;
6057 FCONST0 (mode
).mode
= mode
;
6058 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6059 FCONST0 (mode
), mode
);
6062 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
6064 mode
= GET_MODE_WIDER_MODE (mode
))
6066 FCONST0 (mode
).data
.high
= 0;
6067 FCONST0 (mode
).data
.low
= 0;
6068 FCONST0 (mode
).mode
= mode
;
6069 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6070 FCONST0 (mode
), mode
);
6073 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
6075 mode
= GET_MODE_WIDER_MODE (mode
))
6077 FCONST0 (mode
).data
.high
= 0;
6078 FCONST0 (mode
).data
.low
= 0;
6079 FCONST0 (mode
).mode
= mode
;
6080 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6081 FCONST0 (mode
), mode
);
6083 /* We store the value 1. */
6084 FCONST1 (mode
).data
.high
= 0;
6085 FCONST1 (mode
).data
.low
= 0;
6086 FCONST1 (mode
).mode
= mode
;
6088 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6089 HOST_BITS_PER_DOUBLE_INT
,
6090 SIGNED_FIXED_POINT_MODE_P (mode
));
6091 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6092 FCONST1 (mode
), mode
);
6095 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
6097 mode
= GET_MODE_WIDER_MODE (mode
))
6099 FCONST0 (mode
).data
.high
= 0;
6100 FCONST0 (mode
).data
.low
= 0;
6101 FCONST0 (mode
).mode
= mode
;
6102 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6103 FCONST0 (mode
), mode
);
6105 /* We store the value 1. */
6106 FCONST1 (mode
).data
.high
= 0;
6107 FCONST1 (mode
).data
.low
= 0;
6108 FCONST1 (mode
).mode
= mode
;
6110 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
6111 HOST_BITS_PER_DOUBLE_INT
,
6112 SIGNED_FIXED_POINT_MODE_P (mode
));
6113 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
6114 FCONST1 (mode
), mode
);
6117 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
6119 mode
= GET_MODE_WIDER_MODE (mode
))
6121 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6124 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6126 mode
= GET_MODE_WIDER_MODE (mode
))
6128 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6131 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6133 mode
= GET_MODE_WIDER_MODE (mode
))
6135 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6136 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6139 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6141 mode
= GET_MODE_WIDER_MODE (mode
))
6143 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6144 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6147 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6148 if (GET_MODE_CLASS ((machine_mode
) i
) == MODE_CC
)
6149 const_tiny_rtx
[0][i
] = const0_rtx
;
6151 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6152 if (STORE_FLAG_VALUE
== 1)
6153 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6155 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS
);
6157 mode
= GET_MODE_WIDER_MODE (mode
))
6159 wide_int wi_zero
= wi::zero (GET_MODE_PRECISION (mode
));
6160 const_tiny_rtx
[0][mode
] = immed_wide_int_const (wi_zero
, mode
);
6163 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6164 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6165 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6166 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6167 invalid_insn_rtx
= gen_rtx_INSN (VOIDmode
,
6171 /*pattern=*/NULL_RTX
,
6174 /*reg_notes=*/NULL_RTX
);
6177 /* Produce exact duplicate of insn INSN after AFTER.
6178 Care updating of libcall regions if present. */
6181 emit_copy_of_insn_after (rtx_insn
*insn
, rtx_insn
*after
)
6186 switch (GET_CODE (insn
))
6189 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6193 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6194 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6198 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6202 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6203 if (CALL_INSN_FUNCTION_USAGE (insn
))
6204 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6205 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6206 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6207 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6208 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6209 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6210 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6217 /* Update LABEL_NUSES. */
6218 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6220 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6222 /* If the old insn is frame related, then so is the new one. This is
6223 primarily needed for IA-64 unwind info which marks epilogue insns,
6224 which may be duplicated by the basic block reordering code. */
6225 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6227 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6228 will make them. REG_LABEL_TARGETs are created there too, but are
6229 supposed to be sticky, so we copy them. */
6230 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6231 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6233 if (GET_CODE (link
) == EXPR_LIST
)
6234 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6235 copy_insn_1 (XEXP (link
, 0)));
6237 add_shallow_copy_of_reg_note (new_rtx
, link
);
6240 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6244 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6246 gen_hard_reg_clobber (machine_mode mode
, unsigned int regno
)
6248 if (hard_reg_clobbers
[mode
][regno
])
6249 return hard_reg_clobbers
[mode
][regno
];
6251 return (hard_reg_clobbers
[mode
][regno
] =
6252 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6255 location_t prologue_location
;
6256 location_t epilogue_location
;
6258 /* Hold current location information and last location information, so the
6259 datastructures are built lazily only when some instructions in given
6260 place are needed. */
6261 static location_t curr_location
;
6263 /* Allocate insn location datastructure. */
6265 insn_locations_init (void)
6267 prologue_location
= epilogue_location
= 0;
6268 curr_location
= UNKNOWN_LOCATION
;
6271 /* At the end of emit stage, clear current location. */
6273 insn_locations_finalize (void)
6275 epilogue_location
= curr_location
;
6276 curr_location
= UNKNOWN_LOCATION
;
6279 /* Set current location. */
6281 set_curr_insn_location (location_t location
)
6283 curr_location
= location
;
6286 /* Get current location. */
6288 curr_insn_location (void)
6290 return curr_location
;
6293 /* Return lexical scope block insn belongs to. */
6295 insn_scope (const rtx_insn
*insn
)
6297 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6300 /* Return line number of the statement that produced this insn. */
6302 insn_line (const rtx_insn
*insn
)
6304 return LOCATION_LINE (INSN_LOCATION (insn
));
6307 /* Return source file of the statement that produced this insn. */
6309 insn_file (const rtx_insn
*insn
)
6311 return LOCATION_FILE (INSN_LOCATION (insn
));
6314 /* Return expanded location of the statement that produced this insn. */
6316 insn_location (const rtx_insn
*insn
)
6318 return expand_location (INSN_LOCATION (insn
));
6321 /* Return true if memory model MODEL requires a pre-operation (release-style)
6322 barrier or a post-operation (acquire-style) barrier. While not universal,
6323 this function matches behavior of several targets. */
6326 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6328 switch (model
& MEMMODEL_MASK
)
6330 case MEMMODEL_RELAXED
:
6331 case MEMMODEL_CONSUME
:
6333 case MEMMODEL_RELEASE
:
6334 case MEMMODEL_SYNC_RELEASE
:
6336 case MEMMODEL_ACQUIRE
:
6337 case MEMMODEL_SYNC_ACQUIRE
:
6339 case MEMMODEL_ACQ_REL
:
6340 case MEMMODEL_SEQ_CST
:
6341 case MEMMODEL_SYNC_SEQ_CST
:
6348 #include "gt-emit-rtl.h"