1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl
[GR_MAX
];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
108 REAL_VALUE_TYPE dconst0
;
109 REAL_VALUE_TYPE dconst1
;
110 REAL_VALUE_TYPE dconst2
;
111 REAL_VALUE_TYPE dconstm1
;
113 /* All references to the following fixed hard registers go through
114 these unique rtl objects. On machines where the frame-pointer and
115 arg-pointer are the same register, they use the same unique object.
117 After register allocation, other rtl objects which used to be pseudo-regs
118 may be clobbered to refer to the frame-pointer register.
119 But references that were originally to the frame-pointer can be
120 distinguished from the others because they contain frame_pointer_rtx.
122 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
123 tricky: until register elimination has taken place hard_frame_pointer_rtx
124 should be used if it is being set, and frame_pointer_rtx otherwise. After
125 register elimination hard_frame_pointer_rtx should always be used.
126 On machines where the two registers are same (most) then these are the
129 In an inline procedure, the stack and frame pointer rtxs may not be
130 used for anything else. */
131 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
132 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
133 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
134 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
135 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
152 htab_t const_int_htab
;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
156 htab_t mem_attrs_htab
;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
160 htab_t const_double_htab
;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_linenum (cfun->emit->x_last_linenum)
166 #define last_filename (cfun->emit->x_last_filename)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx make_jump_insn_raw
PARAMS ((rtx
));
170 static rtx make_call_insn_raw
PARAMS ((rtx
));
171 static rtx find_line_note
PARAMS ((rtx
));
172 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
174 static void unshare_all_rtl_1
PARAMS ((rtx
));
175 static void unshare_all_decls
PARAMS ((tree
));
176 static void reset_used_decls
PARAMS ((tree
));
177 static void mark_label_nuses
PARAMS ((rtx
));
178 static hashval_t const_int_htab_hash
PARAMS ((const void *));
179 static int const_int_htab_eq
PARAMS ((const void *,
181 static hashval_t const_double_htab_hash
PARAMS ((const void *));
182 static int const_double_htab_eq
PARAMS ((const void *,
184 static rtx lookup_const_double
PARAMS ((rtx
));
185 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
186 static int mem_attrs_htab_eq
PARAMS ((const void *,
188 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
191 static tree component_ref_for_mem_expr
PARAMS ((tree
));
192 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
194 /* Probability of the conditional branch currently proceeded by try_split.
195 Set to -1 otherwise. */
196 int split_branch_probability
= -1;
198 /* Returns a hash code for X (which is a really a CONST_INT). */
201 const_int_htab_hash (x
)
204 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
207 /* Returns nonzero if the value represented by X (which is really a
208 CONST_INT) is the same as that given by Y (which is really a
212 const_int_htab_eq (x
, y
)
216 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (x
)
227 if (GET_MODE (value
) == VOIDmode
)
228 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
230 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
234 /* Returns nonzero if the value represented by X (really a ...)
235 is the same as that represented by Y (really a ...) */
237 const_double_htab_eq (x
, y
)
241 rtx a
= (rtx
)x
, b
= (rtx
)y
;
243 if (GET_MODE (a
) != GET_MODE (b
))
245 if (GET_MODE (a
) == VOIDmode
)
246 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
247 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
249 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
250 CONST_DOUBLE_REAL_VALUE (b
));
253 /* Returns a hash code for X (which is a really a mem_attrs *). */
256 mem_attrs_htab_hash (x
)
259 mem_attrs
*p
= (mem_attrs
*) x
;
261 return (p
->alias
^ (p
->align
* 1000)
262 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
263 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
267 /* Returns nonzero if the value represented by X (which is really a
268 mem_attrs *) is the same as that given by Y (which is also really a
272 mem_attrs_htab_eq (x
, y
)
276 mem_attrs
*p
= (mem_attrs
*) x
;
277 mem_attrs
*q
= (mem_attrs
*) y
;
279 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
280 && p
->size
== q
->size
&& p
->align
== q
->align
);
283 /* Allocate a new mem_attrs structure and insert it into the hash table if
284 one identical to it is not already in the table. We are doing this for
288 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
294 enum machine_mode mode
;
299 /* If everything is the default, we can just return zero. */
300 if (alias
== 0 && expr
== 0 && offset
== 0
302 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
303 && (align
== BITS_PER_UNIT
305 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
325 don't attempt to share with the various global pieces of rtl (such as
326 frame_pointer_rtx). */
329 gen_raw_REG (mode
, regno
)
330 enum machine_mode mode
;
333 rtx x
= gen_rtx_raw_REG (mode
, regno
);
334 ORIGINAL_REGNO (x
) = regno
;
338 /* There are some RTL codes that require special attention; the generation
339 functions do the raw handling. If you add to this list, modify
340 special_rtx in gengenrtl.c as well. */
343 gen_rtx_CONST_INT (mode
, arg
)
344 enum machine_mode mode ATTRIBUTE_UNUSED
;
349 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
350 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
352 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
353 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
354 return const_true_rtx
;
357 /* Look up the CONST_INT in the hash table. */
358 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
359 (hashval_t
) arg
, INSERT
);
361 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
367 gen_int_mode (c
, mode
)
369 enum machine_mode mode
;
371 return GEN_INT (trunc_int_for_mode (c
, mode
));
374 /* CONST_DOUBLEs might be created from pairs of integers, or from
375 REAL_VALUE_TYPEs. Also, their length is known only at run time,
376 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
378 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
379 hash table. If so, return its counterpart; otherwise add it
380 to the hash table and return it. */
382 lookup_const_double (real
)
385 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
392 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
393 VALUE in mode MODE. */
395 const_double_from_real_value (value
, mode
)
396 REAL_VALUE_TYPE value
;
397 enum machine_mode mode
;
399 rtx real
= rtx_alloc (CONST_DOUBLE
);
400 PUT_MODE (real
, mode
);
402 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
404 return lookup_const_double (real
);
407 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
408 of ints: I0 is the low-order word and I1 is the high-order word.
409 Do not use this routine for non-integer modes; convert to
410 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
413 immed_double_const (i0
, i1
, mode
)
414 HOST_WIDE_INT i0
, i1
;
415 enum machine_mode mode
;
420 if (mode
!= VOIDmode
)
423 if (GET_MODE_CLASS (mode
) != MODE_INT
424 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
425 /* We can get a 0 for an error mark. */
426 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
427 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
430 /* We clear out all bits that don't belong in MODE, unless they and
431 our sign bit are all one. So we get either a reasonable negative
432 value or a reasonable unsigned value for this mode. */
433 width
= GET_MODE_BITSIZE (mode
);
434 if (width
< HOST_BITS_PER_WIDE_INT
435 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
436 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
437 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
438 else if (width
== HOST_BITS_PER_WIDE_INT
439 && ! (i1
== ~0 && i0
< 0))
441 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
442 /* We cannot represent this value as a constant. */
445 /* If this would be an entire word for the target, but is not for
446 the host, then sign-extend on the host so that the number will
447 look the same way on the host that it would on the target.
449 For example, when building a 64 bit alpha hosted 32 bit sparc
450 targeted compiler, then we want the 32 bit unsigned value -1 to be
451 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
452 The latter confuses the sparc backend. */
454 if (width
< HOST_BITS_PER_WIDE_INT
455 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
456 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
458 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
461 ??? Strictly speaking, this is wrong if we create a CONST_INT for
462 a large unsigned constant with the size of MODE being
463 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
464 in a wider mode. In that case we will mis-interpret it as a
467 Unfortunately, the only alternative is to make a CONST_DOUBLE for
468 any constant in any mode if it is an unsigned constant larger
469 than the maximum signed integer in an int on the host. However,
470 doing this will break everyone that always expects to see a
471 CONST_INT for SImode and smaller.
473 We have always been making CONST_INTs in this case, so nothing
474 new is being broken. */
476 if (width
<= HOST_BITS_PER_WIDE_INT
)
477 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
480 /* If this integer fits in one word, return a CONST_INT. */
481 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
484 /* We use VOIDmode for integers. */
485 value
= rtx_alloc (CONST_DOUBLE
);
486 PUT_MODE (value
, VOIDmode
);
488 CONST_DOUBLE_LOW (value
) = i0
;
489 CONST_DOUBLE_HIGH (value
) = i1
;
491 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
492 XWINT (value
, i
) = 0;
494 return lookup_const_double (value
);
498 gen_rtx_REG (mode
, regno
)
499 enum machine_mode mode
;
502 /* In case the MD file explicitly references the frame pointer, have
503 all such references point to the same frame pointer. This is
504 used during frame pointer elimination to distinguish the explicit
505 references to these registers from pseudos that happened to be
508 If we have eliminated the frame pointer or arg pointer, we will
509 be using it as a normal register, for example as a spill
510 register. In such cases, we might be accessing it in a mode that
511 is not Pmode and therefore cannot use the pre-allocated rtx.
513 Also don't do this when we are making new REGs in reload, since
514 we don't want to get confused with the real pointers. */
516 if (mode
== Pmode
&& !reload_in_progress
)
518 if (regno
== FRAME_POINTER_REGNUM
519 && (!reload_completed
|| frame_pointer_needed
))
520 return frame_pointer_rtx
;
521 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
522 if (regno
== HARD_FRAME_POINTER_REGNUM
523 && (!reload_completed
|| frame_pointer_needed
))
524 return hard_frame_pointer_rtx
;
526 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
527 if (regno
== ARG_POINTER_REGNUM
)
528 return arg_pointer_rtx
;
530 #ifdef RETURN_ADDRESS_POINTER_REGNUM
531 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
532 return return_address_pointer_rtx
;
534 if (regno
== PIC_OFFSET_TABLE_REGNUM
535 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
536 return pic_offset_table_rtx
;
537 if (regno
== STACK_POINTER_REGNUM
)
538 return stack_pointer_rtx
;
542 /* If the per-function register table has been set up, try to re-use
543 an existing entry in that table to avoid useless generation of RTL.
545 This code is disabled for now until we can fix the various backends
546 which depend on having non-shared hard registers in some cases. Long
547 term we want to re-enable this code as it can significantly cut down
548 on the amount of useless RTL that gets generated.
550 We'll also need to fix some code that runs after reload that wants to
551 set ORIGINAL_REGNO. */
556 && regno
< FIRST_PSEUDO_REGISTER
557 && reg_raw_mode
[regno
] == mode
)
558 return regno_reg_rtx
[regno
];
561 return gen_raw_REG (mode
, regno
);
565 gen_rtx_MEM (mode
, addr
)
566 enum machine_mode mode
;
569 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
571 /* This field is not cleared by the mere allocation of the rtx, so
579 gen_rtx_SUBREG (mode
, reg
, offset
)
580 enum machine_mode mode
;
584 /* This is the most common failure type.
585 Catch it early so we can see who does it. */
586 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
589 /* This check isn't usable right now because combine will
590 throw arbitrary crap like a CALL into a SUBREG in
591 gen_lowpart_for_combine so we must just eat it. */
593 /* Check for this too. */
594 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
597 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
600 /* Generate a SUBREG representing the least-significant part of REG if MODE
601 is smaller than mode of REG, otherwise paradoxical SUBREG. */
604 gen_lowpart_SUBREG (mode
, reg
)
605 enum machine_mode mode
;
608 enum machine_mode inmode
;
610 inmode
= GET_MODE (reg
);
611 if (inmode
== VOIDmode
)
613 return gen_rtx_SUBREG (mode
, reg
,
614 subreg_lowpart_offset (mode
, inmode
));
617 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
619 ** This routine generates an RTX of the size specified by
620 ** <code>, which is an RTX code. The RTX structure is initialized
621 ** from the arguments <element1> through <elementn>, which are
622 ** interpreted according to the specific RTX type's format. The
623 ** special machine mode associated with the rtx (if any) is specified
626 ** gen_rtx can be invoked in a way which resembles the lisp-like
627 ** rtx it will generate. For example, the following rtx structure:
629 ** (plus:QI (mem:QI (reg:SI 1))
630 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
632 ** ...would be generated by the following C code:
634 ** gen_rtx (PLUS, QImode,
635 ** gen_rtx (MEM, QImode,
636 ** gen_rtx (REG, SImode, 1)),
637 ** gen_rtx (MEM, QImode,
638 ** gen_rtx (PLUS, SImode,
639 ** gen_rtx (REG, SImode, 2),
640 ** gen_rtx (REG, SImode, 3)))),
645 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
647 int i
; /* Array indices... */
648 const char *fmt
; /* Current rtx's format... */
649 rtx rt_val
; /* RTX to return to caller... */
652 VA_FIXEDARG (p
, enum rtx_code
, code
);
653 VA_FIXEDARG (p
, enum machine_mode
, mode
);
658 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
663 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
664 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
666 rt_val
= immed_double_const (arg0
, arg1
, mode
);
671 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
675 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
679 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
680 rt_val
->mode
= mode
; /* Store the machine mode... */
682 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
683 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
687 case '0': /* Unused field. */
690 case 'i': /* An integer? */
691 XINT (rt_val
, i
) = va_arg (p
, int);
694 case 'w': /* A wide integer? */
695 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
698 case 's': /* A string? */
699 XSTR (rt_val
, i
) = va_arg (p
, char *);
702 case 'e': /* An expression? */
703 case 'u': /* An insn? Same except when printing. */
704 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
707 case 'E': /* An RTX vector? */
708 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
711 case 'b': /* A bitmap? */
712 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
715 case 't': /* A tree? */
716 XTREE (rt_val
, i
) = va_arg (p
, tree
);
730 /* gen_rtvec (n, [rt1, ..., rtn])
732 ** This routine creates an rtvec and stores within it the
733 ** pointers to rtx's which are its arguments.
738 gen_rtvec
VPARAMS ((int n
, ...))
744 VA_FIXEDARG (p
, int, n
);
747 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
749 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
751 for (i
= 0; i
< n
; i
++)
752 vector
[i
] = va_arg (p
, rtx
);
754 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
758 return gen_rtvec_v (save_n
, vector
);
762 gen_rtvec_v (n
, argp
)
770 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
772 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
774 for (i
= 0; i
< n
; i
++)
775 rt_val
->elem
[i
] = *argp
++;
780 /* Generate a REG rtx for a new pseudo register of mode MODE.
781 This pseudo is assigned the next sequential register number. */
785 enum machine_mode mode
;
787 struct function
*f
= cfun
;
790 /* Don't let anything called after initial flow analysis create new
795 if (generating_concat_p
796 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
797 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
799 /* For complex modes, don't make a single pseudo.
800 Instead, make a CONCAT of two pseudos.
801 This allows noncontiguous allocation of the real and imaginary parts,
802 which makes much better code. Besides, allocating DCmode
803 pseudos overstrains reload on some machines like the 386. */
804 rtx realpart
, imagpart
;
805 int size
= GET_MODE_UNIT_SIZE (mode
);
806 enum machine_mode partmode
807 = mode_for_size (size
* BITS_PER_UNIT
,
808 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
809 ? MODE_FLOAT
: MODE_INT
),
812 realpart
= gen_reg_rtx (partmode
);
813 imagpart
= gen_reg_rtx (partmode
);
814 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
817 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
818 enough to have an element for this pseudo reg number. */
820 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
822 int old_size
= f
->emit
->regno_pointer_align_length
;
827 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
828 memset (new + old_size
, 0, old_size
);
829 f
->emit
->regno_pointer_align
= (unsigned char *) new;
831 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
832 old_size
* 2 * sizeof (rtx
));
833 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
834 regno_reg_rtx
= new1
;
836 new2
= (tree
*) ggc_realloc (f
->emit
->regno_decl
,
837 old_size
* 2 * sizeof (tree
));
838 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
839 f
->emit
->regno_decl
= new2
;
841 f
->emit
->regno_pointer_align_length
= old_size
* 2;
844 val
= gen_raw_REG (mode
, reg_rtx_no
);
845 regno_reg_rtx
[reg_rtx_no
++] = val
;
849 /* Identify REG (which may be a CONCAT) as a user register. */
855 if (GET_CODE (reg
) == CONCAT
)
857 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
858 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
860 else if (GET_CODE (reg
) == REG
)
861 REG_USERVAR_P (reg
) = 1;
866 /* Identify REG as a probable pointer register and show its alignment
867 as ALIGN, if nonzero. */
870 mark_reg_pointer (reg
, align
)
874 if (! REG_POINTER (reg
))
876 REG_POINTER (reg
) = 1;
879 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
881 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
882 /* We can no-longer be sure just how aligned this pointer is */
883 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
886 /* Return 1 plus largest pseudo reg number used in the current function. */
894 /* Return 1 + the largest label number used so far in the current function. */
899 if (last_label_num
&& label_num
== base_label_num
)
900 return last_label_num
;
904 /* Return first label number used in this function (if any were used). */
907 get_first_label_num ()
909 return first_label_num
;
912 /* Return the final regno of X, which is a SUBREG of a hard
915 subreg_hard_regno (x
, check_mode
)
919 enum machine_mode mode
= GET_MODE (x
);
920 unsigned int byte_offset
, base_regno
, final_regno
;
921 rtx reg
= SUBREG_REG (x
);
923 /* This is where we attempt to catch illegal subregs
924 created by the compiler. */
925 if (GET_CODE (x
) != SUBREG
926 || GET_CODE (reg
) != REG
)
928 base_regno
= REGNO (reg
);
929 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
931 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
934 /* Catch non-congruent offsets too. */
935 byte_offset
= SUBREG_BYTE (x
);
936 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
939 final_regno
= subreg_regno (x
);
944 /* Return a value representing some low-order bits of X, where the number
945 of low-order bits is given by MODE. Note that no conversion is done
946 between floating-point and fixed-point values, rather, the bit
947 representation is returned.
949 This function handles the cases in common between gen_lowpart, below,
950 and two variants in cse.c and combine.c. These are the cases that can
951 be safely handled at all points in the compilation.
953 If this is not a case we can handle, return 0. */
956 gen_lowpart_common (mode
, x
)
957 enum machine_mode mode
;
960 int msize
= GET_MODE_SIZE (mode
);
961 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
964 if (GET_MODE (x
) == mode
)
967 /* MODE must occupy no more words than the mode of X. */
968 if (GET_MODE (x
) != VOIDmode
969 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
970 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
973 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
974 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
975 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
978 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
980 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
981 && (GET_MODE_CLASS (mode
) == MODE_INT
982 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
984 /* If we are getting the low-order part of something that has been
985 sign- or zero-extended, we can either just use the object being
986 extended or make a narrower extension. If we want an even smaller
987 piece than the size of the object being extended, call ourselves
990 This case is used mostly by combine and cse. */
992 if (GET_MODE (XEXP (x
, 0)) == mode
)
994 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
995 return gen_lowpart_common (mode
, XEXP (x
, 0));
996 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
997 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
999 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1000 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
1001 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
1002 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1003 from the low-order part of the constant. */
1004 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1005 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1006 && GET_MODE (x
) == VOIDmode
1007 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1009 /* If MODE is twice the host word size, X is already the desired
1010 representation. Otherwise, if MODE is wider than a word, we can't
1011 do this. If MODE is exactly a word, return just one CONST_INT. */
1013 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1015 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1017 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1018 return (GET_CODE (x
) == CONST_INT
? x
1019 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1022 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1023 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1024 : CONST_DOUBLE_LOW (x
));
1026 /* Sign extend to HOST_WIDE_INT. */
1027 val
= trunc_int_for_mode (val
, mode
);
1029 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1034 /* The floating-point emulator can handle all conversions between
1035 FP and integer operands. This simplifies reload because it
1036 doesn't have to deal with constructs like (subreg:DI
1037 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1038 /* Single-precision floats are always 32-bits and double-precision
1039 floats are always 64-bits. */
1041 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1042 && GET_MODE_BITSIZE (mode
) == 32
1043 && GET_CODE (x
) == CONST_INT
)
1046 long i
= INTVAL (x
);
1048 real_from_target (&r
, &i
, mode
);
1049 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1051 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1052 && GET_MODE_BITSIZE (mode
) == 64
1053 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1054 && GET_MODE (x
) == VOIDmode
)
1057 HOST_WIDE_INT low
, high
;
1060 if (GET_CODE (x
) == CONST_INT
)
1063 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1067 low
= CONST_DOUBLE_LOW (x
);
1068 high
= CONST_DOUBLE_HIGH (x
);
1071 if (HOST_BITS_PER_WIDE_INT
> 32)
1072 high
= low
>> 31 >> 1;
1074 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1076 if (WORDS_BIG_ENDIAN
)
1077 i
[0] = high
, i
[1] = low
;
1079 i
[0] = low
, i
[1] = high
;
1081 real_from_target (&r
, i
, mode
);
1082 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1084 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1085 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1086 && GET_CODE (x
) == CONST_DOUBLE
1087 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1090 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1091 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1093 /* Convert 'r' into an array of four 32-bit words in target word
1095 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1096 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1099 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1102 i
[3 - 3 * endian
] = 0;
1105 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1106 i
[2 - 2 * endian
] = 0;
1107 i
[3 - 2 * endian
] = 0;
1110 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1111 i
[3 - 3 * endian
] = 0;
1114 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1119 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1121 #if HOST_BITS_PER_WIDE_INT == 32
1122 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1124 if (HOST_BITS_PER_WIDE_INT
!= 64)
1127 return immed_double_const ((((unsigned long) i
[3 * endian
])
1128 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1129 (((unsigned long) i
[2 - endian
])
1130 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1135 /* Otherwise, we can't do this. */
1139 /* Return the real part (which has mode MODE) of a complex value X.
1140 This always comes at the low address in memory. */
1143 gen_realpart (mode
, x
)
1144 enum machine_mode mode
;
1147 if (WORDS_BIG_ENDIAN
1148 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1150 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1152 ("can't access real part of complex value in hard register");
1153 else if (WORDS_BIG_ENDIAN
)
1154 return gen_highpart (mode
, x
);
1156 return gen_lowpart (mode
, x
);
1159 /* Return the imaginary part (which has mode MODE) of a complex value X.
1160 This always comes at the high address in memory. */
1163 gen_imagpart (mode
, x
)
1164 enum machine_mode mode
;
1167 if (WORDS_BIG_ENDIAN
)
1168 return gen_lowpart (mode
, x
);
1169 else if (! WORDS_BIG_ENDIAN
1170 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1172 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1174 ("can't access imaginary part of complex value in hard register");
1176 return gen_highpart (mode
, x
);
1179 /* Return 1 iff X, assumed to be a SUBREG,
1180 refers to the real part of the complex value in its containing reg.
1181 Complex values are always stored with the real part in the first word,
1182 regardless of WORDS_BIG_ENDIAN. */
1185 subreg_realpart_p (x
)
1188 if (GET_CODE (x
) != SUBREG
)
1191 return ((unsigned int) SUBREG_BYTE (x
)
1192 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1195 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1196 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1197 least-significant part of X.
1198 MODE specifies how big a part of X to return;
1199 it usually should not be larger than a word.
1200 If X is a MEM whose address is a QUEUED, the value may be so also. */
1203 gen_lowpart (mode
, x
)
1204 enum machine_mode mode
;
1207 rtx result
= gen_lowpart_common (mode
, x
);
1211 else if (GET_CODE (x
) == REG
)
1213 /* Must be a hard reg that's not valid in MODE. */
1214 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1219 else if (GET_CODE (x
) == MEM
)
1221 /* The only additional case we can do is MEM. */
1223 if (WORDS_BIG_ENDIAN
)
1224 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1225 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1227 if (BYTES_BIG_ENDIAN
)
1228 /* Adjust the address so that the address-after-the-data
1230 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1231 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1233 return adjust_address (x
, mode
, offset
);
1235 else if (GET_CODE (x
) == ADDRESSOF
)
1236 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1241 /* Like `gen_lowpart', but refer to the most significant part.
1242 This is used to access the imaginary part of a complex number. */
1245 gen_highpart (mode
, x
)
1246 enum machine_mode mode
;
1249 unsigned int msize
= GET_MODE_SIZE (mode
);
1252 /* This case loses if X is a subreg. To catch bugs early,
1253 complain if an invalid MODE is used even in other cases. */
1254 if (msize
> UNITS_PER_WORD
1255 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1258 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1259 subreg_highpart_offset (mode
, GET_MODE (x
)));
1261 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1262 the target if we have a MEM. gen_highpart must return a valid operand,
1263 emitting code if necessary to do so. */
1264 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1265 result
= validize_mem (result
);
1272 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1273 be VOIDmode constant. */
1275 gen_highpart_mode (outermode
, innermode
, exp
)
1276 enum machine_mode outermode
, innermode
;
1279 if (GET_MODE (exp
) != VOIDmode
)
1281 if (GET_MODE (exp
) != innermode
)
1283 return gen_highpart (outermode
, exp
);
1285 return simplify_gen_subreg (outermode
, exp
, innermode
,
1286 subreg_highpart_offset (outermode
, innermode
));
1289 /* Return offset in bytes to get OUTERMODE low part
1290 of the value in mode INNERMODE stored in memory in target format. */
1293 subreg_lowpart_offset (outermode
, innermode
)
1294 enum machine_mode outermode
, innermode
;
1296 unsigned int offset
= 0;
1297 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1301 if (WORDS_BIG_ENDIAN
)
1302 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1303 if (BYTES_BIG_ENDIAN
)
1304 offset
+= difference
% UNITS_PER_WORD
;
1310 /* Return offset in bytes to get OUTERMODE high part
1311 of the value in mode INNERMODE stored in memory in target format. */
1313 subreg_highpart_offset (outermode
, innermode
)
1314 enum machine_mode outermode
, innermode
;
1316 unsigned int offset
= 0;
1317 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1319 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1324 if (! WORDS_BIG_ENDIAN
)
1325 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1326 if (! BYTES_BIG_ENDIAN
)
1327 offset
+= difference
% UNITS_PER_WORD
;
1333 /* Return 1 iff X, assumed to be a SUBREG,
1334 refers to the least significant part of its containing reg.
1335 If X is not a SUBREG, always return 1 (it is its own low part!). */
1338 subreg_lowpart_p (x
)
1341 if (GET_CODE (x
) != SUBREG
)
1343 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1346 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1347 == SUBREG_BYTE (x
));
1351 /* Helper routine for all the constant cases of operand_subword.
1352 Some places invoke this directly. */
1355 constant_subword (op
, offset
, mode
)
1358 enum machine_mode mode
;
1360 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1363 /* If OP is already an integer word, return it. */
1364 if (GET_MODE_CLASS (mode
) == MODE_INT
1365 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1368 /* The output is some bits, the width of the target machine's word.
1369 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1371 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1372 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1373 && GET_MODE_BITSIZE (mode
) == 64
1374 && GET_CODE (op
) == CONST_DOUBLE
)
1379 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1380 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1382 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1383 which the words are written depends on the word endianness.
1384 ??? This is a potential portability problem and should
1385 be fixed at some point.
1387 We must exercise caution with the sign bit. By definition there
1388 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1389 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1390 So we explicitly mask and sign-extend as necessary. */
1391 if (BITS_PER_WORD
== 32)
1394 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1395 return GEN_INT (val
);
1397 #if HOST_BITS_PER_WIDE_INT >= 64
1398 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1400 val
= k
[! WORDS_BIG_ENDIAN
];
1401 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1402 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1403 return GEN_INT (val
);
1406 else if (BITS_PER_WORD
== 16)
1408 val
= k
[offset
>> 1];
1409 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1411 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1412 return GEN_INT (val
);
1417 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1418 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1419 && GET_MODE_BITSIZE (mode
) > 64
1420 && GET_CODE (op
) == CONST_DOUBLE
)
1425 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1426 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1428 if (BITS_PER_WORD
== 32)
1431 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1432 return GEN_INT (val
);
1434 #if HOST_BITS_PER_WIDE_INT >= 64
1435 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1437 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1438 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1439 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1440 return GEN_INT (val
);
1447 /* Single word float is a little harder, since single- and double-word
1448 values often do not have the same high-order bits. We have already
1449 verified that we want the only defined word of the single-word value. */
1450 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1451 && GET_MODE_BITSIZE (mode
) == 32
1452 && GET_CODE (op
) == CONST_DOUBLE
)
1457 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1458 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1460 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1462 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1464 if (BITS_PER_WORD
== 16)
1466 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1468 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1471 return GEN_INT (val
);
1474 /* The only remaining cases that we can handle are integers.
1475 Convert to proper endianness now since these cases need it.
1476 At this point, offset == 0 means the low-order word.
1478 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1479 in general. However, if OP is (const_int 0), we can just return
1482 if (op
== const0_rtx
)
1485 if (GET_MODE_CLASS (mode
) != MODE_INT
1486 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1487 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1490 if (WORDS_BIG_ENDIAN
)
1491 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1493 /* Find out which word on the host machine this value is in and get
1494 it from the constant. */
1495 val
= (offset
/ size_ratio
== 0
1496 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1497 : (GET_CODE (op
) == CONST_INT
1498 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1500 /* Get the value we want into the low bits of val. */
1501 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1502 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1504 val
= trunc_int_for_mode (val
, word_mode
);
1506 return GEN_INT (val
);
1509 /* Return subword OFFSET of operand OP.
1510 The word number, OFFSET, is interpreted as the word number starting
1511 at the low-order address. OFFSET 0 is the low-order word if not
1512 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1514 If we cannot extract the required word, we return zero. Otherwise,
1515 an rtx corresponding to the requested word will be returned.
1517 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1518 reload has completed, a valid address will always be returned. After
1519 reload, if a valid address cannot be returned, we return zero.
1521 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1522 it is the responsibility of the caller.
1524 MODE is the mode of OP in case it is a CONST_INT.
1526 ??? This is still rather broken for some cases. The problem for the
1527 moment is that all callers of this thing provide no 'goal mode' to
1528 tell us to work with. This exists because all callers were written
1529 in a word based SUBREG world.
1530 Now use of this function can be deprecated by simplify_subreg in most
1535 operand_subword (op
, offset
, validate_address
, mode
)
1537 unsigned int offset
;
1538 int validate_address
;
1539 enum machine_mode mode
;
1541 if (mode
== VOIDmode
)
1542 mode
= GET_MODE (op
);
1544 if (mode
== VOIDmode
)
1547 /* If OP is narrower than a word, fail. */
1549 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1552 /* If we want a word outside OP, return zero. */
1554 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1557 /* Form a new MEM at the requested address. */
1558 if (GET_CODE (op
) == MEM
)
1560 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1562 if (! validate_address
)
1565 else if (reload_completed
)
1567 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1571 return replace_equiv_address (new, XEXP (new, 0));
1574 /* Rest can be handled by simplify_subreg. */
1575 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1578 /* Similar to `operand_subword', but never return 0. If we can't extract
1579 the required subword, put OP into a register and try again. If that fails,
1580 abort. We always validate the address in this case.
1582 MODE is the mode of OP, in case it is CONST_INT. */
1585 operand_subword_force (op
, offset
, mode
)
1587 unsigned int offset
;
1588 enum machine_mode mode
;
1590 rtx result
= operand_subword (op
, offset
, 1, mode
);
1595 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1597 /* If this is a register which can not be accessed by words, copy it
1598 to a pseudo register. */
1599 if (GET_CODE (op
) == REG
)
1600 op
= copy_to_reg (op
);
1602 op
= force_reg (mode
, op
);
1605 result
= operand_subword (op
, offset
, 1, mode
);
1612 /* Given a compare instruction, swap the operands.
1613 A test instruction is changed into a compare of 0 against the operand. */
1616 reverse_comparison (insn
)
1619 rtx body
= PATTERN (insn
);
1622 if (GET_CODE (body
) == SET
)
1623 comp
= SET_SRC (body
);
1625 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1627 if (GET_CODE (comp
) == COMPARE
)
1629 rtx op0
= XEXP (comp
, 0);
1630 rtx op1
= XEXP (comp
, 1);
1631 XEXP (comp
, 0) = op1
;
1632 XEXP (comp
, 1) = op0
;
1636 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1637 CONST0_RTX (GET_MODE (comp
)), comp
);
1638 if (GET_CODE (body
) == SET
)
1639 SET_SRC (body
) = new;
1641 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1645 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1646 or (2) a component ref of something variable. Represent the later with
1647 a NULL expression. */
1650 component_ref_for_mem_expr (ref
)
1653 tree inner
= TREE_OPERAND (ref
, 0);
1655 if (TREE_CODE (inner
) == COMPONENT_REF
)
1656 inner
= component_ref_for_mem_expr (inner
);
1659 tree placeholder_ptr
= 0;
1661 /* Now remove any conversions: they don't change what the underlying
1662 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1663 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1664 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1665 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1666 || TREE_CODE (inner
) == SAVE_EXPR
1667 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1668 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1669 inner
= find_placeholder (inner
, &placeholder_ptr
);
1671 inner
= TREE_OPERAND (inner
, 0);
1673 if (! DECL_P (inner
))
1677 if (inner
== TREE_OPERAND (ref
, 0))
1680 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1681 TREE_OPERAND (ref
, 1));
1684 /* Given REF, a MEM, and T, either the type of X or the expression
1685 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1686 if we are making a new object of this type. BITPOS is nonzero if
1687 there is an offset outstanding on T that will be applied later. */
1690 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1694 HOST_WIDE_INT bitpos
;
1696 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1697 tree expr
= MEM_EXPR (ref
);
1698 rtx offset
= MEM_OFFSET (ref
);
1699 rtx size
= MEM_SIZE (ref
);
1700 unsigned int align
= MEM_ALIGN (ref
);
1701 HOST_WIDE_INT apply_bitpos
= 0;
1704 /* It can happen that type_for_mode was given a mode for which there
1705 is no language-level type. In which case it returns NULL, which
1710 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1712 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1713 wrong answer, as it assumes that DECL_RTL already has the right alias
1714 info. Callers should not set DECL_RTL until after the call to
1715 set_mem_attributes. */
1716 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1719 /* Get the alias set from the expression or type (perhaps using a
1720 front-end routine) and use it. */
1721 alias
= get_alias_set (t
);
1723 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1724 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1725 RTX_UNCHANGING_P (ref
)
1726 |= ((lang_hooks
.honor_readonly
1727 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1728 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1730 /* If we are making an object of this type, or if this is a DECL, we know
1731 that it is a scalar if the type is not an aggregate. */
1732 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1733 MEM_SCALAR_P (ref
) = 1;
1735 /* We can set the alignment from the type if we are making an object,
1736 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1737 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1738 align
= MAX (align
, TYPE_ALIGN (type
));
1740 /* If the size is known, we can set that. */
1741 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1742 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1744 /* If T is not a type, we may be able to deduce some more information about
1748 maybe_set_unchanging (ref
, t
);
1749 if (TREE_THIS_VOLATILE (t
))
1750 MEM_VOLATILE_P (ref
) = 1;
1752 /* Now remove any conversions: they don't change what the underlying
1753 object is. Likewise for SAVE_EXPR. */
1754 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1755 || TREE_CODE (t
) == NON_LVALUE_EXPR
1756 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1757 || TREE_CODE (t
) == SAVE_EXPR
)
1758 t
= TREE_OPERAND (t
, 0);
1760 /* If this expression can't be addressed (e.g., it contains a reference
1761 to a non-addressable field), show we don't change its alias set. */
1762 if (! can_address_p (t
))
1763 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1765 /* If this is a decl, set the attributes of the MEM from it. */
1769 offset
= const0_rtx
;
1770 apply_bitpos
= bitpos
;
1771 size
= (DECL_SIZE_UNIT (t
)
1772 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1773 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1774 align
= DECL_ALIGN (t
);
1777 /* If this is a constant, we know the alignment. */
1778 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1780 align
= TYPE_ALIGN (type
);
1781 #ifdef CONSTANT_ALIGNMENT
1782 align
= CONSTANT_ALIGNMENT (t
, align
);
1786 /* If this is a field reference and not a bit-field, record it. */
1787 /* ??? There is some information that can be gleened from bit-fields,
1788 such as the word offset in the structure that might be modified.
1789 But skip it for now. */
1790 else if (TREE_CODE (t
) == COMPONENT_REF
1791 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1793 expr
= component_ref_for_mem_expr (t
);
1794 offset
= const0_rtx
;
1795 apply_bitpos
= bitpos
;
1796 /* ??? Any reason the field size would be different than
1797 the size we got from the type? */
1800 /* If this is an array reference, look for an outer field reference. */
1801 else if (TREE_CODE (t
) == ARRAY_REF
)
1803 tree off_tree
= size_zero_node
;
1807 tree index
= TREE_OPERAND (t
, 1);
1808 tree array
= TREE_OPERAND (t
, 0);
1809 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1810 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1811 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1813 /* We assume all arrays have sizes that are a multiple of a byte.
1814 First subtract the lower bound, if any, in the type of the
1815 index, then convert to sizetype and multiply by the size of the
1817 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1818 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1821 /* If the index has a self-referential type, pass it to a
1822 WITH_RECORD_EXPR; if the component size is, pass our
1823 component to one. */
1824 if (! TREE_CONSTANT (index
)
1825 && contains_placeholder_p (index
))
1826 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t
);
1827 if (! TREE_CONSTANT (unit_size
)
1828 && contains_placeholder_p (unit_size
))
1829 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1833 = fold (build (PLUS_EXPR
, sizetype
,
1834 fold (build (MULT_EXPR
, sizetype
,
1838 t
= TREE_OPERAND (t
, 0);
1840 while (TREE_CODE (t
) == ARRAY_REF
);
1846 if (host_integerp (off_tree
, 1))
1848 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1849 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1850 align
= DECL_ALIGN (t
);
1851 if (aoff
&& aoff
< align
)
1853 offset
= GEN_INT (ioff
);
1854 apply_bitpos
= bitpos
;
1857 else if (TREE_CODE (t
) == COMPONENT_REF
)
1859 expr
= component_ref_for_mem_expr (t
);
1860 if (host_integerp (off_tree
, 1))
1862 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1863 apply_bitpos
= bitpos
;
1865 /* ??? Any reason the field size would be different than
1866 the size we got from the type? */
1868 else if (flag_argument_noalias
> 1
1869 && TREE_CODE (t
) == INDIRECT_REF
1870 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1877 /* If this is a Fortran indirect argument reference, record the
1879 else if (flag_argument_noalias
> 1
1880 && TREE_CODE (t
) == INDIRECT_REF
1881 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1888 /* If we modified OFFSET based on T, then subtract the outstanding
1889 bit position offset. Similarly, increase the size of the accessed
1890 object to contain the negative offset. */
1893 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1895 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1898 /* Now set the attributes we computed above. */
1900 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1902 /* If this is already known to be a scalar or aggregate, we are done. */
1903 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1906 /* If it is a reference into an aggregate, this is part of an aggregate.
1907 Otherwise we don't know. */
1908 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1909 || TREE_CODE (t
) == ARRAY_RANGE_REF
1910 || TREE_CODE (t
) == BIT_FIELD_REF
)
1911 MEM_IN_STRUCT_P (ref
) = 1;
1915 set_mem_attributes (ref
, t
, objectp
)
1920 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1923 /* Set the alias set of MEM to SET. */
1926 set_mem_alias_set (mem
, set
)
1930 #ifdef ENABLE_CHECKING
1931 /* If the new and old alias sets don't conflict, something is wrong. */
1932 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1936 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1937 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1941 /* Set the alignment of MEM to ALIGN bits. */
1944 set_mem_align (mem
, align
)
1948 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1949 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1953 /* Set the expr for MEM to EXPR. */
1956 set_mem_expr (mem
, expr
)
1961 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1962 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1965 /* Set the offset of MEM to OFFSET. */
1968 set_mem_offset (mem
, offset
)
1971 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1972 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1976 /* Set the size of MEM to SIZE. */
1979 set_mem_size (mem
, size
)
1982 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1983 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1987 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1988 and its address changed to ADDR. (VOIDmode means don't change the mode.
1989 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1990 returned memory location is required to be valid. The memory
1991 attributes are not changed. */
1994 change_address_1 (memref
, mode
, addr
, validate
)
1996 enum machine_mode mode
;
2002 if (GET_CODE (memref
) != MEM
)
2004 if (mode
== VOIDmode
)
2005 mode
= GET_MODE (memref
);
2007 addr
= XEXP (memref
, 0);
2011 if (reload_in_progress
|| reload_completed
)
2013 if (! memory_address_p (mode
, addr
))
2017 addr
= memory_address (mode
, addr
);
2020 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2023 new = gen_rtx_MEM (mode
, addr
);
2024 MEM_COPY_ATTRIBUTES (new, memref
);
2028 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2029 way we are changing MEMREF, so we only preserve the alias set. */
2032 change_address (memref
, mode
, addr
)
2034 enum machine_mode mode
;
2037 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
2038 enum machine_mode mmode
= GET_MODE (new);
2041 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
2042 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
2043 (mmode
== BLKmode
? BITS_PER_UNIT
2044 : GET_MODE_ALIGNMENT (mmode
)),
2050 /* Return a memory reference like MEMREF, but with its mode changed
2051 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2052 nonzero, the memory address is forced to be valid.
2053 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2054 and caller is responsible for adjusting MEMREF base register. */
2057 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2059 enum machine_mode mode
;
2060 HOST_WIDE_INT offset
;
2061 int validate
, adjust
;
2063 rtx addr
= XEXP (memref
, 0);
2065 rtx memoffset
= MEM_OFFSET (memref
);
2067 unsigned int memalign
= MEM_ALIGN (memref
);
2069 /* ??? Prefer to create garbage instead of creating shared rtl.
2070 This may happen even if offset is nonzero -- consider
2071 (plus (plus reg reg) const_int) -- so do this always. */
2072 addr
= copy_rtx (addr
);
2076 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2077 object, we can merge it into the LO_SUM. */
2078 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2080 && (unsigned HOST_WIDE_INT
) offset
2081 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2082 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2083 plus_constant (XEXP (addr
, 1), offset
));
2085 addr
= plus_constant (addr
, offset
);
2088 new = change_address_1 (memref
, mode
, addr
, validate
);
2090 /* Compute the new values of the memory attributes due to this adjustment.
2091 We add the offsets and update the alignment. */
2093 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2095 /* Compute the new alignment by taking the MIN of the alignment and the
2096 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2101 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2103 /* We can compute the size in a number of ways. */
2104 if (GET_MODE (new) != BLKmode
)
2105 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2106 else if (MEM_SIZE (memref
))
2107 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2109 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2110 memoffset
, size
, memalign
, GET_MODE (new));
2112 /* At some point, we should validate that this offset is within the object,
2113 if all the appropriate values are known. */
2117 /* Return a memory reference like MEMREF, but with its mode changed
2118 to MODE and its address changed to ADDR, which is assumed to be
2119 MEMREF offseted by OFFSET bytes. If VALIDATE is
2120 nonzero, the memory address is forced to be valid. */
2123 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2125 enum machine_mode mode
;
2127 HOST_WIDE_INT offset
;
2130 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2131 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2134 /* Return a memory reference like MEMREF, but whose address is changed by
2135 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2136 known to be in OFFSET (possibly 1). */
2139 offset_address (memref
, offset
, pow2
)
2144 rtx
new, addr
= XEXP (memref
, 0);
2146 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2148 /* At this point we don't know _why_ the address is invalid. It
2149 could have secondary memory refereces, multiplies or anything.
2151 However, if we did go and rearrange things, we can wind up not
2152 being able to recognize the magic around pic_offset_table_rtx.
2153 This stuff is fragile, and is yet another example of why it is
2154 bad to expose PIC machinery too early. */
2155 if (! memory_address_p (GET_MODE (memref
), new)
2156 && GET_CODE (addr
) == PLUS
2157 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2159 addr
= force_reg (GET_MODE (addr
), addr
);
2160 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2163 update_temp_slot_address (XEXP (memref
, 0), new);
2164 new = change_address_1 (memref
, VOIDmode
, new, 1);
2166 /* Update the alignment to reflect the offset. Reset the offset, which
2169 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2170 MIN (MEM_ALIGN (memref
),
2171 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2176 /* Return a memory reference like MEMREF, but with its address changed to
2177 ADDR. The caller is asserting that the actual piece of memory pointed
2178 to is the same, just the form of the address is being changed, such as
2179 by putting something into a register. */
2182 replace_equiv_address (memref
, addr
)
2186 /* change_address_1 copies the memory attribute structure without change
2187 and that's exactly what we want here. */
2188 update_temp_slot_address (XEXP (memref
, 0), addr
);
2189 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2192 /* Likewise, but the reference is not required to be valid. */
2195 replace_equiv_address_nv (memref
, addr
)
2199 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2202 /* Return a memory reference like MEMREF, but with its mode widened to
2203 MODE and offset by OFFSET. This would be used by targets that e.g.
2204 cannot issue QImode memory operations and have to use SImode memory
2205 operations plus masking logic. */
2208 widen_memory_access (memref
, mode
, offset
)
2210 enum machine_mode mode
;
2211 HOST_WIDE_INT offset
;
2213 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2214 tree expr
= MEM_EXPR (new);
2215 rtx memoffset
= MEM_OFFSET (new);
2216 unsigned int size
= GET_MODE_SIZE (mode
);
2218 /* If we don't know what offset we were at within the expression, then
2219 we can't know if we've overstepped the bounds. */
2225 if (TREE_CODE (expr
) == COMPONENT_REF
)
2227 tree field
= TREE_OPERAND (expr
, 1);
2229 if (! DECL_SIZE_UNIT (field
))
2235 /* Is the field at least as large as the access? If so, ok,
2236 otherwise strip back to the containing structure. */
2237 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2238 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2239 && INTVAL (memoffset
) >= 0)
2242 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2248 expr
= TREE_OPERAND (expr
, 0);
2249 memoffset
= (GEN_INT (INTVAL (memoffset
)
2250 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2251 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2254 /* Similarly for the decl. */
2255 else if (DECL_P (expr
)
2256 && DECL_SIZE_UNIT (expr
)
2257 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2258 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2259 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2263 /* The widened memory access overflows the expression, which means
2264 that it could alias another expression. Zap it. */
2271 memoffset
= NULL_RTX
;
2273 /* The widened memory may alias other stuff, so zap the alias set. */
2274 /* ??? Maybe use get_alias_set on any remaining expression. */
2276 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2277 MEM_ALIGN (new), mode
);
2282 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2287 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2288 NULL
, label_num
++, NULL
);
2291 /* For procedure integration. */
2293 /* Install new pointers to the first and last insns in the chain.
2294 Also, set cur_insn_uid to one higher than the last in use.
2295 Used for an inline-procedure after copying the insn chain. */
2298 set_new_first_and_last_insn (first
, last
)
2307 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2308 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2313 /* Set the range of label numbers found in the current function.
2314 This is used when belatedly compiling an inline function. */
2317 set_new_first_and_last_label_num (first
, last
)
2320 base_label_num
= label_num
;
2321 first_label_num
= first
;
2322 last_label_num
= last
;
2325 /* Set the last label number found in the current function.
2326 This is used when belatedly compiling an inline function. */
2329 set_new_last_label_num (last
)
2332 base_label_num
= label_num
;
2333 last_label_num
= last
;
2336 /* Restore all variables describing the current status from the structure *P.
2337 This is used after a nested function. */
2340 restore_emit_status (p
)
2341 struct function
*p ATTRIBUTE_UNUSED
;
2346 /* Go through all the RTL insn bodies and copy any invalid shared
2347 structure. This routine should only be called once. */
2350 unshare_all_rtl (fndecl
, insn
)
2356 /* Make sure that virtual parameters are not shared. */
2357 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2358 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2360 /* Make sure that virtual stack slots are not shared. */
2361 unshare_all_decls (DECL_INITIAL (fndecl
));
2363 /* Unshare just about everything else. */
2364 unshare_all_rtl_1 (insn
);
2366 /* Make sure the addresses of stack slots found outside the insn chain
2367 (such as, in DECL_RTL of a variable) are not shared
2368 with the insn chain.
2370 This special care is necessary when the stack slot MEM does not
2371 actually appear in the insn chain. If it does appear, its address
2372 is unshared from all else at that point. */
2373 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2376 /* Go through all the RTL insn bodies and copy any invalid shared
2377 structure, again. This is a fairly expensive thing to do so it
2378 should be done sparingly. */
2381 unshare_all_rtl_again (insn
)
2387 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2390 reset_used_flags (PATTERN (p
));
2391 reset_used_flags (REG_NOTES (p
));
2392 reset_used_flags (LOG_LINKS (p
));
2395 /* Make sure that virtual stack slots are not shared. */
2396 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2398 /* Make sure that virtual parameters are not shared. */
2399 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2400 reset_used_flags (DECL_RTL (decl
));
2402 reset_used_flags (stack_slot_list
);
2404 unshare_all_rtl (cfun
->decl
, insn
);
2407 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2408 Assumes the mark bits are cleared at entry. */
2411 unshare_all_rtl_1 (insn
)
2414 for (; insn
; insn
= NEXT_INSN (insn
))
2417 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2418 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2419 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2423 /* Go through all virtual stack slots of a function and copy any
2424 shared structure. */
2426 unshare_all_decls (blk
)
2431 /* Copy shared decls. */
2432 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2433 if (DECL_RTL_SET_P (t
))
2434 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2436 /* Now process sub-blocks. */
2437 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2438 unshare_all_decls (t
);
2441 /* Go through all virtual stack slots of a function and mark them as
2444 reset_used_decls (blk
)
2450 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2451 if (DECL_RTL_SET_P (t
))
2452 reset_used_flags (DECL_RTL (t
));
2454 /* Now process sub-blocks. */
2455 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2456 reset_used_decls (t
);
2459 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2460 placed in the result directly, rather than being copied. MAY_SHARE is
2461 either a MEM of an EXPR_LIST of MEMs. */
2464 copy_most_rtx (orig
, may_share
)
2471 const char *format_ptr
;
2473 if (orig
== may_share
2474 || (GET_CODE (may_share
) == EXPR_LIST
2475 && in_expr_list_p (may_share
, orig
)))
2478 code
= GET_CODE (orig
);
2496 copy
= rtx_alloc (code
);
2497 PUT_MODE (copy
, GET_MODE (orig
));
2498 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2499 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2500 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2501 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2502 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2504 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2506 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2508 switch (*format_ptr
++)
2511 XEXP (copy
, i
) = XEXP (orig
, i
);
2512 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2513 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2517 XEXP (copy
, i
) = XEXP (orig
, i
);
2522 XVEC (copy
, i
) = XVEC (orig
, i
);
2523 if (XVEC (orig
, i
) != NULL
)
2525 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2526 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2527 XVECEXP (copy
, i
, j
)
2528 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2533 XWINT (copy
, i
) = XWINT (orig
, i
);
2538 XINT (copy
, i
) = XINT (orig
, i
);
2542 XTREE (copy
, i
) = XTREE (orig
, i
);
2547 XSTR (copy
, i
) = XSTR (orig
, i
);
2551 /* Copy this through the wide int field; that's safest. */
2552 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2562 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2563 Recursively does the same for subexpressions. */
2566 copy_rtx_if_shared (orig
)
2572 const char *format_ptr
;
2578 code
= GET_CODE (x
);
2580 /* These types may be freely shared. */
2594 /* SCRATCH must be shared because they represent distinct values. */
2598 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2599 a LABEL_REF, it isn't sharable. */
2600 if (GET_CODE (XEXP (x
, 0)) == PLUS
2601 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2602 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2611 /* The chain of insns is not being copied. */
2615 /* A MEM is allowed to be shared if its address is constant.
2617 We used to allow sharing of MEMs which referenced
2618 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2619 that can lose. instantiate_virtual_regs will not unshare
2620 the MEMs, and combine may change the structure of the address
2621 because it looks safe and profitable in one context, but
2622 in some other context it creates unrecognizable RTL. */
2623 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2632 /* This rtx may not be shared. If it has already been seen,
2633 replace it with a copy of itself. */
2635 if (RTX_FLAG (x
, used
))
2639 copy
= rtx_alloc (code
);
2641 (sizeof (*copy
) - sizeof (copy
->fld
)
2642 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2646 RTX_FLAG (x
, used
) = 1;
2648 /* Now scan the subexpressions recursively.
2649 We can store any replaced subexpressions directly into X
2650 since we know X is not shared! Any vectors in X
2651 must be copied if X was copied. */
2653 format_ptr
= GET_RTX_FORMAT (code
);
2655 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2657 switch (*format_ptr
++)
2660 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2664 if (XVEC (x
, i
) != NULL
)
2667 int len
= XVECLEN (x
, i
);
2669 if (copied
&& len
> 0)
2670 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2671 for (j
= 0; j
< len
; j
++)
2672 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2680 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2681 to look for shared sub-parts. */
2684 reset_used_flags (x
)
2689 const char *format_ptr
;
2694 code
= GET_CODE (x
);
2696 /* These types may be freely shared so we needn't do any resetting
2718 /* The chain of insns is not being copied. */
2725 RTX_FLAG (x
, used
) = 0;
2727 format_ptr
= GET_RTX_FORMAT (code
);
2728 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2730 switch (*format_ptr
++)
2733 reset_used_flags (XEXP (x
, i
));
2737 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2738 reset_used_flags (XVECEXP (x
, i
, j
));
2744 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2745 Return X or the rtx for the pseudo reg the value of X was copied into.
2746 OTHER must be valid as a SET_DEST. */
2749 make_safe_from (x
, other
)
2753 switch (GET_CODE (other
))
2756 other
= SUBREG_REG (other
);
2758 case STRICT_LOW_PART
:
2761 other
= XEXP (other
, 0);
2767 if ((GET_CODE (other
) == MEM
2769 && GET_CODE (x
) != REG
2770 && GET_CODE (x
) != SUBREG
)
2771 || (GET_CODE (other
) == REG
2772 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2773 || reg_mentioned_p (other
, x
))))
2775 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2776 emit_move_insn (temp
, x
);
2782 /* Emission of insns (adding them to the doubly-linked list). */
2784 /* Return the first insn of the current sequence or current function. */
2792 /* Specify a new insn as the first in the chain. */
2795 set_first_insn (insn
)
2798 if (PREV_INSN (insn
) != 0)
2803 /* Return the last insn emitted in current sequence or current function. */
2811 /* Specify a new insn as the last in the chain. */
2814 set_last_insn (insn
)
2817 if (NEXT_INSN (insn
) != 0)
2822 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2825 get_last_insn_anywhere ()
2827 struct sequence_stack
*stack
;
2830 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2831 if (stack
->last
!= 0)
2836 /* Return the first nonnote insn emitted in current sequence or current
2837 function. This routine looks inside SEQUENCEs. */
2840 get_first_nonnote_insn ()
2842 rtx insn
= first_insn
;
2846 insn
= next_insn (insn
);
2847 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2854 /* Return the last nonnote insn emitted in current sequence or current
2855 function. This routine looks inside SEQUENCEs. */
2858 get_last_nonnote_insn ()
2860 rtx insn
= last_insn
;
2864 insn
= previous_insn (insn
);
2865 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2872 /* Return a number larger than any instruction's uid in this function. */
2877 return cur_insn_uid
;
2880 /* Renumber instructions so that no instruction UIDs are wasted. */
2883 renumber_insns (stream
)
2888 /* If we're not supposed to renumber instructions, don't. */
2889 if (!flag_renumber_insns
)
2892 /* If there aren't that many instructions, then it's not really
2893 worth renumbering them. */
2894 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2899 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2902 fprintf (stream
, "Renumbering insn %d to %d\n",
2903 INSN_UID (insn
), cur_insn_uid
);
2904 INSN_UID (insn
) = cur_insn_uid
++;
2908 /* Return the next insn. If it is a SEQUENCE, return the first insn
2917 insn
= NEXT_INSN (insn
);
2918 if (insn
&& GET_CODE (insn
) == INSN
2919 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2920 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2926 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2930 previous_insn (insn
)
2935 insn
= PREV_INSN (insn
);
2936 if (insn
&& GET_CODE (insn
) == INSN
2937 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2938 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2944 /* Return the next insn after INSN that is not a NOTE. This routine does not
2945 look inside SEQUENCEs. */
2948 next_nonnote_insn (insn
)
2953 insn
= NEXT_INSN (insn
);
2954 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2961 /* Return the previous insn before INSN that is not a NOTE. This routine does
2962 not look inside SEQUENCEs. */
2965 prev_nonnote_insn (insn
)
2970 insn
= PREV_INSN (insn
);
2971 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2978 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2979 or 0, if there is none. This routine does not look inside
2983 next_real_insn (insn
)
2988 insn
= NEXT_INSN (insn
);
2989 if (insn
== 0 || GET_CODE (insn
) == INSN
2990 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2997 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2998 or 0, if there is none. This routine does not look inside
3002 prev_real_insn (insn
)
3007 insn
= PREV_INSN (insn
);
3008 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3009 || GET_CODE (insn
) == JUMP_INSN
)
3016 /* Find the next insn after INSN that really does something. This routine
3017 does not look inside SEQUENCEs. Until reload has completed, this is the
3018 same as next_real_insn. */
3021 active_insn_p (insn
)
3024 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3025 || (GET_CODE (insn
) == INSN
3026 && (! reload_completed
3027 || (GET_CODE (PATTERN (insn
)) != USE
3028 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3032 next_active_insn (insn
)
3037 insn
= NEXT_INSN (insn
);
3038 if (insn
== 0 || active_insn_p (insn
))
3045 /* Find the last insn before INSN that really does something. This routine
3046 does not look inside SEQUENCEs. Until reload has completed, this is the
3047 same as prev_real_insn. */
3050 prev_active_insn (insn
)
3055 insn
= PREV_INSN (insn
);
3056 if (insn
== 0 || active_insn_p (insn
))
3063 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3071 insn
= NEXT_INSN (insn
);
3072 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3079 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3087 insn
= PREV_INSN (insn
);
3088 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3096 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3097 and REG_CC_USER notes so we can find it. */
3100 link_cc0_insns (insn
)
3103 rtx user
= next_nonnote_insn (insn
);
3105 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3106 user
= XVECEXP (PATTERN (user
), 0, 0);
3108 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3110 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3113 /* Return the next insn that uses CC0 after INSN, which is assumed to
3114 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3115 applied to the result of this function should yield INSN).
3117 Normally, this is simply the next insn. However, if a REG_CC_USER note
3118 is present, it contains the insn that uses CC0.
3120 Return 0 if we can't find the insn. */
3123 next_cc0_user (insn
)
3126 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3129 return XEXP (note
, 0);
3131 insn
= next_nonnote_insn (insn
);
3132 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3133 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3135 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3141 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3142 note, it is the previous insn. */
3145 prev_cc0_setter (insn
)
3148 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3151 return XEXP (note
, 0);
3153 insn
= prev_nonnote_insn (insn
);
3154 if (! sets_cc0_p (PATTERN (insn
)))
3161 /* Increment the label uses for all labels present in rtx. */
3164 mark_label_nuses (x
)
3171 code
= GET_CODE (x
);
3172 if (code
== LABEL_REF
)
3173 LABEL_NUSES (XEXP (x
, 0))++;
3175 fmt
= GET_RTX_FORMAT (code
);
3176 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3179 mark_label_nuses (XEXP (x
, i
));
3180 else if (fmt
[i
] == 'E')
3181 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3182 mark_label_nuses (XVECEXP (x
, i
, j
));
3187 /* Try splitting insns that can be split for better scheduling.
3188 PAT is the pattern which might split.
3189 TRIAL is the insn providing PAT.
3190 LAST is nonzero if we should return the last insn of the sequence produced.
3192 If this routine succeeds in splitting, it returns the first or last
3193 replacement insn depending on the value of LAST. Otherwise, it
3194 returns TRIAL. If the insn to be returned can be split, it will be. */
3197 try_split (pat
, trial
, last
)
3201 rtx before
= PREV_INSN (trial
);
3202 rtx after
= NEXT_INSN (trial
);
3203 int has_barrier
= 0;
3208 if (any_condjump_p (trial
)
3209 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3210 split_branch_probability
= INTVAL (XEXP (note
, 0));
3211 probability
= split_branch_probability
;
3213 seq
= split_insns (pat
, trial
);
3215 split_branch_probability
= -1;
3217 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3218 We may need to handle this specially. */
3219 if (after
&& GET_CODE (after
) == BARRIER
)
3222 after
= NEXT_INSN (after
);
3227 /* Sometimes there will be only one insn in that list, this case will
3228 normally arise only when we want it in turn to be split (SFmode on
3229 the 29k is an example). */
3230 if (NEXT_INSN (seq
) != NULL_RTX
)
3232 rtx insn_last
, insn
;
3235 /* Avoid infinite loop if any insn of the result matches
3236 the original pattern. */
3240 if (INSN_P (insn_last
)
3241 && rtx_equal_p (PATTERN (insn_last
), pat
))
3243 if (NEXT_INSN (insn_last
) == NULL_RTX
)
3245 insn_last
= NEXT_INSN (insn_last
);
3250 while (insn
!= NULL_RTX
)
3252 if (GET_CODE (insn
) == JUMP_INSN
)
3254 mark_jump_label (PATTERN (insn
), insn
, 0);
3256 if (probability
!= -1
3257 && any_condjump_p (insn
)
3258 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3260 /* We can preserve the REG_BR_PROB notes only if exactly
3261 one jump is created, otherwise the machine description
3262 is responsible for this step using
3263 split_branch_probability variable. */
3267 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3268 GEN_INT (probability
),
3273 insn
= PREV_INSN (insn
);
3276 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3277 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3278 if (GET_CODE (trial
) == CALL_INSN
)
3281 while (insn
!= NULL_RTX
)
3283 if (GET_CODE (insn
) == CALL_INSN
)
3284 CALL_INSN_FUNCTION_USAGE (insn
)
3285 = CALL_INSN_FUNCTION_USAGE (trial
);
3287 insn
= PREV_INSN (insn
);
3291 /* Copy notes, particularly those related to the CFG. */
3292 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3294 switch (REG_NOTE_KIND (note
))
3298 while (insn
!= NULL_RTX
)
3300 if (GET_CODE (insn
) == CALL_INSN
3301 || (flag_non_call_exceptions
3302 && may_trap_p (PATTERN (insn
))))
3304 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3307 insn
= PREV_INSN (insn
);
3313 case REG_ALWAYS_RETURN
:
3315 while (insn
!= NULL_RTX
)
3317 if (GET_CODE (insn
) == CALL_INSN
)
3319 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3322 insn
= PREV_INSN (insn
);
3326 case REG_NON_LOCAL_GOTO
:
3328 while (insn
!= NULL_RTX
)
3330 if (GET_CODE (insn
) == JUMP_INSN
)
3332 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3335 insn
= PREV_INSN (insn
);
3344 /* If there are LABELS inside the split insns increment the
3345 usage count so we don't delete the label. */
3346 if (GET_CODE (trial
) == INSN
)
3349 while (insn
!= NULL_RTX
)
3351 if (GET_CODE (insn
) == INSN
)
3352 mark_label_nuses (PATTERN (insn
));
3354 insn
= PREV_INSN (insn
);
3358 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3360 delete_insn (trial
);
3362 emit_barrier_after (tem
);
3364 /* Recursively call try_split for each new insn created; by the
3365 time control returns here that insn will be fully split, so
3366 set LAST and continue from the insn after the one returned.
3367 We can't use next_active_insn here since AFTER may be a note.
3368 Ignore deleted insns, which can be occur if not optimizing. */
3369 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3370 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3371 tem
= try_split (PATTERN (tem
), tem
, 1);
3373 /* Avoid infinite loop if the result matches the original pattern. */
3374 else if (rtx_equal_p (PATTERN (seq
), pat
))
3378 PATTERN (trial
) = PATTERN (seq
);
3379 INSN_CODE (trial
) = -1;
3380 try_split (PATTERN (trial
), trial
, last
);
3383 /* Return either the first or the last insn, depending on which was
3386 ? (after
? PREV_INSN (after
) : last_insn
)
3387 : NEXT_INSN (before
);
3393 /* Make and return an INSN rtx, initializing all its slots.
3394 Store PATTERN in the pattern slots. */
3397 make_insn_raw (pattern
)
3402 insn
= rtx_alloc (INSN
);
3404 INSN_UID (insn
) = cur_insn_uid
++;
3405 PATTERN (insn
) = pattern
;
3406 INSN_CODE (insn
) = -1;
3407 LOG_LINKS (insn
) = NULL
;
3408 REG_NOTES (insn
) = NULL
;
3409 INSN_SCOPE (insn
) = NULL
;
3410 BLOCK_FOR_INSN (insn
) = NULL
;
3412 #ifdef ENABLE_RTL_CHECKING
3415 && (returnjump_p (insn
)
3416 || (GET_CODE (insn
) == SET
3417 && SET_DEST (insn
) == pc_rtx
)))
3419 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3427 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3430 make_jump_insn_raw (pattern
)
3435 insn
= rtx_alloc (JUMP_INSN
);
3436 INSN_UID (insn
) = cur_insn_uid
++;
3438 PATTERN (insn
) = pattern
;
3439 INSN_CODE (insn
) = -1;
3440 LOG_LINKS (insn
) = NULL
;
3441 REG_NOTES (insn
) = NULL
;
3442 JUMP_LABEL (insn
) = NULL
;
3443 INSN_SCOPE (insn
) = NULL
;
3444 BLOCK_FOR_INSN (insn
) = NULL
;
3449 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3452 make_call_insn_raw (pattern
)
3457 insn
= rtx_alloc (CALL_INSN
);
3458 INSN_UID (insn
) = cur_insn_uid
++;
3460 PATTERN (insn
) = pattern
;
3461 INSN_CODE (insn
) = -1;
3462 LOG_LINKS (insn
) = NULL
;
3463 REG_NOTES (insn
) = NULL
;
3464 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3465 INSN_SCOPE (insn
) = NULL
;
3466 BLOCK_FOR_INSN (insn
) = NULL
;
3471 /* Add INSN to the end of the doubly-linked list.
3472 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3478 PREV_INSN (insn
) = last_insn
;
3479 NEXT_INSN (insn
) = 0;
3481 if (NULL
!= last_insn
)
3482 NEXT_INSN (last_insn
) = insn
;
3484 if (NULL
== first_insn
)
3490 /* Add INSN into the doubly-linked list after insn AFTER. This and
3491 the next should be the only functions called to insert an insn once
3492 delay slots have been filled since only they know how to update a
3496 add_insn_after (insn
, after
)
3499 rtx next
= NEXT_INSN (after
);
3502 if (optimize
&& INSN_DELETED_P (after
))
3505 NEXT_INSN (insn
) = next
;
3506 PREV_INSN (insn
) = after
;
3510 PREV_INSN (next
) = insn
;
3511 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3512 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3514 else if (last_insn
== after
)
3518 struct sequence_stack
*stack
= seq_stack
;
3519 /* Scan all pending sequences too. */
3520 for (; stack
; stack
= stack
->next
)
3521 if (after
== stack
->last
)
3531 if (GET_CODE (after
) != BARRIER
3532 && GET_CODE (insn
) != BARRIER
3533 && (bb
= BLOCK_FOR_INSN (after
)))
3535 set_block_for_insn (insn
, bb
);
3537 bb
->flags
|= BB_DIRTY
;
3538 /* Should not happen as first in the BB is always
3539 either NOTE or LABEL. */
3540 if (bb
->end
== after
3541 /* Avoid clobbering of structure when creating new BB. */
3542 && GET_CODE (insn
) != BARRIER
3543 && (GET_CODE (insn
) != NOTE
3544 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3548 NEXT_INSN (after
) = insn
;
3549 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3551 rtx sequence
= PATTERN (after
);
3552 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3556 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3557 the previous should be the only functions called to insert an insn once
3558 delay slots have been filled since only they know how to update a
3562 add_insn_before (insn
, before
)
3565 rtx prev
= PREV_INSN (before
);
3568 if (optimize
&& INSN_DELETED_P (before
))
3571 PREV_INSN (insn
) = prev
;
3572 NEXT_INSN (insn
) = before
;
3576 NEXT_INSN (prev
) = insn
;
3577 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3579 rtx sequence
= PATTERN (prev
);
3580 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3583 else if (first_insn
== before
)
3587 struct sequence_stack
*stack
= seq_stack
;
3588 /* Scan all pending sequences too. */
3589 for (; stack
; stack
= stack
->next
)
3590 if (before
== stack
->first
)
3592 stack
->first
= insn
;
3600 if (GET_CODE (before
) != BARRIER
3601 && GET_CODE (insn
) != BARRIER
3602 && (bb
= BLOCK_FOR_INSN (before
)))
3604 set_block_for_insn (insn
, bb
);
3606 bb
->flags
|= BB_DIRTY
;
3607 /* Should not happen as first in the BB is always
3608 either NOTE or LABEl. */
3609 if (bb
->head
== insn
3610 /* Avoid clobbering of structure when creating new BB. */
3611 && GET_CODE (insn
) != BARRIER
3612 && (GET_CODE (insn
) != NOTE
3613 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3617 PREV_INSN (before
) = insn
;
3618 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3619 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3622 /* Remove an insn from its doubly-linked list. This function knows how
3623 to handle sequences. */
3628 rtx next
= NEXT_INSN (insn
);
3629 rtx prev
= PREV_INSN (insn
);
3634 NEXT_INSN (prev
) = next
;
3635 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3637 rtx sequence
= PATTERN (prev
);
3638 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3641 else if (first_insn
== insn
)
3645 struct sequence_stack
*stack
= seq_stack
;
3646 /* Scan all pending sequences too. */
3647 for (; stack
; stack
= stack
->next
)
3648 if (insn
== stack
->first
)
3650 stack
->first
= next
;
3660 PREV_INSN (next
) = prev
;
3661 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3662 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3664 else if (last_insn
== insn
)
3668 struct sequence_stack
*stack
= seq_stack
;
3669 /* Scan all pending sequences too. */
3670 for (; stack
; stack
= stack
->next
)
3671 if (insn
== stack
->last
)
3680 if (GET_CODE (insn
) != BARRIER
3681 && (bb
= BLOCK_FOR_INSN (insn
)))
3684 bb
->flags
|= BB_DIRTY
;
3685 if (bb
->head
== insn
)
3687 /* Never ever delete the basic block note without deleting whole
3689 if (GET_CODE (insn
) == NOTE
)
3693 if (bb
->end
== insn
)
3698 /* Delete all insns made since FROM.
3699 FROM becomes the new last instruction. */
3702 delete_insns_since (from
)
3708 NEXT_INSN (from
) = 0;
3712 /* This function is deprecated, please use sequences instead.
3714 Move a consecutive bunch of insns to a different place in the chain.
3715 The insns to be moved are those between FROM and TO.
3716 They are moved to a new position after the insn AFTER.
3717 AFTER must not be FROM or TO or any insn in between.
3719 This function does not know about SEQUENCEs and hence should not be
3720 called after delay-slot filling has been done. */
3723 reorder_insns_nobb (from
, to
, after
)
3724 rtx from
, to
, after
;
3726 /* Splice this bunch out of where it is now. */
3727 if (PREV_INSN (from
))
3728 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3730 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3731 if (last_insn
== to
)
3732 last_insn
= PREV_INSN (from
);
3733 if (first_insn
== from
)
3734 first_insn
= NEXT_INSN (to
);
3736 /* Make the new neighbors point to it and it to them. */
3737 if (NEXT_INSN (after
))
3738 PREV_INSN (NEXT_INSN (after
)) = to
;
3740 NEXT_INSN (to
) = NEXT_INSN (after
);
3741 PREV_INSN (from
) = after
;
3742 NEXT_INSN (after
) = from
;
3743 if (after
== last_insn
)
3747 /* Same as function above, but take care to update BB boundaries. */
3749 reorder_insns (from
, to
, after
)
3750 rtx from
, to
, after
;
3752 rtx prev
= PREV_INSN (from
);
3753 basic_block bb
, bb2
;
3755 reorder_insns_nobb (from
, to
, after
);
3757 if (GET_CODE (after
) != BARRIER
3758 && (bb
= BLOCK_FOR_INSN (after
)))
3761 bb
->flags
|= BB_DIRTY
;
3763 if (GET_CODE (from
) != BARRIER
3764 && (bb2
= BLOCK_FOR_INSN (from
)))
3768 bb2
->flags
|= BB_DIRTY
;
3771 if (bb
->end
== after
)
3774 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3775 set_block_for_insn (x
, bb
);
3779 /* Return the line note insn preceding INSN. */
3782 find_line_note (insn
)
3785 if (no_line_numbers
)
3788 for (; insn
; insn
= PREV_INSN (insn
))
3789 if (GET_CODE (insn
) == NOTE
3790 && NOTE_LINE_NUMBER (insn
) >= 0)
3796 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3797 of the moved insns when debugging. This may insert a note between AFTER
3798 and FROM, and another one after TO. */
3801 reorder_insns_with_line_notes (from
, to
, after
)
3802 rtx from
, to
, after
;
3804 rtx from_line
= find_line_note (from
);
3805 rtx after_line
= find_line_note (after
);
3807 reorder_insns (from
, to
, after
);
3809 if (from_line
== after_line
)
3813 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3814 NOTE_LINE_NUMBER (from_line
),
3817 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3818 NOTE_LINE_NUMBER (after_line
),
3822 /* Remove unnecessary notes from the instruction stream. */
3825 remove_unnecessary_notes ()
3827 rtx block_stack
= NULL_RTX
;
3828 rtx eh_stack
= NULL_RTX
;
3833 /* We must not remove the first instruction in the function because
3834 the compiler depends on the first instruction being a note. */
3835 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3837 /* Remember what's next. */
3838 next
= NEXT_INSN (insn
);
3840 /* We're only interested in notes. */
3841 if (GET_CODE (insn
) != NOTE
)
3844 switch (NOTE_LINE_NUMBER (insn
))
3846 case NOTE_INSN_DELETED
:
3847 case NOTE_INSN_LOOP_END_TOP_COND
:
3851 case NOTE_INSN_EH_REGION_BEG
:
3852 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3855 case NOTE_INSN_EH_REGION_END
:
3856 /* Too many end notes. */
3857 if (eh_stack
== NULL_RTX
)
3859 /* Mismatched nesting. */
3860 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3863 eh_stack
= XEXP (eh_stack
, 1);
3864 free_INSN_LIST_node (tmp
);
3867 case NOTE_INSN_BLOCK_BEG
:
3868 /* By now, all notes indicating lexical blocks should have
3869 NOTE_BLOCK filled in. */
3870 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3872 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3875 case NOTE_INSN_BLOCK_END
:
3876 /* Too many end notes. */
3877 if (block_stack
== NULL_RTX
)
3879 /* Mismatched nesting. */
3880 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3883 block_stack
= XEXP (block_stack
, 1);
3884 free_INSN_LIST_node (tmp
);
3886 /* Scan back to see if there are any non-note instructions
3887 between INSN and the beginning of this block. If not,
3888 then there is no PC range in the generated code that will
3889 actually be in this block, so there's no point in
3890 remembering the existence of the block. */
3891 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3893 /* This block contains a real instruction. Note that we
3894 don't include labels; if the only thing in the block
3895 is a label, then there are still no PC values that
3896 lie within the block. */
3900 /* We're only interested in NOTEs. */
3901 if (GET_CODE (tmp
) != NOTE
)
3904 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3906 /* We just verified that this BLOCK matches us with
3907 the block_stack check above. Never delete the
3908 BLOCK for the outermost scope of the function; we
3909 can refer to names from that scope even if the
3910 block notes are messed up. */
3911 if (! is_body_block (NOTE_BLOCK (insn
))
3912 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3919 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3920 /* There's a nested block. We need to leave the
3921 current block in place since otherwise the debugger
3922 wouldn't be able to show symbols from our block in
3923 the nested block. */
3929 /* Too many begin notes. */
3930 if (block_stack
|| eh_stack
)
3935 /* Emit insn(s) of given code and pattern
3936 at a specified place within the doubly-linked list.
3938 All of the emit_foo global entry points accept an object
3939 X which is either an insn list or a PATTERN of a single
3942 There are thus a few canonical ways to generate code and
3943 emit it at a specific place in the instruction stream. For
3944 example, consider the instruction named SPOT and the fact that
3945 we would like to emit some instructions before SPOT. We might
3949 ... emit the new instructions ...
3950 insns_head = get_insns ();
3953 emit_insn_before (insns_head, SPOT);
3955 It used to be common to generate SEQUENCE rtl instead, but that
3956 is a relic of the past which no longer occurs. The reason is that
3957 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3958 generated would almost certainly die right after it was created. */
3960 /* Make X be output before the instruction BEFORE. */
3963 emit_insn_before (x
, before
)
3969 #ifdef ENABLE_RTL_CHECKING
3970 if (before
== NULL_RTX
)
3977 switch (GET_CODE (x
))
3988 rtx next
= NEXT_INSN (insn
);
3989 add_insn_before (insn
, before
);
3995 #ifdef ENABLE_RTL_CHECKING
4002 last
= make_insn_raw (x
);
4003 add_insn_before (last
, before
);
4010 /* Make an instruction with body X and code JUMP_INSN
4011 and output it before the instruction BEFORE. */
4014 emit_jump_insn_before (x
, before
)
4017 rtx insn
, last
= NULL_RTX
;
4019 #ifdef ENABLE_RTL_CHECKING
4020 if (before
== NULL_RTX
)
4024 switch (GET_CODE (x
))
4035 rtx next
= NEXT_INSN (insn
);
4036 add_insn_before (insn
, before
);
4042 #ifdef ENABLE_RTL_CHECKING
4049 last
= make_jump_insn_raw (x
);
4050 add_insn_before (last
, before
);
4057 /* Make an instruction with body X and code CALL_INSN
4058 and output it before the instruction BEFORE. */
4061 emit_call_insn_before (x
, before
)
4064 rtx last
= NULL_RTX
, insn
;
4066 #ifdef ENABLE_RTL_CHECKING
4067 if (before
== NULL_RTX
)
4071 switch (GET_CODE (x
))
4082 rtx next
= NEXT_INSN (insn
);
4083 add_insn_before (insn
, before
);
4089 #ifdef ENABLE_RTL_CHECKING
4096 last
= make_call_insn_raw (x
);
4097 add_insn_before (last
, before
);
4104 /* Make an insn of code BARRIER
4105 and output it before the insn BEFORE. */
4108 emit_barrier_before (before
)
4111 rtx insn
= rtx_alloc (BARRIER
);
4113 INSN_UID (insn
) = cur_insn_uid
++;
4115 add_insn_before (insn
, before
);
4119 /* Emit the label LABEL before the insn BEFORE. */
4122 emit_label_before (label
, before
)
4125 /* This can be called twice for the same label as a result of the
4126 confusion that follows a syntax error! So make it harmless. */
4127 if (INSN_UID (label
) == 0)
4129 INSN_UID (label
) = cur_insn_uid
++;
4130 add_insn_before (label
, before
);
4136 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4139 emit_note_before (subtype
, before
)
4143 rtx note
= rtx_alloc (NOTE
);
4144 INSN_UID (note
) = cur_insn_uid
++;
4145 NOTE_SOURCE_FILE (note
) = 0;
4146 NOTE_LINE_NUMBER (note
) = subtype
;
4147 BLOCK_FOR_INSN (note
) = NULL
;
4149 add_insn_before (note
, before
);
4153 /* Helper for emit_insn_after, handles lists of instructions
4156 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4159 emit_insn_after_1 (first
, after
)
4166 if (GET_CODE (after
) != BARRIER
4167 && (bb
= BLOCK_FOR_INSN (after
)))
4169 bb
->flags
|= BB_DIRTY
;
4170 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4171 if (GET_CODE (last
) != BARRIER
)
4172 set_block_for_insn (last
, bb
);
4173 if (GET_CODE (last
) != BARRIER
)
4174 set_block_for_insn (last
, bb
);
4175 if (bb
->end
== after
)
4179 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4182 after_after
= NEXT_INSN (after
);
4184 NEXT_INSN (after
) = first
;
4185 PREV_INSN (first
) = after
;
4186 NEXT_INSN (last
) = after_after
;
4188 PREV_INSN (after_after
) = last
;
4190 if (after
== last_insn
)
4195 /* Make X be output after the insn AFTER. */
4198 emit_insn_after (x
, after
)
4203 #ifdef ENABLE_RTL_CHECKING
4204 if (after
== NULL_RTX
)
4211 switch (GET_CODE (x
))
4219 last
= emit_insn_after_1 (x
, after
);
4222 #ifdef ENABLE_RTL_CHECKING
4229 last
= make_insn_raw (x
);
4230 add_insn_after (last
, after
);
4237 /* Similar to emit_insn_after, except that line notes are to be inserted so
4238 as to act as if this insn were at FROM. */
4241 emit_insn_after_with_line_notes (x
, after
, from
)
4244 rtx from_line
= find_line_note (from
);
4245 rtx after_line
= find_line_note (after
);
4246 rtx insn
= emit_insn_after (x
, after
);
4249 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4250 NOTE_LINE_NUMBER (from_line
),
4254 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4255 NOTE_LINE_NUMBER (after_line
),
4259 /* Make an insn of code JUMP_INSN with body X
4260 and output it after the insn AFTER. */
4263 emit_jump_insn_after (x
, after
)
4268 #ifdef ENABLE_RTL_CHECKING
4269 if (after
== NULL_RTX
)
4273 switch (GET_CODE (x
))
4281 last
= emit_insn_after_1 (x
, after
);
4284 #ifdef ENABLE_RTL_CHECKING
4291 last
= make_jump_insn_raw (x
);
4292 add_insn_after (last
, after
);
4299 /* Make an instruction with body X and code CALL_INSN
4300 and output it after the instruction AFTER. */
4303 emit_call_insn_after (x
, after
)
4308 #ifdef ENABLE_RTL_CHECKING
4309 if (after
== NULL_RTX
)
4313 switch (GET_CODE (x
))
4321 last
= emit_insn_after_1 (x
, after
);
4324 #ifdef ENABLE_RTL_CHECKING
4331 last
= make_call_insn_raw (x
);
4332 add_insn_after (last
, after
);
4339 /* Make an insn of code BARRIER
4340 and output it after the insn AFTER. */
4343 emit_barrier_after (after
)
4346 rtx insn
= rtx_alloc (BARRIER
);
4348 INSN_UID (insn
) = cur_insn_uid
++;
4350 add_insn_after (insn
, after
);
4354 /* Emit the label LABEL after the insn AFTER. */
4357 emit_label_after (label
, after
)
4360 /* This can be called twice for the same label
4361 as a result of the confusion that follows a syntax error!
4362 So make it harmless. */
4363 if (INSN_UID (label
) == 0)
4365 INSN_UID (label
) = cur_insn_uid
++;
4366 add_insn_after (label
, after
);
4372 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4375 emit_note_after (subtype
, after
)
4379 rtx note
= rtx_alloc (NOTE
);
4380 INSN_UID (note
) = cur_insn_uid
++;
4381 NOTE_SOURCE_FILE (note
) = 0;
4382 NOTE_LINE_NUMBER (note
) = subtype
;
4383 BLOCK_FOR_INSN (note
) = NULL
;
4384 add_insn_after (note
, after
);
4388 /* Emit a line note for FILE and LINE after the insn AFTER. */
4391 emit_line_note_after (file
, line
, after
)
4398 if (no_line_numbers
&& line
> 0)
4404 note
= rtx_alloc (NOTE
);
4405 INSN_UID (note
) = cur_insn_uid
++;
4406 NOTE_SOURCE_FILE (note
) = file
;
4407 NOTE_LINE_NUMBER (note
) = line
;
4408 BLOCK_FOR_INSN (note
) = NULL
;
4409 add_insn_after (note
, after
);
4413 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4415 emit_insn_after_scope (pattern
, after
, scope
)
4419 rtx last
= emit_insn_after (pattern
, after
);
4421 after
= NEXT_INSN (after
);
4424 if (active_insn_p (after
))
4425 INSN_SCOPE (after
) = scope
;
4428 after
= NEXT_INSN (after
);
4433 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4435 emit_jump_insn_after_scope (pattern
, after
, scope
)
4439 rtx last
= emit_jump_insn_after (pattern
, after
);
4441 after
= NEXT_INSN (after
);
4444 if (active_insn_p (after
))
4445 INSN_SCOPE (after
) = scope
;
4448 after
= NEXT_INSN (after
);
4453 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4455 emit_call_insn_after_scope (pattern
, after
, scope
)
4459 rtx last
= emit_call_insn_after (pattern
, after
);
4461 after
= NEXT_INSN (after
);
4464 if (active_insn_p (after
))
4465 INSN_SCOPE (after
) = scope
;
4468 after
= NEXT_INSN (after
);
4473 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4475 emit_insn_before_scope (pattern
, before
, scope
)
4476 rtx pattern
, before
;
4479 rtx first
= PREV_INSN (before
);
4480 rtx last
= emit_insn_before (pattern
, before
);
4482 first
= NEXT_INSN (first
);
4485 if (active_insn_p (first
))
4486 INSN_SCOPE (first
) = scope
;
4489 first
= NEXT_INSN (first
);
4494 /* Take X and emit it at the end of the doubly-linked
4497 Returns the last insn emitted. */
4503 rtx last
= last_insn
;
4509 switch (GET_CODE (x
))
4520 rtx next
= NEXT_INSN (insn
);
4527 #ifdef ENABLE_RTL_CHECKING
4534 last
= make_insn_raw (x
);
4542 /* Make an insn of code JUMP_INSN with pattern X
4543 and add it to the end of the doubly-linked list. */
4549 rtx last
= NULL_RTX
, insn
;
4551 switch (GET_CODE (x
))
4562 rtx next
= NEXT_INSN (insn
);
4569 #ifdef ENABLE_RTL_CHECKING
4576 last
= make_jump_insn_raw (x
);
4584 /* Make an insn of code CALL_INSN with pattern X
4585 and add it to the end of the doubly-linked list. */
4593 switch (GET_CODE (x
))
4601 insn
= emit_insn (x
);
4604 #ifdef ENABLE_RTL_CHECKING
4611 insn
= make_call_insn_raw (x
);
4619 /* Add the label LABEL to the end of the doubly-linked list. */
4625 /* This can be called twice for the same label
4626 as a result of the confusion that follows a syntax error!
4627 So make it harmless. */
4628 if (INSN_UID (label
) == 0)
4630 INSN_UID (label
) = cur_insn_uid
++;
4636 /* Make an insn of code BARRIER
4637 and add it to the end of the doubly-linked list. */
4642 rtx barrier
= rtx_alloc (BARRIER
);
4643 INSN_UID (barrier
) = cur_insn_uid
++;
4648 /* Make an insn of code NOTE
4649 with data-fields specified by FILE and LINE
4650 and add it to the end of the doubly-linked list,
4651 but only if line-numbers are desired for debugging info. */
4654 emit_line_note (file
, line
)
4658 set_file_and_line_for_stmt (file
, line
);
4661 if (no_line_numbers
)
4665 return emit_note (file
, line
);
4668 /* Make an insn of code NOTE
4669 with data-fields specified by FILE and LINE
4670 and add it to the end of the doubly-linked list.
4671 If it is a line-number NOTE, omit it if it matches the previous one. */
4674 emit_note (file
, line
)
4682 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4683 && line
== last_linenum
)
4685 last_filename
= file
;
4686 last_linenum
= line
;
4689 if (no_line_numbers
&& line
> 0)
4695 note
= rtx_alloc (NOTE
);
4696 INSN_UID (note
) = cur_insn_uid
++;
4697 NOTE_SOURCE_FILE (note
) = file
;
4698 NOTE_LINE_NUMBER (note
) = line
;
4699 BLOCK_FOR_INSN (note
) = NULL
;
4704 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4707 emit_line_note_force (file
, line
)
4712 return emit_line_note (file
, line
);
4715 /* Cause next statement to emit a line note even if the line number
4716 has not changed. This is used at the beginning of a function. */
4719 force_next_line_note ()
4724 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4725 note of this type already exists, remove it first. */
4728 set_unique_reg_note (insn
, kind
, datum
)
4733 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4739 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4740 has multiple sets (some callers assume single_set
4741 means the insn only has one set, when in fact it
4742 means the insn only has one * useful * set). */
4743 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4750 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4751 It serves no useful purpose and breaks eliminate_regs. */
4752 if (GET_CODE (datum
) == ASM_OPERANDS
)
4762 XEXP (note
, 0) = datum
;
4766 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4767 return REG_NOTES (insn
);
4770 /* Return an indication of which type of insn should have X as a body.
4771 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4777 if (GET_CODE (x
) == CODE_LABEL
)
4779 if (GET_CODE (x
) == CALL
)
4781 if (GET_CODE (x
) == RETURN
)
4783 if (GET_CODE (x
) == SET
)
4785 if (SET_DEST (x
) == pc_rtx
)
4787 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4792 if (GET_CODE (x
) == PARALLEL
)
4795 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4796 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4798 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4799 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4801 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4802 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4808 /* Emit the rtl pattern X as an appropriate kind of insn.
4809 If X is a label, it is simply added into the insn chain. */
4815 enum rtx_code code
= classify_insn (x
);
4817 if (code
== CODE_LABEL
)
4818 return emit_label (x
);
4819 else if (code
== INSN
)
4820 return emit_insn (x
);
4821 else if (code
== JUMP_INSN
)
4823 rtx insn
= emit_jump_insn (x
);
4824 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4825 return emit_barrier ();
4828 else if (code
== CALL_INSN
)
4829 return emit_call_insn (x
);
4834 /* Space for free sequence stack entries. */
4835 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4837 /* Begin emitting insns to a sequence which can be packaged in an
4838 RTL_EXPR. If this sequence will contain something that might cause
4839 the compiler to pop arguments to function calls (because those
4840 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4841 details), use do_pending_stack_adjust before calling this function.
4842 That will ensure that the deferred pops are not accidentally
4843 emitted in the middle of this sequence. */
4848 struct sequence_stack
*tem
;
4850 if (free_sequence_stack
!= NULL
)
4852 tem
= free_sequence_stack
;
4853 free_sequence_stack
= tem
->next
;
4856 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
4858 tem
->next
= seq_stack
;
4859 tem
->first
= first_insn
;
4860 tem
->last
= last_insn
;
4861 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4869 /* Similarly, but indicate that this sequence will be placed in T, an
4870 RTL_EXPR. See the documentation for start_sequence for more
4871 information about how to use this function. */
4874 start_sequence_for_rtl_expr (t
)
4882 /* Set up the insn chain starting with FIRST as the current sequence,
4883 saving the previously current one. See the documentation for
4884 start_sequence for more information about how to use this function. */
4887 push_to_sequence (first
)
4894 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4900 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4903 push_to_full_sequence (first
, last
)
4909 /* We really should have the end of the insn chain here. */
4910 if (last
&& NEXT_INSN (last
))
4914 /* Set up the outer-level insn chain
4915 as the current sequence, saving the previously current one. */
4918 push_topmost_sequence ()
4920 struct sequence_stack
*stack
, *top
= NULL
;
4924 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4927 first_insn
= top
->first
;
4928 last_insn
= top
->last
;
4929 seq_rtl_expr
= top
->sequence_rtl_expr
;
4932 /* After emitting to the outer-level insn chain, update the outer-level
4933 insn chain, and restore the previous saved state. */
4936 pop_topmost_sequence ()
4938 struct sequence_stack
*stack
, *top
= NULL
;
4940 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4943 top
->first
= first_insn
;
4944 top
->last
= last_insn
;
4945 /* ??? Why don't we save seq_rtl_expr here? */
4950 /* After emitting to a sequence, restore previous saved state.
4952 To get the contents of the sequence just made, you must call
4953 `get_insns' *before* calling here.
4955 If the compiler might have deferred popping arguments while
4956 generating this sequence, and this sequence will not be immediately
4957 inserted into the instruction stream, use do_pending_stack_adjust
4958 before calling get_insns. That will ensure that the deferred
4959 pops are inserted into this sequence, and not into some random
4960 location in the instruction stream. See INHIBIT_DEFER_POP for more
4961 information about deferred popping of arguments. */
4966 struct sequence_stack
*tem
= seq_stack
;
4968 first_insn
= tem
->first
;
4969 last_insn
= tem
->last
;
4970 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4971 seq_stack
= tem
->next
;
4973 memset (tem
, 0, sizeof (*tem
));
4974 tem
->next
= free_sequence_stack
;
4975 free_sequence_stack
= tem
;
4978 /* This works like end_sequence, but records the old sequence in FIRST
4982 end_full_sequence (first
, last
)
4985 *first
= first_insn
;
4990 /* Return 1 if currently emitting into a sequence. */
4995 return seq_stack
!= 0;
4998 /* Put the various virtual registers into REGNO_REG_RTX. */
5001 init_virtual_regs (es
)
5002 struct emit_status
*es
;
5004 rtx
*ptr
= es
->x_regno_reg_rtx
;
5005 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5006 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5007 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5008 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5009 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5013 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5014 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5015 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5016 static int copy_insn_n_scratches
;
5018 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5019 copied an ASM_OPERANDS.
5020 In that case, it is the original input-operand vector. */
5021 static rtvec orig_asm_operands_vector
;
5023 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5024 copied an ASM_OPERANDS.
5025 In that case, it is the copied input-operand vector. */
5026 static rtvec copy_asm_operands_vector
;
5028 /* Likewise for the constraints vector. */
5029 static rtvec orig_asm_constraints_vector
;
5030 static rtvec copy_asm_constraints_vector
;
5032 /* Recursively create a new copy of an rtx for copy_insn.
5033 This function differs from copy_rtx in that it handles SCRATCHes and
5034 ASM_OPERANDs properly.
5035 Normally, this function is not used directly; use copy_insn as front end.
5036 However, you could first copy an insn pattern with copy_insn and then use
5037 this function afterwards to properly copy any REG_NOTEs containing
5047 const char *format_ptr
;
5049 code
= GET_CODE (orig
);
5066 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5067 if (copy_insn_scratch_in
[i
] == orig
)
5068 return copy_insn_scratch_out
[i
];
5072 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5073 a LABEL_REF, it isn't sharable. */
5074 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5075 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5076 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5080 /* A MEM with a constant address is not sharable. The problem is that
5081 the constant address may need to be reloaded. If the mem is shared,
5082 then reloading one copy of this mem will cause all copies to appear
5083 to have been reloaded. */
5089 copy
= rtx_alloc (code
);
5091 /* Copy the various flags, and other information. We assume that
5092 all fields need copying, and then clear the fields that should
5093 not be copied. That is the sensible default behavior, and forces
5094 us to explicitly document why we are *not* copying a flag. */
5095 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5097 /* We do not copy the USED flag, which is used as a mark bit during
5098 walks over the RTL. */
5099 RTX_FLAG (copy
, used
) = 0;
5101 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5102 if (GET_RTX_CLASS (code
) == 'i')
5104 RTX_FLAG (copy
, jump
) = 0;
5105 RTX_FLAG (copy
, call
) = 0;
5106 RTX_FLAG (copy
, frame_related
) = 0;
5109 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5111 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5113 copy
->fld
[i
] = orig
->fld
[i
];
5114 switch (*format_ptr
++)
5117 if (XEXP (orig
, i
) != NULL
)
5118 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5123 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5124 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5125 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5126 XVEC (copy
, i
) = copy_asm_operands_vector
;
5127 else if (XVEC (orig
, i
) != NULL
)
5129 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5130 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5131 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5142 /* These are left unchanged. */
5150 if (code
== SCRATCH
)
5152 i
= copy_insn_n_scratches
++;
5153 if (i
>= MAX_RECOG_OPERANDS
)
5155 copy_insn_scratch_in
[i
] = orig
;
5156 copy_insn_scratch_out
[i
] = copy
;
5158 else if (code
== ASM_OPERANDS
)
5160 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5161 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5162 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5163 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5169 /* Create a new copy of an rtx.
5170 This function differs from copy_rtx in that it handles SCRATCHes and
5171 ASM_OPERANDs properly.
5172 INSN doesn't really have to be a full INSN; it could be just the
5178 copy_insn_n_scratches
= 0;
5179 orig_asm_operands_vector
= 0;
5180 orig_asm_constraints_vector
= 0;
5181 copy_asm_operands_vector
= 0;
5182 copy_asm_constraints_vector
= 0;
5183 return copy_insn_1 (insn
);
5186 /* Initialize data structures and variables in this file
5187 before generating rtl for each function. */
5192 struct function
*f
= cfun
;
5194 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5197 seq_rtl_expr
= NULL
;
5199 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5202 first_label_num
= label_num
;
5206 /* Init the tables that describe all the pseudo regs. */
5208 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5210 f
->emit
->regno_pointer_align
5211 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5212 * sizeof (unsigned char));
5215 = (rtx
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5219 = (tree
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5222 /* Put copies of all the hard registers into regno_reg_rtx. */
5223 memcpy (regno_reg_rtx
,
5224 static_regno_reg_rtx
,
5225 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5227 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5228 init_virtual_regs (f
->emit
);
5230 /* Indicate that the virtual registers and stack locations are
5232 REG_POINTER (stack_pointer_rtx
) = 1;
5233 REG_POINTER (frame_pointer_rtx
) = 1;
5234 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5235 REG_POINTER (arg_pointer_rtx
) = 1;
5237 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5238 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5239 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5240 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5241 REG_POINTER (virtual_cfa_rtx
) = 1;
5243 #ifdef STACK_BOUNDARY
5244 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5245 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5246 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5247 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5249 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5250 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5251 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5252 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5253 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5256 #ifdef INIT_EXPANDERS
5261 /* Generate the constant 0. */
5264 gen_const_vector_0 (mode
)
5265 enum machine_mode mode
;
5270 enum machine_mode inner
;
5272 units
= GET_MODE_NUNITS (mode
);
5273 inner
= GET_MODE_INNER (mode
);
5275 v
= rtvec_alloc (units
);
5277 /* We need to call this function after we to set CONST0_RTX first. */
5278 if (!CONST0_RTX (inner
))
5281 for (i
= 0; i
< units
; ++i
)
5282 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5284 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5288 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5289 all elements are zero. */
5291 gen_rtx_CONST_VECTOR (mode
, v
)
5292 enum machine_mode mode
;
5295 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5298 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5299 if (RTVEC_ELT (v
, i
) != inner_zero
)
5300 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5301 return CONST0_RTX (mode
);
5304 /* Create some permanent unique rtl objects shared between all functions.
5305 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5308 init_emit_once (line_numbers
)
5312 enum machine_mode mode
;
5313 enum machine_mode double_mode
;
5315 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5317 const_int_htab
= htab_create (37, const_int_htab_hash
,
5318 const_int_htab_eq
, NULL
);
5320 const_double_htab
= htab_create (37, const_double_htab_hash
,
5321 const_double_htab_eq
, NULL
);
5323 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
5324 mem_attrs_htab_eq
, NULL
);
5326 no_line_numbers
= ! line_numbers
;
5328 /* Compute the word and byte modes. */
5330 byte_mode
= VOIDmode
;
5331 word_mode
= VOIDmode
;
5332 double_mode
= VOIDmode
;
5334 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5335 mode
= GET_MODE_WIDER_MODE (mode
))
5337 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5338 && byte_mode
== VOIDmode
)
5341 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5342 && word_mode
== VOIDmode
)
5346 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5347 mode
= GET_MODE_WIDER_MODE (mode
))
5349 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5350 && double_mode
== VOIDmode
)
5354 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5356 /* Assign register numbers to the globally defined register rtx.
5357 This must be done at runtime because the register number field
5358 is in a union and some compilers can't initialize unions. */
5360 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5361 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5362 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5363 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5364 if (hard_frame_pointer_rtx
== 0)
5365 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5366 HARD_FRAME_POINTER_REGNUM
);
5367 if (arg_pointer_rtx
== 0)
5368 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5369 virtual_incoming_args_rtx
=
5370 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5371 virtual_stack_vars_rtx
=
5372 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5373 virtual_stack_dynamic_rtx
=
5374 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5375 virtual_outgoing_args_rtx
=
5376 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5377 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5379 /* Initialize RTL for commonly used hard registers. These are
5380 copied into regno_reg_rtx as we begin to compile each function. */
5381 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5382 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5384 #ifdef INIT_EXPANDERS
5385 /* This is to initialize {init|mark|free}_machine_status before the first
5386 call to push_function_context_to. This is needed by the Chill front
5387 end which calls push_function_context_to before the first call to
5388 init_function_start. */
5392 /* Create the unique rtx's for certain rtx codes and operand values. */
5394 /* Don't use gen_rtx here since gen_rtx in this case
5395 tries to use these variables. */
5396 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5397 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5398 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5400 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5401 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5402 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5404 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5406 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5407 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5408 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5409 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5411 for (i
= 0; i
<= 2; i
++)
5413 REAL_VALUE_TYPE
*r
=
5414 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5416 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5417 mode
= GET_MODE_WIDER_MODE (mode
))
5418 const_tiny_rtx
[i
][(int) mode
] =
5419 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5421 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5423 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5424 mode
= GET_MODE_WIDER_MODE (mode
))
5425 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5427 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5429 mode
= GET_MODE_WIDER_MODE (mode
))
5430 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5433 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5435 mode
= GET_MODE_WIDER_MODE (mode
))
5436 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5438 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5440 mode
= GET_MODE_WIDER_MODE (mode
))
5441 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5443 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5444 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5445 const_tiny_rtx
[0][i
] = const0_rtx
;
5447 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5448 if (STORE_FLAG_VALUE
== 1)
5449 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5451 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5452 return_address_pointer_rtx
5453 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5457 struct_value_rtx
= STRUCT_VALUE
;
5459 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5462 #ifdef STRUCT_VALUE_INCOMING
5463 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5465 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5466 struct_value_incoming_rtx
5467 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5469 struct_value_incoming_rtx
= struct_value_rtx
;
5473 #ifdef STATIC_CHAIN_REGNUM
5474 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5476 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5477 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5478 static_chain_incoming_rtx
5479 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5482 static_chain_incoming_rtx
= static_chain_rtx
;
5486 static_chain_rtx
= STATIC_CHAIN
;
5488 #ifdef STATIC_CHAIN_INCOMING
5489 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5491 static_chain_incoming_rtx
= static_chain_rtx
;
5495 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5496 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5499 /* Query and clear/ restore no_line_numbers. This is used by the
5500 switch / case handling in stmt.c to give proper line numbers in
5501 warnings about unreachable code. */
5504 force_line_numbers ()
5506 int old
= no_line_numbers
;
5508 no_line_numbers
= 0;
5510 force_next_line_note ();
5515 restore_line_number_status (old_value
)
5518 no_line_numbers
= old_value
;
5521 /* Produce exact duplicate of insn INSN after AFTER.
5522 Care updating of libcall regions if present. */
5525 emit_copy_of_insn_after (insn
, after
)
5529 rtx note1
, note2
, link
;
5531 switch (GET_CODE (insn
))
5534 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5538 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5542 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5543 if (CALL_INSN_FUNCTION_USAGE (insn
))
5544 CALL_INSN_FUNCTION_USAGE (new)
5545 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5546 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5547 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5554 /* Update LABEL_NUSES. */
5555 mark_jump_label (PATTERN (new), new, 0);
5557 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5559 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5561 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5562 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5564 if (GET_CODE (link
) == EXPR_LIST
)
5566 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5571 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5576 /* Fix the libcall sequences. */
5577 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5580 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5582 XEXP (note1
, 0) = p
;
5583 XEXP (note2
, 0) = new;
5588 #include "gt-emit-rtl.h"