1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl
[GR_MAX
];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
100 rtx (*gen_lowpart
) (enum machine_mode mode
, rtx x
) = gen_lowpart_general
;
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconst3
;
114 REAL_VALUE_TYPE dconst10
;
115 REAL_VALUE_TYPE dconstm1
;
116 REAL_VALUE_TYPE dconstm2
;
117 REAL_VALUE_TYPE dconsthalf
;
118 REAL_VALUE_TYPE dconstthird
;
119 REAL_VALUE_TYPE dconstpi
;
120 REAL_VALUE_TYPE dconste
;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
159 htab_t const_int_htab
;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
163 htab_t mem_attrs_htab
;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
167 htab_t reg_attrs_htab
;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
171 htab_t const_double_htab
;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx
make_jump_insn_raw (rtx
);
180 static rtx
make_call_insn_raw (rtx
);
181 static rtx
find_line_note (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void unshare_all_decls (tree
);
184 static void reset_used_decls (tree
);
185 static void mark_label_nuses (rtx
);
186 static hashval_t
const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t
const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx
lookup_const_double (rtx
);
191 static hashval_t
mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
195 static hashval_t
reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs
*get_reg_attrs (tree
, int);
198 static tree
component_ref_for_mem_expr (tree
);
199 static rtx
gen_const_vector_0 (enum machine_mode
);
200 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
201 static void copy_rtx_if_shared_1 (rtx
*orig
);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability
= -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x
)
212 return (hashval_t
) INTVAL ((rtx
) x
);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x
, const void *y
)
222 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x
)
232 if (GET_MODE (value
) == VOIDmode
)
233 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
236 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h
^= GET_MODE (value
);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x
, const void *y
)
248 rtx a
= (rtx
)x
, b
= (rtx
)y
;
250 if (GET_MODE (a
) != GET_MODE (b
))
252 if (GET_MODE (a
) == VOIDmode
)
253 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
254 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
257 CONST_DOUBLE_REAL_VALUE (b
));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x
)
265 mem_attrs
*p
= (mem_attrs
*) x
;
267 return (p
->alias
^ (p
->align
* 1000)
268 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
269 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x
, const void *y
)
280 mem_attrs
*p
= (mem_attrs
*) x
;
281 mem_attrs
*q
= (mem_attrs
*) y
;
283 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
284 && p
->size
== q
->size
&& p
->align
== q
->align
);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
293 unsigned int align
, enum machine_mode mode
)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias
== 0 && expr
== 0 && offset
== 0
303 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
304 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
305 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x
)
329 reg_attrs
*p
= (reg_attrs
*) x
;
331 return ((p
->offset
* 1000) ^ (long) p
->decl
);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x
, const void *y
)
341 reg_attrs
*p
= (reg_attrs
*) x
;
342 reg_attrs
*q
= (reg_attrs
*) y
;
344 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl
, int offset
)
356 /* If everything is the default, we can just return zero. */
357 if (decl
== 0 && offset
== 0)
361 attrs
.offset
= offset
;
363 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
366 *slot
= ggc_alloc (sizeof (reg_attrs
));
367 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode
, int regno
)
380 rtx x
= gen_rtx_raw_REG (mode
, regno
);
381 ORIGINAL_REGNO (x
) = regno
;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
394 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
395 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
399 return const_true_rtx
;
402 /* Look up the CONST_INT in the hash table. */
403 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
404 (hashval_t
) arg
, INSERT
);
406 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
412 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
414 return GEN_INT (trunc_int_for_mode (c
, mode
));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real
)
427 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
439 rtx real
= rtx_alloc (CONST_DOUBLE
);
440 PUT_MODE (real
, mode
);
442 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
444 return lookup_const_double (real
);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
458 if (mode
!= VOIDmode
)
461 if (GET_MODE_CLASS (mode
) != MODE_INT
462 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width
= GET_MODE_BITSIZE (mode
);
472 if (width
< HOST_BITS_PER_WIDE_INT
473 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
474 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
475 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
476 else if (width
== HOST_BITS_PER_WIDE_INT
477 && ! (i1
== ~0 && i0
< 0))
479 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width
< HOST_BITS_PER_WIDE_INT
493 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
494 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width
<= HOST_BITS_PER_WIDE_INT
)
515 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
522 /* We use VOIDmode for integers. */
523 value
= rtx_alloc (CONST_DOUBLE
);
524 PUT_MODE (value
, VOIDmode
);
526 CONST_DOUBLE_LOW (value
) = i0
;
527 CONST_DOUBLE_HIGH (value
) = i1
;
529 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
530 XWINT (value
, i
) = 0;
532 return lookup_const_double (value
);
536 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode
== Pmode
&& !reload_in_progress
)
554 if (regno
== FRAME_POINTER_REGNUM
555 && (!reload_completed
|| frame_pointer_needed
))
556 return frame_pointer_rtx
;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno
== HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed
|| frame_pointer_needed
))
560 return hard_frame_pointer_rtx
;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno
== ARG_POINTER_REGNUM
)
564 return arg_pointer_rtx
;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
568 return return_address_pointer_rtx
;
570 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
572 return pic_offset_table_rtx
;
573 if (regno
== STACK_POINTER_REGNUM
)
574 return stack_pointer_rtx
;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno
< FIRST_PSEUDO_REGISTER
593 && reg_raw_mode
[regno
] == mode
)
594 return regno_reg_rtx
[regno
];
597 return gen_raw_REG (mode
, regno
);
601 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
603 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
628 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
637 enum machine_mode inmode
;
639 inmode
= GET_MODE (reg
);
640 if (inmode
== VOIDmode
)
642 return gen_rtx_SUBREG (mode
, reg
,
643 subreg_lowpart_offset (mode
, inmode
));
646 /* gen_rtvec (n, [rt1, ..., rtn])
648 ** This routine creates an rtvec and stores within it the
649 ** pointers to rtx's which are its arguments.
654 gen_rtvec (int n
, ...)
663 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
665 vector
= alloca (n
* sizeof (rtx
));
667 for (i
= 0; i
< n
; i
++)
668 vector
[i
] = va_arg (p
, rtx
);
670 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
674 return gen_rtvec_v (save_n
, vector
);
678 gen_rtvec_v (int n
, rtx
*argp
)
684 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
686 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
688 for (i
= 0; i
< n
; i
++)
689 rt_val
->elem
[i
] = *argp
++;
694 /* Generate a REG rtx for a new pseudo register of mode MODE.
695 This pseudo is assigned the next sequential register number. */
698 gen_reg_rtx (enum machine_mode mode
)
700 struct function
*f
= cfun
;
703 /* Don't let anything called after initial flow analysis create new
708 if (generating_concat_p
709 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
710 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
712 /* For complex modes, don't make a single pseudo.
713 Instead, make a CONCAT of two pseudos.
714 This allows noncontiguous allocation of the real and imaginary parts,
715 which makes much better code. Besides, allocating DCmode
716 pseudos overstrains reload on some machines like the 386. */
717 rtx realpart
, imagpart
;
718 enum machine_mode partmode
= GET_MODE_INNER (mode
);
720 realpart
= gen_reg_rtx (partmode
);
721 imagpart
= gen_reg_rtx (partmode
);
722 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
725 /* Make sure regno_pointer_align, and regno_reg_rtx are large
726 enough to have an element for this pseudo reg number. */
728 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
730 int old_size
= f
->emit
->regno_pointer_align_length
;
734 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
735 memset (new + old_size
, 0, old_size
);
736 f
->emit
->regno_pointer_align
= (unsigned char *) new;
738 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
739 old_size
* 2 * sizeof (rtx
));
740 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
741 regno_reg_rtx
= new1
;
743 f
->emit
->regno_pointer_align_length
= old_size
* 2;
746 val
= gen_raw_REG (mode
, reg_rtx_no
);
747 regno_reg_rtx
[reg_rtx_no
++] = val
;
751 /* Generate a register with same attributes as REG,
752 but offsetted by OFFSET. */
755 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
757 rtx
new = gen_rtx_REG (mode
, regno
);
758 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
759 REG_OFFSET (reg
) + offset
);
763 /* Set the decl for MEM to DECL. */
766 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
768 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
770 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
773 /* Set the register attributes for registers contained in PARM_RTX.
774 Use needed values from memory attributes of MEM. */
777 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
779 if (GET_CODE (parm_rtx
) == REG
)
780 set_reg_attrs_from_mem (parm_rtx
, mem
);
781 else if (GET_CODE (parm_rtx
) == PARALLEL
)
783 /* Check for a NULL entry in the first slot, used to indicate that the
784 parameter goes both on the stack and in registers. */
785 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
786 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
788 rtx x
= XVECEXP (parm_rtx
, 0, i
);
789 if (GET_CODE (XEXP (x
, 0)) == REG
)
790 REG_ATTRS (XEXP (x
, 0))
791 = get_reg_attrs (MEM_EXPR (mem
),
792 INTVAL (XEXP (x
, 1)));
797 /* Assign the RTX X to declaration T. */
799 set_decl_rtl (tree t
, rtx x
)
801 DECL_CHECK (t
)->decl
.rtl
= x
;
805 /* For register, we maintain the reverse information too. */
806 if (GET_CODE (x
) == REG
)
807 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
808 else if (GET_CODE (x
) == SUBREG
)
809 REG_ATTRS (SUBREG_REG (x
))
810 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
811 if (GET_CODE (x
) == CONCAT
)
813 if (REG_P (XEXP (x
, 0)))
814 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
815 if (REG_P (XEXP (x
, 1)))
816 REG_ATTRS (XEXP (x
, 1))
817 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
819 if (GET_CODE (x
) == PARALLEL
)
822 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
824 rtx y
= XVECEXP (x
, 0, i
);
825 if (REG_P (XEXP (y
, 0)))
826 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
831 /* Assign the RTX X to parameter declaration T. */
833 set_decl_incoming_rtl (tree t
, rtx x
)
835 DECL_INCOMING_RTL (t
) = x
;
839 /* For register, we maintain the reverse information too. */
840 if (GET_CODE (x
) == REG
)
841 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
842 else if (GET_CODE (x
) == SUBREG
)
843 REG_ATTRS (SUBREG_REG (x
))
844 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
845 if (GET_CODE (x
) == CONCAT
)
847 if (REG_P (XEXP (x
, 0)))
848 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
849 if (REG_P (XEXP (x
, 1)))
850 REG_ATTRS (XEXP (x
, 1))
851 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
853 if (GET_CODE (x
) == PARALLEL
)
857 /* Check for a NULL entry, used to indicate that the parameter goes
858 both on the stack and in registers. */
859 if (XEXP (XVECEXP (x
, 0, 0), 0))
864 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
866 rtx y
= XVECEXP (x
, 0, i
);
867 if (REG_P (XEXP (y
, 0)))
868 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
873 /* Identify REG (which may be a CONCAT) as a user register. */
876 mark_user_reg (rtx reg
)
878 if (GET_CODE (reg
) == CONCAT
)
880 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
881 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
883 else if (GET_CODE (reg
) == REG
)
884 REG_USERVAR_P (reg
) = 1;
889 /* Identify REG as a probable pointer register and show its alignment
890 as ALIGN, if nonzero. */
893 mark_reg_pointer (rtx reg
, int align
)
895 if (! REG_POINTER (reg
))
897 REG_POINTER (reg
) = 1;
900 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
902 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
903 /* We can no-longer be sure just how aligned this pointer is. */
904 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
907 /* Return 1 plus largest pseudo reg number used in the current function. */
915 /* Return 1 + the largest label number used so far in the current function. */
920 if (last_label_num
&& label_num
== base_label_num
)
921 return last_label_num
;
925 /* Return first label number used in this function (if any were used). */
928 get_first_label_num (void)
930 return first_label_num
;
933 /* Return the final regno of X, which is a SUBREG of a hard
936 subreg_hard_regno (rtx x
, int check_mode
)
938 enum machine_mode mode
= GET_MODE (x
);
939 unsigned int byte_offset
, base_regno
, final_regno
;
940 rtx reg
= SUBREG_REG (x
);
942 /* This is where we attempt to catch illegal subregs
943 created by the compiler. */
944 if (GET_CODE (x
) != SUBREG
945 || GET_CODE (reg
) != REG
)
947 base_regno
= REGNO (reg
);
948 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
950 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
952 #ifdef ENABLE_CHECKING
953 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
954 SUBREG_BYTE (x
), mode
))
957 /* Catch non-congruent offsets too. */
958 byte_offset
= SUBREG_BYTE (x
);
959 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
962 final_regno
= subreg_regno (x
);
967 /* Return a value representing some low-order bits of X, where the number
968 of low-order bits is given by MODE. Note that no conversion is done
969 between floating-point and fixed-point values, rather, the bit
970 representation is returned.
972 This function handles the cases in common between gen_lowpart, below,
973 and two variants in cse.c and combine.c. These are the cases that can
974 be safely handled at all points in the compilation.
976 If this is not a case we can handle, return 0. */
979 gen_lowpart_common (enum machine_mode mode
, rtx x
)
981 int msize
= GET_MODE_SIZE (mode
);
984 enum machine_mode innermode
;
986 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
987 so we have to make one up. Yuk. */
988 innermode
= GET_MODE (x
);
989 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
990 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
991 else if (innermode
== VOIDmode
)
992 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
994 xsize
= GET_MODE_SIZE (innermode
);
996 if (innermode
== VOIDmode
|| innermode
== BLKmode
)
999 if (innermode
== mode
)
1002 /* MODE must occupy no more words than the mode of X. */
1003 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1004 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1007 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1008 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1011 offset
= subreg_lowpart_offset (mode
, innermode
);
1013 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1014 && (GET_MODE_CLASS (mode
) == MODE_INT
1015 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1017 /* If we are getting the low-order part of something that has been
1018 sign- or zero-extended, we can either just use the object being
1019 extended or make a narrower extension. If we want an even smaller
1020 piece than the size of the object being extended, call ourselves
1023 This case is used mostly by combine and cse. */
1025 if (GET_MODE (XEXP (x
, 0)) == mode
)
1027 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1028 return gen_lowpart_common (mode
, XEXP (x
, 0));
1029 else if (msize
< xsize
)
1030 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1032 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1033 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1034 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1035 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1037 /* Otherwise, we can't do this. */
1041 /* Return the constant real or imaginary part (which has mode MODE)
1042 of a complex value X. The IMAGPART_P argument determines whether
1043 the real or complex component should be returned. This function
1044 returns NULL_RTX if the component isn't a constant. */
1047 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1051 if (GET_CODE (x
) == MEM
1052 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1054 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1055 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1057 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1058 if (TREE_CODE (part
) == REAL_CST
1059 || TREE_CODE (part
) == INTEGER_CST
)
1060 return expand_expr (part
, NULL_RTX
, mode
, 0);
1066 /* Return the real part (which has mode MODE) of a complex value X.
1067 This always comes at the low address in memory. */
1070 gen_realpart (enum machine_mode mode
, rtx x
)
1074 /* Handle complex constants. */
1075 part
= gen_complex_constant_part (mode
, x
, 0);
1076 if (part
!= NULL_RTX
)
1079 if (WORDS_BIG_ENDIAN
1080 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1082 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1084 ("can't access real part of complex value in hard register");
1085 else if (WORDS_BIG_ENDIAN
)
1086 return gen_highpart (mode
, x
);
1088 return gen_lowpart (mode
, x
);
1091 /* Return the imaginary part (which has mode MODE) of a complex value X.
1092 This always comes at the high address in memory. */
1095 gen_imagpart (enum machine_mode mode
, rtx x
)
1099 /* Handle complex constants. */
1100 part
= gen_complex_constant_part (mode
, x
, 1);
1101 if (part
!= NULL_RTX
)
1104 if (WORDS_BIG_ENDIAN
)
1105 return gen_lowpart (mode
, x
);
1106 else if (! WORDS_BIG_ENDIAN
1107 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1109 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1111 ("can't access imaginary part of complex value in hard register");
1113 return gen_highpart (mode
, x
);
1116 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1117 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1118 least-significant part of X.
1119 MODE specifies how big a part of X to return;
1120 it usually should not be larger than a word.
1121 If X is a MEM whose address is a QUEUED, the value may be so also. */
1124 gen_lowpart_general (enum machine_mode mode
, rtx x
)
1126 rtx result
= gen_lowpart_common (mode
, x
);
1130 else if (GET_CODE (x
) == REG
)
1132 /* Must be a hard reg that's not valid in MODE. */
1133 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1138 else if (GET_CODE (x
) == MEM
)
1140 /* The only additional case we can do is MEM. */
1143 /* The following exposes the use of "x" to CSE. */
1144 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1145 && SCALAR_INT_MODE_P (GET_MODE (x
))
1146 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1147 GET_MODE_BITSIZE (GET_MODE (x
)))
1148 && ! no_new_pseudos
)
1149 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1151 if (WORDS_BIG_ENDIAN
)
1152 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1153 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1155 if (BYTES_BIG_ENDIAN
)
1156 /* Adjust the address so that the address-after-the-data
1158 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1159 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1161 return adjust_address (x
, mode
, offset
);
1163 else if (GET_CODE (x
) == ADDRESSOF
)
1164 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1169 /* Like `gen_lowpart', but refer to the most significant part.
1170 This is used to access the imaginary part of a complex number. */
1173 gen_highpart (enum machine_mode mode
, rtx x
)
1175 unsigned int msize
= GET_MODE_SIZE (mode
);
1178 /* This case loses if X is a subreg. To catch bugs early,
1179 complain if an invalid MODE is used even in other cases. */
1180 if (msize
> UNITS_PER_WORD
1181 && msize
!= (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1184 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1185 subreg_highpart_offset (mode
, GET_MODE (x
)));
1187 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1188 the target if we have a MEM. gen_highpart must return a valid operand,
1189 emitting code if necessary to do so. */
1190 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1191 result
= validize_mem (result
);
1198 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1199 be VOIDmode constant. */
1201 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1203 if (GET_MODE (exp
) != VOIDmode
)
1205 if (GET_MODE (exp
) != innermode
)
1207 return gen_highpart (outermode
, exp
);
1209 return simplify_gen_subreg (outermode
, exp
, innermode
,
1210 subreg_highpart_offset (outermode
, innermode
));
1213 /* Return offset in bytes to get OUTERMODE low part
1214 of the value in mode INNERMODE stored in memory in target format. */
1217 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1219 unsigned int offset
= 0;
1220 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1224 if (WORDS_BIG_ENDIAN
)
1225 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1226 if (BYTES_BIG_ENDIAN
)
1227 offset
+= difference
% UNITS_PER_WORD
;
1233 /* Return offset in bytes to get OUTERMODE high part
1234 of the value in mode INNERMODE stored in memory in target format. */
1236 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1238 unsigned int offset
= 0;
1239 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1241 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1246 if (! WORDS_BIG_ENDIAN
)
1247 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1248 if (! BYTES_BIG_ENDIAN
)
1249 offset
+= difference
% UNITS_PER_WORD
;
1255 /* Return 1 iff X, assumed to be a SUBREG,
1256 refers to the least significant part of its containing reg.
1257 If X is not a SUBREG, always return 1 (it is its own low part!). */
1260 subreg_lowpart_p (rtx x
)
1262 if (GET_CODE (x
) != SUBREG
)
1264 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1267 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1268 == SUBREG_BYTE (x
));
1271 /* Return subword OFFSET of operand OP.
1272 The word number, OFFSET, is interpreted as the word number starting
1273 at the low-order address. OFFSET 0 is the low-order word if not
1274 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1276 If we cannot extract the required word, we return zero. Otherwise,
1277 an rtx corresponding to the requested word will be returned.
1279 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1280 reload has completed, a valid address will always be returned. After
1281 reload, if a valid address cannot be returned, we return zero.
1283 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1284 it is the responsibility of the caller.
1286 MODE is the mode of OP in case it is a CONST_INT.
1288 ??? This is still rather broken for some cases. The problem for the
1289 moment is that all callers of this thing provide no 'goal mode' to
1290 tell us to work with. This exists because all callers were written
1291 in a word based SUBREG world.
1292 Now use of this function can be deprecated by simplify_subreg in most
1297 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1299 if (mode
== VOIDmode
)
1300 mode
= GET_MODE (op
);
1302 if (mode
== VOIDmode
)
1305 /* If OP is narrower than a word, fail. */
1307 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1310 /* If we want a word outside OP, return zero. */
1312 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1315 /* Form a new MEM at the requested address. */
1316 if (GET_CODE (op
) == MEM
)
1318 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1320 if (! validate_address
)
1323 else if (reload_completed
)
1325 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1329 return replace_equiv_address (new, XEXP (new, 0));
1332 /* Rest can be handled by simplify_subreg. */
1333 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1336 /* Similar to `operand_subword', but never return 0. If we can't extract
1337 the required subword, put OP into a register and try again. If that fails,
1338 abort. We always validate the address in this case.
1340 MODE is the mode of OP, in case it is CONST_INT. */
1343 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1345 rtx result
= operand_subword (op
, offset
, 1, mode
);
1350 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1352 /* If this is a register which can not be accessed by words, copy it
1353 to a pseudo register. */
1354 if (GET_CODE (op
) == REG
)
1355 op
= copy_to_reg (op
);
1357 op
= force_reg (mode
, op
);
1360 result
= operand_subword (op
, offset
, 1, mode
);
1367 /* Given a compare instruction, swap the operands.
1368 A test instruction is changed into a compare of 0 against the operand. */
1371 reverse_comparison (rtx insn
)
1373 rtx body
= PATTERN (insn
);
1376 if (GET_CODE (body
) == SET
)
1377 comp
= SET_SRC (body
);
1379 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1381 if (GET_CODE (comp
) == COMPARE
)
1383 rtx op0
= XEXP (comp
, 0);
1384 rtx op1
= XEXP (comp
, 1);
1385 XEXP (comp
, 0) = op1
;
1386 XEXP (comp
, 1) = op0
;
1390 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1391 CONST0_RTX (GET_MODE (comp
)), comp
);
1392 if (GET_CODE (body
) == SET
)
1393 SET_SRC (body
) = new;
1395 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1399 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1400 or (2) a component ref of something variable. Represent the later with
1401 a NULL expression. */
1404 component_ref_for_mem_expr (tree ref
)
1406 tree inner
= TREE_OPERAND (ref
, 0);
1408 if (TREE_CODE (inner
) == COMPONENT_REF
)
1409 inner
= component_ref_for_mem_expr (inner
);
1412 tree placeholder_ptr
= 0;
1414 /* Now remove any conversions: they don't change what the underlying
1415 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1416 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1417 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1418 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1419 || TREE_CODE (inner
) == SAVE_EXPR
1420 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1421 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1422 inner
= find_placeholder (inner
, &placeholder_ptr
);
1424 inner
= TREE_OPERAND (inner
, 0);
1426 if (! DECL_P (inner
))
1430 if (inner
== TREE_OPERAND (ref
, 0))
1433 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1434 TREE_OPERAND (ref
, 1));
1437 /* Returns 1 if both MEM_EXPR can be considered equal
1441 mem_expr_equal_p (tree expr1
, tree expr2
)
1446 if (! expr1
|| ! expr2
)
1449 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1452 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1454 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1455 TREE_OPERAND (expr2
, 0))
1456 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1457 TREE_OPERAND (expr2
, 1));
1459 if (TREE_CODE (expr1
) == INDIRECT_REF
)
1460 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1461 TREE_OPERAND (expr2
, 0));
1463 /* Decls with different pointers can't be equal. */
1467 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1468 have been resolved here. */
1471 /* Given REF, a MEM, and T, either the type of X or the expression
1472 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1473 if we are making a new object of this type. BITPOS is nonzero if
1474 there is an offset outstanding on T that will be applied later. */
1477 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1478 HOST_WIDE_INT bitpos
)
1480 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1481 tree expr
= MEM_EXPR (ref
);
1482 rtx offset
= MEM_OFFSET (ref
);
1483 rtx size
= MEM_SIZE (ref
);
1484 unsigned int align
= MEM_ALIGN (ref
);
1485 HOST_WIDE_INT apply_bitpos
= 0;
1488 /* It can happen that type_for_mode was given a mode for which there
1489 is no language-level type. In which case it returns NULL, which
1494 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1495 if (type
== error_mark_node
)
1498 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1499 wrong answer, as it assumes that DECL_RTL already has the right alias
1500 info. Callers should not set DECL_RTL until after the call to
1501 set_mem_attributes. */
1502 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1505 /* Get the alias set from the expression or type (perhaps using a
1506 front-end routine) and use it. */
1507 alias
= get_alias_set (t
);
1509 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1510 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1511 RTX_UNCHANGING_P (ref
)
1512 |= ((lang_hooks
.honor_readonly
1513 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1514 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1516 /* If we are making an object of this type, or if this is a DECL, we know
1517 that it is a scalar if the type is not an aggregate. */
1518 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1519 MEM_SCALAR_P (ref
) = 1;
1521 /* We can set the alignment from the type if we are making an object,
1522 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1523 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1524 align
= MAX (align
, TYPE_ALIGN (type
));
1526 /* If the size is known, we can set that. */
1527 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1528 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1530 /* If T is not a type, we may be able to deduce some more information about
1534 maybe_set_unchanging (ref
, t
);
1535 if (TREE_THIS_VOLATILE (t
))
1536 MEM_VOLATILE_P (ref
) = 1;
1538 /* Now remove any conversions: they don't change what the underlying
1539 object is. Likewise for SAVE_EXPR. */
1540 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1541 || TREE_CODE (t
) == NON_LVALUE_EXPR
1542 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1543 || TREE_CODE (t
) == SAVE_EXPR
)
1544 t
= TREE_OPERAND (t
, 0);
1546 /* If this expression can't be addressed (e.g., it contains a reference
1547 to a non-addressable field), show we don't change its alias set. */
1548 if (! can_address_p (t
))
1549 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1551 /* If this is a decl, set the attributes of the MEM from it. */
1555 offset
= const0_rtx
;
1556 apply_bitpos
= bitpos
;
1557 size
= (DECL_SIZE_UNIT (t
)
1558 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1559 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1560 align
= DECL_ALIGN (t
);
1563 /* If this is a constant, we know the alignment. */
1564 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1566 align
= TYPE_ALIGN (type
);
1567 #ifdef CONSTANT_ALIGNMENT
1568 align
= CONSTANT_ALIGNMENT (t
, align
);
1572 /* If this is a field reference and not a bit-field, record it. */
1573 /* ??? There is some information that can be gleened from bit-fields,
1574 such as the word offset in the structure that might be modified.
1575 But skip it for now. */
1576 else if (TREE_CODE (t
) == COMPONENT_REF
1577 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1579 expr
= component_ref_for_mem_expr (t
);
1580 offset
= const0_rtx
;
1581 apply_bitpos
= bitpos
;
1582 /* ??? Any reason the field size would be different than
1583 the size we got from the type? */
1586 /* If this is an array reference, look for an outer field reference. */
1587 else if (TREE_CODE (t
) == ARRAY_REF
)
1589 tree off_tree
= size_zero_node
;
1590 /* We can't modify t, because we use it at the end of the
1596 tree index
= TREE_OPERAND (t2
, 1);
1597 tree array
= TREE_OPERAND (t2
, 0);
1598 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1599 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1600 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1602 /* We assume all arrays have sizes that are a multiple of a byte.
1603 First subtract the lower bound, if any, in the type of the
1604 index, then convert to sizetype and multiply by the size of the
1606 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1607 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1610 /* If the index has a self-referential type, pass it to a
1611 WITH_RECORD_EXPR; if the component size is, pass our
1612 component to one. */
1613 if (CONTAINS_PLACEHOLDER_P (index
))
1614 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t2
);
1615 if (CONTAINS_PLACEHOLDER_P (unit_size
))
1616 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1620 = fold (build (PLUS_EXPR
, sizetype
,
1621 fold (build (MULT_EXPR
, sizetype
,
1625 t2
= TREE_OPERAND (t2
, 0);
1627 while (TREE_CODE (t2
) == ARRAY_REF
);
1633 if (host_integerp (off_tree
, 1))
1635 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1636 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1637 align
= DECL_ALIGN (t2
);
1638 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1640 offset
= GEN_INT (ioff
);
1641 apply_bitpos
= bitpos
;
1644 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1646 expr
= component_ref_for_mem_expr (t2
);
1647 if (host_integerp (off_tree
, 1))
1649 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1650 apply_bitpos
= bitpos
;
1652 /* ??? Any reason the field size would be different than
1653 the size we got from the type? */
1655 else if (flag_argument_noalias
> 1
1656 && TREE_CODE (t2
) == INDIRECT_REF
1657 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1664 /* If this is a Fortran indirect argument reference, record the
1666 else if (flag_argument_noalias
> 1
1667 && TREE_CODE (t
) == INDIRECT_REF
1668 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1675 /* If we modified OFFSET based on T, then subtract the outstanding
1676 bit position offset. Similarly, increase the size of the accessed
1677 object to contain the negative offset. */
1680 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1682 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1685 /* Now set the attributes we computed above. */
1687 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1689 /* If this is already known to be a scalar or aggregate, we are done. */
1690 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1693 /* If it is a reference into an aggregate, this is part of an aggregate.
1694 Otherwise we don't know. */
1695 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1696 || TREE_CODE (t
) == ARRAY_RANGE_REF
1697 || TREE_CODE (t
) == BIT_FIELD_REF
)
1698 MEM_IN_STRUCT_P (ref
) = 1;
1702 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1704 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1707 /* Set the decl for MEM to DECL. */
1710 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1713 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1714 GEN_INT (REG_OFFSET (reg
)),
1715 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1718 /* Set the alias set of MEM to SET. */
1721 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1723 #ifdef ENABLE_CHECKING
1724 /* If the new and old alias sets don't conflict, something is wrong. */
1725 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1729 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1730 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1734 /* Set the alignment of MEM to ALIGN bits. */
1737 set_mem_align (rtx mem
, unsigned int align
)
1739 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1740 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1744 /* Set the expr for MEM to EXPR. */
1747 set_mem_expr (rtx mem
, tree expr
)
1750 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1751 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1754 /* Set the offset of MEM to OFFSET. */
1757 set_mem_offset (rtx mem
, rtx offset
)
1759 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1760 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1764 /* Set the size of MEM to SIZE. */
1767 set_mem_size (rtx mem
, rtx size
)
1769 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1770 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1774 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1775 and its address changed to ADDR. (VOIDmode means don't change the mode.
1776 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1777 returned memory location is required to be valid. The memory
1778 attributes are not changed. */
1781 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1785 if (GET_CODE (memref
) != MEM
)
1787 if (mode
== VOIDmode
)
1788 mode
= GET_MODE (memref
);
1790 addr
= XEXP (memref
, 0);
1791 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1792 && (!validate
|| memory_address_p (mode
, addr
)))
1797 if (reload_in_progress
|| reload_completed
)
1799 if (! memory_address_p (mode
, addr
))
1803 addr
= memory_address (mode
, addr
);
1806 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1809 new = gen_rtx_MEM (mode
, addr
);
1810 MEM_COPY_ATTRIBUTES (new, memref
);
1814 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1815 way we are changing MEMREF, so we only preserve the alias set. */
1818 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1820 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1821 enum machine_mode mmode
= GET_MODE (new);
1824 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1825 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1827 /* If there are no changes, just return the original memory reference. */
1830 if (MEM_ATTRS (memref
) == 0
1831 || (MEM_EXPR (memref
) == NULL
1832 && MEM_OFFSET (memref
) == NULL
1833 && MEM_SIZE (memref
) == size
1834 && MEM_ALIGN (memref
) == align
))
1837 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1838 MEM_COPY_ATTRIBUTES (new, memref
);
1842 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1847 /* Return a memory reference like MEMREF, but with its mode changed
1848 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1849 nonzero, the memory address is forced to be valid.
1850 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1851 and caller is responsible for adjusting MEMREF base register. */
1854 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1855 int validate
, int adjust
)
1857 rtx addr
= XEXP (memref
, 0);
1859 rtx memoffset
= MEM_OFFSET (memref
);
1861 unsigned int memalign
= MEM_ALIGN (memref
);
1863 /* If there are no changes, just return the original memory reference. */
1864 if (mode
== GET_MODE (memref
) && !offset
1865 && (!validate
|| memory_address_p (mode
, addr
)))
1868 /* ??? Prefer to create garbage instead of creating shared rtl.
1869 This may happen even if offset is nonzero -- consider
1870 (plus (plus reg reg) const_int) -- so do this always. */
1871 addr
= copy_rtx (addr
);
1875 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1876 object, we can merge it into the LO_SUM. */
1877 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1879 && (unsigned HOST_WIDE_INT
) offset
1880 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1881 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1882 plus_constant (XEXP (addr
, 1), offset
));
1884 addr
= plus_constant (addr
, offset
);
1887 new = change_address_1 (memref
, mode
, addr
, validate
);
1889 /* Compute the new values of the memory attributes due to this adjustment.
1890 We add the offsets and update the alignment. */
1892 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1894 /* Compute the new alignment by taking the MIN of the alignment and the
1895 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1900 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1902 /* We can compute the size in a number of ways. */
1903 if (GET_MODE (new) != BLKmode
)
1904 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1905 else if (MEM_SIZE (memref
))
1906 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1908 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1909 memoffset
, size
, memalign
, GET_MODE (new));
1911 /* At some point, we should validate that this offset is within the object,
1912 if all the appropriate values are known. */
1916 /* Return a memory reference like MEMREF, but with its mode changed
1917 to MODE and its address changed to ADDR, which is assumed to be
1918 MEMREF offseted by OFFSET bytes. If VALIDATE is
1919 nonzero, the memory address is forced to be valid. */
1922 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1923 HOST_WIDE_INT offset
, int validate
)
1925 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1926 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1929 /* Return a memory reference like MEMREF, but whose address is changed by
1930 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1931 known to be in OFFSET (possibly 1). */
1934 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1936 rtx
new, addr
= XEXP (memref
, 0);
1938 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1940 /* At this point we don't know _why_ the address is invalid. It
1941 could have secondary memory references, multiplies or anything.
1943 However, if we did go and rearrange things, we can wind up not
1944 being able to recognize the magic around pic_offset_table_rtx.
1945 This stuff is fragile, and is yet another example of why it is
1946 bad to expose PIC machinery too early. */
1947 if (! memory_address_p (GET_MODE (memref
), new)
1948 && GET_CODE (addr
) == PLUS
1949 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1951 addr
= force_reg (GET_MODE (addr
), addr
);
1952 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1955 update_temp_slot_address (XEXP (memref
, 0), new);
1956 new = change_address_1 (memref
, VOIDmode
, new, 1);
1958 /* If there are no changes, just return the original memory reference. */
1962 /* Update the alignment to reflect the offset. Reset the offset, which
1965 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1966 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
1971 /* Return a memory reference like MEMREF, but with its address changed to
1972 ADDR. The caller is asserting that the actual piece of memory pointed
1973 to is the same, just the form of the address is being changed, such as
1974 by putting something into a register. */
1977 replace_equiv_address (rtx memref
, rtx addr
)
1979 /* change_address_1 copies the memory attribute structure without change
1980 and that's exactly what we want here. */
1981 update_temp_slot_address (XEXP (memref
, 0), addr
);
1982 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1985 /* Likewise, but the reference is not required to be valid. */
1988 replace_equiv_address_nv (rtx memref
, rtx addr
)
1990 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1993 /* Return a memory reference like MEMREF, but with its mode widened to
1994 MODE and offset by OFFSET. This would be used by targets that e.g.
1995 cannot issue QImode memory operations and have to use SImode memory
1996 operations plus masking logic. */
1999 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2001 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2002 tree expr
= MEM_EXPR (new);
2003 rtx memoffset
= MEM_OFFSET (new);
2004 unsigned int size
= GET_MODE_SIZE (mode
);
2006 /* If there are no changes, just return the original memory reference. */
2010 /* If we don't know what offset we were at within the expression, then
2011 we can't know if we've overstepped the bounds. */
2017 if (TREE_CODE (expr
) == COMPONENT_REF
)
2019 tree field
= TREE_OPERAND (expr
, 1);
2021 if (! DECL_SIZE_UNIT (field
))
2027 /* Is the field at least as large as the access? If so, ok,
2028 otherwise strip back to the containing structure. */
2029 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2030 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2031 && INTVAL (memoffset
) >= 0)
2034 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2040 expr
= TREE_OPERAND (expr
, 0);
2041 memoffset
= (GEN_INT (INTVAL (memoffset
)
2042 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2043 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2046 /* Similarly for the decl. */
2047 else if (DECL_P (expr
)
2048 && DECL_SIZE_UNIT (expr
)
2049 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2050 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2051 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2055 /* The widened memory access overflows the expression, which means
2056 that it could alias another expression. Zap it. */
2063 memoffset
= NULL_RTX
;
2065 /* The widened memory may alias other stuff, so zap the alias set. */
2066 /* ??? Maybe use get_alias_set on any remaining expression. */
2068 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2069 MEM_ALIGN (new), mode
);
2074 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2077 gen_label_rtx (void)
2079 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2080 NULL
, label_num
++, NULL
);
2083 /* For procedure integration. */
2085 /* Install new pointers to the first and last insns in the chain.
2086 Also, set cur_insn_uid to one higher than the last in use.
2087 Used for an inline-procedure after copying the insn chain. */
2090 set_new_first_and_last_insn (rtx first
, rtx last
)
2098 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2099 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2104 /* Set the last label number found in the current function.
2105 This is used when belatedly compiling an inline function. */
2108 set_new_last_label_num (int last
)
2110 base_label_num
= label_num
;
2111 last_label_num
= last
;
2114 /* Restore all variables describing the current status from the structure *P.
2115 This is used after a nested function. */
2118 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2123 /* Go through all the RTL insn bodies and copy any invalid shared
2124 structure. This routine should only be called once. */
2127 unshare_all_rtl (tree fndecl
, rtx insn
)
2131 /* Make sure that virtual parameters are not shared. */
2132 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2133 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2135 /* Make sure that virtual stack slots are not shared. */
2136 unshare_all_decls (DECL_INITIAL (fndecl
));
2138 /* Unshare just about everything else. */
2139 unshare_all_rtl_in_chain (insn
);
2141 /* Make sure the addresses of stack slots found outside the insn chain
2142 (such as, in DECL_RTL of a variable) are not shared
2143 with the insn chain.
2145 This special care is necessary when the stack slot MEM does not
2146 actually appear in the insn chain. If it does appear, its address
2147 is unshared from all else at that point. */
2148 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2151 /* Go through all the RTL insn bodies and copy any invalid shared
2152 structure, again. This is a fairly expensive thing to do so it
2153 should be done sparingly. */
2156 unshare_all_rtl_again (rtx insn
)
2161 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2164 reset_used_flags (PATTERN (p
));
2165 reset_used_flags (REG_NOTES (p
));
2166 reset_used_flags (LOG_LINKS (p
));
2169 /* Make sure that virtual stack slots are not shared. */
2170 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2172 /* Make sure that virtual parameters are not shared. */
2173 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2174 reset_used_flags (DECL_RTL (decl
));
2176 reset_used_flags (stack_slot_list
);
2178 unshare_all_rtl (cfun
->decl
, insn
);
2181 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2182 Recursively does the same for subexpressions. */
2185 verify_rtx_sharing (rtx orig
, rtx insn
)
2190 const char *format_ptr
;
2195 code
= GET_CODE (x
);
2197 /* These types may be freely shared. */
2213 /* SCRATCH must be shared because they represent distinct values. */
2215 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2220 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2221 a LABEL_REF, it isn't sharable. */
2222 if (GET_CODE (XEXP (x
, 0)) == PLUS
2223 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2224 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2229 /* A MEM is allowed to be shared if its address is constant. */
2230 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2231 || reload_completed
|| reload_in_progress
)
2240 /* This rtx may not be shared. If it has already been seen,
2241 replace it with a copy of itself. */
2243 if (RTX_FLAG (x
, used
))
2245 error ("Invalid rtl sharing found in the insn");
2247 error ("Shared rtx");
2251 RTX_FLAG (x
, used
) = 1;
2253 /* Now scan the subexpressions recursively. */
2255 format_ptr
= GET_RTX_FORMAT (code
);
2257 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2259 switch (*format_ptr
++)
2262 verify_rtx_sharing (XEXP (x
, i
), insn
);
2266 if (XVEC (x
, i
) != NULL
)
2269 int len
= XVECLEN (x
, i
);
2271 for (j
= 0; j
< len
; j
++)
2273 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2274 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2275 && GET_CODE (SET_SRC (XVECEXP (x
, i
, j
))) == ASM_OPERANDS
)
2276 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2278 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2287 /* Go through all the RTL insn bodies and check that there is no unexpected
2288 sharing in between the subexpressions. */
2291 verify_rtl_sharing (void)
2295 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2298 reset_used_flags (PATTERN (p
));
2299 reset_used_flags (REG_NOTES (p
));
2300 reset_used_flags (LOG_LINKS (p
));
2303 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2306 verify_rtx_sharing (PATTERN (p
), p
);
2307 verify_rtx_sharing (REG_NOTES (p
), p
);
2308 verify_rtx_sharing (LOG_LINKS (p
), p
);
2312 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2313 Assumes the mark bits are cleared at entry. */
2316 unshare_all_rtl_in_chain (rtx insn
)
2318 for (; insn
; insn
= NEXT_INSN (insn
))
2321 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2322 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2323 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2327 /* Go through all virtual stack slots of a function and copy any
2328 shared structure. */
2330 unshare_all_decls (tree blk
)
2334 /* Copy shared decls. */
2335 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2336 if (DECL_RTL_SET_P (t
))
2337 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2339 /* Now process sub-blocks. */
2340 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2341 unshare_all_decls (t
);
2344 /* Go through all virtual stack slots of a function and mark them as
2347 reset_used_decls (tree blk
)
2352 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2353 if (DECL_RTL_SET_P (t
))
2354 reset_used_flags (DECL_RTL (t
));
2356 /* Now process sub-blocks. */
2357 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2358 reset_used_decls (t
);
2361 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2362 placed in the result directly, rather than being copied. MAY_SHARE is
2363 either a MEM of an EXPR_LIST of MEMs. */
2366 copy_most_rtx (rtx orig
, rtx may_share
)
2371 const char *format_ptr
;
2373 if (orig
== may_share
2374 || (GET_CODE (may_share
) == EXPR_LIST
2375 && in_expr_list_p (may_share
, orig
)))
2378 code
= GET_CODE (orig
);
2396 copy
= rtx_alloc (code
);
2397 PUT_MODE (copy
, GET_MODE (orig
));
2398 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2399 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2400 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2401 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2402 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2404 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2406 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2408 switch (*format_ptr
++)
2411 XEXP (copy
, i
) = XEXP (orig
, i
);
2412 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2413 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2417 XEXP (copy
, i
) = XEXP (orig
, i
);
2422 XVEC (copy
, i
) = XVEC (orig
, i
);
2423 if (XVEC (orig
, i
) != NULL
)
2425 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2426 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2427 XVECEXP (copy
, i
, j
)
2428 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2433 XWINT (copy
, i
) = XWINT (orig
, i
);
2438 XINT (copy
, i
) = XINT (orig
, i
);
2442 XTREE (copy
, i
) = XTREE (orig
, i
);
2447 XSTR (copy
, i
) = XSTR (orig
, i
);
2451 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2461 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2462 Recursively does the same for subexpressions. Uses
2463 copy_rtx_if_shared_1 to reduce stack space. */
2466 copy_rtx_if_shared (rtx orig
)
2468 copy_rtx_if_shared_1 (&orig
);
2472 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2473 use. Recursively does the same for subexpressions. */
2476 copy_rtx_if_shared_1 (rtx
*orig1
)
2482 const char *format_ptr
;
2486 /* Repeat is used to turn tail-recursion into iteration. */
2493 code
= GET_CODE (x
);
2495 /* These types may be freely shared. */
2510 /* SCRATCH must be shared because they represent distinct values. */
2513 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2518 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2519 a LABEL_REF, it isn't sharable. */
2520 if (GET_CODE (XEXP (x
, 0)) == PLUS
2521 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2522 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2531 /* The chain of insns is not being copied. */
2538 /* This rtx may not be shared. If it has already been seen,
2539 replace it with a copy of itself. */
2541 if (RTX_FLAG (x
, used
))
2545 copy
= rtx_alloc (code
);
2546 memcpy (copy
, x
, RTX_SIZE (code
));
2550 RTX_FLAG (x
, used
) = 1;
2552 /* Now scan the subexpressions recursively.
2553 We can store any replaced subexpressions directly into X
2554 since we know X is not shared! Any vectors in X
2555 must be copied if X was copied. */
2557 format_ptr
= GET_RTX_FORMAT (code
);
2558 length
= GET_RTX_LENGTH (code
);
2561 for (i
= 0; i
< length
; i
++)
2563 switch (*format_ptr
++)
2567 copy_rtx_if_shared_1 (last_ptr
);
2568 last_ptr
= &XEXP (x
, i
);
2572 if (XVEC (x
, i
) != NULL
)
2575 int len
= XVECLEN (x
, i
);
2577 /* Copy the vector iff I copied the rtx and the length
2579 if (copied
&& len
> 0)
2580 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2582 /* Call recursively on all inside the vector. */
2583 for (j
= 0; j
< len
; j
++)
2586 copy_rtx_if_shared_1 (last_ptr
);
2587 last_ptr
= &XVECEXP (x
, i
, j
);
2602 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2603 to look for shared sub-parts. */
2606 reset_used_flags (rtx x
)
2610 const char *format_ptr
;
2613 /* Repeat is used to turn tail-recursion into iteration. */
2618 code
= GET_CODE (x
);
2620 /* These types may be freely shared so we needn't do any resetting
2642 /* The chain of insns is not being copied. */
2649 RTX_FLAG (x
, used
) = 0;
2651 format_ptr
= GET_RTX_FORMAT (code
);
2652 length
= GET_RTX_LENGTH (code
);
2654 for (i
= 0; i
< length
; i
++)
2656 switch (*format_ptr
++)
2664 reset_used_flags (XEXP (x
, i
));
2668 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2669 reset_used_flags (XVECEXP (x
, i
, j
));
2675 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2676 to look for shared sub-parts. */
2679 set_used_flags (rtx x
)
2683 const char *format_ptr
;
2688 code
= GET_CODE (x
);
2690 /* These types may be freely shared so we needn't do any resetting
2712 /* The chain of insns is not being copied. */
2719 RTX_FLAG (x
, used
) = 1;
2721 format_ptr
= GET_RTX_FORMAT (code
);
2722 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2724 switch (*format_ptr
++)
2727 set_used_flags (XEXP (x
, i
));
2731 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2732 set_used_flags (XVECEXP (x
, i
, j
));
2738 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2739 Return X or the rtx for the pseudo reg the value of X was copied into.
2740 OTHER must be valid as a SET_DEST. */
2743 make_safe_from (rtx x
, rtx other
)
2746 switch (GET_CODE (other
))
2749 other
= SUBREG_REG (other
);
2751 case STRICT_LOW_PART
:
2754 other
= XEXP (other
, 0);
2760 if ((GET_CODE (other
) == MEM
2762 && GET_CODE (x
) != REG
2763 && GET_CODE (x
) != SUBREG
)
2764 || (GET_CODE (other
) == REG
2765 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2766 || reg_mentioned_p (other
, x
))))
2768 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2769 emit_move_insn (temp
, x
);
2775 /* Emission of insns (adding them to the doubly-linked list). */
2777 /* Return the first insn of the current sequence or current function. */
2785 /* Specify a new insn as the first in the chain. */
2788 set_first_insn (rtx insn
)
2790 if (PREV_INSN (insn
) != 0)
2795 /* Return the last insn emitted in current sequence or current function. */
2798 get_last_insn (void)
2803 /* Specify a new insn as the last in the chain. */
2806 set_last_insn (rtx insn
)
2808 if (NEXT_INSN (insn
) != 0)
2813 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2816 get_last_insn_anywhere (void)
2818 struct sequence_stack
*stack
;
2821 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2822 if (stack
->last
!= 0)
2827 /* Return the first nonnote insn emitted in current sequence or current
2828 function. This routine looks inside SEQUENCEs. */
2831 get_first_nonnote_insn (void)
2833 rtx insn
= first_insn
;
2837 insn
= next_insn (insn
);
2838 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2845 /* Return the last nonnote insn emitted in current sequence or current
2846 function. This routine looks inside SEQUENCEs. */
2849 get_last_nonnote_insn (void)
2851 rtx insn
= last_insn
;
2855 insn
= previous_insn (insn
);
2856 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2863 /* Return a number larger than any instruction's uid in this function. */
2868 return cur_insn_uid
;
2871 /* Renumber instructions so that no instruction UIDs are wasted. */
2874 renumber_insns (FILE *stream
)
2878 /* If we're not supposed to renumber instructions, don't. */
2879 if (!flag_renumber_insns
)
2882 /* If there aren't that many instructions, then it's not really
2883 worth renumbering them. */
2884 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2889 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2892 fprintf (stream
, "Renumbering insn %d to %d\n",
2893 INSN_UID (insn
), cur_insn_uid
);
2894 INSN_UID (insn
) = cur_insn_uid
++;
2898 /* Return the next insn. If it is a SEQUENCE, return the first insn
2902 next_insn (rtx insn
)
2906 insn
= NEXT_INSN (insn
);
2907 if (insn
&& GET_CODE (insn
) == INSN
2908 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2909 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2915 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2919 previous_insn (rtx insn
)
2923 insn
= PREV_INSN (insn
);
2924 if (insn
&& GET_CODE (insn
) == INSN
2925 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2926 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2932 /* Return the next insn after INSN that is not a NOTE. This routine does not
2933 look inside SEQUENCEs. */
2936 next_nonnote_insn (rtx insn
)
2940 insn
= NEXT_INSN (insn
);
2941 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2948 /* Return the previous insn before INSN that is not a NOTE. This routine does
2949 not look inside SEQUENCEs. */
2952 prev_nonnote_insn (rtx insn
)
2956 insn
= PREV_INSN (insn
);
2957 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2964 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2965 or 0, if there is none. This routine does not look inside
2969 next_real_insn (rtx insn
)
2973 insn
= NEXT_INSN (insn
);
2974 if (insn
== 0 || GET_CODE (insn
) == INSN
2975 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2982 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2983 or 0, if there is none. This routine does not look inside
2987 prev_real_insn (rtx insn
)
2991 insn
= PREV_INSN (insn
);
2992 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2993 || GET_CODE (insn
) == JUMP_INSN
)
3000 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3001 This routine does not look inside SEQUENCEs. */
3004 last_call_insn (void)
3008 for (insn
= get_last_insn ();
3009 insn
&& GET_CODE (insn
) != CALL_INSN
;
3010 insn
= PREV_INSN (insn
))
3016 /* Find the next insn after INSN that really does something. This routine
3017 does not look inside SEQUENCEs. Until reload has completed, this is the
3018 same as next_real_insn. */
3021 active_insn_p (rtx insn
)
3023 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3024 || (GET_CODE (insn
) == INSN
3025 && (! reload_completed
3026 || (GET_CODE (PATTERN (insn
)) != USE
3027 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3031 next_active_insn (rtx insn
)
3035 insn
= NEXT_INSN (insn
);
3036 if (insn
== 0 || active_insn_p (insn
))
3043 /* Find the last insn before INSN that really does something. This routine
3044 does not look inside SEQUENCEs. Until reload has completed, this is the
3045 same as prev_real_insn. */
3048 prev_active_insn (rtx insn
)
3052 insn
= PREV_INSN (insn
);
3053 if (insn
== 0 || active_insn_p (insn
))
3060 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3063 next_label (rtx insn
)
3067 insn
= NEXT_INSN (insn
);
3068 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3075 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3078 prev_label (rtx insn
)
3082 insn
= PREV_INSN (insn
);
3083 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3091 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3092 and REG_CC_USER notes so we can find it. */
3095 link_cc0_insns (rtx insn
)
3097 rtx user
= next_nonnote_insn (insn
);
3099 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3100 user
= XVECEXP (PATTERN (user
), 0, 0);
3102 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3104 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3107 /* Return the next insn that uses CC0 after INSN, which is assumed to
3108 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3109 applied to the result of this function should yield INSN).
3111 Normally, this is simply the next insn. However, if a REG_CC_USER note
3112 is present, it contains the insn that uses CC0.
3114 Return 0 if we can't find the insn. */
3117 next_cc0_user (rtx insn
)
3119 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3122 return XEXP (note
, 0);
3124 insn
= next_nonnote_insn (insn
);
3125 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3126 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3128 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3134 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3135 note, it is the previous insn. */
3138 prev_cc0_setter (rtx insn
)
3140 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3143 return XEXP (note
, 0);
3145 insn
= prev_nonnote_insn (insn
);
3146 if (! sets_cc0_p (PATTERN (insn
)))
3153 /* Increment the label uses for all labels present in rtx. */
3156 mark_label_nuses (rtx x
)
3162 code
= GET_CODE (x
);
3163 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3164 LABEL_NUSES (XEXP (x
, 0))++;
3166 fmt
= GET_RTX_FORMAT (code
);
3167 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3170 mark_label_nuses (XEXP (x
, i
));
3171 else if (fmt
[i
] == 'E')
3172 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3173 mark_label_nuses (XVECEXP (x
, i
, j
));
3178 /* Try splitting insns that can be split for better scheduling.
3179 PAT is the pattern which might split.
3180 TRIAL is the insn providing PAT.
3181 LAST is nonzero if we should return the last insn of the sequence produced.
3183 If this routine succeeds in splitting, it returns the first or last
3184 replacement insn depending on the value of LAST. Otherwise, it
3185 returns TRIAL. If the insn to be returned can be split, it will be. */
3188 try_split (rtx pat
, rtx trial
, int last
)
3190 rtx before
= PREV_INSN (trial
);
3191 rtx after
= NEXT_INSN (trial
);
3192 int has_barrier
= 0;
3196 rtx insn_last
, insn
;
3199 if (any_condjump_p (trial
)
3200 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3201 split_branch_probability
= INTVAL (XEXP (note
, 0));
3202 probability
= split_branch_probability
;
3204 seq
= split_insns (pat
, trial
);
3206 split_branch_probability
= -1;
3208 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3209 We may need to handle this specially. */
3210 if (after
&& GET_CODE (after
) == BARRIER
)
3213 after
= NEXT_INSN (after
);
3219 /* Avoid infinite loop if any insn of the result matches
3220 the original pattern. */
3224 if (INSN_P (insn_last
)
3225 && rtx_equal_p (PATTERN (insn_last
), pat
))
3227 if (!NEXT_INSN (insn_last
))
3229 insn_last
= NEXT_INSN (insn_last
);
3233 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3235 if (GET_CODE (insn
) == JUMP_INSN
)
3237 mark_jump_label (PATTERN (insn
), insn
, 0);
3239 if (probability
!= -1
3240 && any_condjump_p (insn
)
3241 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3243 /* We can preserve the REG_BR_PROB notes only if exactly
3244 one jump is created, otherwise the machine description
3245 is responsible for this step using
3246 split_branch_probability variable. */
3250 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3251 GEN_INT (probability
),
3257 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3258 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3259 if (GET_CODE (trial
) == CALL_INSN
)
3261 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3262 if (GET_CODE (insn
) == CALL_INSN
)
3264 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3267 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3268 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3272 /* Copy notes, particularly those related to the CFG. */
3273 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3275 switch (REG_NOTE_KIND (note
))
3279 while (insn
!= NULL_RTX
)
3281 if (GET_CODE (insn
) == CALL_INSN
3282 || (flag_non_call_exceptions
3283 && may_trap_p (PATTERN (insn
))))
3285 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3288 insn
= PREV_INSN (insn
);
3294 case REG_ALWAYS_RETURN
:
3296 while (insn
!= NULL_RTX
)
3298 if (GET_CODE (insn
) == CALL_INSN
)
3300 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3303 insn
= PREV_INSN (insn
);
3307 case REG_NON_LOCAL_GOTO
:
3309 while (insn
!= NULL_RTX
)
3311 if (GET_CODE (insn
) == JUMP_INSN
)
3313 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3316 insn
= PREV_INSN (insn
);
3325 /* If there are LABELS inside the split insns increment the
3326 usage count so we don't delete the label. */
3327 if (GET_CODE (trial
) == INSN
)
3330 while (insn
!= NULL_RTX
)
3332 if (GET_CODE (insn
) == INSN
)
3333 mark_label_nuses (PATTERN (insn
));
3335 insn
= PREV_INSN (insn
);
3339 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3341 delete_insn (trial
);
3343 emit_barrier_after (tem
);
3345 /* Recursively call try_split for each new insn created; by the
3346 time control returns here that insn will be fully split, so
3347 set LAST and continue from the insn after the one returned.
3348 We can't use next_active_insn here since AFTER may be a note.
3349 Ignore deleted insns, which can be occur if not optimizing. */
3350 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3351 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3352 tem
= try_split (PATTERN (tem
), tem
, 1);
3354 /* Return either the first or the last insn, depending on which was
3357 ? (after
? PREV_INSN (after
) : last_insn
)
3358 : NEXT_INSN (before
);
3361 /* Make and return an INSN rtx, initializing all its slots.
3362 Store PATTERN in the pattern slots. */
3365 make_insn_raw (rtx pattern
)
3369 insn
= rtx_alloc (INSN
);
3371 INSN_UID (insn
) = cur_insn_uid
++;
3372 PATTERN (insn
) = pattern
;
3373 INSN_CODE (insn
) = -1;
3374 LOG_LINKS (insn
) = NULL
;
3375 REG_NOTES (insn
) = NULL
;
3376 INSN_LOCATOR (insn
) = 0;
3377 BLOCK_FOR_INSN (insn
) = NULL
;
3379 #ifdef ENABLE_RTL_CHECKING
3382 && (returnjump_p (insn
)
3383 || (GET_CODE (insn
) == SET
3384 && SET_DEST (insn
) == pc_rtx
)))
3386 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3394 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3397 make_jump_insn_raw (rtx pattern
)
3401 insn
= rtx_alloc (JUMP_INSN
);
3402 INSN_UID (insn
) = cur_insn_uid
++;
3404 PATTERN (insn
) = pattern
;
3405 INSN_CODE (insn
) = -1;
3406 LOG_LINKS (insn
) = NULL
;
3407 REG_NOTES (insn
) = NULL
;
3408 JUMP_LABEL (insn
) = NULL
;
3409 INSN_LOCATOR (insn
) = 0;
3410 BLOCK_FOR_INSN (insn
) = NULL
;
3415 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3418 make_call_insn_raw (rtx pattern
)
3422 insn
= rtx_alloc (CALL_INSN
);
3423 INSN_UID (insn
) = cur_insn_uid
++;
3425 PATTERN (insn
) = pattern
;
3426 INSN_CODE (insn
) = -1;
3427 LOG_LINKS (insn
) = NULL
;
3428 REG_NOTES (insn
) = NULL
;
3429 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3430 INSN_LOCATOR (insn
) = 0;
3431 BLOCK_FOR_INSN (insn
) = NULL
;
3436 /* Add INSN to the end of the doubly-linked list.
3437 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3442 PREV_INSN (insn
) = last_insn
;
3443 NEXT_INSN (insn
) = 0;
3445 if (NULL
!= last_insn
)
3446 NEXT_INSN (last_insn
) = insn
;
3448 if (NULL
== first_insn
)
3454 /* Add INSN into the doubly-linked list after insn AFTER. This and
3455 the next should be the only functions called to insert an insn once
3456 delay slots have been filled since only they know how to update a
3460 add_insn_after (rtx insn
, rtx after
)
3462 rtx next
= NEXT_INSN (after
);
3465 if (optimize
&& INSN_DELETED_P (after
))
3468 NEXT_INSN (insn
) = next
;
3469 PREV_INSN (insn
) = after
;
3473 PREV_INSN (next
) = insn
;
3474 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3475 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3477 else if (last_insn
== after
)
3481 struct sequence_stack
*stack
= seq_stack
;
3482 /* Scan all pending sequences too. */
3483 for (; stack
; stack
= stack
->next
)
3484 if (after
== stack
->last
)
3494 if (GET_CODE (after
) != BARRIER
3495 && GET_CODE (insn
) != BARRIER
3496 && (bb
= BLOCK_FOR_INSN (after
)))
3498 set_block_for_insn (insn
, bb
);
3500 bb
->flags
|= BB_DIRTY
;
3501 /* Should not happen as first in the BB is always
3502 either NOTE or LABEL. */
3503 if (BB_END (bb
) == after
3504 /* Avoid clobbering of structure when creating new BB. */
3505 && GET_CODE (insn
) != BARRIER
3506 && (GET_CODE (insn
) != NOTE
3507 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3511 NEXT_INSN (after
) = insn
;
3512 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3514 rtx sequence
= PATTERN (after
);
3515 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3519 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3520 the previous should be the only functions called to insert an insn once
3521 delay slots have been filled since only they know how to update a
3525 add_insn_before (rtx insn
, rtx before
)
3527 rtx prev
= PREV_INSN (before
);
3530 if (optimize
&& INSN_DELETED_P (before
))
3533 PREV_INSN (insn
) = prev
;
3534 NEXT_INSN (insn
) = before
;
3538 NEXT_INSN (prev
) = insn
;
3539 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3541 rtx sequence
= PATTERN (prev
);
3542 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3545 else if (first_insn
== before
)
3549 struct sequence_stack
*stack
= seq_stack
;
3550 /* Scan all pending sequences too. */
3551 for (; stack
; stack
= stack
->next
)
3552 if (before
== stack
->first
)
3554 stack
->first
= insn
;
3562 if (GET_CODE (before
) != BARRIER
3563 && GET_CODE (insn
) != BARRIER
3564 && (bb
= BLOCK_FOR_INSN (before
)))
3566 set_block_for_insn (insn
, bb
);
3568 bb
->flags
|= BB_DIRTY
;
3569 /* Should not happen as first in the BB is always
3570 either NOTE or LABEl. */
3571 if (BB_HEAD (bb
) == insn
3572 /* Avoid clobbering of structure when creating new BB. */
3573 && GET_CODE (insn
) != BARRIER
3574 && (GET_CODE (insn
) != NOTE
3575 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3579 PREV_INSN (before
) = insn
;
3580 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3581 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3584 /* Remove an insn from its doubly-linked list. This function knows how
3585 to handle sequences. */
3587 remove_insn (rtx insn
)
3589 rtx next
= NEXT_INSN (insn
);
3590 rtx prev
= PREV_INSN (insn
);
3595 NEXT_INSN (prev
) = next
;
3596 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3598 rtx sequence
= PATTERN (prev
);
3599 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3602 else if (first_insn
== insn
)
3606 struct sequence_stack
*stack
= seq_stack
;
3607 /* Scan all pending sequences too. */
3608 for (; stack
; stack
= stack
->next
)
3609 if (insn
== stack
->first
)
3611 stack
->first
= next
;
3621 PREV_INSN (next
) = prev
;
3622 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3623 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3625 else if (last_insn
== insn
)
3629 struct sequence_stack
*stack
= seq_stack
;
3630 /* Scan all pending sequences too. */
3631 for (; stack
; stack
= stack
->next
)
3632 if (insn
== stack
->last
)
3641 if (GET_CODE (insn
) != BARRIER
3642 && (bb
= BLOCK_FOR_INSN (insn
)))
3645 bb
->flags
|= BB_DIRTY
;
3646 if (BB_HEAD (bb
) == insn
)
3648 /* Never ever delete the basic block note without deleting whole
3650 if (GET_CODE (insn
) == NOTE
)
3652 BB_HEAD (bb
) = next
;
3654 if (BB_END (bb
) == insn
)
3659 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3662 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3664 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3667 /* Put the register usage information on the CALL. If there is already
3668 some usage information, put ours at the end. */
3669 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3673 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3674 link
= XEXP (link
, 1))
3677 XEXP (link
, 1) = call_fusage
;
3680 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3683 /* Delete all insns made since FROM.
3684 FROM becomes the new last instruction. */
3687 delete_insns_since (rtx from
)
3692 NEXT_INSN (from
) = 0;
3696 /* This function is deprecated, please use sequences instead.
3698 Move a consecutive bunch of insns to a different place in the chain.
3699 The insns to be moved are those between FROM and TO.
3700 They are moved to a new position after the insn AFTER.
3701 AFTER must not be FROM or TO or any insn in between.
3703 This function does not know about SEQUENCEs and hence should not be
3704 called after delay-slot filling has been done. */
3707 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3709 /* Splice this bunch out of where it is now. */
3710 if (PREV_INSN (from
))
3711 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3713 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3714 if (last_insn
== to
)
3715 last_insn
= PREV_INSN (from
);
3716 if (first_insn
== from
)
3717 first_insn
= NEXT_INSN (to
);
3719 /* Make the new neighbors point to it and it to them. */
3720 if (NEXT_INSN (after
))
3721 PREV_INSN (NEXT_INSN (after
)) = to
;
3723 NEXT_INSN (to
) = NEXT_INSN (after
);
3724 PREV_INSN (from
) = after
;
3725 NEXT_INSN (after
) = from
;
3726 if (after
== last_insn
)
3730 /* Same as function above, but take care to update BB boundaries. */
3732 reorder_insns (rtx from
, rtx to
, rtx after
)
3734 rtx prev
= PREV_INSN (from
);
3735 basic_block bb
, bb2
;
3737 reorder_insns_nobb (from
, to
, after
);
3739 if (GET_CODE (after
) != BARRIER
3740 && (bb
= BLOCK_FOR_INSN (after
)))
3743 bb
->flags
|= BB_DIRTY
;
3745 if (GET_CODE (from
) != BARRIER
3746 && (bb2
= BLOCK_FOR_INSN (from
)))
3748 if (BB_END (bb2
) == to
)
3749 BB_END (bb2
) = prev
;
3750 bb2
->flags
|= BB_DIRTY
;
3753 if (BB_END (bb
) == after
)
3756 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3757 set_block_for_insn (x
, bb
);
3761 /* Return the line note insn preceding INSN. */
3764 find_line_note (rtx insn
)
3766 if (no_line_numbers
)
3769 for (; insn
; insn
= PREV_INSN (insn
))
3770 if (GET_CODE (insn
) == NOTE
3771 && NOTE_LINE_NUMBER (insn
) >= 0)
3777 /* Remove unnecessary notes from the instruction stream. */
3780 remove_unnecessary_notes (void)
3782 rtx block_stack
= NULL_RTX
;
3783 rtx eh_stack
= NULL_RTX
;
3788 /* We must not remove the first instruction in the function because
3789 the compiler depends on the first instruction being a note. */
3790 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3792 /* Remember what's next. */
3793 next
= NEXT_INSN (insn
);
3795 /* We're only interested in notes. */
3796 if (GET_CODE (insn
) != NOTE
)
3799 switch (NOTE_LINE_NUMBER (insn
))
3801 case NOTE_INSN_DELETED
:
3802 case NOTE_INSN_LOOP_END_TOP_COND
:
3806 case NOTE_INSN_EH_REGION_BEG
:
3807 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3810 case NOTE_INSN_EH_REGION_END
:
3811 /* Too many end notes. */
3812 if (eh_stack
== NULL_RTX
)
3814 /* Mismatched nesting. */
3815 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3818 eh_stack
= XEXP (eh_stack
, 1);
3819 free_INSN_LIST_node (tmp
);
3822 case NOTE_INSN_BLOCK_BEG
:
3823 /* By now, all notes indicating lexical blocks should have
3824 NOTE_BLOCK filled in. */
3825 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3827 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3830 case NOTE_INSN_BLOCK_END
:
3831 /* Too many end notes. */
3832 if (block_stack
== NULL_RTX
)
3834 /* Mismatched nesting. */
3835 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3838 block_stack
= XEXP (block_stack
, 1);
3839 free_INSN_LIST_node (tmp
);
3841 /* Scan back to see if there are any non-note instructions
3842 between INSN and the beginning of this block. If not,
3843 then there is no PC range in the generated code that will
3844 actually be in this block, so there's no point in
3845 remembering the existence of the block. */
3846 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3848 /* This block contains a real instruction. Note that we
3849 don't include labels; if the only thing in the block
3850 is a label, then there are still no PC values that
3851 lie within the block. */
3855 /* We're only interested in NOTEs. */
3856 if (GET_CODE (tmp
) != NOTE
)
3859 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3861 /* We just verified that this BLOCK matches us with
3862 the block_stack check above. Never delete the
3863 BLOCK for the outermost scope of the function; we
3864 can refer to names from that scope even if the
3865 block notes are messed up. */
3866 if (! is_body_block (NOTE_BLOCK (insn
))
3867 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3874 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3875 /* There's a nested block. We need to leave the
3876 current block in place since otherwise the debugger
3877 wouldn't be able to show symbols from our block in
3878 the nested block. */
3884 /* Too many begin notes. */
3885 if (block_stack
|| eh_stack
)
3890 /* Emit insn(s) of given code and pattern
3891 at a specified place within the doubly-linked list.
3893 All of the emit_foo global entry points accept an object
3894 X which is either an insn list or a PATTERN of a single
3897 There are thus a few canonical ways to generate code and
3898 emit it at a specific place in the instruction stream. For
3899 example, consider the instruction named SPOT and the fact that
3900 we would like to emit some instructions before SPOT. We might
3904 ... emit the new instructions ...
3905 insns_head = get_insns ();
3908 emit_insn_before (insns_head, SPOT);
3910 It used to be common to generate SEQUENCE rtl instead, but that
3911 is a relic of the past which no longer occurs. The reason is that
3912 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3913 generated would almost certainly die right after it was created. */
3915 /* Make X be output before the instruction BEFORE. */
3918 emit_insn_before (rtx x
, rtx before
)
3923 #ifdef ENABLE_RTL_CHECKING
3924 if (before
== NULL_RTX
)
3931 switch (GET_CODE (x
))
3942 rtx next
= NEXT_INSN (insn
);
3943 add_insn_before (insn
, before
);
3949 #ifdef ENABLE_RTL_CHECKING
3956 last
= make_insn_raw (x
);
3957 add_insn_before (last
, before
);
3964 /* Make an instruction with body X and code JUMP_INSN
3965 and output it before the instruction BEFORE. */
3968 emit_jump_insn_before (rtx x
, rtx before
)
3970 rtx insn
, last
= NULL_RTX
;
3972 #ifdef ENABLE_RTL_CHECKING
3973 if (before
== NULL_RTX
)
3977 switch (GET_CODE (x
))
3988 rtx next
= NEXT_INSN (insn
);
3989 add_insn_before (insn
, before
);
3995 #ifdef ENABLE_RTL_CHECKING
4002 last
= make_jump_insn_raw (x
);
4003 add_insn_before (last
, before
);
4010 /* Make an instruction with body X and code CALL_INSN
4011 and output it before the instruction BEFORE. */
4014 emit_call_insn_before (rtx x
, rtx before
)
4016 rtx last
= NULL_RTX
, insn
;
4018 #ifdef ENABLE_RTL_CHECKING
4019 if (before
== NULL_RTX
)
4023 switch (GET_CODE (x
))
4034 rtx next
= NEXT_INSN (insn
);
4035 add_insn_before (insn
, before
);
4041 #ifdef ENABLE_RTL_CHECKING
4048 last
= make_call_insn_raw (x
);
4049 add_insn_before (last
, before
);
4056 /* Make an insn of code BARRIER
4057 and output it before the insn BEFORE. */
4060 emit_barrier_before (rtx before
)
4062 rtx insn
= rtx_alloc (BARRIER
);
4064 INSN_UID (insn
) = cur_insn_uid
++;
4066 add_insn_before (insn
, before
);
4070 /* Emit the label LABEL before the insn BEFORE. */
4073 emit_label_before (rtx label
, rtx before
)
4075 /* This can be called twice for the same label as a result of the
4076 confusion that follows a syntax error! So make it harmless. */
4077 if (INSN_UID (label
) == 0)
4079 INSN_UID (label
) = cur_insn_uid
++;
4080 add_insn_before (label
, before
);
4086 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4089 emit_note_before (int subtype
, rtx before
)
4091 rtx note
= rtx_alloc (NOTE
);
4092 INSN_UID (note
) = cur_insn_uid
++;
4093 NOTE_SOURCE_FILE (note
) = 0;
4094 NOTE_LINE_NUMBER (note
) = subtype
;
4095 BLOCK_FOR_INSN (note
) = NULL
;
4097 add_insn_before (note
, before
);
4101 /* Helper for emit_insn_after, handles lists of instructions
4104 static rtx
emit_insn_after_1 (rtx
, rtx
);
4107 emit_insn_after_1 (rtx first
, rtx after
)
4113 if (GET_CODE (after
) != BARRIER
4114 && (bb
= BLOCK_FOR_INSN (after
)))
4116 bb
->flags
|= BB_DIRTY
;
4117 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4118 if (GET_CODE (last
) != BARRIER
)
4119 set_block_for_insn (last
, bb
);
4120 if (GET_CODE (last
) != BARRIER
)
4121 set_block_for_insn (last
, bb
);
4122 if (BB_END (bb
) == after
)
4126 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4129 after_after
= NEXT_INSN (after
);
4131 NEXT_INSN (after
) = first
;
4132 PREV_INSN (first
) = after
;
4133 NEXT_INSN (last
) = after_after
;
4135 PREV_INSN (after_after
) = last
;
4137 if (after
== last_insn
)
4142 /* Make X be output after the insn AFTER. */
4145 emit_insn_after (rtx x
, rtx after
)
4149 #ifdef ENABLE_RTL_CHECKING
4150 if (after
== NULL_RTX
)
4157 switch (GET_CODE (x
))
4165 last
= emit_insn_after_1 (x
, after
);
4168 #ifdef ENABLE_RTL_CHECKING
4175 last
= make_insn_raw (x
);
4176 add_insn_after (last
, after
);
4183 /* Similar to emit_insn_after, except that line notes are to be inserted so
4184 as to act as if this insn were at FROM. */
4187 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4189 rtx from_line
= find_line_note (from
);
4190 rtx after_line
= find_line_note (after
);
4191 rtx insn
= emit_insn_after (x
, after
);
4194 emit_note_copy_after (from_line
, after
);
4197 emit_note_copy_after (after_line
, insn
);
4200 /* Make an insn of code JUMP_INSN with body X
4201 and output it after the insn AFTER. */
4204 emit_jump_insn_after (rtx x
, rtx after
)
4208 #ifdef ENABLE_RTL_CHECKING
4209 if (after
== NULL_RTX
)
4213 switch (GET_CODE (x
))
4221 last
= emit_insn_after_1 (x
, after
);
4224 #ifdef ENABLE_RTL_CHECKING
4231 last
= make_jump_insn_raw (x
);
4232 add_insn_after (last
, after
);
4239 /* Make an instruction with body X and code CALL_INSN
4240 and output it after the instruction AFTER. */
4243 emit_call_insn_after (rtx x
, rtx after
)
4247 #ifdef ENABLE_RTL_CHECKING
4248 if (after
== NULL_RTX
)
4252 switch (GET_CODE (x
))
4260 last
= emit_insn_after_1 (x
, after
);
4263 #ifdef ENABLE_RTL_CHECKING
4270 last
= make_call_insn_raw (x
);
4271 add_insn_after (last
, after
);
4278 /* Make an insn of code BARRIER
4279 and output it after the insn AFTER. */
4282 emit_barrier_after (rtx after
)
4284 rtx insn
= rtx_alloc (BARRIER
);
4286 INSN_UID (insn
) = cur_insn_uid
++;
4288 add_insn_after (insn
, after
);
4292 /* Emit the label LABEL after the insn AFTER. */
4295 emit_label_after (rtx label
, rtx after
)
4297 /* This can be called twice for the same label
4298 as a result of the confusion that follows a syntax error!
4299 So make it harmless. */
4300 if (INSN_UID (label
) == 0)
4302 INSN_UID (label
) = cur_insn_uid
++;
4303 add_insn_after (label
, after
);
4309 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4312 emit_note_after (int subtype
, rtx after
)
4314 rtx note
= rtx_alloc (NOTE
);
4315 INSN_UID (note
) = cur_insn_uid
++;
4316 NOTE_SOURCE_FILE (note
) = 0;
4317 NOTE_LINE_NUMBER (note
) = subtype
;
4318 BLOCK_FOR_INSN (note
) = NULL
;
4319 add_insn_after (note
, after
);
4323 /* Emit a copy of note ORIG after the insn AFTER. */
4326 emit_note_copy_after (rtx orig
, rtx after
)
4330 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4336 note
= rtx_alloc (NOTE
);
4337 INSN_UID (note
) = cur_insn_uid
++;
4338 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4339 NOTE_DATA (note
) = NOTE_DATA (orig
);
4340 BLOCK_FOR_INSN (note
) = NULL
;
4341 add_insn_after (note
, after
);
4345 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4347 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4349 rtx last
= emit_insn_after (pattern
, after
);
4351 if (pattern
== NULL_RTX
)
4354 after
= NEXT_INSN (after
);
4357 if (active_insn_p (after
))
4358 INSN_LOCATOR (after
) = loc
;
4361 after
= NEXT_INSN (after
);
4366 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4368 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4370 rtx last
= emit_jump_insn_after (pattern
, after
);
4372 if (pattern
== NULL_RTX
)
4375 after
= NEXT_INSN (after
);
4378 if (active_insn_p (after
))
4379 INSN_LOCATOR (after
) = loc
;
4382 after
= NEXT_INSN (after
);
4387 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4389 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4391 rtx last
= emit_call_insn_after (pattern
, after
);
4393 if (pattern
== NULL_RTX
)
4396 after
= NEXT_INSN (after
);
4399 if (active_insn_p (after
))
4400 INSN_LOCATOR (after
) = loc
;
4403 after
= NEXT_INSN (after
);
4408 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4410 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4412 rtx first
= PREV_INSN (before
);
4413 rtx last
= emit_insn_before (pattern
, before
);
4415 if (pattern
== NULL_RTX
)
4418 first
= NEXT_INSN (first
);
4421 if (active_insn_p (first
))
4422 INSN_LOCATOR (first
) = loc
;
4425 first
= NEXT_INSN (first
);
4430 /* Take X and emit it at the end of the doubly-linked
4433 Returns the last insn emitted. */
4438 rtx last
= last_insn
;
4444 switch (GET_CODE (x
))
4455 rtx next
= NEXT_INSN (insn
);
4462 #ifdef ENABLE_RTL_CHECKING
4469 last
= make_insn_raw (x
);
4477 /* Make an insn of code JUMP_INSN with pattern X
4478 and add it to the end of the doubly-linked list. */
4481 emit_jump_insn (rtx x
)
4483 rtx last
= NULL_RTX
, insn
;
4485 switch (GET_CODE (x
))
4496 rtx next
= NEXT_INSN (insn
);
4503 #ifdef ENABLE_RTL_CHECKING
4510 last
= make_jump_insn_raw (x
);
4518 /* Make an insn of code CALL_INSN with pattern X
4519 and add it to the end of the doubly-linked list. */
4522 emit_call_insn (rtx x
)
4526 switch (GET_CODE (x
))
4534 insn
= emit_insn (x
);
4537 #ifdef ENABLE_RTL_CHECKING
4544 insn
= make_call_insn_raw (x
);
4552 /* Add the label LABEL to the end of the doubly-linked list. */
4555 emit_label (rtx label
)
4557 /* This can be called twice for the same label
4558 as a result of the confusion that follows a syntax error!
4559 So make it harmless. */
4560 if (INSN_UID (label
) == 0)
4562 INSN_UID (label
) = cur_insn_uid
++;
4568 /* Make an insn of code BARRIER
4569 and add it to the end of the doubly-linked list. */
4574 rtx barrier
= rtx_alloc (BARRIER
);
4575 INSN_UID (barrier
) = cur_insn_uid
++;
4580 /* Make line numbering NOTE insn for LOCATION add it to the end
4581 of the doubly-linked list, but only if line-numbers are desired for
4582 debugging info and it doesn't match the previous one. */
4585 emit_line_note (location_t location
)
4589 set_file_and_line_for_stmt (location
);
4591 if (location
.file
&& last_location
.file
4592 && !strcmp (location
.file
, last_location
.file
)
4593 && location
.line
== last_location
.line
)
4595 last_location
= location
;
4597 if (no_line_numbers
)
4603 note
= emit_note (location
.line
);
4604 NOTE_SOURCE_FILE (note
) = location
.file
;
4609 /* Emit a copy of note ORIG. */
4612 emit_note_copy (rtx orig
)
4616 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4622 note
= rtx_alloc (NOTE
);
4624 INSN_UID (note
) = cur_insn_uid
++;
4625 NOTE_DATA (note
) = NOTE_DATA (orig
);
4626 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4627 BLOCK_FOR_INSN (note
) = NULL
;
4633 /* Make an insn of code NOTE or type NOTE_NO
4634 and add it to the end of the doubly-linked list. */
4637 emit_note (int note_no
)
4641 note
= rtx_alloc (NOTE
);
4642 INSN_UID (note
) = cur_insn_uid
++;
4643 NOTE_LINE_NUMBER (note
) = note_no
;
4644 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4645 BLOCK_FOR_INSN (note
) = NULL
;
4650 /* Cause next statement to emit a line note even if the line number
4654 force_next_line_note (void)
4656 last_location
.line
= -1;
4659 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4660 note of this type already exists, remove it first. */
4663 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4665 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4671 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4672 has multiple sets (some callers assume single_set
4673 means the insn only has one set, when in fact it
4674 means the insn only has one * useful * set). */
4675 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4682 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4683 It serves no useful purpose and breaks eliminate_regs. */
4684 if (GET_CODE (datum
) == ASM_OPERANDS
)
4694 XEXP (note
, 0) = datum
;
4698 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4699 return REG_NOTES (insn
);
4702 /* Return an indication of which type of insn should have X as a body.
4703 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4706 classify_insn (rtx x
)
4708 if (GET_CODE (x
) == CODE_LABEL
)
4710 if (GET_CODE (x
) == CALL
)
4712 if (GET_CODE (x
) == RETURN
)
4714 if (GET_CODE (x
) == SET
)
4716 if (SET_DEST (x
) == pc_rtx
)
4718 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4723 if (GET_CODE (x
) == PARALLEL
)
4726 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4727 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4729 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4730 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4732 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4733 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4739 /* Emit the rtl pattern X as an appropriate kind of insn.
4740 If X is a label, it is simply added into the insn chain. */
4745 enum rtx_code code
= classify_insn (x
);
4747 if (code
== CODE_LABEL
)
4748 return emit_label (x
);
4749 else if (code
== INSN
)
4750 return emit_insn (x
);
4751 else if (code
== JUMP_INSN
)
4753 rtx insn
= emit_jump_insn (x
);
4754 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4755 return emit_barrier ();
4758 else if (code
== CALL_INSN
)
4759 return emit_call_insn (x
);
4764 /* Space for free sequence stack entries. */
4765 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4767 /* Begin emitting insns to a sequence which can be packaged in an
4768 RTL_EXPR. If this sequence will contain something that might cause
4769 the compiler to pop arguments to function calls (because those
4770 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4771 details), use do_pending_stack_adjust before calling this function.
4772 That will ensure that the deferred pops are not accidentally
4773 emitted in the middle of this sequence. */
4776 start_sequence (void)
4778 struct sequence_stack
*tem
;
4780 if (free_sequence_stack
!= NULL
)
4782 tem
= free_sequence_stack
;
4783 free_sequence_stack
= tem
->next
;
4786 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4788 tem
->next
= seq_stack
;
4789 tem
->first
= first_insn
;
4790 tem
->last
= last_insn
;
4791 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4799 /* Similarly, but indicate that this sequence will be placed in T, an
4800 RTL_EXPR. See the documentation for start_sequence for more
4801 information about how to use this function. */
4804 start_sequence_for_rtl_expr (tree t
)
4811 /* Set up the insn chain starting with FIRST as the current sequence,
4812 saving the previously current one. See the documentation for
4813 start_sequence for more information about how to use this function. */
4816 push_to_sequence (rtx first
)
4822 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4828 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4831 push_to_full_sequence (rtx first
, rtx last
)
4836 /* We really should have the end of the insn chain here. */
4837 if (last
&& NEXT_INSN (last
))
4841 /* Set up the outer-level insn chain
4842 as the current sequence, saving the previously current one. */
4845 push_topmost_sequence (void)
4847 struct sequence_stack
*stack
, *top
= NULL
;
4851 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4854 first_insn
= top
->first
;
4855 last_insn
= top
->last
;
4856 seq_rtl_expr
= top
->sequence_rtl_expr
;
4859 /* After emitting to the outer-level insn chain, update the outer-level
4860 insn chain, and restore the previous saved state. */
4863 pop_topmost_sequence (void)
4865 struct sequence_stack
*stack
, *top
= NULL
;
4867 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4870 top
->first
= first_insn
;
4871 top
->last
= last_insn
;
4872 /* ??? Why don't we save seq_rtl_expr here? */
4877 /* After emitting to a sequence, restore previous saved state.
4879 To get the contents of the sequence just made, you must call
4880 `get_insns' *before* calling here.
4882 If the compiler might have deferred popping arguments while
4883 generating this sequence, and this sequence will not be immediately
4884 inserted into the instruction stream, use do_pending_stack_adjust
4885 before calling get_insns. That will ensure that the deferred
4886 pops are inserted into this sequence, and not into some random
4887 location in the instruction stream. See INHIBIT_DEFER_POP for more
4888 information about deferred popping of arguments. */
4893 struct sequence_stack
*tem
= seq_stack
;
4895 first_insn
= tem
->first
;
4896 last_insn
= tem
->last
;
4897 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4898 seq_stack
= tem
->next
;
4900 memset (tem
, 0, sizeof (*tem
));
4901 tem
->next
= free_sequence_stack
;
4902 free_sequence_stack
= tem
;
4905 /* Return 1 if currently emitting into a sequence. */
4908 in_sequence_p (void)
4910 return seq_stack
!= 0;
4913 /* Put the various virtual registers into REGNO_REG_RTX. */
4916 init_virtual_regs (struct emit_status
*es
)
4918 rtx
*ptr
= es
->x_regno_reg_rtx
;
4919 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4920 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4921 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4922 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4923 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4927 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4928 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4929 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4930 static int copy_insn_n_scratches
;
4932 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4933 copied an ASM_OPERANDS.
4934 In that case, it is the original input-operand vector. */
4935 static rtvec orig_asm_operands_vector
;
4937 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4938 copied an ASM_OPERANDS.
4939 In that case, it is the copied input-operand vector. */
4940 static rtvec copy_asm_operands_vector
;
4942 /* Likewise for the constraints vector. */
4943 static rtvec orig_asm_constraints_vector
;
4944 static rtvec copy_asm_constraints_vector
;
4946 /* Recursively create a new copy of an rtx for copy_insn.
4947 This function differs from copy_rtx in that it handles SCRATCHes and
4948 ASM_OPERANDs properly.
4949 Normally, this function is not used directly; use copy_insn as front end.
4950 However, you could first copy an insn pattern with copy_insn and then use
4951 this function afterwards to properly copy any REG_NOTEs containing
4955 copy_insn_1 (rtx orig
)
4960 const char *format_ptr
;
4962 code
= GET_CODE (orig
);
4978 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4983 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4984 if (copy_insn_scratch_in
[i
] == orig
)
4985 return copy_insn_scratch_out
[i
];
4989 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4990 a LABEL_REF, it isn't sharable. */
4991 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4992 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4993 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4997 /* A MEM with a constant address is not sharable. The problem is that
4998 the constant address may need to be reloaded. If the mem is shared,
4999 then reloading one copy of this mem will cause all copies to appear
5000 to have been reloaded. */
5006 copy
= rtx_alloc (code
);
5008 /* Copy the various flags, and other information. We assume that
5009 all fields need copying, and then clear the fields that should
5010 not be copied. That is the sensible default behavior, and forces
5011 us to explicitly document why we are *not* copying a flag. */
5012 memcpy (copy
, orig
, RTX_HDR_SIZE
);
5014 /* We do not copy the USED flag, which is used as a mark bit during
5015 walks over the RTL. */
5016 RTX_FLAG (copy
, used
) = 0;
5018 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5021 RTX_FLAG (copy
, jump
) = 0;
5022 RTX_FLAG (copy
, call
) = 0;
5023 RTX_FLAG (copy
, frame_related
) = 0;
5026 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5028 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5030 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5031 switch (*format_ptr
++)
5034 if (XEXP (orig
, i
) != NULL
)
5035 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5040 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5041 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5042 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5043 XVEC (copy
, i
) = copy_asm_operands_vector
;
5044 else if (XVEC (orig
, i
) != NULL
)
5046 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5047 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5048 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5059 /* These are left unchanged. */
5067 if (code
== SCRATCH
)
5069 i
= copy_insn_n_scratches
++;
5070 if (i
>= MAX_RECOG_OPERANDS
)
5072 copy_insn_scratch_in
[i
] = orig
;
5073 copy_insn_scratch_out
[i
] = copy
;
5075 else if (code
== ASM_OPERANDS
)
5077 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5078 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5079 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5080 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5086 /* Create a new copy of an rtx.
5087 This function differs from copy_rtx in that it handles SCRATCHes and
5088 ASM_OPERANDs properly.
5089 INSN doesn't really have to be a full INSN; it could be just the
5092 copy_insn (rtx insn
)
5094 copy_insn_n_scratches
= 0;
5095 orig_asm_operands_vector
= 0;
5096 orig_asm_constraints_vector
= 0;
5097 copy_asm_operands_vector
= 0;
5098 copy_asm_constraints_vector
= 0;
5099 return copy_insn_1 (insn
);
5102 /* Initialize data structures and variables in this file
5103 before generating rtl for each function. */
5108 struct function
*f
= cfun
;
5110 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5113 seq_rtl_expr
= NULL
;
5115 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5116 last_location
.line
= 0;
5117 last_location
.file
= 0;
5118 first_label_num
= label_num
;
5122 /* Init the tables that describe all the pseudo regs. */
5124 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5126 f
->emit
->regno_pointer_align
5127 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5128 * sizeof (unsigned char));
5131 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5133 /* Put copies of all the hard registers into regno_reg_rtx. */
5134 memcpy (regno_reg_rtx
,
5135 static_regno_reg_rtx
,
5136 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5138 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5139 init_virtual_regs (f
->emit
);
5141 /* Indicate that the virtual registers and stack locations are
5143 REG_POINTER (stack_pointer_rtx
) = 1;
5144 REG_POINTER (frame_pointer_rtx
) = 1;
5145 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5146 REG_POINTER (arg_pointer_rtx
) = 1;
5148 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5149 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5150 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5151 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5152 REG_POINTER (virtual_cfa_rtx
) = 1;
5154 #ifdef STACK_BOUNDARY
5155 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5156 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5157 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5158 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5160 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5161 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5162 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5163 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5164 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5167 #ifdef INIT_EXPANDERS
5172 /* Generate the constant 0. */
5175 gen_const_vector_0 (enum machine_mode mode
)
5180 enum machine_mode inner
;
5182 units
= GET_MODE_NUNITS (mode
);
5183 inner
= GET_MODE_INNER (mode
);
5185 v
= rtvec_alloc (units
);
5187 /* We need to call this function after we to set CONST0_RTX first. */
5188 if (!CONST0_RTX (inner
))
5191 for (i
= 0; i
< units
; ++i
)
5192 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5194 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5198 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5199 all elements are zero. */
5201 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5203 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5206 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5207 if (RTVEC_ELT (v
, i
) != inner_zero
)
5208 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5209 return CONST0_RTX (mode
);
5212 /* Create some permanent unique rtl objects shared between all functions.
5213 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5216 init_emit_once (int line_numbers
)
5219 enum machine_mode mode
;
5220 enum machine_mode double_mode
;
5222 /* We need reg_raw_mode, so initialize the modes now. */
5223 init_reg_modes_once ();
5225 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5227 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5228 const_int_htab_eq
, NULL
);
5230 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5231 const_double_htab_eq
, NULL
);
5233 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5234 mem_attrs_htab_eq
, NULL
);
5235 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5236 reg_attrs_htab_eq
, NULL
);
5238 no_line_numbers
= ! line_numbers
;
5240 /* Compute the word and byte modes. */
5242 byte_mode
= VOIDmode
;
5243 word_mode
= VOIDmode
;
5244 double_mode
= VOIDmode
;
5246 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5247 mode
= GET_MODE_WIDER_MODE (mode
))
5249 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5250 && byte_mode
== VOIDmode
)
5253 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5254 && word_mode
== VOIDmode
)
5258 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5259 mode
= GET_MODE_WIDER_MODE (mode
))
5261 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5262 && double_mode
== VOIDmode
)
5266 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5268 /* Assign register numbers to the globally defined register rtx.
5269 This must be done at runtime because the register number field
5270 is in a union and some compilers can't initialize unions. */
5272 pc_rtx
= gen_rtx_PC (VOIDmode
);
5273 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5274 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5275 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5276 if (hard_frame_pointer_rtx
== 0)
5277 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5278 HARD_FRAME_POINTER_REGNUM
);
5279 if (arg_pointer_rtx
== 0)
5280 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5281 virtual_incoming_args_rtx
=
5282 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5283 virtual_stack_vars_rtx
=
5284 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5285 virtual_stack_dynamic_rtx
=
5286 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5287 virtual_outgoing_args_rtx
=
5288 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5289 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5291 /* Initialize RTL for commonly used hard registers. These are
5292 copied into regno_reg_rtx as we begin to compile each function. */
5293 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5294 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5296 #ifdef INIT_EXPANDERS
5297 /* This is to initialize {init|mark|free}_machine_status before the first
5298 call to push_function_context_to. This is needed by the Chill front
5299 end which calls push_function_context_to before the first call to
5300 init_function_start. */
5304 /* Create the unique rtx's for certain rtx codes and operand values. */
5306 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5307 tries to use these variables. */
5308 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5309 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5310 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5312 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5313 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5314 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5316 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5318 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5319 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5320 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5321 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5322 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5323 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5324 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5326 dconsthalf
= dconst1
;
5329 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5331 /* Initialize mathematical constants for constant folding builtins.
5332 These constants need to be given to at least 160 bits precision. */
5333 real_from_string (&dconstpi
,
5334 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5335 real_from_string (&dconste
,
5336 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5338 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5340 REAL_VALUE_TYPE
*r
=
5341 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5343 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5344 mode
= GET_MODE_WIDER_MODE (mode
))
5345 const_tiny_rtx
[i
][(int) mode
] =
5346 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5348 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5350 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5351 mode
= GET_MODE_WIDER_MODE (mode
))
5352 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5354 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5356 mode
= GET_MODE_WIDER_MODE (mode
))
5357 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5360 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5362 mode
= GET_MODE_WIDER_MODE (mode
))
5363 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5365 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5367 mode
= GET_MODE_WIDER_MODE (mode
))
5368 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5370 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5371 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5372 const_tiny_rtx
[0][i
] = const0_rtx
;
5374 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5375 if (STORE_FLAG_VALUE
== 1)
5376 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5378 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5379 return_address_pointer_rtx
5380 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5383 #ifdef STATIC_CHAIN_REGNUM
5384 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5386 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5387 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5388 static_chain_incoming_rtx
5389 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5392 static_chain_incoming_rtx
= static_chain_rtx
;
5396 static_chain_rtx
= STATIC_CHAIN
;
5398 #ifdef STATIC_CHAIN_INCOMING
5399 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5401 static_chain_incoming_rtx
= static_chain_rtx
;
5405 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5406 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5409 /* Query and clear/ restore no_line_numbers. This is used by the
5410 switch / case handling in stmt.c to give proper line numbers in
5411 warnings about unreachable code. */
5414 force_line_numbers (void)
5416 int old
= no_line_numbers
;
5418 no_line_numbers
= 0;
5420 force_next_line_note ();
5425 restore_line_number_status (int old_value
)
5427 no_line_numbers
= old_value
;
5430 /* Produce exact duplicate of insn INSN after AFTER.
5431 Care updating of libcall regions if present. */
5434 emit_copy_of_insn_after (rtx insn
, rtx after
)
5437 rtx note1
, note2
, link
;
5439 switch (GET_CODE (insn
))
5442 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5446 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5450 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5451 if (CALL_INSN_FUNCTION_USAGE (insn
))
5452 CALL_INSN_FUNCTION_USAGE (new)
5453 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5454 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5455 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5462 /* Update LABEL_NUSES. */
5463 mark_jump_label (PATTERN (new), new, 0);
5465 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5467 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5469 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5470 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5472 if (GET_CODE (link
) == EXPR_LIST
)
5474 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5479 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5484 /* Fix the libcall sequences. */
5485 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5488 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5490 XEXP (note1
, 0) = p
;
5491 XEXP (note2
, 0) = new;
5493 INSN_CODE (new) = INSN_CODE (insn
);
5497 static GTY((deletable(""))) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5499 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5501 if (hard_reg_clobbers
[mode
][regno
])
5502 return hard_reg_clobbers
[mode
][regno
];
5504 return (hard_reg_clobbers
[mode
][regno
] =
5505 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5508 #include "gt-emit-rtl.h"