1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
114 REAL_VALUE_TYPE dconstm2
;
115 REAL_VALUE_TYPE dconsthalf
;
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
136 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
137 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
138 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
139 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
156 htab_t const_int_htab
;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
160 htab_t mem_attrs_htab
;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
164 htab_t reg_attrs_htab
;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
168 htab_t const_double_htab
;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_location (cfun->emit->x_last_location)
174 #define first_label_num (cfun->emit->x_first_label_num)
176 static rtx make_jump_insn_raw
PARAMS ((rtx
));
177 static rtx make_call_insn_raw
PARAMS ((rtx
));
178 static rtx find_line_note
PARAMS ((rtx
));
179 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
181 static void unshare_all_rtl_1
PARAMS ((rtx
));
182 static void unshare_all_decls
PARAMS ((tree
));
183 static void reset_used_decls
PARAMS ((tree
));
184 static void mark_label_nuses
PARAMS ((rtx
));
185 static hashval_t const_int_htab_hash
PARAMS ((const void *));
186 static int const_int_htab_eq
PARAMS ((const void *,
188 static hashval_t const_double_htab_hash
PARAMS ((const void *));
189 static int const_double_htab_eq
PARAMS ((const void *,
191 static rtx lookup_const_double
PARAMS ((rtx
));
192 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
193 static int mem_attrs_htab_eq
PARAMS ((const void *,
195 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
198 static hashval_t reg_attrs_htab_hash
PARAMS ((const void *));
199 static int reg_attrs_htab_eq
PARAMS ((const void *,
201 static reg_attrs
*get_reg_attrs
PARAMS ((tree
, int));
202 static tree component_ref_for_mem_expr
PARAMS ((tree
));
203 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
204 static rtx gen_complex_constant_part
PARAMS ((enum machine_mode
,
207 /* Probability of the conditional branch currently proceeded by try_split.
208 Set to -1 otherwise. */
209 int split_branch_probability
= -1;
211 /* Returns a hash code for X (which is a really a CONST_INT). */
214 const_int_htab_hash (x
)
217 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
220 /* Returns nonzero if the value represented by X (which is really a
221 CONST_INT) is the same as that given by Y (which is really a
225 const_int_htab_eq (x
, y
)
229 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
232 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
234 const_double_htab_hash (x
)
240 if (GET_MODE (value
) == VOIDmode
)
241 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
244 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
245 /* MODE is used in the comparison, so it should be in the hash. */
246 h
^= GET_MODE (value
);
251 /* Returns nonzero if the value represented by X (really a ...)
252 is the same as that represented by Y (really a ...) */
254 const_double_htab_eq (x
, y
)
258 rtx a
= (rtx
)x
, b
= (rtx
)y
;
260 if (GET_MODE (a
) != GET_MODE (b
))
262 if (GET_MODE (a
) == VOIDmode
)
263 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
264 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
266 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
267 CONST_DOUBLE_REAL_VALUE (b
));
270 /* Returns a hash code for X (which is a really a mem_attrs *). */
273 mem_attrs_htab_hash (x
)
276 mem_attrs
*p
= (mem_attrs
*) x
;
278 return (p
->alias
^ (p
->align
* 1000)
279 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
280 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
284 /* Returns nonzero if the value represented by X (which is really a
285 mem_attrs *) is the same as that given by Y (which is also really a
289 mem_attrs_htab_eq (x
, y
)
293 mem_attrs
*p
= (mem_attrs
*) x
;
294 mem_attrs
*q
= (mem_attrs
*) y
;
296 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
297 && p
->size
== q
->size
&& p
->align
== q
->align
);
300 /* Allocate a new mem_attrs structure and insert it into the hash table if
301 one identical to it is not already in the table. We are doing this for
305 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
311 enum machine_mode mode
;
316 /* If everything is the default, we can just return zero.
317 This must match what the corresponding MEM_* macros return when the
318 field is not present. */
319 if (alias
== 0 && expr
== 0 && offset
== 0
321 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
322 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
323 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
328 attrs
.offset
= offset
;
332 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
335 *slot
= ggc_alloc (sizeof (mem_attrs
));
336 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
342 /* Returns a hash code for X (which is a really a reg_attrs *). */
345 reg_attrs_htab_hash (x
)
348 reg_attrs
*p
= (reg_attrs
*) x
;
350 return ((p
->offset
* 1000) ^ (long) p
->decl
);
353 /* Returns nonzero if the value represented by X (which is really a
354 reg_attrs *) is the same as that given by Y (which is also really a
358 reg_attrs_htab_eq (x
, y
)
362 reg_attrs
*p
= (reg_attrs
*) x
;
363 reg_attrs
*q
= (reg_attrs
*) y
;
365 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
367 /* Allocate a new reg_attrs structure and insert it into the hash table if
368 one identical to it is not already in the table. We are doing this for
372 get_reg_attrs (decl
, offset
)
379 /* If everything is the default, we can just return zero. */
380 if (decl
== 0 && offset
== 0)
384 attrs
.offset
= offset
;
386 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
389 *slot
= ggc_alloc (sizeof (reg_attrs
));
390 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
396 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
397 don't attempt to share with the various global pieces of rtl (such as
398 frame_pointer_rtx). */
401 gen_raw_REG (mode
, regno
)
402 enum machine_mode mode
;
405 rtx x
= gen_rtx_raw_REG (mode
, regno
);
406 ORIGINAL_REGNO (x
) = regno
;
410 /* There are some RTL codes that require special attention; the generation
411 functions do the raw handling. If you add to this list, modify
412 special_rtx in gengenrtl.c as well. */
415 gen_rtx_CONST_INT (mode
, arg
)
416 enum machine_mode mode ATTRIBUTE_UNUSED
;
421 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
422 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
424 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
425 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
426 return const_true_rtx
;
429 /* Look up the CONST_INT in the hash table. */
430 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
431 (hashval_t
) arg
, INSERT
);
433 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
439 gen_int_mode (c
, mode
)
441 enum machine_mode mode
;
443 return GEN_INT (trunc_int_for_mode (c
, mode
));
446 /* CONST_DOUBLEs might be created from pairs of integers, or from
447 REAL_VALUE_TYPEs. Also, their length is known only at run time,
448 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
450 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
451 hash table. If so, return its counterpart; otherwise add it
452 to the hash table and return it. */
454 lookup_const_double (real
)
457 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
464 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
465 VALUE in mode MODE. */
467 const_double_from_real_value (value
, mode
)
468 REAL_VALUE_TYPE value
;
469 enum machine_mode mode
;
471 rtx real
= rtx_alloc (CONST_DOUBLE
);
472 PUT_MODE (real
, mode
);
474 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
476 return lookup_const_double (real
);
479 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
480 of ints: I0 is the low-order word and I1 is the high-order word.
481 Do not use this routine for non-integer modes; convert to
482 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
485 immed_double_const (i0
, i1
, mode
)
486 HOST_WIDE_INT i0
, i1
;
487 enum machine_mode mode
;
492 if (mode
!= VOIDmode
)
495 if (GET_MODE_CLASS (mode
) != MODE_INT
496 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
497 /* We can get a 0 for an error mark. */
498 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
499 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
502 /* We clear out all bits that don't belong in MODE, unless they and
503 our sign bit are all one. So we get either a reasonable negative
504 value or a reasonable unsigned value for this mode. */
505 width
= GET_MODE_BITSIZE (mode
);
506 if (width
< HOST_BITS_PER_WIDE_INT
507 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
508 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
509 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
510 else if (width
== HOST_BITS_PER_WIDE_INT
511 && ! (i1
== ~0 && i0
< 0))
513 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
514 /* We cannot represent this value as a constant. */
517 /* If this would be an entire word for the target, but is not for
518 the host, then sign-extend on the host so that the number will
519 look the same way on the host that it would on the target.
521 For example, when building a 64 bit alpha hosted 32 bit sparc
522 targeted compiler, then we want the 32 bit unsigned value -1 to be
523 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
524 The latter confuses the sparc backend. */
526 if (width
< HOST_BITS_PER_WIDE_INT
527 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
528 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
530 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
533 ??? Strictly speaking, this is wrong if we create a CONST_INT for
534 a large unsigned constant with the size of MODE being
535 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
536 in a wider mode. In that case we will mis-interpret it as a
539 Unfortunately, the only alternative is to make a CONST_DOUBLE for
540 any constant in any mode if it is an unsigned constant larger
541 than the maximum signed integer in an int on the host. However,
542 doing this will break everyone that always expects to see a
543 CONST_INT for SImode and smaller.
545 We have always been making CONST_INTs in this case, so nothing
546 new is being broken. */
548 if (width
<= HOST_BITS_PER_WIDE_INT
)
549 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
552 /* If this integer fits in one word, return a CONST_INT. */
553 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
556 /* We use VOIDmode for integers. */
557 value
= rtx_alloc (CONST_DOUBLE
);
558 PUT_MODE (value
, VOIDmode
);
560 CONST_DOUBLE_LOW (value
) = i0
;
561 CONST_DOUBLE_HIGH (value
) = i1
;
563 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
564 XWINT (value
, i
) = 0;
566 return lookup_const_double (value
);
570 gen_rtx_REG (mode
, regno
)
571 enum machine_mode mode
;
574 /* In case the MD file explicitly references the frame pointer, have
575 all such references point to the same frame pointer. This is
576 used during frame pointer elimination to distinguish the explicit
577 references to these registers from pseudos that happened to be
580 If we have eliminated the frame pointer or arg pointer, we will
581 be using it as a normal register, for example as a spill
582 register. In such cases, we might be accessing it in a mode that
583 is not Pmode and therefore cannot use the pre-allocated rtx.
585 Also don't do this when we are making new REGs in reload, since
586 we don't want to get confused with the real pointers. */
588 if (mode
== Pmode
&& !reload_in_progress
)
590 if (regno
== FRAME_POINTER_REGNUM
591 && (!reload_completed
|| frame_pointer_needed
))
592 return frame_pointer_rtx
;
593 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
594 if (regno
== HARD_FRAME_POINTER_REGNUM
595 && (!reload_completed
|| frame_pointer_needed
))
596 return hard_frame_pointer_rtx
;
598 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
599 if (regno
== ARG_POINTER_REGNUM
)
600 return arg_pointer_rtx
;
602 #ifdef RETURN_ADDRESS_POINTER_REGNUM
603 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
604 return return_address_pointer_rtx
;
606 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
607 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
608 return pic_offset_table_rtx
;
609 if (regno
== STACK_POINTER_REGNUM
)
610 return stack_pointer_rtx
;
614 /* If the per-function register table has been set up, try to re-use
615 an existing entry in that table to avoid useless generation of RTL.
617 This code is disabled for now until we can fix the various backends
618 which depend on having non-shared hard registers in some cases. Long
619 term we want to re-enable this code as it can significantly cut down
620 on the amount of useless RTL that gets generated.
622 We'll also need to fix some code that runs after reload that wants to
623 set ORIGINAL_REGNO. */
628 && regno
< FIRST_PSEUDO_REGISTER
629 && reg_raw_mode
[regno
] == mode
)
630 return regno_reg_rtx
[regno
];
633 return gen_raw_REG (mode
, regno
);
637 gen_rtx_MEM (mode
, addr
)
638 enum machine_mode mode
;
641 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
643 /* This field is not cleared by the mere allocation of the rtx, so
651 gen_rtx_SUBREG (mode
, reg
, offset
)
652 enum machine_mode mode
;
656 /* This is the most common failure type.
657 Catch it early so we can see who does it. */
658 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
661 /* This check isn't usable right now because combine will
662 throw arbitrary crap like a CALL into a SUBREG in
663 gen_lowpart_for_combine so we must just eat it. */
665 /* Check for this too. */
666 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
669 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
672 /* Generate a SUBREG representing the least-significant part of REG if MODE
673 is smaller than mode of REG, otherwise paradoxical SUBREG. */
676 gen_lowpart_SUBREG (mode
, reg
)
677 enum machine_mode mode
;
680 enum machine_mode inmode
;
682 inmode
= GET_MODE (reg
);
683 if (inmode
== VOIDmode
)
685 return gen_rtx_SUBREG (mode
, reg
,
686 subreg_lowpart_offset (mode
, inmode
));
689 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
691 ** This routine generates an RTX of the size specified by
692 ** <code>, which is an RTX code. The RTX structure is initialized
693 ** from the arguments <element1> through <elementn>, which are
694 ** interpreted according to the specific RTX type's format. The
695 ** special machine mode associated with the rtx (if any) is specified
698 ** gen_rtx can be invoked in a way which resembles the lisp-like
699 ** rtx it will generate. For example, the following rtx structure:
701 ** (plus:QI (mem:QI (reg:SI 1))
702 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
704 ** ...would be generated by the following C code:
706 ** gen_rtx (PLUS, QImode,
707 ** gen_rtx (MEM, QImode,
708 ** gen_rtx (REG, SImode, 1)),
709 ** gen_rtx (MEM, QImode,
710 ** gen_rtx (PLUS, SImode,
711 ** gen_rtx (REG, SImode, 2),
712 ** gen_rtx (REG, SImode, 3)))),
717 gen_rtx (enum rtx_code code
, enum machine_mode mode
, ...)
719 int i
; /* Array indices... */
720 const char *fmt
; /* Current rtx's format... */
721 rtx rt_val
; /* RTX to return to caller... */
729 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
734 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
735 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
737 rt_val
= immed_double_const (arg0
, arg1
, mode
);
742 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
746 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
750 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
751 rt_val
->mode
= mode
; /* Store the machine mode... */
753 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
754 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
758 case '0': /* Field with unknown use. Zero it. */
759 X0EXP (rt_val
, i
) = NULL_RTX
;
762 case 'i': /* An integer? */
763 XINT (rt_val
, i
) = va_arg (p
, int);
766 case 'w': /* A wide integer? */
767 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
770 case 's': /* A string? */
771 XSTR (rt_val
, i
) = va_arg (p
, char *);
774 case 'e': /* An expression? */
775 case 'u': /* An insn? Same except when printing. */
776 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
779 case 'E': /* An RTX vector? */
780 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
783 case 'b': /* A bitmap? */
784 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
787 case 't': /* A tree? */
788 XTREE (rt_val
, i
) = va_arg (p
, tree
);
802 /* gen_rtvec (n, [rt1, ..., rtn])
804 ** This routine creates an rtvec and stores within it the
805 ** pointers to rtx's which are its arguments.
810 gen_rtvec (int n
, ...)
819 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
821 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
823 for (i
= 0; i
< n
; i
++)
824 vector
[i
] = va_arg (p
, rtx
);
826 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
830 return gen_rtvec_v (save_n
, vector
);
834 gen_rtvec_v (n
, argp
)
842 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
844 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
846 for (i
= 0; i
< n
; i
++)
847 rt_val
->elem
[i
] = *argp
++;
852 /* Generate a REG rtx for a new pseudo register of mode MODE.
853 This pseudo is assigned the next sequential register number. */
857 enum machine_mode mode
;
859 struct function
*f
= cfun
;
862 /* Don't let anything called after initial flow analysis create new
867 if (generating_concat_p
868 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
869 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
871 /* For complex modes, don't make a single pseudo.
872 Instead, make a CONCAT of two pseudos.
873 This allows noncontiguous allocation of the real and imaginary parts,
874 which makes much better code. Besides, allocating DCmode
875 pseudos overstrains reload on some machines like the 386. */
876 rtx realpart
, imagpart
;
877 enum machine_mode partmode
= GET_MODE_INNER (mode
);
879 realpart
= gen_reg_rtx (partmode
);
880 imagpart
= gen_reg_rtx (partmode
);
881 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
884 /* Make sure regno_pointer_align, and regno_reg_rtx are large
885 enough to have an element for this pseudo reg number. */
887 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
889 int old_size
= f
->emit
->regno_pointer_align_length
;
893 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
894 memset (new + old_size
, 0, old_size
);
895 f
->emit
->regno_pointer_align
= (unsigned char *) new;
897 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
898 old_size
* 2 * sizeof (rtx
));
899 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
900 regno_reg_rtx
= new1
;
902 f
->emit
->regno_pointer_align_length
= old_size
* 2;
905 val
= gen_raw_REG (mode
, reg_rtx_no
);
906 regno_reg_rtx
[reg_rtx_no
++] = val
;
910 /* Generate an register with same attributes as REG,
911 but offsetted by OFFSET. */
914 gen_rtx_REG_offset (reg
, mode
, regno
, offset
)
915 enum machine_mode mode
;
920 rtx
new = gen_rtx_REG (mode
, regno
);
921 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
922 REG_OFFSET (reg
) + offset
);
926 /* Set the decl for MEM to DECL. */
929 set_reg_attrs_from_mem (reg
, mem
)
933 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
935 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
938 /* Set the register attributes for registers contained in PARM_RTX.
939 Use needed values from memory attributes of MEM. */
942 set_reg_attrs_for_parm (parm_rtx
, mem
)
946 if (GET_CODE (parm_rtx
) == REG
)
947 set_reg_attrs_from_mem (parm_rtx
, mem
);
948 else if (GET_CODE (parm_rtx
) == PARALLEL
)
950 /* Check for a NULL entry in the first slot, used to indicate that the
951 parameter goes both on the stack and in registers. */
952 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
953 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
955 rtx x
= XVECEXP (parm_rtx
, 0, i
);
956 if (GET_CODE (XEXP (x
, 0)) == REG
)
957 REG_ATTRS (XEXP (x
, 0))
958 = get_reg_attrs (MEM_EXPR (mem
),
959 INTVAL (XEXP (x
, 1)));
964 /* Assign the RTX X to declaration T. */
970 DECL_CHECK (t
)->decl
.rtl
= x
;
974 /* For register, we maitain the reverse information too. */
975 if (GET_CODE (x
) == REG
)
976 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
977 else if (GET_CODE (x
) == SUBREG
)
978 REG_ATTRS (SUBREG_REG (x
))
979 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
980 if (GET_CODE (x
) == CONCAT
)
982 if (REG_P (XEXP (x
, 0)))
983 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
984 if (REG_P (XEXP (x
, 1)))
985 REG_ATTRS (XEXP (x
, 1))
986 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
988 if (GET_CODE (x
) == PARALLEL
)
991 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
993 rtx y
= XVECEXP (x
, 0, i
);
994 if (REG_P (XEXP (y
, 0)))
995 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1000 /* Identify REG (which may be a CONCAT) as a user register. */
1006 if (GET_CODE (reg
) == CONCAT
)
1008 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1009 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1011 else if (GET_CODE (reg
) == REG
)
1012 REG_USERVAR_P (reg
) = 1;
1017 /* Identify REG as a probable pointer register and show its alignment
1018 as ALIGN, if nonzero. */
1021 mark_reg_pointer (reg
, align
)
1025 if (! REG_POINTER (reg
))
1027 REG_POINTER (reg
) = 1;
1030 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1032 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1033 /* We can no-longer be sure just how aligned this pointer is */
1034 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1037 /* Return 1 plus largest pseudo reg number used in the current function. */
1045 /* Return 1 + the largest label number used so far in the current function. */
1050 if (last_label_num
&& label_num
== base_label_num
)
1051 return last_label_num
;
1055 /* Return first label number used in this function (if any were used). */
1058 get_first_label_num ()
1060 return first_label_num
;
1063 /* Return the final regno of X, which is a SUBREG of a hard
1066 subreg_hard_regno (x
, check_mode
)
1070 enum machine_mode mode
= GET_MODE (x
);
1071 unsigned int byte_offset
, base_regno
, final_regno
;
1072 rtx reg
= SUBREG_REG (x
);
1074 /* This is where we attempt to catch illegal subregs
1075 created by the compiler. */
1076 if (GET_CODE (x
) != SUBREG
1077 || GET_CODE (reg
) != REG
)
1079 base_regno
= REGNO (reg
);
1080 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1082 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1084 #ifdef ENABLE_CHECKING
1085 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
1086 SUBREG_BYTE (x
), mode
))
1089 /* Catch non-congruent offsets too. */
1090 byte_offset
= SUBREG_BYTE (x
);
1091 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1094 final_regno
= subreg_regno (x
);
1099 /* Return a value representing some low-order bits of X, where the number
1100 of low-order bits is given by MODE. Note that no conversion is done
1101 between floating-point and fixed-point values, rather, the bit
1102 representation is returned.
1104 This function handles the cases in common between gen_lowpart, below,
1105 and two variants in cse.c and combine.c. These are the cases that can
1106 be safely handled at all points in the compilation.
1108 If this is not a case we can handle, return 0. */
1111 gen_lowpart_common (mode
, x
)
1112 enum machine_mode mode
;
1115 int msize
= GET_MODE_SIZE (mode
);
1116 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
1119 if (GET_MODE (x
) == mode
)
1122 /* MODE must occupy no more words than the mode of X. */
1123 if (GET_MODE (x
) != VOIDmode
1124 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1125 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
1128 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1129 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1130 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
1133 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
1135 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1136 && (GET_MODE_CLASS (mode
) == MODE_INT
1137 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1139 /* If we are getting the low-order part of something that has been
1140 sign- or zero-extended, we can either just use the object being
1141 extended or make a narrower extension. If we want an even smaller
1142 piece than the size of the object being extended, call ourselves
1145 This case is used mostly by combine and cse. */
1147 if (GET_MODE (XEXP (x
, 0)) == mode
)
1149 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1150 return gen_lowpart_common (mode
, XEXP (x
, 0));
1151 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
1152 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1154 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1155 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
1156 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
1157 else if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
1158 return simplify_gen_subreg (mode
, x
, int_mode_for_mode (mode
), offset
);
1159 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1160 from the low-order part of the constant. */
1161 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1162 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1163 && GET_MODE (x
) == VOIDmode
1164 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1166 /* If MODE is twice the host word size, X is already the desired
1167 representation. Otherwise, if MODE is wider than a word, we can't
1168 do this. If MODE is exactly a word, return just one CONST_INT. */
1170 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1172 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1174 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1175 return (GET_CODE (x
) == CONST_INT
? x
1176 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1179 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1180 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1181 : CONST_DOUBLE_LOW (x
));
1183 /* Sign extend to HOST_WIDE_INT. */
1184 val
= trunc_int_for_mode (val
, mode
);
1186 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1191 /* The floating-point emulator can handle all conversions between
1192 FP and integer operands. This simplifies reload because it
1193 doesn't have to deal with constructs like (subreg:DI
1194 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1195 /* Single-precision floats are always 32-bits and double-precision
1196 floats are always 64-bits. */
1198 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1199 && GET_MODE_BITSIZE (mode
) == 32
1200 && GET_CODE (x
) == CONST_INT
)
1203 long i
= INTVAL (x
);
1205 real_from_target (&r
, &i
, mode
);
1206 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1208 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1209 && GET_MODE_BITSIZE (mode
) == 64
1210 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1211 && GET_MODE (x
) == VOIDmode
)
1214 HOST_WIDE_INT low
, high
;
1217 if (GET_CODE (x
) == CONST_INT
)
1220 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1224 low
= CONST_DOUBLE_LOW (x
);
1225 high
= CONST_DOUBLE_HIGH (x
);
1228 if (HOST_BITS_PER_WIDE_INT
> 32)
1229 high
= low
>> 31 >> 1;
1231 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1233 if (WORDS_BIG_ENDIAN
)
1234 i
[0] = high
, i
[1] = low
;
1236 i
[0] = low
, i
[1] = high
;
1238 real_from_target (&r
, i
, mode
);
1239 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1241 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1242 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1243 && GET_CODE (x
) == CONST_DOUBLE
1244 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1247 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1248 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1250 /* Convert 'r' into an array of four 32-bit words in target word
1252 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1253 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1256 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1259 i
[3 - 3 * endian
] = 0;
1262 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1263 i
[2 - 2 * endian
] = 0;
1264 i
[3 - 2 * endian
] = 0;
1267 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1268 i
[3 - 3 * endian
] = 0;
1271 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1276 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1278 #if HOST_BITS_PER_WIDE_INT == 32
1279 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1281 if (HOST_BITS_PER_WIDE_INT
!= 64)
1284 return immed_double_const ((((unsigned long) i
[3 * endian
])
1285 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1286 (((unsigned long) i
[2 - endian
])
1287 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1291 /* If MODE is a condition code and X is a CONST_INT, the value of X
1292 must already have been "recognized" by the back-end, and we can
1293 assume that it is valid for this mode. */
1294 else if (GET_MODE_CLASS (mode
) == MODE_CC
1295 && GET_CODE (x
) == CONST_INT
)
1298 /* Otherwise, we can't do this. */
1302 /* Return the constant real or imaginary part (which has mode MODE)
1303 of a complex value X. The IMAGPART_P argument determines whether
1304 the real or complex component should be returned. This function
1305 returns NULL_RTX if the component isn't a constant. */
1308 gen_complex_constant_part (mode
, x
, imagpart_p
)
1309 enum machine_mode mode
;
1315 if (GET_CODE (x
) == MEM
1316 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1318 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1319 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1321 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1322 if (TREE_CODE (part
) == REAL_CST
1323 || TREE_CODE (part
) == INTEGER_CST
)
1324 return expand_expr (part
, NULL_RTX
, mode
, 0);
1330 /* Return the real part (which has mode MODE) of a complex value X.
1331 This always comes at the low address in memory. */
1334 gen_realpart (mode
, x
)
1335 enum machine_mode mode
;
1340 /* Handle complex constants. */
1341 part
= gen_complex_constant_part (mode
, x
, 0);
1342 if (part
!= NULL_RTX
)
1345 if (WORDS_BIG_ENDIAN
1346 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1348 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1350 ("can't access real part of complex value in hard register");
1351 else if (WORDS_BIG_ENDIAN
)
1352 return gen_highpart (mode
, x
);
1354 return gen_lowpart (mode
, x
);
1357 /* Return the imaginary part (which has mode MODE) of a complex value X.
1358 This always comes at the high address in memory. */
1361 gen_imagpart (mode
, x
)
1362 enum machine_mode mode
;
1367 /* Handle complex constants. */
1368 part
= gen_complex_constant_part (mode
, x
, 1);
1369 if (part
!= NULL_RTX
)
1372 if (WORDS_BIG_ENDIAN
)
1373 return gen_lowpart (mode
, x
);
1374 else if (! WORDS_BIG_ENDIAN
1375 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1377 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1379 ("can't access imaginary part of complex value in hard register");
1381 return gen_highpart (mode
, x
);
1384 /* Return 1 iff X, assumed to be a SUBREG,
1385 refers to the real part of the complex value in its containing reg.
1386 Complex values are always stored with the real part in the first word,
1387 regardless of WORDS_BIG_ENDIAN. */
1390 subreg_realpart_p (x
)
1393 if (GET_CODE (x
) != SUBREG
)
1396 return ((unsigned int) SUBREG_BYTE (x
)
1397 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1400 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1401 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1402 least-significant part of X.
1403 MODE specifies how big a part of X to return;
1404 it usually should not be larger than a word.
1405 If X is a MEM whose address is a QUEUED, the value may be so also. */
1408 gen_lowpart (mode
, x
)
1409 enum machine_mode mode
;
1412 rtx result
= gen_lowpart_common (mode
, x
);
1416 else if (GET_CODE (x
) == REG
)
1418 /* Must be a hard reg that's not valid in MODE. */
1419 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1424 else if (GET_CODE (x
) == MEM
)
1426 /* The only additional case we can do is MEM. */
1429 /* The following exposes the use of "x" to CSE. */
1430 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1431 && SCALAR_INT_MODE_P (GET_MODE (x
))
1432 && ! no_new_pseudos
)
1433 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1435 if (WORDS_BIG_ENDIAN
)
1436 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1437 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1439 if (BYTES_BIG_ENDIAN
)
1440 /* Adjust the address so that the address-after-the-data
1442 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1443 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1445 return adjust_address (x
, mode
, offset
);
1447 else if (GET_CODE (x
) == ADDRESSOF
)
1448 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1453 /* Like `gen_lowpart', but refer to the most significant part.
1454 This is used to access the imaginary part of a complex number. */
1457 gen_highpart (mode
, x
)
1458 enum machine_mode mode
;
1461 unsigned int msize
= GET_MODE_SIZE (mode
);
1464 /* This case loses if X is a subreg. To catch bugs early,
1465 complain if an invalid MODE is used even in other cases. */
1466 if (msize
> UNITS_PER_WORD
1467 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1470 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1471 subreg_highpart_offset (mode
, GET_MODE (x
)));
1473 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1474 the target if we have a MEM. gen_highpart must return a valid operand,
1475 emitting code if necessary to do so. */
1476 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1477 result
= validize_mem (result
);
1484 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1485 be VOIDmode constant. */
1487 gen_highpart_mode (outermode
, innermode
, exp
)
1488 enum machine_mode outermode
, innermode
;
1491 if (GET_MODE (exp
) != VOIDmode
)
1493 if (GET_MODE (exp
) != innermode
)
1495 return gen_highpart (outermode
, exp
);
1497 return simplify_gen_subreg (outermode
, exp
, innermode
,
1498 subreg_highpart_offset (outermode
, innermode
));
1501 /* Return offset in bytes to get OUTERMODE low part
1502 of the value in mode INNERMODE stored in memory in target format. */
1505 subreg_lowpart_offset (outermode
, innermode
)
1506 enum machine_mode outermode
, innermode
;
1508 unsigned int offset
= 0;
1509 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1513 if (WORDS_BIG_ENDIAN
)
1514 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1515 if (BYTES_BIG_ENDIAN
)
1516 offset
+= difference
% UNITS_PER_WORD
;
1522 /* Return offset in bytes to get OUTERMODE high part
1523 of the value in mode INNERMODE stored in memory in target format. */
1525 subreg_highpart_offset (outermode
, innermode
)
1526 enum machine_mode outermode
, innermode
;
1528 unsigned int offset
= 0;
1529 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1531 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1536 if (! WORDS_BIG_ENDIAN
)
1537 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1538 if (! BYTES_BIG_ENDIAN
)
1539 offset
+= difference
% UNITS_PER_WORD
;
1545 /* Return 1 iff X, assumed to be a SUBREG,
1546 refers to the least significant part of its containing reg.
1547 If X is not a SUBREG, always return 1 (it is its own low part!). */
1550 subreg_lowpart_p (x
)
1553 if (GET_CODE (x
) != SUBREG
)
1555 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1558 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1559 == SUBREG_BYTE (x
));
1563 /* Helper routine for all the constant cases of operand_subword.
1564 Some places invoke this directly. */
1567 constant_subword (op
, offset
, mode
)
1570 enum machine_mode mode
;
1572 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1575 /* If OP is already an integer word, return it. */
1576 if (GET_MODE_CLASS (mode
) == MODE_INT
1577 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1580 /* The output is some bits, the width of the target machine's word.
1581 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1583 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1584 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1585 && GET_MODE_BITSIZE (mode
) == 64
1586 && GET_CODE (op
) == CONST_DOUBLE
)
1591 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1592 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1594 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1595 which the words are written depends on the word endianness.
1596 ??? This is a potential portability problem and should
1597 be fixed at some point.
1599 We must exercise caution with the sign bit. By definition there
1600 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1601 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1602 So we explicitly mask and sign-extend as necessary. */
1603 if (BITS_PER_WORD
== 32)
1606 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1607 return GEN_INT (val
);
1609 #if HOST_BITS_PER_WIDE_INT >= 64
1610 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1612 val
= k
[! WORDS_BIG_ENDIAN
];
1613 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1614 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1615 return GEN_INT (val
);
1618 else if (BITS_PER_WORD
== 16)
1620 val
= k
[offset
>> 1];
1621 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1623 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1624 return GEN_INT (val
);
1629 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1630 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1631 && GET_MODE_BITSIZE (mode
) > 64
1632 && GET_CODE (op
) == CONST_DOUBLE
)
1637 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1638 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1640 if (BITS_PER_WORD
== 32)
1643 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1644 return GEN_INT (val
);
1646 #if HOST_BITS_PER_WIDE_INT >= 64
1647 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1649 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1650 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1651 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1652 return GEN_INT (val
);
1659 /* Single word float is a little harder, since single- and double-word
1660 values often do not have the same high-order bits. We have already
1661 verified that we want the only defined word of the single-word value. */
1662 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1663 && GET_MODE_BITSIZE (mode
) == 32
1664 && GET_CODE (op
) == CONST_DOUBLE
)
1669 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1670 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1672 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1674 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1676 if (BITS_PER_WORD
== 16)
1678 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1680 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1683 return GEN_INT (val
);
1686 /* The only remaining cases that we can handle are integers.
1687 Convert to proper endianness now since these cases need it.
1688 At this point, offset == 0 means the low-order word.
1690 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1691 in general. However, if OP is (const_int 0), we can just return
1694 if (op
== const0_rtx
)
1697 if (GET_MODE_CLASS (mode
) != MODE_INT
1698 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1699 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1702 if (WORDS_BIG_ENDIAN
)
1703 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1705 /* Find out which word on the host machine this value is in and get
1706 it from the constant. */
1707 val
= (offset
/ size_ratio
== 0
1708 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1709 : (GET_CODE (op
) == CONST_INT
1710 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1712 /* Get the value we want into the low bits of val. */
1713 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1714 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1716 val
= trunc_int_for_mode (val
, word_mode
);
1718 return GEN_INT (val
);
1721 /* Return subword OFFSET of operand OP.
1722 The word number, OFFSET, is interpreted as the word number starting
1723 at the low-order address. OFFSET 0 is the low-order word if not
1724 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1726 If we cannot extract the required word, we return zero. Otherwise,
1727 an rtx corresponding to the requested word will be returned.
1729 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1730 reload has completed, a valid address will always be returned. After
1731 reload, if a valid address cannot be returned, we return zero.
1733 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1734 it is the responsibility of the caller.
1736 MODE is the mode of OP in case it is a CONST_INT.
1738 ??? This is still rather broken for some cases. The problem for the
1739 moment is that all callers of this thing provide no 'goal mode' to
1740 tell us to work with. This exists because all callers were written
1741 in a word based SUBREG world.
1742 Now use of this function can be deprecated by simplify_subreg in most
1747 operand_subword (op
, offset
, validate_address
, mode
)
1749 unsigned int offset
;
1750 int validate_address
;
1751 enum machine_mode mode
;
1753 if (mode
== VOIDmode
)
1754 mode
= GET_MODE (op
);
1756 if (mode
== VOIDmode
)
1759 /* If OP is narrower than a word, fail. */
1761 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1764 /* If we want a word outside OP, return zero. */
1766 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1769 /* Form a new MEM at the requested address. */
1770 if (GET_CODE (op
) == MEM
)
1772 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1774 if (! validate_address
)
1777 else if (reload_completed
)
1779 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1783 return replace_equiv_address (new, XEXP (new, 0));
1786 /* Rest can be handled by simplify_subreg. */
1787 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1790 /* Similar to `operand_subword', but never return 0. If we can't extract
1791 the required subword, put OP into a register and try again. If that fails,
1792 abort. We always validate the address in this case.
1794 MODE is the mode of OP, in case it is CONST_INT. */
1797 operand_subword_force (op
, offset
, mode
)
1799 unsigned int offset
;
1800 enum machine_mode mode
;
1802 rtx result
= operand_subword (op
, offset
, 1, mode
);
1807 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1809 /* If this is a register which can not be accessed by words, copy it
1810 to a pseudo register. */
1811 if (GET_CODE (op
) == REG
)
1812 op
= copy_to_reg (op
);
1814 op
= force_reg (mode
, op
);
1817 result
= operand_subword (op
, offset
, 1, mode
);
1824 /* Given a compare instruction, swap the operands.
1825 A test instruction is changed into a compare of 0 against the operand. */
1828 reverse_comparison (insn
)
1831 rtx body
= PATTERN (insn
);
1834 if (GET_CODE (body
) == SET
)
1835 comp
= SET_SRC (body
);
1837 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1839 if (GET_CODE (comp
) == COMPARE
)
1841 rtx op0
= XEXP (comp
, 0);
1842 rtx op1
= XEXP (comp
, 1);
1843 XEXP (comp
, 0) = op1
;
1844 XEXP (comp
, 1) = op0
;
1848 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1849 CONST0_RTX (GET_MODE (comp
)), comp
);
1850 if (GET_CODE (body
) == SET
)
1851 SET_SRC (body
) = new;
1853 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1857 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1858 or (2) a component ref of something variable. Represent the later with
1859 a NULL expression. */
1862 component_ref_for_mem_expr (ref
)
1865 tree inner
= TREE_OPERAND (ref
, 0);
1867 if (TREE_CODE (inner
) == COMPONENT_REF
)
1868 inner
= component_ref_for_mem_expr (inner
);
1871 tree placeholder_ptr
= 0;
1873 /* Now remove any conversions: they don't change what the underlying
1874 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1875 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1876 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1877 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1878 || TREE_CODE (inner
) == SAVE_EXPR
1879 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1880 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1881 inner
= find_placeholder (inner
, &placeholder_ptr
);
1883 inner
= TREE_OPERAND (inner
, 0);
1885 if (! DECL_P (inner
))
1889 if (inner
== TREE_OPERAND (ref
, 0))
1892 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1893 TREE_OPERAND (ref
, 1));
1896 /* Given REF, a MEM, and T, either the type of X or the expression
1897 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1898 if we are making a new object of this type. BITPOS is nonzero if
1899 there is an offset outstanding on T that will be applied later. */
1902 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1906 HOST_WIDE_INT bitpos
;
1908 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1909 tree expr
= MEM_EXPR (ref
);
1910 rtx offset
= MEM_OFFSET (ref
);
1911 rtx size
= MEM_SIZE (ref
);
1912 unsigned int align
= MEM_ALIGN (ref
);
1913 HOST_WIDE_INT apply_bitpos
= 0;
1916 /* It can happen that type_for_mode was given a mode for which there
1917 is no language-level type. In which case it returns NULL, which
1922 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1924 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1925 wrong answer, as it assumes that DECL_RTL already has the right alias
1926 info. Callers should not set DECL_RTL until after the call to
1927 set_mem_attributes. */
1928 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1931 /* Get the alias set from the expression or type (perhaps using a
1932 front-end routine) and use it. */
1933 alias
= get_alias_set (t
);
1935 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1936 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1937 RTX_UNCHANGING_P (ref
)
1938 |= ((lang_hooks
.honor_readonly
1939 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1940 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1942 /* If we are making an object of this type, or if this is a DECL, we know
1943 that it is a scalar if the type is not an aggregate. */
1944 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1945 MEM_SCALAR_P (ref
) = 1;
1947 /* We can set the alignment from the type if we are making an object,
1948 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1949 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1950 align
= MAX (align
, TYPE_ALIGN (type
));
1952 /* If the size is known, we can set that. */
1953 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1954 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1956 /* If T is not a type, we may be able to deduce some more information about
1960 maybe_set_unchanging (ref
, t
);
1961 if (TREE_THIS_VOLATILE (t
))
1962 MEM_VOLATILE_P (ref
) = 1;
1964 /* Now remove any conversions: they don't change what the underlying
1965 object is. Likewise for SAVE_EXPR. */
1966 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1967 || TREE_CODE (t
) == NON_LVALUE_EXPR
1968 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1969 || TREE_CODE (t
) == SAVE_EXPR
)
1970 t
= TREE_OPERAND (t
, 0);
1972 /* If this expression can't be addressed (e.g., it contains a reference
1973 to a non-addressable field), show we don't change its alias set. */
1974 if (! can_address_p (t
))
1975 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1977 /* If this is a decl, set the attributes of the MEM from it. */
1981 offset
= const0_rtx
;
1982 apply_bitpos
= bitpos
;
1983 size
= (DECL_SIZE_UNIT (t
)
1984 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1985 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1986 align
= DECL_ALIGN (t
);
1989 /* If this is a constant, we know the alignment. */
1990 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1992 align
= TYPE_ALIGN (type
);
1993 #ifdef CONSTANT_ALIGNMENT
1994 align
= CONSTANT_ALIGNMENT (t
, align
);
1998 /* If this is a field reference and not a bit-field, record it. */
1999 /* ??? There is some information that can be gleened from bit-fields,
2000 such as the word offset in the structure that might be modified.
2001 But skip it for now. */
2002 else if (TREE_CODE (t
) == COMPONENT_REF
2003 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
2005 expr
= component_ref_for_mem_expr (t
);
2006 offset
= const0_rtx
;
2007 apply_bitpos
= bitpos
;
2008 /* ??? Any reason the field size would be different than
2009 the size we got from the type? */
2012 /* If this is an array reference, look for an outer field reference. */
2013 else if (TREE_CODE (t
) == ARRAY_REF
)
2015 tree off_tree
= size_zero_node
;
2019 tree index
= TREE_OPERAND (t
, 1);
2020 tree array
= TREE_OPERAND (t
, 0);
2021 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
2022 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
2023 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
2025 /* We assume all arrays have sizes that are a multiple of a byte.
2026 First subtract the lower bound, if any, in the type of the
2027 index, then convert to sizetype and multiply by the size of the
2029 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
2030 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
2033 /* If the index has a self-referential type, pass it to a
2034 WITH_RECORD_EXPR; if the component size is, pass our
2035 component to one. */
2036 if (CONTAINS_PLACEHOLDER_P (index
))
2037 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t
);
2038 if (CONTAINS_PLACEHOLDER_P (unit_size
))
2039 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
2043 = fold (build (PLUS_EXPR
, sizetype
,
2044 fold (build (MULT_EXPR
, sizetype
,
2048 t
= TREE_OPERAND (t
, 0);
2050 while (TREE_CODE (t
) == ARRAY_REF
);
2056 if (host_integerp (off_tree
, 1))
2058 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
2059 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
2060 align
= DECL_ALIGN (t
);
2061 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
2063 offset
= GEN_INT (ioff
);
2064 apply_bitpos
= bitpos
;
2067 else if (TREE_CODE (t
) == COMPONENT_REF
)
2069 expr
= component_ref_for_mem_expr (t
);
2070 if (host_integerp (off_tree
, 1))
2072 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
2073 apply_bitpos
= bitpos
;
2075 /* ??? Any reason the field size would be different than
2076 the size we got from the type? */
2078 else if (flag_argument_noalias
> 1
2079 && TREE_CODE (t
) == INDIRECT_REF
2080 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2087 /* If this is a Fortran indirect argument reference, record the
2089 else if (flag_argument_noalias
> 1
2090 && TREE_CODE (t
) == INDIRECT_REF
2091 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2098 /* If we modified OFFSET based on T, then subtract the outstanding
2099 bit position offset. Similarly, increase the size of the accessed
2100 object to contain the negative offset. */
2103 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
2105 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
2108 /* Now set the attributes we computed above. */
2110 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
2112 /* If this is already known to be a scalar or aggregate, we are done. */
2113 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
2116 /* If it is a reference into an aggregate, this is part of an aggregate.
2117 Otherwise we don't know. */
2118 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
2119 || TREE_CODE (t
) == ARRAY_RANGE_REF
2120 || TREE_CODE (t
) == BIT_FIELD_REF
)
2121 MEM_IN_STRUCT_P (ref
) = 1;
2125 set_mem_attributes (ref
, t
, objectp
)
2130 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2133 /* Set the decl for MEM to DECL. */
2136 set_mem_attrs_from_reg (mem
, reg
)
2141 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
2142 GEN_INT (REG_OFFSET (reg
)),
2143 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2146 /* Set the alias set of MEM to SET. */
2149 set_mem_alias_set (mem
, set
)
2153 #ifdef ENABLE_CHECKING
2154 /* If the new and old alias sets don't conflict, something is wrong. */
2155 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
2159 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
2160 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2164 /* Set the alignment of MEM to ALIGN bits. */
2167 set_mem_align (mem
, align
)
2171 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2172 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
2176 /* Set the expr for MEM to EXPR. */
2179 set_mem_expr (mem
, expr
)
2184 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
2185 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2188 /* Set the offset of MEM to OFFSET. */
2191 set_mem_offset (mem
, offset
)
2194 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2195 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
2199 /* Set the size of MEM to SIZE. */
2202 set_mem_size (mem
, size
)
2205 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2206 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
2210 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2211 and its address changed to ADDR. (VOIDmode means don't change the mode.
2212 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2213 returned memory location is required to be valid. The memory
2214 attributes are not changed. */
2217 change_address_1 (memref
, mode
, addr
, validate
)
2219 enum machine_mode mode
;
2225 if (GET_CODE (memref
) != MEM
)
2227 if (mode
== VOIDmode
)
2228 mode
= GET_MODE (memref
);
2230 addr
= XEXP (memref
, 0);
2234 if (reload_in_progress
|| reload_completed
)
2236 if (! memory_address_p (mode
, addr
))
2240 addr
= memory_address (mode
, addr
);
2243 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2246 new = gen_rtx_MEM (mode
, addr
);
2247 MEM_COPY_ATTRIBUTES (new, memref
);
2251 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2252 way we are changing MEMREF, so we only preserve the alias set. */
2255 change_address (memref
, mode
, addr
)
2257 enum machine_mode mode
;
2260 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
2261 enum machine_mode mmode
= GET_MODE (new);
2264 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
2265 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
2266 (mmode
== BLKmode
? BITS_PER_UNIT
2267 : GET_MODE_ALIGNMENT (mmode
)),
2273 /* Return a memory reference like MEMREF, but with its mode changed
2274 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2275 nonzero, the memory address is forced to be valid.
2276 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2277 and caller is responsible for adjusting MEMREF base register. */
2280 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2282 enum machine_mode mode
;
2283 HOST_WIDE_INT offset
;
2284 int validate
, adjust
;
2286 rtx addr
= XEXP (memref
, 0);
2288 rtx memoffset
= MEM_OFFSET (memref
);
2290 unsigned int memalign
= MEM_ALIGN (memref
);
2292 /* ??? Prefer to create garbage instead of creating shared rtl.
2293 This may happen even if offset is nonzero -- consider
2294 (plus (plus reg reg) const_int) -- so do this always. */
2295 addr
= copy_rtx (addr
);
2299 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2300 object, we can merge it into the LO_SUM. */
2301 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2303 && (unsigned HOST_WIDE_INT
) offset
2304 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2305 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2306 plus_constant (XEXP (addr
, 1), offset
));
2308 addr
= plus_constant (addr
, offset
);
2311 new = change_address_1 (memref
, mode
, addr
, validate
);
2313 /* Compute the new values of the memory attributes due to this adjustment.
2314 We add the offsets and update the alignment. */
2316 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2318 /* Compute the new alignment by taking the MIN of the alignment and the
2319 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2324 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2326 /* We can compute the size in a number of ways. */
2327 if (GET_MODE (new) != BLKmode
)
2328 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2329 else if (MEM_SIZE (memref
))
2330 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2332 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2333 memoffset
, size
, memalign
, GET_MODE (new));
2335 /* At some point, we should validate that this offset is within the object,
2336 if all the appropriate values are known. */
2340 /* Return a memory reference like MEMREF, but with its mode changed
2341 to MODE and its address changed to ADDR, which is assumed to be
2342 MEMREF offseted by OFFSET bytes. If VALIDATE is
2343 nonzero, the memory address is forced to be valid. */
2346 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2348 enum machine_mode mode
;
2350 HOST_WIDE_INT offset
;
2353 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2354 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2357 /* Return a memory reference like MEMREF, but whose address is changed by
2358 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2359 known to be in OFFSET (possibly 1). */
2362 offset_address (memref
, offset
, pow2
)
2365 unsigned HOST_WIDE_INT pow2
;
2367 rtx
new, addr
= XEXP (memref
, 0);
2369 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2371 /* At this point we don't know _why_ the address is invalid. It
2372 could have secondary memory refereces, multiplies or anything.
2374 However, if we did go and rearrange things, we can wind up not
2375 being able to recognize the magic around pic_offset_table_rtx.
2376 This stuff is fragile, and is yet another example of why it is
2377 bad to expose PIC machinery too early. */
2378 if (! memory_address_p (GET_MODE (memref
), new)
2379 && GET_CODE (addr
) == PLUS
2380 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2382 addr
= force_reg (GET_MODE (addr
), addr
);
2383 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2386 update_temp_slot_address (XEXP (memref
, 0), new);
2387 new = change_address_1 (memref
, VOIDmode
, new, 1);
2389 /* Update the alignment to reflect the offset. Reset the offset, which
2392 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2393 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2398 /* Return a memory reference like MEMREF, but with its address changed to
2399 ADDR. The caller is asserting that the actual piece of memory pointed
2400 to is the same, just the form of the address is being changed, such as
2401 by putting something into a register. */
2404 replace_equiv_address (memref
, addr
)
2408 /* change_address_1 copies the memory attribute structure without change
2409 and that's exactly what we want here. */
2410 update_temp_slot_address (XEXP (memref
, 0), addr
);
2411 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2414 /* Likewise, but the reference is not required to be valid. */
2417 replace_equiv_address_nv (memref
, addr
)
2421 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2424 /* Return a memory reference like MEMREF, but with its mode widened to
2425 MODE and offset by OFFSET. This would be used by targets that e.g.
2426 cannot issue QImode memory operations and have to use SImode memory
2427 operations plus masking logic. */
2430 widen_memory_access (memref
, mode
, offset
)
2432 enum machine_mode mode
;
2433 HOST_WIDE_INT offset
;
2435 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2436 tree expr
= MEM_EXPR (new);
2437 rtx memoffset
= MEM_OFFSET (new);
2438 unsigned int size
= GET_MODE_SIZE (mode
);
2440 /* If we don't know what offset we were at within the expression, then
2441 we can't know if we've overstepped the bounds. */
2447 if (TREE_CODE (expr
) == COMPONENT_REF
)
2449 tree field
= TREE_OPERAND (expr
, 1);
2451 if (! DECL_SIZE_UNIT (field
))
2457 /* Is the field at least as large as the access? If so, ok,
2458 otherwise strip back to the containing structure. */
2459 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2460 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2461 && INTVAL (memoffset
) >= 0)
2464 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2470 expr
= TREE_OPERAND (expr
, 0);
2471 memoffset
= (GEN_INT (INTVAL (memoffset
)
2472 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2473 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2476 /* Similarly for the decl. */
2477 else if (DECL_P (expr
)
2478 && DECL_SIZE_UNIT (expr
)
2479 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2480 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2481 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2485 /* The widened memory access overflows the expression, which means
2486 that it could alias another expression. Zap it. */
2493 memoffset
= NULL_RTX
;
2495 /* The widened memory may alias other stuff, so zap the alias set. */
2496 /* ??? Maybe use get_alias_set on any remaining expression. */
2498 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2499 MEM_ALIGN (new), mode
);
2504 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2509 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2510 NULL
, label_num
++, NULL
);
2513 /* For procedure integration. */
2515 /* Install new pointers to the first and last insns in the chain.
2516 Also, set cur_insn_uid to one higher than the last in use.
2517 Used for an inline-procedure after copying the insn chain. */
2520 set_new_first_and_last_insn (first
, last
)
2529 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2530 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2535 /* Set the range of label numbers found in the current function.
2536 This is used when belatedly compiling an inline function. */
2539 set_new_first_and_last_label_num (first
, last
)
2542 base_label_num
= label_num
;
2543 first_label_num
= first
;
2544 last_label_num
= last
;
2547 /* Set the last label number found in the current function.
2548 This is used when belatedly compiling an inline function. */
2551 set_new_last_label_num (last
)
2554 base_label_num
= label_num
;
2555 last_label_num
= last
;
2558 /* Restore all variables describing the current status from the structure *P.
2559 This is used after a nested function. */
2562 restore_emit_status (p
)
2563 struct function
*p ATTRIBUTE_UNUSED
;
2568 /* Go through all the RTL insn bodies and copy any invalid shared
2569 structure. This routine should only be called once. */
2572 unshare_all_rtl (fndecl
, insn
)
2578 /* Make sure that virtual parameters are not shared. */
2579 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2580 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2582 /* Make sure that virtual stack slots are not shared. */
2583 unshare_all_decls (DECL_INITIAL (fndecl
));
2585 /* Unshare just about everything else. */
2586 unshare_all_rtl_1 (insn
);
2588 /* Make sure the addresses of stack slots found outside the insn chain
2589 (such as, in DECL_RTL of a variable) are not shared
2590 with the insn chain.
2592 This special care is necessary when the stack slot MEM does not
2593 actually appear in the insn chain. If it does appear, its address
2594 is unshared from all else at that point. */
2595 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2598 /* Go through all the RTL insn bodies and copy any invalid shared
2599 structure, again. This is a fairly expensive thing to do so it
2600 should be done sparingly. */
2603 unshare_all_rtl_again (insn
)
2609 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2612 reset_used_flags (PATTERN (p
));
2613 reset_used_flags (REG_NOTES (p
));
2614 reset_used_flags (LOG_LINKS (p
));
2617 /* Make sure that virtual stack slots are not shared. */
2618 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2620 /* Make sure that virtual parameters are not shared. */
2621 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2622 reset_used_flags (DECL_RTL (decl
));
2624 reset_used_flags (stack_slot_list
);
2626 unshare_all_rtl (cfun
->decl
, insn
);
2629 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2630 Assumes the mark bits are cleared at entry. */
2633 unshare_all_rtl_1 (insn
)
2636 for (; insn
; insn
= NEXT_INSN (insn
))
2639 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2640 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2641 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2645 /* Go through all virtual stack slots of a function and copy any
2646 shared structure. */
2648 unshare_all_decls (blk
)
2653 /* Copy shared decls. */
2654 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2655 if (DECL_RTL_SET_P (t
))
2656 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2658 /* Now process sub-blocks. */
2659 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2660 unshare_all_decls (t
);
2663 /* Go through all virtual stack slots of a function and mark them as
2666 reset_used_decls (blk
)
2672 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2673 if (DECL_RTL_SET_P (t
))
2674 reset_used_flags (DECL_RTL (t
));
2676 /* Now process sub-blocks. */
2677 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2678 reset_used_decls (t
);
2681 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2682 placed in the result directly, rather than being copied. MAY_SHARE is
2683 either a MEM of an EXPR_LIST of MEMs. */
2686 copy_most_rtx (orig
, may_share
)
2693 const char *format_ptr
;
2695 if (orig
== may_share
2696 || (GET_CODE (may_share
) == EXPR_LIST
2697 && in_expr_list_p (may_share
, orig
)))
2700 code
= GET_CODE (orig
);
2718 copy
= rtx_alloc (code
);
2719 PUT_MODE (copy
, GET_MODE (orig
));
2720 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2721 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2722 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2723 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2724 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2726 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2728 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2730 switch (*format_ptr
++)
2733 XEXP (copy
, i
) = XEXP (orig
, i
);
2734 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2735 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2739 XEXP (copy
, i
) = XEXP (orig
, i
);
2744 XVEC (copy
, i
) = XVEC (orig
, i
);
2745 if (XVEC (orig
, i
) != NULL
)
2747 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2748 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2749 XVECEXP (copy
, i
, j
)
2750 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2755 XWINT (copy
, i
) = XWINT (orig
, i
);
2760 XINT (copy
, i
) = XINT (orig
, i
);
2764 XTREE (copy
, i
) = XTREE (orig
, i
);
2769 XSTR (copy
, i
) = XSTR (orig
, i
);
2773 /* Copy this through the wide int field; that's safest. */
2774 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2784 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2785 Recursively does the same for subexpressions. */
2788 copy_rtx_if_shared (orig
)
2794 const char *format_ptr
;
2800 code
= GET_CODE (x
);
2802 /* These types may be freely shared. */
2816 /* SCRATCH must be shared because they represent distinct values. */
2820 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2821 a LABEL_REF, it isn't sharable. */
2822 if (GET_CODE (XEXP (x
, 0)) == PLUS
2823 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2824 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2833 /* The chain of insns is not being copied. */
2837 /* A MEM is allowed to be shared if its address is constant.
2839 We used to allow sharing of MEMs which referenced
2840 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2841 that can lose. instantiate_virtual_regs will not unshare
2842 the MEMs, and combine may change the structure of the address
2843 because it looks safe and profitable in one context, but
2844 in some other context it creates unrecognizable RTL. */
2845 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2854 /* This rtx may not be shared. If it has already been seen,
2855 replace it with a copy of itself. */
2857 if (RTX_FLAG (x
, used
))
2861 copy
= rtx_alloc (code
);
2863 (sizeof (*copy
) - sizeof (copy
->fld
)
2864 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2868 RTX_FLAG (x
, used
) = 1;
2870 /* Now scan the subexpressions recursively.
2871 We can store any replaced subexpressions directly into X
2872 since we know X is not shared! Any vectors in X
2873 must be copied if X was copied. */
2875 format_ptr
= GET_RTX_FORMAT (code
);
2877 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2879 switch (*format_ptr
++)
2882 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2886 if (XVEC (x
, i
) != NULL
)
2889 int len
= XVECLEN (x
, i
);
2891 if (copied
&& len
> 0)
2892 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2893 for (j
= 0; j
< len
; j
++)
2894 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2902 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2903 to look for shared sub-parts. */
2906 reset_used_flags (x
)
2911 const char *format_ptr
;
2916 code
= GET_CODE (x
);
2918 /* These types may be freely shared so we needn't do any resetting
2940 /* The chain of insns is not being copied. */
2947 RTX_FLAG (x
, used
) = 0;
2949 format_ptr
= GET_RTX_FORMAT (code
);
2950 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2952 switch (*format_ptr
++)
2955 reset_used_flags (XEXP (x
, i
));
2959 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2960 reset_used_flags (XVECEXP (x
, i
, j
));
2966 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2967 Return X or the rtx for the pseudo reg the value of X was copied into.
2968 OTHER must be valid as a SET_DEST. */
2971 make_safe_from (x
, other
)
2975 switch (GET_CODE (other
))
2978 other
= SUBREG_REG (other
);
2980 case STRICT_LOW_PART
:
2983 other
= XEXP (other
, 0);
2989 if ((GET_CODE (other
) == MEM
2991 && GET_CODE (x
) != REG
2992 && GET_CODE (x
) != SUBREG
)
2993 || (GET_CODE (other
) == REG
2994 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2995 || reg_mentioned_p (other
, x
))))
2997 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2998 emit_move_insn (temp
, x
);
3004 /* Emission of insns (adding them to the doubly-linked list). */
3006 /* Return the first insn of the current sequence or current function. */
3014 /* Specify a new insn as the first in the chain. */
3017 set_first_insn (insn
)
3020 if (PREV_INSN (insn
) != 0)
3025 /* Return the last insn emitted in current sequence or current function. */
3033 /* Specify a new insn as the last in the chain. */
3036 set_last_insn (insn
)
3039 if (NEXT_INSN (insn
) != 0)
3044 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3047 get_last_insn_anywhere ()
3049 struct sequence_stack
*stack
;
3052 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3053 if (stack
->last
!= 0)
3058 /* Return the first nonnote insn emitted in current sequence or current
3059 function. This routine looks inside SEQUENCEs. */
3062 get_first_nonnote_insn ()
3064 rtx insn
= first_insn
;
3068 insn
= next_insn (insn
);
3069 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3076 /* Return the last nonnote insn emitted in current sequence or current
3077 function. This routine looks inside SEQUENCEs. */
3080 get_last_nonnote_insn ()
3082 rtx insn
= last_insn
;
3086 insn
= previous_insn (insn
);
3087 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3094 /* Return a number larger than any instruction's uid in this function. */
3099 return cur_insn_uid
;
3102 /* Renumber instructions so that no instruction UIDs are wasted. */
3105 renumber_insns (stream
)
3110 /* If we're not supposed to renumber instructions, don't. */
3111 if (!flag_renumber_insns
)
3114 /* If there aren't that many instructions, then it's not really
3115 worth renumbering them. */
3116 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
3121 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3124 fprintf (stream
, "Renumbering insn %d to %d\n",
3125 INSN_UID (insn
), cur_insn_uid
);
3126 INSN_UID (insn
) = cur_insn_uid
++;
3130 /* Return the next insn. If it is a SEQUENCE, return the first insn
3139 insn
= NEXT_INSN (insn
);
3140 if (insn
&& GET_CODE (insn
) == INSN
3141 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3142 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3148 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3152 previous_insn (insn
)
3157 insn
= PREV_INSN (insn
);
3158 if (insn
&& GET_CODE (insn
) == INSN
3159 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3160 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3166 /* Return the next insn after INSN that is not a NOTE. This routine does not
3167 look inside SEQUENCEs. */
3170 next_nonnote_insn (insn
)
3175 insn
= NEXT_INSN (insn
);
3176 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3183 /* Return the previous insn before INSN that is not a NOTE. This routine does
3184 not look inside SEQUENCEs. */
3187 prev_nonnote_insn (insn
)
3192 insn
= PREV_INSN (insn
);
3193 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3200 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3201 or 0, if there is none. This routine does not look inside
3205 next_real_insn (insn
)
3210 insn
= NEXT_INSN (insn
);
3211 if (insn
== 0 || GET_CODE (insn
) == INSN
3212 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3219 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3220 or 0, if there is none. This routine does not look inside
3224 prev_real_insn (insn
)
3229 insn
= PREV_INSN (insn
);
3230 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3231 || GET_CODE (insn
) == JUMP_INSN
)
3238 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3239 This routine does not look inside SEQUENCEs. */
3246 for (insn
= get_last_insn ();
3247 insn
&& GET_CODE (insn
) != CALL_INSN
;
3248 insn
= PREV_INSN (insn
))
3254 /* Find the next insn after INSN that really does something. This routine
3255 does not look inside SEQUENCEs. Until reload has completed, this is the
3256 same as next_real_insn. */
3259 active_insn_p (insn
)
3262 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3263 || (GET_CODE (insn
) == INSN
3264 && (! reload_completed
3265 || (GET_CODE (PATTERN (insn
)) != USE
3266 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3270 next_active_insn (insn
)
3275 insn
= NEXT_INSN (insn
);
3276 if (insn
== 0 || active_insn_p (insn
))
3283 /* Find the last insn before INSN that really does something. This routine
3284 does not look inside SEQUENCEs. Until reload has completed, this is the
3285 same as prev_real_insn. */
3288 prev_active_insn (insn
)
3293 insn
= PREV_INSN (insn
);
3294 if (insn
== 0 || active_insn_p (insn
))
3301 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3309 insn
= NEXT_INSN (insn
);
3310 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3317 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3325 insn
= PREV_INSN (insn
);
3326 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3334 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3335 and REG_CC_USER notes so we can find it. */
3338 link_cc0_insns (insn
)
3341 rtx user
= next_nonnote_insn (insn
);
3343 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3344 user
= XVECEXP (PATTERN (user
), 0, 0);
3346 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3348 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3351 /* Return the next insn that uses CC0 after INSN, which is assumed to
3352 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3353 applied to the result of this function should yield INSN).
3355 Normally, this is simply the next insn. However, if a REG_CC_USER note
3356 is present, it contains the insn that uses CC0.
3358 Return 0 if we can't find the insn. */
3361 next_cc0_user (insn
)
3364 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3367 return XEXP (note
, 0);
3369 insn
= next_nonnote_insn (insn
);
3370 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3371 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3373 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3379 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3380 note, it is the previous insn. */
3383 prev_cc0_setter (insn
)
3386 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3389 return XEXP (note
, 0);
3391 insn
= prev_nonnote_insn (insn
);
3392 if (! sets_cc0_p (PATTERN (insn
)))
3399 /* Increment the label uses for all labels present in rtx. */
3402 mark_label_nuses (x
)
3409 code
= GET_CODE (x
);
3410 if (code
== LABEL_REF
)
3411 LABEL_NUSES (XEXP (x
, 0))++;
3413 fmt
= GET_RTX_FORMAT (code
);
3414 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3417 mark_label_nuses (XEXP (x
, i
));
3418 else if (fmt
[i
] == 'E')
3419 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3420 mark_label_nuses (XVECEXP (x
, i
, j
));
3425 /* Try splitting insns that can be split for better scheduling.
3426 PAT is the pattern which might split.
3427 TRIAL is the insn providing PAT.
3428 LAST is nonzero if we should return the last insn of the sequence produced.
3430 If this routine succeeds in splitting, it returns the first or last
3431 replacement insn depending on the value of LAST. Otherwise, it
3432 returns TRIAL. If the insn to be returned can be split, it will be. */
3435 try_split (pat
, trial
, last
)
3439 rtx before
= PREV_INSN (trial
);
3440 rtx after
= NEXT_INSN (trial
);
3441 int has_barrier
= 0;
3445 rtx insn_last
, insn
;
3448 if (any_condjump_p (trial
)
3449 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3450 split_branch_probability
= INTVAL (XEXP (note
, 0));
3451 probability
= split_branch_probability
;
3453 seq
= split_insns (pat
, trial
);
3455 split_branch_probability
= -1;
3457 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3458 We may need to handle this specially. */
3459 if (after
&& GET_CODE (after
) == BARRIER
)
3462 after
= NEXT_INSN (after
);
3468 /* Avoid infinite loop if any insn of the result matches
3469 the original pattern. */
3473 if (INSN_P (insn_last
)
3474 && rtx_equal_p (PATTERN (insn_last
), pat
))
3476 if (!NEXT_INSN (insn_last
))
3478 insn_last
= NEXT_INSN (insn_last
);
3482 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3484 if (GET_CODE (insn
) == JUMP_INSN
)
3486 mark_jump_label (PATTERN (insn
), insn
, 0);
3488 if (probability
!= -1
3489 && any_condjump_p (insn
)
3490 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3492 /* We can preserve the REG_BR_PROB notes only if exactly
3493 one jump is created, otherwise the machine description
3494 is responsible for this step using
3495 split_branch_probability variable. */
3499 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3500 GEN_INT (probability
),
3506 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3507 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3508 if (GET_CODE (trial
) == CALL_INSN
)
3510 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3511 if (GET_CODE (insn
) == CALL_INSN
)
3513 CALL_INSN_FUNCTION_USAGE (insn
)
3514 = CALL_INSN_FUNCTION_USAGE (trial
);
3515 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3519 /* Copy notes, particularly those related to the CFG. */
3520 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3522 switch (REG_NOTE_KIND (note
))
3526 while (insn
!= NULL_RTX
)
3528 if (GET_CODE (insn
) == CALL_INSN
3529 || (flag_non_call_exceptions
3530 && may_trap_p (PATTERN (insn
))))
3532 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3535 insn
= PREV_INSN (insn
);
3541 case REG_ALWAYS_RETURN
:
3543 while (insn
!= NULL_RTX
)
3545 if (GET_CODE (insn
) == CALL_INSN
)
3547 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3550 insn
= PREV_INSN (insn
);
3554 case REG_NON_LOCAL_GOTO
:
3556 while (insn
!= NULL_RTX
)
3558 if (GET_CODE (insn
) == JUMP_INSN
)
3560 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3563 insn
= PREV_INSN (insn
);
3572 /* If there are LABELS inside the split insns increment the
3573 usage count so we don't delete the label. */
3574 if (GET_CODE (trial
) == INSN
)
3577 while (insn
!= NULL_RTX
)
3579 if (GET_CODE (insn
) == INSN
)
3580 mark_label_nuses (PATTERN (insn
));
3582 insn
= PREV_INSN (insn
);
3586 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3588 delete_insn (trial
);
3590 emit_barrier_after (tem
);
3592 /* Recursively call try_split for each new insn created; by the
3593 time control returns here that insn will be fully split, so
3594 set LAST and continue from the insn after the one returned.
3595 We can't use next_active_insn here since AFTER may be a note.
3596 Ignore deleted insns, which can be occur if not optimizing. */
3597 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3598 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3599 tem
= try_split (PATTERN (tem
), tem
, 1);
3601 /* Return either the first or the last insn, depending on which was
3604 ? (after
? PREV_INSN (after
) : last_insn
)
3605 : NEXT_INSN (before
);
3608 /* Make and return an INSN rtx, initializing all its slots.
3609 Store PATTERN in the pattern slots. */
3612 make_insn_raw (pattern
)
3617 insn
= rtx_alloc (INSN
);
3619 INSN_UID (insn
) = cur_insn_uid
++;
3620 PATTERN (insn
) = pattern
;
3621 INSN_CODE (insn
) = -1;
3622 LOG_LINKS (insn
) = NULL
;
3623 REG_NOTES (insn
) = NULL
;
3624 INSN_LOCATOR (insn
) = 0;
3625 BLOCK_FOR_INSN (insn
) = NULL
;
3627 #ifdef ENABLE_RTL_CHECKING
3630 && (returnjump_p (insn
)
3631 || (GET_CODE (insn
) == SET
3632 && SET_DEST (insn
) == pc_rtx
)))
3634 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3642 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3645 make_jump_insn_raw (pattern
)
3650 insn
= rtx_alloc (JUMP_INSN
);
3651 INSN_UID (insn
) = cur_insn_uid
++;
3653 PATTERN (insn
) = pattern
;
3654 INSN_CODE (insn
) = -1;
3655 LOG_LINKS (insn
) = NULL
;
3656 REG_NOTES (insn
) = NULL
;
3657 JUMP_LABEL (insn
) = NULL
;
3658 INSN_LOCATOR (insn
) = 0;
3659 BLOCK_FOR_INSN (insn
) = NULL
;
3664 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3667 make_call_insn_raw (pattern
)
3672 insn
= rtx_alloc (CALL_INSN
);
3673 INSN_UID (insn
) = cur_insn_uid
++;
3675 PATTERN (insn
) = pattern
;
3676 INSN_CODE (insn
) = -1;
3677 LOG_LINKS (insn
) = NULL
;
3678 REG_NOTES (insn
) = NULL
;
3679 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3680 INSN_LOCATOR (insn
) = 0;
3681 BLOCK_FOR_INSN (insn
) = NULL
;
3686 /* Add INSN to the end of the doubly-linked list.
3687 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3693 PREV_INSN (insn
) = last_insn
;
3694 NEXT_INSN (insn
) = 0;
3696 if (NULL
!= last_insn
)
3697 NEXT_INSN (last_insn
) = insn
;
3699 if (NULL
== first_insn
)
3705 /* Add INSN into the doubly-linked list after insn AFTER. This and
3706 the next should be the only functions called to insert an insn once
3707 delay slots have been filled since only they know how to update a
3711 add_insn_after (insn
, after
)
3714 rtx next
= NEXT_INSN (after
);
3717 if (optimize
&& INSN_DELETED_P (after
))
3720 NEXT_INSN (insn
) = next
;
3721 PREV_INSN (insn
) = after
;
3725 PREV_INSN (next
) = insn
;
3726 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3727 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3729 else if (last_insn
== after
)
3733 struct sequence_stack
*stack
= seq_stack
;
3734 /* Scan all pending sequences too. */
3735 for (; stack
; stack
= stack
->next
)
3736 if (after
== stack
->last
)
3746 if (GET_CODE (after
) != BARRIER
3747 && GET_CODE (insn
) != BARRIER
3748 && (bb
= BLOCK_FOR_INSN (after
)))
3750 set_block_for_insn (insn
, bb
);
3752 bb
->flags
|= BB_DIRTY
;
3753 /* Should not happen as first in the BB is always
3754 either NOTE or LABEL. */
3755 if (bb
->end
== after
3756 /* Avoid clobbering of structure when creating new BB. */
3757 && GET_CODE (insn
) != BARRIER
3758 && (GET_CODE (insn
) != NOTE
3759 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3763 NEXT_INSN (after
) = insn
;
3764 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3766 rtx sequence
= PATTERN (after
);
3767 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3771 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3772 the previous should be the only functions called to insert an insn once
3773 delay slots have been filled since only they know how to update a
3777 add_insn_before (insn
, before
)
3780 rtx prev
= PREV_INSN (before
);
3783 if (optimize
&& INSN_DELETED_P (before
))
3786 PREV_INSN (insn
) = prev
;
3787 NEXT_INSN (insn
) = before
;
3791 NEXT_INSN (prev
) = insn
;
3792 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3794 rtx sequence
= PATTERN (prev
);
3795 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3798 else if (first_insn
== before
)
3802 struct sequence_stack
*stack
= seq_stack
;
3803 /* Scan all pending sequences too. */
3804 for (; stack
; stack
= stack
->next
)
3805 if (before
== stack
->first
)
3807 stack
->first
= insn
;
3815 if (GET_CODE (before
) != BARRIER
3816 && GET_CODE (insn
) != BARRIER
3817 && (bb
= BLOCK_FOR_INSN (before
)))
3819 set_block_for_insn (insn
, bb
);
3821 bb
->flags
|= BB_DIRTY
;
3822 /* Should not happen as first in the BB is always
3823 either NOTE or LABEl. */
3824 if (bb
->head
== insn
3825 /* Avoid clobbering of structure when creating new BB. */
3826 && GET_CODE (insn
) != BARRIER
3827 && (GET_CODE (insn
) != NOTE
3828 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3832 PREV_INSN (before
) = insn
;
3833 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3834 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3837 /* Remove an insn from its doubly-linked list. This function knows how
3838 to handle sequences. */
3843 rtx next
= NEXT_INSN (insn
);
3844 rtx prev
= PREV_INSN (insn
);
3849 NEXT_INSN (prev
) = next
;
3850 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3852 rtx sequence
= PATTERN (prev
);
3853 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3856 else if (first_insn
== insn
)
3860 struct sequence_stack
*stack
= seq_stack
;
3861 /* Scan all pending sequences too. */
3862 for (; stack
; stack
= stack
->next
)
3863 if (insn
== stack
->first
)
3865 stack
->first
= next
;
3875 PREV_INSN (next
) = prev
;
3876 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3877 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3879 else if (last_insn
== insn
)
3883 struct sequence_stack
*stack
= seq_stack
;
3884 /* Scan all pending sequences too. */
3885 for (; stack
; stack
= stack
->next
)
3886 if (insn
== stack
->last
)
3895 if (GET_CODE (insn
) != BARRIER
3896 && (bb
= BLOCK_FOR_INSN (insn
)))
3899 bb
->flags
|= BB_DIRTY
;
3900 if (bb
->head
== insn
)
3902 /* Never ever delete the basic block note without deleting whole
3904 if (GET_CODE (insn
) == NOTE
)
3908 if (bb
->end
== insn
)
3913 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3916 add_function_usage_to (call_insn
, call_fusage
)
3917 rtx call_insn
, call_fusage
;
3919 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3922 /* Put the register usage information on the CALL. If there is already
3923 some usage information, put ours at the end. */
3924 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3928 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3929 link
= XEXP (link
, 1))
3932 XEXP (link
, 1) = call_fusage
;
3935 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3938 /* Delete all insns made since FROM.
3939 FROM becomes the new last instruction. */
3942 delete_insns_since (from
)
3948 NEXT_INSN (from
) = 0;
3952 /* This function is deprecated, please use sequences instead.
3954 Move a consecutive bunch of insns to a different place in the chain.
3955 The insns to be moved are those between FROM and TO.
3956 They are moved to a new position after the insn AFTER.
3957 AFTER must not be FROM or TO or any insn in between.
3959 This function does not know about SEQUENCEs and hence should not be
3960 called after delay-slot filling has been done. */
3963 reorder_insns_nobb (from
, to
, after
)
3964 rtx from
, to
, after
;
3966 /* Splice this bunch out of where it is now. */
3967 if (PREV_INSN (from
))
3968 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3970 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3971 if (last_insn
== to
)
3972 last_insn
= PREV_INSN (from
);
3973 if (first_insn
== from
)
3974 first_insn
= NEXT_INSN (to
);
3976 /* Make the new neighbors point to it and it to them. */
3977 if (NEXT_INSN (after
))
3978 PREV_INSN (NEXT_INSN (after
)) = to
;
3980 NEXT_INSN (to
) = NEXT_INSN (after
);
3981 PREV_INSN (from
) = after
;
3982 NEXT_INSN (after
) = from
;
3983 if (after
== last_insn
)
3987 /* Same as function above, but take care to update BB boundaries. */
3989 reorder_insns (from
, to
, after
)
3990 rtx from
, to
, after
;
3992 rtx prev
= PREV_INSN (from
);
3993 basic_block bb
, bb2
;
3995 reorder_insns_nobb (from
, to
, after
);
3997 if (GET_CODE (after
) != BARRIER
3998 && (bb
= BLOCK_FOR_INSN (after
)))
4001 bb
->flags
|= BB_DIRTY
;
4003 if (GET_CODE (from
) != BARRIER
4004 && (bb2
= BLOCK_FOR_INSN (from
)))
4008 bb2
->flags
|= BB_DIRTY
;
4011 if (bb
->end
== after
)
4014 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4015 set_block_for_insn (x
, bb
);
4019 /* Return the line note insn preceding INSN. */
4022 find_line_note (insn
)
4025 if (no_line_numbers
)
4028 for (; insn
; insn
= PREV_INSN (insn
))
4029 if (GET_CODE (insn
) == NOTE
4030 && NOTE_LINE_NUMBER (insn
) >= 0)
4036 /* Like reorder_insns, but inserts line notes to preserve the line numbers
4037 of the moved insns when debugging. This may insert a note between AFTER
4038 and FROM, and another one after TO. */
4041 reorder_insns_with_line_notes (from
, to
, after
)
4042 rtx from
, to
, after
;
4044 rtx from_line
= find_line_note (from
);
4045 rtx after_line
= find_line_note (after
);
4047 reorder_insns (from
, to
, after
);
4049 if (from_line
== after_line
)
4053 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4054 NOTE_LINE_NUMBER (from_line
),
4057 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4058 NOTE_LINE_NUMBER (after_line
),
4062 /* Remove unnecessary notes from the instruction stream. */
4065 remove_unnecessary_notes ()
4067 rtx block_stack
= NULL_RTX
;
4068 rtx eh_stack
= NULL_RTX
;
4073 /* We must not remove the first instruction in the function because
4074 the compiler depends on the first instruction being a note. */
4075 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
4077 /* Remember what's next. */
4078 next
= NEXT_INSN (insn
);
4080 /* We're only interested in notes. */
4081 if (GET_CODE (insn
) != NOTE
)
4084 switch (NOTE_LINE_NUMBER (insn
))
4086 case NOTE_INSN_DELETED
:
4087 case NOTE_INSN_LOOP_END_TOP_COND
:
4091 case NOTE_INSN_EH_REGION_BEG
:
4092 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
4095 case NOTE_INSN_EH_REGION_END
:
4096 /* Too many end notes. */
4097 if (eh_stack
== NULL_RTX
)
4099 /* Mismatched nesting. */
4100 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
4103 eh_stack
= XEXP (eh_stack
, 1);
4104 free_INSN_LIST_node (tmp
);
4107 case NOTE_INSN_BLOCK_BEG
:
4108 /* By now, all notes indicating lexical blocks should have
4109 NOTE_BLOCK filled in. */
4110 if (NOTE_BLOCK (insn
) == NULL_TREE
)
4112 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
4115 case NOTE_INSN_BLOCK_END
:
4116 /* Too many end notes. */
4117 if (block_stack
== NULL_RTX
)
4119 /* Mismatched nesting. */
4120 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
4123 block_stack
= XEXP (block_stack
, 1);
4124 free_INSN_LIST_node (tmp
);
4126 /* Scan back to see if there are any non-note instructions
4127 between INSN and the beginning of this block. If not,
4128 then there is no PC range in the generated code that will
4129 actually be in this block, so there's no point in
4130 remembering the existence of the block. */
4131 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
4133 /* This block contains a real instruction. Note that we
4134 don't include labels; if the only thing in the block
4135 is a label, then there are still no PC values that
4136 lie within the block. */
4140 /* We're only interested in NOTEs. */
4141 if (GET_CODE (tmp
) != NOTE
)
4144 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
4146 /* We just verified that this BLOCK matches us with
4147 the block_stack check above. Never delete the
4148 BLOCK for the outermost scope of the function; we
4149 can refer to names from that scope even if the
4150 block notes are messed up. */
4151 if (! is_body_block (NOTE_BLOCK (insn
))
4152 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
4159 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
4160 /* There's a nested block. We need to leave the
4161 current block in place since otherwise the debugger
4162 wouldn't be able to show symbols from our block in
4163 the nested block. */
4169 /* Too many begin notes. */
4170 if (block_stack
|| eh_stack
)
4175 /* Emit insn(s) of given code and pattern
4176 at a specified place within the doubly-linked list.
4178 All of the emit_foo global entry points accept an object
4179 X which is either an insn list or a PATTERN of a single
4182 There are thus a few canonical ways to generate code and
4183 emit it at a specific place in the instruction stream. For
4184 example, consider the instruction named SPOT and the fact that
4185 we would like to emit some instructions before SPOT. We might
4189 ... emit the new instructions ...
4190 insns_head = get_insns ();
4193 emit_insn_before (insns_head, SPOT);
4195 It used to be common to generate SEQUENCE rtl instead, but that
4196 is a relic of the past which no longer occurs. The reason is that
4197 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4198 generated would almost certainly die right after it was created. */
4200 /* Make X be output before the instruction BEFORE. */
4203 emit_insn_before (x
, before
)
4209 #ifdef ENABLE_RTL_CHECKING
4210 if (before
== NULL_RTX
)
4217 switch (GET_CODE (x
))
4228 rtx next
= NEXT_INSN (insn
);
4229 add_insn_before (insn
, before
);
4235 #ifdef ENABLE_RTL_CHECKING
4242 last
= make_insn_raw (x
);
4243 add_insn_before (last
, before
);
4250 /* Make an instruction with body X and code JUMP_INSN
4251 and output it before the instruction BEFORE. */
4254 emit_jump_insn_before (x
, before
)
4257 rtx insn
, last
= NULL_RTX
;
4259 #ifdef ENABLE_RTL_CHECKING
4260 if (before
== NULL_RTX
)
4264 switch (GET_CODE (x
))
4275 rtx next
= NEXT_INSN (insn
);
4276 add_insn_before (insn
, before
);
4282 #ifdef ENABLE_RTL_CHECKING
4289 last
= make_jump_insn_raw (x
);
4290 add_insn_before (last
, before
);
4297 /* Make an instruction with body X and code CALL_INSN
4298 and output it before the instruction BEFORE. */
4301 emit_call_insn_before (x
, before
)
4304 rtx last
= NULL_RTX
, insn
;
4306 #ifdef ENABLE_RTL_CHECKING
4307 if (before
== NULL_RTX
)
4311 switch (GET_CODE (x
))
4322 rtx next
= NEXT_INSN (insn
);
4323 add_insn_before (insn
, before
);
4329 #ifdef ENABLE_RTL_CHECKING
4336 last
= make_call_insn_raw (x
);
4337 add_insn_before (last
, before
);
4344 /* Make an insn of code BARRIER
4345 and output it before the insn BEFORE. */
4348 emit_barrier_before (before
)
4351 rtx insn
= rtx_alloc (BARRIER
);
4353 INSN_UID (insn
) = cur_insn_uid
++;
4355 add_insn_before (insn
, before
);
4359 /* Emit the label LABEL before the insn BEFORE. */
4362 emit_label_before (label
, before
)
4365 /* This can be called twice for the same label as a result of the
4366 confusion that follows a syntax error! So make it harmless. */
4367 if (INSN_UID (label
) == 0)
4369 INSN_UID (label
) = cur_insn_uid
++;
4370 add_insn_before (label
, before
);
4376 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4379 emit_note_before (subtype
, before
)
4383 rtx note
= rtx_alloc (NOTE
);
4384 INSN_UID (note
) = cur_insn_uid
++;
4385 NOTE_SOURCE_FILE (note
) = 0;
4386 NOTE_LINE_NUMBER (note
) = subtype
;
4387 BLOCK_FOR_INSN (note
) = NULL
;
4389 add_insn_before (note
, before
);
4393 /* Helper for emit_insn_after, handles lists of instructions
4396 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4399 emit_insn_after_1 (first
, after
)
4406 if (GET_CODE (after
) != BARRIER
4407 && (bb
= BLOCK_FOR_INSN (after
)))
4409 bb
->flags
|= BB_DIRTY
;
4410 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4411 if (GET_CODE (last
) != BARRIER
)
4412 set_block_for_insn (last
, bb
);
4413 if (GET_CODE (last
) != BARRIER
)
4414 set_block_for_insn (last
, bb
);
4415 if (bb
->end
== after
)
4419 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4422 after_after
= NEXT_INSN (after
);
4424 NEXT_INSN (after
) = first
;
4425 PREV_INSN (first
) = after
;
4426 NEXT_INSN (last
) = after_after
;
4428 PREV_INSN (after_after
) = last
;
4430 if (after
== last_insn
)
4435 /* Make X be output after the insn AFTER. */
4438 emit_insn_after (x
, after
)
4443 #ifdef ENABLE_RTL_CHECKING
4444 if (after
== NULL_RTX
)
4451 switch (GET_CODE (x
))
4459 last
= emit_insn_after_1 (x
, after
);
4462 #ifdef ENABLE_RTL_CHECKING
4469 last
= make_insn_raw (x
);
4470 add_insn_after (last
, after
);
4477 /* Similar to emit_insn_after, except that line notes are to be inserted so
4478 as to act as if this insn were at FROM. */
4481 emit_insn_after_with_line_notes (x
, after
, from
)
4484 rtx from_line
= find_line_note (from
);
4485 rtx after_line
= find_line_note (after
);
4486 rtx insn
= emit_insn_after (x
, after
);
4489 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4490 NOTE_LINE_NUMBER (from_line
),
4494 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4495 NOTE_LINE_NUMBER (after_line
),
4499 /* Make an insn of code JUMP_INSN with body X
4500 and output it after the insn AFTER. */
4503 emit_jump_insn_after (x
, after
)
4508 #ifdef ENABLE_RTL_CHECKING
4509 if (after
== NULL_RTX
)
4513 switch (GET_CODE (x
))
4521 last
= emit_insn_after_1 (x
, after
);
4524 #ifdef ENABLE_RTL_CHECKING
4531 last
= make_jump_insn_raw (x
);
4532 add_insn_after (last
, after
);
4539 /* Make an instruction with body X and code CALL_INSN
4540 and output it after the instruction AFTER. */
4543 emit_call_insn_after (x
, after
)
4548 #ifdef ENABLE_RTL_CHECKING
4549 if (after
== NULL_RTX
)
4553 switch (GET_CODE (x
))
4561 last
= emit_insn_after_1 (x
, after
);
4564 #ifdef ENABLE_RTL_CHECKING
4571 last
= make_call_insn_raw (x
);
4572 add_insn_after (last
, after
);
4579 /* Make an insn of code BARRIER
4580 and output it after the insn AFTER. */
4583 emit_barrier_after (after
)
4586 rtx insn
= rtx_alloc (BARRIER
);
4588 INSN_UID (insn
) = cur_insn_uid
++;
4590 add_insn_after (insn
, after
);
4594 /* Emit the label LABEL after the insn AFTER. */
4597 emit_label_after (label
, after
)
4600 /* This can be called twice for the same label
4601 as a result of the confusion that follows a syntax error!
4602 So make it harmless. */
4603 if (INSN_UID (label
) == 0)
4605 INSN_UID (label
) = cur_insn_uid
++;
4606 add_insn_after (label
, after
);
4612 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4615 emit_note_after (subtype
, after
)
4619 rtx note
= rtx_alloc (NOTE
);
4620 INSN_UID (note
) = cur_insn_uid
++;
4621 NOTE_SOURCE_FILE (note
) = 0;
4622 NOTE_LINE_NUMBER (note
) = subtype
;
4623 BLOCK_FOR_INSN (note
) = NULL
;
4624 add_insn_after (note
, after
);
4628 /* Emit a line note for FILE and LINE after the insn AFTER. */
4631 emit_line_note_after (file
, line
, after
)
4640 if (no_line_numbers
)
4646 note
= rtx_alloc (NOTE
);
4647 INSN_UID (note
) = cur_insn_uid
++;
4648 NOTE_SOURCE_FILE (note
) = file
;
4649 NOTE_LINE_NUMBER (note
) = line
;
4650 BLOCK_FOR_INSN (note
) = NULL
;
4651 add_insn_after (note
, after
);
4655 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4657 emit_insn_after_setloc (pattern
, after
, loc
)
4661 rtx last
= emit_insn_after (pattern
, after
);
4663 after
= NEXT_INSN (after
);
4666 if (active_insn_p (after
))
4667 INSN_LOCATOR (after
) = loc
;
4670 after
= NEXT_INSN (after
);
4675 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4677 emit_jump_insn_after_setloc (pattern
, after
, loc
)
4681 rtx last
= emit_jump_insn_after (pattern
, after
);
4683 after
= NEXT_INSN (after
);
4686 if (active_insn_p (after
))
4687 INSN_LOCATOR (after
) = loc
;
4690 after
= NEXT_INSN (after
);
4695 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4697 emit_call_insn_after_setloc (pattern
, after
, loc
)
4701 rtx last
= emit_call_insn_after (pattern
, after
);
4703 after
= NEXT_INSN (after
);
4706 if (active_insn_p (after
))
4707 INSN_LOCATOR (after
) = loc
;
4710 after
= NEXT_INSN (after
);
4715 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4717 emit_insn_before_setloc (pattern
, before
, loc
)
4718 rtx pattern
, before
;
4721 rtx first
= PREV_INSN (before
);
4722 rtx last
= emit_insn_before (pattern
, before
);
4724 first
= NEXT_INSN (first
);
4727 if (active_insn_p (first
))
4728 INSN_LOCATOR (first
) = loc
;
4731 first
= NEXT_INSN (first
);
4736 /* Take X and emit it at the end of the doubly-linked
4739 Returns the last insn emitted. */
4745 rtx last
= last_insn
;
4751 switch (GET_CODE (x
))
4762 rtx next
= NEXT_INSN (insn
);
4769 #ifdef ENABLE_RTL_CHECKING
4776 last
= make_insn_raw (x
);
4784 /* Make an insn of code JUMP_INSN with pattern X
4785 and add it to the end of the doubly-linked list. */
4791 rtx last
= NULL_RTX
, insn
;
4793 switch (GET_CODE (x
))
4804 rtx next
= NEXT_INSN (insn
);
4811 #ifdef ENABLE_RTL_CHECKING
4818 last
= make_jump_insn_raw (x
);
4826 /* Make an insn of code CALL_INSN with pattern X
4827 and add it to the end of the doubly-linked list. */
4835 switch (GET_CODE (x
))
4843 insn
= emit_insn (x
);
4846 #ifdef ENABLE_RTL_CHECKING
4853 insn
= make_call_insn_raw (x
);
4861 /* Add the label LABEL to the end of the doubly-linked list. */
4867 /* This can be called twice for the same label
4868 as a result of the confusion that follows a syntax error!
4869 So make it harmless. */
4870 if (INSN_UID (label
) == 0)
4872 INSN_UID (label
) = cur_insn_uid
++;
4878 /* Make an insn of code BARRIER
4879 and add it to the end of the doubly-linked list. */
4884 rtx barrier
= rtx_alloc (BARRIER
);
4885 INSN_UID (barrier
) = cur_insn_uid
++;
4890 /* Make an insn of code NOTE
4891 with data-fields specified by FILE and LINE
4892 and add it to the end of the doubly-linked list,
4893 but only if line-numbers are desired for debugging info. */
4896 emit_line_note (file
, line
)
4903 set_file_and_line_for_stmt (file
, line
);
4905 if (file
&& last_location
.file
&& !strcmp (file
, last_location
.file
)
4906 && line
== last_location
.line
)
4908 last_location
.file
= file
;
4909 last_location
.line
= line
;
4911 if (no_line_numbers
)
4917 return emit_note (file
, line
);
4920 /* Make an insn of code NOTE
4921 with data-fields specified by FILE and LINE
4922 and add it to the end of the doubly-linked list.
4923 If it is a line-number NOTE, omit it if it matches the previous one. */
4926 emit_note (file
, line
)
4932 note
= rtx_alloc (NOTE
);
4933 INSN_UID (note
) = cur_insn_uid
++;
4934 NOTE_SOURCE_FILE (note
) = file
;
4935 NOTE_LINE_NUMBER (note
) = line
;
4936 BLOCK_FOR_INSN (note
) = NULL
;
4941 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4944 emit_line_note_force (file
, line
)
4948 last_location
.line
= -1;
4949 return emit_line_note (file
, line
);
4952 /* Cause next statement to emit a line note even if the line number
4953 has not changed. This is used at the beginning of a function. */
4956 force_next_line_note ()
4958 last_location
.line
= -1;
4961 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4962 note of this type already exists, remove it first. */
4965 set_unique_reg_note (insn
, kind
, datum
)
4970 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4976 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4977 has multiple sets (some callers assume single_set
4978 means the insn only has one set, when in fact it
4979 means the insn only has one * useful * set). */
4980 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4987 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4988 It serves no useful purpose and breaks eliminate_regs. */
4989 if (GET_CODE (datum
) == ASM_OPERANDS
)
4999 XEXP (note
, 0) = datum
;
5003 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
5004 return REG_NOTES (insn
);
5007 /* Return an indication of which type of insn should have X as a body.
5008 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5014 if (GET_CODE (x
) == CODE_LABEL
)
5016 if (GET_CODE (x
) == CALL
)
5018 if (GET_CODE (x
) == RETURN
)
5020 if (GET_CODE (x
) == SET
)
5022 if (SET_DEST (x
) == pc_rtx
)
5024 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5029 if (GET_CODE (x
) == PARALLEL
)
5032 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5033 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5035 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5036 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5038 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5039 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5045 /* Emit the rtl pattern X as an appropriate kind of insn.
5046 If X is a label, it is simply added into the insn chain. */
5052 enum rtx_code code
= classify_insn (x
);
5054 if (code
== CODE_LABEL
)
5055 return emit_label (x
);
5056 else if (code
== INSN
)
5057 return emit_insn (x
);
5058 else if (code
== JUMP_INSN
)
5060 rtx insn
= emit_jump_insn (x
);
5061 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5062 return emit_barrier ();
5065 else if (code
== CALL_INSN
)
5066 return emit_call_insn (x
);
5071 /* Space for free sequence stack entries. */
5072 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
5074 /* Begin emitting insns to a sequence which can be packaged in an
5075 RTL_EXPR. If this sequence will contain something that might cause
5076 the compiler to pop arguments to function calls (because those
5077 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5078 details), use do_pending_stack_adjust before calling this function.
5079 That will ensure that the deferred pops are not accidentally
5080 emitted in the middle of this sequence. */
5085 struct sequence_stack
*tem
;
5087 if (free_sequence_stack
!= NULL
)
5089 tem
= free_sequence_stack
;
5090 free_sequence_stack
= tem
->next
;
5093 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
5095 tem
->next
= seq_stack
;
5096 tem
->first
= first_insn
;
5097 tem
->last
= last_insn
;
5098 tem
->sequence_rtl_expr
= seq_rtl_expr
;
5106 /* Similarly, but indicate that this sequence will be placed in T, an
5107 RTL_EXPR. See the documentation for start_sequence for more
5108 information about how to use this function. */
5111 start_sequence_for_rtl_expr (t
)
5119 /* Set up the insn chain starting with FIRST as the current sequence,
5120 saving the previously current one. See the documentation for
5121 start_sequence for more information about how to use this function. */
5124 push_to_sequence (first
)
5131 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
5137 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5140 push_to_full_sequence (first
, last
)
5146 /* We really should have the end of the insn chain here. */
5147 if (last
&& NEXT_INSN (last
))
5151 /* Set up the outer-level insn chain
5152 as the current sequence, saving the previously current one. */
5155 push_topmost_sequence ()
5157 struct sequence_stack
*stack
, *top
= NULL
;
5161 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5164 first_insn
= top
->first
;
5165 last_insn
= top
->last
;
5166 seq_rtl_expr
= top
->sequence_rtl_expr
;
5169 /* After emitting to the outer-level insn chain, update the outer-level
5170 insn chain, and restore the previous saved state. */
5173 pop_topmost_sequence ()
5175 struct sequence_stack
*stack
, *top
= NULL
;
5177 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5180 top
->first
= first_insn
;
5181 top
->last
= last_insn
;
5182 /* ??? Why don't we save seq_rtl_expr here? */
5187 /* After emitting to a sequence, restore previous saved state.
5189 To get the contents of the sequence just made, you must call
5190 `get_insns' *before* calling here.
5192 If the compiler might have deferred popping arguments while
5193 generating this sequence, and this sequence will not be immediately
5194 inserted into the instruction stream, use do_pending_stack_adjust
5195 before calling get_insns. That will ensure that the deferred
5196 pops are inserted into this sequence, and not into some random
5197 location in the instruction stream. See INHIBIT_DEFER_POP for more
5198 information about deferred popping of arguments. */
5203 struct sequence_stack
*tem
= seq_stack
;
5205 first_insn
= tem
->first
;
5206 last_insn
= tem
->last
;
5207 seq_rtl_expr
= tem
->sequence_rtl_expr
;
5208 seq_stack
= tem
->next
;
5210 memset (tem
, 0, sizeof (*tem
));
5211 tem
->next
= free_sequence_stack
;
5212 free_sequence_stack
= tem
;
5215 /* This works like end_sequence, but records the old sequence in FIRST
5219 end_full_sequence (first
, last
)
5222 *first
= first_insn
;
5227 /* Return 1 if currently emitting into a sequence. */
5232 return seq_stack
!= 0;
5235 /* Put the various virtual registers into REGNO_REG_RTX. */
5238 init_virtual_regs (es
)
5239 struct emit_status
*es
;
5241 rtx
*ptr
= es
->x_regno_reg_rtx
;
5242 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5243 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5244 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5245 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5246 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5250 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5251 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5252 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5253 static int copy_insn_n_scratches
;
5255 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5256 copied an ASM_OPERANDS.
5257 In that case, it is the original input-operand vector. */
5258 static rtvec orig_asm_operands_vector
;
5260 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5261 copied an ASM_OPERANDS.
5262 In that case, it is the copied input-operand vector. */
5263 static rtvec copy_asm_operands_vector
;
5265 /* Likewise for the constraints vector. */
5266 static rtvec orig_asm_constraints_vector
;
5267 static rtvec copy_asm_constraints_vector
;
5269 /* Recursively create a new copy of an rtx for copy_insn.
5270 This function differs from copy_rtx in that it handles SCRATCHes and
5271 ASM_OPERANDs properly.
5272 Normally, this function is not used directly; use copy_insn as front end.
5273 However, you could first copy an insn pattern with copy_insn and then use
5274 this function afterwards to properly copy any REG_NOTEs containing
5284 const char *format_ptr
;
5286 code
= GET_CODE (orig
);
5303 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5304 if (copy_insn_scratch_in
[i
] == orig
)
5305 return copy_insn_scratch_out
[i
];
5309 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5310 a LABEL_REF, it isn't sharable. */
5311 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5312 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5313 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5317 /* A MEM with a constant address is not sharable. The problem is that
5318 the constant address may need to be reloaded. If the mem is shared,
5319 then reloading one copy of this mem will cause all copies to appear
5320 to have been reloaded. */
5326 copy
= rtx_alloc (code
);
5328 /* Copy the various flags, and other information. We assume that
5329 all fields need copying, and then clear the fields that should
5330 not be copied. That is the sensible default behavior, and forces
5331 us to explicitly document why we are *not* copying a flag. */
5332 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5334 /* We do not copy the USED flag, which is used as a mark bit during
5335 walks over the RTL. */
5336 RTX_FLAG (copy
, used
) = 0;
5338 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5339 if (GET_RTX_CLASS (code
) == 'i')
5341 RTX_FLAG (copy
, jump
) = 0;
5342 RTX_FLAG (copy
, call
) = 0;
5343 RTX_FLAG (copy
, frame_related
) = 0;
5346 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5348 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5350 copy
->fld
[i
] = orig
->fld
[i
];
5351 switch (*format_ptr
++)
5354 if (XEXP (orig
, i
) != NULL
)
5355 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5360 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5361 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5362 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5363 XVEC (copy
, i
) = copy_asm_operands_vector
;
5364 else if (XVEC (orig
, i
) != NULL
)
5366 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5367 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5368 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5379 /* These are left unchanged. */
5387 if (code
== SCRATCH
)
5389 i
= copy_insn_n_scratches
++;
5390 if (i
>= MAX_RECOG_OPERANDS
)
5392 copy_insn_scratch_in
[i
] = orig
;
5393 copy_insn_scratch_out
[i
] = copy
;
5395 else if (code
== ASM_OPERANDS
)
5397 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5398 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5399 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5400 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5406 /* Create a new copy of an rtx.
5407 This function differs from copy_rtx in that it handles SCRATCHes and
5408 ASM_OPERANDs properly.
5409 INSN doesn't really have to be a full INSN; it could be just the
5415 copy_insn_n_scratches
= 0;
5416 orig_asm_operands_vector
= 0;
5417 orig_asm_constraints_vector
= 0;
5418 copy_asm_operands_vector
= 0;
5419 copy_asm_constraints_vector
= 0;
5420 return copy_insn_1 (insn
);
5423 /* Initialize data structures and variables in this file
5424 before generating rtl for each function. */
5429 struct function
*f
= cfun
;
5431 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5434 seq_rtl_expr
= NULL
;
5436 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5437 last_location
.line
= 0;
5438 last_location
.file
= 0;
5439 first_label_num
= label_num
;
5443 /* Init the tables that describe all the pseudo regs. */
5445 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5447 f
->emit
->regno_pointer_align
5448 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5449 * sizeof (unsigned char));
5452 = (rtx
*) ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5454 /* Put copies of all the hard registers into regno_reg_rtx. */
5455 memcpy (regno_reg_rtx
,
5456 static_regno_reg_rtx
,
5457 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5459 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5460 init_virtual_regs (f
->emit
);
5462 /* Indicate that the virtual registers and stack locations are
5464 REG_POINTER (stack_pointer_rtx
) = 1;
5465 REG_POINTER (frame_pointer_rtx
) = 1;
5466 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5467 REG_POINTER (arg_pointer_rtx
) = 1;
5469 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5470 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5471 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5472 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5473 REG_POINTER (virtual_cfa_rtx
) = 1;
5475 #ifdef STACK_BOUNDARY
5476 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5477 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5478 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5479 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5481 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5482 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5483 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5484 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5485 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5488 #ifdef INIT_EXPANDERS
5493 /* Generate the constant 0. */
5496 gen_const_vector_0 (mode
)
5497 enum machine_mode mode
;
5502 enum machine_mode inner
;
5504 units
= GET_MODE_NUNITS (mode
);
5505 inner
= GET_MODE_INNER (mode
);
5507 v
= rtvec_alloc (units
);
5509 /* We need to call this function after we to set CONST0_RTX first. */
5510 if (!CONST0_RTX (inner
))
5513 for (i
= 0; i
< units
; ++i
)
5514 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5516 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5520 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5521 all elements are zero. */
5523 gen_rtx_CONST_VECTOR (mode
, v
)
5524 enum machine_mode mode
;
5527 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5530 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5531 if (RTVEC_ELT (v
, i
) != inner_zero
)
5532 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5533 return CONST0_RTX (mode
);
5536 /* Create some permanent unique rtl objects shared between all functions.
5537 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5540 init_emit_once (line_numbers
)
5544 enum machine_mode mode
;
5545 enum machine_mode double_mode
;
5547 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5549 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5550 const_int_htab_eq
, NULL
);
5552 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5553 const_double_htab_eq
, NULL
);
5555 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5556 mem_attrs_htab_eq
, NULL
);
5557 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5558 reg_attrs_htab_eq
, NULL
);
5560 no_line_numbers
= ! line_numbers
;
5562 /* Compute the word and byte modes. */
5564 byte_mode
= VOIDmode
;
5565 word_mode
= VOIDmode
;
5566 double_mode
= VOIDmode
;
5568 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5569 mode
= GET_MODE_WIDER_MODE (mode
))
5571 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5572 && byte_mode
== VOIDmode
)
5575 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5576 && word_mode
== VOIDmode
)
5580 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5581 mode
= GET_MODE_WIDER_MODE (mode
))
5583 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5584 && double_mode
== VOIDmode
)
5588 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5590 /* Assign register numbers to the globally defined register rtx.
5591 This must be done at runtime because the register number field
5592 is in a union and some compilers can't initialize unions. */
5594 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5595 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5596 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5597 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5598 if (hard_frame_pointer_rtx
== 0)
5599 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5600 HARD_FRAME_POINTER_REGNUM
);
5601 if (arg_pointer_rtx
== 0)
5602 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5603 virtual_incoming_args_rtx
=
5604 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5605 virtual_stack_vars_rtx
=
5606 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5607 virtual_stack_dynamic_rtx
=
5608 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5609 virtual_outgoing_args_rtx
=
5610 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5611 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5613 /* Initialize RTL for commonly used hard registers. These are
5614 copied into regno_reg_rtx as we begin to compile each function. */
5615 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5616 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5618 #ifdef INIT_EXPANDERS
5619 /* This is to initialize {init|mark|free}_machine_status before the first
5620 call to push_function_context_to. This is needed by the Chill front
5621 end which calls push_function_context_to before the first call to
5622 init_function_start. */
5626 /* Create the unique rtx's for certain rtx codes and operand values. */
5628 /* Don't use gen_rtx here since gen_rtx in this case
5629 tries to use these variables. */
5630 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5631 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5632 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5634 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5635 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5636 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5638 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5640 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5641 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5642 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5643 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5644 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5646 dconsthalf
= dconst1
;
5649 for (i
= 0; i
<= 2; i
++)
5651 REAL_VALUE_TYPE
*r
=
5652 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5654 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5655 mode
= GET_MODE_WIDER_MODE (mode
))
5656 const_tiny_rtx
[i
][(int) mode
] =
5657 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5659 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5661 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5662 mode
= GET_MODE_WIDER_MODE (mode
))
5663 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5665 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5667 mode
= GET_MODE_WIDER_MODE (mode
))
5668 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5671 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5673 mode
= GET_MODE_WIDER_MODE (mode
))
5674 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5676 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5678 mode
= GET_MODE_WIDER_MODE (mode
))
5679 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5681 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5682 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5683 const_tiny_rtx
[0][i
] = const0_rtx
;
5685 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5686 if (STORE_FLAG_VALUE
== 1)
5687 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5689 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5690 return_address_pointer_rtx
5691 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5695 struct_value_rtx
= STRUCT_VALUE
;
5697 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5700 #ifdef STRUCT_VALUE_INCOMING
5701 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5703 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5704 struct_value_incoming_rtx
5705 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5707 struct_value_incoming_rtx
= struct_value_rtx
;
5711 #ifdef STATIC_CHAIN_REGNUM
5712 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5714 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5715 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5716 static_chain_incoming_rtx
5717 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5720 static_chain_incoming_rtx
= static_chain_rtx
;
5724 static_chain_rtx
= STATIC_CHAIN
;
5726 #ifdef STATIC_CHAIN_INCOMING
5727 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5729 static_chain_incoming_rtx
= static_chain_rtx
;
5733 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5734 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5737 /* Query and clear/ restore no_line_numbers. This is used by the
5738 switch / case handling in stmt.c to give proper line numbers in
5739 warnings about unreachable code. */
5742 force_line_numbers ()
5744 int old
= no_line_numbers
;
5746 no_line_numbers
= 0;
5748 force_next_line_note ();
5753 restore_line_number_status (old_value
)
5756 no_line_numbers
= old_value
;
5759 /* Produce exact duplicate of insn INSN after AFTER.
5760 Care updating of libcall regions if present. */
5763 emit_copy_of_insn_after (insn
, after
)
5767 rtx note1
, note2
, link
;
5769 switch (GET_CODE (insn
))
5772 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5776 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5780 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5781 if (CALL_INSN_FUNCTION_USAGE (insn
))
5782 CALL_INSN_FUNCTION_USAGE (new)
5783 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5784 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5785 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5792 /* Update LABEL_NUSES. */
5793 mark_jump_label (PATTERN (new), new, 0);
5795 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5797 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5799 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5800 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5802 if (GET_CODE (link
) == EXPR_LIST
)
5804 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5809 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5814 /* Fix the libcall sequences. */
5815 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5818 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5820 XEXP (note1
, 0) = p
;
5821 XEXP (note2
, 0) = new;
5823 INSN_CODE (new) = INSN_CODE (insn
);
5827 #include "gt-emit-rtl.h"