1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
114 REAL_VALUE_TYPE dconstm2
;
115 REAL_VALUE_TYPE dconsthalf
;
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
136 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
137 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
138 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
139 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
156 htab_t const_int_htab
;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
160 htab_t mem_attrs_htab
;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
164 htab_t reg_attrs_htab
;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
168 htab_t const_double_htab
;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw
PARAMS ((rtx
));
178 static rtx make_call_insn_raw
PARAMS ((rtx
));
179 static rtx find_line_note
PARAMS ((rtx
));
180 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
182 static void unshare_all_rtl_1
PARAMS ((rtx
));
183 static void unshare_all_decls
PARAMS ((tree
));
184 static void reset_used_decls
PARAMS ((tree
));
185 static void mark_label_nuses
PARAMS ((rtx
));
186 static hashval_t const_int_htab_hash
PARAMS ((const void *));
187 static int const_int_htab_eq
PARAMS ((const void *,
189 static hashval_t const_double_htab_hash
PARAMS ((const void *));
190 static int const_double_htab_eq
PARAMS ((const void *,
192 static rtx lookup_const_double
PARAMS ((rtx
));
193 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
194 static int mem_attrs_htab_eq
PARAMS ((const void *,
196 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
199 static hashval_t reg_attrs_htab_hash
PARAMS ((const void *));
200 static int reg_attrs_htab_eq
PARAMS ((const void *,
202 static reg_attrs
*get_reg_attrs
PARAMS ((tree
, int));
203 static tree component_ref_for_mem_expr
PARAMS ((tree
));
204 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
205 static rtx gen_complex_constant_part
PARAMS ((enum machine_mode
,
208 /* Probability of the conditional branch currently proceeded by try_split.
209 Set to -1 otherwise. */
210 int split_branch_probability
= -1;
212 /* Returns a hash code for X (which is a really a CONST_INT). */
215 const_int_htab_hash (x
)
218 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
221 /* Returns nonzero if the value represented by X (which is really a
222 CONST_INT) is the same as that given by Y (which is really a
226 const_int_htab_eq (x
, y
)
230 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
233 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
235 const_double_htab_hash (x
)
241 if (GET_MODE (value
) == VOIDmode
)
242 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
245 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
246 /* MODE is used in the comparison, so it should be in the hash. */
247 h
^= GET_MODE (value
);
252 /* Returns nonzero if the value represented by X (really a ...)
253 is the same as that represented by Y (really a ...) */
255 const_double_htab_eq (x
, y
)
259 rtx a
= (rtx
)x
, b
= (rtx
)y
;
261 if (GET_MODE (a
) != GET_MODE (b
))
263 if (GET_MODE (a
) == VOIDmode
)
264 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
265 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
267 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
268 CONST_DOUBLE_REAL_VALUE (b
));
271 /* Returns a hash code for X (which is a really a mem_attrs *). */
274 mem_attrs_htab_hash (x
)
277 mem_attrs
*p
= (mem_attrs
*) x
;
279 return (p
->alias
^ (p
->align
* 1000)
280 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
281 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
285 /* Returns nonzero if the value represented by X (which is really a
286 mem_attrs *) is the same as that given by Y (which is also really a
290 mem_attrs_htab_eq (x
, y
)
294 mem_attrs
*p
= (mem_attrs
*) x
;
295 mem_attrs
*q
= (mem_attrs
*) y
;
297 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
298 && p
->size
== q
->size
&& p
->align
== q
->align
);
301 /* Allocate a new mem_attrs structure and insert it into the hash table if
302 one identical to it is not already in the table. We are doing this for
306 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
312 enum machine_mode mode
;
317 /* If everything is the default, we can just return zero.
318 This must match what the corresponding MEM_* macros return when the
319 field is not present. */
320 if (alias
== 0 && expr
== 0 && offset
== 0
322 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
323 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
324 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
329 attrs
.offset
= offset
;
333 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
336 *slot
= ggc_alloc (sizeof (mem_attrs
));
337 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
343 /* Returns a hash code for X (which is a really a reg_attrs *). */
346 reg_attrs_htab_hash (x
)
349 reg_attrs
*p
= (reg_attrs
*) x
;
351 return ((p
->offset
* 1000) ^ (long) p
->decl
);
354 /* Returns nonzero if the value represented by X (which is really a
355 reg_attrs *) is the same as that given by Y (which is also really a
359 reg_attrs_htab_eq (x
, y
)
363 reg_attrs
*p
= (reg_attrs
*) x
;
364 reg_attrs
*q
= (reg_attrs
*) y
;
366 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
368 /* Allocate a new reg_attrs structure and insert it into the hash table if
369 one identical to it is not already in the table. We are doing this for
373 get_reg_attrs (decl
, offset
)
380 /* If everything is the default, we can just return zero. */
381 if (decl
== 0 && offset
== 0)
385 attrs
.offset
= offset
;
387 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
390 *slot
= ggc_alloc (sizeof (reg_attrs
));
391 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
397 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
398 don't attempt to share with the various global pieces of rtl (such as
399 frame_pointer_rtx). */
402 gen_raw_REG (mode
, regno
)
403 enum machine_mode mode
;
406 rtx x
= gen_rtx_raw_REG (mode
, regno
);
407 ORIGINAL_REGNO (x
) = regno
;
411 /* There are some RTL codes that require special attention; the generation
412 functions do the raw handling. If you add to this list, modify
413 special_rtx in gengenrtl.c as well. */
416 gen_rtx_CONST_INT (mode
, arg
)
417 enum machine_mode mode ATTRIBUTE_UNUSED
;
422 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
423 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
425 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
426 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
427 return const_true_rtx
;
430 /* Look up the CONST_INT in the hash table. */
431 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
432 (hashval_t
) arg
, INSERT
);
434 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
440 gen_int_mode (c
, mode
)
442 enum machine_mode mode
;
444 return GEN_INT (trunc_int_for_mode (c
, mode
));
447 /* CONST_DOUBLEs might be created from pairs of integers, or from
448 REAL_VALUE_TYPEs. Also, their length is known only at run time,
449 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
451 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
452 hash table. If so, return its counterpart; otherwise add it
453 to the hash table and return it. */
455 lookup_const_double (real
)
458 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
465 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
466 VALUE in mode MODE. */
468 const_double_from_real_value (value
, mode
)
469 REAL_VALUE_TYPE value
;
470 enum machine_mode mode
;
472 rtx real
= rtx_alloc (CONST_DOUBLE
);
473 PUT_MODE (real
, mode
);
475 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
477 return lookup_const_double (real
);
480 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
481 of ints: I0 is the low-order word and I1 is the high-order word.
482 Do not use this routine for non-integer modes; convert to
483 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
486 immed_double_const (i0
, i1
, mode
)
487 HOST_WIDE_INT i0
, i1
;
488 enum machine_mode mode
;
493 if (mode
!= VOIDmode
)
496 if (GET_MODE_CLASS (mode
) != MODE_INT
497 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
498 /* We can get a 0 for an error mark. */
499 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
500 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
503 /* We clear out all bits that don't belong in MODE, unless they and
504 our sign bit are all one. So we get either a reasonable negative
505 value or a reasonable unsigned value for this mode. */
506 width
= GET_MODE_BITSIZE (mode
);
507 if (width
< HOST_BITS_PER_WIDE_INT
508 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
509 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
510 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
511 else if (width
== HOST_BITS_PER_WIDE_INT
512 && ! (i1
== ~0 && i0
< 0))
514 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
515 /* We cannot represent this value as a constant. */
518 /* If this would be an entire word for the target, but is not for
519 the host, then sign-extend on the host so that the number will
520 look the same way on the host that it would on the target.
522 For example, when building a 64 bit alpha hosted 32 bit sparc
523 targeted compiler, then we want the 32 bit unsigned value -1 to be
524 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
525 The latter confuses the sparc backend. */
527 if (width
< HOST_BITS_PER_WIDE_INT
528 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
529 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
531 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
534 ??? Strictly speaking, this is wrong if we create a CONST_INT for
535 a large unsigned constant with the size of MODE being
536 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
537 in a wider mode. In that case we will mis-interpret it as a
540 Unfortunately, the only alternative is to make a CONST_DOUBLE for
541 any constant in any mode if it is an unsigned constant larger
542 than the maximum signed integer in an int on the host. However,
543 doing this will break everyone that always expects to see a
544 CONST_INT for SImode and smaller.
546 We have always been making CONST_INTs in this case, so nothing
547 new is being broken. */
549 if (width
<= HOST_BITS_PER_WIDE_INT
)
550 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
553 /* If this integer fits in one word, return a CONST_INT. */
554 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
557 /* We use VOIDmode for integers. */
558 value
= rtx_alloc (CONST_DOUBLE
);
559 PUT_MODE (value
, VOIDmode
);
561 CONST_DOUBLE_LOW (value
) = i0
;
562 CONST_DOUBLE_HIGH (value
) = i1
;
564 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
565 XWINT (value
, i
) = 0;
567 return lookup_const_double (value
);
571 gen_rtx_REG (mode
, regno
)
572 enum machine_mode mode
;
575 /* In case the MD file explicitly references the frame pointer, have
576 all such references point to the same frame pointer. This is
577 used during frame pointer elimination to distinguish the explicit
578 references to these registers from pseudos that happened to be
581 If we have eliminated the frame pointer or arg pointer, we will
582 be using it as a normal register, for example as a spill
583 register. In such cases, we might be accessing it in a mode that
584 is not Pmode and therefore cannot use the pre-allocated rtx.
586 Also don't do this when we are making new REGs in reload, since
587 we don't want to get confused with the real pointers. */
589 if (mode
== Pmode
&& !reload_in_progress
)
591 if (regno
== FRAME_POINTER_REGNUM
592 && (!reload_completed
|| frame_pointer_needed
))
593 return frame_pointer_rtx
;
594 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
595 if (regno
== HARD_FRAME_POINTER_REGNUM
596 && (!reload_completed
|| frame_pointer_needed
))
597 return hard_frame_pointer_rtx
;
599 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
600 if (regno
== ARG_POINTER_REGNUM
)
601 return arg_pointer_rtx
;
603 #ifdef RETURN_ADDRESS_POINTER_REGNUM
604 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
605 return return_address_pointer_rtx
;
607 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
608 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
609 return pic_offset_table_rtx
;
610 if (regno
== STACK_POINTER_REGNUM
)
611 return stack_pointer_rtx
;
615 /* If the per-function register table has been set up, try to re-use
616 an existing entry in that table to avoid useless generation of RTL.
618 This code is disabled for now until we can fix the various backends
619 which depend on having non-shared hard registers in some cases. Long
620 term we want to re-enable this code as it can significantly cut down
621 on the amount of useless RTL that gets generated.
623 We'll also need to fix some code that runs after reload that wants to
624 set ORIGINAL_REGNO. */
629 && regno
< FIRST_PSEUDO_REGISTER
630 && reg_raw_mode
[regno
] == mode
)
631 return regno_reg_rtx
[regno
];
634 return gen_raw_REG (mode
, regno
);
638 gen_rtx_MEM (mode
, addr
)
639 enum machine_mode mode
;
642 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
644 /* This field is not cleared by the mere allocation of the rtx, so
652 gen_rtx_SUBREG (mode
, reg
, offset
)
653 enum machine_mode mode
;
657 /* This is the most common failure type.
658 Catch it early so we can see who does it. */
659 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
662 /* This check isn't usable right now because combine will
663 throw arbitrary crap like a CALL into a SUBREG in
664 gen_lowpart_for_combine so we must just eat it. */
666 /* Check for this too. */
667 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
670 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
673 /* Generate a SUBREG representing the least-significant part of REG if MODE
674 is smaller than mode of REG, otherwise paradoxical SUBREG. */
677 gen_lowpart_SUBREG (mode
, reg
)
678 enum machine_mode mode
;
681 enum machine_mode inmode
;
683 inmode
= GET_MODE (reg
);
684 if (inmode
== VOIDmode
)
686 return gen_rtx_SUBREG (mode
, reg
,
687 subreg_lowpart_offset (mode
, inmode
));
690 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
692 ** This routine generates an RTX of the size specified by
693 ** <code>, which is an RTX code. The RTX structure is initialized
694 ** from the arguments <element1> through <elementn>, which are
695 ** interpreted according to the specific RTX type's format. The
696 ** special machine mode associated with the rtx (if any) is specified
699 ** gen_rtx can be invoked in a way which resembles the lisp-like
700 ** rtx it will generate. For example, the following rtx structure:
702 ** (plus:QI (mem:QI (reg:SI 1))
703 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
705 ** ...would be generated by the following C code:
707 ** gen_rtx (PLUS, QImode,
708 ** gen_rtx (MEM, QImode,
709 ** gen_rtx (REG, SImode, 1)),
710 ** gen_rtx (MEM, QImode,
711 ** gen_rtx (PLUS, SImode,
712 ** gen_rtx (REG, SImode, 2),
713 ** gen_rtx (REG, SImode, 3)))),
718 gen_rtx (enum rtx_code code
, enum machine_mode mode
, ...)
720 int i
; /* Array indices... */
721 const char *fmt
; /* Current rtx's format... */
722 rtx rt_val
; /* RTX to return to caller... */
730 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
735 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
736 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
738 rt_val
= immed_double_const (arg0
, arg1
, mode
);
743 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
747 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
751 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
752 rt_val
->mode
= mode
; /* Store the machine mode... */
754 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
755 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
759 case '0': /* Field with unknown use. Zero it. */
760 X0EXP (rt_val
, i
) = NULL_RTX
;
763 case 'i': /* An integer? */
764 XINT (rt_val
, i
) = va_arg (p
, int);
767 case 'w': /* A wide integer? */
768 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
771 case 's': /* A string? */
772 XSTR (rt_val
, i
) = va_arg (p
, char *);
775 case 'e': /* An expression? */
776 case 'u': /* An insn? Same except when printing. */
777 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
780 case 'E': /* An RTX vector? */
781 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
784 case 'b': /* A bitmap? */
785 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
788 case 't': /* A tree? */
789 XTREE (rt_val
, i
) = va_arg (p
, tree
);
803 /* gen_rtvec (n, [rt1, ..., rtn])
805 ** This routine creates an rtvec and stores within it the
806 ** pointers to rtx's which are its arguments.
811 gen_rtvec (int n
, ...)
820 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
822 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
824 for (i
= 0; i
< n
; i
++)
825 vector
[i
] = va_arg (p
, rtx
);
827 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
831 return gen_rtvec_v (save_n
, vector
);
835 gen_rtvec_v (n
, argp
)
843 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
845 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
847 for (i
= 0; i
< n
; i
++)
848 rt_val
->elem
[i
] = *argp
++;
853 /* Generate a REG rtx for a new pseudo register of mode MODE.
854 This pseudo is assigned the next sequential register number. */
858 enum machine_mode mode
;
860 struct function
*f
= cfun
;
863 /* Don't let anything called after initial flow analysis create new
868 if (generating_concat_p
869 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
870 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
872 /* For complex modes, don't make a single pseudo.
873 Instead, make a CONCAT of two pseudos.
874 This allows noncontiguous allocation of the real and imaginary parts,
875 which makes much better code. Besides, allocating DCmode
876 pseudos overstrains reload on some machines like the 386. */
877 rtx realpart
, imagpart
;
878 enum machine_mode partmode
= GET_MODE_INNER (mode
);
880 realpart
= gen_reg_rtx (partmode
);
881 imagpart
= gen_reg_rtx (partmode
);
882 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
885 /* Make sure regno_pointer_align, and regno_reg_rtx are large
886 enough to have an element for this pseudo reg number. */
888 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
890 int old_size
= f
->emit
->regno_pointer_align_length
;
894 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
895 memset (new + old_size
, 0, old_size
);
896 f
->emit
->regno_pointer_align
= (unsigned char *) new;
898 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
899 old_size
* 2 * sizeof (rtx
));
900 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
901 regno_reg_rtx
= new1
;
903 f
->emit
->regno_pointer_align_length
= old_size
* 2;
906 val
= gen_raw_REG (mode
, reg_rtx_no
);
907 regno_reg_rtx
[reg_rtx_no
++] = val
;
911 /* Generate an register with same attributes as REG,
912 but offsetted by OFFSET. */
915 gen_rtx_REG_offset (reg
, mode
, regno
, offset
)
916 enum machine_mode mode
;
921 rtx
new = gen_rtx_REG (mode
, regno
);
922 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
923 REG_OFFSET (reg
) + offset
);
927 /* Set the decl for MEM to DECL. */
930 set_reg_attrs_from_mem (reg
, mem
)
934 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
936 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
939 /* Set the register attributes for registers contained in PARM_RTX.
940 Use needed values from memory attributes of MEM. */
943 set_reg_attrs_for_parm (parm_rtx
, mem
)
947 if (GET_CODE (parm_rtx
) == REG
)
948 set_reg_attrs_from_mem (parm_rtx
, mem
);
949 else if (GET_CODE (parm_rtx
) == PARALLEL
)
951 /* Check for a NULL entry in the first slot, used to indicate that the
952 parameter goes both on the stack and in registers. */
953 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
954 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
956 rtx x
= XVECEXP (parm_rtx
, 0, i
);
957 if (GET_CODE (XEXP (x
, 0)) == REG
)
958 REG_ATTRS (XEXP (x
, 0))
959 = get_reg_attrs (MEM_EXPR (mem
),
960 INTVAL (XEXP (x
, 1)));
965 /* Assign the RTX X to declaration T. */
971 DECL_CHECK (t
)->decl
.rtl
= x
;
975 /* For register, we maitain the reverse information too. */
976 if (GET_CODE (x
) == REG
)
977 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
978 else if (GET_CODE (x
) == SUBREG
)
979 REG_ATTRS (SUBREG_REG (x
))
980 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
981 if (GET_CODE (x
) == CONCAT
)
983 if (REG_P (XEXP (x
, 0)))
984 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
985 if (REG_P (XEXP (x
, 1)))
986 REG_ATTRS (XEXP (x
, 1))
987 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
989 if (GET_CODE (x
) == PARALLEL
)
992 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
994 rtx y
= XVECEXP (x
, 0, i
);
995 if (REG_P (XEXP (y
, 0)))
996 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1001 /* Identify REG (which may be a CONCAT) as a user register. */
1007 if (GET_CODE (reg
) == CONCAT
)
1009 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1010 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1012 else if (GET_CODE (reg
) == REG
)
1013 REG_USERVAR_P (reg
) = 1;
1018 /* Identify REG as a probable pointer register and show its alignment
1019 as ALIGN, if nonzero. */
1022 mark_reg_pointer (reg
, align
)
1026 if (! REG_POINTER (reg
))
1028 REG_POINTER (reg
) = 1;
1031 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1033 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1034 /* We can no-longer be sure just how aligned this pointer is */
1035 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1038 /* Return 1 plus largest pseudo reg number used in the current function. */
1046 /* Return 1 + the largest label number used so far in the current function. */
1051 if (last_label_num
&& label_num
== base_label_num
)
1052 return last_label_num
;
1056 /* Return first label number used in this function (if any were used). */
1059 get_first_label_num ()
1061 return first_label_num
;
1064 /* Return the final regno of X, which is a SUBREG of a hard
1067 subreg_hard_regno (x
, check_mode
)
1071 enum machine_mode mode
= GET_MODE (x
);
1072 unsigned int byte_offset
, base_regno
, final_regno
;
1073 rtx reg
= SUBREG_REG (x
);
1075 /* This is where we attempt to catch illegal subregs
1076 created by the compiler. */
1077 if (GET_CODE (x
) != SUBREG
1078 || GET_CODE (reg
) != REG
)
1080 base_regno
= REGNO (reg
);
1081 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1083 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1085 #ifdef ENABLE_CHECKING
1086 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
1087 SUBREG_BYTE (x
), mode
))
1090 /* Catch non-congruent offsets too. */
1091 byte_offset
= SUBREG_BYTE (x
);
1092 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1095 final_regno
= subreg_regno (x
);
1100 /* Return a value representing some low-order bits of X, where the number
1101 of low-order bits is given by MODE. Note that no conversion is done
1102 between floating-point and fixed-point values, rather, the bit
1103 representation is returned.
1105 This function handles the cases in common between gen_lowpart, below,
1106 and two variants in cse.c and combine.c. These are the cases that can
1107 be safely handled at all points in the compilation.
1109 If this is not a case we can handle, return 0. */
1112 gen_lowpart_common (mode
, x
)
1113 enum machine_mode mode
;
1116 int msize
= GET_MODE_SIZE (mode
);
1117 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
1120 if (GET_MODE (x
) == mode
)
1123 /* MODE must occupy no more words than the mode of X. */
1124 if (GET_MODE (x
) != VOIDmode
1125 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1126 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
1129 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1130 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1131 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
1134 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
1136 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1137 && (GET_MODE_CLASS (mode
) == MODE_INT
1138 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1140 /* If we are getting the low-order part of something that has been
1141 sign- or zero-extended, we can either just use the object being
1142 extended or make a narrower extension. If we want an even smaller
1143 piece than the size of the object being extended, call ourselves
1146 This case is used mostly by combine and cse. */
1148 if (GET_MODE (XEXP (x
, 0)) == mode
)
1150 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1151 return gen_lowpart_common (mode
, XEXP (x
, 0));
1152 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
1153 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1155 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1156 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
1157 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
1158 else if ((GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
1159 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
)
1160 && GET_MODE (x
) == VOIDmode
)
1161 return simplify_gen_subreg (mode
, x
, int_mode_for_mode (mode
), offset
);
1162 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1163 from the low-order part of the constant. */
1164 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1165 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1166 && GET_MODE (x
) == VOIDmode
1167 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1169 /* If MODE is twice the host word size, X is already the desired
1170 representation. Otherwise, if MODE is wider than a word, we can't
1171 do this. If MODE is exactly a word, return just one CONST_INT. */
1173 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1175 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1177 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1178 return (GET_CODE (x
) == CONST_INT
? x
1179 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1182 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1183 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1184 : CONST_DOUBLE_LOW (x
));
1186 /* Sign extend to HOST_WIDE_INT. */
1187 val
= trunc_int_for_mode (val
, mode
);
1189 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1194 /* The floating-point emulator can handle all conversions between
1195 FP and integer operands. This simplifies reload because it
1196 doesn't have to deal with constructs like (subreg:DI
1197 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1198 /* Single-precision floats are always 32-bits and double-precision
1199 floats are always 64-bits. */
1201 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1202 && GET_MODE_BITSIZE (mode
) == 32
1203 && GET_CODE (x
) == CONST_INT
)
1206 long i
= INTVAL (x
);
1208 real_from_target (&r
, &i
, mode
);
1209 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1211 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1212 && GET_MODE_BITSIZE (mode
) == 64
1213 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1214 && GET_MODE (x
) == VOIDmode
)
1217 HOST_WIDE_INT low
, high
;
1220 if (GET_CODE (x
) == CONST_INT
)
1223 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1227 low
= CONST_DOUBLE_LOW (x
);
1228 high
= CONST_DOUBLE_HIGH (x
);
1231 if (HOST_BITS_PER_WIDE_INT
> 32)
1232 high
= low
>> 31 >> 1;
1234 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1236 if (WORDS_BIG_ENDIAN
)
1237 i
[0] = high
, i
[1] = low
;
1239 i
[0] = low
, i
[1] = high
;
1241 real_from_target (&r
, i
, mode
);
1242 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1244 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1245 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1246 && GET_CODE (x
) == CONST_DOUBLE
1247 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1250 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1251 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1253 /* Convert 'r' into an array of four 32-bit words in target word
1255 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1256 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1259 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1262 i
[3 - 3 * endian
] = 0;
1265 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1266 i
[2 - 2 * endian
] = 0;
1267 i
[3 - 2 * endian
] = 0;
1270 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1271 i
[3 - 3 * endian
] = 0;
1274 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1279 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1281 #if HOST_BITS_PER_WIDE_INT == 32
1282 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1284 if (HOST_BITS_PER_WIDE_INT
!= 64)
1287 return immed_double_const ((((unsigned long) i
[3 * endian
])
1288 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1289 (((unsigned long) i
[2 - endian
])
1290 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1294 /* If MODE is a condition code and X is a CONST_INT, the value of X
1295 must already have been "recognized" by the back-end, and we can
1296 assume that it is valid for this mode. */
1297 else if (GET_MODE_CLASS (mode
) == MODE_CC
1298 && GET_CODE (x
) == CONST_INT
)
1301 /* Otherwise, we can't do this. */
1305 /* Return the constant real or imaginary part (which has mode MODE)
1306 of a complex value X. The IMAGPART_P argument determines whether
1307 the real or complex component should be returned. This function
1308 returns NULL_RTX if the component isn't a constant. */
1311 gen_complex_constant_part (mode
, x
, imagpart_p
)
1312 enum machine_mode mode
;
1318 if (GET_CODE (x
) == MEM
1319 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1321 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1322 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1324 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1325 if (TREE_CODE (part
) == REAL_CST
1326 || TREE_CODE (part
) == INTEGER_CST
)
1327 return expand_expr (part
, NULL_RTX
, mode
, 0);
1333 /* Return the real part (which has mode MODE) of a complex value X.
1334 This always comes at the low address in memory. */
1337 gen_realpart (mode
, x
)
1338 enum machine_mode mode
;
1343 /* Handle complex constants. */
1344 part
= gen_complex_constant_part (mode
, x
, 0);
1345 if (part
!= NULL_RTX
)
1348 if (WORDS_BIG_ENDIAN
1349 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1351 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1353 ("can't access real part of complex value in hard register");
1354 else if (WORDS_BIG_ENDIAN
)
1355 return gen_highpart (mode
, x
);
1357 return gen_lowpart (mode
, x
);
1360 /* Return the imaginary part (which has mode MODE) of a complex value X.
1361 This always comes at the high address in memory. */
1364 gen_imagpart (mode
, x
)
1365 enum machine_mode mode
;
1370 /* Handle complex constants. */
1371 part
= gen_complex_constant_part (mode
, x
, 1);
1372 if (part
!= NULL_RTX
)
1375 if (WORDS_BIG_ENDIAN
)
1376 return gen_lowpart (mode
, x
);
1377 else if (! WORDS_BIG_ENDIAN
1378 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1380 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1382 ("can't access imaginary part of complex value in hard register");
1384 return gen_highpart (mode
, x
);
1387 /* Return 1 iff X, assumed to be a SUBREG,
1388 refers to the real part of the complex value in its containing reg.
1389 Complex values are always stored with the real part in the first word,
1390 regardless of WORDS_BIG_ENDIAN. */
1393 subreg_realpart_p (x
)
1396 if (GET_CODE (x
) != SUBREG
)
1399 return ((unsigned int) SUBREG_BYTE (x
)
1400 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1403 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1404 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1405 least-significant part of X.
1406 MODE specifies how big a part of X to return;
1407 it usually should not be larger than a word.
1408 If X is a MEM whose address is a QUEUED, the value may be so also. */
1411 gen_lowpart (mode
, x
)
1412 enum machine_mode mode
;
1415 rtx result
= gen_lowpart_common (mode
, x
);
1419 else if (GET_CODE (x
) == REG
)
1421 /* Must be a hard reg that's not valid in MODE. */
1422 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1427 else if (GET_CODE (x
) == MEM
)
1429 /* The only additional case we can do is MEM. */
1432 /* The following exposes the use of "x" to CSE. */
1433 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1434 && SCALAR_INT_MODE_P (GET_MODE (x
))
1435 && ! no_new_pseudos
)
1436 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1438 if (WORDS_BIG_ENDIAN
)
1439 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1440 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1442 if (BYTES_BIG_ENDIAN
)
1443 /* Adjust the address so that the address-after-the-data
1445 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1446 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1448 return adjust_address (x
, mode
, offset
);
1450 else if (GET_CODE (x
) == ADDRESSOF
)
1451 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1456 /* Like `gen_lowpart', but refer to the most significant part.
1457 This is used to access the imaginary part of a complex number. */
1460 gen_highpart (mode
, x
)
1461 enum machine_mode mode
;
1464 unsigned int msize
= GET_MODE_SIZE (mode
);
1467 /* This case loses if X is a subreg. To catch bugs early,
1468 complain if an invalid MODE is used even in other cases. */
1469 if (msize
> UNITS_PER_WORD
1470 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1473 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1474 subreg_highpart_offset (mode
, GET_MODE (x
)));
1476 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1477 the target if we have a MEM. gen_highpart must return a valid operand,
1478 emitting code if necessary to do so. */
1479 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1480 result
= validize_mem (result
);
1487 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1488 be VOIDmode constant. */
1490 gen_highpart_mode (outermode
, innermode
, exp
)
1491 enum machine_mode outermode
, innermode
;
1494 if (GET_MODE (exp
) != VOIDmode
)
1496 if (GET_MODE (exp
) != innermode
)
1498 return gen_highpart (outermode
, exp
);
1500 return simplify_gen_subreg (outermode
, exp
, innermode
,
1501 subreg_highpart_offset (outermode
, innermode
));
1504 /* Return offset in bytes to get OUTERMODE low part
1505 of the value in mode INNERMODE stored in memory in target format. */
1508 subreg_lowpart_offset (outermode
, innermode
)
1509 enum machine_mode outermode
, innermode
;
1511 unsigned int offset
= 0;
1512 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1516 if (WORDS_BIG_ENDIAN
)
1517 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1518 if (BYTES_BIG_ENDIAN
)
1519 offset
+= difference
% UNITS_PER_WORD
;
1525 /* Return offset in bytes to get OUTERMODE high part
1526 of the value in mode INNERMODE stored in memory in target format. */
1528 subreg_highpart_offset (outermode
, innermode
)
1529 enum machine_mode outermode
, innermode
;
1531 unsigned int offset
= 0;
1532 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1534 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1539 if (! WORDS_BIG_ENDIAN
)
1540 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1541 if (! BYTES_BIG_ENDIAN
)
1542 offset
+= difference
% UNITS_PER_WORD
;
1548 /* Return 1 iff X, assumed to be a SUBREG,
1549 refers to the least significant part of its containing reg.
1550 If X is not a SUBREG, always return 1 (it is its own low part!). */
1553 subreg_lowpart_p (x
)
1556 if (GET_CODE (x
) != SUBREG
)
1558 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1561 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1562 == SUBREG_BYTE (x
));
1566 /* Helper routine for all the constant cases of operand_subword.
1567 Some places invoke this directly. */
1570 constant_subword (op
, offset
, mode
)
1573 enum machine_mode mode
;
1575 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1578 /* If OP is already an integer word, return it. */
1579 if (GET_MODE_CLASS (mode
) == MODE_INT
1580 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1583 /* The output is some bits, the width of the target machine's word.
1584 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1586 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1587 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1588 && GET_MODE_BITSIZE (mode
) == 64
1589 && GET_CODE (op
) == CONST_DOUBLE
)
1594 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1595 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1597 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1598 which the words are written depends on the word endianness.
1599 ??? This is a potential portability problem and should
1600 be fixed at some point.
1602 We must exercise caution with the sign bit. By definition there
1603 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1604 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1605 So we explicitly mask and sign-extend as necessary. */
1606 if (BITS_PER_WORD
== 32)
1609 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1610 return GEN_INT (val
);
1612 #if HOST_BITS_PER_WIDE_INT >= 64
1613 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1615 val
= k
[! WORDS_BIG_ENDIAN
];
1616 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1617 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1618 return GEN_INT (val
);
1621 else if (BITS_PER_WORD
== 16)
1623 val
= k
[offset
>> 1];
1624 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1626 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1627 return GEN_INT (val
);
1632 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1633 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1634 && GET_MODE_BITSIZE (mode
) > 64
1635 && GET_CODE (op
) == CONST_DOUBLE
)
1640 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1641 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1643 if (BITS_PER_WORD
== 32)
1646 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1647 return GEN_INT (val
);
1649 #if HOST_BITS_PER_WIDE_INT >= 64
1650 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1652 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1653 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1654 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1655 return GEN_INT (val
);
1662 /* Single word float is a little harder, since single- and double-word
1663 values often do not have the same high-order bits. We have already
1664 verified that we want the only defined word of the single-word value. */
1665 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1666 && GET_MODE_BITSIZE (mode
) == 32
1667 && GET_CODE (op
) == CONST_DOUBLE
)
1672 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1673 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1675 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1677 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1679 if (BITS_PER_WORD
== 16)
1681 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1683 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1686 return GEN_INT (val
);
1689 /* The only remaining cases that we can handle are integers.
1690 Convert to proper endianness now since these cases need it.
1691 At this point, offset == 0 means the low-order word.
1693 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1694 in general. However, if OP is (const_int 0), we can just return
1697 if (op
== const0_rtx
)
1700 if (GET_MODE_CLASS (mode
) != MODE_INT
1701 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1702 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1705 if (WORDS_BIG_ENDIAN
)
1706 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1708 /* Find out which word on the host machine this value is in and get
1709 it from the constant. */
1710 val
= (offset
/ size_ratio
== 0
1711 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1712 : (GET_CODE (op
) == CONST_INT
1713 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1715 /* Get the value we want into the low bits of val. */
1716 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1717 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1719 val
= trunc_int_for_mode (val
, word_mode
);
1721 return GEN_INT (val
);
1724 /* Return subword OFFSET of operand OP.
1725 The word number, OFFSET, is interpreted as the word number starting
1726 at the low-order address. OFFSET 0 is the low-order word if not
1727 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1729 If we cannot extract the required word, we return zero. Otherwise,
1730 an rtx corresponding to the requested word will be returned.
1732 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1733 reload has completed, a valid address will always be returned. After
1734 reload, if a valid address cannot be returned, we return zero.
1736 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1737 it is the responsibility of the caller.
1739 MODE is the mode of OP in case it is a CONST_INT.
1741 ??? This is still rather broken for some cases. The problem for the
1742 moment is that all callers of this thing provide no 'goal mode' to
1743 tell us to work with. This exists because all callers were written
1744 in a word based SUBREG world.
1745 Now use of this function can be deprecated by simplify_subreg in most
1750 operand_subword (op
, offset
, validate_address
, mode
)
1752 unsigned int offset
;
1753 int validate_address
;
1754 enum machine_mode mode
;
1756 if (mode
== VOIDmode
)
1757 mode
= GET_MODE (op
);
1759 if (mode
== VOIDmode
)
1762 /* If OP is narrower than a word, fail. */
1764 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1767 /* If we want a word outside OP, return zero. */
1769 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1772 /* Form a new MEM at the requested address. */
1773 if (GET_CODE (op
) == MEM
)
1775 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1777 if (! validate_address
)
1780 else if (reload_completed
)
1782 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1786 return replace_equiv_address (new, XEXP (new, 0));
1789 /* Rest can be handled by simplify_subreg. */
1790 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1793 /* Similar to `operand_subword', but never return 0. If we can't extract
1794 the required subword, put OP into a register and try again. If that fails,
1795 abort. We always validate the address in this case.
1797 MODE is the mode of OP, in case it is CONST_INT. */
1800 operand_subword_force (op
, offset
, mode
)
1802 unsigned int offset
;
1803 enum machine_mode mode
;
1805 rtx result
= operand_subword (op
, offset
, 1, mode
);
1810 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1812 /* If this is a register which can not be accessed by words, copy it
1813 to a pseudo register. */
1814 if (GET_CODE (op
) == REG
)
1815 op
= copy_to_reg (op
);
1817 op
= force_reg (mode
, op
);
1820 result
= operand_subword (op
, offset
, 1, mode
);
1827 /* Given a compare instruction, swap the operands.
1828 A test instruction is changed into a compare of 0 against the operand. */
1831 reverse_comparison (insn
)
1834 rtx body
= PATTERN (insn
);
1837 if (GET_CODE (body
) == SET
)
1838 comp
= SET_SRC (body
);
1840 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1842 if (GET_CODE (comp
) == COMPARE
)
1844 rtx op0
= XEXP (comp
, 0);
1845 rtx op1
= XEXP (comp
, 1);
1846 XEXP (comp
, 0) = op1
;
1847 XEXP (comp
, 1) = op0
;
1851 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1852 CONST0_RTX (GET_MODE (comp
)), comp
);
1853 if (GET_CODE (body
) == SET
)
1854 SET_SRC (body
) = new;
1856 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1860 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1861 or (2) a component ref of something variable. Represent the later with
1862 a NULL expression. */
1865 component_ref_for_mem_expr (ref
)
1868 tree inner
= TREE_OPERAND (ref
, 0);
1870 if (TREE_CODE (inner
) == COMPONENT_REF
)
1871 inner
= component_ref_for_mem_expr (inner
);
1874 tree placeholder_ptr
= 0;
1876 /* Now remove any conversions: they don't change what the underlying
1877 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1878 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1879 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1880 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1881 || TREE_CODE (inner
) == SAVE_EXPR
1882 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1883 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1884 inner
= find_placeholder (inner
, &placeholder_ptr
);
1886 inner
= TREE_OPERAND (inner
, 0);
1888 if (! DECL_P (inner
))
1892 if (inner
== TREE_OPERAND (ref
, 0))
1895 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1896 TREE_OPERAND (ref
, 1));
1899 /* Given REF, a MEM, and T, either the type of X or the expression
1900 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1901 if we are making a new object of this type. BITPOS is nonzero if
1902 there is an offset outstanding on T that will be applied later. */
1905 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1909 HOST_WIDE_INT bitpos
;
1911 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1912 tree expr
= MEM_EXPR (ref
);
1913 rtx offset
= MEM_OFFSET (ref
);
1914 rtx size
= MEM_SIZE (ref
);
1915 unsigned int align
= MEM_ALIGN (ref
);
1916 HOST_WIDE_INT apply_bitpos
= 0;
1919 /* It can happen that type_for_mode was given a mode for which there
1920 is no language-level type. In which case it returns NULL, which
1925 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1927 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1928 wrong answer, as it assumes that DECL_RTL already has the right alias
1929 info. Callers should not set DECL_RTL until after the call to
1930 set_mem_attributes. */
1931 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1934 /* Get the alias set from the expression or type (perhaps using a
1935 front-end routine) and use it. */
1936 alias
= get_alias_set (t
);
1938 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1939 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1940 RTX_UNCHANGING_P (ref
)
1941 |= ((lang_hooks
.honor_readonly
1942 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1943 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1945 /* If we are making an object of this type, or if this is a DECL, we know
1946 that it is a scalar if the type is not an aggregate. */
1947 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1948 MEM_SCALAR_P (ref
) = 1;
1950 /* We can set the alignment from the type if we are making an object,
1951 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1952 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1953 align
= MAX (align
, TYPE_ALIGN (type
));
1955 /* If the size is known, we can set that. */
1956 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1957 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1959 /* If T is not a type, we may be able to deduce some more information about
1963 maybe_set_unchanging (ref
, t
);
1964 if (TREE_THIS_VOLATILE (t
))
1965 MEM_VOLATILE_P (ref
) = 1;
1967 /* Now remove any conversions: they don't change what the underlying
1968 object is. Likewise for SAVE_EXPR. */
1969 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1970 || TREE_CODE (t
) == NON_LVALUE_EXPR
1971 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1972 || TREE_CODE (t
) == SAVE_EXPR
)
1973 t
= TREE_OPERAND (t
, 0);
1975 /* If this expression can't be addressed (e.g., it contains a reference
1976 to a non-addressable field), show we don't change its alias set. */
1977 if (! can_address_p (t
))
1978 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1980 /* If this is a decl, set the attributes of the MEM from it. */
1984 offset
= const0_rtx
;
1985 apply_bitpos
= bitpos
;
1986 size
= (DECL_SIZE_UNIT (t
)
1987 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1988 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1989 align
= DECL_ALIGN (t
);
1992 /* If this is a constant, we know the alignment. */
1993 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1995 align
= TYPE_ALIGN (type
);
1996 #ifdef CONSTANT_ALIGNMENT
1997 align
= CONSTANT_ALIGNMENT (t
, align
);
2001 /* If this is a field reference and not a bit-field, record it. */
2002 /* ??? There is some information that can be gleened from bit-fields,
2003 such as the word offset in the structure that might be modified.
2004 But skip it for now. */
2005 else if (TREE_CODE (t
) == COMPONENT_REF
2006 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
2008 expr
= component_ref_for_mem_expr (t
);
2009 offset
= const0_rtx
;
2010 apply_bitpos
= bitpos
;
2011 /* ??? Any reason the field size would be different than
2012 the size we got from the type? */
2015 /* If this is an array reference, look for an outer field reference. */
2016 else if (TREE_CODE (t
) == ARRAY_REF
)
2018 tree off_tree
= size_zero_node
;
2022 tree index
= TREE_OPERAND (t
, 1);
2023 tree array
= TREE_OPERAND (t
, 0);
2024 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
2025 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
2026 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
2028 /* We assume all arrays have sizes that are a multiple of a byte.
2029 First subtract the lower bound, if any, in the type of the
2030 index, then convert to sizetype and multiply by the size of the
2032 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
2033 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
2036 /* If the index has a self-referential type, pass it to a
2037 WITH_RECORD_EXPR; if the component size is, pass our
2038 component to one. */
2039 if (CONTAINS_PLACEHOLDER_P (index
))
2040 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t
);
2041 if (CONTAINS_PLACEHOLDER_P (unit_size
))
2042 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
2046 = fold (build (PLUS_EXPR
, sizetype
,
2047 fold (build (MULT_EXPR
, sizetype
,
2051 t
= TREE_OPERAND (t
, 0);
2053 while (TREE_CODE (t
) == ARRAY_REF
);
2059 if (host_integerp (off_tree
, 1))
2061 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
2062 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
2063 align
= DECL_ALIGN (t
);
2064 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
2066 offset
= GEN_INT (ioff
);
2067 apply_bitpos
= bitpos
;
2070 else if (TREE_CODE (t
) == COMPONENT_REF
)
2072 expr
= component_ref_for_mem_expr (t
);
2073 if (host_integerp (off_tree
, 1))
2075 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
2076 apply_bitpos
= bitpos
;
2078 /* ??? Any reason the field size would be different than
2079 the size we got from the type? */
2081 else if (flag_argument_noalias
> 1
2082 && TREE_CODE (t
) == INDIRECT_REF
2083 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2090 /* If this is a Fortran indirect argument reference, record the
2092 else if (flag_argument_noalias
> 1
2093 && TREE_CODE (t
) == INDIRECT_REF
2094 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2101 /* If we modified OFFSET based on T, then subtract the outstanding
2102 bit position offset. Similarly, increase the size of the accessed
2103 object to contain the negative offset. */
2106 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
2108 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
2111 /* Now set the attributes we computed above. */
2113 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
2115 /* If this is already known to be a scalar or aggregate, we are done. */
2116 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
2119 /* If it is a reference into an aggregate, this is part of an aggregate.
2120 Otherwise we don't know. */
2121 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
2122 || TREE_CODE (t
) == ARRAY_RANGE_REF
2123 || TREE_CODE (t
) == BIT_FIELD_REF
)
2124 MEM_IN_STRUCT_P (ref
) = 1;
2128 set_mem_attributes (ref
, t
, objectp
)
2133 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2136 /* Set the decl for MEM to DECL. */
2139 set_mem_attrs_from_reg (mem
, reg
)
2144 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
2145 GEN_INT (REG_OFFSET (reg
)),
2146 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2149 /* Set the alias set of MEM to SET. */
2152 set_mem_alias_set (mem
, set
)
2156 #ifdef ENABLE_CHECKING
2157 /* If the new and old alias sets don't conflict, something is wrong. */
2158 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
2162 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
2163 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2167 /* Set the alignment of MEM to ALIGN bits. */
2170 set_mem_align (mem
, align
)
2174 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2175 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
2179 /* Set the expr for MEM to EXPR. */
2182 set_mem_expr (mem
, expr
)
2187 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
2188 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2191 /* Set the offset of MEM to OFFSET. */
2194 set_mem_offset (mem
, offset
)
2197 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2198 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
2202 /* Set the size of MEM to SIZE. */
2205 set_mem_size (mem
, size
)
2208 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2209 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
2213 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2214 and its address changed to ADDR. (VOIDmode means don't change the mode.
2215 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2216 returned memory location is required to be valid. The memory
2217 attributes are not changed. */
2220 change_address_1 (memref
, mode
, addr
, validate
)
2222 enum machine_mode mode
;
2228 if (GET_CODE (memref
) != MEM
)
2230 if (mode
== VOIDmode
)
2231 mode
= GET_MODE (memref
);
2233 addr
= XEXP (memref
, 0);
2237 if (reload_in_progress
|| reload_completed
)
2239 if (! memory_address_p (mode
, addr
))
2243 addr
= memory_address (mode
, addr
);
2246 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2249 new = gen_rtx_MEM (mode
, addr
);
2250 MEM_COPY_ATTRIBUTES (new, memref
);
2254 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2255 way we are changing MEMREF, so we only preserve the alias set. */
2258 change_address (memref
, mode
, addr
)
2260 enum machine_mode mode
;
2263 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
2264 enum machine_mode mmode
= GET_MODE (new);
2267 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
2268 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
2269 (mmode
== BLKmode
? BITS_PER_UNIT
2270 : GET_MODE_ALIGNMENT (mmode
)),
2276 /* Return a memory reference like MEMREF, but with its mode changed
2277 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2278 nonzero, the memory address is forced to be valid.
2279 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2280 and caller is responsible for adjusting MEMREF base register. */
2283 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2285 enum machine_mode mode
;
2286 HOST_WIDE_INT offset
;
2287 int validate
, adjust
;
2289 rtx addr
= XEXP (memref
, 0);
2291 rtx memoffset
= MEM_OFFSET (memref
);
2293 unsigned int memalign
= MEM_ALIGN (memref
);
2295 /* ??? Prefer to create garbage instead of creating shared rtl.
2296 This may happen even if offset is nonzero -- consider
2297 (plus (plus reg reg) const_int) -- so do this always. */
2298 addr
= copy_rtx (addr
);
2302 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2303 object, we can merge it into the LO_SUM. */
2304 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2306 && (unsigned HOST_WIDE_INT
) offset
2307 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2308 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2309 plus_constant (XEXP (addr
, 1), offset
));
2311 addr
= plus_constant (addr
, offset
);
2314 new = change_address_1 (memref
, mode
, addr
, validate
);
2316 /* Compute the new values of the memory attributes due to this adjustment.
2317 We add the offsets and update the alignment. */
2319 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2321 /* Compute the new alignment by taking the MIN of the alignment and the
2322 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2327 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2329 /* We can compute the size in a number of ways. */
2330 if (GET_MODE (new) != BLKmode
)
2331 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2332 else if (MEM_SIZE (memref
))
2333 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2335 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2336 memoffset
, size
, memalign
, GET_MODE (new));
2338 /* At some point, we should validate that this offset is within the object,
2339 if all the appropriate values are known. */
2343 /* Return a memory reference like MEMREF, but with its mode changed
2344 to MODE and its address changed to ADDR, which is assumed to be
2345 MEMREF offseted by OFFSET bytes. If VALIDATE is
2346 nonzero, the memory address is forced to be valid. */
2349 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2351 enum machine_mode mode
;
2353 HOST_WIDE_INT offset
;
2356 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2357 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2360 /* Return a memory reference like MEMREF, but whose address is changed by
2361 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2362 known to be in OFFSET (possibly 1). */
2365 offset_address (memref
, offset
, pow2
)
2368 unsigned HOST_WIDE_INT pow2
;
2370 rtx
new, addr
= XEXP (memref
, 0);
2372 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2374 /* At this point we don't know _why_ the address is invalid. It
2375 could have secondary memory refereces, multiplies or anything.
2377 However, if we did go and rearrange things, we can wind up not
2378 being able to recognize the magic around pic_offset_table_rtx.
2379 This stuff is fragile, and is yet another example of why it is
2380 bad to expose PIC machinery too early. */
2381 if (! memory_address_p (GET_MODE (memref
), new)
2382 && GET_CODE (addr
) == PLUS
2383 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2385 addr
= force_reg (GET_MODE (addr
), addr
);
2386 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2389 update_temp_slot_address (XEXP (memref
, 0), new);
2390 new = change_address_1 (memref
, VOIDmode
, new, 1);
2392 /* Update the alignment to reflect the offset. Reset the offset, which
2395 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2396 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2401 /* Return a memory reference like MEMREF, but with its address changed to
2402 ADDR. The caller is asserting that the actual piece of memory pointed
2403 to is the same, just the form of the address is being changed, such as
2404 by putting something into a register. */
2407 replace_equiv_address (memref
, addr
)
2411 /* change_address_1 copies the memory attribute structure without change
2412 and that's exactly what we want here. */
2413 update_temp_slot_address (XEXP (memref
, 0), addr
);
2414 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2417 /* Likewise, but the reference is not required to be valid. */
2420 replace_equiv_address_nv (memref
, addr
)
2424 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2427 /* Return a memory reference like MEMREF, but with its mode widened to
2428 MODE and offset by OFFSET. This would be used by targets that e.g.
2429 cannot issue QImode memory operations and have to use SImode memory
2430 operations plus masking logic. */
2433 widen_memory_access (memref
, mode
, offset
)
2435 enum machine_mode mode
;
2436 HOST_WIDE_INT offset
;
2438 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2439 tree expr
= MEM_EXPR (new);
2440 rtx memoffset
= MEM_OFFSET (new);
2441 unsigned int size
= GET_MODE_SIZE (mode
);
2443 /* If we don't know what offset we were at within the expression, then
2444 we can't know if we've overstepped the bounds. */
2450 if (TREE_CODE (expr
) == COMPONENT_REF
)
2452 tree field
= TREE_OPERAND (expr
, 1);
2454 if (! DECL_SIZE_UNIT (field
))
2460 /* Is the field at least as large as the access? If so, ok,
2461 otherwise strip back to the containing structure. */
2462 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2463 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2464 && INTVAL (memoffset
) >= 0)
2467 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2473 expr
= TREE_OPERAND (expr
, 0);
2474 memoffset
= (GEN_INT (INTVAL (memoffset
)
2475 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2476 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2479 /* Similarly for the decl. */
2480 else if (DECL_P (expr
)
2481 && DECL_SIZE_UNIT (expr
)
2482 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2483 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2484 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2488 /* The widened memory access overflows the expression, which means
2489 that it could alias another expression. Zap it. */
2496 memoffset
= NULL_RTX
;
2498 /* The widened memory may alias other stuff, so zap the alias set. */
2499 /* ??? Maybe use get_alias_set on any remaining expression. */
2501 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2502 MEM_ALIGN (new), mode
);
2507 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2512 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2513 NULL
, label_num
++, NULL
);
2516 /* For procedure integration. */
2518 /* Install new pointers to the first and last insns in the chain.
2519 Also, set cur_insn_uid to one higher than the last in use.
2520 Used for an inline-procedure after copying the insn chain. */
2523 set_new_first_and_last_insn (first
, last
)
2532 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2533 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2538 /* Set the range of label numbers found in the current function.
2539 This is used when belatedly compiling an inline function. */
2542 set_new_first_and_last_label_num (first
, last
)
2545 base_label_num
= label_num
;
2546 first_label_num
= first
;
2547 last_label_num
= last
;
2550 /* Set the last label number found in the current function.
2551 This is used when belatedly compiling an inline function. */
2554 set_new_last_label_num (last
)
2557 base_label_num
= label_num
;
2558 last_label_num
= last
;
2561 /* Restore all variables describing the current status from the structure *P.
2562 This is used after a nested function. */
2565 restore_emit_status (p
)
2566 struct function
*p ATTRIBUTE_UNUSED
;
2571 /* Go through all the RTL insn bodies and copy any invalid shared
2572 structure. This routine should only be called once. */
2575 unshare_all_rtl (fndecl
, insn
)
2581 /* Make sure that virtual parameters are not shared. */
2582 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2583 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2585 /* Make sure that virtual stack slots are not shared. */
2586 unshare_all_decls (DECL_INITIAL (fndecl
));
2588 /* Unshare just about everything else. */
2589 unshare_all_rtl_1 (insn
);
2591 /* Make sure the addresses of stack slots found outside the insn chain
2592 (such as, in DECL_RTL of a variable) are not shared
2593 with the insn chain.
2595 This special care is necessary when the stack slot MEM does not
2596 actually appear in the insn chain. If it does appear, its address
2597 is unshared from all else at that point. */
2598 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2601 /* Go through all the RTL insn bodies and copy any invalid shared
2602 structure, again. This is a fairly expensive thing to do so it
2603 should be done sparingly. */
2606 unshare_all_rtl_again (insn
)
2612 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2615 reset_used_flags (PATTERN (p
));
2616 reset_used_flags (REG_NOTES (p
));
2617 reset_used_flags (LOG_LINKS (p
));
2620 /* Make sure that virtual stack slots are not shared. */
2621 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2623 /* Make sure that virtual parameters are not shared. */
2624 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2625 reset_used_flags (DECL_RTL (decl
));
2627 reset_used_flags (stack_slot_list
);
2629 unshare_all_rtl (cfun
->decl
, insn
);
2632 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2633 Assumes the mark bits are cleared at entry. */
2636 unshare_all_rtl_1 (insn
)
2639 for (; insn
; insn
= NEXT_INSN (insn
))
2642 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2643 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2644 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2648 /* Go through all virtual stack slots of a function and copy any
2649 shared structure. */
2651 unshare_all_decls (blk
)
2656 /* Copy shared decls. */
2657 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2658 if (DECL_RTL_SET_P (t
))
2659 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2661 /* Now process sub-blocks. */
2662 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2663 unshare_all_decls (t
);
2666 /* Go through all virtual stack slots of a function and mark them as
2669 reset_used_decls (blk
)
2675 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2676 if (DECL_RTL_SET_P (t
))
2677 reset_used_flags (DECL_RTL (t
));
2679 /* Now process sub-blocks. */
2680 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2681 reset_used_decls (t
);
2684 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2685 placed in the result directly, rather than being copied. MAY_SHARE is
2686 either a MEM of an EXPR_LIST of MEMs. */
2689 copy_most_rtx (orig
, may_share
)
2696 const char *format_ptr
;
2698 if (orig
== may_share
2699 || (GET_CODE (may_share
) == EXPR_LIST
2700 && in_expr_list_p (may_share
, orig
)))
2703 code
= GET_CODE (orig
);
2721 copy
= rtx_alloc (code
);
2722 PUT_MODE (copy
, GET_MODE (orig
));
2723 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2724 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2725 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2726 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2727 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2729 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2731 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2733 switch (*format_ptr
++)
2736 XEXP (copy
, i
) = XEXP (orig
, i
);
2737 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2738 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2742 XEXP (copy
, i
) = XEXP (orig
, i
);
2747 XVEC (copy
, i
) = XVEC (orig
, i
);
2748 if (XVEC (orig
, i
) != NULL
)
2750 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2751 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2752 XVECEXP (copy
, i
, j
)
2753 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2758 XWINT (copy
, i
) = XWINT (orig
, i
);
2763 XINT (copy
, i
) = XINT (orig
, i
);
2767 XTREE (copy
, i
) = XTREE (orig
, i
);
2772 XSTR (copy
, i
) = XSTR (orig
, i
);
2776 /* Copy this through the wide int field; that's safest. */
2777 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2787 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2788 Recursively does the same for subexpressions. */
2791 copy_rtx_if_shared (orig
)
2797 const char *format_ptr
;
2803 code
= GET_CODE (x
);
2805 /* These types may be freely shared. */
2819 /* SCRATCH must be shared because they represent distinct values. */
2823 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2824 a LABEL_REF, it isn't sharable. */
2825 if (GET_CODE (XEXP (x
, 0)) == PLUS
2826 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2827 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2836 /* The chain of insns is not being copied. */
2840 /* A MEM is allowed to be shared if its address is constant.
2842 We used to allow sharing of MEMs which referenced
2843 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2844 that can lose. instantiate_virtual_regs will not unshare
2845 the MEMs, and combine may change the structure of the address
2846 because it looks safe and profitable in one context, but
2847 in some other context it creates unrecognizable RTL. */
2848 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2857 /* This rtx may not be shared. If it has already been seen,
2858 replace it with a copy of itself. */
2860 if (RTX_FLAG (x
, used
))
2864 copy
= rtx_alloc (code
);
2866 (sizeof (*copy
) - sizeof (copy
->fld
)
2867 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2871 RTX_FLAG (x
, used
) = 1;
2873 /* Now scan the subexpressions recursively.
2874 We can store any replaced subexpressions directly into X
2875 since we know X is not shared! Any vectors in X
2876 must be copied if X was copied. */
2878 format_ptr
= GET_RTX_FORMAT (code
);
2880 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2882 switch (*format_ptr
++)
2885 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2889 if (XVEC (x
, i
) != NULL
)
2892 int len
= XVECLEN (x
, i
);
2894 if (copied
&& len
> 0)
2895 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2896 for (j
= 0; j
< len
; j
++)
2897 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2905 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2906 to look for shared sub-parts. */
2909 reset_used_flags (x
)
2914 const char *format_ptr
;
2919 code
= GET_CODE (x
);
2921 /* These types may be freely shared so we needn't do any resetting
2943 /* The chain of insns is not being copied. */
2950 RTX_FLAG (x
, used
) = 0;
2952 format_ptr
= GET_RTX_FORMAT (code
);
2953 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2955 switch (*format_ptr
++)
2958 reset_used_flags (XEXP (x
, i
));
2962 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2963 reset_used_flags (XVECEXP (x
, i
, j
));
2969 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2970 Return X or the rtx for the pseudo reg the value of X was copied into.
2971 OTHER must be valid as a SET_DEST. */
2974 make_safe_from (x
, other
)
2978 switch (GET_CODE (other
))
2981 other
= SUBREG_REG (other
);
2983 case STRICT_LOW_PART
:
2986 other
= XEXP (other
, 0);
2992 if ((GET_CODE (other
) == MEM
2994 && GET_CODE (x
) != REG
2995 && GET_CODE (x
) != SUBREG
)
2996 || (GET_CODE (other
) == REG
2997 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2998 || reg_mentioned_p (other
, x
))))
3000 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3001 emit_move_insn (temp
, x
);
3007 /* Emission of insns (adding them to the doubly-linked list). */
3009 /* Return the first insn of the current sequence or current function. */
3017 /* Specify a new insn as the first in the chain. */
3020 set_first_insn (insn
)
3023 if (PREV_INSN (insn
) != 0)
3028 /* Return the last insn emitted in current sequence or current function. */
3036 /* Specify a new insn as the last in the chain. */
3039 set_last_insn (insn
)
3042 if (NEXT_INSN (insn
) != 0)
3047 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3050 get_last_insn_anywhere ()
3052 struct sequence_stack
*stack
;
3055 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3056 if (stack
->last
!= 0)
3061 /* Return the first nonnote insn emitted in current sequence or current
3062 function. This routine looks inside SEQUENCEs. */
3065 get_first_nonnote_insn ()
3067 rtx insn
= first_insn
;
3071 insn
= next_insn (insn
);
3072 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3079 /* Return the last nonnote insn emitted in current sequence or current
3080 function. This routine looks inside SEQUENCEs. */
3083 get_last_nonnote_insn ()
3085 rtx insn
= last_insn
;
3089 insn
= previous_insn (insn
);
3090 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3097 /* Return a number larger than any instruction's uid in this function. */
3102 return cur_insn_uid
;
3105 /* Renumber instructions so that no instruction UIDs are wasted. */
3108 renumber_insns (stream
)
3113 /* If we're not supposed to renumber instructions, don't. */
3114 if (!flag_renumber_insns
)
3117 /* If there aren't that many instructions, then it's not really
3118 worth renumbering them. */
3119 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
3124 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3127 fprintf (stream
, "Renumbering insn %d to %d\n",
3128 INSN_UID (insn
), cur_insn_uid
);
3129 INSN_UID (insn
) = cur_insn_uid
++;
3133 /* Return the next insn. If it is a SEQUENCE, return the first insn
3142 insn
= NEXT_INSN (insn
);
3143 if (insn
&& GET_CODE (insn
) == INSN
3144 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3145 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3151 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3155 previous_insn (insn
)
3160 insn
= PREV_INSN (insn
);
3161 if (insn
&& GET_CODE (insn
) == INSN
3162 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3163 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3169 /* Return the next insn after INSN that is not a NOTE. This routine does not
3170 look inside SEQUENCEs. */
3173 next_nonnote_insn (insn
)
3178 insn
= NEXT_INSN (insn
);
3179 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3186 /* Return the previous insn before INSN that is not a NOTE. This routine does
3187 not look inside SEQUENCEs. */
3190 prev_nonnote_insn (insn
)
3195 insn
= PREV_INSN (insn
);
3196 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3203 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3204 or 0, if there is none. This routine does not look inside
3208 next_real_insn (insn
)
3213 insn
= NEXT_INSN (insn
);
3214 if (insn
== 0 || GET_CODE (insn
) == INSN
3215 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3222 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3223 or 0, if there is none. This routine does not look inside
3227 prev_real_insn (insn
)
3232 insn
= PREV_INSN (insn
);
3233 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3234 || GET_CODE (insn
) == JUMP_INSN
)
3241 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3242 This routine does not look inside SEQUENCEs. */
3249 for (insn
= get_last_insn ();
3250 insn
&& GET_CODE (insn
) != CALL_INSN
;
3251 insn
= PREV_INSN (insn
))
3257 /* Find the next insn after INSN that really does something. This routine
3258 does not look inside SEQUENCEs. Until reload has completed, this is the
3259 same as next_real_insn. */
3262 active_insn_p (insn
)
3265 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3266 || (GET_CODE (insn
) == INSN
3267 && (! reload_completed
3268 || (GET_CODE (PATTERN (insn
)) != USE
3269 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3273 next_active_insn (insn
)
3278 insn
= NEXT_INSN (insn
);
3279 if (insn
== 0 || active_insn_p (insn
))
3286 /* Find the last insn before INSN that really does something. This routine
3287 does not look inside SEQUENCEs. Until reload has completed, this is the
3288 same as prev_real_insn. */
3291 prev_active_insn (insn
)
3296 insn
= PREV_INSN (insn
);
3297 if (insn
== 0 || active_insn_p (insn
))
3304 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3312 insn
= NEXT_INSN (insn
);
3313 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3320 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3328 insn
= PREV_INSN (insn
);
3329 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3337 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3338 and REG_CC_USER notes so we can find it. */
3341 link_cc0_insns (insn
)
3344 rtx user
= next_nonnote_insn (insn
);
3346 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3347 user
= XVECEXP (PATTERN (user
), 0, 0);
3349 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3351 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3354 /* Return the next insn that uses CC0 after INSN, which is assumed to
3355 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3356 applied to the result of this function should yield INSN).
3358 Normally, this is simply the next insn. However, if a REG_CC_USER note
3359 is present, it contains the insn that uses CC0.
3361 Return 0 if we can't find the insn. */
3364 next_cc0_user (insn
)
3367 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3370 return XEXP (note
, 0);
3372 insn
= next_nonnote_insn (insn
);
3373 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3374 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3376 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3382 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3383 note, it is the previous insn. */
3386 prev_cc0_setter (insn
)
3389 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3392 return XEXP (note
, 0);
3394 insn
= prev_nonnote_insn (insn
);
3395 if (! sets_cc0_p (PATTERN (insn
)))
3402 /* Increment the label uses for all labels present in rtx. */
3405 mark_label_nuses (x
)
3412 code
= GET_CODE (x
);
3413 if (code
== LABEL_REF
)
3414 LABEL_NUSES (XEXP (x
, 0))++;
3416 fmt
= GET_RTX_FORMAT (code
);
3417 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3420 mark_label_nuses (XEXP (x
, i
));
3421 else if (fmt
[i
] == 'E')
3422 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3423 mark_label_nuses (XVECEXP (x
, i
, j
));
3428 /* Try splitting insns that can be split for better scheduling.
3429 PAT is the pattern which might split.
3430 TRIAL is the insn providing PAT.
3431 LAST is nonzero if we should return the last insn of the sequence produced.
3433 If this routine succeeds in splitting, it returns the first or last
3434 replacement insn depending on the value of LAST. Otherwise, it
3435 returns TRIAL. If the insn to be returned can be split, it will be. */
3438 try_split (pat
, trial
, last
)
3442 rtx before
= PREV_INSN (trial
);
3443 rtx after
= NEXT_INSN (trial
);
3444 int has_barrier
= 0;
3448 rtx insn_last
, insn
;
3451 if (any_condjump_p (trial
)
3452 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3453 split_branch_probability
= INTVAL (XEXP (note
, 0));
3454 probability
= split_branch_probability
;
3456 seq
= split_insns (pat
, trial
);
3458 split_branch_probability
= -1;
3460 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3461 We may need to handle this specially. */
3462 if (after
&& GET_CODE (after
) == BARRIER
)
3465 after
= NEXT_INSN (after
);
3471 /* Avoid infinite loop if any insn of the result matches
3472 the original pattern. */
3476 if (INSN_P (insn_last
)
3477 && rtx_equal_p (PATTERN (insn_last
), pat
))
3479 if (!NEXT_INSN (insn_last
))
3481 insn_last
= NEXT_INSN (insn_last
);
3485 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3487 if (GET_CODE (insn
) == JUMP_INSN
)
3489 mark_jump_label (PATTERN (insn
), insn
, 0);
3491 if (probability
!= -1
3492 && any_condjump_p (insn
)
3493 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3495 /* We can preserve the REG_BR_PROB notes only if exactly
3496 one jump is created, otherwise the machine description
3497 is responsible for this step using
3498 split_branch_probability variable. */
3502 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3503 GEN_INT (probability
),
3509 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3510 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3511 if (GET_CODE (trial
) == CALL_INSN
)
3513 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3514 if (GET_CODE (insn
) == CALL_INSN
)
3516 CALL_INSN_FUNCTION_USAGE (insn
)
3517 = CALL_INSN_FUNCTION_USAGE (trial
);
3518 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3522 /* Copy notes, particularly those related to the CFG. */
3523 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3525 switch (REG_NOTE_KIND (note
))
3529 while (insn
!= NULL_RTX
)
3531 if (GET_CODE (insn
) == CALL_INSN
3532 || (flag_non_call_exceptions
3533 && may_trap_p (PATTERN (insn
))))
3535 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3538 insn
= PREV_INSN (insn
);
3544 case REG_ALWAYS_RETURN
:
3546 while (insn
!= NULL_RTX
)
3548 if (GET_CODE (insn
) == CALL_INSN
)
3550 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3553 insn
= PREV_INSN (insn
);
3557 case REG_NON_LOCAL_GOTO
:
3559 while (insn
!= NULL_RTX
)
3561 if (GET_CODE (insn
) == JUMP_INSN
)
3563 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3566 insn
= PREV_INSN (insn
);
3575 /* If there are LABELS inside the split insns increment the
3576 usage count so we don't delete the label. */
3577 if (GET_CODE (trial
) == INSN
)
3580 while (insn
!= NULL_RTX
)
3582 if (GET_CODE (insn
) == INSN
)
3583 mark_label_nuses (PATTERN (insn
));
3585 insn
= PREV_INSN (insn
);
3589 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3591 delete_insn (trial
);
3593 emit_barrier_after (tem
);
3595 /* Recursively call try_split for each new insn created; by the
3596 time control returns here that insn will be fully split, so
3597 set LAST and continue from the insn after the one returned.
3598 We can't use next_active_insn here since AFTER may be a note.
3599 Ignore deleted insns, which can be occur if not optimizing. */
3600 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3601 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3602 tem
= try_split (PATTERN (tem
), tem
, 1);
3604 /* Return either the first or the last insn, depending on which was
3607 ? (after
? PREV_INSN (after
) : last_insn
)
3608 : NEXT_INSN (before
);
3611 /* Make and return an INSN rtx, initializing all its slots.
3612 Store PATTERN in the pattern slots. */
3615 make_insn_raw (pattern
)
3620 insn
= rtx_alloc (INSN
);
3622 INSN_UID (insn
) = cur_insn_uid
++;
3623 PATTERN (insn
) = pattern
;
3624 INSN_CODE (insn
) = -1;
3625 LOG_LINKS (insn
) = NULL
;
3626 REG_NOTES (insn
) = NULL
;
3627 INSN_LOCATOR (insn
) = 0;
3628 BLOCK_FOR_INSN (insn
) = NULL
;
3630 #ifdef ENABLE_RTL_CHECKING
3633 && (returnjump_p (insn
)
3634 || (GET_CODE (insn
) == SET
3635 && SET_DEST (insn
) == pc_rtx
)))
3637 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3645 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3648 make_jump_insn_raw (pattern
)
3653 insn
= rtx_alloc (JUMP_INSN
);
3654 INSN_UID (insn
) = cur_insn_uid
++;
3656 PATTERN (insn
) = pattern
;
3657 INSN_CODE (insn
) = -1;
3658 LOG_LINKS (insn
) = NULL
;
3659 REG_NOTES (insn
) = NULL
;
3660 JUMP_LABEL (insn
) = NULL
;
3661 INSN_LOCATOR (insn
) = 0;
3662 BLOCK_FOR_INSN (insn
) = NULL
;
3667 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3670 make_call_insn_raw (pattern
)
3675 insn
= rtx_alloc (CALL_INSN
);
3676 INSN_UID (insn
) = cur_insn_uid
++;
3678 PATTERN (insn
) = pattern
;
3679 INSN_CODE (insn
) = -1;
3680 LOG_LINKS (insn
) = NULL
;
3681 REG_NOTES (insn
) = NULL
;
3682 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3683 INSN_LOCATOR (insn
) = 0;
3684 BLOCK_FOR_INSN (insn
) = NULL
;
3689 /* Add INSN to the end of the doubly-linked list.
3690 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3696 PREV_INSN (insn
) = last_insn
;
3697 NEXT_INSN (insn
) = 0;
3699 if (NULL
!= last_insn
)
3700 NEXT_INSN (last_insn
) = insn
;
3702 if (NULL
== first_insn
)
3708 /* Add INSN into the doubly-linked list after insn AFTER. This and
3709 the next should be the only functions called to insert an insn once
3710 delay slots have been filled since only they know how to update a
3714 add_insn_after (insn
, after
)
3717 rtx next
= NEXT_INSN (after
);
3720 if (optimize
&& INSN_DELETED_P (after
))
3723 NEXT_INSN (insn
) = next
;
3724 PREV_INSN (insn
) = after
;
3728 PREV_INSN (next
) = insn
;
3729 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3730 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3732 else if (last_insn
== after
)
3736 struct sequence_stack
*stack
= seq_stack
;
3737 /* Scan all pending sequences too. */
3738 for (; stack
; stack
= stack
->next
)
3739 if (after
== stack
->last
)
3749 if (GET_CODE (after
) != BARRIER
3750 && GET_CODE (insn
) != BARRIER
3751 && (bb
= BLOCK_FOR_INSN (after
)))
3753 set_block_for_insn (insn
, bb
);
3755 bb
->flags
|= BB_DIRTY
;
3756 /* Should not happen as first in the BB is always
3757 either NOTE or LABEL. */
3758 if (bb
->end
== after
3759 /* Avoid clobbering of structure when creating new BB. */
3760 && GET_CODE (insn
) != BARRIER
3761 && (GET_CODE (insn
) != NOTE
3762 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3766 NEXT_INSN (after
) = insn
;
3767 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3769 rtx sequence
= PATTERN (after
);
3770 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3774 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3775 the previous should be the only functions called to insert an insn once
3776 delay slots have been filled since only they know how to update a
3780 add_insn_before (insn
, before
)
3783 rtx prev
= PREV_INSN (before
);
3786 if (optimize
&& INSN_DELETED_P (before
))
3789 PREV_INSN (insn
) = prev
;
3790 NEXT_INSN (insn
) = before
;
3794 NEXT_INSN (prev
) = insn
;
3795 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3797 rtx sequence
= PATTERN (prev
);
3798 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3801 else if (first_insn
== before
)
3805 struct sequence_stack
*stack
= seq_stack
;
3806 /* Scan all pending sequences too. */
3807 for (; stack
; stack
= stack
->next
)
3808 if (before
== stack
->first
)
3810 stack
->first
= insn
;
3818 if (GET_CODE (before
) != BARRIER
3819 && GET_CODE (insn
) != BARRIER
3820 && (bb
= BLOCK_FOR_INSN (before
)))
3822 set_block_for_insn (insn
, bb
);
3824 bb
->flags
|= BB_DIRTY
;
3825 /* Should not happen as first in the BB is always
3826 either NOTE or LABEl. */
3827 if (bb
->head
== insn
3828 /* Avoid clobbering of structure when creating new BB. */
3829 && GET_CODE (insn
) != BARRIER
3830 && (GET_CODE (insn
) != NOTE
3831 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3835 PREV_INSN (before
) = insn
;
3836 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3837 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3840 /* Remove an insn from its doubly-linked list. This function knows how
3841 to handle sequences. */
3846 rtx next
= NEXT_INSN (insn
);
3847 rtx prev
= PREV_INSN (insn
);
3852 NEXT_INSN (prev
) = next
;
3853 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3855 rtx sequence
= PATTERN (prev
);
3856 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3859 else if (first_insn
== insn
)
3863 struct sequence_stack
*stack
= seq_stack
;
3864 /* Scan all pending sequences too. */
3865 for (; stack
; stack
= stack
->next
)
3866 if (insn
== stack
->first
)
3868 stack
->first
= next
;
3878 PREV_INSN (next
) = prev
;
3879 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3880 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3882 else if (last_insn
== insn
)
3886 struct sequence_stack
*stack
= seq_stack
;
3887 /* Scan all pending sequences too. */
3888 for (; stack
; stack
= stack
->next
)
3889 if (insn
== stack
->last
)
3898 if (GET_CODE (insn
) != BARRIER
3899 && (bb
= BLOCK_FOR_INSN (insn
)))
3902 bb
->flags
|= BB_DIRTY
;
3903 if (bb
->head
== insn
)
3905 /* Never ever delete the basic block note without deleting whole
3907 if (GET_CODE (insn
) == NOTE
)
3911 if (bb
->end
== insn
)
3916 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3919 add_function_usage_to (call_insn
, call_fusage
)
3920 rtx call_insn
, call_fusage
;
3922 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3925 /* Put the register usage information on the CALL. If there is already
3926 some usage information, put ours at the end. */
3927 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3931 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3932 link
= XEXP (link
, 1))
3935 XEXP (link
, 1) = call_fusage
;
3938 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3941 /* Delete all insns made since FROM.
3942 FROM becomes the new last instruction. */
3945 delete_insns_since (from
)
3951 NEXT_INSN (from
) = 0;
3955 /* This function is deprecated, please use sequences instead.
3957 Move a consecutive bunch of insns to a different place in the chain.
3958 The insns to be moved are those between FROM and TO.
3959 They are moved to a new position after the insn AFTER.
3960 AFTER must not be FROM or TO or any insn in between.
3962 This function does not know about SEQUENCEs and hence should not be
3963 called after delay-slot filling has been done. */
3966 reorder_insns_nobb (from
, to
, after
)
3967 rtx from
, to
, after
;
3969 /* Splice this bunch out of where it is now. */
3970 if (PREV_INSN (from
))
3971 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3973 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3974 if (last_insn
== to
)
3975 last_insn
= PREV_INSN (from
);
3976 if (first_insn
== from
)
3977 first_insn
= NEXT_INSN (to
);
3979 /* Make the new neighbors point to it and it to them. */
3980 if (NEXT_INSN (after
))
3981 PREV_INSN (NEXT_INSN (after
)) = to
;
3983 NEXT_INSN (to
) = NEXT_INSN (after
);
3984 PREV_INSN (from
) = after
;
3985 NEXT_INSN (after
) = from
;
3986 if (after
== last_insn
)
3990 /* Same as function above, but take care to update BB boundaries. */
3992 reorder_insns (from
, to
, after
)
3993 rtx from
, to
, after
;
3995 rtx prev
= PREV_INSN (from
);
3996 basic_block bb
, bb2
;
3998 reorder_insns_nobb (from
, to
, after
);
4000 if (GET_CODE (after
) != BARRIER
4001 && (bb
= BLOCK_FOR_INSN (after
)))
4004 bb
->flags
|= BB_DIRTY
;
4006 if (GET_CODE (from
) != BARRIER
4007 && (bb2
= BLOCK_FOR_INSN (from
)))
4011 bb2
->flags
|= BB_DIRTY
;
4014 if (bb
->end
== after
)
4017 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4018 set_block_for_insn (x
, bb
);
4022 /* Return the line note insn preceding INSN. */
4025 find_line_note (insn
)
4028 if (no_line_numbers
)
4031 for (; insn
; insn
= PREV_INSN (insn
))
4032 if (GET_CODE (insn
) == NOTE
4033 && NOTE_LINE_NUMBER (insn
) >= 0)
4039 /* Like reorder_insns, but inserts line notes to preserve the line numbers
4040 of the moved insns when debugging. This may insert a note between AFTER
4041 and FROM, and another one after TO. */
4044 reorder_insns_with_line_notes (from
, to
, after
)
4045 rtx from
, to
, after
;
4047 rtx from_line
= find_line_note (from
);
4048 rtx after_line
= find_line_note (after
);
4050 reorder_insns (from
, to
, after
);
4052 if (from_line
== after_line
)
4056 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4057 NOTE_LINE_NUMBER (from_line
),
4060 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4061 NOTE_LINE_NUMBER (after_line
),
4065 /* Remove unnecessary notes from the instruction stream. */
4068 remove_unnecessary_notes ()
4070 rtx block_stack
= NULL_RTX
;
4071 rtx eh_stack
= NULL_RTX
;
4076 /* We must not remove the first instruction in the function because
4077 the compiler depends on the first instruction being a note. */
4078 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
4080 /* Remember what's next. */
4081 next
= NEXT_INSN (insn
);
4083 /* We're only interested in notes. */
4084 if (GET_CODE (insn
) != NOTE
)
4087 switch (NOTE_LINE_NUMBER (insn
))
4089 case NOTE_INSN_DELETED
:
4090 case NOTE_INSN_LOOP_END_TOP_COND
:
4094 case NOTE_INSN_EH_REGION_BEG
:
4095 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
4098 case NOTE_INSN_EH_REGION_END
:
4099 /* Too many end notes. */
4100 if (eh_stack
== NULL_RTX
)
4102 /* Mismatched nesting. */
4103 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
4106 eh_stack
= XEXP (eh_stack
, 1);
4107 free_INSN_LIST_node (tmp
);
4110 case NOTE_INSN_BLOCK_BEG
:
4111 /* By now, all notes indicating lexical blocks should have
4112 NOTE_BLOCK filled in. */
4113 if (NOTE_BLOCK (insn
) == NULL_TREE
)
4115 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
4118 case NOTE_INSN_BLOCK_END
:
4119 /* Too many end notes. */
4120 if (block_stack
== NULL_RTX
)
4122 /* Mismatched nesting. */
4123 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
4126 block_stack
= XEXP (block_stack
, 1);
4127 free_INSN_LIST_node (tmp
);
4129 /* Scan back to see if there are any non-note instructions
4130 between INSN and the beginning of this block. If not,
4131 then there is no PC range in the generated code that will
4132 actually be in this block, so there's no point in
4133 remembering the existence of the block. */
4134 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
4136 /* This block contains a real instruction. Note that we
4137 don't include labels; if the only thing in the block
4138 is a label, then there are still no PC values that
4139 lie within the block. */
4143 /* We're only interested in NOTEs. */
4144 if (GET_CODE (tmp
) != NOTE
)
4147 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
4149 /* We just verified that this BLOCK matches us with
4150 the block_stack check above. Never delete the
4151 BLOCK for the outermost scope of the function; we
4152 can refer to names from that scope even if the
4153 block notes are messed up. */
4154 if (! is_body_block (NOTE_BLOCK (insn
))
4155 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
4162 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
4163 /* There's a nested block. We need to leave the
4164 current block in place since otherwise the debugger
4165 wouldn't be able to show symbols from our block in
4166 the nested block. */
4172 /* Too many begin notes. */
4173 if (block_stack
|| eh_stack
)
4178 /* Emit insn(s) of given code and pattern
4179 at a specified place within the doubly-linked list.
4181 All of the emit_foo global entry points accept an object
4182 X which is either an insn list or a PATTERN of a single
4185 There are thus a few canonical ways to generate code and
4186 emit it at a specific place in the instruction stream. For
4187 example, consider the instruction named SPOT and the fact that
4188 we would like to emit some instructions before SPOT. We might
4192 ... emit the new instructions ...
4193 insns_head = get_insns ();
4196 emit_insn_before (insns_head, SPOT);
4198 It used to be common to generate SEQUENCE rtl instead, but that
4199 is a relic of the past which no longer occurs. The reason is that
4200 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4201 generated would almost certainly die right after it was created. */
4203 /* Make X be output before the instruction BEFORE. */
4206 emit_insn_before (x
, before
)
4212 #ifdef ENABLE_RTL_CHECKING
4213 if (before
== NULL_RTX
)
4220 switch (GET_CODE (x
))
4231 rtx next
= NEXT_INSN (insn
);
4232 add_insn_before (insn
, before
);
4238 #ifdef ENABLE_RTL_CHECKING
4245 last
= make_insn_raw (x
);
4246 add_insn_before (last
, before
);
4253 /* Make an instruction with body X and code JUMP_INSN
4254 and output it before the instruction BEFORE. */
4257 emit_jump_insn_before (x
, before
)
4260 rtx insn
, last
= NULL_RTX
;
4262 #ifdef ENABLE_RTL_CHECKING
4263 if (before
== NULL_RTX
)
4267 switch (GET_CODE (x
))
4278 rtx next
= NEXT_INSN (insn
);
4279 add_insn_before (insn
, before
);
4285 #ifdef ENABLE_RTL_CHECKING
4292 last
= make_jump_insn_raw (x
);
4293 add_insn_before (last
, before
);
4300 /* Make an instruction with body X and code CALL_INSN
4301 and output it before the instruction BEFORE. */
4304 emit_call_insn_before (x
, before
)
4307 rtx last
= NULL_RTX
, insn
;
4309 #ifdef ENABLE_RTL_CHECKING
4310 if (before
== NULL_RTX
)
4314 switch (GET_CODE (x
))
4325 rtx next
= NEXT_INSN (insn
);
4326 add_insn_before (insn
, before
);
4332 #ifdef ENABLE_RTL_CHECKING
4339 last
= make_call_insn_raw (x
);
4340 add_insn_before (last
, before
);
4347 /* Make an insn of code BARRIER
4348 and output it before the insn BEFORE. */
4351 emit_barrier_before (before
)
4354 rtx insn
= rtx_alloc (BARRIER
);
4356 INSN_UID (insn
) = cur_insn_uid
++;
4358 add_insn_before (insn
, before
);
4362 /* Emit the label LABEL before the insn BEFORE. */
4365 emit_label_before (label
, before
)
4368 /* This can be called twice for the same label as a result of the
4369 confusion that follows a syntax error! So make it harmless. */
4370 if (INSN_UID (label
) == 0)
4372 INSN_UID (label
) = cur_insn_uid
++;
4373 add_insn_before (label
, before
);
4379 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4382 emit_note_before (subtype
, before
)
4386 rtx note
= rtx_alloc (NOTE
);
4387 INSN_UID (note
) = cur_insn_uid
++;
4388 NOTE_SOURCE_FILE (note
) = 0;
4389 NOTE_LINE_NUMBER (note
) = subtype
;
4390 BLOCK_FOR_INSN (note
) = NULL
;
4392 add_insn_before (note
, before
);
4396 /* Helper for emit_insn_after, handles lists of instructions
4399 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4402 emit_insn_after_1 (first
, after
)
4409 if (GET_CODE (after
) != BARRIER
4410 && (bb
= BLOCK_FOR_INSN (after
)))
4412 bb
->flags
|= BB_DIRTY
;
4413 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4414 if (GET_CODE (last
) != BARRIER
)
4415 set_block_for_insn (last
, bb
);
4416 if (GET_CODE (last
) != BARRIER
)
4417 set_block_for_insn (last
, bb
);
4418 if (bb
->end
== after
)
4422 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4425 after_after
= NEXT_INSN (after
);
4427 NEXT_INSN (after
) = first
;
4428 PREV_INSN (first
) = after
;
4429 NEXT_INSN (last
) = after_after
;
4431 PREV_INSN (after_after
) = last
;
4433 if (after
== last_insn
)
4438 /* Make X be output after the insn AFTER. */
4441 emit_insn_after (x
, after
)
4446 #ifdef ENABLE_RTL_CHECKING
4447 if (after
== NULL_RTX
)
4454 switch (GET_CODE (x
))
4462 last
= emit_insn_after_1 (x
, after
);
4465 #ifdef ENABLE_RTL_CHECKING
4472 last
= make_insn_raw (x
);
4473 add_insn_after (last
, after
);
4480 /* Similar to emit_insn_after, except that line notes are to be inserted so
4481 as to act as if this insn were at FROM. */
4484 emit_insn_after_with_line_notes (x
, after
, from
)
4487 rtx from_line
= find_line_note (from
);
4488 rtx after_line
= find_line_note (after
);
4489 rtx insn
= emit_insn_after (x
, after
);
4492 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4493 NOTE_LINE_NUMBER (from_line
),
4497 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4498 NOTE_LINE_NUMBER (after_line
),
4502 /* Make an insn of code JUMP_INSN with body X
4503 and output it after the insn AFTER. */
4506 emit_jump_insn_after (x
, after
)
4511 #ifdef ENABLE_RTL_CHECKING
4512 if (after
== NULL_RTX
)
4516 switch (GET_CODE (x
))
4524 last
= emit_insn_after_1 (x
, after
);
4527 #ifdef ENABLE_RTL_CHECKING
4534 last
= make_jump_insn_raw (x
);
4535 add_insn_after (last
, after
);
4542 /* Make an instruction with body X and code CALL_INSN
4543 and output it after the instruction AFTER. */
4546 emit_call_insn_after (x
, after
)
4551 #ifdef ENABLE_RTL_CHECKING
4552 if (after
== NULL_RTX
)
4556 switch (GET_CODE (x
))
4564 last
= emit_insn_after_1 (x
, after
);
4567 #ifdef ENABLE_RTL_CHECKING
4574 last
= make_call_insn_raw (x
);
4575 add_insn_after (last
, after
);
4582 /* Make an insn of code BARRIER
4583 and output it after the insn AFTER. */
4586 emit_barrier_after (after
)
4589 rtx insn
= rtx_alloc (BARRIER
);
4591 INSN_UID (insn
) = cur_insn_uid
++;
4593 add_insn_after (insn
, after
);
4597 /* Emit the label LABEL after the insn AFTER. */
4600 emit_label_after (label
, after
)
4603 /* This can be called twice for the same label
4604 as a result of the confusion that follows a syntax error!
4605 So make it harmless. */
4606 if (INSN_UID (label
) == 0)
4608 INSN_UID (label
) = cur_insn_uid
++;
4609 add_insn_after (label
, after
);
4615 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4618 emit_note_after (subtype
, after
)
4622 rtx note
= rtx_alloc (NOTE
);
4623 INSN_UID (note
) = cur_insn_uid
++;
4624 NOTE_SOURCE_FILE (note
) = 0;
4625 NOTE_LINE_NUMBER (note
) = subtype
;
4626 BLOCK_FOR_INSN (note
) = NULL
;
4627 add_insn_after (note
, after
);
4631 /* Emit a line note for FILE and LINE after the insn AFTER. */
4634 emit_line_note_after (file
, line
, after
)
4641 if (no_line_numbers
&& line
> 0)
4647 note
= rtx_alloc (NOTE
);
4648 INSN_UID (note
) = cur_insn_uid
++;
4649 NOTE_SOURCE_FILE (note
) = file
;
4650 NOTE_LINE_NUMBER (note
) = line
;
4651 BLOCK_FOR_INSN (note
) = NULL
;
4652 add_insn_after (note
, after
);
4656 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4658 emit_insn_after_setloc (pattern
, after
, loc
)
4662 rtx last
= emit_insn_after (pattern
, after
);
4664 after
= NEXT_INSN (after
);
4667 if (active_insn_p (after
))
4668 INSN_LOCATOR (after
) = loc
;
4671 after
= NEXT_INSN (after
);
4676 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4678 emit_jump_insn_after_setloc (pattern
, after
, loc
)
4682 rtx last
= emit_jump_insn_after (pattern
, after
);
4684 after
= NEXT_INSN (after
);
4687 if (active_insn_p (after
))
4688 INSN_LOCATOR (after
) = loc
;
4691 after
= NEXT_INSN (after
);
4696 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4698 emit_call_insn_after_setloc (pattern
, after
, loc
)
4702 rtx last
= emit_call_insn_after (pattern
, after
);
4704 after
= NEXT_INSN (after
);
4707 if (active_insn_p (after
))
4708 INSN_LOCATOR (after
) = loc
;
4711 after
= NEXT_INSN (after
);
4716 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4718 emit_insn_before_setloc (pattern
, before
, loc
)
4719 rtx pattern
, before
;
4722 rtx first
= PREV_INSN (before
);
4723 rtx last
= emit_insn_before (pattern
, before
);
4725 first
= NEXT_INSN (first
);
4728 if (active_insn_p (first
))
4729 INSN_LOCATOR (first
) = loc
;
4732 first
= NEXT_INSN (first
);
4737 /* Take X and emit it at the end of the doubly-linked
4740 Returns the last insn emitted. */
4746 rtx last
= last_insn
;
4752 switch (GET_CODE (x
))
4763 rtx next
= NEXT_INSN (insn
);
4770 #ifdef ENABLE_RTL_CHECKING
4777 last
= make_insn_raw (x
);
4785 /* Make an insn of code JUMP_INSN with pattern X
4786 and add it to the end of the doubly-linked list. */
4792 rtx last
= NULL_RTX
, insn
;
4794 switch (GET_CODE (x
))
4805 rtx next
= NEXT_INSN (insn
);
4812 #ifdef ENABLE_RTL_CHECKING
4819 last
= make_jump_insn_raw (x
);
4827 /* Make an insn of code CALL_INSN with pattern X
4828 and add it to the end of the doubly-linked list. */
4836 switch (GET_CODE (x
))
4844 insn
= emit_insn (x
);
4847 #ifdef ENABLE_RTL_CHECKING
4854 insn
= make_call_insn_raw (x
);
4862 /* Add the label LABEL to the end of the doubly-linked list. */
4868 /* This can be called twice for the same label
4869 as a result of the confusion that follows a syntax error!
4870 So make it harmless. */
4871 if (INSN_UID (label
) == 0)
4873 INSN_UID (label
) = cur_insn_uid
++;
4879 /* Make an insn of code BARRIER
4880 and add it to the end of the doubly-linked list. */
4885 rtx barrier
= rtx_alloc (BARRIER
);
4886 INSN_UID (barrier
) = cur_insn_uid
++;
4891 /* Make an insn of code NOTE
4892 with data-fields specified by FILE and LINE
4893 and add it to the end of the doubly-linked list,
4894 but only if line-numbers are desired for debugging info. */
4897 emit_line_note (file
, line
)
4901 set_file_and_line_for_stmt (file
, line
);
4904 if (no_line_numbers
)
4908 return emit_note (file
, line
);
4911 /* Make an insn of code NOTE
4912 with data-fields specified by FILE and LINE
4913 and add it to the end of the doubly-linked list.
4914 If it is a line-number NOTE, omit it if it matches the previous one. */
4917 emit_note (file
, line
)
4925 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4926 && line
== last_linenum
)
4928 last_filename
= file
;
4929 last_linenum
= line
;
4932 if (no_line_numbers
&& line
> 0)
4938 note
= rtx_alloc (NOTE
);
4939 INSN_UID (note
) = cur_insn_uid
++;
4940 NOTE_SOURCE_FILE (note
) = file
;
4941 NOTE_LINE_NUMBER (note
) = line
;
4942 BLOCK_FOR_INSN (note
) = NULL
;
4947 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4950 emit_line_note_force (file
, line
)
4955 return emit_line_note (file
, line
);
4958 /* Cause next statement to emit a line note even if the line number
4959 has not changed. This is used at the beginning of a function. */
4962 force_next_line_note ()
4967 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4968 note of this type already exists, remove it first. */
4971 set_unique_reg_note (insn
, kind
, datum
)
4976 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4982 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4983 has multiple sets (some callers assume single_set
4984 means the insn only has one set, when in fact it
4985 means the insn only has one * useful * set). */
4986 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4993 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4994 It serves no useful purpose and breaks eliminate_regs. */
4995 if (GET_CODE (datum
) == ASM_OPERANDS
)
5005 XEXP (note
, 0) = datum
;
5009 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
5010 return REG_NOTES (insn
);
5013 /* Return an indication of which type of insn should have X as a body.
5014 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5020 if (GET_CODE (x
) == CODE_LABEL
)
5022 if (GET_CODE (x
) == CALL
)
5024 if (GET_CODE (x
) == RETURN
)
5026 if (GET_CODE (x
) == SET
)
5028 if (SET_DEST (x
) == pc_rtx
)
5030 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5035 if (GET_CODE (x
) == PARALLEL
)
5038 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5039 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5041 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5042 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5044 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5045 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5051 /* Emit the rtl pattern X as an appropriate kind of insn.
5052 If X is a label, it is simply added into the insn chain. */
5058 enum rtx_code code
= classify_insn (x
);
5060 if (code
== CODE_LABEL
)
5061 return emit_label (x
);
5062 else if (code
== INSN
)
5063 return emit_insn (x
);
5064 else if (code
== JUMP_INSN
)
5066 rtx insn
= emit_jump_insn (x
);
5067 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5068 return emit_barrier ();
5071 else if (code
== CALL_INSN
)
5072 return emit_call_insn (x
);
5077 /* Space for free sequence stack entries. */
5078 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
5080 /* Begin emitting insns to a sequence which can be packaged in an
5081 RTL_EXPR. If this sequence will contain something that might cause
5082 the compiler to pop arguments to function calls (because those
5083 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5084 details), use do_pending_stack_adjust before calling this function.
5085 That will ensure that the deferred pops are not accidentally
5086 emitted in the middle of this sequence. */
5091 struct sequence_stack
*tem
;
5093 if (free_sequence_stack
!= NULL
)
5095 tem
= free_sequence_stack
;
5096 free_sequence_stack
= tem
->next
;
5099 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
5101 tem
->next
= seq_stack
;
5102 tem
->first
= first_insn
;
5103 tem
->last
= last_insn
;
5104 tem
->sequence_rtl_expr
= seq_rtl_expr
;
5112 /* Similarly, but indicate that this sequence will be placed in T, an
5113 RTL_EXPR. See the documentation for start_sequence for more
5114 information about how to use this function. */
5117 start_sequence_for_rtl_expr (t
)
5125 /* Set up the insn chain starting with FIRST as the current sequence,
5126 saving the previously current one. See the documentation for
5127 start_sequence for more information about how to use this function. */
5130 push_to_sequence (first
)
5137 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
5143 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5146 push_to_full_sequence (first
, last
)
5152 /* We really should have the end of the insn chain here. */
5153 if (last
&& NEXT_INSN (last
))
5157 /* Set up the outer-level insn chain
5158 as the current sequence, saving the previously current one. */
5161 push_topmost_sequence ()
5163 struct sequence_stack
*stack
, *top
= NULL
;
5167 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5170 first_insn
= top
->first
;
5171 last_insn
= top
->last
;
5172 seq_rtl_expr
= top
->sequence_rtl_expr
;
5175 /* After emitting to the outer-level insn chain, update the outer-level
5176 insn chain, and restore the previous saved state. */
5179 pop_topmost_sequence ()
5181 struct sequence_stack
*stack
, *top
= NULL
;
5183 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5186 top
->first
= first_insn
;
5187 top
->last
= last_insn
;
5188 /* ??? Why don't we save seq_rtl_expr here? */
5193 /* After emitting to a sequence, restore previous saved state.
5195 To get the contents of the sequence just made, you must call
5196 `get_insns' *before* calling here.
5198 If the compiler might have deferred popping arguments while
5199 generating this sequence, and this sequence will not be immediately
5200 inserted into the instruction stream, use do_pending_stack_adjust
5201 before calling get_insns. That will ensure that the deferred
5202 pops are inserted into this sequence, and not into some random
5203 location in the instruction stream. See INHIBIT_DEFER_POP for more
5204 information about deferred popping of arguments. */
5209 struct sequence_stack
*tem
= seq_stack
;
5211 first_insn
= tem
->first
;
5212 last_insn
= tem
->last
;
5213 seq_rtl_expr
= tem
->sequence_rtl_expr
;
5214 seq_stack
= tem
->next
;
5216 memset (tem
, 0, sizeof (*tem
));
5217 tem
->next
= free_sequence_stack
;
5218 free_sequence_stack
= tem
;
5221 /* This works like end_sequence, but records the old sequence in FIRST
5225 end_full_sequence (first
, last
)
5228 *first
= first_insn
;
5233 /* Return 1 if currently emitting into a sequence. */
5238 return seq_stack
!= 0;
5241 /* Put the various virtual registers into REGNO_REG_RTX. */
5244 init_virtual_regs (es
)
5245 struct emit_status
*es
;
5247 rtx
*ptr
= es
->x_regno_reg_rtx
;
5248 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5249 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5250 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5251 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5252 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5256 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5257 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5258 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5259 static int copy_insn_n_scratches
;
5261 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5262 copied an ASM_OPERANDS.
5263 In that case, it is the original input-operand vector. */
5264 static rtvec orig_asm_operands_vector
;
5266 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5267 copied an ASM_OPERANDS.
5268 In that case, it is the copied input-operand vector. */
5269 static rtvec copy_asm_operands_vector
;
5271 /* Likewise for the constraints vector. */
5272 static rtvec orig_asm_constraints_vector
;
5273 static rtvec copy_asm_constraints_vector
;
5275 /* Recursively create a new copy of an rtx for copy_insn.
5276 This function differs from copy_rtx in that it handles SCRATCHes and
5277 ASM_OPERANDs properly.
5278 Normally, this function is not used directly; use copy_insn as front end.
5279 However, you could first copy an insn pattern with copy_insn and then use
5280 this function afterwards to properly copy any REG_NOTEs containing
5290 const char *format_ptr
;
5292 code
= GET_CODE (orig
);
5309 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5310 if (copy_insn_scratch_in
[i
] == orig
)
5311 return copy_insn_scratch_out
[i
];
5315 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5316 a LABEL_REF, it isn't sharable. */
5317 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5318 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5319 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5323 /* A MEM with a constant address is not sharable. The problem is that
5324 the constant address may need to be reloaded. If the mem is shared,
5325 then reloading one copy of this mem will cause all copies to appear
5326 to have been reloaded. */
5332 copy
= rtx_alloc (code
);
5334 /* Copy the various flags, and other information. We assume that
5335 all fields need copying, and then clear the fields that should
5336 not be copied. That is the sensible default behavior, and forces
5337 us to explicitly document why we are *not* copying a flag. */
5338 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5340 /* We do not copy the USED flag, which is used as a mark bit during
5341 walks over the RTL. */
5342 RTX_FLAG (copy
, used
) = 0;
5344 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5345 if (GET_RTX_CLASS (code
) == 'i')
5347 RTX_FLAG (copy
, jump
) = 0;
5348 RTX_FLAG (copy
, call
) = 0;
5349 RTX_FLAG (copy
, frame_related
) = 0;
5352 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5354 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5356 copy
->fld
[i
] = orig
->fld
[i
];
5357 switch (*format_ptr
++)
5360 if (XEXP (orig
, i
) != NULL
)
5361 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5366 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5367 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5368 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5369 XVEC (copy
, i
) = copy_asm_operands_vector
;
5370 else if (XVEC (orig
, i
) != NULL
)
5372 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5373 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5374 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5385 /* These are left unchanged. */
5393 if (code
== SCRATCH
)
5395 i
= copy_insn_n_scratches
++;
5396 if (i
>= MAX_RECOG_OPERANDS
)
5398 copy_insn_scratch_in
[i
] = orig
;
5399 copy_insn_scratch_out
[i
] = copy
;
5401 else if (code
== ASM_OPERANDS
)
5403 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5404 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5405 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5406 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5412 /* Create a new copy of an rtx.
5413 This function differs from copy_rtx in that it handles SCRATCHes and
5414 ASM_OPERANDs properly.
5415 INSN doesn't really have to be a full INSN; it could be just the
5421 copy_insn_n_scratches
= 0;
5422 orig_asm_operands_vector
= 0;
5423 orig_asm_constraints_vector
= 0;
5424 copy_asm_operands_vector
= 0;
5425 copy_asm_constraints_vector
= 0;
5426 return copy_insn_1 (insn
);
5429 /* Initialize data structures and variables in this file
5430 before generating rtl for each function. */
5435 struct function
*f
= cfun
;
5437 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5440 seq_rtl_expr
= NULL
;
5442 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5445 first_label_num
= label_num
;
5449 /* Init the tables that describe all the pseudo regs. */
5451 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5453 f
->emit
->regno_pointer_align
5454 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5455 * sizeof (unsigned char));
5458 = (rtx
*) ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5460 /* Put copies of all the hard registers into regno_reg_rtx. */
5461 memcpy (regno_reg_rtx
,
5462 static_regno_reg_rtx
,
5463 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5465 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5466 init_virtual_regs (f
->emit
);
5468 /* Indicate that the virtual registers and stack locations are
5470 REG_POINTER (stack_pointer_rtx
) = 1;
5471 REG_POINTER (frame_pointer_rtx
) = 1;
5472 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5473 REG_POINTER (arg_pointer_rtx
) = 1;
5475 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5476 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5477 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5478 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5479 REG_POINTER (virtual_cfa_rtx
) = 1;
5481 #ifdef STACK_BOUNDARY
5482 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5483 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5484 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5485 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5487 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5488 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5489 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5490 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5491 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5494 #ifdef INIT_EXPANDERS
5499 /* Generate the constant 0. */
5502 gen_const_vector_0 (mode
)
5503 enum machine_mode mode
;
5508 enum machine_mode inner
;
5510 units
= GET_MODE_NUNITS (mode
);
5511 inner
= GET_MODE_INNER (mode
);
5513 v
= rtvec_alloc (units
);
5515 /* We need to call this function after we to set CONST0_RTX first. */
5516 if (!CONST0_RTX (inner
))
5519 for (i
= 0; i
< units
; ++i
)
5520 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5522 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5526 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5527 all elements are zero. */
5529 gen_rtx_CONST_VECTOR (mode
, v
)
5530 enum machine_mode mode
;
5533 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5536 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5537 if (RTVEC_ELT (v
, i
) != inner_zero
)
5538 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5539 return CONST0_RTX (mode
);
5542 /* Create some permanent unique rtl objects shared between all functions.
5543 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5546 init_emit_once (line_numbers
)
5550 enum machine_mode mode
;
5551 enum machine_mode double_mode
;
5553 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5555 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5556 const_int_htab_eq
, NULL
);
5558 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5559 const_double_htab_eq
, NULL
);
5561 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5562 mem_attrs_htab_eq
, NULL
);
5563 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5564 reg_attrs_htab_eq
, NULL
);
5566 no_line_numbers
= ! line_numbers
;
5568 /* Compute the word and byte modes. */
5570 byte_mode
= VOIDmode
;
5571 word_mode
= VOIDmode
;
5572 double_mode
= VOIDmode
;
5574 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5575 mode
= GET_MODE_WIDER_MODE (mode
))
5577 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5578 && byte_mode
== VOIDmode
)
5581 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5582 && word_mode
== VOIDmode
)
5586 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5587 mode
= GET_MODE_WIDER_MODE (mode
))
5589 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5590 && double_mode
== VOIDmode
)
5594 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5596 /* Assign register numbers to the globally defined register rtx.
5597 This must be done at runtime because the register number field
5598 is in a union and some compilers can't initialize unions. */
5600 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5601 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5602 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5603 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5604 if (hard_frame_pointer_rtx
== 0)
5605 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5606 HARD_FRAME_POINTER_REGNUM
);
5607 if (arg_pointer_rtx
== 0)
5608 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5609 virtual_incoming_args_rtx
=
5610 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5611 virtual_stack_vars_rtx
=
5612 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5613 virtual_stack_dynamic_rtx
=
5614 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5615 virtual_outgoing_args_rtx
=
5616 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5617 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5619 /* Initialize RTL for commonly used hard registers. These are
5620 copied into regno_reg_rtx as we begin to compile each function. */
5621 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5622 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5624 #ifdef INIT_EXPANDERS
5625 /* This is to initialize {init|mark|free}_machine_status before the first
5626 call to push_function_context_to. This is needed by the Chill front
5627 end which calls push_function_context_to before the first call to
5628 init_function_start. */
5632 /* Create the unique rtx's for certain rtx codes and operand values. */
5634 /* Don't use gen_rtx here since gen_rtx in this case
5635 tries to use these variables. */
5636 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5637 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5638 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5640 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5641 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5642 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5644 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5646 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5647 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5648 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5649 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5650 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5652 dconsthalf
= dconst1
;
5655 for (i
= 0; i
<= 2; i
++)
5657 REAL_VALUE_TYPE
*r
=
5658 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5660 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5661 mode
= GET_MODE_WIDER_MODE (mode
))
5662 const_tiny_rtx
[i
][(int) mode
] =
5663 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5665 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5667 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5668 mode
= GET_MODE_WIDER_MODE (mode
))
5669 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5671 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5673 mode
= GET_MODE_WIDER_MODE (mode
))
5674 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5677 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5679 mode
= GET_MODE_WIDER_MODE (mode
))
5680 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5682 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5684 mode
= GET_MODE_WIDER_MODE (mode
))
5685 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5687 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5688 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5689 const_tiny_rtx
[0][i
] = const0_rtx
;
5691 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5692 if (STORE_FLAG_VALUE
== 1)
5693 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5695 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5696 return_address_pointer_rtx
5697 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5701 struct_value_rtx
= STRUCT_VALUE
;
5703 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5706 #ifdef STRUCT_VALUE_INCOMING
5707 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5709 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5710 struct_value_incoming_rtx
5711 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5713 struct_value_incoming_rtx
= struct_value_rtx
;
5717 #ifdef STATIC_CHAIN_REGNUM
5718 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5720 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5721 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5722 static_chain_incoming_rtx
5723 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5726 static_chain_incoming_rtx
= static_chain_rtx
;
5730 static_chain_rtx
= STATIC_CHAIN
;
5732 #ifdef STATIC_CHAIN_INCOMING
5733 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5735 static_chain_incoming_rtx
= static_chain_rtx
;
5739 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5740 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5743 /* Query and clear/ restore no_line_numbers. This is used by the
5744 switch / case handling in stmt.c to give proper line numbers in
5745 warnings about unreachable code. */
5748 force_line_numbers ()
5750 int old
= no_line_numbers
;
5752 no_line_numbers
= 0;
5754 force_next_line_note ();
5759 restore_line_number_status (old_value
)
5762 no_line_numbers
= old_value
;
5765 /* Produce exact duplicate of insn INSN after AFTER.
5766 Care updating of libcall regions if present. */
5769 emit_copy_of_insn_after (insn
, after
)
5773 rtx note1
, note2
, link
;
5775 switch (GET_CODE (insn
))
5778 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5782 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5786 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5787 if (CALL_INSN_FUNCTION_USAGE (insn
))
5788 CALL_INSN_FUNCTION_USAGE (new)
5789 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5790 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5791 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5798 /* Update LABEL_NUSES. */
5799 mark_jump_label (PATTERN (new), new, 0);
5801 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5803 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5805 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5806 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5808 if (GET_CODE (link
) == EXPR_LIST
)
5810 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5815 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5820 /* Fix the libcall sequences. */
5821 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5824 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5826 XEXP (note1
, 0) = p
;
5827 XEXP (note2
, 0) = new;
5829 INSN_CODE (new) = INSN_CODE (insn
);
5833 #include "gt-emit-rtl.h"