1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconstm1
;
115 /* All references to the following fixed hard registers go through
116 these unique rtl objects. On machines where the frame-pointer and
117 arg-pointer are the same register, they use the same unique object.
119 After register allocation, other rtl objects which used to be pseudo-regs
120 may be clobbered to refer to the frame-pointer register.
121 But references that were originally to the frame-pointer can be
122 distinguished from the others because they contain frame_pointer_rtx.
124 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
125 tricky: until register elimination has taken place hard_frame_pointer_rtx
126 should be used if it is being set, and frame_pointer_rtx otherwise. After
127 register elimination hard_frame_pointer_rtx should always be used.
128 On machines where the two registers are same (most) then these are the
131 In an inline procedure, the stack and frame pointer rtxs may not be
132 used for anything else. */
133 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
134 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
135 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
136 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
137 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
139 /* This is used to implement __builtin_return_address for some machines.
140 See for instance the MIPS port. */
141 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
143 /* We make one copy of (const_int C) where C is in
144 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
145 to save space during the compilation and simplify comparisons of
148 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
150 /* A hash table storing CONST_INTs whose absolute value is greater
151 than MAX_SAVED_CONST_INT. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
154 htab_t const_int_htab
;
156 /* A hash table storing memory attribute structures. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
158 htab_t mem_attrs_htab
;
160 /* A hash table storing register attribute structures. */
161 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
162 htab_t reg_attrs_htab
;
164 /* A hash table storing all CONST_DOUBLEs. */
165 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
166 htab_t const_double_htab
;
168 #define first_insn (cfun->emit->x_first_insn)
169 #define last_insn (cfun->emit->x_last_insn)
170 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
171 #define last_linenum (cfun->emit->x_last_linenum)
172 #define last_filename (cfun->emit->x_last_filename)
173 #define first_label_num (cfun->emit->x_first_label_num)
175 static rtx make_jump_insn_raw
PARAMS ((rtx
));
176 static rtx make_call_insn_raw
PARAMS ((rtx
));
177 static rtx find_line_note
PARAMS ((rtx
));
178 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
180 static void unshare_all_rtl_1
PARAMS ((rtx
));
181 static void unshare_all_decls
PARAMS ((tree
));
182 static void reset_used_decls
PARAMS ((tree
));
183 static void mark_label_nuses
PARAMS ((rtx
));
184 static hashval_t const_int_htab_hash
PARAMS ((const void *));
185 static int const_int_htab_eq
PARAMS ((const void *,
187 static hashval_t const_double_htab_hash
PARAMS ((const void *));
188 static int const_double_htab_eq
PARAMS ((const void *,
190 static rtx lookup_const_double
PARAMS ((rtx
));
191 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
192 static int mem_attrs_htab_eq
PARAMS ((const void *,
194 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
197 static hashval_t reg_attrs_htab_hash
PARAMS ((const void *));
198 static int reg_attrs_htab_eq
PARAMS ((const void *,
200 static reg_attrs
*get_reg_attrs
PARAMS ((tree
, int));
201 static tree component_ref_for_mem_expr
PARAMS ((tree
));
202 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability
= -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (x
)
214 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
217 /* Returns nonzero if the value represented by X (which is really a
218 CONST_INT) is the same as that given by Y (which is really a
222 const_int_htab_eq (x
, y
)
226 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
229 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
231 const_double_htab_hash (x
)
237 if (GET_MODE (value
) == VOIDmode
)
238 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
241 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
242 /* MODE is used in the comparison, so it should be in the hash. */
243 h
^= GET_MODE (value
);
248 /* Returns nonzero if the value represented by X (really a ...)
249 is the same as that represented by Y (really a ...) */
251 const_double_htab_eq (x
, y
)
255 rtx a
= (rtx
)x
, b
= (rtx
)y
;
257 if (GET_MODE (a
) != GET_MODE (b
))
259 if (GET_MODE (a
) == VOIDmode
)
260 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
261 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
263 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
264 CONST_DOUBLE_REAL_VALUE (b
));
267 /* Returns a hash code for X (which is a really a mem_attrs *). */
270 mem_attrs_htab_hash (x
)
273 mem_attrs
*p
= (mem_attrs
*) x
;
275 return (p
->alias
^ (p
->align
* 1000)
276 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
277 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
281 /* Returns nonzero if the value represented by X (which is really a
282 mem_attrs *) is the same as that given by Y (which is also really a
286 mem_attrs_htab_eq (x
, y
)
290 mem_attrs
*p
= (mem_attrs
*) x
;
291 mem_attrs
*q
= (mem_attrs
*) y
;
293 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
294 && p
->size
== q
->size
&& p
->align
== q
->align
);
297 /* Allocate a new mem_attrs structure and insert it into the hash table if
298 one identical to it is not already in the table. We are doing this for
302 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
308 enum machine_mode mode
;
313 /* If everything is the default, we can just return zero. */
314 if (alias
== 0 && expr
== 0 && offset
== 0
316 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
317 && (align
== BITS_PER_UNIT
319 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
324 attrs
.offset
= offset
;
328 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
331 *slot
= ggc_alloc (sizeof (mem_attrs
));
332 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
338 /* Returns a hash code for X (which is a really a reg_attrs *). */
341 reg_attrs_htab_hash (x
)
344 reg_attrs
*p
= (reg_attrs
*) x
;
346 return ((p
->offset
* 1000) ^ (long) p
->decl
);
349 /* Returns non-zero if the value represented by X (which is really a
350 reg_attrs *) is the same as that given by Y (which is also really a
354 reg_attrs_htab_eq (x
, y
)
358 reg_attrs
*p
= (reg_attrs
*) x
;
359 reg_attrs
*q
= (reg_attrs
*) y
;
361 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
363 /* Allocate a new reg_attrs structure and insert it into the hash table if
364 one identical to it is not already in the table. We are doing this for
368 get_reg_attrs (decl
, offset
)
375 /* If everything is the default, we can just return zero. */
376 if (decl
== 0 && offset
== 0)
380 attrs
.offset
= offset
;
382 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
385 *slot
= ggc_alloc (sizeof (reg_attrs
));
386 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
392 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
393 don't attempt to share with the various global pieces of rtl (such as
394 frame_pointer_rtx). */
397 gen_raw_REG (mode
, regno
)
398 enum machine_mode mode
;
401 rtx x
= gen_rtx_raw_REG (mode
, regno
);
402 ORIGINAL_REGNO (x
) = regno
;
406 /* There are some RTL codes that require special attention; the generation
407 functions do the raw handling. If you add to this list, modify
408 special_rtx in gengenrtl.c as well. */
411 gen_rtx_CONST_INT (mode
, arg
)
412 enum machine_mode mode ATTRIBUTE_UNUSED
;
417 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
418 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
420 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
421 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
422 return const_true_rtx
;
425 /* Look up the CONST_INT in the hash table. */
426 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
427 (hashval_t
) arg
, INSERT
);
429 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
435 gen_int_mode (c
, mode
)
437 enum machine_mode mode
;
439 return GEN_INT (trunc_int_for_mode (c
, mode
));
442 /* CONST_DOUBLEs might be created from pairs of integers, or from
443 REAL_VALUE_TYPEs. Also, their length is known only at run time,
444 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
446 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
447 hash table. If so, return its counterpart; otherwise add it
448 to the hash table and return it. */
450 lookup_const_double (real
)
453 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
460 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
461 VALUE in mode MODE. */
463 const_double_from_real_value (value
, mode
)
464 REAL_VALUE_TYPE value
;
465 enum machine_mode mode
;
467 rtx real
= rtx_alloc (CONST_DOUBLE
);
468 PUT_MODE (real
, mode
);
470 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
472 return lookup_const_double (real
);
475 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
476 of ints: I0 is the low-order word and I1 is the high-order word.
477 Do not use this routine for non-integer modes; convert to
478 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
481 immed_double_const (i0
, i1
, mode
)
482 HOST_WIDE_INT i0
, i1
;
483 enum machine_mode mode
;
488 if (mode
!= VOIDmode
)
491 if (GET_MODE_CLASS (mode
) != MODE_INT
492 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
493 /* We can get a 0 for an error mark. */
494 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
495 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
498 /* We clear out all bits that don't belong in MODE, unless they and
499 our sign bit are all one. So we get either a reasonable negative
500 value or a reasonable unsigned value for this mode. */
501 width
= GET_MODE_BITSIZE (mode
);
502 if (width
< HOST_BITS_PER_WIDE_INT
503 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
504 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
505 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
506 else if (width
== HOST_BITS_PER_WIDE_INT
507 && ! (i1
== ~0 && i0
< 0))
509 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
510 /* We cannot represent this value as a constant. */
513 /* If this would be an entire word for the target, but is not for
514 the host, then sign-extend on the host so that the number will
515 look the same way on the host that it would on the target.
517 For example, when building a 64 bit alpha hosted 32 bit sparc
518 targeted compiler, then we want the 32 bit unsigned value -1 to be
519 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
520 The latter confuses the sparc backend. */
522 if (width
< HOST_BITS_PER_WIDE_INT
523 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
524 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
526 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
529 ??? Strictly speaking, this is wrong if we create a CONST_INT for
530 a large unsigned constant with the size of MODE being
531 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
532 in a wider mode. In that case we will mis-interpret it as a
535 Unfortunately, the only alternative is to make a CONST_DOUBLE for
536 any constant in any mode if it is an unsigned constant larger
537 than the maximum signed integer in an int on the host. However,
538 doing this will break everyone that always expects to see a
539 CONST_INT for SImode and smaller.
541 We have always been making CONST_INTs in this case, so nothing
542 new is being broken. */
544 if (width
<= HOST_BITS_PER_WIDE_INT
)
545 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
548 /* If this integer fits in one word, return a CONST_INT. */
549 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
552 /* We use VOIDmode for integers. */
553 value
= rtx_alloc (CONST_DOUBLE
);
554 PUT_MODE (value
, VOIDmode
);
556 CONST_DOUBLE_LOW (value
) = i0
;
557 CONST_DOUBLE_HIGH (value
) = i1
;
559 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
560 XWINT (value
, i
) = 0;
562 return lookup_const_double (value
);
566 gen_rtx_REG (mode
, regno
)
567 enum machine_mode mode
;
570 /* In case the MD file explicitly references the frame pointer, have
571 all such references point to the same frame pointer. This is
572 used during frame pointer elimination to distinguish the explicit
573 references to these registers from pseudos that happened to be
576 If we have eliminated the frame pointer or arg pointer, we will
577 be using it as a normal register, for example as a spill
578 register. In such cases, we might be accessing it in a mode that
579 is not Pmode and therefore cannot use the pre-allocated rtx.
581 Also don't do this when we are making new REGs in reload, since
582 we don't want to get confused with the real pointers. */
584 if (mode
== Pmode
&& !reload_in_progress
)
586 if (regno
== FRAME_POINTER_REGNUM
587 && (!reload_completed
|| frame_pointer_needed
))
588 return frame_pointer_rtx
;
589 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
590 if (regno
== HARD_FRAME_POINTER_REGNUM
591 && (!reload_completed
|| frame_pointer_needed
))
592 return hard_frame_pointer_rtx
;
594 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
595 if (regno
== ARG_POINTER_REGNUM
)
596 return arg_pointer_rtx
;
598 #ifdef RETURN_ADDRESS_POINTER_REGNUM
599 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
600 return return_address_pointer_rtx
;
602 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
603 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
604 return pic_offset_table_rtx
;
605 if (regno
== STACK_POINTER_REGNUM
)
606 return stack_pointer_rtx
;
610 /* If the per-function register table has been set up, try to re-use
611 an existing entry in that table to avoid useless generation of RTL.
613 This code is disabled for now until we can fix the various backends
614 which depend on having non-shared hard registers in some cases. Long
615 term we want to re-enable this code as it can significantly cut down
616 on the amount of useless RTL that gets generated.
618 We'll also need to fix some code that runs after reload that wants to
619 set ORIGINAL_REGNO. */
624 && regno
< FIRST_PSEUDO_REGISTER
625 && reg_raw_mode
[regno
] == mode
)
626 return regno_reg_rtx
[regno
];
629 return gen_raw_REG (mode
, regno
);
633 gen_rtx_MEM (mode
, addr
)
634 enum machine_mode mode
;
637 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
639 /* This field is not cleared by the mere allocation of the rtx, so
647 gen_rtx_SUBREG (mode
, reg
, offset
)
648 enum machine_mode mode
;
652 /* This is the most common failure type.
653 Catch it early so we can see who does it. */
654 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
657 /* This check isn't usable right now because combine will
658 throw arbitrary crap like a CALL into a SUBREG in
659 gen_lowpart_for_combine so we must just eat it. */
661 /* Check for this too. */
662 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
665 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
668 /* Generate a SUBREG representing the least-significant part of REG if MODE
669 is smaller than mode of REG, otherwise paradoxical SUBREG. */
672 gen_lowpart_SUBREG (mode
, reg
)
673 enum machine_mode mode
;
676 enum machine_mode inmode
;
678 inmode
= GET_MODE (reg
);
679 if (inmode
== VOIDmode
)
681 return gen_rtx_SUBREG (mode
, reg
,
682 subreg_lowpart_offset (mode
, inmode
));
685 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
687 ** This routine generates an RTX of the size specified by
688 ** <code>, which is an RTX code. The RTX structure is initialized
689 ** from the arguments <element1> through <elementn>, which are
690 ** interpreted according to the specific RTX type's format. The
691 ** special machine mode associated with the rtx (if any) is specified
694 ** gen_rtx can be invoked in a way which resembles the lisp-like
695 ** rtx it will generate. For example, the following rtx structure:
697 ** (plus:QI (mem:QI (reg:SI 1))
698 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
700 ** ...would be generated by the following C code:
702 ** gen_rtx (PLUS, QImode,
703 ** gen_rtx (MEM, QImode,
704 ** gen_rtx (REG, SImode, 1)),
705 ** gen_rtx (MEM, QImode,
706 ** gen_rtx (PLUS, SImode,
707 ** gen_rtx (REG, SImode, 2),
708 ** gen_rtx (REG, SImode, 3)))),
713 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
715 int i
; /* Array indices... */
716 const char *fmt
; /* Current rtx's format... */
717 rtx rt_val
; /* RTX to return to caller... */
720 VA_FIXEDARG (p
, enum rtx_code
, code
);
721 VA_FIXEDARG (p
, enum machine_mode
, mode
);
726 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
731 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
732 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
734 rt_val
= immed_double_const (arg0
, arg1
, mode
);
739 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
743 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
747 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
748 rt_val
->mode
= mode
; /* Store the machine mode... */
750 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
751 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
755 case '0': /* Unused field. */
758 case 'i': /* An integer? */
759 XINT (rt_val
, i
) = va_arg (p
, int);
762 case 'w': /* A wide integer? */
763 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
766 case 's': /* A string? */
767 XSTR (rt_val
, i
) = va_arg (p
, char *);
770 case 'e': /* An expression? */
771 case 'u': /* An insn? Same except when printing. */
772 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
775 case 'E': /* An RTX vector? */
776 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
779 case 'b': /* A bitmap? */
780 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
783 case 't': /* A tree? */
784 XTREE (rt_val
, i
) = va_arg (p
, tree
);
798 /* gen_rtvec (n, [rt1, ..., rtn])
800 ** This routine creates an rtvec and stores within it the
801 ** pointers to rtx's which are its arguments.
806 gen_rtvec
VPARAMS ((int n
, ...))
812 VA_FIXEDARG (p
, int, n
);
815 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
817 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
819 for (i
= 0; i
< n
; i
++)
820 vector
[i
] = va_arg (p
, rtx
);
822 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
826 return gen_rtvec_v (save_n
, vector
);
830 gen_rtvec_v (n
, argp
)
838 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
840 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
842 for (i
= 0; i
< n
; i
++)
843 rt_val
->elem
[i
] = *argp
++;
848 /* Generate a REG rtx for a new pseudo register of mode MODE.
849 This pseudo is assigned the next sequential register number. */
853 enum machine_mode mode
;
855 struct function
*f
= cfun
;
858 /* Don't let anything called after initial flow analysis create new
863 if (generating_concat_p
864 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
865 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
867 /* For complex modes, don't make a single pseudo.
868 Instead, make a CONCAT of two pseudos.
869 This allows noncontiguous allocation of the real and imaginary parts,
870 which makes much better code. Besides, allocating DCmode
871 pseudos overstrains reload on some machines like the 386. */
872 rtx realpart
, imagpart
;
873 enum machine_mode partmode
= GET_MODE_INNER (mode
);
875 realpart
= gen_reg_rtx (partmode
);
876 imagpart
= gen_reg_rtx (partmode
);
877 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
880 /* Make sure regno_pointer_align, and regno_reg_rtx are large
881 enough to have an element for this pseudo reg number. */
883 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
885 int old_size
= f
->emit
->regno_pointer_align_length
;
889 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
890 memset (new + old_size
, 0, old_size
);
891 f
->emit
->regno_pointer_align
= (unsigned char *) new;
893 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
894 old_size
* 2 * sizeof (rtx
));
895 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
896 regno_reg_rtx
= new1
;
898 f
->emit
->regno_pointer_align_length
= old_size
* 2;
901 val
= gen_raw_REG (mode
, reg_rtx_no
);
902 regno_reg_rtx
[reg_rtx_no
++] = val
;
906 /* Generate an register with same attributes as REG,
907 but offsetted by OFFSET. */
910 gen_rtx_REG_offset (reg
, mode
, regno
, offset
)
911 enum machine_mode mode
;
916 rtx
new = gen_rtx_REG (mode
, regno
);
917 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
918 REG_OFFSET (reg
) + offset
);
922 /* Set the decl for MEM to DECL. */
925 set_reg_attrs_from_mem (reg
, mem
)
929 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
931 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
934 /* Assign the RTX X to declaration T. */
940 DECL_CHECK (t
)->decl
.rtl
= x
;
944 /* For register, we maitain the reverse information too. */
945 if (GET_CODE (x
) == REG
)
946 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
947 else if (GET_CODE (x
) == SUBREG
)
948 REG_ATTRS (SUBREG_REG (x
))
949 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
950 if (GET_CODE (x
) == CONCAT
)
952 if (REG_P (XEXP (x
, 0)))
953 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
954 if (REG_P (XEXP (x
, 1)))
955 REG_ATTRS (XEXP (x
, 1))
956 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
958 if (GET_CODE (x
) == PARALLEL
)
961 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
963 rtx y
= XVECEXP (x
, 0, i
);
964 if (REG_P (XEXP (y
, 0)))
965 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
970 /* Identify REG (which may be a CONCAT) as a user register. */
976 if (GET_CODE (reg
) == CONCAT
)
978 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
979 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
981 else if (GET_CODE (reg
) == REG
)
982 REG_USERVAR_P (reg
) = 1;
987 /* Identify REG as a probable pointer register and show its alignment
988 as ALIGN, if nonzero. */
991 mark_reg_pointer (reg
, align
)
995 if (! REG_POINTER (reg
))
997 REG_POINTER (reg
) = 1;
1000 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1002 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1003 /* We can no-longer be sure just how aligned this pointer is */
1004 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1007 /* Return 1 plus largest pseudo reg number used in the current function. */
1015 /* Return 1 + the largest label number used so far in the current function. */
1020 if (last_label_num
&& label_num
== base_label_num
)
1021 return last_label_num
;
1025 /* Return first label number used in this function (if any were used). */
1028 get_first_label_num ()
1030 return first_label_num
;
1033 /* Return the final regno of X, which is a SUBREG of a hard
1036 subreg_hard_regno (x
, check_mode
)
1040 enum machine_mode mode
= GET_MODE (x
);
1041 unsigned int byte_offset
, base_regno
, final_regno
;
1042 rtx reg
= SUBREG_REG (x
);
1044 /* This is where we attempt to catch illegal subregs
1045 created by the compiler. */
1046 if (GET_CODE (x
) != SUBREG
1047 || GET_CODE (reg
) != REG
)
1049 base_regno
= REGNO (reg
);
1050 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1052 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1055 /* Catch non-congruent offsets too. */
1056 byte_offset
= SUBREG_BYTE (x
);
1057 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1060 final_regno
= subreg_regno (x
);
1065 /* Return a value representing some low-order bits of X, where the number
1066 of low-order bits is given by MODE. Note that no conversion is done
1067 between floating-point and fixed-point values, rather, the bit
1068 representation is returned.
1070 This function handles the cases in common between gen_lowpart, below,
1071 and two variants in cse.c and combine.c. These are the cases that can
1072 be safely handled at all points in the compilation.
1074 If this is not a case we can handle, return 0. */
1077 gen_lowpart_common (mode
, x
)
1078 enum machine_mode mode
;
1081 int msize
= GET_MODE_SIZE (mode
);
1082 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
1085 if (GET_MODE (x
) == mode
)
1088 /* MODE must occupy no more words than the mode of X. */
1089 if (GET_MODE (x
) != VOIDmode
1090 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1091 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
1094 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1095 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1096 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
1099 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
1101 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1102 && (GET_MODE_CLASS (mode
) == MODE_INT
1103 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1105 /* If we are getting the low-order part of something that has been
1106 sign- or zero-extended, we can either just use the object being
1107 extended or make a narrower extension. If we want an even smaller
1108 piece than the size of the object being extended, call ourselves
1111 This case is used mostly by combine and cse. */
1113 if (GET_MODE (XEXP (x
, 0)) == mode
)
1115 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1116 return gen_lowpart_common (mode
, XEXP (x
, 0));
1117 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
1118 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1120 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1121 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
1122 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
1123 else if ((GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
1124 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
)
1125 && GET_MODE (x
) == VOIDmode
)
1126 return simplify_gen_subreg (mode
, x
, int_mode_for_mode (mode
), offset
);
1127 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1128 from the low-order part of the constant. */
1129 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1130 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1131 && GET_MODE (x
) == VOIDmode
1132 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1134 /* If MODE is twice the host word size, X is already the desired
1135 representation. Otherwise, if MODE is wider than a word, we can't
1136 do this. If MODE is exactly a word, return just one CONST_INT. */
1138 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1140 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1142 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1143 return (GET_CODE (x
) == CONST_INT
? x
1144 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1147 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1148 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1149 : CONST_DOUBLE_LOW (x
));
1151 /* Sign extend to HOST_WIDE_INT. */
1152 val
= trunc_int_for_mode (val
, mode
);
1154 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1159 /* The floating-point emulator can handle all conversions between
1160 FP and integer operands. This simplifies reload because it
1161 doesn't have to deal with constructs like (subreg:DI
1162 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1163 /* Single-precision floats are always 32-bits and double-precision
1164 floats are always 64-bits. */
1166 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1167 && GET_MODE_BITSIZE (mode
) == 32
1168 && GET_CODE (x
) == CONST_INT
)
1171 long i
= INTVAL (x
);
1173 real_from_target (&r
, &i
, mode
);
1174 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1176 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1177 && GET_MODE_BITSIZE (mode
) == 64
1178 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1179 && GET_MODE (x
) == VOIDmode
)
1182 HOST_WIDE_INT low
, high
;
1185 if (GET_CODE (x
) == CONST_INT
)
1188 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1192 low
= CONST_DOUBLE_LOW (x
);
1193 high
= CONST_DOUBLE_HIGH (x
);
1196 if (HOST_BITS_PER_WIDE_INT
> 32)
1197 high
= low
>> 31 >> 1;
1199 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1201 if (WORDS_BIG_ENDIAN
)
1202 i
[0] = high
, i
[1] = low
;
1204 i
[0] = low
, i
[1] = high
;
1206 real_from_target (&r
, i
, mode
);
1207 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1209 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1210 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1211 && GET_CODE (x
) == CONST_DOUBLE
1212 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1215 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1216 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1218 /* Convert 'r' into an array of four 32-bit words in target word
1220 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1221 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1224 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1227 i
[3 - 3 * endian
] = 0;
1230 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1231 i
[2 - 2 * endian
] = 0;
1232 i
[3 - 2 * endian
] = 0;
1235 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1236 i
[3 - 3 * endian
] = 0;
1239 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1244 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1246 #if HOST_BITS_PER_WIDE_INT == 32
1247 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1249 if (HOST_BITS_PER_WIDE_INT
!= 64)
1252 return immed_double_const ((((unsigned long) i
[3 * endian
])
1253 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1254 (((unsigned long) i
[2 - endian
])
1255 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1260 /* Otherwise, we can't do this. */
1264 /* Return the real part (which has mode MODE) of a complex value X.
1265 This always comes at the low address in memory. */
1268 gen_realpart (mode
, x
)
1269 enum machine_mode mode
;
1272 if (WORDS_BIG_ENDIAN
1273 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1275 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1277 ("can't access real part of complex value in hard register");
1278 else if (WORDS_BIG_ENDIAN
)
1279 return gen_highpart (mode
, x
);
1281 return gen_lowpart (mode
, x
);
1284 /* Return the imaginary part (which has mode MODE) of a complex value X.
1285 This always comes at the high address in memory. */
1288 gen_imagpart (mode
, x
)
1289 enum machine_mode mode
;
1292 if (WORDS_BIG_ENDIAN
)
1293 return gen_lowpart (mode
, x
);
1294 else if (! WORDS_BIG_ENDIAN
1295 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1297 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1299 ("can't access imaginary part of complex value in hard register");
1301 return gen_highpart (mode
, x
);
1304 /* Return 1 iff X, assumed to be a SUBREG,
1305 refers to the real part of the complex value in its containing reg.
1306 Complex values are always stored with the real part in the first word,
1307 regardless of WORDS_BIG_ENDIAN. */
1310 subreg_realpart_p (x
)
1313 if (GET_CODE (x
) != SUBREG
)
1316 return ((unsigned int) SUBREG_BYTE (x
)
1317 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1320 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1321 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1322 least-significant part of X.
1323 MODE specifies how big a part of X to return;
1324 it usually should not be larger than a word.
1325 If X is a MEM whose address is a QUEUED, the value may be so also. */
1328 gen_lowpart (mode
, x
)
1329 enum machine_mode mode
;
1332 rtx result
= gen_lowpart_common (mode
, x
);
1336 else if (GET_CODE (x
) == REG
)
1338 /* Must be a hard reg that's not valid in MODE. */
1339 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1344 else if (GET_CODE (x
) == MEM
)
1346 /* The only additional case we can do is MEM. */
1348 if (WORDS_BIG_ENDIAN
)
1349 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1350 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1352 if (BYTES_BIG_ENDIAN
)
1353 /* Adjust the address so that the address-after-the-data
1355 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1356 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1358 return adjust_address (x
, mode
, offset
);
1360 else if (GET_CODE (x
) == ADDRESSOF
)
1361 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1366 /* Like `gen_lowpart', but refer to the most significant part.
1367 This is used to access the imaginary part of a complex number. */
1370 gen_highpart (mode
, x
)
1371 enum machine_mode mode
;
1374 unsigned int msize
= GET_MODE_SIZE (mode
);
1377 /* This case loses if X is a subreg. To catch bugs early,
1378 complain if an invalid MODE is used even in other cases. */
1379 if (msize
> UNITS_PER_WORD
1380 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1383 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1384 subreg_highpart_offset (mode
, GET_MODE (x
)));
1386 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1387 the target if we have a MEM. gen_highpart must return a valid operand,
1388 emitting code if necessary to do so. */
1389 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1390 result
= validize_mem (result
);
1397 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1398 be VOIDmode constant. */
1400 gen_highpart_mode (outermode
, innermode
, exp
)
1401 enum machine_mode outermode
, innermode
;
1404 if (GET_MODE (exp
) != VOIDmode
)
1406 if (GET_MODE (exp
) != innermode
)
1408 return gen_highpart (outermode
, exp
);
1410 return simplify_gen_subreg (outermode
, exp
, innermode
,
1411 subreg_highpart_offset (outermode
, innermode
));
1414 /* Return offset in bytes to get OUTERMODE low part
1415 of the value in mode INNERMODE stored in memory in target format. */
1418 subreg_lowpart_offset (outermode
, innermode
)
1419 enum machine_mode outermode
, innermode
;
1421 unsigned int offset
= 0;
1422 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1426 if (WORDS_BIG_ENDIAN
)
1427 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1428 if (BYTES_BIG_ENDIAN
)
1429 offset
+= difference
% UNITS_PER_WORD
;
1435 /* Return offset in bytes to get OUTERMODE high part
1436 of the value in mode INNERMODE stored in memory in target format. */
1438 subreg_highpart_offset (outermode
, innermode
)
1439 enum machine_mode outermode
, innermode
;
1441 unsigned int offset
= 0;
1442 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1444 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1449 if (! WORDS_BIG_ENDIAN
)
1450 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1451 if (! BYTES_BIG_ENDIAN
)
1452 offset
+= difference
% UNITS_PER_WORD
;
1458 /* Return 1 iff X, assumed to be a SUBREG,
1459 refers to the least significant part of its containing reg.
1460 If X is not a SUBREG, always return 1 (it is its own low part!). */
1463 subreg_lowpart_p (x
)
1466 if (GET_CODE (x
) != SUBREG
)
1468 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1471 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1472 == SUBREG_BYTE (x
));
1476 /* Helper routine for all the constant cases of operand_subword.
1477 Some places invoke this directly. */
1480 constant_subword (op
, offset
, mode
)
1483 enum machine_mode mode
;
1485 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1488 /* If OP is already an integer word, return it. */
1489 if (GET_MODE_CLASS (mode
) == MODE_INT
1490 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1493 /* The output is some bits, the width of the target machine's word.
1494 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1496 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1497 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1498 && GET_MODE_BITSIZE (mode
) == 64
1499 && GET_CODE (op
) == CONST_DOUBLE
)
1504 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1505 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1507 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1508 which the words are written depends on the word endianness.
1509 ??? This is a potential portability problem and should
1510 be fixed at some point.
1512 We must exercise caution with the sign bit. By definition there
1513 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1514 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1515 So we explicitly mask and sign-extend as necessary. */
1516 if (BITS_PER_WORD
== 32)
1519 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1520 return GEN_INT (val
);
1522 #if HOST_BITS_PER_WIDE_INT >= 64
1523 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1525 val
= k
[! WORDS_BIG_ENDIAN
];
1526 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1527 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1528 return GEN_INT (val
);
1531 else if (BITS_PER_WORD
== 16)
1533 val
= k
[offset
>> 1];
1534 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1536 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1537 return GEN_INT (val
);
1542 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1543 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1544 && GET_MODE_BITSIZE (mode
) > 64
1545 && GET_CODE (op
) == CONST_DOUBLE
)
1550 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1551 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1553 if (BITS_PER_WORD
== 32)
1556 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1557 return GEN_INT (val
);
1559 #if HOST_BITS_PER_WIDE_INT >= 64
1560 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1562 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1563 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1564 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1565 return GEN_INT (val
);
1572 /* Single word float is a little harder, since single- and double-word
1573 values often do not have the same high-order bits. We have already
1574 verified that we want the only defined word of the single-word value. */
1575 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1576 && GET_MODE_BITSIZE (mode
) == 32
1577 && GET_CODE (op
) == CONST_DOUBLE
)
1582 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1583 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1585 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1587 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1589 if (BITS_PER_WORD
== 16)
1591 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1593 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1596 return GEN_INT (val
);
1599 /* The only remaining cases that we can handle are integers.
1600 Convert to proper endianness now since these cases need it.
1601 At this point, offset == 0 means the low-order word.
1603 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1604 in general. However, if OP is (const_int 0), we can just return
1607 if (op
== const0_rtx
)
1610 if (GET_MODE_CLASS (mode
) != MODE_INT
1611 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1612 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1615 if (WORDS_BIG_ENDIAN
)
1616 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1618 /* Find out which word on the host machine this value is in and get
1619 it from the constant. */
1620 val
= (offset
/ size_ratio
== 0
1621 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1622 : (GET_CODE (op
) == CONST_INT
1623 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1625 /* Get the value we want into the low bits of val. */
1626 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1627 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1629 val
= trunc_int_for_mode (val
, word_mode
);
1631 return GEN_INT (val
);
1634 /* Return subword OFFSET of operand OP.
1635 The word number, OFFSET, is interpreted as the word number starting
1636 at the low-order address. OFFSET 0 is the low-order word if not
1637 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1639 If we cannot extract the required word, we return zero. Otherwise,
1640 an rtx corresponding to the requested word will be returned.
1642 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1643 reload has completed, a valid address will always be returned. After
1644 reload, if a valid address cannot be returned, we return zero.
1646 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1647 it is the responsibility of the caller.
1649 MODE is the mode of OP in case it is a CONST_INT.
1651 ??? This is still rather broken for some cases. The problem for the
1652 moment is that all callers of this thing provide no 'goal mode' to
1653 tell us to work with. This exists because all callers were written
1654 in a word based SUBREG world.
1655 Now use of this function can be deprecated by simplify_subreg in most
1660 operand_subword (op
, offset
, validate_address
, mode
)
1662 unsigned int offset
;
1663 int validate_address
;
1664 enum machine_mode mode
;
1666 if (mode
== VOIDmode
)
1667 mode
= GET_MODE (op
);
1669 if (mode
== VOIDmode
)
1672 /* If OP is narrower than a word, fail. */
1674 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1677 /* If we want a word outside OP, return zero. */
1679 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1682 /* Form a new MEM at the requested address. */
1683 if (GET_CODE (op
) == MEM
)
1685 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1687 if (! validate_address
)
1690 else if (reload_completed
)
1692 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1696 return replace_equiv_address (new, XEXP (new, 0));
1699 /* Rest can be handled by simplify_subreg. */
1700 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1703 /* Similar to `operand_subword', but never return 0. If we can't extract
1704 the required subword, put OP into a register and try again. If that fails,
1705 abort. We always validate the address in this case.
1707 MODE is the mode of OP, in case it is CONST_INT. */
1710 operand_subword_force (op
, offset
, mode
)
1712 unsigned int offset
;
1713 enum machine_mode mode
;
1715 rtx result
= operand_subword (op
, offset
, 1, mode
);
1720 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1722 /* If this is a register which can not be accessed by words, copy it
1723 to a pseudo register. */
1724 if (GET_CODE (op
) == REG
)
1725 op
= copy_to_reg (op
);
1727 op
= force_reg (mode
, op
);
1730 result
= operand_subword (op
, offset
, 1, mode
);
1737 /* Given a compare instruction, swap the operands.
1738 A test instruction is changed into a compare of 0 against the operand. */
1741 reverse_comparison (insn
)
1744 rtx body
= PATTERN (insn
);
1747 if (GET_CODE (body
) == SET
)
1748 comp
= SET_SRC (body
);
1750 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1752 if (GET_CODE (comp
) == COMPARE
)
1754 rtx op0
= XEXP (comp
, 0);
1755 rtx op1
= XEXP (comp
, 1);
1756 XEXP (comp
, 0) = op1
;
1757 XEXP (comp
, 1) = op0
;
1761 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1762 CONST0_RTX (GET_MODE (comp
)), comp
);
1763 if (GET_CODE (body
) == SET
)
1764 SET_SRC (body
) = new;
1766 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1770 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1771 or (2) a component ref of something variable. Represent the later with
1772 a NULL expression. */
1775 component_ref_for_mem_expr (ref
)
1778 tree inner
= TREE_OPERAND (ref
, 0);
1780 if (TREE_CODE (inner
) == COMPONENT_REF
)
1781 inner
= component_ref_for_mem_expr (inner
);
1784 tree placeholder_ptr
= 0;
1786 /* Now remove any conversions: they don't change what the underlying
1787 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1788 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1789 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1790 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1791 || TREE_CODE (inner
) == SAVE_EXPR
1792 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1793 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1794 inner
= find_placeholder (inner
, &placeholder_ptr
);
1796 inner
= TREE_OPERAND (inner
, 0);
1798 if (! DECL_P (inner
))
1802 if (inner
== TREE_OPERAND (ref
, 0))
1805 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1806 TREE_OPERAND (ref
, 1));
1809 /* Given REF, a MEM, and T, either the type of X or the expression
1810 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1811 if we are making a new object of this type. BITPOS is nonzero if
1812 there is an offset outstanding on T that will be applied later. */
1815 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1819 HOST_WIDE_INT bitpos
;
1821 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1822 tree expr
= MEM_EXPR (ref
);
1823 rtx offset
= MEM_OFFSET (ref
);
1824 rtx size
= MEM_SIZE (ref
);
1825 unsigned int align
= MEM_ALIGN (ref
);
1826 HOST_WIDE_INT apply_bitpos
= 0;
1829 /* It can happen that type_for_mode was given a mode for which there
1830 is no language-level type. In which case it returns NULL, which
1835 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1837 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1838 wrong answer, as it assumes that DECL_RTL already has the right alias
1839 info. Callers should not set DECL_RTL until after the call to
1840 set_mem_attributes. */
1841 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1844 /* Get the alias set from the expression or type (perhaps using a
1845 front-end routine) and use it. */
1846 alias
= get_alias_set (t
);
1848 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1849 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1850 RTX_UNCHANGING_P (ref
)
1851 |= ((lang_hooks
.honor_readonly
1852 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1853 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1855 /* If we are making an object of this type, or if this is a DECL, we know
1856 that it is a scalar if the type is not an aggregate. */
1857 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1858 MEM_SCALAR_P (ref
) = 1;
1860 /* We can set the alignment from the type if we are making an object,
1861 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1862 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1863 align
= MAX (align
, TYPE_ALIGN (type
));
1865 /* If the size is known, we can set that. */
1866 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1867 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1869 /* If T is not a type, we may be able to deduce some more information about
1873 maybe_set_unchanging (ref
, t
);
1874 if (TREE_THIS_VOLATILE (t
))
1875 MEM_VOLATILE_P (ref
) = 1;
1877 /* Now remove any conversions: they don't change what the underlying
1878 object is. Likewise for SAVE_EXPR. */
1879 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1880 || TREE_CODE (t
) == NON_LVALUE_EXPR
1881 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1882 || TREE_CODE (t
) == SAVE_EXPR
)
1883 t
= TREE_OPERAND (t
, 0);
1885 /* If this expression can't be addressed (e.g., it contains a reference
1886 to a non-addressable field), show we don't change its alias set. */
1887 if (! can_address_p (t
))
1888 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1890 /* If this is a decl, set the attributes of the MEM from it. */
1894 offset
= const0_rtx
;
1895 apply_bitpos
= bitpos
;
1896 size
= (DECL_SIZE_UNIT (t
)
1897 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1898 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1899 align
= DECL_ALIGN (t
);
1902 /* If this is a constant, we know the alignment. */
1903 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1905 align
= TYPE_ALIGN (type
);
1906 #ifdef CONSTANT_ALIGNMENT
1907 align
= CONSTANT_ALIGNMENT (t
, align
);
1911 /* If this is a field reference and not a bit-field, record it. */
1912 /* ??? There is some information that can be gleened from bit-fields,
1913 such as the word offset in the structure that might be modified.
1914 But skip it for now. */
1915 else if (TREE_CODE (t
) == COMPONENT_REF
1916 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1918 expr
= component_ref_for_mem_expr (t
);
1919 offset
= const0_rtx
;
1920 apply_bitpos
= bitpos
;
1921 /* ??? Any reason the field size would be different than
1922 the size we got from the type? */
1925 /* If this is an array reference, look for an outer field reference. */
1926 else if (TREE_CODE (t
) == ARRAY_REF
)
1928 tree off_tree
= size_zero_node
;
1932 tree index
= TREE_OPERAND (t
, 1);
1933 tree array
= TREE_OPERAND (t
, 0);
1934 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1935 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1936 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1938 /* We assume all arrays have sizes that are a multiple of a byte.
1939 First subtract the lower bound, if any, in the type of the
1940 index, then convert to sizetype and multiply by the size of the
1942 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1943 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1946 /* If the index has a self-referential type, pass it to a
1947 WITH_RECORD_EXPR; if the component size is, pass our
1948 component to one. */
1949 if (! TREE_CONSTANT (index
)
1950 && contains_placeholder_p (index
))
1951 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t
);
1952 if (! TREE_CONSTANT (unit_size
)
1953 && contains_placeholder_p (unit_size
))
1954 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1958 = fold (build (PLUS_EXPR
, sizetype
,
1959 fold (build (MULT_EXPR
, sizetype
,
1963 t
= TREE_OPERAND (t
, 0);
1965 while (TREE_CODE (t
) == ARRAY_REF
);
1971 if (host_integerp (off_tree
, 1))
1973 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1974 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1975 align
= DECL_ALIGN (t
);
1976 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1978 offset
= GEN_INT (ioff
);
1979 apply_bitpos
= bitpos
;
1982 else if (TREE_CODE (t
) == COMPONENT_REF
)
1984 expr
= component_ref_for_mem_expr (t
);
1985 if (host_integerp (off_tree
, 1))
1987 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1988 apply_bitpos
= bitpos
;
1990 /* ??? Any reason the field size would be different than
1991 the size we got from the type? */
1993 else if (flag_argument_noalias
> 1
1994 && TREE_CODE (t
) == INDIRECT_REF
1995 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2002 /* If this is a Fortran indirect argument reference, record the
2004 else if (flag_argument_noalias
> 1
2005 && TREE_CODE (t
) == INDIRECT_REF
2006 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
2013 /* If we modified OFFSET based on T, then subtract the outstanding
2014 bit position offset. Similarly, increase the size of the accessed
2015 object to contain the negative offset. */
2018 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
2020 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
2023 /* Now set the attributes we computed above. */
2025 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
2027 /* If this is already known to be a scalar or aggregate, we are done. */
2028 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
2031 /* If it is a reference into an aggregate, this is part of an aggregate.
2032 Otherwise we don't know. */
2033 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
2034 || TREE_CODE (t
) == ARRAY_RANGE_REF
2035 || TREE_CODE (t
) == BIT_FIELD_REF
)
2036 MEM_IN_STRUCT_P (ref
) = 1;
2040 set_mem_attributes (ref
, t
, objectp
)
2045 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2048 /* Set the decl for MEM to DECL. */
2051 set_mem_attrs_from_reg (mem
, reg
)
2056 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
2057 GEN_INT (REG_OFFSET (reg
)),
2058 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2061 /* Set the alias set of MEM to SET. */
2064 set_mem_alias_set (mem
, set
)
2068 #ifdef ENABLE_CHECKING
2069 /* If the new and old alias sets don't conflict, something is wrong. */
2070 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
2074 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
2075 MEM_SIZE (mem
), MEM_ALIGN (mem
),
2079 /* Set the alignment of MEM to ALIGN bits. */
2082 set_mem_align (mem
, align
)
2086 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2087 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
2091 /* Set the expr for MEM to EXPR. */
2094 set_mem_expr (mem
, expr
)
2099 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
2100 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
2103 /* Set the offset of MEM to OFFSET. */
2106 set_mem_offset (mem
, offset
)
2109 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2110 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
2114 /* Set the size of MEM to SIZE. */
2117 set_mem_size (mem
, size
)
2120 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
2121 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
2125 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2126 and its address changed to ADDR. (VOIDmode means don't change the mode.
2127 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2128 returned memory location is required to be valid. The memory
2129 attributes are not changed. */
2132 change_address_1 (memref
, mode
, addr
, validate
)
2134 enum machine_mode mode
;
2140 if (GET_CODE (memref
) != MEM
)
2142 if (mode
== VOIDmode
)
2143 mode
= GET_MODE (memref
);
2145 addr
= XEXP (memref
, 0);
2149 if (reload_in_progress
|| reload_completed
)
2151 if (! memory_address_p (mode
, addr
))
2155 addr
= memory_address (mode
, addr
);
2158 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2161 new = gen_rtx_MEM (mode
, addr
);
2162 MEM_COPY_ATTRIBUTES (new, memref
);
2166 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2167 way we are changing MEMREF, so we only preserve the alias set. */
2170 change_address (memref
, mode
, addr
)
2172 enum machine_mode mode
;
2175 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
2176 enum machine_mode mmode
= GET_MODE (new);
2179 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
2180 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
2181 (mmode
== BLKmode
? BITS_PER_UNIT
2182 : GET_MODE_ALIGNMENT (mmode
)),
2188 /* Return a memory reference like MEMREF, but with its mode changed
2189 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2190 nonzero, the memory address is forced to be valid.
2191 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2192 and caller is responsible for adjusting MEMREF base register. */
2195 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2197 enum machine_mode mode
;
2198 HOST_WIDE_INT offset
;
2199 int validate
, adjust
;
2201 rtx addr
= XEXP (memref
, 0);
2203 rtx memoffset
= MEM_OFFSET (memref
);
2205 unsigned int memalign
= MEM_ALIGN (memref
);
2207 /* ??? Prefer to create garbage instead of creating shared rtl.
2208 This may happen even if offset is nonzero -- consider
2209 (plus (plus reg reg) const_int) -- so do this always. */
2210 addr
= copy_rtx (addr
);
2214 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2215 object, we can merge it into the LO_SUM. */
2216 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2218 && (unsigned HOST_WIDE_INT
) offset
2219 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2220 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2221 plus_constant (XEXP (addr
, 1), offset
));
2223 addr
= plus_constant (addr
, offset
);
2226 new = change_address_1 (memref
, mode
, addr
, validate
);
2228 /* Compute the new values of the memory attributes due to this adjustment.
2229 We add the offsets and update the alignment. */
2231 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2233 /* Compute the new alignment by taking the MIN of the alignment and the
2234 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2239 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2241 /* We can compute the size in a number of ways. */
2242 if (GET_MODE (new) != BLKmode
)
2243 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2244 else if (MEM_SIZE (memref
))
2245 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2247 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2248 memoffset
, size
, memalign
, GET_MODE (new));
2250 /* At some point, we should validate that this offset is within the object,
2251 if all the appropriate values are known. */
2255 /* Return a memory reference like MEMREF, but with its mode changed
2256 to MODE and its address changed to ADDR, which is assumed to be
2257 MEMREF offseted by OFFSET bytes. If VALIDATE is
2258 nonzero, the memory address is forced to be valid. */
2261 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2263 enum machine_mode mode
;
2265 HOST_WIDE_INT offset
;
2268 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2269 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2272 /* Return a memory reference like MEMREF, but whose address is changed by
2273 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2274 known to be in OFFSET (possibly 1). */
2277 offset_address (memref
, offset
, pow2
)
2282 rtx
new, addr
= XEXP (memref
, 0);
2284 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2286 /* At this point we don't know _why_ the address is invalid. It
2287 could have secondary memory refereces, multiplies or anything.
2289 However, if we did go and rearrange things, we can wind up not
2290 being able to recognize the magic around pic_offset_table_rtx.
2291 This stuff is fragile, and is yet another example of why it is
2292 bad to expose PIC machinery too early. */
2293 if (! memory_address_p (GET_MODE (memref
), new)
2294 && GET_CODE (addr
) == PLUS
2295 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2297 addr
= force_reg (GET_MODE (addr
), addr
);
2298 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2301 update_temp_slot_address (XEXP (memref
, 0), new);
2302 new = change_address_1 (memref
, VOIDmode
, new, 1);
2304 /* Update the alignment to reflect the offset. Reset the offset, which
2307 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2308 MIN (MEM_ALIGN (memref
),
2309 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2314 /* Return a memory reference like MEMREF, but with its address changed to
2315 ADDR. The caller is asserting that the actual piece of memory pointed
2316 to is the same, just the form of the address is being changed, such as
2317 by putting something into a register. */
2320 replace_equiv_address (memref
, addr
)
2324 /* change_address_1 copies the memory attribute structure without change
2325 and that's exactly what we want here. */
2326 update_temp_slot_address (XEXP (memref
, 0), addr
);
2327 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2330 /* Likewise, but the reference is not required to be valid. */
2333 replace_equiv_address_nv (memref
, addr
)
2337 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2340 /* Return a memory reference like MEMREF, but with its mode widened to
2341 MODE and offset by OFFSET. This would be used by targets that e.g.
2342 cannot issue QImode memory operations and have to use SImode memory
2343 operations plus masking logic. */
2346 widen_memory_access (memref
, mode
, offset
)
2348 enum machine_mode mode
;
2349 HOST_WIDE_INT offset
;
2351 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2352 tree expr
= MEM_EXPR (new);
2353 rtx memoffset
= MEM_OFFSET (new);
2354 unsigned int size
= GET_MODE_SIZE (mode
);
2356 /* If we don't know what offset we were at within the expression, then
2357 we can't know if we've overstepped the bounds. */
2363 if (TREE_CODE (expr
) == COMPONENT_REF
)
2365 tree field
= TREE_OPERAND (expr
, 1);
2367 if (! DECL_SIZE_UNIT (field
))
2373 /* Is the field at least as large as the access? If so, ok,
2374 otherwise strip back to the containing structure. */
2375 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2376 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2377 && INTVAL (memoffset
) >= 0)
2380 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2386 expr
= TREE_OPERAND (expr
, 0);
2387 memoffset
= (GEN_INT (INTVAL (memoffset
)
2388 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2389 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2392 /* Similarly for the decl. */
2393 else if (DECL_P (expr
)
2394 && DECL_SIZE_UNIT (expr
)
2395 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2396 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2397 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2401 /* The widened memory access overflows the expression, which means
2402 that it could alias another expression. Zap it. */
2409 memoffset
= NULL_RTX
;
2411 /* The widened memory may alias other stuff, so zap the alias set. */
2412 /* ??? Maybe use get_alias_set on any remaining expression. */
2414 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2415 MEM_ALIGN (new), mode
);
2420 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2425 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2426 NULL
, label_num
++, NULL
);
2429 /* For procedure integration. */
2431 /* Install new pointers to the first and last insns in the chain.
2432 Also, set cur_insn_uid to one higher than the last in use.
2433 Used for an inline-procedure after copying the insn chain. */
2436 set_new_first_and_last_insn (first
, last
)
2445 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2446 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2451 /* Set the range of label numbers found in the current function.
2452 This is used when belatedly compiling an inline function. */
2455 set_new_first_and_last_label_num (first
, last
)
2458 base_label_num
= label_num
;
2459 first_label_num
= first
;
2460 last_label_num
= last
;
2463 /* Set the last label number found in the current function.
2464 This is used when belatedly compiling an inline function. */
2467 set_new_last_label_num (last
)
2470 base_label_num
= label_num
;
2471 last_label_num
= last
;
2474 /* Restore all variables describing the current status from the structure *P.
2475 This is used after a nested function. */
2478 restore_emit_status (p
)
2479 struct function
*p ATTRIBUTE_UNUSED
;
2484 /* Go through all the RTL insn bodies and copy any invalid shared
2485 structure. This routine should only be called once. */
2488 unshare_all_rtl (fndecl
, insn
)
2494 /* Make sure that virtual parameters are not shared. */
2495 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2496 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2498 /* Make sure that virtual stack slots are not shared. */
2499 unshare_all_decls (DECL_INITIAL (fndecl
));
2501 /* Unshare just about everything else. */
2502 unshare_all_rtl_1 (insn
);
2504 /* Make sure the addresses of stack slots found outside the insn chain
2505 (such as, in DECL_RTL of a variable) are not shared
2506 with the insn chain.
2508 This special care is necessary when the stack slot MEM does not
2509 actually appear in the insn chain. If it does appear, its address
2510 is unshared from all else at that point. */
2511 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2514 /* Go through all the RTL insn bodies and copy any invalid shared
2515 structure, again. This is a fairly expensive thing to do so it
2516 should be done sparingly. */
2519 unshare_all_rtl_again (insn
)
2525 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2528 reset_used_flags (PATTERN (p
));
2529 reset_used_flags (REG_NOTES (p
));
2530 reset_used_flags (LOG_LINKS (p
));
2533 /* Make sure that virtual stack slots are not shared. */
2534 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2536 /* Make sure that virtual parameters are not shared. */
2537 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2538 reset_used_flags (DECL_RTL (decl
));
2540 reset_used_flags (stack_slot_list
);
2542 unshare_all_rtl (cfun
->decl
, insn
);
2545 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2546 Assumes the mark bits are cleared at entry. */
2549 unshare_all_rtl_1 (insn
)
2552 for (; insn
; insn
= NEXT_INSN (insn
))
2555 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2556 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2557 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2561 /* Go through all virtual stack slots of a function and copy any
2562 shared structure. */
2564 unshare_all_decls (blk
)
2569 /* Copy shared decls. */
2570 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2571 if (DECL_RTL_SET_P (t
))
2572 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2574 /* Now process sub-blocks. */
2575 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2576 unshare_all_decls (t
);
2579 /* Go through all virtual stack slots of a function and mark them as
2582 reset_used_decls (blk
)
2588 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2589 if (DECL_RTL_SET_P (t
))
2590 reset_used_flags (DECL_RTL (t
));
2592 /* Now process sub-blocks. */
2593 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2594 reset_used_decls (t
);
2597 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2598 placed in the result directly, rather than being copied. MAY_SHARE is
2599 either a MEM of an EXPR_LIST of MEMs. */
2602 copy_most_rtx (orig
, may_share
)
2609 const char *format_ptr
;
2611 if (orig
== may_share
2612 || (GET_CODE (may_share
) == EXPR_LIST
2613 && in_expr_list_p (may_share
, orig
)))
2616 code
= GET_CODE (orig
);
2634 copy
= rtx_alloc (code
);
2635 PUT_MODE (copy
, GET_MODE (orig
));
2636 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2637 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2638 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2639 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2640 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2642 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2644 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2646 switch (*format_ptr
++)
2649 XEXP (copy
, i
) = XEXP (orig
, i
);
2650 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2651 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2655 XEXP (copy
, i
) = XEXP (orig
, i
);
2660 XVEC (copy
, i
) = XVEC (orig
, i
);
2661 if (XVEC (orig
, i
) != NULL
)
2663 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2664 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2665 XVECEXP (copy
, i
, j
)
2666 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2671 XWINT (copy
, i
) = XWINT (orig
, i
);
2676 XINT (copy
, i
) = XINT (orig
, i
);
2680 XTREE (copy
, i
) = XTREE (orig
, i
);
2685 XSTR (copy
, i
) = XSTR (orig
, i
);
2689 /* Copy this through the wide int field; that's safest. */
2690 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2700 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2701 Recursively does the same for subexpressions. */
2704 copy_rtx_if_shared (orig
)
2710 const char *format_ptr
;
2716 code
= GET_CODE (x
);
2718 /* These types may be freely shared. */
2732 /* SCRATCH must be shared because they represent distinct values. */
2736 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2737 a LABEL_REF, it isn't sharable. */
2738 if (GET_CODE (XEXP (x
, 0)) == PLUS
2739 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2740 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2749 /* The chain of insns is not being copied. */
2753 /* A MEM is allowed to be shared if its address is constant.
2755 We used to allow sharing of MEMs which referenced
2756 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2757 that can lose. instantiate_virtual_regs will not unshare
2758 the MEMs, and combine may change the structure of the address
2759 because it looks safe and profitable in one context, but
2760 in some other context it creates unrecognizable RTL. */
2761 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2770 /* This rtx may not be shared. If it has already been seen,
2771 replace it with a copy of itself. */
2773 if (RTX_FLAG (x
, used
))
2777 copy
= rtx_alloc (code
);
2779 (sizeof (*copy
) - sizeof (copy
->fld
)
2780 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2784 RTX_FLAG (x
, used
) = 1;
2786 /* Now scan the subexpressions recursively.
2787 We can store any replaced subexpressions directly into X
2788 since we know X is not shared! Any vectors in X
2789 must be copied if X was copied. */
2791 format_ptr
= GET_RTX_FORMAT (code
);
2793 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2795 switch (*format_ptr
++)
2798 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2802 if (XVEC (x
, i
) != NULL
)
2805 int len
= XVECLEN (x
, i
);
2807 if (copied
&& len
> 0)
2808 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2809 for (j
= 0; j
< len
; j
++)
2810 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2818 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2819 to look for shared sub-parts. */
2822 reset_used_flags (x
)
2827 const char *format_ptr
;
2832 code
= GET_CODE (x
);
2834 /* These types may be freely shared so we needn't do any resetting
2856 /* The chain of insns is not being copied. */
2863 RTX_FLAG (x
, used
) = 0;
2865 format_ptr
= GET_RTX_FORMAT (code
);
2866 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2868 switch (*format_ptr
++)
2871 reset_used_flags (XEXP (x
, i
));
2875 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2876 reset_used_flags (XVECEXP (x
, i
, j
));
2882 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2883 Return X or the rtx for the pseudo reg the value of X was copied into.
2884 OTHER must be valid as a SET_DEST. */
2887 make_safe_from (x
, other
)
2891 switch (GET_CODE (other
))
2894 other
= SUBREG_REG (other
);
2896 case STRICT_LOW_PART
:
2899 other
= XEXP (other
, 0);
2905 if ((GET_CODE (other
) == MEM
2907 && GET_CODE (x
) != REG
2908 && GET_CODE (x
) != SUBREG
)
2909 || (GET_CODE (other
) == REG
2910 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2911 || reg_mentioned_p (other
, x
))))
2913 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2914 emit_move_insn (temp
, x
);
2920 /* Emission of insns (adding them to the doubly-linked list). */
2922 /* Return the first insn of the current sequence or current function. */
2930 /* Specify a new insn as the first in the chain. */
2933 set_first_insn (insn
)
2936 if (PREV_INSN (insn
) != 0)
2941 /* Return the last insn emitted in current sequence or current function. */
2949 /* Specify a new insn as the last in the chain. */
2952 set_last_insn (insn
)
2955 if (NEXT_INSN (insn
) != 0)
2960 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2963 get_last_insn_anywhere ()
2965 struct sequence_stack
*stack
;
2968 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2969 if (stack
->last
!= 0)
2974 /* Return the first nonnote insn emitted in current sequence or current
2975 function. This routine looks inside SEQUENCEs. */
2978 get_first_nonnote_insn ()
2980 rtx insn
= first_insn
;
2984 insn
= next_insn (insn
);
2985 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2992 /* Return the last nonnote insn emitted in current sequence or current
2993 function. This routine looks inside SEQUENCEs. */
2996 get_last_nonnote_insn ()
2998 rtx insn
= last_insn
;
3002 insn
= previous_insn (insn
);
3003 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3010 /* Return a number larger than any instruction's uid in this function. */
3015 return cur_insn_uid
;
3018 /* Renumber instructions so that no instruction UIDs are wasted. */
3021 renumber_insns (stream
)
3026 /* If we're not supposed to renumber instructions, don't. */
3027 if (!flag_renumber_insns
)
3030 /* If there aren't that many instructions, then it's not really
3031 worth renumbering them. */
3032 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
3037 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3040 fprintf (stream
, "Renumbering insn %d to %d\n",
3041 INSN_UID (insn
), cur_insn_uid
);
3042 INSN_UID (insn
) = cur_insn_uid
++;
3046 /* Return the next insn. If it is a SEQUENCE, return the first insn
3055 insn
= NEXT_INSN (insn
);
3056 if (insn
&& GET_CODE (insn
) == INSN
3057 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3058 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3064 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3068 previous_insn (insn
)
3073 insn
= PREV_INSN (insn
);
3074 if (insn
&& GET_CODE (insn
) == INSN
3075 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3076 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3082 /* Return the next insn after INSN that is not a NOTE. This routine does not
3083 look inside SEQUENCEs. */
3086 next_nonnote_insn (insn
)
3091 insn
= NEXT_INSN (insn
);
3092 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3099 /* Return the previous insn before INSN that is not a NOTE. This routine does
3100 not look inside SEQUENCEs. */
3103 prev_nonnote_insn (insn
)
3108 insn
= PREV_INSN (insn
);
3109 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3116 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3117 or 0, if there is none. This routine does not look inside
3121 next_real_insn (insn
)
3126 insn
= NEXT_INSN (insn
);
3127 if (insn
== 0 || GET_CODE (insn
) == INSN
3128 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3135 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3136 or 0, if there is none. This routine does not look inside
3140 prev_real_insn (insn
)
3145 insn
= PREV_INSN (insn
);
3146 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3147 || GET_CODE (insn
) == JUMP_INSN
)
3154 /* Find the next insn after INSN that really does something. This routine
3155 does not look inside SEQUENCEs. Until reload has completed, this is the
3156 same as next_real_insn. */
3159 active_insn_p (insn
)
3162 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3163 || (GET_CODE (insn
) == INSN
3164 && (! reload_completed
3165 || (GET_CODE (PATTERN (insn
)) != USE
3166 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3170 next_active_insn (insn
)
3175 insn
= NEXT_INSN (insn
);
3176 if (insn
== 0 || active_insn_p (insn
))
3183 /* Find the last insn before INSN that really does something. This routine
3184 does not look inside SEQUENCEs. Until reload has completed, this is the
3185 same as prev_real_insn. */
3188 prev_active_insn (insn
)
3193 insn
= PREV_INSN (insn
);
3194 if (insn
== 0 || active_insn_p (insn
))
3201 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3209 insn
= NEXT_INSN (insn
);
3210 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3217 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3225 insn
= PREV_INSN (insn
);
3226 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3234 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3235 and REG_CC_USER notes so we can find it. */
3238 link_cc0_insns (insn
)
3241 rtx user
= next_nonnote_insn (insn
);
3243 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3244 user
= XVECEXP (PATTERN (user
), 0, 0);
3246 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3248 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3251 /* Return the next insn that uses CC0 after INSN, which is assumed to
3252 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3253 applied to the result of this function should yield INSN).
3255 Normally, this is simply the next insn. However, if a REG_CC_USER note
3256 is present, it contains the insn that uses CC0.
3258 Return 0 if we can't find the insn. */
3261 next_cc0_user (insn
)
3264 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3267 return XEXP (note
, 0);
3269 insn
= next_nonnote_insn (insn
);
3270 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3271 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3273 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3279 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3280 note, it is the previous insn. */
3283 prev_cc0_setter (insn
)
3286 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3289 return XEXP (note
, 0);
3291 insn
= prev_nonnote_insn (insn
);
3292 if (! sets_cc0_p (PATTERN (insn
)))
3299 /* Increment the label uses for all labels present in rtx. */
3302 mark_label_nuses (x
)
3309 code
= GET_CODE (x
);
3310 if (code
== LABEL_REF
)
3311 LABEL_NUSES (XEXP (x
, 0))++;
3313 fmt
= GET_RTX_FORMAT (code
);
3314 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3317 mark_label_nuses (XEXP (x
, i
));
3318 else if (fmt
[i
] == 'E')
3319 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3320 mark_label_nuses (XVECEXP (x
, i
, j
));
3325 /* Try splitting insns that can be split for better scheduling.
3326 PAT is the pattern which might split.
3327 TRIAL is the insn providing PAT.
3328 LAST is nonzero if we should return the last insn of the sequence produced.
3330 If this routine succeeds in splitting, it returns the first or last
3331 replacement insn depending on the value of LAST. Otherwise, it
3332 returns TRIAL. If the insn to be returned can be split, it will be. */
3335 try_split (pat
, trial
, last
)
3339 rtx before
= PREV_INSN (trial
);
3340 rtx after
= NEXT_INSN (trial
);
3341 int has_barrier
= 0;
3346 if (any_condjump_p (trial
)
3347 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3348 split_branch_probability
= INTVAL (XEXP (note
, 0));
3349 probability
= split_branch_probability
;
3351 seq
= split_insns (pat
, trial
);
3353 split_branch_probability
= -1;
3355 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3356 We may need to handle this specially. */
3357 if (after
&& GET_CODE (after
) == BARRIER
)
3360 after
= NEXT_INSN (after
);
3365 /* Sometimes there will be only one insn in that list, this case will
3366 normally arise only when we want it in turn to be split (SFmode on
3367 the 29k is an example). */
3368 if (NEXT_INSN (seq
) != NULL_RTX
)
3370 rtx insn_last
, insn
;
3373 /* Avoid infinite loop if any insn of the result matches
3374 the original pattern. */
3378 if (INSN_P (insn_last
)
3379 && rtx_equal_p (PATTERN (insn_last
), pat
))
3381 if (NEXT_INSN (insn_last
) == NULL_RTX
)
3383 insn_last
= NEXT_INSN (insn_last
);
3388 while (insn
!= NULL_RTX
)
3390 if (GET_CODE (insn
) == JUMP_INSN
)
3392 mark_jump_label (PATTERN (insn
), insn
, 0);
3394 if (probability
!= -1
3395 && any_condjump_p (insn
)
3396 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3398 /* We can preserve the REG_BR_PROB notes only if exactly
3399 one jump is created, otherwise the machine description
3400 is responsible for this step using
3401 split_branch_probability variable. */
3405 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3406 GEN_INT (probability
),
3411 insn
= PREV_INSN (insn
);
3414 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3415 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3416 if (GET_CODE (trial
) == CALL_INSN
)
3419 while (insn
!= NULL_RTX
)
3421 if (GET_CODE (insn
) == CALL_INSN
)
3422 CALL_INSN_FUNCTION_USAGE (insn
)
3423 = CALL_INSN_FUNCTION_USAGE (trial
);
3425 insn
= PREV_INSN (insn
);
3429 /* Copy notes, particularly those related to the CFG. */
3430 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3432 switch (REG_NOTE_KIND (note
))
3436 while (insn
!= NULL_RTX
)
3438 if (GET_CODE (insn
) == CALL_INSN
3439 || (flag_non_call_exceptions
3440 && may_trap_p (PATTERN (insn
))))
3442 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3445 insn
= PREV_INSN (insn
);
3451 case REG_ALWAYS_RETURN
:
3453 while (insn
!= NULL_RTX
)
3455 if (GET_CODE (insn
) == CALL_INSN
)
3457 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3460 insn
= PREV_INSN (insn
);
3464 case REG_NON_LOCAL_GOTO
:
3466 while (insn
!= NULL_RTX
)
3468 if (GET_CODE (insn
) == JUMP_INSN
)
3470 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3473 insn
= PREV_INSN (insn
);
3482 /* If there are LABELS inside the split insns increment the
3483 usage count so we don't delete the label. */
3484 if (GET_CODE (trial
) == INSN
)
3487 while (insn
!= NULL_RTX
)
3489 if (GET_CODE (insn
) == INSN
)
3490 mark_label_nuses (PATTERN (insn
));
3492 insn
= PREV_INSN (insn
);
3496 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3498 delete_insn (trial
);
3500 emit_barrier_after (tem
);
3502 /* Recursively call try_split for each new insn created; by the
3503 time control returns here that insn will be fully split, so
3504 set LAST and continue from the insn after the one returned.
3505 We can't use next_active_insn here since AFTER may be a note.
3506 Ignore deleted insns, which can be occur if not optimizing. */
3507 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3508 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3509 tem
= try_split (PATTERN (tem
), tem
, 1);
3511 /* Avoid infinite loop if the result matches the original pattern. */
3512 else if (rtx_equal_p (PATTERN (seq
), pat
))
3516 PATTERN (trial
) = PATTERN (seq
);
3517 INSN_CODE (trial
) = -1;
3518 try_split (PATTERN (trial
), trial
, last
);
3521 /* Return either the first or the last insn, depending on which was
3524 ? (after
? PREV_INSN (after
) : last_insn
)
3525 : NEXT_INSN (before
);
3531 /* Make and return an INSN rtx, initializing all its slots.
3532 Store PATTERN in the pattern slots. */
3535 make_insn_raw (pattern
)
3540 insn
= rtx_alloc (INSN
);
3542 INSN_UID (insn
) = cur_insn_uid
++;
3543 PATTERN (insn
) = pattern
;
3544 INSN_CODE (insn
) = -1;
3545 LOG_LINKS (insn
) = NULL
;
3546 REG_NOTES (insn
) = NULL
;
3547 INSN_SCOPE (insn
) = NULL
;
3548 BLOCK_FOR_INSN (insn
) = NULL
;
3550 #ifdef ENABLE_RTL_CHECKING
3553 && (returnjump_p (insn
)
3554 || (GET_CODE (insn
) == SET
3555 && SET_DEST (insn
) == pc_rtx
)))
3557 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3565 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3568 make_jump_insn_raw (pattern
)
3573 insn
= rtx_alloc (JUMP_INSN
);
3574 INSN_UID (insn
) = cur_insn_uid
++;
3576 PATTERN (insn
) = pattern
;
3577 INSN_CODE (insn
) = -1;
3578 LOG_LINKS (insn
) = NULL
;
3579 REG_NOTES (insn
) = NULL
;
3580 JUMP_LABEL (insn
) = NULL
;
3581 INSN_SCOPE (insn
) = NULL
;
3582 BLOCK_FOR_INSN (insn
) = NULL
;
3587 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3590 make_call_insn_raw (pattern
)
3595 insn
= rtx_alloc (CALL_INSN
);
3596 INSN_UID (insn
) = cur_insn_uid
++;
3598 PATTERN (insn
) = pattern
;
3599 INSN_CODE (insn
) = -1;
3600 LOG_LINKS (insn
) = NULL
;
3601 REG_NOTES (insn
) = NULL
;
3602 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3603 INSN_SCOPE (insn
) = NULL
;
3604 BLOCK_FOR_INSN (insn
) = NULL
;
3609 /* Add INSN to the end of the doubly-linked list.
3610 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3616 PREV_INSN (insn
) = last_insn
;
3617 NEXT_INSN (insn
) = 0;
3619 if (NULL
!= last_insn
)
3620 NEXT_INSN (last_insn
) = insn
;
3622 if (NULL
== first_insn
)
3628 /* Add INSN into the doubly-linked list after insn AFTER. This and
3629 the next should be the only functions called to insert an insn once
3630 delay slots have been filled since only they know how to update a
3634 add_insn_after (insn
, after
)
3637 rtx next
= NEXT_INSN (after
);
3640 if (optimize
&& INSN_DELETED_P (after
))
3643 NEXT_INSN (insn
) = next
;
3644 PREV_INSN (insn
) = after
;
3648 PREV_INSN (next
) = insn
;
3649 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3650 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3652 else if (last_insn
== after
)
3656 struct sequence_stack
*stack
= seq_stack
;
3657 /* Scan all pending sequences too. */
3658 for (; stack
; stack
= stack
->next
)
3659 if (after
== stack
->last
)
3669 if (GET_CODE (after
) != BARRIER
3670 && GET_CODE (insn
) != BARRIER
3671 && (bb
= BLOCK_FOR_INSN (after
)))
3673 set_block_for_insn (insn
, bb
);
3675 bb
->flags
|= BB_DIRTY
;
3676 /* Should not happen as first in the BB is always
3677 either NOTE or LABEL. */
3678 if (bb
->end
== after
3679 /* Avoid clobbering of structure when creating new BB. */
3680 && GET_CODE (insn
) != BARRIER
3681 && (GET_CODE (insn
) != NOTE
3682 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3686 NEXT_INSN (after
) = insn
;
3687 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3689 rtx sequence
= PATTERN (after
);
3690 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3694 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3695 the previous should be the only functions called to insert an insn once
3696 delay slots have been filled since only they know how to update a
3700 add_insn_before (insn
, before
)
3703 rtx prev
= PREV_INSN (before
);
3706 if (optimize
&& INSN_DELETED_P (before
))
3709 PREV_INSN (insn
) = prev
;
3710 NEXT_INSN (insn
) = before
;
3714 NEXT_INSN (prev
) = insn
;
3715 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3717 rtx sequence
= PATTERN (prev
);
3718 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3721 else if (first_insn
== before
)
3725 struct sequence_stack
*stack
= seq_stack
;
3726 /* Scan all pending sequences too. */
3727 for (; stack
; stack
= stack
->next
)
3728 if (before
== stack
->first
)
3730 stack
->first
= insn
;
3738 if (GET_CODE (before
) != BARRIER
3739 && GET_CODE (insn
) != BARRIER
3740 && (bb
= BLOCK_FOR_INSN (before
)))
3742 set_block_for_insn (insn
, bb
);
3744 bb
->flags
|= BB_DIRTY
;
3745 /* Should not happen as first in the BB is always
3746 either NOTE or LABEl. */
3747 if (bb
->head
== insn
3748 /* Avoid clobbering of structure when creating new BB. */
3749 && GET_CODE (insn
) != BARRIER
3750 && (GET_CODE (insn
) != NOTE
3751 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3755 PREV_INSN (before
) = insn
;
3756 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3757 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3760 /* Remove an insn from its doubly-linked list. This function knows how
3761 to handle sequences. */
3766 rtx next
= NEXT_INSN (insn
);
3767 rtx prev
= PREV_INSN (insn
);
3772 NEXT_INSN (prev
) = next
;
3773 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3775 rtx sequence
= PATTERN (prev
);
3776 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3779 else if (first_insn
== insn
)
3783 struct sequence_stack
*stack
= seq_stack
;
3784 /* Scan all pending sequences too. */
3785 for (; stack
; stack
= stack
->next
)
3786 if (insn
== stack
->first
)
3788 stack
->first
= next
;
3798 PREV_INSN (next
) = prev
;
3799 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3800 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3802 else if (last_insn
== insn
)
3806 struct sequence_stack
*stack
= seq_stack
;
3807 /* Scan all pending sequences too. */
3808 for (; stack
; stack
= stack
->next
)
3809 if (insn
== stack
->last
)
3818 if (GET_CODE (insn
) != BARRIER
3819 && (bb
= BLOCK_FOR_INSN (insn
)))
3822 bb
->flags
|= BB_DIRTY
;
3823 if (bb
->head
== insn
)
3825 /* Never ever delete the basic block note without deleting whole
3827 if (GET_CODE (insn
) == NOTE
)
3831 if (bb
->end
== insn
)
3836 /* Delete all insns made since FROM.
3837 FROM becomes the new last instruction. */
3840 delete_insns_since (from
)
3846 NEXT_INSN (from
) = 0;
3850 /* This function is deprecated, please use sequences instead.
3852 Move a consecutive bunch of insns to a different place in the chain.
3853 The insns to be moved are those between FROM and TO.
3854 They are moved to a new position after the insn AFTER.
3855 AFTER must not be FROM or TO or any insn in between.
3857 This function does not know about SEQUENCEs and hence should not be
3858 called after delay-slot filling has been done. */
3861 reorder_insns_nobb (from
, to
, after
)
3862 rtx from
, to
, after
;
3864 /* Splice this bunch out of where it is now. */
3865 if (PREV_INSN (from
))
3866 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3868 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3869 if (last_insn
== to
)
3870 last_insn
= PREV_INSN (from
);
3871 if (first_insn
== from
)
3872 first_insn
= NEXT_INSN (to
);
3874 /* Make the new neighbors point to it and it to them. */
3875 if (NEXT_INSN (after
))
3876 PREV_INSN (NEXT_INSN (after
)) = to
;
3878 NEXT_INSN (to
) = NEXT_INSN (after
);
3879 PREV_INSN (from
) = after
;
3880 NEXT_INSN (after
) = from
;
3881 if (after
== last_insn
)
3885 /* Same as function above, but take care to update BB boundaries. */
3887 reorder_insns (from
, to
, after
)
3888 rtx from
, to
, after
;
3890 rtx prev
= PREV_INSN (from
);
3891 basic_block bb
, bb2
;
3893 reorder_insns_nobb (from
, to
, after
);
3895 if (GET_CODE (after
) != BARRIER
3896 && (bb
= BLOCK_FOR_INSN (after
)))
3899 bb
->flags
|= BB_DIRTY
;
3901 if (GET_CODE (from
) != BARRIER
3902 && (bb2
= BLOCK_FOR_INSN (from
)))
3906 bb2
->flags
|= BB_DIRTY
;
3909 if (bb
->end
== after
)
3912 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3913 set_block_for_insn (x
, bb
);
3917 /* Return the line note insn preceding INSN. */
3920 find_line_note (insn
)
3923 if (no_line_numbers
)
3926 for (; insn
; insn
= PREV_INSN (insn
))
3927 if (GET_CODE (insn
) == NOTE
3928 && NOTE_LINE_NUMBER (insn
) >= 0)
3934 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3935 of the moved insns when debugging. This may insert a note between AFTER
3936 and FROM, and another one after TO. */
3939 reorder_insns_with_line_notes (from
, to
, after
)
3940 rtx from
, to
, after
;
3942 rtx from_line
= find_line_note (from
);
3943 rtx after_line
= find_line_note (after
);
3945 reorder_insns (from
, to
, after
);
3947 if (from_line
== after_line
)
3951 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3952 NOTE_LINE_NUMBER (from_line
),
3955 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3956 NOTE_LINE_NUMBER (after_line
),
3960 /* Remove unnecessary notes from the instruction stream. */
3963 remove_unnecessary_notes ()
3965 rtx block_stack
= NULL_RTX
;
3966 rtx eh_stack
= NULL_RTX
;
3971 /* We must not remove the first instruction in the function because
3972 the compiler depends on the first instruction being a note. */
3973 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3975 /* Remember what's next. */
3976 next
= NEXT_INSN (insn
);
3978 /* We're only interested in notes. */
3979 if (GET_CODE (insn
) != NOTE
)
3982 switch (NOTE_LINE_NUMBER (insn
))
3984 case NOTE_INSN_DELETED
:
3985 case NOTE_INSN_LOOP_END_TOP_COND
:
3989 case NOTE_INSN_EH_REGION_BEG
:
3990 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3993 case NOTE_INSN_EH_REGION_END
:
3994 /* Too many end notes. */
3995 if (eh_stack
== NULL_RTX
)
3997 /* Mismatched nesting. */
3998 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
4001 eh_stack
= XEXP (eh_stack
, 1);
4002 free_INSN_LIST_node (tmp
);
4005 case NOTE_INSN_BLOCK_BEG
:
4006 /* By now, all notes indicating lexical blocks should have
4007 NOTE_BLOCK filled in. */
4008 if (NOTE_BLOCK (insn
) == NULL_TREE
)
4010 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
4013 case NOTE_INSN_BLOCK_END
:
4014 /* Too many end notes. */
4015 if (block_stack
== NULL_RTX
)
4017 /* Mismatched nesting. */
4018 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
4021 block_stack
= XEXP (block_stack
, 1);
4022 free_INSN_LIST_node (tmp
);
4024 /* Scan back to see if there are any non-note instructions
4025 between INSN and the beginning of this block. If not,
4026 then there is no PC range in the generated code that will
4027 actually be in this block, so there's no point in
4028 remembering the existence of the block. */
4029 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
4031 /* This block contains a real instruction. Note that we
4032 don't include labels; if the only thing in the block
4033 is a label, then there are still no PC values that
4034 lie within the block. */
4038 /* We're only interested in NOTEs. */
4039 if (GET_CODE (tmp
) != NOTE
)
4042 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
4044 /* We just verified that this BLOCK matches us with
4045 the block_stack check above. Never delete the
4046 BLOCK for the outermost scope of the function; we
4047 can refer to names from that scope even if the
4048 block notes are messed up. */
4049 if (! is_body_block (NOTE_BLOCK (insn
))
4050 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
4057 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
4058 /* There's a nested block. We need to leave the
4059 current block in place since otherwise the debugger
4060 wouldn't be able to show symbols from our block in
4061 the nested block. */
4067 /* Too many begin notes. */
4068 if (block_stack
|| eh_stack
)
4073 /* Emit insn(s) of given code and pattern
4074 at a specified place within the doubly-linked list.
4076 All of the emit_foo global entry points accept an object
4077 X which is either an insn list or a PATTERN of a single
4080 There are thus a few canonical ways to generate code and
4081 emit it at a specific place in the instruction stream. For
4082 example, consider the instruction named SPOT and the fact that
4083 we would like to emit some instructions before SPOT. We might
4087 ... emit the new instructions ...
4088 insns_head = get_insns ();
4091 emit_insn_before (insns_head, SPOT);
4093 It used to be common to generate SEQUENCE rtl instead, but that
4094 is a relic of the past which no longer occurs. The reason is that
4095 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4096 generated would almost certainly die right after it was created. */
4098 /* Make X be output before the instruction BEFORE. */
4101 emit_insn_before (x
, before
)
4107 #ifdef ENABLE_RTL_CHECKING
4108 if (before
== NULL_RTX
)
4115 switch (GET_CODE (x
))
4126 rtx next
= NEXT_INSN (insn
);
4127 add_insn_before (insn
, before
);
4133 #ifdef ENABLE_RTL_CHECKING
4140 last
= make_insn_raw (x
);
4141 add_insn_before (last
, before
);
4148 /* Make an instruction with body X and code JUMP_INSN
4149 and output it before the instruction BEFORE. */
4152 emit_jump_insn_before (x
, before
)
4155 rtx insn
, last
= NULL_RTX
;
4157 #ifdef ENABLE_RTL_CHECKING
4158 if (before
== NULL_RTX
)
4162 switch (GET_CODE (x
))
4173 rtx next
= NEXT_INSN (insn
);
4174 add_insn_before (insn
, before
);
4180 #ifdef ENABLE_RTL_CHECKING
4187 last
= make_jump_insn_raw (x
);
4188 add_insn_before (last
, before
);
4195 /* Make an instruction with body X and code CALL_INSN
4196 and output it before the instruction BEFORE. */
4199 emit_call_insn_before (x
, before
)
4202 rtx last
= NULL_RTX
, insn
;
4204 #ifdef ENABLE_RTL_CHECKING
4205 if (before
== NULL_RTX
)
4209 switch (GET_CODE (x
))
4220 rtx next
= NEXT_INSN (insn
);
4221 add_insn_before (insn
, before
);
4227 #ifdef ENABLE_RTL_CHECKING
4234 last
= make_call_insn_raw (x
);
4235 add_insn_before (last
, before
);
4242 /* Make an insn of code BARRIER
4243 and output it before the insn BEFORE. */
4246 emit_barrier_before (before
)
4249 rtx insn
= rtx_alloc (BARRIER
);
4251 INSN_UID (insn
) = cur_insn_uid
++;
4253 add_insn_before (insn
, before
);
4257 /* Emit the label LABEL before the insn BEFORE. */
4260 emit_label_before (label
, before
)
4263 /* This can be called twice for the same label as a result of the
4264 confusion that follows a syntax error! So make it harmless. */
4265 if (INSN_UID (label
) == 0)
4267 INSN_UID (label
) = cur_insn_uid
++;
4268 add_insn_before (label
, before
);
4274 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4277 emit_note_before (subtype
, before
)
4281 rtx note
= rtx_alloc (NOTE
);
4282 INSN_UID (note
) = cur_insn_uid
++;
4283 NOTE_SOURCE_FILE (note
) = 0;
4284 NOTE_LINE_NUMBER (note
) = subtype
;
4285 BLOCK_FOR_INSN (note
) = NULL
;
4287 add_insn_before (note
, before
);
4291 /* Helper for emit_insn_after, handles lists of instructions
4294 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4297 emit_insn_after_1 (first
, after
)
4304 if (GET_CODE (after
) != BARRIER
4305 && (bb
= BLOCK_FOR_INSN (after
)))
4307 bb
->flags
|= BB_DIRTY
;
4308 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4309 if (GET_CODE (last
) != BARRIER
)
4310 set_block_for_insn (last
, bb
);
4311 if (GET_CODE (last
) != BARRIER
)
4312 set_block_for_insn (last
, bb
);
4313 if (bb
->end
== after
)
4317 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4320 after_after
= NEXT_INSN (after
);
4322 NEXT_INSN (after
) = first
;
4323 PREV_INSN (first
) = after
;
4324 NEXT_INSN (last
) = after_after
;
4326 PREV_INSN (after_after
) = last
;
4328 if (after
== last_insn
)
4333 /* Make X be output after the insn AFTER. */
4336 emit_insn_after (x
, after
)
4341 #ifdef ENABLE_RTL_CHECKING
4342 if (after
== NULL_RTX
)
4349 switch (GET_CODE (x
))
4357 last
= emit_insn_after_1 (x
, after
);
4360 #ifdef ENABLE_RTL_CHECKING
4367 last
= make_insn_raw (x
);
4368 add_insn_after (last
, after
);
4375 /* Similar to emit_insn_after, except that line notes are to be inserted so
4376 as to act as if this insn were at FROM. */
4379 emit_insn_after_with_line_notes (x
, after
, from
)
4382 rtx from_line
= find_line_note (from
);
4383 rtx after_line
= find_line_note (after
);
4384 rtx insn
= emit_insn_after (x
, after
);
4387 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4388 NOTE_LINE_NUMBER (from_line
),
4392 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4393 NOTE_LINE_NUMBER (after_line
),
4397 /* Make an insn of code JUMP_INSN with body X
4398 and output it after the insn AFTER. */
4401 emit_jump_insn_after (x
, after
)
4406 #ifdef ENABLE_RTL_CHECKING
4407 if (after
== NULL_RTX
)
4411 switch (GET_CODE (x
))
4419 last
= emit_insn_after_1 (x
, after
);
4422 #ifdef ENABLE_RTL_CHECKING
4429 last
= make_jump_insn_raw (x
);
4430 add_insn_after (last
, after
);
4437 /* Make an instruction with body X and code CALL_INSN
4438 and output it after the instruction AFTER. */
4441 emit_call_insn_after (x
, after
)
4446 #ifdef ENABLE_RTL_CHECKING
4447 if (after
== NULL_RTX
)
4451 switch (GET_CODE (x
))
4459 last
= emit_insn_after_1 (x
, after
);
4462 #ifdef ENABLE_RTL_CHECKING
4469 last
= make_call_insn_raw (x
);
4470 add_insn_after (last
, after
);
4477 /* Make an insn of code BARRIER
4478 and output it after the insn AFTER. */
4481 emit_barrier_after (after
)
4484 rtx insn
= rtx_alloc (BARRIER
);
4486 INSN_UID (insn
) = cur_insn_uid
++;
4488 add_insn_after (insn
, after
);
4492 /* Emit the label LABEL after the insn AFTER. */
4495 emit_label_after (label
, after
)
4498 /* This can be called twice for the same label
4499 as a result of the confusion that follows a syntax error!
4500 So make it harmless. */
4501 if (INSN_UID (label
) == 0)
4503 INSN_UID (label
) = cur_insn_uid
++;
4504 add_insn_after (label
, after
);
4510 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4513 emit_note_after (subtype
, after
)
4517 rtx note
= rtx_alloc (NOTE
);
4518 INSN_UID (note
) = cur_insn_uid
++;
4519 NOTE_SOURCE_FILE (note
) = 0;
4520 NOTE_LINE_NUMBER (note
) = subtype
;
4521 BLOCK_FOR_INSN (note
) = NULL
;
4522 add_insn_after (note
, after
);
4526 /* Emit a line note for FILE and LINE after the insn AFTER. */
4529 emit_line_note_after (file
, line
, after
)
4536 if (no_line_numbers
&& line
> 0)
4542 note
= rtx_alloc (NOTE
);
4543 INSN_UID (note
) = cur_insn_uid
++;
4544 NOTE_SOURCE_FILE (note
) = file
;
4545 NOTE_LINE_NUMBER (note
) = line
;
4546 BLOCK_FOR_INSN (note
) = NULL
;
4547 add_insn_after (note
, after
);
4551 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4553 emit_insn_after_scope (pattern
, after
, scope
)
4557 rtx last
= emit_insn_after (pattern
, after
);
4559 after
= NEXT_INSN (after
);
4562 if (active_insn_p (after
))
4563 INSN_SCOPE (after
) = scope
;
4566 after
= NEXT_INSN (after
);
4571 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4573 emit_jump_insn_after_scope (pattern
, after
, scope
)
4577 rtx last
= emit_jump_insn_after (pattern
, after
);
4579 after
= NEXT_INSN (after
);
4582 if (active_insn_p (after
))
4583 INSN_SCOPE (after
) = scope
;
4586 after
= NEXT_INSN (after
);
4591 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4593 emit_call_insn_after_scope (pattern
, after
, scope
)
4597 rtx last
= emit_call_insn_after (pattern
, after
);
4599 after
= NEXT_INSN (after
);
4602 if (active_insn_p (after
))
4603 INSN_SCOPE (after
) = scope
;
4606 after
= NEXT_INSN (after
);
4611 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4613 emit_insn_before_scope (pattern
, before
, scope
)
4614 rtx pattern
, before
;
4617 rtx first
= PREV_INSN (before
);
4618 rtx last
= emit_insn_before (pattern
, before
);
4620 first
= NEXT_INSN (first
);
4623 if (active_insn_p (first
))
4624 INSN_SCOPE (first
) = scope
;
4627 first
= NEXT_INSN (first
);
4632 /* Take X and emit it at the end of the doubly-linked
4635 Returns the last insn emitted. */
4641 rtx last
= last_insn
;
4647 switch (GET_CODE (x
))
4658 rtx next
= NEXT_INSN (insn
);
4665 #ifdef ENABLE_RTL_CHECKING
4672 last
= make_insn_raw (x
);
4680 /* Make an insn of code JUMP_INSN with pattern X
4681 and add it to the end of the doubly-linked list. */
4687 rtx last
= NULL_RTX
, insn
;
4689 switch (GET_CODE (x
))
4700 rtx next
= NEXT_INSN (insn
);
4707 #ifdef ENABLE_RTL_CHECKING
4714 last
= make_jump_insn_raw (x
);
4722 /* Make an insn of code CALL_INSN with pattern X
4723 and add it to the end of the doubly-linked list. */
4731 switch (GET_CODE (x
))
4739 insn
= emit_insn (x
);
4742 #ifdef ENABLE_RTL_CHECKING
4749 insn
= make_call_insn_raw (x
);
4757 /* Add the label LABEL to the end of the doubly-linked list. */
4763 /* This can be called twice for the same label
4764 as a result of the confusion that follows a syntax error!
4765 So make it harmless. */
4766 if (INSN_UID (label
) == 0)
4768 INSN_UID (label
) = cur_insn_uid
++;
4774 /* Make an insn of code BARRIER
4775 and add it to the end of the doubly-linked list. */
4780 rtx barrier
= rtx_alloc (BARRIER
);
4781 INSN_UID (barrier
) = cur_insn_uid
++;
4786 /* Make an insn of code NOTE
4787 with data-fields specified by FILE and LINE
4788 and add it to the end of the doubly-linked list,
4789 but only if line-numbers are desired for debugging info. */
4792 emit_line_note (file
, line
)
4796 set_file_and_line_for_stmt (file
, line
);
4799 if (no_line_numbers
)
4803 return emit_note (file
, line
);
4806 /* Make an insn of code NOTE
4807 with data-fields specified by FILE and LINE
4808 and add it to the end of the doubly-linked list.
4809 If it is a line-number NOTE, omit it if it matches the previous one. */
4812 emit_note (file
, line
)
4820 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4821 && line
== last_linenum
)
4823 last_filename
= file
;
4824 last_linenum
= line
;
4827 if (no_line_numbers
&& line
> 0)
4833 note
= rtx_alloc (NOTE
);
4834 INSN_UID (note
) = cur_insn_uid
++;
4835 NOTE_SOURCE_FILE (note
) = file
;
4836 NOTE_LINE_NUMBER (note
) = line
;
4837 BLOCK_FOR_INSN (note
) = NULL
;
4842 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4845 emit_line_note_force (file
, line
)
4850 return emit_line_note (file
, line
);
4853 /* Cause next statement to emit a line note even if the line number
4854 has not changed. This is used at the beginning of a function. */
4857 force_next_line_note ()
4862 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4863 note of this type already exists, remove it first. */
4866 set_unique_reg_note (insn
, kind
, datum
)
4871 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4877 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4878 has multiple sets (some callers assume single_set
4879 means the insn only has one set, when in fact it
4880 means the insn only has one * useful * set). */
4881 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4888 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4889 It serves no useful purpose and breaks eliminate_regs. */
4890 if (GET_CODE (datum
) == ASM_OPERANDS
)
4900 XEXP (note
, 0) = datum
;
4904 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4905 return REG_NOTES (insn
);
4908 /* Return an indication of which type of insn should have X as a body.
4909 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4915 if (GET_CODE (x
) == CODE_LABEL
)
4917 if (GET_CODE (x
) == CALL
)
4919 if (GET_CODE (x
) == RETURN
)
4921 if (GET_CODE (x
) == SET
)
4923 if (SET_DEST (x
) == pc_rtx
)
4925 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4930 if (GET_CODE (x
) == PARALLEL
)
4933 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4934 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4936 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4937 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4939 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4940 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4946 /* Emit the rtl pattern X as an appropriate kind of insn.
4947 If X is a label, it is simply added into the insn chain. */
4953 enum rtx_code code
= classify_insn (x
);
4955 if (code
== CODE_LABEL
)
4956 return emit_label (x
);
4957 else if (code
== INSN
)
4958 return emit_insn (x
);
4959 else if (code
== JUMP_INSN
)
4961 rtx insn
= emit_jump_insn (x
);
4962 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4963 return emit_barrier ();
4966 else if (code
== CALL_INSN
)
4967 return emit_call_insn (x
);
4972 /* Space for free sequence stack entries. */
4973 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4975 /* Begin emitting insns to a sequence which can be packaged in an
4976 RTL_EXPR. If this sequence will contain something that might cause
4977 the compiler to pop arguments to function calls (because those
4978 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4979 details), use do_pending_stack_adjust before calling this function.
4980 That will ensure that the deferred pops are not accidentally
4981 emitted in the middle of this sequence. */
4986 struct sequence_stack
*tem
;
4988 if (free_sequence_stack
!= NULL
)
4990 tem
= free_sequence_stack
;
4991 free_sequence_stack
= tem
->next
;
4994 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
4996 tem
->next
= seq_stack
;
4997 tem
->first
= first_insn
;
4998 tem
->last
= last_insn
;
4999 tem
->sequence_rtl_expr
= seq_rtl_expr
;
5007 /* Similarly, but indicate that this sequence will be placed in T, an
5008 RTL_EXPR. See the documentation for start_sequence for more
5009 information about how to use this function. */
5012 start_sequence_for_rtl_expr (t
)
5020 /* Set up the insn chain starting with FIRST as the current sequence,
5021 saving the previously current one. See the documentation for
5022 start_sequence for more information about how to use this function. */
5025 push_to_sequence (first
)
5032 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
5038 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5041 push_to_full_sequence (first
, last
)
5047 /* We really should have the end of the insn chain here. */
5048 if (last
&& NEXT_INSN (last
))
5052 /* Set up the outer-level insn chain
5053 as the current sequence, saving the previously current one. */
5056 push_topmost_sequence ()
5058 struct sequence_stack
*stack
, *top
= NULL
;
5062 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5065 first_insn
= top
->first
;
5066 last_insn
= top
->last
;
5067 seq_rtl_expr
= top
->sequence_rtl_expr
;
5070 /* After emitting to the outer-level insn chain, update the outer-level
5071 insn chain, and restore the previous saved state. */
5074 pop_topmost_sequence ()
5076 struct sequence_stack
*stack
, *top
= NULL
;
5078 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5081 top
->first
= first_insn
;
5082 top
->last
= last_insn
;
5083 /* ??? Why don't we save seq_rtl_expr here? */
5088 /* After emitting to a sequence, restore previous saved state.
5090 To get the contents of the sequence just made, you must call
5091 `get_insns' *before* calling here.
5093 If the compiler might have deferred popping arguments while
5094 generating this sequence, and this sequence will not be immediately
5095 inserted into the instruction stream, use do_pending_stack_adjust
5096 before calling get_insns. That will ensure that the deferred
5097 pops are inserted into this sequence, and not into some random
5098 location in the instruction stream. See INHIBIT_DEFER_POP for more
5099 information about deferred popping of arguments. */
5104 struct sequence_stack
*tem
= seq_stack
;
5106 first_insn
= tem
->first
;
5107 last_insn
= tem
->last
;
5108 seq_rtl_expr
= tem
->sequence_rtl_expr
;
5109 seq_stack
= tem
->next
;
5111 memset (tem
, 0, sizeof (*tem
));
5112 tem
->next
= free_sequence_stack
;
5113 free_sequence_stack
= tem
;
5116 /* This works like end_sequence, but records the old sequence in FIRST
5120 end_full_sequence (first
, last
)
5123 *first
= first_insn
;
5128 /* Return 1 if currently emitting into a sequence. */
5133 return seq_stack
!= 0;
5136 /* Put the various virtual registers into REGNO_REG_RTX. */
5139 init_virtual_regs (es
)
5140 struct emit_status
*es
;
5142 rtx
*ptr
= es
->x_regno_reg_rtx
;
5143 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5144 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5145 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5146 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5147 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5151 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5152 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5153 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5154 static int copy_insn_n_scratches
;
5156 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5157 copied an ASM_OPERANDS.
5158 In that case, it is the original input-operand vector. */
5159 static rtvec orig_asm_operands_vector
;
5161 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5162 copied an ASM_OPERANDS.
5163 In that case, it is the copied input-operand vector. */
5164 static rtvec copy_asm_operands_vector
;
5166 /* Likewise for the constraints vector. */
5167 static rtvec orig_asm_constraints_vector
;
5168 static rtvec copy_asm_constraints_vector
;
5170 /* Recursively create a new copy of an rtx for copy_insn.
5171 This function differs from copy_rtx in that it handles SCRATCHes and
5172 ASM_OPERANDs properly.
5173 Normally, this function is not used directly; use copy_insn as front end.
5174 However, you could first copy an insn pattern with copy_insn and then use
5175 this function afterwards to properly copy any REG_NOTEs containing
5185 const char *format_ptr
;
5187 code
= GET_CODE (orig
);
5204 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5205 if (copy_insn_scratch_in
[i
] == orig
)
5206 return copy_insn_scratch_out
[i
];
5210 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5211 a LABEL_REF, it isn't sharable. */
5212 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5213 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5214 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5218 /* A MEM with a constant address is not sharable. The problem is that
5219 the constant address may need to be reloaded. If the mem is shared,
5220 then reloading one copy of this mem will cause all copies to appear
5221 to have been reloaded. */
5227 copy
= rtx_alloc (code
);
5229 /* Copy the various flags, and other information. We assume that
5230 all fields need copying, and then clear the fields that should
5231 not be copied. That is the sensible default behavior, and forces
5232 us to explicitly document why we are *not* copying a flag. */
5233 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5235 /* We do not copy the USED flag, which is used as a mark bit during
5236 walks over the RTL. */
5237 RTX_FLAG (copy
, used
) = 0;
5239 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5240 if (GET_RTX_CLASS (code
) == 'i')
5242 RTX_FLAG (copy
, jump
) = 0;
5243 RTX_FLAG (copy
, call
) = 0;
5244 RTX_FLAG (copy
, frame_related
) = 0;
5247 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5249 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5251 copy
->fld
[i
] = orig
->fld
[i
];
5252 switch (*format_ptr
++)
5255 if (XEXP (orig
, i
) != NULL
)
5256 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5261 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5262 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5263 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5264 XVEC (copy
, i
) = copy_asm_operands_vector
;
5265 else if (XVEC (orig
, i
) != NULL
)
5267 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5268 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5269 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5280 /* These are left unchanged. */
5288 if (code
== SCRATCH
)
5290 i
= copy_insn_n_scratches
++;
5291 if (i
>= MAX_RECOG_OPERANDS
)
5293 copy_insn_scratch_in
[i
] = orig
;
5294 copy_insn_scratch_out
[i
] = copy
;
5296 else if (code
== ASM_OPERANDS
)
5298 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5299 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5300 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5301 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5307 /* Create a new copy of an rtx.
5308 This function differs from copy_rtx in that it handles SCRATCHes and
5309 ASM_OPERANDs properly.
5310 INSN doesn't really have to be a full INSN; it could be just the
5316 copy_insn_n_scratches
= 0;
5317 orig_asm_operands_vector
= 0;
5318 orig_asm_constraints_vector
= 0;
5319 copy_asm_operands_vector
= 0;
5320 copy_asm_constraints_vector
= 0;
5321 return copy_insn_1 (insn
);
5324 /* Initialize data structures and variables in this file
5325 before generating rtl for each function. */
5330 struct function
*f
= cfun
;
5332 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5335 seq_rtl_expr
= NULL
;
5337 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5340 first_label_num
= label_num
;
5344 /* Init the tables that describe all the pseudo regs. */
5346 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5348 f
->emit
->regno_pointer_align
5349 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5350 * sizeof (unsigned char));
5353 = (rtx
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5356 /* Put copies of all the hard registers into regno_reg_rtx. */
5357 memcpy (regno_reg_rtx
,
5358 static_regno_reg_rtx
,
5359 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5361 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5362 init_virtual_regs (f
->emit
);
5364 /* Indicate that the virtual registers and stack locations are
5366 REG_POINTER (stack_pointer_rtx
) = 1;
5367 REG_POINTER (frame_pointer_rtx
) = 1;
5368 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5369 REG_POINTER (arg_pointer_rtx
) = 1;
5371 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5372 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5373 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5374 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5375 REG_POINTER (virtual_cfa_rtx
) = 1;
5377 #ifdef STACK_BOUNDARY
5378 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5379 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5380 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5381 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5383 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5384 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5385 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5386 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5387 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5390 #ifdef INIT_EXPANDERS
5395 /* Generate the constant 0. */
5398 gen_const_vector_0 (mode
)
5399 enum machine_mode mode
;
5404 enum machine_mode inner
;
5406 units
= GET_MODE_NUNITS (mode
);
5407 inner
= GET_MODE_INNER (mode
);
5409 v
= rtvec_alloc (units
);
5411 /* We need to call this function after we to set CONST0_RTX first. */
5412 if (!CONST0_RTX (inner
))
5415 for (i
= 0; i
< units
; ++i
)
5416 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5418 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5422 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5423 all elements are zero. */
5425 gen_rtx_CONST_VECTOR (mode
, v
)
5426 enum machine_mode mode
;
5429 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5432 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5433 if (RTVEC_ELT (v
, i
) != inner_zero
)
5434 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5435 return CONST0_RTX (mode
);
5438 /* Create some permanent unique rtl objects shared between all functions.
5439 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5442 init_emit_once (line_numbers
)
5446 enum machine_mode mode
;
5447 enum machine_mode double_mode
;
5449 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5451 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5452 const_int_htab_eq
, NULL
);
5454 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5455 const_double_htab_eq
, NULL
);
5457 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5458 mem_attrs_htab_eq
, NULL
);
5459 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5460 reg_attrs_htab_eq
, NULL
);
5462 no_line_numbers
= ! line_numbers
;
5464 /* Compute the word and byte modes. */
5466 byte_mode
= VOIDmode
;
5467 word_mode
= VOIDmode
;
5468 double_mode
= VOIDmode
;
5470 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5471 mode
= GET_MODE_WIDER_MODE (mode
))
5473 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5474 && byte_mode
== VOIDmode
)
5477 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5478 && word_mode
== VOIDmode
)
5482 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5483 mode
= GET_MODE_WIDER_MODE (mode
))
5485 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5486 && double_mode
== VOIDmode
)
5490 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5492 /* Assign register numbers to the globally defined register rtx.
5493 This must be done at runtime because the register number field
5494 is in a union and some compilers can't initialize unions. */
5496 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5497 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5498 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5499 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5500 if (hard_frame_pointer_rtx
== 0)
5501 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5502 HARD_FRAME_POINTER_REGNUM
);
5503 if (arg_pointer_rtx
== 0)
5504 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5505 virtual_incoming_args_rtx
=
5506 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5507 virtual_stack_vars_rtx
=
5508 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5509 virtual_stack_dynamic_rtx
=
5510 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5511 virtual_outgoing_args_rtx
=
5512 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5513 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5515 /* Initialize RTL for commonly used hard registers. These are
5516 copied into regno_reg_rtx as we begin to compile each function. */
5517 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5518 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5520 #ifdef INIT_EXPANDERS
5521 /* This is to initialize {init|mark|free}_machine_status before the first
5522 call to push_function_context_to. This is needed by the Chill front
5523 end which calls push_function_context_to before the first call to
5524 init_function_start. */
5528 /* Create the unique rtx's for certain rtx codes and operand values. */
5530 /* Don't use gen_rtx here since gen_rtx in this case
5531 tries to use these variables. */
5532 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5533 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5534 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5536 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5537 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5538 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5540 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5542 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5543 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5544 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5545 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5547 for (i
= 0; i
<= 2; i
++)
5549 REAL_VALUE_TYPE
*r
=
5550 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5552 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5553 mode
= GET_MODE_WIDER_MODE (mode
))
5554 const_tiny_rtx
[i
][(int) mode
] =
5555 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5557 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5559 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5560 mode
= GET_MODE_WIDER_MODE (mode
))
5561 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5563 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5565 mode
= GET_MODE_WIDER_MODE (mode
))
5566 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5569 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5571 mode
= GET_MODE_WIDER_MODE (mode
))
5572 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5574 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5576 mode
= GET_MODE_WIDER_MODE (mode
))
5577 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5579 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5580 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5581 const_tiny_rtx
[0][i
] = const0_rtx
;
5583 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5584 if (STORE_FLAG_VALUE
== 1)
5585 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5587 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5588 return_address_pointer_rtx
5589 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5593 struct_value_rtx
= STRUCT_VALUE
;
5595 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5598 #ifdef STRUCT_VALUE_INCOMING
5599 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5601 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5602 struct_value_incoming_rtx
5603 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5605 struct_value_incoming_rtx
= struct_value_rtx
;
5609 #ifdef STATIC_CHAIN_REGNUM
5610 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5612 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5613 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5614 static_chain_incoming_rtx
5615 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5618 static_chain_incoming_rtx
= static_chain_rtx
;
5622 static_chain_rtx
= STATIC_CHAIN
;
5624 #ifdef STATIC_CHAIN_INCOMING
5625 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5627 static_chain_incoming_rtx
= static_chain_rtx
;
5631 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5632 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5635 /* Query and clear/ restore no_line_numbers. This is used by the
5636 switch / case handling in stmt.c to give proper line numbers in
5637 warnings about unreachable code. */
5640 force_line_numbers ()
5642 int old
= no_line_numbers
;
5644 no_line_numbers
= 0;
5646 force_next_line_note ();
5651 restore_line_number_status (old_value
)
5654 no_line_numbers
= old_value
;
5657 /* Produce exact duplicate of insn INSN after AFTER.
5658 Care updating of libcall regions if present. */
5661 emit_copy_of_insn_after (insn
, after
)
5665 rtx note1
, note2
, link
;
5667 switch (GET_CODE (insn
))
5670 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5674 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5678 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5679 if (CALL_INSN_FUNCTION_USAGE (insn
))
5680 CALL_INSN_FUNCTION_USAGE (new)
5681 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5682 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5683 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5690 /* Update LABEL_NUSES. */
5691 mark_jump_label (PATTERN (new), new, 0);
5693 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5695 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5697 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5698 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5700 if (GET_CODE (link
) == EXPR_LIST
)
5702 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5707 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5712 /* Fix the libcall sequences. */
5713 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5716 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5718 XEXP (note1
, 0) = p
;
5719 XEXP (note2
, 0) = new;
5721 INSN_CODE (new) = INSN_CODE (insn
);
5725 #include "gt-emit-rtl.h"